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mmc: meson-gx: add support for HS400 mode
[thirdparty/kernel/stable.git] / drivers / mmc / core / mmc.c
CommitLineData
7ea239d9 1/*
70f10482 2 * linux/drivers/mmc/core/mmc.c
7ea239d9
PO
3 *
4 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
5 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
6 * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/err.h>
81f8a7be 14#include <linux/of.h>
5a0e3ad6 15#include <linux/slab.h>
0205a904 16#include <linux/stat.h>
0cb403a2 17#include <linux/pm_runtime.h>
7ea239d9
PO
18
19#include <linux/mmc/host.h>
20#include <linux/mmc/card.h>
21#include <linux/mmc/mmc.h>
22
23#include "core.h"
4facdde1 24#include "card.h"
436f8daa 25#include "host.h"
4101c16a 26#include "bus.h"
7ea239d9 27#include "mmc_ops.h"
4c4cb171 28#include "sd_ops.h"
7ea239d9 29
fe1b5700
UH
30#define DEFAULT_CMD6_TIMEOUT_MS 500
31
7ea239d9
PO
32static const unsigned int tran_exp[] = {
33 10000, 100000, 1000000, 10000000,
34 0, 0, 0, 0
35};
36
37static const unsigned char tran_mant[] = {
38 0, 10, 12, 13, 15, 20, 25, 30,
39 35, 40, 45, 50, 55, 60, 70, 80,
40};
41
42static const unsigned int tacc_exp[] = {
43 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
44};
45
46static const unsigned int tacc_mant[] = {
47 0, 10, 12, 13, 15, 20, 25, 30,
48 35, 40, 45, 50, 55, 60, 70, 80,
49};
50
5320226a
P
51static const struct mmc_fixup mmc_ext_csd_fixups[] = {
52 /*
53 * Certain Hynix eMMC 4.41 cards might get broken when HPI feature
54 * is used so disable the HPI feature for such buggy cards.
55 */
56 MMC_FIXUP_EXT_CSD_REV(CID_NAME_ANY, CID_MANFID_HYNIX,
57 0x014a, add_quirk, MMC_QUIRK_BROKEN_HPI, 5),
58
59 END_FIXUP
60};
61
7ea239d9
PO
62#define UNSTUFF_BITS(resp,start,size) \
63 ({ \
64 const int __size = size; \
65 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
66 const int __off = 3 - ((start) / 32); \
67 const int __shft = (start) & 31; \
68 u32 __res; \
69 \
70 __res = resp[__off] >> __shft; \
71 if (__size + __shft > 32) \
72 __res |= resp[__off-1] << ((32 - __shft) % 32); \
73 __res & __mask; \
74 })
75
76/*
77 * Given the decoded CSD structure, decode the raw CID to our CID structure.
78 */
bd766312 79static int mmc_decode_cid(struct mmc_card *card)
7ea239d9
PO
80{
81 u32 *resp = card->raw_cid;
82
83 /*
84 * The selection of the format here is based upon published
85 * specs from sandisk and from what people have reported.
86 */
87 switch (card->csd.mmca_vsn) {
88 case 0: /* MMC v1.0 - v1.2 */
89 case 1: /* MMC v1.4 */
90 card->cid.manfid = UNSTUFF_BITS(resp, 104, 24);
91 card->cid.prod_name[0] = UNSTUFF_BITS(resp, 96, 8);
92 card->cid.prod_name[1] = UNSTUFF_BITS(resp, 88, 8);
93 card->cid.prod_name[2] = UNSTUFF_BITS(resp, 80, 8);
94 card->cid.prod_name[3] = UNSTUFF_BITS(resp, 72, 8);
95 card->cid.prod_name[4] = UNSTUFF_BITS(resp, 64, 8);
96 card->cid.prod_name[5] = UNSTUFF_BITS(resp, 56, 8);
97 card->cid.prod_name[6] = UNSTUFF_BITS(resp, 48, 8);
98 card->cid.hwrev = UNSTUFF_BITS(resp, 44, 4);
99 card->cid.fwrev = UNSTUFF_BITS(resp, 40, 4);
100 card->cid.serial = UNSTUFF_BITS(resp, 16, 24);
101 card->cid.month = UNSTUFF_BITS(resp, 12, 4);
102 card->cid.year = UNSTUFF_BITS(resp, 8, 4) + 1997;
103 break;
104
105 case 2: /* MMC v2.0 - v2.2 */
106 case 3: /* MMC v3.1 - v3.3 */
107 case 4: /* MMC v4 */
108 card->cid.manfid = UNSTUFF_BITS(resp, 120, 8);
109 card->cid.oemid = UNSTUFF_BITS(resp, 104, 16);
110 card->cid.prod_name[0] = UNSTUFF_BITS(resp, 96, 8);
111 card->cid.prod_name[1] = UNSTUFF_BITS(resp, 88, 8);
112 card->cid.prod_name[2] = UNSTUFF_BITS(resp, 80, 8);
113 card->cid.prod_name[3] = UNSTUFF_BITS(resp, 72, 8);
114 card->cid.prod_name[4] = UNSTUFF_BITS(resp, 64, 8);
115 card->cid.prod_name[5] = UNSTUFF_BITS(resp, 56, 8);
51e7e8b6 116 card->cid.prv = UNSTUFF_BITS(resp, 48, 8);
7ea239d9
PO
117 card->cid.serial = UNSTUFF_BITS(resp, 16, 32);
118 card->cid.month = UNSTUFF_BITS(resp, 12, 4);
119 card->cid.year = UNSTUFF_BITS(resp, 8, 4) + 1997;
120 break;
121
122 default:
a3c76eb9 123 pr_err("%s: card has unknown MMCA version %d\n",
7ea239d9 124 mmc_hostname(card->host), card->csd.mmca_vsn);
bd766312 125 return -EINVAL;
7ea239d9 126 }
bd766312
PO
127
128 return 0;
7ea239d9
PO
129}
130
dfe86cba
AH
131static void mmc_set_erase_size(struct mmc_card *card)
132{
133 if (card->ext_csd.erase_group_def & 1)
134 card->erase_size = card->ext_csd.hc_erase_size;
135 else
136 card->erase_size = card->csd.erase_size;
137
138 mmc_init_erase(card);
139}
140
7ea239d9
PO
141/*
142 * Given a 128-bit response, decode to our card CSD structure.
143 */
bd766312 144static int mmc_decode_csd(struct mmc_card *card)
7ea239d9
PO
145{
146 struct mmc_csd *csd = &card->csd;
dfe86cba 147 unsigned int e, m, a, b;
7ea239d9
PO
148 u32 *resp = card->raw_csd;
149
150 /*
151 * We only understand CSD structure v1.1 and v1.2.
152 * v1.2 has extra information in bits 15, 11 and 10.
6da24b78 153 * We also support eMMC v4.4 & v4.41.
7ea239d9 154 */
6da24b78
KP
155 csd->structure = UNSTUFF_BITS(resp, 126, 2);
156 if (csd->structure == 0) {
a3c76eb9 157 pr_err("%s: unrecognised CSD structure version %d\n",
6da24b78 158 mmc_hostname(card->host), csd->structure);
bd766312 159 return -EINVAL;
7ea239d9
PO
160 }
161
162 csd->mmca_vsn = UNSTUFF_BITS(resp, 122, 4);
163 m = UNSTUFF_BITS(resp, 115, 4);
164 e = UNSTUFF_BITS(resp, 112, 3);
165 csd->tacc_ns = (tacc_exp[e] * tacc_mant[m] + 9) / 10;
166 csd->tacc_clks = UNSTUFF_BITS(resp, 104, 8) * 100;
167
168 m = UNSTUFF_BITS(resp, 99, 4);
169 e = UNSTUFF_BITS(resp, 96, 3);
170 csd->max_dtr = tran_exp[e] * tran_mant[m];
171 csd->cmdclass = UNSTUFF_BITS(resp, 84, 12);
172
173 e = UNSTUFF_BITS(resp, 47, 3);
174 m = UNSTUFF_BITS(resp, 62, 12);
175 csd->capacity = (1 + m) << (e + 2);
176
177 csd->read_blkbits = UNSTUFF_BITS(resp, 80, 4);
178 csd->read_partial = UNSTUFF_BITS(resp, 79, 1);
179 csd->write_misalign = UNSTUFF_BITS(resp, 78, 1);
180 csd->read_misalign = UNSTUFF_BITS(resp, 77, 1);
3d705d14 181 csd->dsr_imp = UNSTUFF_BITS(resp, 76, 1);
7ea239d9
PO
182 csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3);
183 csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4);
184 csd->write_partial = UNSTUFF_BITS(resp, 21, 1);
bd766312 185
dfe86cba
AH
186 if (csd->write_blkbits >= 9) {
187 a = UNSTUFF_BITS(resp, 42, 5);
188 b = UNSTUFF_BITS(resp, 37, 5);
189 csd->erase_size = (a + 1) * (b + 1);
190 csd->erase_size <<= csd->write_blkbits - 9;
191 }
192
bd766312 193 return 0;
7ea239d9
PO
194}
195
96cf5f02
SJ
196static void mmc_select_card_type(struct mmc_card *card)
197{
198 struct mmc_host *host = card->host;
0a5b6438 199 u8 card_type = card->ext_csd.raw_card_type;
5f1a4dd0 200 u32 caps = host->caps, caps2 = host->caps2;
577fb131 201 unsigned int hs_max_dtr = 0, hs200_max_dtr = 0;
2415c0ef 202 unsigned int avail_type = 0;
96cf5f02 203
2415c0ef
SJ
204 if (caps & MMC_CAP_MMC_HIGHSPEED &&
205 card_type & EXT_CSD_CARD_TYPE_HS_26) {
96cf5f02 206 hs_max_dtr = MMC_HIGH_26_MAX_DTR;
2415c0ef
SJ
207 avail_type |= EXT_CSD_CARD_TYPE_HS_26;
208 }
96cf5f02
SJ
209
210 if (caps & MMC_CAP_MMC_HIGHSPEED &&
2415c0ef 211 card_type & EXT_CSD_CARD_TYPE_HS_52) {
96cf5f02 212 hs_max_dtr = MMC_HIGH_52_MAX_DTR;
2415c0ef
SJ
213 avail_type |= EXT_CSD_CARD_TYPE_HS_52;
214 }
96cf5f02 215
20f921bb 216 if (caps & (MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR) &&
2415c0ef 217 card_type & EXT_CSD_CARD_TYPE_DDR_1_8V) {
96cf5f02 218 hs_max_dtr = MMC_HIGH_DDR_MAX_DTR;
2415c0ef
SJ
219 avail_type |= EXT_CSD_CARD_TYPE_DDR_1_8V;
220 }
221
222 if (caps & MMC_CAP_1_2V_DDR &&
223 card_type & EXT_CSD_CARD_TYPE_DDR_1_2V) {
224 hs_max_dtr = MMC_HIGH_DDR_MAX_DTR;
225 avail_type |= EXT_CSD_CARD_TYPE_DDR_1_2V;
226 }
96cf5f02 227
2415c0ef
SJ
228 if (caps2 & MMC_CAP2_HS200_1_8V_SDR &&
229 card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) {
577fb131 230 hs200_max_dtr = MMC_HS200_MAX_DTR;
2415c0ef
SJ
231 avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V;
232 }
233
234 if (caps2 & MMC_CAP2_HS200_1_2V_SDR &&
235 card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) {
577fb131 236 hs200_max_dtr = MMC_HS200_MAX_DTR;
2415c0ef
SJ
237 avail_type |= EXT_CSD_CARD_TYPE_HS200_1_2V;
238 }
96cf5f02 239
0a5b6438
SJ
240 if (caps2 & MMC_CAP2_HS400_1_8V &&
241 card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) {
242 hs200_max_dtr = MMC_HS200_MAX_DTR;
243 avail_type |= EXT_CSD_CARD_TYPE_HS400_1_8V;
244 }
245
246 if (caps2 & MMC_CAP2_HS400_1_2V &&
247 card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) {
248 hs200_max_dtr = MMC_HS200_MAX_DTR;
249 avail_type |= EXT_CSD_CARD_TYPE_HS400_1_2V;
250 }
251
81ac2af6
SL
252 if ((caps2 & MMC_CAP2_HS400_ES) &&
253 card->ext_csd.strobe_support &&
254 (avail_type & EXT_CSD_CARD_TYPE_HS400))
255 avail_type |= EXT_CSD_CARD_TYPE_HS400ES;
256
96cf5f02 257 card->ext_csd.hs_max_dtr = hs_max_dtr;
577fb131 258 card->ext_csd.hs200_max_dtr = hs200_max_dtr;
2415c0ef 259 card->mmc_avail_type = avail_type;
96cf5f02
SJ
260}
261
b4493eea
GS
262static void mmc_manage_enhanced_area(struct mmc_card *card, u8 *ext_csd)
263{
994324bb
GS
264 u8 hc_erase_grp_sz, hc_wp_grp_sz;
265
266 /*
267 * Disable these attributes by default
268 */
269 card->ext_csd.enhanced_area_offset = -EINVAL;
270 card->ext_csd.enhanced_area_size = -EINVAL;
b4493eea
GS
271
272 /*
273 * Enhanced area feature support -- check whether the eMMC
274 * card has the Enhanced area enabled. If so, export enhanced
275 * area offset and size to user by adding sysfs interface.
276 */
277 if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) &&
278 (ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) {
994324bb
GS
279 if (card->ext_csd.partition_setting_completed) {
280 hc_erase_grp_sz =
281 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
282 hc_wp_grp_sz =
283 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
b4493eea 284
994324bb
GS
285 /*
286 * calculate the enhanced data area offset, in bytes
287 */
288 card->ext_csd.enhanced_area_offset =
ded8a5f9
KM
289 (((unsigned long long)ext_csd[139]) << 24) +
290 (((unsigned long long)ext_csd[138]) << 16) +
291 (((unsigned long long)ext_csd[137]) << 8) +
292 (((unsigned long long)ext_csd[136]));
994324bb
GS
293 if (mmc_card_blockaddr(card))
294 card->ext_csd.enhanced_area_offset <<= 9;
295 /*
296 * calculate the enhanced data area size, in kilobytes
297 */
298 card->ext_csd.enhanced_area_size =
299 (ext_csd[142] << 16) + (ext_csd[141] << 8) +
300 ext_csd[140];
301 card->ext_csd.enhanced_area_size *=
302 (size_t)(hc_erase_grp_sz * hc_wp_grp_sz);
303 card->ext_csd.enhanced_area_size <<= 9;
304 } else {
305 pr_warn("%s: defines enhanced area without partition setting complete\n",
306 mmc_hostname(card->host));
307 }
b4493eea
GS
308 }
309}
310
4facdde1
UH
311static void mmc_part_add(struct mmc_card *card, unsigned int size,
312 unsigned int part_cfg, char *name, int idx, bool ro,
313 int area_type)
314{
315 card->part[card->nr_parts].size = size;
316 card->part[card->nr_parts].part_cfg = part_cfg;
317 sprintf(card->part[card->nr_parts].name, name, idx);
318 card->part[card->nr_parts].force_ro = ro;
319 card->part[card->nr_parts].area_type = area_type;
320 card->nr_parts++;
321}
322
b4493eea
GS
323static void mmc_manage_gp_partitions(struct mmc_card *card, u8 *ext_csd)
324{
b4493eea 325 int idx;
994324bb
GS
326 u8 hc_erase_grp_sz, hc_wp_grp_sz;
327 unsigned int part_size;
b4493eea
GS
328
329 /*
330 * General purpose partition feature support --
331 * If ext_csd has the size of general purpose partitions,
332 * set size, part_cfg, partition name in mmc_part.
333 */
334 if (ext_csd[EXT_CSD_PARTITION_SUPPORT] &
335 EXT_CSD_PART_SUPPORT_PART_EN) {
994324bb
GS
336 hc_erase_grp_sz =
337 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
338 hc_wp_grp_sz =
339 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
b4493eea
GS
340
341 for (idx = 0; idx < MMC_NUM_GP_PARTITION; idx++) {
342 if (!ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3] &&
343 !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] &&
344 !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2])
345 continue;
994324bb
GS
346 if (card->ext_csd.partition_setting_completed == 0) {
347 pr_warn("%s: has partition size defined without partition complete\n",
348 mmc_hostname(card->host));
349 break;
350 }
b4493eea
GS
351 part_size =
352 (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2]
353 << 16) +
354 (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1]
355 << 8) +
356 ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3];
357 part_size *= (size_t)(hc_erase_grp_sz *
358 hc_wp_grp_sz);
359 mmc_part_add(card, part_size << 19,
360 EXT_CSD_PART_CONFIG_ACC_GP0 + idx,
361 "gp%d", idx, false,
362 MMC_BLK_DATA_AREA_GP);
363 }
364 }
365}
366
1c447116
AH
367/* Minimum partition switch timeout in milliseconds */
368#define MMC_MIN_PART_SWITCH_TIME 300
369
08ee80cc
PR
370/*
371 * Decode extended CSD.
372 */
076ec38a 373static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
08ee80cc 374{
e0c368d5
NJ
375 int err = 0, idx;
376 unsigned int part_size;
81f8a7be
HG
377 struct device_node *np;
378 bool broken_hpi = false;
08ee80cc 379
6da24b78 380 /* Version is coded in the CSD_STRUCTURE byte in the EXT_CSD register */
f39b2dd9 381 card->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE];
6da24b78 382 if (card->csd.structure == 3) {
f39b2dd9 383 if (card->ext_csd.raw_ext_csd_structure > 2) {
a3c76eb9 384 pr_err("%s: unrecognised EXT_CSD structure "
6da24b78 385 "version %d\n", mmc_hostname(card->host),
f39b2dd9 386 card->ext_csd.raw_ext_csd_structure);
6da24b78
KP
387 err = -EINVAL;
388 goto out;
389 }
390 }
391
81f8a7be
HG
392 np = mmc_of_find_child_device(card->host, 0);
393 if (np && of_device_is_compatible(np, "mmc-card"))
394 broken_hpi = of_property_read_bool(np, "broken-hpi");
395 of_node_put(np);
396
03a59437
RI
397 /*
398 * The EXT_CSD format is meant to be forward compatible. As long
399 * as CSD_STRUCTURE does not change, all values for EXT_CSD_REV
400 * are authorized, see JEDEC JESD84-B50 section B.8.
401 */
b1ebe384 402 card->ext_csd.rev = ext_csd[EXT_CSD_REV];
d7604d76 403
5320226a
P
404 /* fixup device after ext_csd revision field is updated */
405 mmc_fixup_device(card, mmc_ext_csd_fixups);
406
f39b2dd9
PR
407 card->ext_csd.raw_sectors[0] = ext_csd[EXT_CSD_SEC_CNT + 0];
408 card->ext_csd.raw_sectors[1] = ext_csd[EXT_CSD_SEC_CNT + 1];
409 card->ext_csd.raw_sectors[2] = ext_csd[EXT_CSD_SEC_CNT + 2];
410 card->ext_csd.raw_sectors[3] = ext_csd[EXT_CSD_SEC_CNT + 3];
b1ebe384 411 if (card->ext_csd.rev >= 2) {
d7604d76
PO
412 card->ext_csd.sectors =
413 ext_csd[EXT_CSD_SEC_CNT + 0] << 0 |
414 ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
415 ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
416 ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
fc8a0985
HP
417
418 /* Cards with density > 2GiB are sector addressed */
419 if (card->ext_csd.sectors > (2u * 1024 * 1024 * 1024) / 512)
d7604d76
PO
420 mmc_card_set_blockaddr(card);
421 }
96cf5f02 422
81ac2af6 423 card->ext_csd.strobe_support = ext_csd[EXT_CSD_STROBE_SUPPORT];
f39b2dd9 424 card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
96cf5f02 425 mmc_select_card_type(card);
7ea239d9 426
f39b2dd9
PR
427 card->ext_csd.raw_s_a_timeout = ext_csd[EXT_CSD_S_A_TIMEOUT];
428 card->ext_csd.raw_erase_timeout_mult =
429 ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT];
430 card->ext_csd.raw_hc_erase_grp_size =
431 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
b1ebe384
JL
432 if (card->ext_csd.rev >= 3) {
433 u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT];
371a689f
AW
434 card->ext_csd.part_config = ext_csd[EXT_CSD_PART_CONFIG];
435
436 /* EXT_CSD value is in units of 10ms, but we store in ms */
437 card->ext_csd.part_time = 10 * ext_csd[EXT_CSD_PART_SWITCH_TIME];
1c447116
AH
438 /* Some eMMC set the value too low so set a minimum */
439 if (card->ext_csd.part_time &&
440 card->ext_csd.part_time < MMC_MIN_PART_SWITCH_TIME)
441 card->ext_csd.part_time = MMC_MIN_PART_SWITCH_TIME;
b1ebe384
JL
442
443 /* Sleep / awake timeout in 100ns units */
444 if (sa_shift > 0 && sa_shift <= 0x17)
445 card->ext_csd.sa_timeout =
446 1 << ext_csd[EXT_CSD_S_A_TIMEOUT];
dfe86cba
AH
447 card->ext_csd.erase_group_def =
448 ext_csd[EXT_CSD_ERASE_GROUP_DEF];
449 card->ext_csd.hc_erase_timeout = 300 *
450 ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT];
451 card->ext_csd.hc_erase_size =
452 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] << 10;
f4c5522b
AW
453
454 card->ext_csd.rel_sectors = ext_csd[EXT_CSD_REL_WR_SEC_C];
371a689f
AW
455
456 /*
457 * There are two boot regions of equal size, defined in
458 * multiples of 128K.
459 */
e0c368d5
NJ
460 if (ext_csd[EXT_CSD_BOOT_MULT] && mmc_boot_partition_access(card->host)) {
461 for (idx = 0; idx < MMC_NUM_BOOT_PARTITION; idx++) {
462 part_size = ext_csd[EXT_CSD_BOOT_MULT] << 17;
463 mmc_part_add(card, part_size,
464 EXT_CSD_PART_CONFIG_ACC_BOOT0 + idx,
add710ea
JR
465 "boot%d", idx, true,
466 MMC_BLK_DATA_AREA_BOOT);
e0c368d5
NJ
467 }
468 }
dfe86cba
AH
469 }
470
f39b2dd9 471 card->ext_csd.raw_hc_erase_gap_size =
dd13b4ed 472 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
f39b2dd9
PR
473 card->ext_csd.raw_sec_trim_mult =
474 ext_csd[EXT_CSD_SEC_TRIM_MULT];
475 card->ext_csd.raw_sec_erase_mult =
476 ext_csd[EXT_CSD_SEC_ERASE_MULT];
477 card->ext_csd.raw_sec_feature_support =
478 ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
479 card->ext_csd.raw_trim_mult =
480 ext_csd[EXT_CSD_TRIM_MULT];
836dc2fe 481 card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT];
b097e07f 482 card->ext_csd.raw_driver_strength = ext_csd[EXT_CSD_DRIVER_STRENGTH];
dfe86cba 483 if (card->ext_csd.rev >= 4) {
69803d4f
GS
484 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED] &
485 EXT_CSD_PART_SETTING_COMPLETED)
486 card->ext_csd.partition_setting_completed = 1;
487 else
488 card->ext_csd.partition_setting_completed = 0;
489
b4493eea 490 mmc_manage_enhanced_area(card, ext_csd);
709de99d 491
b4493eea 492 mmc_manage_gp_partitions(card, ext_csd);
e0c368d5 493
dfe86cba
AH
494 card->ext_csd.sec_trim_mult =
495 ext_csd[EXT_CSD_SEC_TRIM_MULT];
496 card->ext_csd.sec_erase_mult =
497 ext_csd[EXT_CSD_SEC_ERASE_MULT];
498 card->ext_csd.sec_feature_support =
499 ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
500 card->ext_csd.trim_timeout = 300 *
501 ext_csd[EXT_CSD_TRIM_MULT];
add710ea
JR
502
503 /*
504 * Note that the call to mmc_part_add above defaults to read
505 * only. If this default assumption is changed, the call must
506 * take into account the value of boot_locked below.
507 */
508 card->ext_csd.boot_ro_lock = ext_csd[EXT_CSD_BOOT_WP];
509 card->ext_csd.boot_ro_lockable = true;
60443712
FS
510
511 /* Save power class values */
512 card->ext_csd.raw_pwr_cl_52_195 =
513 ext_csd[EXT_CSD_PWR_CL_52_195];
514 card->ext_csd.raw_pwr_cl_26_195 =
515 ext_csd[EXT_CSD_PWR_CL_26_195];
516 card->ext_csd.raw_pwr_cl_52_360 =
517 ext_csd[EXT_CSD_PWR_CL_52_360];
518 card->ext_csd.raw_pwr_cl_26_360 =
519 ext_csd[EXT_CSD_PWR_CL_26_360];
520 card->ext_csd.raw_pwr_cl_200_195 =
521 ext_csd[EXT_CSD_PWR_CL_200_195];
522 card->ext_csd.raw_pwr_cl_200_360 =
523 ext_csd[EXT_CSD_PWR_CL_200_360];
524 card->ext_csd.raw_pwr_cl_ddr_52_195 =
525 ext_csd[EXT_CSD_PWR_CL_DDR_52_195];
526 card->ext_csd.raw_pwr_cl_ddr_52_360 =
527 ext_csd[EXT_CSD_PWR_CL_DDR_52_360];
0a5b6438
SJ
528 card->ext_csd.raw_pwr_cl_ddr_200_360 =
529 ext_csd[EXT_CSD_PWR_CL_DDR_200_360];
b1ebe384
JL
530 }
531
b2499518 532 if (card->ext_csd.rev >= 5) {
7c4f10ac
RI
533 /* Adjust production date as per JEDEC JESD84-B451 */
534 if (card->cid.year < 2010)
535 card->cid.year += 16;
536
950d56ac 537 /* check whether the eMMC card supports BKOPS */
5320226a
P
538 if (!mmc_card_broken_hpi(card) &&
539 ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1) {
950d56ac 540 card->ext_csd.bkops = 1;
0501be64
AS
541 card->ext_csd.man_bkops_en =
542 (ext_csd[EXT_CSD_BKOPS_EN] &
543 EXT_CSD_MANUAL_BKOPS_MASK);
950d56ac
JC
544 card->ext_csd.raw_bkops_status =
545 ext_csd[EXT_CSD_BKOPS_STATUS];
0501be64 546 if (!card->ext_csd.man_bkops_en)
4ec96b4c 547 pr_debug("%s: MAN_BKOPS_EN bit is not set\n",
950d56ac
JC
548 mmc_hostname(card->host));
549 }
550
eb0d8f13 551 /* check whether the eMMC card supports HPI */
5320226a
P
552 if (!mmc_card_broken_hpi(card) &&
553 !broken_hpi && (ext_csd[EXT_CSD_HPI_FEATURES] & 0x1)) {
eb0d8f13
JC
554 card->ext_csd.hpi = 1;
555 if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x2)
556 card->ext_csd.hpi_cmd = MMC_STOP_TRANSMISSION;
557 else
558 card->ext_csd.hpi_cmd = MMC_SEND_STATUS;
559 /*
560 * Indicate the maximum timeout to close
561 * a command interrupted by HPI
562 */
563 card->ext_csd.out_of_int_time =
564 ext_csd[EXT_CSD_OUT_OF_INTERRUPT_TIME] * 10;
565 }
566
f4c5522b 567 card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
b2499518 568 card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
090d25fe
LP
569
570 /*
571 * RPMB regions are defined in multiples of 128K.
572 */
573 card->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT];
d0123cca 574 if (ext_csd[EXT_CSD_RPMB_MULT] && mmc_host_cmd23(card->host)) {
090d25fe
LP
575 mmc_part_add(card, ext_csd[EXT_CSD_RPMB_MULT] << 17,
576 EXT_CSD_PART_CONFIG_ACC_RPMB,
577 "rpmb", 0, false,
578 MMC_BLK_DATA_AREA_RPMB);
579 }
b2499518 580 }
f4c5522b 581
5238acbe 582 card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT];
dfe86cba
AH
583 if (ext_csd[EXT_CSD_ERASED_MEM_CONT])
584 card->erased_byte = 0xFF;
585 else
586 card->erased_byte = 0x0;
587
336c716a 588 /* eMMC v4.5 or later */
fe1b5700 589 card->ext_csd.generic_cmd6_time = DEFAULT_CMD6_TIMEOUT_MS;
bec8726a 590 if (card->ext_csd.rev >= 6) {
336c716a
SJ
591 card->ext_csd.feature_support |= MMC_DISCARD_FEATURE;
592
b23cf0bd
SJ
593 card->ext_csd.generic_cmd6_time = 10 *
594 ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
bec8726a
G
595 card->ext_csd.power_off_longtime = 10 *
596 ext_csd[EXT_CSD_POWER_OFF_LONG_TIME];
b23cf0bd 597
336c716a
SJ
598 card->ext_csd.cache_size =
599 ext_csd[EXT_CSD_CACHE_SIZE + 0] << 0 |
600 ext_csd[EXT_CSD_CACHE_SIZE + 1] << 8 |
601 ext_csd[EXT_CSD_CACHE_SIZE + 2] << 16 |
602 ext_csd[EXT_CSD_CACHE_SIZE + 3] << 24;
4265900e
SD
603
604 if (ext_csd[EXT_CSD_DATA_SECTOR_SIZE] == 1)
605 card->ext_csd.data_sector_size = 4096;
606 else
607 card->ext_csd.data_sector_size = 512;
608
609 if ((ext_csd[EXT_CSD_DATA_TAG_SUPPORT] & 1) &&
610 (ext_csd[EXT_CSD_TAG_UNIT_SIZE] <= 8)) {
611 card->ext_csd.data_tag_unit_size =
612 ((unsigned int) 1 << ext_csd[EXT_CSD_TAG_UNIT_SIZE]) *
613 (card->ext_csd.data_sector_size);
614 } else {
615 card->ext_csd.data_tag_unit_size = 0;
616 }
abd9ac14
SJ
617
618 card->ext_csd.max_packed_writes =
619 ext_csd[EXT_CSD_MAX_PACKED_WRITES];
620 card->ext_csd.max_packed_reads =
621 ext_csd[EXT_CSD_MAX_PACKED_READS];
a5075eb9
SD
622 } else {
623 card->ext_csd.data_sector_size = 512;
336c716a 624 }
881d1c25 625
0f762426
GG
626 /* eMMC v5 or later */
627 if (card->ext_csd.rev >= 7) {
628 memcpy(card->ext_csd.fwrev, &ext_csd[EXT_CSD_FIRMWARE_VERSION],
629 MMC_FIRMWARE_LEN);
630 card->ext_csd.ffu_capable =
631 (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
632 !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
46bc5c40
JL
633
634 card->ext_csd.pre_eol_info = ext_csd[EXT_CSD_PRE_EOL_INFO];
635 card->ext_csd.device_life_time_est_typ_a =
636 ext_csd[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A];
637 card->ext_csd.device_life_time_est_typ_b =
638 ext_csd[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B];
0f762426 639 }
925ff3a7
AH
640
641 /* eMMC v5.1 or later */
642 if (card->ext_csd.rev >= 8) {
643 card->ext_csd.cmdq_support = ext_csd[EXT_CSD_CMDQ_SUPPORT] &
644 EXT_CSD_CMDQ_SUPPORTED;
645 card->ext_csd.cmdq_depth = (ext_csd[EXT_CSD_CMDQ_DEPTH] &
646 EXT_CSD_CMDQ_DEPTH_MASK) + 1;
647 /* Exclude inefficiently small queue depths */
648 if (card->ext_csd.cmdq_depth <= 2) {
649 card->ext_csd.cmdq_support = false;
650 card->ext_csd.cmdq_depth = 0;
651 }
652 if (card->ext_csd.cmdq_support) {
653 pr_debug("%s: Command Queue supported depth %u\n",
654 mmc_hostname(card->host),
655 card->ext_csd.cmdq_depth);
656 }
657 }
7ea239d9 658out:
08ee80cc
PR
659 return err;
660}
661
076ec38a
UH
662static int mmc_read_ext_csd(struct mmc_card *card)
663{
c197787c 664 u8 *ext_csd;
076ec38a
UH
665 int err;
666
c197787c
UH
667 if (!mmc_can_ext_csd(card))
668 return 0;
669
076ec38a 670 err = mmc_get_ext_csd(card, &ext_csd);
c197787c
UH
671 if (err) {
672 /* If the host or the card can't do the switch,
673 * fail more gracefully. */
674 if ((err != -EINVAL)
675 && (err != -ENOSYS)
676 && (err != -EFAULT))
677 return err;
678
679 /*
680 * High capacity cards should have this "magic" size
681 * stored in their CSD.
682 */
683 if (card->csd.capacity == (4096 * 512)) {
684 pr_err("%s: unable to read EXT_CSD on a possible high capacity card. Card will be ignored.\n",
685 mmc_hostname(card->host));
686 } else {
687 pr_warn("%s: unable to read EXT_CSD, performance might suffer\n",
688 mmc_hostname(card->host));
689 err = 0;
690 }
691
076ec38a 692 return err;
c197787c 693 }
076ec38a
UH
694
695 err = mmc_decode_ext_csd(card, ext_csd);
696 kfree(ext_csd);
697 return err;
698}
699
f39b2dd9 700static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)
08ee80cc
PR
701{
702 u8 *bw_ext_csd;
703 int err;
704
f39b2dd9
PR
705 if (bus_width == MMC_BUS_WIDTH_1)
706 return 0;
707
08ee80cc 708 err = mmc_get_ext_csd(card, &bw_ext_csd);
c197787c
UH
709 if (err)
710 return err;
08ee80cc 711
08ee80cc 712 /* only compare read only fields */
dd13b4ed 713 err = !((card->ext_csd.raw_partition_support ==
08ee80cc 714 bw_ext_csd[EXT_CSD_PARTITION_SUPPORT]) &&
f39b2dd9 715 (card->ext_csd.raw_erased_mem_count ==
08ee80cc 716 bw_ext_csd[EXT_CSD_ERASED_MEM_CONT]) &&
f39b2dd9 717 (card->ext_csd.rev ==
08ee80cc 718 bw_ext_csd[EXT_CSD_REV]) &&
f39b2dd9 719 (card->ext_csd.raw_ext_csd_structure ==
08ee80cc 720 bw_ext_csd[EXT_CSD_STRUCTURE]) &&
f39b2dd9 721 (card->ext_csd.raw_card_type ==
08ee80cc 722 bw_ext_csd[EXT_CSD_CARD_TYPE]) &&
f39b2dd9 723 (card->ext_csd.raw_s_a_timeout ==
08ee80cc 724 bw_ext_csd[EXT_CSD_S_A_TIMEOUT]) &&
f39b2dd9 725 (card->ext_csd.raw_hc_erase_gap_size ==
08ee80cc 726 bw_ext_csd[EXT_CSD_HC_WP_GRP_SIZE]) &&
f39b2dd9 727 (card->ext_csd.raw_erase_timeout_mult ==
08ee80cc 728 bw_ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]) &&
f39b2dd9 729 (card->ext_csd.raw_hc_erase_grp_size ==
08ee80cc 730 bw_ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) &&
f39b2dd9 731 (card->ext_csd.raw_sec_trim_mult ==
08ee80cc 732 bw_ext_csd[EXT_CSD_SEC_TRIM_MULT]) &&
f39b2dd9 733 (card->ext_csd.raw_sec_erase_mult ==
08ee80cc 734 bw_ext_csd[EXT_CSD_SEC_ERASE_MULT]) &&
f39b2dd9 735 (card->ext_csd.raw_sec_feature_support ==
08ee80cc 736 bw_ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT]) &&
f39b2dd9 737 (card->ext_csd.raw_trim_mult ==
08ee80cc 738 bw_ext_csd[EXT_CSD_TRIM_MULT]) &&
f39b2dd9
PR
739 (card->ext_csd.raw_sectors[0] ==
740 bw_ext_csd[EXT_CSD_SEC_CNT + 0]) &&
741 (card->ext_csd.raw_sectors[1] ==
742 bw_ext_csd[EXT_CSD_SEC_CNT + 1]) &&
743 (card->ext_csd.raw_sectors[2] ==
744 bw_ext_csd[EXT_CSD_SEC_CNT + 2]) &&
745 (card->ext_csd.raw_sectors[3] ==
60443712
FS
746 bw_ext_csd[EXT_CSD_SEC_CNT + 3]) &&
747 (card->ext_csd.raw_pwr_cl_52_195 ==
748 bw_ext_csd[EXT_CSD_PWR_CL_52_195]) &&
749 (card->ext_csd.raw_pwr_cl_26_195 ==
750 bw_ext_csd[EXT_CSD_PWR_CL_26_195]) &&
751 (card->ext_csd.raw_pwr_cl_52_360 ==
752 bw_ext_csd[EXT_CSD_PWR_CL_52_360]) &&
753 (card->ext_csd.raw_pwr_cl_26_360 ==
754 bw_ext_csd[EXT_CSD_PWR_CL_26_360]) &&
755 (card->ext_csd.raw_pwr_cl_200_195 ==
756 bw_ext_csd[EXT_CSD_PWR_CL_200_195]) &&
757 (card->ext_csd.raw_pwr_cl_200_360 ==
758 bw_ext_csd[EXT_CSD_PWR_CL_200_360]) &&
759 (card->ext_csd.raw_pwr_cl_ddr_52_195 ==
760 bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_195]) &&
761 (card->ext_csd.raw_pwr_cl_ddr_52_360 ==
0a5b6438
SJ
762 bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_360]) &&
763 (card->ext_csd.raw_pwr_cl_ddr_200_360 ==
764 bw_ext_csd[EXT_CSD_PWR_CL_DDR_200_360]));
765
08ee80cc
PR
766 if (err)
767 err = -EINVAL;
768
00b41b58 769 kfree(bw_ext_csd);
7ea239d9
PO
770 return err;
771}
772
51ec92e2
PO
773MMC_DEV_ATTR(cid, "%08x%08x%08x%08x\n", card->raw_cid[0], card->raw_cid[1],
774 card->raw_cid[2], card->raw_cid[3]);
775MMC_DEV_ATTR(csd, "%08x%08x%08x%08x\n", card->raw_csd[0], card->raw_csd[1],
776 card->raw_csd[2], card->raw_csd[3]);
777MMC_DEV_ATTR(date, "%02d/%04d\n", card->cid.month, card->cid.year);
dfe86cba
AH
778MMC_DEV_ATTR(erase_size, "%u\n", card->erase_size << 9);
779MMC_DEV_ATTR(preferred_erase_size, "%u\n", card->pref_erase << 9);
0f762426 780MMC_DEV_ATTR(ffu_capable, "%d\n", card->ext_csd.ffu_capable);
51ec92e2
PO
781MMC_DEV_ATTR(hwrev, "0x%x\n", card->cid.hwrev);
782MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid);
783MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name);
784MMC_DEV_ATTR(oemid, "0x%04x\n", card->cid.oemid);
51e7e8b6 785MMC_DEV_ATTR(prv, "0x%x\n", card->cid.prv);
46bc5c40
JL
786MMC_DEV_ATTR(pre_eol_info, "%02x\n", card->ext_csd.pre_eol_info);
787MMC_DEV_ATTR(life_time, "0x%02x 0x%02x\n",
788 card->ext_csd.device_life_time_est_typ_a,
789 card->ext_csd.device_life_time_est_typ_b);
51ec92e2 790MMC_DEV_ATTR(serial, "0x%08x\n", card->cid.serial);
709de99d
CD
791MMC_DEV_ATTR(enhanced_area_offset, "%llu\n",
792 card->ext_csd.enhanced_area_offset);
793MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size);
188cc042
LP
794MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult);
795MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors);
5fb06af7 796MMC_DEV_ATTR(ocr, "%08x\n", card->ocr);
51ec92e2 797
0f762426
GG
798static ssize_t mmc_fwrev_show(struct device *dev,
799 struct device_attribute *attr,
800 char *buf)
801{
802 struct mmc_card *card = mmc_dev_to_card(dev);
803
804 if (card->ext_csd.rev < 7) {
805 return sprintf(buf, "0x%x\n", card->cid.fwrev);
806 } else {
807 return sprintf(buf, "0x%*phN\n", MMC_FIRMWARE_LEN,
808 card->ext_csd.fwrev);
809 }
810}
811
812static DEVICE_ATTR(fwrev, S_IRUGO, mmc_fwrev_show, NULL);
813
6825a606
BP
814static ssize_t mmc_dsr_show(struct device *dev,
815 struct device_attribute *attr,
816 char *buf)
817{
818 struct mmc_card *card = mmc_dev_to_card(dev);
819 struct mmc_host *host = card->host;
820
821 if (card->csd.dsr_imp && host->dsr_req)
822 return sprintf(buf, "0x%x\n", host->dsr);
823 else
824 /* return default DSR value */
825 return sprintf(buf, "0x%x\n", 0x404);
826}
827
828static DEVICE_ATTR(dsr, S_IRUGO, mmc_dsr_show, NULL);
829
51ec92e2
PO
830static struct attribute *mmc_std_attrs[] = {
831 &dev_attr_cid.attr,
832 &dev_attr_csd.attr,
833 &dev_attr_date.attr,
dfe86cba
AH
834 &dev_attr_erase_size.attr,
835 &dev_attr_preferred_erase_size.attr,
51ec92e2 836 &dev_attr_fwrev.attr,
0f762426 837 &dev_attr_ffu_capable.attr,
51ec92e2
PO
838 &dev_attr_hwrev.attr,
839 &dev_attr_manfid.attr,
840 &dev_attr_name.attr,
841 &dev_attr_oemid.attr,
51e7e8b6 842 &dev_attr_prv.attr,
46bc5c40
JL
843 &dev_attr_pre_eol_info.attr,
844 &dev_attr_life_time.attr,
51ec92e2 845 &dev_attr_serial.attr,
709de99d
CD
846 &dev_attr_enhanced_area_offset.attr,
847 &dev_attr_enhanced_area_size.attr,
188cc042
LP
848 &dev_attr_raw_rpmb_size_mult.attr,
849 &dev_attr_rel_sectors.attr,
5fb06af7 850 &dev_attr_ocr.attr,
6825a606 851 &dev_attr_dsr.attr,
51ec92e2
PO
852 NULL,
853};
d1e58212 854ATTRIBUTE_GROUPS(mmc_std);
51ec92e2
PO
855
856static struct device_type mmc_type = {
d1e58212 857 .groups = mmc_std_groups,
51ec92e2
PO
858};
859
b87d8dbf
G
860/*
861 * Select the PowerClass for the current bus width
862 * If power class is defined for 4/8 bit bus in the
863 * extended CSD register, select it by executing the
864 * mmc_switch command.
865 */
2385049d
SJ
866static int __mmc_select_powerclass(struct mmc_card *card,
867 unsigned int bus_width)
b87d8dbf 868{
2385049d
SJ
869 struct mmc_host *host = card->host;
870 struct mmc_ext_csd *ext_csd = &card->ext_csd;
60443712 871 unsigned int pwrclass_val = 0;
2385049d 872 int err = 0;
b87d8dbf 873
b87d8dbf
G
874 switch (1 << host->ios.vdd) {
875 case MMC_VDD_165_195:
2385049d
SJ
876 if (host->ios.clock <= MMC_HIGH_26_MAX_DTR)
877 pwrclass_val = ext_csd->raw_pwr_cl_26_195;
878 else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR)
60443712 879 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
2385049d
SJ
880 ext_csd->raw_pwr_cl_52_195 :
881 ext_csd->raw_pwr_cl_ddr_52_195;
882 else if (host->ios.clock <= MMC_HS200_MAX_DTR)
883 pwrclass_val = ext_csd->raw_pwr_cl_200_195;
b87d8dbf 884 break;
93fc5a47
SJ
885 case MMC_VDD_27_28:
886 case MMC_VDD_28_29:
887 case MMC_VDD_29_30:
888 case MMC_VDD_30_31:
889 case MMC_VDD_31_32:
b87d8dbf
G
890 case MMC_VDD_32_33:
891 case MMC_VDD_33_34:
892 case MMC_VDD_34_35:
893 case MMC_VDD_35_36:
2385049d
SJ
894 if (host->ios.clock <= MMC_HIGH_26_MAX_DTR)
895 pwrclass_val = ext_csd->raw_pwr_cl_26_360;
896 else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR)
60443712 897 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
2385049d
SJ
898 ext_csd->raw_pwr_cl_52_360 :
899 ext_csd->raw_pwr_cl_ddr_52_360;
900 else if (host->ios.clock <= MMC_HS200_MAX_DTR)
0a5b6438
SJ
901 pwrclass_val = (bus_width == EXT_CSD_DDR_BUS_WIDTH_8) ?
902 ext_csd->raw_pwr_cl_ddr_200_360 :
903 ext_csd->raw_pwr_cl_200_360;
b87d8dbf
G
904 break;
905 default:
6606110d
JP
906 pr_warn("%s: Voltage range not supported for power class\n",
907 mmc_hostname(host));
b87d8dbf
G
908 return -EINVAL;
909 }
910
b87d8dbf
G
911 if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8))
912 pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_8BIT_MASK) >>
913 EXT_CSD_PWR_CL_8BIT_SHIFT;
914 else
915 pwrclass_val = (pwrclass_val & EXT_CSD_PWR_CL_4BIT_MASK) >>
916 EXT_CSD_PWR_CL_4BIT_SHIFT;
917
918 /* If the power class is different from the default value */
919 if (pwrclass_val > 0) {
920 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
921 EXT_CSD_POWER_CLASS,
922 pwrclass_val,
71fe3eb0 923 card->ext_csd.generic_cmd6_time);
b87d8dbf
G
924 }
925
926 return err;
927}
928
2385049d
SJ
929static int mmc_select_powerclass(struct mmc_card *card)
930{
931 struct mmc_host *host = card->host;
932 u32 bus_width, ext_csd_bits;
933 int err, ddr;
934
935 /* Power class selection is supported for versions >= 4.0 */
148bcab2 936 if (!mmc_can_ext_csd(card))
2385049d
SJ
937 return 0;
938
939 bus_width = host->ios.bus_width;
940 /* Power class values are defined only for 4/8 bit bus */
941 if (bus_width == MMC_BUS_WIDTH_1)
942 return 0;
943
944 ddr = card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_52;
945 if (ddr)
946 ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
947 EXT_CSD_DDR_BUS_WIDTH_8 : EXT_CSD_DDR_BUS_WIDTH_4;
948 else
949 ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
950 EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;
951
952 err = __mmc_select_powerclass(card, ext_csd_bits);
953 if (err)
954 pr_warn("%s: power class selection to bus width %d ddr %d failed\n",
955 mmc_hostname(host), 1 << bus_width, ddr);
956
957 return err;
958}
959
a4924c71 960/*
577fb131 961 * Set the bus speed for the selected speed mode.
a4924c71 962 */
577fb131
SJ
963static void mmc_set_bus_speed(struct mmc_card *card)
964{
965 unsigned int max_dtr = (unsigned int)-1;
966
0a5b6438
SJ
967 if ((mmc_card_hs200(card) || mmc_card_hs400(card)) &&
968 max_dtr > card->ext_csd.hs200_max_dtr)
577fb131
SJ
969 max_dtr = card->ext_csd.hs200_max_dtr;
970 else if (mmc_card_hs(card) && max_dtr > card->ext_csd.hs_max_dtr)
971 max_dtr = card->ext_csd.hs_max_dtr;
972 else if (max_dtr > card->csd.max_dtr)
973 max_dtr = card->csd.max_dtr;
974
975 mmc_set_clock(card->host, max_dtr);
976}
977
978/*
979 * Select the bus width amoung 4-bit and 8-bit(SDR).
980 * If the bus width is changed successfully, return the selected width value.
981 * Zero is returned instead of error value if the wide width is not supported.
982 */
983static int mmc_select_bus_width(struct mmc_card *card)
a4924c71 984{
a4924c71 985 static unsigned ext_csd_bits[] = {
a4924c71 986 EXT_CSD_BUS_WIDTH_8,
577fb131 987 EXT_CSD_BUS_WIDTH_4,
a4924c71
G
988 };
989 static unsigned bus_widths[] = {
a4924c71 990 MMC_BUS_WIDTH_8,
577fb131 991 MMC_BUS_WIDTH_4,
a4924c71 992 };
577fb131
SJ
993 struct mmc_host *host = card->host;
994 unsigned idx, bus_width = 0;
995 int err = 0;
a4924c71 996
1c2d26e3 997 if (!mmc_can_ext_csd(card) ||
577fb131
SJ
998 !(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)))
999 return 0;
a4924c71 1000
577fb131 1001 idx = (host->caps & MMC_CAP_8_BIT_DATA) ? 0 : 1;
a4924c71
G
1002
1003 /*
1004 * Unlike SD, MMC cards dont have a configuration register to notify
1005 * supported bus width. So bus test command should be run to identify
1006 * the supported bus width or compare the ext csd values of current
1007 * bus width and ext csd values of 1 bit mode read earlier.
1008 */
577fb131 1009 for (; idx < ARRAY_SIZE(bus_widths); idx++) {
a4924c71
G
1010 /*
1011 * Host is capable of 8bit transfer, then switch
1012 * the device to work in 8bit transfer mode. If the
1013 * mmc switch command returns error then switch to
1014 * 4bit transfer mode. On success set the corresponding
1015 * bus width on the host.
1016 */
1017 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1018 EXT_CSD_BUS_WIDTH,
1019 ext_csd_bits[idx],
1020 card->ext_csd.generic_cmd6_time);
1021 if (err)
1022 continue;
1023
577fb131
SJ
1024 bus_width = bus_widths[idx];
1025 mmc_set_bus_width(host, bus_width);
a4924c71 1026
577fb131
SJ
1027 /*
1028 * If controller can't handle bus width test,
1029 * compare ext_csd previously read in 1 bit mode
1030 * against ext_csd at new bus width
1031 */
a4924c71 1032 if (!(host->caps & MMC_CAP_BUS_WIDTH_TEST))
577fb131 1033 err = mmc_compare_ext_csds(card, bus_width);
a4924c71 1034 else
577fb131
SJ
1035 err = mmc_bus_test(card, bus_width);
1036
1037 if (!err) {
1038 err = bus_width;
a4924c71 1039 break;
577fb131
SJ
1040 } else {
1041 pr_warn("%s: switch to bus width %d failed\n",
ed9feec7 1042 mmc_hostname(host), 1 << bus_width);
577fb131 1043 }
a4924c71
G
1044 }
1045
577fb131
SJ
1046 return err;
1047}
1048
1049/*
1050 * Switch to the high-speed mode
1051 */
1052static int mmc_select_hs(struct mmc_card *card)
1053{
1054 int err;
1055
1056 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1057 EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS,
53e60650
UH
1058 card->ext_csd.generic_cmd6_time, MMC_TIMING_MMC_HS,
1059 true, true, true);
67d35960
JL
1060 if (err)
1061 pr_warn("%s: switch to high-speed failed, err:%d\n",
1062 mmc_hostname(card->host), err);
1063
577fb131
SJ
1064 return err;
1065}
1066
1067/*
1068 * Activate wide bus and DDR if supported.
1069 */
1070static int mmc_select_hs_ddr(struct mmc_card *card)
1071{
1072 struct mmc_host *host = card->host;
1073 u32 bus_width, ext_csd_bits;
1074 int err = 0;
1075
1076 if (!(card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_52))
1077 return 0;
1078
1079 bus_width = host->ios.bus_width;
1080 if (bus_width == MMC_BUS_WIDTH_1)
1081 return 0;
1082
1083 ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
1084 EXT_CSD_DDR_BUS_WIDTH_8 : EXT_CSD_DDR_BUS_WIDTH_4;
1085
e173f891
UH
1086 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1087 EXT_CSD_BUS_WIDTH,
1088 ext_csd_bits,
1089 card->ext_csd.generic_cmd6_time,
1090 MMC_TIMING_MMC_DDR52,
1091 true, true, true);
577fb131 1092 if (err) {
4b75bffc 1093 pr_err("%s: switch to bus width %d ddr failed\n",
577fb131
SJ
1094 mmc_hostname(host), 1 << bus_width);
1095 return err;
1096 }
1097
1098 /*
1099 * eMMC cards can support 3.3V to 1.2V i/o (vccq)
1100 * signaling.
1101 *
1102 * EXT_CSD_CARD_TYPE_DDR_1_8V means 3.3V or 1.8V vccq.
1103 *
1104 * 1.8V vccq at 3.3V core voltage (vcc) is not required
1105 * in the JEDEC spec for DDR.
1106 *
312449ef
CD
1107 * Even (e)MMC card can support 3.3v to 1.2v vccq, but not all
1108 * host controller can support this, like some of the SDHCI
1109 * controller which connect to an eMMC device. Some of these
1110 * host controller still needs to use 1.8v vccq for supporting
1111 * DDR mode.
1112 *
1113 * So the sequence will be:
1114 * if (host and device can both support 1.2v IO)
1115 * use 1.2v IO;
1116 * else if (host and device can both support 1.8v IO)
1117 * use 1.8v IO;
1118 * so if host and device can only support 3.3v IO, this is the
1119 * last choice.
577fb131
SJ
1120 *
1121 * WARNING: eMMC rules are NOT the same as SD DDR
1122 */
20f921bb 1123 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) {
4e74b6b3 1124 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
20f921bb
UH
1125 if (!err)
1126 return 0;
1127 }
577fb131 1128
20f921bb
UH
1129 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_8V &&
1130 host->caps & MMC_CAP_1_8V_DDR)
4e74b6b3 1131 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
312449ef
CD
1132
1133 /* make sure vccq is 3.3v after switching disaster */
1134 if (err)
4e74b6b3 1135 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330);
312449ef 1136
577fb131
SJ
1137 return err;
1138}
1139
0a5b6438
SJ
1140static int mmc_select_hs400(struct mmc_card *card)
1141{
1142 struct mmc_host *host = card->host;
51b12f77 1143 unsigned int max_dtr;
0a5b6438 1144 int err = 0;
cc4f414c 1145 u8 val;
0a5b6438
SJ
1146
1147 /*
1148 * HS400 mode requires 8-bit bus width
1149 */
1150 if (!(card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400 &&
1151 host->ios.bus_width == MMC_BUS_WIDTH_8))
1152 return 0;
1153
51b12f77 1154 /* Switch card to HS mode */
adb24d42 1155 val = EXT_CSD_TIMING_HS;
0a5b6438 1156 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
cc4f414c 1157 EXT_CSD_HS_TIMING, val,
aa33ce3c 1158 card->ext_csd.generic_cmd6_time, 0,
08573eaf 1159 true, false, true);
0a5b6438 1160 if (err) {
4b75bffc 1161 pr_err("%s: switch to high-speed from hs200 failed, err:%d\n",
0a5b6438
SJ
1162 mmc_hostname(host), err);
1163 return err;
1164 }
1165
51b12f77
AH
1166 /* Set host controller to HS timing */
1167 mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
1168
649c6059
ZX
1169 /* Reduce frequency to HS frequency */
1170 max_dtr = card->ext_csd.hs_max_dtr;
1171 mmc_set_clock(host, max_dtr);
1172
08573eaf
CJ
1173 err = mmc_switch_status(card);
1174 if (err)
1175 goto out_err;
d2302933
AH
1176
1177 /* Switch card to DDR */
0a5b6438
SJ
1178 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1179 EXT_CSD_BUS_WIDTH,
1180 EXT_CSD_DDR_BUS_WIDTH_8,
1181 card->ext_csd.generic_cmd6_time);
1182 if (err) {
4b75bffc 1183 pr_err("%s: switch to bus width for hs400 failed, err:%d\n",
0a5b6438
SJ
1184 mmc_hostname(host), err);
1185 return err;
1186 }
1187
d2302933 1188 /* Switch card to HS400 */
cc4f414c
AH
1189 val = EXT_CSD_TIMING_HS400 |
1190 card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
0a5b6438 1191 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
cc4f414c 1192 EXT_CSD_HS_TIMING, val,
aa33ce3c 1193 card->ext_csd.generic_cmd6_time, 0,
08573eaf 1194 true, false, true);
0a5b6438 1195 if (err) {
4b75bffc 1196 pr_err("%s: switch to hs400 failed, err:%d\n",
0a5b6438
SJ
1197 mmc_hostname(host), err);
1198 return err;
1199 }
1200
d2302933 1201 /* Set host controller to HS400 timing and frequency */
0a5b6438
SJ
1202 mmc_set_timing(host, MMC_TIMING_MMC_HS400);
1203 mmc_set_bus_speed(card);
1204
08573eaf
CJ
1205 err = mmc_switch_status(card);
1206 if (err)
1207 goto out_err;
d2302933 1208
0a5b6438 1209 return 0;
d2302933
AH
1210
1211out_err:
1212 pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host),
1213 __func__, err);
1214 return err;
0a5b6438
SJ
1215}
1216
6376f69d
AH
1217int mmc_hs200_to_hs400(struct mmc_card *card)
1218{
1219 return mmc_select_hs400(card);
1220}
1221
6376f69d
AH
1222int mmc_hs400_to_hs200(struct mmc_card *card)
1223{
1224 struct mmc_host *host = card->host;
6376f69d
AH
1225 unsigned int max_dtr;
1226 int err;
cc4f414c 1227 u8 val;
6376f69d 1228
6376f69d
AH
1229 /* Reduce frequency to HS */
1230 max_dtr = card->ext_csd.hs_max_dtr;
1231 mmc_set_clock(host, max_dtr);
1232
1233 /* Switch HS400 to HS DDR */
adb24d42 1234 val = EXT_CSD_TIMING_HS;
6376f69d 1235 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
aa33ce3c 1236 val, card->ext_csd.generic_cmd6_time, 0,
08573eaf 1237 true, false, true);
6376f69d
AH
1238 if (err)
1239 goto out_err;
1240
1241 mmc_set_timing(host, MMC_TIMING_MMC_DDR52);
1242
08573eaf
CJ
1243 err = mmc_switch_status(card);
1244 if (err)
1245 goto out_err;
6376f69d
AH
1246
1247 /* Switch HS DDR to HS */
1248 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1249 EXT_CSD_BUS_WIDTH_8, card->ext_csd.generic_cmd6_time,
aa33ce3c 1250 0, true, false, true);
6376f69d
AH
1251 if (err)
1252 goto out_err;
1253
1254 mmc_set_timing(host, MMC_TIMING_MMC_HS);
1255
08573eaf
CJ
1256 err = mmc_switch_status(card);
1257 if (err)
1258 goto out_err;
6376f69d
AH
1259
1260 /* Switch HS to HS200 */
cc4f414c
AH
1261 val = EXT_CSD_TIMING_HS200 |
1262 card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
6376f69d 1263 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
aa33ce3c 1264 val, card->ext_csd.generic_cmd6_time, 0,
08573eaf 1265 true, false, true);
6376f69d
AH
1266 if (err)
1267 goto out_err;
1268
1269 mmc_set_timing(host, MMC_TIMING_MMC_HS200);
1270
ef3d2322
AH
1271 /*
1272 * For HS200, CRC errors are not a reliable way to know the switch
1273 * failed. If there really is a problem, we would expect tuning will
1274 * fail and the result ends up the same.
1275 */
1276 err = __mmc_switch_status(card, false);
08573eaf
CJ
1277 if (err)
1278 goto out_err;
6376f69d
AH
1279
1280 mmc_set_bus_speed(card);
1281
1282 return 0;
1283
1284out_err:
1285 pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host),
1286 __func__, err);
1287 return err;
1288}
1289
81ac2af6
SL
1290static int mmc_select_hs400es(struct mmc_card *card)
1291{
1292 struct mmc_host *host = card->host;
1293 int err = 0;
1294 u8 val;
1295
1296 if (!(host->caps & MMC_CAP_8_BIT_DATA)) {
1297 err = -ENOTSUPP;
1298 goto out_err;
1299 }
1300
1720d354 1301 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V)
4e74b6b3 1302 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
1720d354
SL
1303
1304 if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V)
4e74b6b3 1305 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
1720d354
SL
1306
1307 /* If fails try again during next card power cycle */
1308 if (err)
1309 goto out_err;
1310
81ac2af6
SL
1311 err = mmc_select_bus_width(card);
1312 if (err < 0)
1313 goto out_err;
1314
1315 /* Switch card to HS mode */
53e60650
UH
1316 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1317 EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS,
1318 card->ext_csd.generic_cmd6_time, 0,
1319 true, false, true);
1320 if (err) {
1321 pr_err("%s: switch to hs for hs400es failed, err:%d\n",
1322 mmc_hostname(host), err);
81ac2af6 1323 goto out_err;
53e60650 1324 }
81ac2af6 1325
53e60650 1326 mmc_set_timing(host, MMC_TIMING_MMC_HS);
81ac2af6
SL
1327 err = mmc_switch_status(card);
1328 if (err)
1329 goto out_err;
1330
53e60650
UH
1331 mmc_set_clock(host, card->ext_csd.hs_max_dtr);
1332
81ac2af6
SL
1333 /* Switch card to DDR with strobe bit */
1334 val = EXT_CSD_DDR_BUS_WIDTH_8 | EXT_CSD_BUS_WIDTH_STROBE;
1335 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1336 EXT_CSD_BUS_WIDTH,
1337 val,
1338 card->ext_csd.generic_cmd6_time);
1339 if (err) {
1340 pr_err("%s: switch to bus width for hs400es failed, err:%d\n",
1341 mmc_hostname(host), err);
1342 goto out_err;
1343 }
1344
1345 /* Switch card to HS400 */
1346 val = EXT_CSD_TIMING_HS400 |
1347 card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
1348 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1349 EXT_CSD_HS_TIMING, val,
aa33ce3c 1350 card->ext_csd.generic_cmd6_time, 0,
81ac2af6
SL
1351 true, false, true);
1352 if (err) {
1353 pr_err("%s: switch to hs400es failed, err:%d\n",
1354 mmc_hostname(host), err);
1355 goto out_err;
1356 }
1357
1358 /* Set host controller to HS400 timing and frequency */
1359 mmc_set_timing(host, MMC_TIMING_MMC_HS400);
1360
1361 /* Controller enable enhanced strobe function */
1362 host->ios.enhanced_strobe = true;
1363 if (host->ops->hs400_enhanced_strobe)
1364 host->ops->hs400_enhanced_strobe(host, &host->ios);
1365
1366 err = mmc_switch_status(card);
1367 if (err)
1368 goto out_err;
1369
1370 return 0;
1371
1372out_err:
1373 pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host),
1374 __func__, err);
1375 return err;
1376}
1377
cc4f414c
AH
1378static void mmc_select_driver_type(struct mmc_card *card)
1379{
1380 int card_drv_type, drive_strength, drv_type;
1381
1382 card_drv_type = card->ext_csd.raw_driver_strength |
1383 mmc_driver_type_mask(0);
1384
1385 drive_strength = mmc_select_drive_strength(card,
1386 card->ext_csd.hs200_max_dtr,
1387 card_drv_type, &drv_type);
1388
1389 card->drive_strength = drive_strength;
1390
1391 if (drv_type)
1392 mmc_set_driver_type(card->host, drv_type);
1393}
1394
577fb131
SJ
1395/*
1396 * For device supporting HS200 mode, the following sequence
1397 * should be done before executing the tuning process.
1398 * 1. set the desired bus width(4-bit or 8-bit, 1-bit is not supported)
1399 * 2. switch to HS200 mode
1400 * 3. set the clock to > 52Mhz and <=200MHz
1401 */
1402static int mmc_select_hs200(struct mmc_card *card)
1403{
1404 struct mmc_host *host = card->host;
e51534c8 1405 unsigned int old_timing, old_signal_voltage;
577fb131 1406 int err = -EINVAL;
cc4f414c 1407 u8 val;
577fb131 1408
e51534c8 1409 old_signal_voltage = host->ios.signal_voltage;
577fb131 1410 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_2V)
4e74b6b3 1411 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
577fb131
SJ
1412
1413 if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_8V)
4e74b6b3 1414 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
577fb131
SJ
1415
1416 /* If fails try again during next card power cycle */
1417 if (err)
e51534c8 1418 return err;
577fb131 1419
cc4f414c
AH
1420 mmc_select_driver_type(card);
1421
577fb131
SJ
1422 /*
1423 * Set the bus width(4 or 8) with host's support and
1424 * switch to HS200 mode if bus width is set successfully.
1425 */
1426 err = mmc_select_bus_width(card);
8b7be8f2 1427 if (err > 0) {
cc4f414c
AH
1428 val = EXT_CSD_TIMING_HS200 |
1429 card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
4509f847 1430 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
cc4f414c 1431 EXT_CSD_HS_TIMING, val,
aa33ce3c 1432 card->ext_csd.generic_cmd6_time, 0,
08573eaf 1433 true, false, true);
1815e61b
AH
1434 if (err)
1435 goto err;
1436 old_timing = host->ios.timing;
1437 mmc_set_timing(host, MMC_TIMING_MMC_HS200);
08573eaf 1438
ef3d2322
AH
1439 /*
1440 * For HS200, CRC errors are not a reliable way to know the
1441 * switch failed. If there really is a problem, we would expect
1442 * tuning will fail and the result ends up the same.
1443 */
1444 err = __mmc_switch_status(card, false);
1445
08573eaf
CJ
1446 /*
1447 * mmc_select_timing() assumes timing has not changed if
1448 * it is a switch error.
1449 */
1450 if (err == -EBADMSG)
1451 mmc_set_timing(host, old_timing);
577fb131 1452 }
a4924c71 1453err:
e51534c8
DA
1454 if (err) {
1455 /* fall back to the old signal voltage, if fails report error */
4e74b6b3 1456 if (mmc_set_signal_voltage(host, old_signal_voltage))
e51534c8
DA
1457 err = -EIO;
1458
1815e61b
AH
1459 pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host),
1460 __func__, err);
e51534c8 1461 }
a4924c71
G
1462 return err;
1463}
1464
577fb131 1465/*
81ac2af6 1466 * Activate High Speed, HS200 or HS400ES mode if supported.
577fb131
SJ
1467 */
1468static int mmc_select_timing(struct mmc_card *card)
1469{
1470 int err = 0;
1471
148bcab2 1472 if (!mmc_can_ext_csd(card))
577fb131
SJ
1473 goto bus_speed;
1474
81ac2af6
SL
1475 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400ES)
1476 err = mmc_select_hs400es(card);
1477 else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200)
577fb131
SJ
1478 err = mmc_select_hs200(card);
1479 else if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS)
1480 err = mmc_select_hs(card);
1481
1482 if (err && err != -EBADMSG)
1483 return err;
1484
577fb131
SJ
1485bus_speed:
1486 /*
1487 * Set the bus speed to the selected bus timing.
1488 * If timing is not selected, backward compatible is the default.
1489 */
1490 mmc_set_bus_speed(card);
0400ed0a 1491 return 0;
577fb131
SJ
1492}
1493
1494/*
1495 * Execute tuning sequence to seek the proper bus operating
0a5b6438 1496 * conditions for HS200 and HS400, which sends CMD21 to the device.
577fb131
SJ
1497 */
1498static int mmc_hs200_tuning(struct mmc_card *card)
1499{
1500 struct mmc_host *host = card->host;
577fb131 1501
0a5b6438
SJ
1502 /*
1503 * Timing should be adjusted to the HS400 target
1504 * operation frequency for tuning process
1505 */
1506 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400 &&
1507 host->ios.bus_width == MMC_BUS_WIDTH_8)
1508 if (host->ops->prepare_hs400_tuning)
1509 host->ops->prepare_hs400_tuning(host, &host->ios);
1510
63e415c6 1511 return mmc_execute_tuning(card);
577fb131
SJ
1512}
1513
7ea239d9 1514/*
6abaa0c9
PO
1515 * Handle the detection and initialisation of a card.
1516 *
8769392b 1517 * In the case of a resume, "oldcard" will contain the card
6abaa0c9 1518 * we're trying to reinitialise.
7ea239d9 1519 */
8c75deae 1520static int mmc_init_card(struct mmc_host *host, u32 ocr,
6abaa0c9 1521 struct mmc_card *oldcard)
7ea239d9
PO
1522{
1523 struct mmc_card *card;
577fb131 1524 int err;
7ea239d9 1525 u32 cid[4];
b676f039 1526 u32 rocr;
7ea239d9 1527
d84075c8 1528 WARN_ON(!host->claimed);
7ea239d9 1529
44669034
SNX
1530 /* Set correct bus mode for MMC before attempting init */
1531 if (!mmc_host_is_spi(host))
1532 mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN);
1533
7ea239d9
PO
1534 /*
1535 * Since we're changing the OCR value, we seem to
1536 * need to tell some cards to go back to the idle
1537 * state. We wait 1ms to give cards time to
1538 * respond.
c3805467 1539 * mmc_go_idle is needed for eMMC that are asleep
7ea239d9
PO
1540 */
1541 mmc_go_idle(host);
1542
1543 /* The extra bit indicates that we support high capacity */
b676f039 1544 err = mmc_send_op_cond(host, ocr | (1 << 30), &rocr);
17b0429d 1545 if (err)
6abaa0c9 1546 goto err;
7ea239d9 1547
af517150
DB
1548 /*
1549 * For SPI, enable CRC as appropriate.
1550 */
1551 if (mmc_host_is_spi(host)) {
1552 err = mmc_spi_set_crc(host, use_spi_crc);
1553 if (err)
1554 goto err;
1555 }
1556
7ea239d9
PO
1557 /*
1558 * Fetch CID from card.
1559 */
af517150
DB
1560 if (mmc_host_is_spi(host))
1561 err = mmc_send_cid(host, cid);
1562 else
1563 err = mmc_all_send_cid(host, cid);
17b0429d 1564 if (err)
7ea239d9
PO
1565 goto err;
1566
6abaa0c9 1567 if (oldcard) {
adf66a0d
PO
1568 if (memcmp(cid, oldcard->raw_cid, sizeof(cid)) != 0) {
1569 err = -ENOENT;
6abaa0c9 1570 goto err;
adf66a0d 1571 }
6abaa0c9
PO
1572
1573 card = oldcard;
1574 } else {
1575 /*
1576 * Allocate card structure.
1577 */
51ec92e2 1578 card = mmc_alloc_card(host, &mmc_type);
adf66a0d
PO
1579 if (IS_ERR(card)) {
1580 err = PTR_ERR(card);
6abaa0c9 1581 goto err;
adf66a0d 1582 }
7ea239d9 1583
69041150 1584 card->ocr = ocr;
6abaa0c9
PO
1585 card->type = MMC_TYPE_MMC;
1586 card->rca = 1;
1587 memcpy(card->raw_cid, cid, sizeof(card->raw_cid));
1588 }
7ea239d9 1589
eac86321
DA
1590 /*
1591 * Call the optional HC's init_card function to handle quirks.
1592 */
1593 if (host->ops->init_card)
1594 host->ops->init_card(host, card);
1595
7ea239d9 1596 /*
af517150 1597 * For native busses: set card RCA and quit open drain mode.
7ea239d9 1598 */
af517150
DB
1599 if (!mmc_host_is_spi(host)) {
1600 err = mmc_set_relative_addr(card);
1601 if (err)
1602 goto free_card;
7ea239d9 1603
af517150
DB
1604 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
1605 }
7ea239d9 1606
6abaa0c9
PO
1607 if (!oldcard) {
1608 /*
1609 * Fetch CSD from card.
1610 */
1611 err = mmc_send_csd(card, card->raw_csd);
17b0429d 1612 if (err)
6abaa0c9 1613 goto free_card;
7ea239d9 1614
bd766312 1615 err = mmc_decode_csd(card);
adf66a0d 1616 if (err)
bd766312
PO
1617 goto free_card;
1618 err = mmc_decode_cid(card);
adf66a0d 1619 if (err)
bd766312 1620 goto free_card;
6abaa0c9 1621 }
7ea239d9 1622
3d705d14
SH
1623 /*
1624 * handling only for cards supporting DSR and hosts requesting
1625 * DSR configuration
1626 */
1627 if (card->csd.dsr_imp && host->dsr_req)
1628 mmc_set_dsr(host);
1629
7ea239d9 1630 /*
89a73cf5 1631 * Select card, as all following commands rely on that.
7ea239d9 1632 */
af517150
DB
1633 if (!mmc_host_is_spi(host)) {
1634 err = mmc_select_card(card);
1635 if (err)
1636 goto free_card;
1637 }
7ea239d9 1638
6abaa0c9 1639 if (!oldcard) {
076ec38a
UH
1640 /* Read extended CSD. */
1641 err = mmc_read_ext_csd(card);
17b0429d 1642 if (err)
6abaa0c9 1643 goto free_card;
b676f039 1644
87e88659
MY
1645 /*
1646 * If doing byte addressing, check if required to do sector
b676f039
PR
1647 * addressing. Handle the case of <2GB cards needing sector
1648 * addressing. See section 8.1 JEDEC Standard JED84-A441;
1649 * ocr register has bit 30 set for sector addressing.
1650 */
87e88659 1651 if (rocr & BIT(30))
b676f039
PR
1652 mmc_card_set_blockaddr(card);
1653
dfe86cba
AH
1654 /* Erase size depends on CSD and Extended CSD */
1655 mmc_set_erase_size(card);
6abaa0c9 1656 }
7ea239d9 1657
709de99d
CD
1658 /*
1659 * If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF
25985edc 1660 * bit. This bit will be lost every time after a reset or power off.
709de99d 1661 */
69803d4f 1662 if (card->ext_csd.partition_setting_completed ||
83bb24aa 1663 (card->ext_csd.rev >= 3 && (host->caps2 & MMC_CAP2_HC_ERASE_SZ))) {
709de99d 1664 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
b23cf0bd
SJ
1665 EXT_CSD_ERASE_GROUP_DEF, 1,
1666 card->ext_csd.generic_cmd6_time);
709de99d
CD
1667
1668 if (err && err != -EBADMSG)
1669 goto free_card;
1670
1671 if (err) {
1672 err = 0;
1673 /*
1674 * Just disable enhanced area off & sz
1675 * will try to enable ERASE_GROUP_DEF
1676 * during next time reinit
1677 */
1678 card->ext_csd.enhanced_area_offset = -EINVAL;
1679 card->ext_csd.enhanced_area_size = -EINVAL;
1680 } else {
1681 card->ext_csd.erase_group_def = 1;
1682 /*
1683 * enable ERASE_GRP_DEF successfully.
1684 * This will affect the erase size, so
1685 * here need to reset erase size
1686 */
1687 mmc_set_erase_size(card);
1688 }
1689 }
1690
41e2a489
PR
1691 /*
1692 * Ensure eMMC user default partition is enabled
1693 */
371a689f
AW
1694 if (card->ext_csd.part_config & EXT_CSD_PART_CONFIG_ACC_MASK) {
1695 card->ext_csd.part_config &= ~EXT_CSD_PART_CONFIG_ACC_MASK;
1696 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONFIG,
1697 card->ext_csd.part_config,
1698 card->ext_csd.part_time);
1699 if (err && err != -EBADMSG)
1700 goto free_card;
41e2a489
PR
1701 }
1702
bec8726a 1703 /*
43235679 1704 * Enable power_off_notification byte in the ext_csd register
bec8726a 1705 */
43235679 1706 if (card->ext_csd.rev >= 6) {
bec8726a
G
1707 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1708 EXT_CSD_POWER_OFF_NOTIFICATION,
1709 EXT_CSD_POWER_ON,
1710 card->ext_csd.generic_cmd6_time);
1711 if (err && err != -EBADMSG)
1712 goto free_card;
bec8726a 1713
96a85d54
G
1714 /*
1715 * The err can be -EBADMSG or 0,
1716 * so check for success and update the flag
1717 */
1718 if (!err)
e6c08586 1719 card->ext_csd.power_off_notification = EXT_CSD_POWER_ON;
96a85d54 1720 }
bec8726a 1721
89a73cf5 1722 /*
577fb131 1723 * Select timing interface
dfc13e84 1724 */
577fb131
SJ
1725 err = mmc_select_timing(card);
1726 if (err)
1727 goto free_card;
dfc13e84 1728
a4924c71 1729 if (mmc_card_hs200(card)) {
577fb131
SJ
1730 err = mmc_hs200_tuning(card);
1731 if (err)
4b75bffc 1732 goto free_card;
0a5b6438
SJ
1733
1734 err = mmc_select_hs400(card);
1735 if (err)
4b75bffc 1736 goto free_card;
577fb131
SJ
1737 } else if (mmc_card_hs(card)) {
1738 /* Select the desired bus width optionally */
1739 err = mmc_select_bus_width(card);
8b7be8f2 1740 if (err > 0) {
577fb131
SJ
1741 err = mmc_select_hs_ddr(card);
1742 if (err)
4b75bffc 1743 goto free_card;
ef0b27d4 1744 }
89a73cf5
PO
1745 }
1746
2385049d
SJ
1747 /*
1748 * Choose the power class with selected bus interface
1749 */
1750 mmc_select_powerclass(card);
1751
52d0974e
SJ
1752 /*
1753 * Enable HPI feature (if supported)
1754 */
1755 if (card->ext_csd.hpi) {
1756 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1757 EXT_CSD_HPI_MGMT, 1,
1758 card->ext_csd.generic_cmd6_time);
1759 if (err && err != -EBADMSG)
1760 goto free_card;
1761 if (err) {
6606110d
JP
1762 pr_warn("%s: Enabling HPI failed\n",
1763 mmc_hostname(card->host));
52d0974e
SJ
1764 err = 0;
1765 } else
1766 card->ext_csd.hpi_en = 1;
1767 }
1768
881d1c25
SJ
1769 /*
1770 * If cache size is higher than 0, this indicates
1771 * the existence of cache and it can be turned on.
1772 */
5320226a
P
1773 if (!mmc_card_broken_hpi(card) &&
1774 card->ext_csd.cache_size > 0) {
881d1c25 1775 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
8bc0678b
SJ
1776 EXT_CSD_CACHE_CTRL, 1,
1777 card->ext_csd.generic_cmd6_time);
881d1c25
SJ
1778 if (err && err != -EBADMSG)
1779 goto free_card;
1780
1781 /*
1782 * Only if no error, cache is turned on successfully.
1783 */
8bc0678b 1784 if (err) {
6606110d
JP
1785 pr_warn("%s: Cache is supported, but failed to turn on (%d)\n",
1786 mmc_hostname(card->host), err);
8bc0678b
SJ
1787 card->ext_csd.cache_ctrl = 0;
1788 err = 0;
1789 } else {
1790 card->ext_csd.cache_ctrl = 1;
1791 }
881d1c25
SJ
1792 }
1793
abd9ac14
SJ
1794 /*
1795 * The mandatory minimum values are defined for packed command.
1796 * read: 5, write: 3
1797 */
1798 if (card->ext_csd.max_packed_writes >= 3 &&
1799 card->ext_csd.max_packed_reads >= 5 &&
1800 host->caps2 & MMC_CAP2_PACKED_CMD) {
1801 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1802 EXT_CSD_EXP_EVENTS_CTRL,
1803 EXT_CSD_PACKED_EVENT_EN,
1804 card->ext_csd.generic_cmd6_time);
1805 if (err && err != -EBADMSG)
1806 goto free_card;
1807 if (err) {
1808 pr_warn("%s: Enabling packed event failed\n",
1809 mmc_hostname(card->host));
1810 card->ext_csd.packed_event_en = 0;
1811 err = 0;
1812 } else {
1813 card->ext_csd.packed_event_en = 1;
1814 }
1815 }
1816
6abaa0c9
PO
1817 if (!oldcard)
1818 host->card = card;
1819
17b0429d 1820 return 0;
6abaa0c9
PO
1821
1822free_card:
1823 if (!oldcard)
1824 mmc_remove_card(card);
1825err:
adf66a0d 1826 return err;
6abaa0c9
PO
1827}
1828
07a68216
UH
1829static int mmc_can_sleep(struct mmc_card *card)
1830{
1831 return (card && card->ext_csd.rev >= 3);
1832}
1833
1834static int mmc_sleep(struct mmc_host *host)
1835{
c7836d15 1836 struct mmc_command cmd = {};
07a68216 1837 struct mmc_card *card = host->card;
cb962e04 1838 unsigned int timeout_ms = DIV_ROUND_UP(card->ext_csd.sa_timeout, 10000);
07a68216
UH
1839 int err;
1840
436f8daa
AH
1841 /* Re-tuning can't be done once the card is deselected */
1842 mmc_retune_hold(host);
1843
07a68216
UH
1844 err = mmc_deselect_cards(host);
1845 if (err)
436f8daa 1846 goto out_release;
07a68216
UH
1847
1848 cmd.opcode = MMC_SLEEP_AWAKE;
1849 cmd.arg = card->rca << 16;
1850 cmd.arg |= 1 << 15;
1851
cb962e04
UH
1852 /*
1853 * If the max_busy_timeout of the host is specified, validate it against
1854 * the sleep cmd timeout. A failure means we need to prevent the host
1855 * from doing hw busy detection, which is done by converting to a R1
1856 * response instead of a R1B.
1857 */
1858 if (host->max_busy_timeout && (timeout_ms > host->max_busy_timeout)) {
1859 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1860 } else {
1861 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
1862 cmd.busy_timeout = timeout_ms;
1863 }
1864
07a68216
UH
1865 err = mmc_wait_for_cmd(host, &cmd, 0);
1866 if (err)
436f8daa 1867 goto out_release;
07a68216
UH
1868
1869 /*
1870 * If the host does not wait while the card signals busy, then we will
1871 * will have to wait the sleep/awake timeout. Note, we cannot use the
1872 * SEND_STATUS command to poll the status because that command (and most
1873 * others) is invalid while the card sleeps.
1874 */
cb962e04
UH
1875 if (!cmd.busy_timeout || !(host->caps & MMC_CAP_WAIT_WHILE_BUSY))
1876 mmc_delay(timeout_ms);
07a68216 1877
436f8daa
AH
1878out_release:
1879 mmc_retune_release(host);
07a68216
UH
1880 return err;
1881}
1882
e6c08586
UH
1883static int mmc_can_poweroff_notify(const struct mmc_card *card)
1884{
1885 return card &&
1886 mmc_card_mmc(card) &&
1887 (card->ext_csd.power_off_notification == EXT_CSD_POWER_ON);
1888}
1889
1890static int mmc_poweroff_notify(struct mmc_card *card, unsigned int notify_type)
1891{
1892 unsigned int timeout = card->ext_csd.generic_cmd6_time;
1893 int err;
1894
1895 /* Use EXT_CSD_POWER_OFF_SHORT as default notification type. */
1896 if (notify_type == EXT_CSD_POWER_OFF_LONG)
1897 timeout = card->ext_csd.power_off_longtime;
1898
878e200b
UH
1899 err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
1900 EXT_CSD_POWER_OFF_NOTIFICATION,
aa33ce3c 1901 notify_type, timeout, 0, true, false, false);
e6c08586
UH
1902 if (err)
1903 pr_err("%s: Power Off Notification timed out, %u\n",
1904 mmc_hostname(card->host), timeout);
1905
1906 /* Disable the power off notification after the switch operation. */
1907 card->ext_csd.power_off_notification = EXT_CSD_NO_POWER_NOTIFICATION;
1908
1909 return err;
1910}
1911
6abaa0c9
PO
1912/*
1913 * Host is being removed. Free up the current card.
1914 */
1915static void mmc_remove(struct mmc_host *host)
1916{
6abaa0c9
PO
1917 mmc_remove_card(host->card);
1918 host->card = NULL;
1919}
1920
d3049504
AH
1921/*
1922 * Card detection - card is alive.
1923 */
1924static int mmc_alive(struct mmc_host *host)
1925{
1926 return mmc_send_status(host->card, NULL);
1927}
1928
6abaa0c9
PO
1929/*
1930 * Card detection callback from host.
1931 */
1932static void mmc_detect(struct mmc_host *host)
1933{
1934 int err;
1935
e94cfef6 1936 mmc_get_card(host->card);
6abaa0c9
PO
1937
1938 /*
1939 * Just check if our card has been removed.
1940 */
d3049504 1941 err = _mmc_detect_card_removed(host);
6abaa0c9 1942
e94cfef6 1943 mmc_put_card(host->card);
6abaa0c9 1944
17b0429d 1945 if (err) {
4101c16a 1946 mmc_remove(host);
6abaa0c9
PO
1947
1948 mmc_claim_host(host);
1949 mmc_detach_bus(host);
7f7e4129 1950 mmc_power_off(host);
6abaa0c9
PO
1951 mmc_release_host(host);
1952 }
1953}
1954
03d071fc 1955static int _mmc_suspend(struct mmc_host *host, bool is_suspend)
6abaa0c9 1956{
c3805467 1957 int err = 0;
03d071fc
UH
1958 unsigned int notify_type = is_suspend ? EXT_CSD_POWER_OFF_SHORT :
1959 EXT_CSD_POWER_OFF_LONG;
c3805467 1960
6abaa0c9 1961 mmc_claim_host(host);
881d926d 1962
9ec775f7
UH
1963 if (mmc_card_suspended(host->card))
1964 goto out;
1965
39b9431b
UH
1966 if (mmc_card_doing_bkops(host->card)) {
1967 err = mmc_stop_bkops(host->card);
1968 if (err)
1969 goto out;
1970 }
1971
10e5d965 1972 err = mmc_flush_cache(host->card);
881d926d
ME
1973 if (err)
1974 goto out;
1975
43235679 1976 if (mmc_can_poweroff_notify(host->card) &&
53275c21 1977 ((host->caps2 & MMC_CAP2_FULL_PWR_CYCLE) || !is_suspend))
03d071fc 1978 err = mmc_poweroff_notify(host->card, notify_type);
07a68216
UH
1979 else if (mmc_can_sleep(host->card))
1980 err = mmc_sleep(host);
e6c08586 1981 else if (!mmc_host_is_spi(host))
85e727ed 1982 err = mmc_deselect_cards(host);
95cdfb72 1983
9ec775f7 1984 if (!err) {
74590263 1985 mmc_power_off(host);
9ec775f7
UH
1986 mmc_card_set_suspended(host->card);
1987 }
881d926d
ME
1988out:
1989 mmc_release_host(host);
c3805467 1990 return err;
6abaa0c9 1991}
7ea239d9 1992
03d071fc 1993/*
0cb403a2 1994 * Suspend callback
03d071fc
UH
1995 */
1996static int mmc_suspend(struct mmc_host *host)
1997{
0cb403a2
UH
1998 int err;
1999
2000 err = _mmc_suspend(host, true);
2001 if (!err) {
2002 pm_runtime_disable(&host->card->dev);
2003 pm_runtime_set_suspended(&host->card->dev);
2004 }
2005
2006 return err;
03d071fc
UH
2007}
2008
6abaa0c9 2009/*
6abaa0c9
PO
2010 * This function tries to determine if the same card is still present
2011 * and, if so, restore all state to it.
2012 */
0cb403a2 2013static int _mmc_resume(struct mmc_host *host)
6abaa0c9 2014{
9ec775f7 2015 int err = 0;
6abaa0c9 2016
6abaa0c9 2017 mmc_claim_host(host);
9ec775f7
UH
2018
2019 if (!mmc_card_suspended(host->card))
2020 goto out;
2021
69041150 2022 mmc_power_up(host, host->card->ocr);
69041150 2023 err = mmc_init_card(host, host->card->ocr, host->card);
9ec775f7 2024 mmc_card_clr_suspended(host->card);
2986d0bf 2025
9ec775f7
UH
2026out:
2027 mmc_release_host(host);
95cdfb72 2028 return err;
6abaa0c9
PO
2029}
2030
9ec775f7
UH
2031/*
2032 * Shutdown callback
2033 */
2034static int mmc_shutdown(struct mmc_host *host)
2035{
2036 int err = 0;
2037
2038 /*
2039 * In a specific case for poweroff notify, we need to resume the card
2040 * before we can shutdown it properly.
2041 */
2042 if (mmc_can_poweroff_notify(host->card) &&
2043 !(host->caps2 & MMC_CAP2_FULL_PWR_CYCLE))
0cb403a2 2044 err = _mmc_resume(host);
9ec775f7
UH
2045
2046 if (!err)
2047 err = _mmc_suspend(host, false);
2048
2049 return err;
2050}
c4d770d7 2051
0cb403a2
UH
2052/*
2053 * Callback for resume.
2054 */
2055static int mmc_resume(struct mmc_host *host)
2056{
0cb403a2 2057 pm_runtime_enable(&host->card->dev);
c29536e8 2058 return 0;
0cb403a2
UH
2059}
2060
c4d770d7
UH
2061/*
2062 * Callback for runtime_suspend.
2063 */
2064static int mmc_runtime_suspend(struct mmc_host *host)
2065{
2066 int err;
2067
2068 if (!(host->caps & MMC_CAP_AGGRESSIVE_PM))
2069 return 0;
2070
0cb403a2 2071 err = _mmc_suspend(host, true);
0cc81a8c 2072 if (err)
f42cf8d6 2073 pr_err("%s: error %d doing aggressive suspend\n",
c4d770d7 2074 mmc_hostname(host), err);
c4d770d7 2075
c4d770d7
UH
2076 return err;
2077}
2078
2079/*
2080 * Callback for runtime_resume.
2081 */
2082static int mmc_runtime_resume(struct mmc_host *host)
2083{
2084 int err;
2085
0cb403a2 2086 err = _mmc_resume(host);
520322d9 2087 if (err && err != -ENOMEDIUM)
c29536e8 2088 pr_err("%s: error %d doing runtime resume\n",
c4d770d7
UH
2089 mmc_hostname(host), err);
2090
c4d770d7
UH
2091 return 0;
2092}
2093
f855a371
JR
2094int mmc_can_reset(struct mmc_card *card)
2095{
2096 u8 rst_n_function;
2097
2098 rst_n_function = card->ext_csd.rst_n_function;
2099 if ((rst_n_function & EXT_CSD_RST_N_EN_MASK) != EXT_CSD_RST_N_ENABLED)
2100 return 0;
2101 return 1;
2102}
2103EXPORT_SYMBOL(mmc_can_reset);
2104
2105static int mmc_reset(struct mmc_host *host)
2106{
2107 struct mmc_card *card = host->card;
f855a371 2108
437db4c6
AH
2109 /*
2110 * In the case of recovery, we can't expect flushing the cache to work
2111 * always, but we have a go and ignore errors.
2112 */
2113 mmc_flush_cache(host->card);
2114
4e6c7178
GG
2115 if ((host->caps & MMC_CAP_HW_RESET) && host->ops->hw_reset &&
2116 mmc_can_reset(card)) {
2117 /* If the card accept RST_n signal, send it. */
2118 mmc_set_clock(host, host->f_init);
2119 host->ops->hw_reset(host);
2120 /* Set initial state and call mmc_set_ios */
2121 mmc_set_initial_state(host);
2122 } else {
2123 /* Do a brute force power cycle */
2124 mmc_power_cycle(host, card->ocr);
2125 }
364549dd 2126 return mmc_init_card(host, card->ocr, card);
f855a371
JR
2127}
2128
6abaa0c9
PO
2129static const struct mmc_bus_ops mmc_ops = {
2130 .remove = mmc_remove,
2131 .detect = mmc_detect,
2132 .suspend = mmc_suspend,
2133 .resume = mmc_resume,
c4d770d7
UH
2134 .runtime_suspend = mmc_runtime_suspend,
2135 .runtime_resume = mmc_runtime_resume,
d3049504 2136 .alive = mmc_alive,
486fdbbc 2137 .shutdown = mmc_shutdown,
f855a371 2138 .reset = mmc_reset,
6abaa0c9
PO
2139};
2140
2141/*
2142 * Starting point for MMC card init.
2143 */
807e8e40 2144int mmc_attach_mmc(struct mmc_host *host)
6abaa0c9
PO
2145{
2146 int err;
69041150 2147 u32 ocr, rocr;
6abaa0c9 2148
d84075c8 2149 WARN_ON(!host->claimed);
6abaa0c9 2150
44669034
SNX
2151 /* Set correct bus mode for MMC before attempting attach */
2152 if (!mmc_host_is_spi(host))
2153 mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN);
2154
807e8e40
AR
2155 err = mmc_send_op_cond(host, 0, &ocr);
2156 if (err)
2157 return err;
2158
2501c917 2159 mmc_attach_bus(host, &mmc_ops);
8f230f45
TI
2160 if (host->ocr_avail_mmc)
2161 host->ocr_avail = host->ocr_avail_mmc;
6abaa0c9 2162
af517150
DB
2163 /*
2164 * We need to get OCR a different way for SPI.
2165 */
2166 if (mmc_host_is_spi(host)) {
2167 err = mmc_spi_read_ocr(host, 1, &ocr);
2168 if (err)
2169 goto err;
2170 }
2171
69041150 2172 rocr = mmc_select_voltage(host, ocr);
6abaa0c9
PO
2173
2174 /*
2175 * Can we support the voltage of the card?
2176 */
69041150 2177 if (!rocr) {
109b5bed 2178 err = -EINVAL;
6abaa0c9 2179 goto err;
109b5bed 2180 }
6abaa0c9
PO
2181
2182 /*
2183 * Detect and init the card.
2184 */
69041150 2185 err = mmc_init_card(host, rocr, NULL);
17b0429d 2186 if (err)
6abaa0c9
PO
2187 goto err;
2188
2189 mmc_release_host(host);
4101c16a 2190 err = mmc_add_card(host->card);
7ea239d9 2191 if (err)
2986d0bf 2192 goto remove_card;
7ea239d9 2193
2860d060 2194 mmc_claim_host(host);
7ea239d9
PO
2195 return 0;
2196
2986d0bf 2197remove_card:
6abaa0c9 2198 mmc_remove_card(host->card);
2986d0bf 2199 mmc_claim_host(host);
807e8e40 2200 host->card = NULL;
7ea239d9
PO
2201err:
2202 mmc_detach_bus(host);
7ea239d9 2203
a3c76eb9 2204 pr_err("%s: error %d whilst initialising MMC card\n",
109b5bed
PO
2205 mmc_hostname(host), err);
2206
adf66a0d 2207 return err;
7ea239d9 2208}