[people/ms/u-boot.git] / drivers / mmc / rockchip_sdhci.c

/*
 * (C) Copyright 2016 Fuzhou Rockchip Electronics Co., Ltd
 *
 * Rockchip SD Host Controller Interface
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <malloc.h>
#include <mapmem.h>
#include <sdhci.h>
#include <clk.h>

DECLARE_GLOBAL_DATA_PTR;
/* 400KHz is max freq for card ID etc. Use that as min */
#define EMMC_MIN_FREQ	400000

struct rockchip_sdhc_plat {
#if CONFIG_IS_ENABLED(OF_PLATDATA)
	struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
#endif
	struct mmc_config cfg;
	struct mmc mmc;
};

struct rockchip_sdhc {
	struct sdhci_host host;
	void *base;
};

static int arasan_sdhci_probe(struct udevice *dev)
{
	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
	struct rockchip_sdhc *prv = dev_get_priv(dev);
	struct sdhci_host *host = &prv->host;
	int max_frequency, ret;
	struct clk clk;

#if CONFIG_IS_ENABLED(OF_PLATDATA)
	struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;

	host->name = dev->name;
	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
	max_frequency = dtplat->max_frequency;
	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
#else
	max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
	ret = clk_get_by_index(dev, 0, &clk);
#endif
	if (!ret) {
		ret = clk_set_rate(&clk, max_frequency);
		if (IS_ERR_VALUE(ret))
			printf("%s clk set rate fail!\n", __func__);
	} else {
		printf("%s fail to get clk\n", __func__);
	}

	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
	host->max_clk = max_frequency;

	ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);

	host->mmc = &plat->mmc;
	if (ret)
		return ret;
	host->mmc->priv = &prv->host;
	host->mmc->dev = dev;
	upriv->mmc = host->mmc;

	return sdhci_probe(dev);
}

static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
	struct sdhci_host *host = dev_get_priv(dev);

	host->name = dev->name;
	host->ioaddr = devfdt_get_addr_ptr(dev);
#endif

	return 0;
}

static int rockchip_sdhci_bind(struct udevice *dev)
{
	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);

	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}

static const struct udevice_id arasan_sdhci_ids[] = {
	{ .compatible = "arasan,sdhci-5.1" },
	{ }
};

U_BOOT_DRIVER(arasan_sdhci_drv) = {
	.name		= "rockchip_rk3399_sdhci_5_1",
	.id		= UCLASS_MMC,
	.of_match	= arasan_sdhci_ids,
	.ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
	.ops		= &sdhci_ops,
	.bind		= rockchip_sdhci_bind,
	.probe		= arasan_sdhci_probe,
	.priv_auto_alloc_size = sizeof(struct rockchip_sdhc),
	.platdata_auto_alloc_size = sizeof(struct rockchip_sdhc_plat),
};
Commit	Line	Data
79c83065 KY	1	/*
	2	* (C) Copyright 2016 Fuzhou Rockchip Electronics Co., Ltd
	3	*
	4	* Rockchip SD Host Controller Interface
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#include <common.h>
	10	#include <dm.h>
c2868212	11	#include <dt-structs.h>
79c83065 KY	12	#include <fdtdec.h>
	13	#include <libfdt.h>
	14	#include <malloc.h>
c2868212	15	#include <mapmem.h>
79c83065	16	#include <sdhci.h>
39fbb56f	17	#include <clk.h>
79c83065	18
39fbb56f	19	DECLARE_GLOBAL_DATA_PTR;
79c83065 KY	20	/* 400KHz is max freq for card ID etc. Use that as min */
	21	#define EMMC_MIN_FREQ 400000
	22
	23	struct rockchip_sdhc_plat {
c2868212 KY	24	#if CONFIG_IS_ENABLED(OF_PLATDATA)
	25	struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
	26	#endif
79c83065 KY	27	struct mmc_config cfg;
	28	struct mmc mmc;
	29	};
	30
	31	struct rockchip_sdhc {
	32	struct sdhci_host host;
	33	void *base;
	34	};
	35
	36	static int arasan_sdhci_probe(struct udevice *dev)
	37	{
	38	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
	39	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
	40	struct rockchip_sdhc *prv = dev_get_priv(dev);
	41	struct sdhci_host *host = &prv->host;
39fbb56f KY	42	int max_frequency, ret;
	43	struct clk clk;
	44
c2868212 KY	45	#if CONFIG_IS_ENABLED(OF_PLATDATA)
c2868212 KY	46	struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;
39fbb56f	47
c2868212 KY	48	host->name = dev->name;
	49	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
	50	max_frequency = dtplat->max_frequency;
	51	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
	52	#else
fd1bf8df	53	max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
39fbb56f	54	ret = clk_get_by_index(dev, 0, &clk);
c2868212	55	#endif
39fbb56f KY	56	if (!ret) {
	57	ret = clk_set_rate(&clk, max_frequency);
	58	if (IS_ERR_VALUE(ret))
	59	printf("%s clk set rate fail!\n", __func__);
	60	} else {
	61	printf("%s fail to get clk\n", __func__);
	62	}
79c83065	63
79c83065	64	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
6d0e34bf	65	host->max_clk = max_frequency;
79c83065	66
6d0e34bf	67	ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
79c83065 KY	68
	69	host->mmc = &plat->mmc;
	70	if (ret)
	71	return ret;
	72	host->mmc->priv = &prv->host;
	73	host->mmc->dev = dev;
	74	upriv->mmc = host->mmc;
	75
	76	return sdhci_probe(dev);
	77	}
	78
	79	static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
	80	{
c2868212	81	#if !CONFIG_IS_ENABLED(OF_PLATDATA)
79c83065 KY	82	struct sdhci_host *host = dev_get_priv(dev);
	83
	84	host->name = dev->name;
a821c4af	85	host->ioaddr = devfdt_get_addr_ptr(dev);
c2868212	86	#endif
79c83065 KY	87
	88	return 0;
	89	}
	90
	91	static int rockchip_sdhci_bind(struct udevice *dev)
	92	{
	93	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
79c83065	94
24f5aec3	95	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
79c83065 KY	96	}
	97
	98	static const struct udevice_id arasan_sdhci_ids[] = {
	99	{ .compatible = "arasan,sdhci-5.1" },
	100	{ }
	101	};
	102
	103	U_BOOT_DRIVER(arasan_sdhci_drv) = {
c2868212	104	.name = "rockchip_rk3399_sdhci_5_1",
79c83065 KY	105	.id = UCLASS_MMC,
	106	.of_match = arasan_sdhci_ids,
	107	.ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
	108	.ops = &sdhci_ops,
	109	.bind = rockchip_sdhci_bind,
	110	.probe = arasan_sdhci_probe,
	111	.priv_auto_alloc_size = sizeof(struct rockchip_sdhc),
	112	.platdata_auto_alloc_size = sizeof(struct rockchip_sdhc_plat),
	113	};