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drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3k
[people/ms/u-boot.git] / drivers / mmc / zynq_sdhci.c
CommitLineData
293eb33f 1/*
d9ae52c8 2 * (C) Copyright 2013 - 2015 Xilinx, Inc.
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3 *
4 * Xilinx Zynq SD Host Controller Interface
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#include <common.h>
d9ae52c8 10#include <dm.h>
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11#include <fdtdec.h>
12#include <libfdt.h>
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13#include <malloc.h>
14#include <sdhci.h>
293eb33f 15
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16#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
17# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0
18#endif
19
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20struct arasan_sdhci_plat {
21 struct mmc_config cfg;
22 struct mmc mmc;
23};
24
d9ae52c8 25static int arasan_sdhci_probe(struct udevice *dev)
293eb33f 26{
329a449f 27 struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
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28 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
29 struct sdhci_host *host = dev_get_priv(dev);
329a449f 30 int ret;
293eb33f 31
eddabd16 32 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
f9ec45d1 33 SDHCI_QUIRK_BROKEN_R1B;
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34
35#ifdef CONFIG_ZYNQ_HISPD_BROKEN
36 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
37#endif
38
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39 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
40
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41 ret = sdhci_setup_cfg(&plat->cfg, host, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
42 CONFIG_ZYNQ_SDHCI_MIN_FREQ);
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43 host->mmc = &plat->mmc;
44 if (ret)
45 return ret;
46 host->mmc->priv = host;
cffe5d86 47 host->mmc->dev = dev;
329a449f 48 upriv->mmc = host->mmc;
d9ae52c8 49
329a449f 50 return sdhci_probe(dev);
293eb33f 51}
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52
53static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
54{
55 struct sdhci_host *host = dev_get_priv(dev);
56
cacd1d2f 57 host->name = dev->name;
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58 host->ioaddr = (void *)dev_get_addr(dev);
59
60 return 0;
61}
62
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63static int arasan_sdhci_bind(struct udevice *dev)
64{
65 struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
329a449f 66
24f5aec3 67 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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68}
69
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70static const struct udevice_id arasan_sdhci_ids[] = {
71 { .compatible = "arasan,sdhci-8.9a" },
72 { }
73};
74
75U_BOOT_DRIVER(arasan_sdhci_drv) = {
76 .name = "arasan_sdhci",
77 .id = UCLASS_MMC,
78 .of_match = arasan_sdhci_ids,
79 .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
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80 .ops = &sdhci_ops,
81 .bind = arasan_sdhci_bind,
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82 .probe = arasan_sdhci_probe,
83 .priv_auto_alloc_size = sizeof(struct sdhci_host),
329a449f 84 .platdata_auto_alloc_size = sizeof(struct arasan_sdhci_plat),
d9ae52c8 85};