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5653fc33 | 1 | /* |
bf9e3b38 | 2 | * (C) Copyright 2002-2004 |
5653fc33 WD |
3 | * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com |
4 | * | |
5 | * Copyright (C) 2003 Arabella Software Ltd. | |
6 | * Yuli Barcohen <yuli@arabellasw.com> | |
5653fc33 | 7 | * |
bf9e3b38 WD |
8 | * Copyright (C) 2004 |
9 | * Ed Okerson | |
260421a2 SR |
10 | * |
11 | * Copyright (C) 2006 | |
12 | * Tolunay Orkun <listmember@orkun.us> | |
bf9e3b38 | 13 | * |
5653fc33 WD |
14 | * See file CREDITS for list of people who contributed to this |
15 | * project. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
30 | * MA 02111-1307 USA | |
31 | * | |
5653fc33 WD |
32 | */ |
33 | ||
34 | /* The DEBUG define must be before common to enable debugging */ | |
2d1a537d WD |
35 | /* #define DEBUG */ |
36 | ||
5653fc33 WD |
37 | #include <common.h> |
38 | #include <asm/processor.h> | |
3a197b2f | 39 | #include <asm/io.h> |
4c0d4c3b | 40 | #include <asm/byteorder.h> |
2a8af187 | 41 | #include <environment.h> |
fa36ae79 | 42 | #include <mtd/cfi_flash.h> |
028ab6b5 | 43 | |
5653fc33 | 44 | /* |
7e5b9b47 HS |
45 | * This file implements a Common Flash Interface (CFI) driver for |
46 | * U-Boot. | |
47 | * | |
48 | * The width of the port and the width of the chips are determined at | |
49 | * initialization. These widths are used to calculate the address for | |
50 | * access CFI data structures. | |
5653fc33 WD |
51 | * |
52 | * References | |
53 | * JEDEC Standard JESD68 - Common Flash Interface (CFI) | |
54 | * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes | |
55 | * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets | |
56 | * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet | |
260421a2 SR |
57 | * AMD CFI Specification, Release 2.0 December 1, 2001 |
58 | * AMD/Spansion Application Note: Migration from Single-byte to Three-byte | |
59 | * Device IDs, Publication Number 25538 Revision A, November 8, 2001 | |
5653fc33 | 60 | * |
6d0f6bcf | 61 | * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between |
d0b6e140 | 62 | * reading and writing ... (yes there is such a Hardware). |
5653fc33 WD |
63 | */ |
64 | ||
7e5b9b47 | 65 | static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; |
4ffeab2c | 66 | #ifdef CONFIG_FLASH_CFI_MTD |
6ea808ef | 67 | static uint flash_verbose = 1; |
4ffeab2c MF |
68 | #else |
69 | #define flash_verbose 1 | |
70 | #endif | |
92eb729b | 71 | |
2a112b23 WD |
72 | flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ |
73 | ||
79b4cda0 SR |
74 | /* |
75 | * Check if chip width is defined. If not, start detecting with 8bit. | |
76 | */ | |
6d0f6bcf JCPV |
77 | #ifndef CONFIG_SYS_FLASH_CFI_WIDTH |
78 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT | |
79b4cda0 SR |
79 | #endif |
80 | ||
6f726f95 SR |
81 | /* |
82 | * 0xffff is an undefined value for the configuration register. When | |
83 | * this value is returned, the configuration register shall not be | |
84 | * written at all (default mode). | |
85 | */ | |
86 | static u16 cfi_flash_config_reg(int i) | |
87 | { | |
88 | #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS | |
89 | return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i]; | |
90 | #else | |
91 | return 0xffff; | |
92 | #endif | |
93 | } | |
94 | ||
ca5def3f SR |
95 | #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT) |
96 | int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT; | |
97 | #endif | |
98 | ||
b00e19cc SR |
99 | static phys_addr_t __cfi_flash_bank_addr(int i) |
100 | { | |
101 | return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i]; | |
102 | } | |
103 | phys_addr_t cfi_flash_bank_addr(int i) | |
104 | __attribute__((weak, alias("__cfi_flash_bank_addr"))); | |
105 | ||
ec50a8e3 IY |
106 | static unsigned long __cfi_flash_bank_size(int i) |
107 | { | |
108 | #ifdef CONFIG_SYS_FLASH_BANKS_SIZES | |
109 | return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i]; | |
110 | #else | |
111 | return 0; | |
112 | #endif | |
113 | } | |
114 | unsigned long cfi_flash_bank_size(int i) | |
115 | __attribute__((weak, alias("__cfi_flash_bank_size"))); | |
116 | ||
45aa5a7f | 117 | static void __flash_write8(u8 value, void *addr) |
cdbaefb5 HS |
118 | { |
119 | __raw_writeb(value, addr); | |
120 | } | |
121 | ||
45aa5a7f | 122 | static void __flash_write16(u16 value, void *addr) |
cdbaefb5 HS |
123 | { |
124 | __raw_writew(value, addr); | |
125 | } | |
126 | ||
45aa5a7f | 127 | static void __flash_write32(u32 value, void *addr) |
cdbaefb5 HS |
128 | { |
129 | __raw_writel(value, addr); | |
130 | } | |
131 | ||
45aa5a7f | 132 | static void __flash_write64(u64 value, void *addr) |
cdbaefb5 HS |
133 | { |
134 | /* No architectures currently implement __raw_writeq() */ | |
135 | *(volatile u64 *)addr = value; | |
136 | } | |
137 | ||
45aa5a7f | 138 | static u8 __flash_read8(void *addr) |
cdbaefb5 HS |
139 | { |
140 | return __raw_readb(addr); | |
141 | } | |
142 | ||
45aa5a7f | 143 | static u16 __flash_read16(void *addr) |
cdbaefb5 HS |
144 | { |
145 | return __raw_readw(addr); | |
146 | } | |
147 | ||
45aa5a7f | 148 | static u32 __flash_read32(void *addr) |
cdbaefb5 HS |
149 | { |
150 | return __raw_readl(addr); | |
151 | } | |
152 | ||
97bf85d7 | 153 | static u64 __flash_read64(void *addr) |
cdbaefb5 HS |
154 | { |
155 | /* No architectures currently implement __raw_readq() */ | |
156 | return *(volatile u64 *)addr; | |
157 | } | |
158 | ||
45aa5a7f SR |
159 | #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS |
160 | void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); | |
161 | void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); | |
162 | void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); | |
163 | void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); | |
164 | u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); | |
165 | u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); | |
166 | u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); | |
97bf85d7 | 167 | u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); |
45aa5a7f SR |
168 | #else |
169 | #define flash_write8 __flash_write8 | |
170 | #define flash_write16 __flash_write16 | |
171 | #define flash_write32 __flash_write32 | |
172 | #define flash_write64 __flash_write64 | |
173 | #define flash_read8 __flash_read8 | |
174 | #define flash_read16 __flash_read16 | |
175 | #define flash_read32 __flash_read32 | |
176 | #define flash_read64 __flash_read64 | |
177 | #endif | |
97bf85d7 | 178 | |
5653fc33 | 179 | /*----------------------------------------------------------------------- |
5653fc33 | 180 | */ |
6d0f6bcf | 181 | #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) |
4f975678 | 182 | flash_info_t *flash_get_info(ulong base) |
be60a902 HS |
183 | { |
184 | int i; | |
cba34aaf | 185 | flash_info_t *info = NULL; |
5653fc33 | 186 | |
6d0f6bcf | 187 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { |
be60a902 HS |
188 | info = & flash_info[i]; |
189 | if (info->size && info->start[0] <= base && | |
190 | base <= info->start[0] + info->size - 1) | |
191 | break; | |
192 | } | |
5653fc33 | 193 | |
cba34aaf | 194 | return info; |
be60a902 | 195 | } |
5653fc33 WD |
196 | #endif |
197 | ||
12d30aa7 HS |
198 | unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) |
199 | { | |
200 | if (sect != (info->sector_count - 1)) | |
201 | return info->start[sect + 1] - info->start[sect]; | |
202 | else | |
203 | return info->start[0] + info->size - info->start[sect]; | |
204 | } | |
205 | ||
bf9e3b38 WD |
206 | /*----------------------------------------------------------------------- |
207 | * create an address based on the offset and the port width | |
208 | */ | |
12d30aa7 HS |
209 | static inline void * |
210 | flash_map (flash_info_t * info, flash_sect_t sect, uint offset) | |
bf9e3b38 | 211 | { |
12d30aa7 HS |
212 | unsigned int byte_offset = offset * info->portwidth; |
213 | ||
09ce9921 | 214 | return (void *)(info->start[sect] + byte_offset); |
12d30aa7 HS |
215 | } |
216 | ||
217 | static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, | |
218 | unsigned int offset, void *addr) | |
219 | { | |
bf9e3b38 WD |
220 | } |
221 | ||
be60a902 HS |
222 | /*----------------------------------------------------------------------- |
223 | * make a proper sized command based on the port and chip widths | |
224 | */ | |
7288f972 | 225 | static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) |
be60a902 HS |
226 | { |
227 | int i; | |
93c56f21 VL |
228 | int cword_offset; |
229 | int cp_offset; | |
6d0f6bcf | 230 | #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
340ccb26 SS |
231 | u32 cmd_le = cpu_to_le32(cmd); |
232 | #endif | |
93c56f21 | 233 | uchar val; |
be60a902 HS |
234 | uchar *cp = (uchar *) cmdbuf; |
235 | ||
93c56f21 VL |
236 | for (i = info->portwidth; i > 0; i--){ |
237 | cword_offset = (info->portwidth-i)%info->chipwidth; | |
6d0f6bcf | 238 | #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
93c56f21 | 239 | cp_offset = info->portwidth - i; |
340ccb26 | 240 | val = *((uchar*)&cmd_le + cword_offset); |
be60a902 | 241 | #else |
93c56f21 | 242 | cp_offset = i - 1; |
7288f972 | 243 | val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); |
be60a902 | 244 | #endif |
7288f972 | 245 | cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; |
93c56f21 | 246 | } |
be60a902 HS |
247 | } |
248 | ||
5653fc33 | 249 | #ifdef DEBUG |
bf9e3b38 WD |
250 | /*----------------------------------------------------------------------- |
251 | * Debug support | |
252 | */ | |
3055793b | 253 | static void print_longlong (char *str, unsigned long long data) |
5653fc33 WD |
254 | { |
255 | int i; | |
256 | char *cp; | |
bf9e3b38 | 257 | |
657f2062 | 258 | cp = (char *) &data; |
bf9e3b38 WD |
259 | for (i = 0; i < 8; i++) |
260 | sprintf (&str[i * 2], "%2.2x", *cp++); | |
261 | } | |
be60a902 | 262 | |
e23741f4 | 263 | static void flash_printqry (struct cfi_qry *qry) |
bf9e3b38 | 264 | { |
e23741f4 | 265 | u8 *p = (u8 *)qry; |
bf9e3b38 WD |
266 | int x, y; |
267 | ||
e23741f4 HS |
268 | for (x = 0; x < sizeof(struct cfi_qry); x += 16) { |
269 | debug("%02x : ", x); | |
270 | for (y = 0; y < 16; y++) | |
271 | debug("%2.2x ", p[x + y]); | |
272 | debug(" "); | |
bf9e3b38 | 273 | for (y = 0; y < 16; y++) { |
e23741f4 HS |
274 | unsigned char c = p[x + y]; |
275 | if (c >= 0x20 && c <= 0x7e) | |
276 | debug("%c", c); | |
277 | else | |
278 | debug("."); | |
bf9e3b38 | 279 | } |
e23741f4 | 280 | debug("\n"); |
bf9e3b38 | 281 | } |
5653fc33 WD |
282 | } |
283 | #endif | |
284 | ||
285 | ||
5653fc33 WD |
286 | /*----------------------------------------------------------------------- |
287 | * read a character at a port width address | |
288 | */ | |
3055793b | 289 | static inline uchar flash_read_uchar (flash_info_t * info, uint offset) |
5653fc33 WD |
290 | { |
291 | uchar *cp; | |
12d30aa7 | 292 | uchar retval; |
bf9e3b38 | 293 | |
12d30aa7 | 294 | cp = flash_map (info, 0, offset); |
6d0f6bcf | 295 | #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
12d30aa7 | 296 | retval = flash_read8(cp); |
bf9e3b38 | 297 | #else |
12d30aa7 | 298 | retval = flash_read8(cp + info->portwidth - 1); |
bf9e3b38 | 299 | #endif |
12d30aa7 HS |
300 | flash_unmap (info, 0, offset, cp); |
301 | return retval; | |
5653fc33 WD |
302 | } |
303 | ||
90447ecb TK |
304 | /*----------------------------------------------------------------------- |
305 | * read a word at a port width address, assume 16bit bus | |
306 | */ | |
307 | static inline ushort flash_read_word (flash_info_t * info, uint offset) | |
308 | { | |
309 | ushort *addr, retval; | |
310 | ||
311 | addr = flash_map (info, 0, offset); | |
312 | retval = flash_read16 (addr); | |
313 | flash_unmap (info, 0, offset, addr); | |
314 | return retval; | |
315 | } | |
316 | ||
317 | ||
5653fc33 | 318 | /*----------------------------------------------------------------------- |
260421a2 | 319 | * read a long word by picking the least significant byte of each maximum |
5653fc33 WD |
320 | * port size word. Swap for ppc format. |
321 | */ | |
3055793b HS |
322 | static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, |
323 | uint offset) | |
5653fc33 | 324 | { |
bf9e3b38 WD |
325 | uchar *addr; |
326 | ulong retval; | |
327 | ||
328 | #ifdef DEBUG | |
329 | int x; | |
330 | #endif | |
12d30aa7 | 331 | addr = flash_map (info, sect, offset); |
5653fc33 | 332 | |
bf9e3b38 WD |
333 | #ifdef DEBUG |
334 | debug ("long addr is at %p info->portwidth = %d\n", addr, | |
335 | info->portwidth); | |
336 | for (x = 0; x < 4 * info->portwidth; x++) { | |
12d30aa7 | 337 | debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); |
bf9e3b38 WD |
338 | } |
339 | #endif | |
6d0f6bcf | 340 | #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
12d30aa7 HS |
341 | retval = ((flash_read8(addr) << 16) | |
342 | (flash_read8(addr + info->portwidth) << 24) | | |
343 | (flash_read8(addr + 2 * info->portwidth)) | | |
344 | (flash_read8(addr + 3 * info->portwidth) << 8)); | |
bf9e3b38 | 345 | #else |
12d30aa7 HS |
346 | retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | |
347 | (flash_read8(addr + info->portwidth - 1) << 16) | | |
348 | (flash_read8(addr + 4 * info->portwidth - 1) << 8) | | |
349 | (flash_read8(addr + 3 * info->portwidth - 1))); | |
bf9e3b38 | 350 | #endif |
12d30aa7 HS |
351 | flash_unmap(info, sect, offset, addr); |
352 | ||
bf9e3b38 | 353 | return retval; |
5653fc33 WD |
354 | } |
355 | ||
be60a902 HS |
356 | /* |
357 | * Write a proper sized command to the correct address | |
81b20ccc | 358 | */ |
fa36ae79 SR |
359 | void flash_write_cmd (flash_info_t * info, flash_sect_t sect, |
360 | uint offset, u32 cmd) | |
81b20ccc | 361 | { |
7e5b9b47 | 362 | |
cdbaefb5 | 363 | void *addr; |
be60a902 | 364 | cfiword_t cword; |
81b20ccc | 365 | |
12d30aa7 | 366 | addr = flash_map (info, sect, offset); |
be60a902 HS |
367 | flash_make_cmd (info, cmd, &cword); |
368 | switch (info->portwidth) { | |
369 | case FLASH_CFI_8BIT: | |
cdbaefb5 | 370 | debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, |
be60a902 | 371 | cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
cdbaefb5 | 372 | flash_write8(cword.c, addr); |
be60a902 HS |
373 | break; |
374 | case FLASH_CFI_16BIT: | |
cdbaefb5 | 375 | debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, |
be60a902 HS |
376 | cmd, cword.w, |
377 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); | |
cdbaefb5 | 378 | flash_write16(cword.w, addr); |
be60a902 HS |
379 | break; |
380 | case FLASH_CFI_32BIT: | |
cdbaefb5 | 381 | debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, |
be60a902 HS |
382 | cmd, cword.l, |
383 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); | |
cdbaefb5 | 384 | flash_write32(cword.l, addr); |
be60a902 HS |
385 | break; |
386 | case FLASH_CFI_64BIT: | |
387 | #ifdef DEBUG | |
388 | { | |
389 | char str[20]; | |
7e5b9b47 | 390 | |
be60a902 HS |
391 | print_longlong (str, cword.ll); |
392 | ||
393 | debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", | |
cdbaefb5 | 394 | addr, cmd, str, |
be60a902 | 395 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
81b20ccc | 396 | } |
be60a902 | 397 | #endif |
cdbaefb5 | 398 | flash_write64(cword.ll, addr); |
be60a902 | 399 | break; |
81b20ccc | 400 | } |
be60a902 HS |
401 | |
402 | /* Ensure all the instructions are fully finished */ | |
403 | sync(); | |
12d30aa7 HS |
404 | |
405 | flash_unmap(info, sect, offset, addr); | |
81b20ccc | 406 | } |
be60a902 HS |
407 | |
408 | static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) | |
81b20ccc | 409 | { |
be60a902 HS |
410 | flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); |
411 | flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); | |
81b20ccc | 412 | } |
81b20ccc | 413 | |
5653fc33 WD |
414 | /*----------------------------------------------------------------------- |
415 | */ | |
be60a902 HS |
416 | static int flash_isequal (flash_info_t * info, flash_sect_t sect, |
417 | uint offset, uchar cmd) | |
5653fc33 | 418 | { |
cdbaefb5 | 419 | void *addr; |
be60a902 HS |
420 | cfiword_t cword; |
421 | int retval; | |
5653fc33 | 422 | |
12d30aa7 | 423 | addr = flash_map (info, sect, offset); |
be60a902 | 424 | flash_make_cmd (info, cmd, &cword); |
2662b40c | 425 | |
cdbaefb5 | 426 | debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); |
be60a902 HS |
427 | switch (info->portwidth) { |
428 | case FLASH_CFI_8BIT: | |
cdbaefb5 HS |
429 | debug ("is= %x %x\n", flash_read8(addr), cword.c); |
430 | retval = (flash_read8(addr) == cword.c); | |
be60a902 HS |
431 | break; |
432 | case FLASH_CFI_16BIT: | |
cdbaefb5 HS |
433 | debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); |
434 | retval = (flash_read16(addr) == cword.w); | |
be60a902 HS |
435 | break; |
436 | case FLASH_CFI_32BIT: | |
52514699 | 437 | debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); |
cdbaefb5 | 438 | retval = (flash_read32(addr) == cword.l); |
be60a902 HS |
439 | break; |
440 | case FLASH_CFI_64BIT: | |
441 | #ifdef DEBUG | |
442 | { | |
443 | char str1[20]; | |
444 | char str2[20]; | |
81b20ccc | 445 | |
cdbaefb5 | 446 | print_longlong (str1, flash_read64(addr)); |
be60a902 HS |
447 | print_longlong (str2, cword.ll); |
448 | debug ("is= %s %s\n", str1, str2); | |
5653fc33 | 449 | } |
be60a902 | 450 | #endif |
cdbaefb5 | 451 | retval = (flash_read64(addr) == cword.ll); |
be60a902 HS |
452 | break; |
453 | default: | |
454 | retval = 0; | |
455 | break; | |
456 | } | |
12d30aa7 HS |
457 | flash_unmap(info, sect, offset, addr); |
458 | ||
be60a902 HS |
459 | return retval; |
460 | } | |
79b4cda0 | 461 | |
be60a902 HS |
462 | /*----------------------------------------------------------------------- |
463 | */ | |
464 | static int flash_isset (flash_info_t * info, flash_sect_t sect, | |
465 | uint offset, uchar cmd) | |
466 | { | |
cdbaefb5 | 467 | void *addr; |
be60a902 HS |
468 | cfiword_t cword; |
469 | int retval; | |
2662b40c | 470 | |
12d30aa7 | 471 | addr = flash_map (info, sect, offset); |
be60a902 HS |
472 | flash_make_cmd (info, cmd, &cword); |
473 | switch (info->portwidth) { | |
474 | case FLASH_CFI_8BIT: | |
cdbaefb5 | 475 | retval = ((flash_read8(addr) & cword.c) == cword.c); |
be60a902 HS |
476 | break; |
477 | case FLASH_CFI_16BIT: | |
cdbaefb5 | 478 | retval = ((flash_read16(addr) & cword.w) == cword.w); |
be60a902 HS |
479 | break; |
480 | case FLASH_CFI_32BIT: | |
47cc23cb | 481 | retval = ((flash_read32(addr) & cword.l) == cword.l); |
be60a902 HS |
482 | break; |
483 | case FLASH_CFI_64BIT: | |
cdbaefb5 | 484 | retval = ((flash_read64(addr) & cword.ll) == cword.ll); |
be60a902 HS |
485 | break; |
486 | default: | |
487 | retval = 0; | |
488 | break; | |
489 | } | |
12d30aa7 HS |
490 | flash_unmap(info, sect, offset, addr); |
491 | ||
be60a902 HS |
492 | return retval; |
493 | } | |
2662b40c | 494 | |
be60a902 HS |
495 | /*----------------------------------------------------------------------- |
496 | */ | |
497 | static int flash_toggle (flash_info_t * info, flash_sect_t sect, | |
498 | uint offset, uchar cmd) | |
499 | { | |
cdbaefb5 | 500 | void *addr; |
be60a902 HS |
501 | cfiword_t cword; |
502 | int retval; | |
656658dd | 503 | |
12d30aa7 | 504 | addr = flash_map (info, sect, offset); |
be60a902 HS |
505 | flash_make_cmd (info, cmd, &cword); |
506 | switch (info->portwidth) { | |
507 | case FLASH_CFI_8BIT: | |
fb8c061e | 508 | retval = flash_read8(addr) != flash_read8(addr); |
be60a902 HS |
509 | break; |
510 | case FLASH_CFI_16BIT: | |
fb8c061e | 511 | retval = flash_read16(addr) != flash_read16(addr); |
be60a902 HS |
512 | break; |
513 | case FLASH_CFI_32BIT: | |
fb8c061e | 514 | retval = flash_read32(addr) != flash_read32(addr); |
be60a902 HS |
515 | break; |
516 | case FLASH_CFI_64BIT: | |
9abda6ba WD |
517 | retval = ( (flash_read32( addr ) != flash_read32( addr )) || |
518 | (flash_read32(addr+4) != flash_read32(addr+4)) ); | |
be60a902 HS |
519 | break; |
520 | default: | |
521 | retval = 0; | |
522 | break; | |
523 | } | |
12d30aa7 HS |
524 | flash_unmap(info, sect, offset, addr); |
525 | ||
be60a902 | 526 | return retval; |
5653fc33 WD |
527 | } |
528 | ||
be60a902 HS |
529 | /* |
530 | * flash_is_busy - check to see if the flash is busy | |
531 | * | |
532 | * This routine checks the status of the chip and returns true if the | |
533 | * chip is busy. | |
7680c140 | 534 | */ |
be60a902 | 535 | static int flash_is_busy (flash_info_t * info, flash_sect_t sect) |
7680c140 | 536 | { |
be60a902 | 537 | int retval; |
7680c140 | 538 | |
be60a902 | 539 | switch (info->vendor) { |
9c048b52 | 540 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
be60a902 HS |
541 | case CFI_CMDSET_INTEL_STANDARD: |
542 | case CFI_CMDSET_INTEL_EXTENDED: | |
543 | retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); | |
544 | break; | |
545 | case CFI_CMDSET_AMD_STANDARD: | |
546 | case CFI_CMDSET_AMD_EXTENDED: | |
547 | #ifdef CONFIG_FLASH_CFI_LEGACY | |
548 | case CFI_CMDSET_AMD_LEGACY: | |
549 | #endif | |
550 | retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); | |
551 | break; | |
552 | default: | |
553 | retval = 0; | |
7680c140 | 554 | } |
be60a902 HS |
555 | debug ("flash_is_busy: %d\n", retval); |
556 | return retval; | |
7680c140 WD |
557 | } |
558 | ||
5653fc33 | 559 | /*----------------------------------------------------------------------- |
be60a902 HS |
560 | * wait for XSR.7 to be set. Time out with an error if it does not. |
561 | * This routine does not set the flash to read-array mode. | |
5653fc33 | 562 | */ |
be60a902 HS |
563 | static int flash_status_check (flash_info_t * info, flash_sect_t sector, |
564 | ulong tout, char *prompt) | |
5653fc33 | 565 | { |
be60a902 | 566 | ulong start; |
5653fc33 | 567 | |
6d0f6bcf | 568 | #if CONFIG_SYS_HZ != 1000 |
c40c94a3 RA |
569 | if ((ulong)CONFIG_SYS_HZ > 100000) |
570 | tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ | |
571 | else | |
572 | tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); | |
be60a902 | 573 | #endif |
5653fc33 | 574 | |
be60a902 | 575 | /* Wait for command completion */ |
22d6c8fa | 576 | reset_timer(); |
be60a902 HS |
577 | start = get_timer (0); |
578 | while (flash_is_busy (info, sector)) { | |
579 | if (get_timer (start) > tout) { | |
580 | printf ("Flash %s timeout at address %lx data %lx\n", | |
581 | prompt, info->start[sector], | |
582 | flash_read_long (info, sector, 0)); | |
583 | flash_write_cmd (info, sector, 0, info->cmd_reset); | |
584 | return ERR_TIMOUT; | |
5653fc33 | 585 | } |
be60a902 | 586 | udelay (1); /* also triggers watchdog */ |
5653fc33 | 587 | } |
be60a902 HS |
588 | return ERR_OK; |
589 | } | |
5653fc33 | 590 | |
be60a902 HS |
591 | /*----------------------------------------------------------------------- |
592 | * Wait for XSR.7 to be set, if it times out print an error, otherwise | |
593 | * do a full status check. | |
594 | * | |
595 | * This routine sets the flash to read-array mode. | |
596 | */ | |
597 | static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, | |
598 | ulong tout, char *prompt) | |
599 | { | |
600 | int retcode; | |
5653fc33 | 601 | |
be60a902 HS |
602 | retcode = flash_status_check (info, sector, tout, prompt); |
603 | switch (info->vendor) { | |
9c048b52 | 604 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
be60a902 HS |
605 | case CFI_CMDSET_INTEL_EXTENDED: |
606 | case CFI_CMDSET_INTEL_STANDARD: | |
0d01f66d | 607 | if ((retcode != ERR_OK) |
be60a902 HS |
608 | && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { |
609 | retcode = ERR_INVAL; | |
610 | printf ("Flash %s error at address %lx\n", prompt, | |
611 | info->start[sector]); | |
612 | if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | | |
613 | FLASH_STATUS_PSLBS)) { | |
614 | puts ("Command Sequence Error.\n"); | |
615 | } else if (flash_isset (info, sector, 0, | |
616 | FLASH_STATUS_ECLBS)) { | |
617 | puts ("Block Erase Error.\n"); | |
618 | retcode = ERR_NOT_ERASED; | |
619 | } else if (flash_isset (info, sector, 0, | |
620 | FLASH_STATUS_PSLBS)) { | |
621 | puts ("Locking Error\n"); | |
5653fc33 | 622 | } |
be60a902 HS |
623 | if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { |
624 | puts ("Block locked.\n"); | |
625 | retcode = ERR_PROTECTED; | |
626 | } | |
627 | if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) | |
628 | puts ("Vpp Low Error.\n"); | |
5653fc33 | 629 | } |
be60a902 HS |
630 | flash_write_cmd (info, sector, 0, info->cmd_reset); |
631 | break; | |
632 | default: | |
633 | break; | |
5653fc33 | 634 | } |
be60a902 | 635 | return retcode; |
5653fc33 WD |
636 | } |
637 | ||
e5720823 TC |
638 | static int use_flash_status_poll(flash_info_t *info) |
639 | { | |
640 | #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL | |
641 | if (info->vendor == CFI_CMDSET_AMD_EXTENDED || | |
642 | info->vendor == CFI_CMDSET_AMD_STANDARD) | |
643 | return 1; | |
644 | #endif | |
645 | return 0; | |
646 | } | |
647 | ||
648 | static int flash_status_poll(flash_info_t *info, void *src, void *dst, | |
649 | ulong tout, char *prompt) | |
650 | { | |
651 | #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL | |
652 | ulong start; | |
653 | int ready; | |
654 | ||
655 | #if CONFIG_SYS_HZ != 1000 | |
656 | if ((ulong)CONFIG_SYS_HZ > 100000) | |
657 | tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ | |
658 | else | |
659 | tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); | |
660 | #endif | |
661 | ||
662 | /* Wait for command completion */ | |
22d6c8fa | 663 | reset_timer(); |
e5720823 TC |
664 | start = get_timer(0); |
665 | while (1) { | |
666 | switch (info->portwidth) { | |
667 | case FLASH_CFI_8BIT: | |
668 | ready = flash_read8(dst) == flash_read8(src); | |
669 | break; | |
670 | case FLASH_CFI_16BIT: | |
671 | ready = flash_read16(dst) == flash_read16(src); | |
672 | break; | |
673 | case FLASH_CFI_32BIT: | |
674 | ready = flash_read32(dst) == flash_read32(src); | |
675 | break; | |
676 | case FLASH_CFI_64BIT: | |
677 | ready = flash_read64(dst) == flash_read64(src); | |
678 | break; | |
679 | default: | |
680 | ready = 0; | |
681 | break; | |
682 | } | |
683 | if (ready) | |
684 | break; | |
685 | if (get_timer(start) > tout) { | |
686 | printf("Flash %s timeout at address %lx data %lx\n", | |
687 | prompt, (ulong)dst, (ulong)flash_read8(dst)); | |
688 | return ERR_TIMOUT; | |
689 | } | |
690 | udelay(1); /* also triggers watchdog */ | |
691 | } | |
692 | #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ | |
693 | return ERR_OK; | |
694 | } | |
695 | ||
5653fc33 WD |
696 | /*----------------------------------------------------------------------- |
697 | */ | |
be60a902 | 698 | static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) |
5653fc33 | 699 | { |
6d0f6bcf | 700 | #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
be60a902 HS |
701 | unsigned short w; |
702 | unsigned int l; | |
703 | unsigned long long ll; | |
704 | #endif | |
5653fc33 | 705 | |
be60a902 HS |
706 | switch (info->portwidth) { |
707 | case FLASH_CFI_8BIT: | |
708 | cword->c = c; | |
709 | break; | |
710 | case FLASH_CFI_16BIT: | |
6d0f6bcf | 711 | #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
be60a902 HS |
712 | w = c; |
713 | w <<= 8; | |
714 | cword->w = (cword->w >> 8) | w; | |
715 | #else | |
716 | cword->w = (cword->w << 8) | c; | |
81b20ccc | 717 | #endif |
be60a902 HS |
718 | break; |
719 | case FLASH_CFI_32BIT: | |
6d0f6bcf | 720 | #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
be60a902 HS |
721 | l = c; |
722 | l <<= 24; | |
723 | cword->l = (cword->l >> 8) | l; | |
724 | #else | |
725 | cword->l = (cword->l << 8) | c; | |
726 | #endif | |
727 | break; | |
728 | case FLASH_CFI_64BIT: | |
6d0f6bcf | 729 | #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) |
be60a902 HS |
730 | ll = c; |
731 | ll <<= 56; | |
732 | cword->ll = (cword->ll >> 8) | ll; | |
733 | #else | |
734 | cword->ll = (cword->ll << 8) | c; | |
735 | #endif | |
736 | break; | |
260421a2 | 737 | } |
be60a902 | 738 | } |
5653fc33 | 739 | |
0f8e851e JG |
740 | /* |
741 | * Loop through the sector table starting from the previously found sector. | |
742 | * Searches forwards or backwards, dependent on the passed address. | |
be60a902 HS |
743 | */ |
744 | static flash_sect_t find_sector (flash_info_t * info, ulong addr) | |
745 | { | |
0f8e851e | 746 | static flash_sect_t saved_sector = 0; /* previously found sector */ |
af567301 | 747 | static flash_info_t *saved_info = 0; /* previously used flash bank */ |
0f8e851e JG |
748 | flash_sect_t sector = saved_sector; |
749 | ||
af567301 MK |
750 | if ((info != saved_info) || (sector >= info->sector_count)) |
751 | sector = 0; | |
752 | ||
0f8e851e JG |
753 | while ((info->start[sector] < addr) |
754 | && (sector < info->sector_count - 1)) | |
755 | sector++; | |
756 | while ((info->start[sector] > addr) && (sector > 0)) | |
757 | /* | |
758 | * also decrements the sector in case of an overshot | |
759 | * in the first loop | |
760 | */ | |
761 | sector--; | |
762 | ||
763 | saved_sector = sector; | |
af567301 | 764 | saved_info = info; |
be60a902 | 765 | return sector; |
5653fc33 WD |
766 | } |
767 | ||
768 | /*----------------------------------------------------------------------- | |
5653fc33 | 769 | */ |
be60a902 HS |
770 | static int flash_write_cfiword (flash_info_t * info, ulong dest, |
771 | cfiword_t cword) | |
5653fc33 | 772 | { |
09ce9921 | 773 | void *dstaddr = (void *)dest; |
be60a902 | 774 | int flag; |
a7292871 JG |
775 | flash_sect_t sect = 0; |
776 | char sect_found = 0; | |
5653fc33 | 777 | |
be60a902 HS |
778 | /* Check if Flash is (sufficiently) erased */ |
779 | switch (info->portwidth) { | |
780 | case FLASH_CFI_8BIT: | |
cdbaefb5 | 781 | flag = ((flash_read8(dstaddr) & cword.c) == cword.c); |
be60a902 HS |
782 | break; |
783 | case FLASH_CFI_16BIT: | |
cdbaefb5 | 784 | flag = ((flash_read16(dstaddr) & cword.w) == cword.w); |
be60a902 HS |
785 | break; |
786 | case FLASH_CFI_32BIT: | |
cdbaefb5 | 787 | flag = ((flash_read32(dstaddr) & cword.l) == cword.l); |
be60a902 HS |
788 | break; |
789 | case FLASH_CFI_64BIT: | |
cdbaefb5 | 790 | flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); |
be60a902 HS |
791 | break; |
792 | default: | |
12d30aa7 HS |
793 | flag = 0; |
794 | break; | |
5653fc33 | 795 | } |
09ce9921 | 796 | if (!flag) |
0dc80e27 | 797 | return ERR_NOT_ERASED; |
5653fc33 | 798 | |
be60a902 HS |
799 | /* Disable interrupts which might cause a timeout here */ |
800 | flag = disable_interrupts (); | |
79b4cda0 | 801 | |
be60a902 | 802 | switch (info->vendor) { |
9c048b52 | 803 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
be60a902 HS |
804 | case CFI_CMDSET_INTEL_EXTENDED: |
805 | case CFI_CMDSET_INTEL_STANDARD: | |
806 | flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); | |
807 | flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); | |
808 | break; | |
809 | case CFI_CMDSET_AMD_EXTENDED: | |
810 | case CFI_CMDSET_AMD_STANDARD: | |
0d01f66d ES |
811 | sect = find_sector(info, dest); |
812 | flash_unlock_seq (info, sect); | |
813 | flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); | |
a7292871 | 814 | sect_found = 1; |
be60a902 | 815 | break; |
b4db4a76 PYC |
816 | #ifdef CONFIG_FLASH_CFI_LEGACY |
817 | case CFI_CMDSET_AMD_LEGACY: | |
818 | sect = find_sector(info, dest); | |
819 | flash_unlock_seq (info, 0); | |
820 | flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); | |
821 | sect_found = 1; | |
822 | break; | |
823 | #endif | |
5653fc33 WD |
824 | } |
825 | ||
be60a902 HS |
826 | switch (info->portwidth) { |
827 | case FLASH_CFI_8BIT: | |
cdbaefb5 | 828 | flash_write8(cword.c, dstaddr); |
be60a902 HS |
829 | break; |
830 | case FLASH_CFI_16BIT: | |
cdbaefb5 | 831 | flash_write16(cword.w, dstaddr); |
be60a902 HS |
832 | break; |
833 | case FLASH_CFI_32BIT: | |
cdbaefb5 | 834 | flash_write32(cword.l, dstaddr); |
be60a902 HS |
835 | break; |
836 | case FLASH_CFI_64BIT: | |
cdbaefb5 | 837 | flash_write64(cword.ll, dstaddr); |
be60a902 | 838 | break; |
5653fc33 WD |
839 | } |
840 | ||
be60a902 HS |
841 | /* re-enable interrupts if necessary */ |
842 | if (flag) | |
843 | enable_interrupts (); | |
5653fc33 | 844 | |
a7292871 JG |
845 | if (!sect_found) |
846 | sect = find_sector (info, dest); | |
847 | ||
e5720823 TC |
848 | if (use_flash_status_poll(info)) |
849 | return flash_status_poll(info, &cword, dstaddr, | |
850 | info->write_tout, "write"); | |
851 | else | |
852 | return flash_full_status_check(info, sect, | |
853 | info->write_tout, "write"); | |
5653fc33 WD |
854 | } |
855 | ||
6d0f6bcf | 856 | #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
5653fc33 | 857 | |
be60a902 HS |
858 | static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, |
859 | int len) | |
5653fc33 | 860 | { |
be60a902 HS |
861 | flash_sect_t sector; |
862 | int cnt; | |
863 | int retcode; | |
cdbaefb5 | 864 | void *src = cp; |
ec21d5cf | 865 | void *dst = (void *)dest; |
0dc80e27 SR |
866 | void *dst2 = dst; |
867 | int flag = 0; | |
96ef831f GL |
868 | uint offset = 0; |
869 | unsigned int shift; | |
9c048b52 | 870 | uchar write_cmd; |
cdbaefb5 | 871 | |
0dc80e27 SR |
872 | switch (info->portwidth) { |
873 | case FLASH_CFI_8BIT: | |
96ef831f | 874 | shift = 0; |
0dc80e27 SR |
875 | break; |
876 | case FLASH_CFI_16BIT: | |
96ef831f | 877 | shift = 1; |
0dc80e27 SR |
878 | break; |
879 | case FLASH_CFI_32BIT: | |
96ef831f | 880 | shift = 2; |
0dc80e27 SR |
881 | break; |
882 | case FLASH_CFI_64BIT: | |
96ef831f | 883 | shift = 3; |
0dc80e27 SR |
884 | break; |
885 | default: | |
886 | retcode = ERR_INVAL; | |
887 | goto out_unmap; | |
888 | } | |
889 | ||
96ef831f GL |
890 | cnt = len >> shift; |
891 | ||
0dc80e27 SR |
892 | while ((cnt-- > 0) && (flag == 0)) { |
893 | switch (info->portwidth) { | |
894 | case FLASH_CFI_8BIT: | |
895 | flag = ((flash_read8(dst2) & flash_read8(src)) == | |
896 | flash_read8(src)); | |
897 | src += 1, dst2 += 1; | |
898 | break; | |
899 | case FLASH_CFI_16BIT: | |
900 | flag = ((flash_read16(dst2) & flash_read16(src)) == | |
901 | flash_read16(src)); | |
902 | src += 2, dst2 += 2; | |
903 | break; | |
904 | case FLASH_CFI_32BIT: | |
905 | flag = ((flash_read32(dst2) & flash_read32(src)) == | |
906 | flash_read32(src)); | |
907 | src += 4, dst2 += 4; | |
908 | break; | |
909 | case FLASH_CFI_64BIT: | |
910 | flag = ((flash_read64(dst2) & flash_read64(src)) == | |
911 | flash_read64(src)); | |
912 | src += 8, dst2 += 8; | |
913 | break; | |
914 | } | |
915 | } | |
916 | if (!flag) { | |
917 | retcode = ERR_NOT_ERASED; | |
918 | goto out_unmap; | |
919 | } | |
920 | ||
921 | src = cp; | |
cdbaefb5 | 922 | sector = find_sector (info, dest); |
bf9e3b38 WD |
923 | |
924 | switch (info->vendor) { | |
9c048b52 | 925 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
5653fc33 WD |
926 | case CFI_CMDSET_INTEL_STANDARD: |
927 | case CFI_CMDSET_INTEL_EXTENDED: | |
9c048b52 VL |
928 | write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? |
929 | FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; | |
be60a902 | 930 | flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
9c048b52 VL |
931 | flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); |
932 | flash_write_cmd (info, sector, 0, write_cmd); | |
be60a902 HS |
933 | retcode = flash_status_check (info, sector, |
934 | info->buffer_write_tout, | |
935 | "write to buffer"); | |
936 | if (retcode == ERR_OK) { | |
937 | /* reduce the number of loops by the width of | |
938 | * the port */ | |
96ef831f | 939 | cnt = len >> shift; |
93c56f21 | 940 | flash_write_cmd (info, sector, 0, cnt - 1); |
be60a902 HS |
941 | while (cnt-- > 0) { |
942 | switch (info->portwidth) { | |
943 | case FLASH_CFI_8BIT: | |
cdbaefb5 HS |
944 | flash_write8(flash_read8(src), dst); |
945 | src += 1, dst += 1; | |
be60a902 HS |
946 | break; |
947 | case FLASH_CFI_16BIT: | |
cdbaefb5 HS |
948 | flash_write16(flash_read16(src), dst); |
949 | src += 2, dst += 2; | |
be60a902 HS |
950 | break; |
951 | case FLASH_CFI_32BIT: | |
cdbaefb5 HS |
952 | flash_write32(flash_read32(src), dst); |
953 | src += 4, dst += 4; | |
be60a902 HS |
954 | break; |
955 | case FLASH_CFI_64BIT: | |
cdbaefb5 HS |
956 | flash_write64(flash_read64(src), dst); |
957 | src += 8, dst += 8; | |
be60a902 HS |
958 | break; |
959 | default: | |
12d30aa7 HS |
960 | retcode = ERR_INVAL; |
961 | goto out_unmap; | |
be60a902 HS |
962 | } |
963 | } | |
964 | flash_write_cmd (info, sector, 0, | |
965 | FLASH_CMD_WRITE_BUFFER_CONFIRM); | |
966 | retcode = flash_full_status_check ( | |
967 | info, sector, info->buffer_write_tout, | |
968 | "buffer write"); | |
969 | } | |
12d30aa7 HS |
970 | |
971 | break; | |
be60a902 | 972 | |
5653fc33 WD |
973 | case CFI_CMDSET_AMD_STANDARD: |
974 | case CFI_CMDSET_AMD_EXTENDED: | |
be60a902 | 975 | flash_unlock_seq(info,0); |
96ef831f GL |
976 | |
977 | #ifdef CONFIG_FLASH_SPANSION_S29WS_N | |
978 | offset = ((unsigned long)dst - info->start[sector]) >> shift; | |
979 | #endif | |
980 | flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); | |
981 | cnt = len >> shift; | |
7dedefdf | 982 | flash_write_cmd(info, sector, offset, cnt - 1); |
be60a902 HS |
983 | |
984 | switch (info->portwidth) { | |
985 | case FLASH_CFI_8BIT: | |
cdbaefb5 HS |
986 | while (cnt-- > 0) { |
987 | flash_write8(flash_read8(src), dst); | |
988 | src += 1, dst += 1; | |
989 | } | |
be60a902 HS |
990 | break; |
991 | case FLASH_CFI_16BIT: | |
cdbaefb5 HS |
992 | while (cnt-- > 0) { |
993 | flash_write16(flash_read16(src), dst); | |
994 | src += 2, dst += 2; | |
995 | } | |
be60a902 HS |
996 | break; |
997 | case FLASH_CFI_32BIT: | |
cdbaefb5 HS |
998 | while (cnt-- > 0) { |
999 | flash_write32(flash_read32(src), dst); | |
1000 | src += 4, dst += 4; | |
1001 | } | |
be60a902 HS |
1002 | break; |
1003 | case FLASH_CFI_64BIT: | |
cdbaefb5 HS |
1004 | while (cnt-- > 0) { |
1005 | flash_write64(flash_read64(src), dst); | |
1006 | src += 8, dst += 8; | |
1007 | } | |
be60a902 HS |
1008 | break; |
1009 | default: | |
12d30aa7 HS |
1010 | retcode = ERR_INVAL; |
1011 | goto out_unmap; | |
be60a902 HS |
1012 | } |
1013 | ||
1014 | flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); | |
e5720823 TC |
1015 | if (use_flash_status_poll(info)) |
1016 | retcode = flash_status_poll(info, src - (1 << shift), | |
1017 | dst - (1 << shift), | |
1018 | info->buffer_write_tout, | |
1019 | "buffer write"); | |
1020 | else | |
1021 | retcode = flash_full_status_check(info, sector, | |
1022 | info->buffer_write_tout, | |
1023 | "buffer write"); | |
12d30aa7 | 1024 | break; |
be60a902 | 1025 | |
5653fc33 | 1026 | default: |
be60a902 | 1027 | debug ("Unknown Command Set\n"); |
12d30aa7 HS |
1028 | retcode = ERR_INVAL; |
1029 | break; | |
5653fc33 | 1030 | } |
12d30aa7 HS |
1031 | |
1032 | out_unmap: | |
12d30aa7 | 1033 | return retcode; |
5653fc33 | 1034 | } |
6d0f6bcf | 1035 | #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ |
be60a902 | 1036 | |
bf9e3b38 | 1037 | |
5653fc33 | 1038 | /*----------------------------------------------------------------------- |
5653fc33 | 1039 | */ |
be60a902 | 1040 | int flash_erase (flash_info_t * info, int s_first, int s_last) |
5653fc33 | 1041 | { |
be60a902 HS |
1042 | int rcode = 0; |
1043 | int prot; | |
1044 | flash_sect_t sect; | |
e5720823 | 1045 | int st; |
5653fc33 | 1046 | |
be60a902 HS |
1047 | if (info->flash_id != FLASH_MAN_CFI) { |
1048 | puts ("Can't erase unknown flash type - aborted\n"); | |
1049 | return 1; | |
1050 | } | |
1051 | if ((s_first < 0) || (s_first > s_last)) { | |
1052 | puts ("- no sectors to erase\n"); | |
1053 | return 1; | |
1054 | } | |
2662b40c | 1055 | |
be60a902 HS |
1056 | prot = 0; |
1057 | for (sect = s_first; sect <= s_last; ++sect) { | |
1058 | if (info->protect[sect]) { | |
1059 | prot++; | |
5653fc33 WD |
1060 | } |
1061 | } | |
be60a902 HS |
1062 | if (prot) { |
1063 | printf ("- Warning: %d protected sectors will not be erased!\n", | |
1064 | prot); | |
6ea808ef | 1065 | } else if (flash_verbose) { |
be60a902 HS |
1066 | putc ('\n'); |
1067 | } | |
bf9e3b38 | 1068 | |
bf9e3b38 | 1069 | |
be60a902 HS |
1070 | for (sect = s_first; sect <= s_last; sect++) { |
1071 | if (info->protect[sect] == 0) { /* not protected */ | |
1072 | switch (info->vendor) { | |
9c048b52 | 1073 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
be60a902 HS |
1074 | case CFI_CMDSET_INTEL_STANDARD: |
1075 | case CFI_CMDSET_INTEL_EXTENDED: | |
1076 | flash_write_cmd (info, sect, 0, | |
1077 | FLASH_CMD_CLEAR_STATUS); | |
1078 | flash_write_cmd (info, sect, 0, | |
1079 | FLASH_CMD_BLOCK_ERASE); | |
1080 | flash_write_cmd (info, sect, 0, | |
1081 | FLASH_CMD_ERASE_CONFIRM); | |
1082 | break; | |
1083 | case CFI_CMDSET_AMD_STANDARD: | |
1084 | case CFI_CMDSET_AMD_EXTENDED: | |
1085 | flash_unlock_seq (info, sect); | |
1086 | flash_write_cmd (info, sect, | |
1087 | info->addr_unlock1, | |
1088 | AMD_CMD_ERASE_START); | |
1089 | flash_unlock_seq (info, sect); | |
1090 | flash_write_cmd (info, sect, 0, | |
1091 | AMD_CMD_ERASE_SECTOR); | |
1092 | break; | |
1093 | #ifdef CONFIG_FLASH_CFI_LEGACY | |
1094 | case CFI_CMDSET_AMD_LEGACY: | |
1095 | flash_unlock_seq (info, 0); | |
1096 | flash_write_cmd (info, 0, info->addr_unlock1, | |
1097 | AMD_CMD_ERASE_START); | |
1098 | flash_unlock_seq (info, 0); | |
1099 | flash_write_cmd (info, sect, 0, | |
1100 | AMD_CMD_ERASE_SECTOR); | |
1101 | break; | |
1102 | #endif | |
1103 | default: | |
1104 | debug ("Unkown flash vendor %d\n", | |
1105 | info->vendor); | |
1106 | break; | |
bf9e3b38 | 1107 | } |
be60a902 | 1108 | |
e5720823 TC |
1109 | if (use_flash_status_poll(info)) { |
1110 | cfiword_t cword = (cfiword_t)0xffffffffffffffffULL; | |
1111 | void *dest; | |
1112 | dest = flash_map(info, sect, 0); | |
1113 | st = flash_status_poll(info, &cword, dest, | |
1114 | info->erase_blk_tout, "erase"); | |
1115 | flash_unmap(info, sect, 0, dest); | |
1116 | } else | |
1117 | st = flash_full_status_check(info, sect, | |
1118 | info->erase_blk_tout, | |
1119 | "erase"); | |
1120 | if (st) | |
be60a902 | 1121 | rcode = 1; |
e5720823 | 1122 | else if (flash_verbose) |
be60a902 | 1123 | putc ('.'); |
5653fc33 | 1124 | } |
5653fc33 | 1125 | } |
6ea808ef PZ |
1126 | |
1127 | if (flash_verbose) | |
1128 | puts (" done\n"); | |
1129 | ||
be60a902 | 1130 | return rcode; |
5653fc33 | 1131 | } |
bf9e3b38 | 1132 | |
70084df7 SR |
1133 | #ifdef CONFIG_SYS_FLASH_EMPTY_INFO |
1134 | static int sector_erased(flash_info_t *info, int i) | |
1135 | { | |
1136 | int k; | |
1137 | int size; | |
4d2ca9d6 | 1138 | u32 *flash; |
70084df7 SR |
1139 | |
1140 | /* | |
1141 | * Check if whole sector is erased | |
1142 | */ | |
1143 | size = flash_sector_size(info, i); | |
4d2ca9d6 | 1144 | flash = (u32 *)info->start[i]; |
70084df7 SR |
1145 | /* divide by 4 for longword access */ |
1146 | size = size >> 2; | |
1147 | ||
1148 | for (k = 0; k < size; k++) { | |
4d2ca9d6 | 1149 | if (flash_read32(flash++) != 0xffffffff) |
70084df7 SR |
1150 | return 0; /* not erased */ |
1151 | } | |
1152 | ||
1153 | return 1; /* erased */ | |
1154 | } | |
1155 | #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */ | |
1156 | ||
be60a902 | 1157 | void flash_print_info (flash_info_t * info) |
5653fc33 | 1158 | { |
be60a902 | 1159 | int i; |
4d13cbad | 1160 | |
be60a902 HS |
1161 | if (info->flash_id != FLASH_MAN_CFI) { |
1162 | puts ("missing or unknown FLASH type\n"); | |
1163 | return; | |
1164 | } | |
1165 | ||
eddf52b5 | 1166 | printf ("%s flash (%d x %d)", |
be60a902 HS |
1167 | info->name, |
1168 | (info->portwidth << 3), (info->chipwidth << 3)); | |
1169 | if (info->size < 1024*1024) | |
1170 | printf (" Size: %ld kB in %d Sectors\n", | |
1171 | info->size >> 10, info->sector_count); | |
1172 | else | |
1173 | printf (" Size: %ld MB in %d Sectors\n", | |
1174 | info->size >> 20, info->sector_count); | |
1175 | printf (" "); | |
1176 | switch (info->vendor) { | |
9c048b52 VL |
1177 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
1178 | printf ("Intel Prog Regions"); | |
1179 | break; | |
be60a902 HS |
1180 | case CFI_CMDSET_INTEL_STANDARD: |
1181 | printf ("Intel Standard"); | |
1182 | break; | |
1183 | case CFI_CMDSET_INTEL_EXTENDED: | |
1184 | printf ("Intel Extended"); | |
1185 | break; | |
1186 | case CFI_CMDSET_AMD_STANDARD: | |
1187 | printf ("AMD Standard"); | |
1188 | break; | |
1189 | case CFI_CMDSET_AMD_EXTENDED: | |
1190 | printf ("AMD Extended"); | |
1191 | break; | |
1192 | #ifdef CONFIG_FLASH_CFI_LEGACY | |
1193 | case CFI_CMDSET_AMD_LEGACY: | |
1194 | printf ("AMD Legacy"); | |
1195 | break; | |
4d13cbad | 1196 | #endif |
be60a902 HS |
1197 | default: |
1198 | printf ("Unknown (%d)", info->vendor); | |
1199 | break; | |
1200 | } | |
d77c7ac4 PDM |
1201 | printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x", |
1202 | info->manufacturer_id); | |
1203 | printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", | |
1204 | info->device_id); | |
be60a902 HS |
1205 | if (info->device_id == 0x7E) { |
1206 | printf("%04X", info->device_id2); | |
1207 | } | |
1208 | printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", | |
1209 | info->erase_blk_tout, | |
1210 | info->write_tout); | |
1211 | if (info->buffer_size > 1) { | |
1212 | printf (" Buffer write timeout: %ld ms, " | |
1213 | "buffer size: %d bytes\n", | |
1214 | info->buffer_write_tout, | |
1215 | info->buffer_size); | |
5653fc33 | 1216 | } |
5653fc33 | 1217 | |
be60a902 HS |
1218 | puts ("\n Sector Start Addresses:"); |
1219 | for (i = 0; i < info->sector_count; ++i) { | |
2e97394a | 1220 | if (ctrlc()) |
70084df7 | 1221 | break; |
be60a902 | 1222 | if ((i % 5) == 0) |
70084df7 | 1223 | putc('\n'); |
6d0f6bcf | 1224 | #ifdef CONFIG_SYS_FLASH_EMPTY_INFO |
be60a902 HS |
1225 | /* print empty and read-only info */ |
1226 | printf (" %08lX %c %s ", | |
1227 | info->start[i], | |
70084df7 | 1228 | sector_erased(info, i) ? 'E' : ' ', |
be60a902 | 1229 | info->protect[i] ? "RO" : " "); |
6d0f6bcf | 1230 | #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ |
be60a902 HS |
1231 | printf (" %08lX %s ", |
1232 | info->start[i], | |
1233 | info->protect[i] ? "RO" : " "); | |
bf9e3b38 | 1234 | #endif |
be60a902 HS |
1235 | } |
1236 | putc ('\n'); | |
1237 | return; | |
5653fc33 WD |
1238 | } |
1239 | ||
9a042e9c JVB |
1240 | /*----------------------------------------------------------------------- |
1241 | * This is used in a few places in write_buf() to show programming | |
1242 | * progress. Making it a function is nasty because it needs to do side | |
1243 | * effect updates to digit and dots. Repeated code is nasty too, so | |
1244 | * we define it once here. | |
1245 | */ | |
f0105727 SR |
1246 | #ifdef CONFIG_FLASH_SHOW_PROGRESS |
1247 | #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ | |
6ea808ef PZ |
1248 | if (flash_verbose) { \ |
1249 | dots -= dots_sub; \ | |
1250 | if ((scale > 0) && (dots <= 0)) { \ | |
1251 | if ((digit % 5) == 0) \ | |
1252 | printf ("%d", digit / 5); \ | |
1253 | else \ | |
1254 | putc ('.'); \ | |
1255 | digit--; \ | |
1256 | dots += scale; \ | |
1257 | } \ | |
9a042e9c | 1258 | } |
f0105727 SR |
1259 | #else |
1260 | #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) | |
1261 | #endif | |
9a042e9c | 1262 | |
be60a902 HS |
1263 | /*----------------------------------------------------------------------- |
1264 | * Copy memory to flash, returns: | |
1265 | * 0 - OK | |
1266 | * 1 - write timeout | |
1267 | * 2 - Flash not erased | |
5653fc33 | 1268 | */ |
be60a902 | 1269 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
5653fc33 | 1270 | { |
be60a902 | 1271 | ulong wp; |
12d30aa7 | 1272 | uchar *p; |
be60a902 | 1273 | int aln; |
5653fc33 | 1274 | cfiword_t cword; |
be60a902 | 1275 | int i, rc; |
6d0f6bcf | 1276 | #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
be60a902 | 1277 | int buffered_size; |
5653fc33 | 1278 | #endif |
9a042e9c JVB |
1279 | #ifdef CONFIG_FLASH_SHOW_PROGRESS |
1280 | int digit = CONFIG_FLASH_SHOW_PROGRESS; | |
1281 | int scale = 0; | |
1282 | int dots = 0; | |
1283 | ||
1284 | /* | |
1285 | * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. | |
1286 | */ | |
1287 | if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { | |
1288 | scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / | |
1289 | CONFIG_FLASH_SHOW_PROGRESS); | |
1290 | } | |
1291 | #endif | |
1292 | ||
be60a902 HS |
1293 | /* get lower aligned address */ |
1294 | wp = (addr & ~(info->portwidth - 1)); | |
3a197b2f | 1295 | |
be60a902 HS |
1296 | /* handle unaligned start */ |
1297 | if ((aln = addr - wp) != 0) { | |
1298 | cword.l = 0; | |
09ce9921 | 1299 | p = (uchar *)wp; |
12d30aa7 HS |
1300 | for (i = 0; i < aln; ++i) |
1301 | flash_add_byte (info, &cword, flash_read8(p + i)); | |
5653fc33 | 1302 | |
be60a902 HS |
1303 | for (; (i < info->portwidth) && (cnt > 0); i++) { |
1304 | flash_add_byte (info, &cword, *src++); | |
1305 | cnt--; | |
be60a902 | 1306 | } |
12d30aa7 HS |
1307 | for (; (cnt == 0) && (i < info->portwidth); ++i) |
1308 | flash_add_byte (info, &cword, flash_read8(p + i)); | |
1309 | ||
1310 | rc = flash_write_cfiword (info, wp, cword); | |
12d30aa7 | 1311 | if (rc != 0) |
be60a902 | 1312 | return rc; |
12d30aa7 HS |
1313 | |
1314 | wp += i; | |
f0105727 | 1315 | FLASH_SHOW_PROGRESS(scale, dots, digit, i); |
be60a902 HS |
1316 | } |
1317 | ||
1318 | /* handle the aligned part */ | |
6d0f6bcf | 1319 | #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
be60a902 HS |
1320 | buffered_size = (info->portwidth / info->chipwidth); |
1321 | buffered_size *= info->buffer_size; | |
1322 | while (cnt >= info->portwidth) { | |
1323 | /* prohibit buffer write when buffer_size is 1 */ | |
1324 | if (info->buffer_size == 1) { | |
1325 | cword.l = 0; | |
1326 | for (i = 0; i < info->portwidth; i++) | |
1327 | flash_add_byte (info, &cword, *src++); | |
1328 | if ((rc = flash_write_cfiword (info, wp, cword)) != 0) | |
1329 | return rc; | |
1330 | wp += info->portwidth; | |
1331 | cnt -= info->portwidth; | |
1332 | continue; | |
1333 | } | |
1334 | ||
1335 | /* write buffer until next buffered_size aligned boundary */ | |
1336 | i = buffered_size - (wp % buffered_size); | |
1337 | if (i > cnt) | |
1338 | i = cnt; | |
1339 | if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) | |
1340 | return rc; | |
1341 | i -= i & (info->portwidth - 1); | |
1342 | wp += i; | |
1343 | src += i; | |
1344 | cnt -= i; | |
f0105727 | 1345 | FLASH_SHOW_PROGRESS(scale, dots, digit, i); |
be60a902 HS |
1346 | } |
1347 | #else | |
1348 | while (cnt >= info->portwidth) { | |
1349 | cword.l = 0; | |
1350 | for (i = 0; i < info->portwidth; i++) { | |
1351 | flash_add_byte (info, &cword, *src++); | |
1352 | } | |
1353 | if ((rc = flash_write_cfiword (info, wp, cword)) != 0) | |
1354 | return rc; | |
1355 | wp += info->portwidth; | |
1356 | cnt -= info->portwidth; | |
f0105727 | 1357 | FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); |
be60a902 | 1358 | } |
6d0f6bcf | 1359 | #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ |
9a042e9c | 1360 | |
be60a902 HS |
1361 | if (cnt == 0) { |
1362 | return (0); | |
1363 | } | |
1364 | ||
1365 | /* | |
1366 | * handle unaligned tail bytes | |
1367 | */ | |
1368 | cword.l = 0; | |
09ce9921 | 1369 | p = (uchar *)wp; |
12d30aa7 | 1370 | for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { |
be60a902 HS |
1371 | flash_add_byte (info, &cword, *src++); |
1372 | --cnt; | |
1373 | } | |
12d30aa7 HS |
1374 | for (; i < info->portwidth; ++i) |
1375 | flash_add_byte (info, &cword, flash_read8(p + i)); | |
be60a902 HS |
1376 | |
1377 | return flash_write_cfiword (info, wp, cword); | |
5653fc33 | 1378 | } |
bf9e3b38 | 1379 | |
5653fc33 WD |
1380 | /*----------------------------------------------------------------------- |
1381 | */ | |
6d0f6bcf | 1382 | #ifdef CONFIG_SYS_FLASH_PROTECTION |
be60a902 HS |
1383 | |
1384 | int flash_real_protect (flash_info_t * info, long sector, int prot) | |
5653fc33 | 1385 | { |
be60a902 | 1386 | int retcode = 0; |
5653fc33 | 1387 | |
bc9019e1 RC |
1388 | switch (info->vendor) { |
1389 | case CFI_CMDSET_INTEL_PROG_REGIONS: | |
1390 | case CFI_CMDSET_INTEL_STANDARD: | |
9e8e63cc | 1391 | case CFI_CMDSET_INTEL_EXTENDED: |
54652991 PDM |
1392 | /* |
1393 | * see errata called | |
1394 | * "Numonyx Axcell P33/P30 Specification Update" :) | |
1395 | */ | |
1396 | flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID); | |
1397 | if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT, | |
1398 | prot)) { | |
1399 | /* | |
1400 | * cmd must come before FLASH_CMD_PROTECT + 20us | |
1401 | * Disable interrupts which might cause a timeout here. | |
1402 | */ | |
1403 | int flag = disable_interrupts (); | |
1404 | unsigned short cmd; | |
1405 | ||
1406 | if (prot) | |
1407 | cmd = FLASH_CMD_PROTECT_SET; | |
1408 | else | |
1409 | cmd = FLASH_CMD_PROTECT_CLEAR; | |
1410 | ||
bc9019e1 | 1411 | flash_write_cmd (info, sector, 0, |
54652991 PDM |
1412 | FLASH_CMD_PROTECT); |
1413 | flash_write_cmd (info, sector, 0, cmd); | |
1414 | /* re-enable interrupts if necessary */ | |
1415 | if (flag) | |
1416 | enable_interrupts (); | |
1417 | } | |
bc9019e1 RC |
1418 | break; |
1419 | case CFI_CMDSET_AMD_EXTENDED: | |
1420 | case CFI_CMDSET_AMD_STANDARD: | |
bc9019e1 RC |
1421 | /* U-Boot only checks the first byte */ |
1422 | if (info->manufacturer_id == (uchar)ATM_MANUFACT) { | |
1423 | if (prot) { | |
1424 | flash_unlock_seq (info, 0); | |
1425 | flash_write_cmd (info, 0, | |
1426 | info->addr_unlock1, | |
1427 | ATM_CMD_SOFTLOCK_START); | |
1428 | flash_unlock_seq (info, 0); | |
1429 | flash_write_cmd (info, sector, 0, | |
1430 | ATM_CMD_LOCK_SECT); | |
1431 | } else { | |
1432 | flash_write_cmd (info, 0, | |
1433 | info->addr_unlock1, | |
1434 | AMD_CMD_UNLOCK_START); | |
1435 | if (info->device_id == ATM_ID_BV6416) | |
1436 | flash_write_cmd (info, sector, | |
1437 | 0, ATM_CMD_UNLOCK_SECT); | |
1438 | } | |
1439 | } | |
1440 | break; | |
4e00acde TL |
1441 | #ifdef CONFIG_FLASH_CFI_LEGACY |
1442 | case CFI_CMDSET_AMD_LEGACY: | |
1443 | flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); | |
1444 | flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); | |
1445 | if (prot) | |
1446 | flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); | |
1447 | else | |
1448 | flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); | |
1449 | #endif | |
bc9019e1 | 1450 | }; |
bf9e3b38 | 1451 | |
df4e813b SR |
1452 | /* |
1453 | * Flash needs to be in status register read mode for | |
1454 | * flash_full_status_check() to work correctly | |
1455 | */ | |
1456 | flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS); | |
be60a902 HS |
1457 | if ((retcode = |
1458 | flash_full_status_check (info, sector, info->erase_blk_tout, | |
1459 | prot ? "protect" : "unprotect")) == 0) { | |
bf9e3b38 | 1460 | |
be60a902 HS |
1461 | info->protect[sector] = prot; |
1462 | ||
1463 | /* | |
1464 | * On some of Intel's flash chips (marked via legacy_unlock) | |
1465 | * unprotect unprotects all locking. | |
1466 | */ | |
1467 | if ((prot == 0) && (info->legacy_unlock)) { | |
1468 | flash_sect_t i; | |
1469 | ||
1470 | for (i = 0; i < info->sector_count; i++) { | |
1471 | if (info->protect[i]) | |
1472 | flash_real_protect (info, i, 1); | |
1473 | } | |
5653fc33 | 1474 | } |
5653fc33 | 1475 | } |
be60a902 | 1476 | return retcode; |
5653fc33 | 1477 | } |
bf9e3b38 | 1478 | |
5653fc33 | 1479 | /*----------------------------------------------------------------------- |
be60a902 | 1480 | * flash_read_user_serial - read the OneTimeProgramming cells |
5653fc33 | 1481 | */ |
be60a902 HS |
1482 | void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, |
1483 | int len) | |
5653fc33 | 1484 | { |
be60a902 HS |
1485 | uchar *src; |
1486 | uchar *dst; | |
bf9e3b38 | 1487 | |
be60a902 | 1488 | dst = buffer; |
12d30aa7 | 1489 | src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); |
be60a902 HS |
1490 | flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); |
1491 | memcpy (dst, src + offset, len); | |
1492 | flash_write_cmd (info, 0, 0, info->cmd_reset); | |
12d30aa7 | 1493 | flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); |
5653fc33 WD |
1494 | } |
1495 | ||
be60a902 HS |
1496 | /* |
1497 | * flash_read_factory_serial - read the device Id from the protection area | |
5653fc33 | 1498 | */ |
be60a902 HS |
1499 | void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, |
1500 | int len) | |
5653fc33 | 1501 | { |
be60a902 | 1502 | uchar *src; |
bf9e3b38 | 1503 | |
12d30aa7 | 1504 | src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); |
be60a902 HS |
1505 | flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); |
1506 | memcpy (buffer, src + offset, len); | |
1507 | flash_write_cmd (info, 0, 0, info->cmd_reset); | |
12d30aa7 | 1508 | flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); |
5653fc33 WD |
1509 | } |
1510 | ||
6d0f6bcf | 1511 | #endif /* CONFIG_SYS_FLASH_PROTECTION */ |
be60a902 | 1512 | |
0ddf06dd HS |
1513 | /*----------------------------------------------------------------------- |
1514 | * Reverse the order of the erase regions in the CFI QRY structure. | |
1515 | * This is needed for chips that are either a) correctly detected as | |
1516 | * top-boot, or b) buggy. | |
1517 | */ | |
1518 | static void cfi_reverse_geometry(struct cfi_qry *qry) | |
1519 | { | |
1520 | unsigned int i, j; | |
1521 | u32 tmp; | |
1522 | ||
1523 | for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { | |
1524 | tmp = qry->erase_region_info[i]; | |
1525 | qry->erase_region_info[i] = qry->erase_region_info[j]; | |
1526 | qry->erase_region_info[j] = tmp; | |
1527 | } | |
1528 | } | |
be60a902 | 1529 | |
260421a2 SR |
1530 | /*----------------------------------------------------------------------- |
1531 | * read jedec ids from device and set corresponding fields in info struct | |
1532 | * | |
1533 | * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct | |
1534 | * | |
0ddf06dd HS |
1535 | */ |
1536 | static void cmdset_intel_read_jedec_ids(flash_info_t *info) | |
1537 | { | |
1538 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); | |
1539 | flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); | |
1540 | udelay(1000); /* some flash are slow to respond */ | |
1541 | info->manufacturer_id = flash_read_uchar (info, | |
1542 | FLASH_OFFSET_MANUFACTURER_ID); | |
d77c7ac4 PDM |
1543 | info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ? |
1544 | flash_read_word (info, FLASH_OFFSET_DEVICE_ID) : | |
1545 | flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID); | |
0ddf06dd HS |
1546 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
1547 | } | |
1548 | ||
1549 | static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) | |
1550 | { | |
1551 | info->cmd_reset = FLASH_CMD_RESET; | |
1552 | ||
1553 | cmdset_intel_read_jedec_ids(info); | |
1554 | flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); | |
1555 | ||
6d0f6bcf | 1556 | #ifdef CONFIG_SYS_FLASH_PROTECTION |
0ddf06dd HS |
1557 | /* read legacy lock/unlock bit from intel flash */ |
1558 | if (info->ext_addr) { | |
1559 | info->legacy_unlock = flash_read_uchar (info, | |
1560 | info->ext_addr + 5) & 0x08; | |
1561 | } | |
1562 | #endif | |
1563 | ||
1564 | return 0; | |
1565 | } | |
1566 | ||
1567 | static void cmdset_amd_read_jedec_ids(flash_info_t *info) | |
1568 | { | |
3a7b2c21 NG |
1569 | ushort bankId = 0; |
1570 | uchar manuId; | |
1571 | ||
0ddf06dd HS |
1572 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); |
1573 | flash_unlock_seq(info, 0); | |
1574 | flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); | |
1575 | udelay(1000); /* some flash are slow to respond */ | |
90447ecb | 1576 | |
3a7b2c21 NG |
1577 | manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); |
1578 | /* JEDEC JEP106Z specifies ID codes up to bank 7 */ | |
1579 | while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { | |
1580 | bankId += 0x100; | |
1581 | manuId = flash_read_uchar (info, | |
1582 | bankId | FLASH_OFFSET_MANUFACTURER_ID); | |
1583 | } | |
1584 | info->manufacturer_id = manuId; | |
90447ecb TK |
1585 | |
1586 | switch (info->chipwidth){ | |
1587 | case FLASH_CFI_8BIT: | |
1588 | info->device_id = flash_read_uchar (info, | |
1589 | FLASH_OFFSET_DEVICE_ID); | |
1590 | if (info->device_id == 0x7E) { | |
1591 | /* AMD 3-byte (expanded) device ids */ | |
1592 | info->device_id2 = flash_read_uchar (info, | |
1593 | FLASH_OFFSET_DEVICE_ID2); | |
1594 | info->device_id2 <<= 8; | |
1595 | info->device_id2 |= flash_read_uchar (info, | |
1596 | FLASH_OFFSET_DEVICE_ID3); | |
1597 | } | |
1598 | break; | |
1599 | case FLASH_CFI_16BIT: | |
1600 | info->device_id = flash_read_word (info, | |
1601 | FLASH_OFFSET_DEVICE_ID); | |
1602 | break; | |
1603 | default: | |
1604 | break; | |
0ddf06dd HS |
1605 | } |
1606 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); | |
1607 | } | |
1608 | ||
1609 | static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) | |
1610 | { | |
1611 | info->cmd_reset = AMD_CMD_RESET; | |
1612 | ||
1613 | cmdset_amd_read_jedec_ids(info); | |
1614 | flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); | |
1615 | ||
0ddf06dd HS |
1616 | return 0; |
1617 | } | |
1618 | ||
1619 | #ifdef CONFIG_FLASH_CFI_LEGACY | |
260421a2 SR |
1620 | static void flash_read_jedec_ids (flash_info_t * info) |
1621 | { | |
1622 | info->manufacturer_id = 0; | |
1623 | info->device_id = 0; | |
1624 | info->device_id2 = 0; | |
1625 | ||
1626 | switch (info->vendor) { | |
9c048b52 | 1627 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
260421a2 SR |
1628 | case CFI_CMDSET_INTEL_STANDARD: |
1629 | case CFI_CMDSET_INTEL_EXTENDED: | |
8225d1e3 | 1630 | cmdset_intel_read_jedec_ids(info); |
260421a2 SR |
1631 | break; |
1632 | case CFI_CMDSET_AMD_STANDARD: | |
1633 | case CFI_CMDSET_AMD_EXTENDED: | |
8225d1e3 | 1634 | cmdset_amd_read_jedec_ids(info); |
260421a2 SR |
1635 | break; |
1636 | default: | |
1637 | break; | |
1638 | } | |
1639 | } | |
1640 | ||
5653fc33 | 1641 | /*----------------------------------------------------------------------- |
be60a902 HS |
1642 | * Call board code to request info about non-CFI flash. |
1643 | * board_flash_get_legacy needs to fill in at least: | |
1644 | * info->portwidth, info->chipwidth and info->interface for Jedec probing. | |
7e5b9b47 | 1645 | */ |
09ce9921 | 1646 | static int flash_detect_legacy(phys_addr_t base, int banknum) |
5653fc33 | 1647 | { |
be60a902 | 1648 | flash_info_t *info = &flash_info[banknum]; |
7e5b9b47 | 1649 | |
be60a902 HS |
1650 | if (board_flash_get_legacy(base, banknum, info)) { |
1651 | /* board code may have filled info completely. If not, we | |
1652 | use JEDEC ID probing. */ | |
1653 | if (!info->vendor) { | |
1654 | int modes[] = { | |
1655 | CFI_CMDSET_AMD_STANDARD, | |
1656 | CFI_CMDSET_INTEL_STANDARD | |
1657 | }; | |
1658 | int i; | |
7e5b9b47 | 1659 | |
be60a902 HS |
1660 | for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { |
1661 | info->vendor = modes[i]; | |
09ce9921 BB |
1662 | info->start[0] = |
1663 | (ulong)map_physmem(base, | |
e1fb6d0d | 1664 | info->portwidth, |
09ce9921 | 1665 | MAP_NOCACHE); |
be60a902 HS |
1666 | if (info->portwidth == FLASH_CFI_8BIT |
1667 | && info->interface == FLASH_CFI_X8X16) { | |
1668 | info->addr_unlock1 = 0x2AAA; | |
1669 | info->addr_unlock2 = 0x5555; | |
1670 | } else { | |
1671 | info->addr_unlock1 = 0x5555; | |
1672 | info->addr_unlock2 = 0x2AAA; | |
1673 | } | |
1674 | flash_read_jedec_ids(info); | |
1675 | debug("JEDEC PROBE: ID %x %x %x\n", | |
1676 | info->manufacturer_id, | |
1677 | info->device_id, | |
1678 | info->device_id2); | |
09ce9921 | 1679 | if (jedec_flash_match(info, info->start[0])) |
be60a902 | 1680 | break; |
09ce9921 | 1681 | else |
e1fb6d0d | 1682 | unmap_physmem((void *)info->start[0], |
09ce9921 | 1683 | MAP_NOCACHE); |
be60a902 HS |
1684 | } |
1685 | } | |
1686 | ||
1687 | switch(info->vendor) { | |
9c048b52 | 1688 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
be60a902 HS |
1689 | case CFI_CMDSET_INTEL_STANDARD: |
1690 | case CFI_CMDSET_INTEL_EXTENDED: | |
1691 | info->cmd_reset = FLASH_CMD_RESET; | |
1692 | break; | |
1693 | case CFI_CMDSET_AMD_STANDARD: | |
1694 | case CFI_CMDSET_AMD_EXTENDED: | |
1695 | case CFI_CMDSET_AMD_LEGACY: | |
1696 | info->cmd_reset = AMD_CMD_RESET; | |
1697 | break; | |
1698 | } | |
1699 | info->flash_id = FLASH_MAN_CFI; | |
1700 | return 1; | |
1701 | } | |
1702 | return 0; /* use CFI */ | |
1703 | } | |
1704 | #else | |
09ce9921 | 1705 | static inline int flash_detect_legacy(phys_addr_t base, int banknum) |
be60a902 HS |
1706 | { |
1707 | return 0; /* use CFI */ | |
1708 | } | |
1709 | #endif | |
1710 | ||
1711 | /*----------------------------------------------------------------------- | |
1712 | * detect if flash is compatible with the Common Flash Interface (CFI) | |
1713 | * http://www.jedec.org/download/search/jesd68.pdf | |
1714 | */ | |
e23741f4 HS |
1715 | static void flash_read_cfi (flash_info_t *info, void *buf, |
1716 | unsigned int start, size_t len) | |
1717 | { | |
1718 | u8 *p = buf; | |
1719 | unsigned int i; | |
1720 | ||
1721 | for (i = 0; i < len; i++) | |
1722 | p[i] = flash_read_uchar(info, start + i); | |
1723 | } | |
1724 | ||
fa36ae79 SR |
1725 | void __flash_cmd_reset(flash_info_t *info) |
1726 | { | |
1727 | /* | |
1728 | * We do not yet know what kind of commandset to use, so we issue | |
1729 | * the reset command in both Intel and AMD variants, in the hope | |
1730 | * that AMD flash roms ignore the Intel command. | |
1731 | */ | |
1732 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); | |
1733 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); | |
1734 | } | |
1735 | void flash_cmd_reset(flash_info_t *info) | |
1736 | __attribute__((weak,alias("__flash_cmd_reset"))); | |
1737 | ||
e23741f4 | 1738 | static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) |
be60a902 HS |
1739 | { |
1740 | int cfi_offset; | |
1741 | ||
fa36ae79 SR |
1742 | /* Issue FLASH reset command */ |
1743 | flash_cmd_reset(info); | |
1ba639da | 1744 | |
be60a902 HS |
1745 | for (cfi_offset=0; |
1746 | cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); | |
1747 | cfi_offset++) { | |
1748 | flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], | |
1749 | FLASH_CMD_CFI); | |
1750 | if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') | |
1751 | && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') | |
1752 | && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { | |
e23741f4 HS |
1753 | flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, |
1754 | sizeof(struct cfi_qry)); | |
1755 | info->interface = le16_to_cpu(qry->interface_desc); | |
1756 | ||
be60a902 HS |
1757 | info->cfi_offset = flash_offset_cfi[cfi_offset]; |
1758 | debug ("device interface is %d\n", | |
1759 | info->interface); | |
1760 | debug ("found port %d chip %d ", | |
1761 | info->portwidth, info->chipwidth); | |
1762 | debug ("port %d bits chip %d bits\n", | |
1763 | info->portwidth << CFI_FLASH_SHIFT_WIDTH, | |
1764 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); | |
1765 | ||
1766 | /* calculate command offsets as in the Linux driver */ | |
1767 | info->addr_unlock1 = 0x555; | |
7e5b9b47 HS |
1768 | info->addr_unlock2 = 0x2aa; |
1769 | ||
1770 | /* | |
1771 | * modify the unlock address if we are | |
1772 | * in compatibility mode | |
1773 | */ | |
1774 | if ( /* x8/x16 in x8 mode */ | |
1775 | ((info->chipwidth == FLASH_CFI_BY8) && | |
1776 | (info->interface == FLASH_CFI_X8X16)) || | |
1777 | /* x16/x32 in x16 mode */ | |
1778 | ((info->chipwidth == FLASH_CFI_BY16) && | |
1779 | (info->interface == FLASH_CFI_X16X32))) | |
1780 | { | |
1781 | info->addr_unlock1 = 0xaaa; | |
1782 | info->addr_unlock2 = 0x555; | |
1783 | } | |
1784 | ||
1785 | info->name = "CFI conformant"; | |
1786 | return 1; | |
1787 | } | |
1788 | } | |
1789 | ||
1790 | return 0; | |
1791 | } | |
1792 | ||
e23741f4 | 1793 | static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) |
7e5b9b47 | 1794 | { |
bf9e3b38 WD |
1795 | debug ("flash detect cfi\n"); |
1796 | ||
6d0f6bcf | 1797 | for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; |
bf9e3b38 WD |
1798 | info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { |
1799 | for (info->chipwidth = FLASH_CFI_BY8; | |
1800 | info->chipwidth <= info->portwidth; | |
7e5b9b47 | 1801 | info->chipwidth <<= 1) |
e23741f4 | 1802 | if (__flash_detect_cfi(info, qry)) |
7e5b9b47 | 1803 | return 1; |
5653fc33 | 1804 | } |
bf9e3b38 | 1805 | debug ("not found\n"); |
5653fc33 WD |
1806 | return 0; |
1807 | } | |
bf9e3b38 | 1808 | |
467bcee1 HS |
1809 | /* |
1810 | * Manufacturer-specific quirks. Add workarounds for geometry | |
1811 | * reversal, etc. here. | |
1812 | */ | |
1813 | static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) | |
1814 | { | |
1815 | /* check if flash geometry needs reversal */ | |
1816 | if (qry->num_erase_regions > 1) { | |
1817 | /* reverse geometry if top boot part */ | |
1818 | if (info->cfi_version < 0x3131) { | |
1819 | /* CFI < 1.1, try to guess from device id */ | |
1820 | if ((info->device_id & 0x80) != 0) | |
1821 | cfi_reverse_geometry(qry); | |
1822 | } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { | |
1823 | /* CFI >= 1.1, deduct from top/bottom flag */ | |
1824 | /* note: ext_addr is valid since cfi_version > 0 */ | |
1825 | cfi_reverse_geometry(qry); | |
1826 | } | |
1827 | } | |
1828 | } | |
1829 | ||
1830 | static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) | |
1831 | { | |
1832 | int reverse_geometry = 0; | |
1833 | ||
1834 | /* Check the "top boot" bit in the PRI */ | |
1835 | if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) | |
1836 | reverse_geometry = 1; | |
1837 | ||
1838 | /* AT49BV6416(T) list the erase regions in the wrong order. | |
1839 | * However, the device ID is identical with the non-broken | |
cb82a532 | 1840 | * AT49BV642D they differ in the high byte. |
467bcee1 | 1841 | */ |
467bcee1 HS |
1842 | if (info->device_id == 0xd6 || info->device_id == 0xd2) |
1843 | reverse_geometry = !reverse_geometry; | |
467bcee1 HS |
1844 | |
1845 | if (reverse_geometry) | |
1846 | cfi_reverse_geometry(qry); | |
1847 | } | |
1848 | ||
e8eac437 RR |
1849 | static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) |
1850 | { | |
1851 | /* check if flash geometry needs reversal */ | |
1852 | if (qry->num_erase_regions > 1) { | |
1853 | /* reverse geometry if top boot part */ | |
1854 | if (info->cfi_version < 0x3131) { | |
7a88601a RR |
1855 | /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ |
1856 | if (info->device_id == 0x22CA || | |
1857 | info->device_id == 0x2256) { | |
e8eac437 RR |
1858 | cfi_reverse_geometry(qry); |
1859 | } | |
1860 | } | |
1861 | } | |
1862 | } | |
1863 | ||
5653fc33 WD |
1864 | /* |
1865 | * The following code cannot be run from FLASH! | |
1866 | * | |
1867 | */ | |
34bbb8fb | 1868 | ulong flash_get_size (phys_addr_t base, int banknum) |
5653fc33 | 1869 | { |
bf9e3b38 | 1870 | flash_info_t *info = &flash_info[banknum]; |
5653fc33 WD |
1871 | int i, j; |
1872 | flash_sect_t sect_cnt; | |
09ce9921 | 1873 | phys_addr_t sector; |
5653fc33 WD |
1874 | unsigned long tmp; |
1875 | int size_ratio; | |
1876 | uchar num_erase_regions; | |
bf9e3b38 WD |
1877 | int erase_region_size; |
1878 | int erase_region_count; | |
e23741f4 | 1879 | struct cfi_qry qry; |
34bbb8fb | 1880 | unsigned long max_size; |
260421a2 | 1881 | |
f979690e KG |
1882 | memset(&qry, 0, sizeof(qry)); |
1883 | ||
260421a2 SR |
1884 | info->ext_addr = 0; |
1885 | info->cfi_version = 0; | |
6d0f6bcf | 1886 | #ifdef CONFIG_SYS_FLASH_PROTECTION |
2662b40c SR |
1887 | info->legacy_unlock = 0; |
1888 | #endif | |
5653fc33 | 1889 | |
09ce9921 | 1890 | info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); |
5653fc33 | 1891 | |
e23741f4 HS |
1892 | if (flash_detect_cfi (info, &qry)) { |
1893 | info->vendor = le16_to_cpu(qry.p_id); | |
1894 | info->ext_addr = le16_to_cpu(qry.p_adr); | |
1895 | num_erase_regions = qry.num_erase_regions; | |
1896 | ||
260421a2 SR |
1897 | if (info->ext_addr) { |
1898 | info->cfi_version = (ushort) flash_read_uchar (info, | |
1899 | info->ext_addr + 3) << 8; | |
1900 | info->cfi_version |= (ushort) flash_read_uchar (info, | |
1901 | info->ext_addr + 4); | |
1902 | } | |
0ddf06dd | 1903 | |
bf9e3b38 | 1904 | #ifdef DEBUG |
e23741f4 | 1905 | flash_printqry (&qry); |
bf9e3b38 | 1906 | #endif |
0ddf06dd | 1907 | |
bf9e3b38 | 1908 | switch (info->vendor) { |
9c048b52 | 1909 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
5653fc33 WD |
1910 | case CFI_CMDSET_INTEL_STANDARD: |
1911 | case CFI_CMDSET_INTEL_EXTENDED: | |
0ddf06dd | 1912 | cmdset_intel_init(info, &qry); |
5653fc33 WD |
1913 | break; |
1914 | case CFI_CMDSET_AMD_STANDARD: | |
1915 | case CFI_CMDSET_AMD_EXTENDED: | |
0ddf06dd | 1916 | cmdset_amd_init(info, &qry); |
5653fc33 | 1917 | break; |
0ddf06dd HS |
1918 | default: |
1919 | printf("CFI: Unknown command set 0x%x\n", | |
1920 | info->vendor); | |
1921 | /* | |
1922 | * Unfortunately, this means we don't know how | |
1923 | * to get the chip back to Read mode. Might | |
1924 | * as well try an Intel-style reset... | |
1925 | */ | |
1926 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); | |
1927 | return 0; | |
5653fc33 | 1928 | } |
cd37d9e6 | 1929 | |
467bcee1 HS |
1930 | /* Do manufacturer-specific fixups */ |
1931 | switch (info->manufacturer_id) { | |
2c9f48af MS |
1932 | case 0x0001: /* AMD */ |
1933 | case 0x0037: /* AMIC */ | |
467bcee1 HS |
1934 | flash_fixup_amd(info, &qry); |
1935 | break; | |
1936 | case 0x001f: | |
1937 | flash_fixup_atmel(info, &qry); | |
1938 | break; | |
e8eac437 RR |
1939 | case 0x0020: |
1940 | flash_fixup_stm(info, &qry); | |
1941 | break; | |
467bcee1 HS |
1942 | } |
1943 | ||
bf9e3b38 | 1944 | debug ("manufacturer is %d\n", info->vendor); |
260421a2 SR |
1945 | debug ("manufacturer id is 0x%x\n", info->manufacturer_id); |
1946 | debug ("device id is 0x%x\n", info->device_id); | |
1947 | debug ("device id2 is 0x%x\n", info->device_id2); | |
1948 | debug ("cfi version is 0x%04x\n", info->cfi_version); | |
1949 | ||
5653fc33 | 1950 | size_ratio = info->portwidth / info->chipwidth; |
bf9e3b38 WD |
1951 | /* if the chip is x8/x16 reduce the ratio by half */ |
1952 | if ((info->interface == FLASH_CFI_X8X16) | |
1953 | && (info->chipwidth == FLASH_CFI_BY8)) { | |
1954 | size_ratio >>= 1; | |
1955 | } | |
bf9e3b38 WD |
1956 | debug ("size_ratio %d port %d bits chip %d bits\n", |
1957 | size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, | |
1958 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); | |
ec50a8e3 IY |
1959 | info->size = 1 << qry.dev_size; |
1960 | /* multiply the size by the number of chips */ | |
1961 | info->size *= size_ratio; | |
34bbb8fb | 1962 | max_size = cfi_flash_bank_size(banknum); |
ec50a8e3 IY |
1963 | if (max_size && (info->size > max_size)) { |
1964 | debug("[truncated from %ldMiB]", info->size >> 20); | |
1965 | info->size = max_size; | |
1966 | } | |
bf9e3b38 | 1967 | debug ("found %d erase regions\n", num_erase_regions); |
5653fc33 WD |
1968 | sect_cnt = 0; |
1969 | sector = base; | |
bf9e3b38 WD |
1970 | for (i = 0; i < num_erase_regions; i++) { |
1971 | if (i > NUM_ERASE_REGIONS) { | |
028ab6b5 WD |
1972 | printf ("%d erase regions found, only %d used\n", |
1973 | num_erase_regions, NUM_ERASE_REGIONS); | |
5653fc33 WD |
1974 | break; |
1975 | } | |
e23741f4 | 1976 | |
0ddf06dd HS |
1977 | tmp = le32_to_cpu(qry.erase_region_info[i]); |
1978 | debug("erase region %u: 0x%08lx\n", i, tmp); | |
e23741f4 HS |
1979 | |
1980 | erase_region_count = (tmp & 0xffff) + 1; | |
1981 | tmp >>= 16; | |
bf9e3b38 WD |
1982 | erase_region_size = |
1983 | (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; | |
4c0d4c3b | 1984 | debug ("erase_region_count = %d erase_region_size = %d\n", |
028ab6b5 | 1985 | erase_region_count, erase_region_size); |
bf9e3b38 | 1986 | for (j = 0; j < erase_region_count; j++) { |
ec50a8e3 IY |
1987 | if (sector - base >= info->size) |
1988 | break; | |
6d0f6bcf | 1989 | if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { |
81b20ccc MS |
1990 | printf("ERROR: too many flash sectors\n"); |
1991 | break; | |
1992 | } | |
09ce9921 BB |
1993 | info->start[sect_cnt] = |
1994 | (ulong)map_physmem(sector, | |
1995 | info->portwidth, | |
1996 | MAP_NOCACHE); | |
5653fc33 | 1997 | sector += (erase_region_size * size_ratio); |
a1191902 WD |
1998 | |
1999 | /* | |
7e5b9b47 HS |
2000 | * Only read protection status from |
2001 | * supported devices (intel...) | |
a1191902 WD |
2002 | */ |
2003 | switch (info->vendor) { | |
9c048b52 | 2004 | case CFI_CMDSET_INTEL_PROG_REGIONS: |
a1191902 WD |
2005 | case CFI_CMDSET_INTEL_EXTENDED: |
2006 | case CFI_CMDSET_INTEL_STANDARD: | |
df4e813b SR |
2007 | /* |
2008 | * Set flash to read-id mode. Otherwise | |
2009 | * reading protected status is not | |
2010 | * guaranteed. | |
2011 | */ | |
2012 | flash_write_cmd(info, sect_cnt, 0, | |
2013 | FLASH_CMD_READ_ID); | |
a1191902 WD |
2014 | info->protect[sect_cnt] = |
2015 | flash_isset (info, sect_cnt, | |
2016 | FLASH_OFFSET_PROTECT, | |
2017 | FLASH_STATUS_PROTECT); | |
2018 | break; | |
2019 | default: | |
7e5b9b47 HS |
2020 | /* default: not protected */ |
2021 | info->protect[sect_cnt] = 0; | |
a1191902 WD |
2022 | } |
2023 | ||
5653fc33 WD |
2024 | sect_cnt++; |
2025 | } | |
2026 | } | |
2027 | ||
2028 | info->sector_count = sect_cnt; | |
e23741f4 HS |
2029 | info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); |
2030 | tmp = 1 << qry.block_erase_timeout_typ; | |
7e5b9b47 | 2031 | info->erase_blk_tout = tmp * |
e23741f4 HS |
2032 | (1 << qry.block_erase_timeout_max); |
2033 | tmp = (1 << qry.buf_write_timeout_typ) * | |
2034 | (1 << qry.buf_write_timeout_max); | |
2035 | ||
7e5b9b47 | 2036 | /* round up when converting to ms */ |
e23741f4 HS |
2037 | info->buffer_write_tout = (tmp + 999) / 1000; |
2038 | tmp = (1 << qry.word_write_timeout_typ) * | |
2039 | (1 << qry.word_write_timeout_max); | |
7e5b9b47 | 2040 | /* round up when converting to ms */ |
e23741f4 | 2041 | info->write_tout = (tmp + 999) / 1000; |
5653fc33 | 2042 | info->flash_id = FLASH_MAN_CFI; |
7e5b9b47 HS |
2043 | if ((info->interface == FLASH_CFI_X8X16) && |
2044 | (info->chipwidth == FLASH_CFI_BY8)) { | |
2045 | /* XXX - Need to test on x8/x16 in parallel. */ | |
2046 | info->portwidth >>= 1; | |
855a496f | 2047 | } |
2215987e MF |
2048 | |
2049 | flash_write_cmd (info, 0, 0, info->cmd_reset); | |
5653fc33 WD |
2050 | } |
2051 | ||
bf9e3b38 | 2052 | return (info->size); |
5653fc33 WD |
2053 | } |
2054 | ||
4ffeab2c | 2055 | #ifdef CONFIG_FLASH_CFI_MTD |
6ea808ef PZ |
2056 | void flash_set_verbose(uint v) |
2057 | { | |
2058 | flash_verbose = v; | |
2059 | } | |
4ffeab2c | 2060 | #endif |
6ea808ef | 2061 | |
6f726f95 SR |
2062 | static void cfi_flash_set_config_reg(u32 base, u16 val) |
2063 | { | |
2064 | #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS | |
2065 | /* | |
2066 | * Only set this config register if really defined | |
2067 | * to a valid value (0xffff is invalid) | |
2068 | */ | |
2069 | if (val == 0xffff) | |
2070 | return; | |
2071 | ||
2072 | /* | |
2073 | * Set configuration register. Data is "encrypted" in the 16 lower | |
2074 | * address bits. | |
2075 | */ | |
2076 | flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1))); | |
2077 | flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1))); | |
2078 | ||
2079 | /* | |
2080 | * Finally issue reset-command to bring device back to | |
2081 | * read-array mode | |
2082 | */ | |
2083 | flash_write16(FLASH_CMD_RESET, (void *)base); | |
2084 | #endif | |
2085 | } | |
2086 | ||
5653fc33 WD |
2087 | /*----------------------------------------------------------------------- |
2088 | */ | |
6ee1416e HS |
2089 | |
2090 | void flash_protect_default(void) | |
2091 | { | |
2092 | /* Monitor protection ON by default */ | |
2093 | #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ | |
2094 | (!defined(CONFIG_MONITOR_IS_IN_RAM)) | |
2095 | flash_protect(FLAG_PROTECT_SET, | |
2096 | CONFIG_SYS_MONITOR_BASE, | |
2097 | CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, | |
2098 | flash_get_info(CONFIG_SYS_MONITOR_BASE)); | |
2099 | #endif | |
2100 | ||
2101 | /* Environment protection ON by default */ | |
2102 | #ifdef CONFIG_ENV_IS_IN_FLASH | |
2103 | flash_protect(FLAG_PROTECT_SET, | |
2104 | CONFIG_ENV_ADDR, | |
2105 | CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, | |
2106 | flash_get_info(CONFIG_ENV_ADDR)); | |
2107 | #endif | |
2108 | ||
2109 | /* Redundant environment protection ON by default */ | |
2110 | #ifdef CONFIG_ENV_ADDR_REDUND | |
2111 | flash_protect(FLAG_PROTECT_SET, | |
2112 | CONFIG_ENV_ADDR_REDUND, | |
2113 | CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, | |
2114 | flash_get_info(CONFIG_ENV_ADDR_REDUND)); | |
2115 | #endif | |
2116 | ||
2117 | #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) | |
2118 | for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { | |
2119 | debug("autoprotecting from %08x to %08x\n", | |
2120 | apl[i].start, apl[i].start + apl[i].size - 1); | |
2121 | flash_protect(FLAG_PROTECT_SET, | |
2122 | apl[i].start, | |
2123 | apl[i].start + apl[i].size - 1, | |
2124 | flash_get_info(apl[i].start)); | |
2125 | } | |
2126 | #endif | |
2127 | } | |
2128 | ||
be60a902 | 2129 | unsigned long flash_init (void) |
5653fc33 | 2130 | { |
be60a902 HS |
2131 | unsigned long size = 0; |
2132 | int i; | |
6d0f6bcf | 2133 | #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) |
c63ad632 MF |
2134 | struct apl_s { |
2135 | ulong start; | |
2136 | ulong size; | |
6d0f6bcf | 2137 | } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; |
c63ad632 | 2138 | #endif |
5653fc33 | 2139 | |
6d0f6bcf | 2140 | #ifdef CONFIG_SYS_FLASH_PROTECTION |
3a3baf3e ES |
2141 | /* read environment from EEPROM */ |
2142 | char s[64]; | |
cdb74977 | 2143 | getenv_f("unlock", s, sizeof(s)); |
81b20ccc | 2144 | #endif |
5653fc33 | 2145 | |
be60a902 | 2146 | /* Init: no FLASHes known */ |
6d0f6bcf | 2147 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
be60a902 | 2148 | flash_info[i].flash_id = FLASH_UNKNOWN; |
5653fc33 | 2149 | |
6f726f95 SR |
2150 | /* Optionally write flash configuration register */ |
2151 | cfi_flash_set_config_reg(cfi_flash_bank_addr(i), | |
2152 | cfi_flash_config_reg(i)); | |
2153 | ||
b00e19cc | 2154 | if (!flash_detect_legacy(cfi_flash_bank_addr(i), i)) |
34bbb8fb | 2155 | flash_get_size(cfi_flash_bank_addr(i), i); |
be60a902 HS |
2156 | size += flash_info[i].size; |
2157 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { | |
6d0f6bcf | 2158 | #ifndef CONFIG_SYS_FLASH_QUIET_TEST |
eddf52b5 | 2159 | printf ("## Unknown flash on Bank %d " |
be60a902 HS |
2160 | "- Size = 0x%08lx = %ld MB\n", |
2161 | i+1, flash_info[i].size, | |
0e3fa01a | 2162 | flash_info[i].size >> 20); |
6d0f6bcf | 2163 | #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ |
be60a902 | 2164 | } |
6d0f6bcf | 2165 | #ifdef CONFIG_SYS_FLASH_PROTECTION |
be60a902 HS |
2166 | else if ((s != NULL) && (strcmp(s, "yes") == 0)) { |
2167 | /* | |
2168 | * Only the U-Boot image and it's environment | |
2169 | * is protected, all other sectors are | |
2170 | * unprotected (unlocked) if flash hardware | |
6d0f6bcf | 2171 | * protection is used (CONFIG_SYS_FLASH_PROTECTION) |
be60a902 HS |
2172 | * and the environment variable "unlock" is |
2173 | * set to "yes". | |
2174 | */ | |
2175 | if (flash_info[i].legacy_unlock) { | |
2176 | int k; | |
5653fc33 | 2177 | |
be60a902 HS |
2178 | /* |
2179 | * Disable legacy_unlock temporarily, | |
2180 | * since flash_real_protect would | |
2181 | * relock all other sectors again | |
2182 | * otherwise. | |
2183 | */ | |
2184 | flash_info[i].legacy_unlock = 0; | |
5653fc33 | 2185 | |
be60a902 HS |
2186 | /* |
2187 | * Legacy unlocking (e.g. Intel J3) -> | |
2188 | * unlock only one sector. This will | |
2189 | * unlock all sectors. | |
2190 | */ | |
2191 | flash_real_protect (&flash_info[i], 0, 0); | |
5653fc33 | 2192 | |
be60a902 | 2193 | flash_info[i].legacy_unlock = 1; |
5653fc33 | 2194 | |
be60a902 HS |
2195 | /* |
2196 | * Manually mark other sectors as | |
2197 | * unlocked (unprotected) | |
2198 | */ | |
2199 | for (k = 1; k < flash_info[i].sector_count; k++) | |
2200 | flash_info[i].protect[k] = 0; | |
2201 | } else { | |
2202 | /* | |
2203 | * No legancy unlocking -> unlock all sectors | |
2204 | */ | |
2205 | flash_protect (FLAG_PROTECT_CLEAR, | |
2206 | flash_info[i].start[0], | |
2207 | flash_info[i].start[0] | |
2208 | + flash_info[i].size - 1, | |
2209 | &flash_info[i]); | |
79b4cda0 | 2210 | } |
79b4cda0 | 2211 | } |
6d0f6bcf | 2212 | #endif /* CONFIG_SYS_FLASH_PROTECTION */ |
be60a902 | 2213 | } |
79b4cda0 | 2214 | |
6ee1416e | 2215 | flash_protect_default(); |
91809ed5 PZ |
2216 | #ifdef CONFIG_FLASH_CFI_MTD |
2217 | cfi_mtd_init(); | |
2218 | #endif | |
2219 | ||
be60a902 | 2220 | return (size); |
5653fc33 | 2221 | } |