[people/ms/u-boot.git] / drivers / mtd / nand / nand_spl_simple.c

/*
 * (C) Copyright 2006-2008
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/mtd/nand_ecc.h>

static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
static nand_info_t mtd;
static struct nand_chip nand_chip;

#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
/*
 * NAND command for small page NAND devices (512)
 */
static int nand_command(int block, int page, uint32_t offs,
	u8 cmd)
{
	struct nand_chip *this = mtd.priv;
	int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;

	while (!this->dev_ready(&mtd))
		;

	/* Begin command latch cycle */
	this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
	/* Set ALE and clear CLE to start address cycle */
	/* Column address */
	this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
	this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
	this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
		       NAND_CTRL_ALE); /* A[24:17] */
#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
	/* One more address cycle for devices > 32MiB */
	this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
		       NAND_CTRL_ALE); /* A[28:25] */
#endif
	/* Latch in address */
	this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

	/*
	 * Wait a while for the data to be ready
	 */
	while (!this->dev_ready(&mtd))
		;

	return 0;
}
#else
/*
 * NAND command for large page NAND devices (2k)
 */
static int nand_command(int block, int page, uint32_t offs,
	u8 cmd)
{
	struct nand_chip *this = mtd.priv;
	int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
	void (*hwctrl)(struct mtd_info *mtd, int cmd,
			unsigned int ctrl) = this->cmd_ctrl;

	while (!this->dev_ready(&mtd))
		;

	/* Emulate NAND_CMD_READOOB */
	if (cmd == NAND_CMD_READOOB) {
		offs += CONFIG_SYS_NAND_PAGE_SIZE;
		cmd = NAND_CMD_READ0;
	}

	/* Shift the offset from byte addressing to word addressing. */
	if (this->options & NAND_BUSWIDTH_16)
		offs >>= 1;

	/* Begin command latch cycle */
	hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
	/* Set ALE and clear CLE to start address cycle */
	/* Column address */
	hwctrl(&mtd, offs & 0xff,
		       NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
	hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
	/* Row address */
	hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
	hwctrl(&mtd, ((page_addr >> 8) & 0xff),
		       NAND_CTRL_ALE); /* A[27:20] */
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
	/* One more address cycle for devices > 128MiB */
	hwctrl(&mtd, (page_addr >> 16) & 0x0f,
		       NAND_CTRL_ALE); /* A[31:28] */
#endif
	/* Latch in address */
	hwctrl(&mtd, NAND_CMD_READSTART,
		       NAND_CTRL_CLE | NAND_CTRL_CHANGE);
	hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

	/*
	 * Wait a while for the data to be ready
	 */
	while (!this->dev_ready(&mtd))
		;

	return 0;
}
#endif

static int nand_is_bad_block(int block)
{
	struct nand_chip *this = mtd.priv;

	nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
		NAND_CMD_READOOB);

	/*
	 * Read one byte (or two if it's a 16 bit chip).
	 */
	if (this->options & NAND_BUSWIDTH_16) {
		if (readw(this->IO_ADDR_R) != 0xffff)
			return 1;
	} else {
		if (readb(this->IO_ADDR_R) != 0xff)
			return 1;
	}

	return 0;
}

#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
static int nand_read_page(int block, int page, uchar *dst)
{
	struct nand_chip *this = mtd.priv;
	u_char *ecc_calc;
	u_char *ecc_code;
	u_char *oob_data;
	int i;
	int eccsize = CONFIG_SYS_NAND_ECCSIZE;
	int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
	int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	uint8_t *p = dst;
	int stat;

	/*
	 * No malloc available for now, just use some temporary locations
	 * in SDRAM
	 */
	ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
	ecc_code = ecc_calc + 0x100;
	oob_data = ecc_calc + 0x200;

	nand_command(block, page, 0, NAND_CMD_READOOB);
	this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
	nand_command(block, page, 0, NAND_CMD_READ0);

	/* Pick the ECC bytes out of the oob data */
	for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
		ecc_code[i] = oob_data[nand_ecc_pos[i]];


	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		this->ecc.hwctl(&mtd, NAND_ECC_READ);
		this->read_buf(&mtd, p, eccsize);
		this->ecc.calculate(&mtd, p, &ecc_calc[i]);
		stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
	}

	return 0;
}
#else
static int nand_read_page(int block, int page, void *dst)
{
	struct nand_chip *this = mtd.priv;
	u_char *ecc_calc;
	u_char *ecc_code;
	u_char *oob_data;
	int i;
	int eccsize = CONFIG_SYS_NAND_ECCSIZE;
	int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
	int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	uint8_t *p = dst;
	int stat;

	nand_command(block, page, 0, NAND_CMD_READ0);

	/* No malloc available for now, just use some temporary locations
	 * in SDRAM
	 */
	ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
	ecc_code = ecc_calc + 0x100;
	oob_data = ecc_calc + 0x200;

	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		if (this->ecc.mode != NAND_ECC_SOFT)
			this->ecc.hwctl(&mtd, NAND_ECC_READ);
		this->read_buf(&mtd, p, eccsize);
		this->ecc.calculate(&mtd, p, &ecc_calc[i]);
	}
	this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);

	/* Pick the ECC bytes out of the oob data */
	for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
		ecc_code[i] = oob_data[nand_ecc_pos[i]];

	eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	p = dst;

	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
		/* No chance to do something with the possible error message
		 * from correct_data(). We just hope that all possible errors
		 * are corrected by this routine.
		 */
		stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
	}

	return 0;
}
#endif

int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
{
	unsigned int block, lastblock;
	unsigned int page;

	/*
	 * offs has to be aligned to a page address!
	 */
	block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
	lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
	page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;

	while (block <= lastblock) {
		if (!nand_is_bad_block(block)) {
			/*
			 * Skip bad blocks
			 */
			while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
				nand_read_page(block, page, dst);
				dst += CONFIG_SYS_NAND_PAGE_SIZE;
				page++;
			}

			page = 0;
		} else {
			lastblock++;
		}

		block++;
	}

	return 0;
}

/* nand_init() - initialize data to make nand usable by SPL */
void nand_init(void)
{
	/*
	 * Init board specific nand support
	 */
	mtd.priv = &nand_chip;
	nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
		(void  __iomem *)CONFIG_SYS_NAND_BASE;
	board_nand_init(&nand_chip);

#ifdef CONFIG_SPL_NAND_SOFTECC
	if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
		nand_chip.ecc.calculate = nand_calculate_ecc;
		nand_chip.ecc.correct = nand_correct_data;
	}
#endif

	if (nand_chip.select_chip)
		nand_chip.select_chip(&mtd, 0);
}

/* Unselect after operation */
void nand_deselect(void)
{
	if (nand_chip.select_chip)
		nand_chip.select_chip(&mtd, -1);
}
Commit	Line	Data
12c2f1ee SS	1	/*
	2	* (C) Copyright 2006-2008
	3	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License as
	7	* published by the Free Software Foundation; either version 2 of
	8	* the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	18	* MA 02111-1307 USA
	19	*/
	20
	21	#include <common.h>
	22	#include <nand.h>
	23	#include <asm/io.h>
1df308e5	24	#include <linux/mtd/nand_ecc.h>
12c2f1ee SS	25
	26	static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
	27	static nand_info_t mtd;
	28	static struct nand_chip nand_chip;
	29
	30	#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
	31	/*
	32	* NAND command for small page NAND devices (512)
	33	*/
	34	static int nand_command(int block, int page, uint32_t offs,
	35	u8 cmd)
	36	{
	37	struct nand_chip *this = mtd.priv;
	38	int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
	39
	40	while (!this->dev_ready(&mtd))
	41	;
	42
	43	/* Begin command latch cycle */
	44	this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE \| NAND_CTRL_CHANGE);
	45	/* Set ALE and clear CLE to start address cycle */
	46	/* Column address */
	47	this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE \| NAND_CTRL_CHANGE);
	48	this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
	49	this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
	50	NAND_CTRL_ALE); /* A[24:17] */
	51	#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
	52	/* One more address cycle for devices > 32MiB */
	53	this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
	54	NAND_CTRL_ALE); /* A[28:25] */
	55	#endif
	56	/* Latch in address */
	57	this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE \| NAND_CTRL_CHANGE);
	58
	59	/*
	60	* Wait a while for the data to be ready
	61	*/
	62	while (!this->dev_ready(&mtd))
	63	;
	64
	65	return 0;
	66	}
	67	#else
	68	/*
	69	* NAND command for large page NAND devices (2k)
	70	*/
	71	static int nand_command(int block, int page, uint32_t offs,
	72	u8 cmd)
	73	{
	74	struct nand_chip *this = mtd.priv;
	75	int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
	76	void (hwctrl)(struct mtd_info mtd, int cmd,
	77	unsigned int ctrl) = this->cmd_ctrl;
	78
	79	while (!this->dev_ready(&mtd))
	80	;
	81
	82	/* Emulate NAND_CMD_READOOB */
	83	if (cmd == NAND_CMD_READOOB) {
	84	offs += CONFIG_SYS_NAND_PAGE_SIZE;
	85	cmd = NAND_CMD_READ0;
	86	}
	87
	88	/* Shift the offset from byte addressing to word addressing. */
89	if (this->options & NAND_BUSWIDTH_16)
90	offs >>= 1;
91
92	/* Begin command latch cycle */
93	hwctrl(&mtd, cmd, NAND_CTRL_CLE \| NAND_CTRL_CHANGE);
94	/* Set ALE and clear CLE to start address cycle */
95	/* Column address */
96	hwctrl(&mtd, offs & 0xff,
97	NAND_CTRL_ALE \| NAND_CTRL_CHANGE); /* A[7:0] */
98	hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
99	/* Row address */
100	hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
101	hwctrl(&mtd, ((page_addr >> 8) & 0xff),
102	NAND_CTRL_ALE); /* A[27:20] */
103	#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
104	/* One more address cycle for devices > 128MiB */
105	hwctrl(&mtd, (page_addr >> 16) & 0x0f,
106	NAND_CTRL_ALE); /* A[31:28] */
107	#endif
108	/* Latch in address */
109	hwctrl(&mtd, NAND_CMD_READSTART,
110	NAND_CTRL_CLE \| NAND_CTRL_CHANGE);
111	hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE \| NAND_CTRL_CHANGE);
112
113	/*
114	* Wait a while for the data to be ready
115	*/
116	while (!this->dev_ready(&mtd))
117	;
118
119	return 0;
120	}
121	#endif
122
123	static int nand_is_bad_block(int block)
124	{
125	struct nand_chip *this = mtd.priv;
126
127	nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
128	NAND_CMD_READOOB);
129
130	/*
131	* Read one byte (or two if it's a 16 bit chip).
132	*/
133	if (this->options & NAND_BUSWIDTH_16) {
134	if (readw(this->IO_ADDR_R) != 0xffff)
135	return 1;
136	} else {
137	if (readb(this->IO_ADDR_R) != 0xff)
138	return 1;
139	}
140
141	return 0;
142	}
143
68bb8295 HS	144	#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
	145	static int nand_read_page(int block, int page, uchar *dst)
	146	{
	147	struct nand_chip *this = mtd.priv;
	148	u_char *ecc_calc;
	149	u_char *ecc_code;
	150	u_char *oob_data;
	151	int i;
	152	int eccsize = CONFIG_SYS_NAND_ECCSIZE;
	153	int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
	154	int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	155	uint8_t *p = dst;
	156	int stat;
	157
	158	/*
	159	* No malloc available for now, just use some temporary locations
	160	* in SDRAM
	161	*/
	162	ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
	163	ecc_code = ecc_calc + 0x100;
	164	oob_data = ecc_calc + 0x200;
	165
	166	nand_command(block, page, 0, NAND_CMD_READOOB);
	167	this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
	168	nand_command(block, page, 0, NAND_CMD_READ0);
	169
	170	/* Pick the ECC bytes out of the oob data */
	171	for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
	172	ecc_code[i] = oob_data[nand_ecc_pos[i]];
	173
	174
	175	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
	176	this->ecc.hwctl(&mtd, NAND_ECC_READ);
	177	this->read_buf(&mtd, p, eccsize);
	178	this->ecc.calculate(&mtd, p, &ecc_calc[i]);
	179	stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
	180	}
	181
	182	return 0;
	183	}
	184	#else
12c2f1ee SS	185	static int nand_read_page(int block, int page, void *dst)
	186	{
	187	struct nand_chip *this = mtd.priv;
	188	u_char *ecc_calc;
	189	u_char *ecc_code;
	190	u_char *oob_data;
	191	int i;
	192	int eccsize = CONFIG_SYS_NAND_ECCSIZE;
	193	int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
	194	int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	195	uint8_t *p = dst;
	196	int stat;
	197
	198	nand_command(block, page, 0, NAND_CMD_READ0);
	199
	200	/* No malloc available for now, just use some temporary locations
	201	* in SDRAM
	202	*/
	203	ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
	204	ecc_code = ecc_calc + 0x100;
	205	oob_data = ecc_calc + 0x200;
	206
	207	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1df308e5 IY	208	if (this->ecc.mode != NAND_ECC_SOFT)
1df308e5 IY	209	this->ecc.hwctl(&mtd, NAND_ECC_READ);
12c2f1ee SS	210	this->read_buf(&mtd, p, eccsize);
	211	this->ecc.calculate(&mtd, p, &ecc_calc[i]);
	212	}
	213	this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
	214
	215	/* Pick the ECC bytes out of the oob data */
	216	for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
	217	ecc_code[i] = oob_data[nand_ecc_pos[i]];
	218
	219	eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
	220	p = dst;
	221
	222	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
	223	/* No chance to do something with the possible error message
	224	* from correct_data(). We just hope that all possible errors
	225	* are corrected by this routine.
	226	*/
	227	stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
	228	}
	229
	230	return 0;
	231	}
68bb8295	232	#endif
12c2f1ee SS	233
	234	int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
	235	{
	236	unsigned int block, lastblock;
	237	unsigned int page;
	238
	239	/*
	240	* offs has to be aligned to a page address!
	241	*/
	242	block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
	243	lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
	244	page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
	245
	246	while (block <= lastblock) {
	247	if (!nand_is_bad_block(block)) {
	248	/*
	249	* Skip bad blocks
	250	*/
	251	while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
	252	nand_read_page(block, page, dst);
	253	dst += CONFIG_SYS_NAND_PAGE_SIZE;
	254	page++;
	255	}
	256
	257	page = 0;
	258	} else {
	259	lastblock++;
	260	}
	261
	262	block++;
	263	}
	264
	265	return 0;
	266	}
	267
	268	/* nand_init() - initialize data to make nand usable by SPL */
	269	void nand_init(void)
	270	{
	271	/*
	272	* Init board specific nand support
	273	*/
	274	mtd.priv = &nand_chip;
	275	nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
	276	(void __iomem *)CONFIG_SYS_NAND_BASE;
12c2f1ee SS	277	board_nand_init(&nand_chip);
12c2f1ee SS	278
1df308e5 IY	279	#ifdef CONFIG_SPL_NAND_SOFTECC
	280	if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
	281	nand_chip.ecc.calculate = nand_calculate_ecc;
	282	nand_chip.ecc.correct = nand_correct_data;
	283	}
	284	#endif
	285
12c2f1ee SS	286	if (nand_chip.select_chip)
	287	nand_chip.select_chip(&mtd, 0);
	288	}
	289
	290	/* Unselect after operation */
	291	void nand_deselect(void)
	292	{
	293	if (nand_chip.select_chip)
	294	nand_chip.select_chip(&mtd, -1);
	295	}