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Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / drivers / mtd / nand / spi / core.c
CommitLineData
7529df46
PP		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016-2017 Micron Technology, Inc.
4 *
5 * Authors:
6 * Peter Pan <peterpandong@micron.com>
7 * Boris Brezillon <boris.brezillon@bootlin.com>
8 */
9
10#define pr_fmt(fmt) "spi-nand: " fmt
11
12#include <linux/device.h>
13#include <linux/jiffies.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mtd/spinand.h>
17#include <linux/of.h>
18#include <linux/slab.h>
f1541773 19#include <linux/string.h>
7529df46
PP		 20#include <linux/spi/spi.h>
21#include <linux/spi/spi-mem.h>
22
7529df46
PP		 23static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
24{
25 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
26 spinand->scratchbuf);
27 int ret;
28
29 ret = spi_mem_exec_op(spinand->spimem, &op);
30 if (ret)
31 return ret;
32
33 *val = *spinand->scratchbuf;
34 return 0;
35}
36
37static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
38{
39 struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
40 spinand->scratchbuf);
41
42 *spinand->scratchbuf = val;
43 return spi_mem_exec_op(spinand->spimem, &op);
44}
45
46static int spinand_read_status(struct spinand_device *spinand, u8 *status)
47{
48 return spinand_read_reg_op(spinand, REG_STATUS, status);
49}
50
51static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
52{
53 struct nand_device *nand = spinand_to_nand(spinand);
54
55 if (WARN_ON(spinand->cur_target < 0 ||
56 spinand->cur_target >= nand->memorg.ntargets))
57 return -EINVAL;
58
59 *cfg = spinand->cfg_cache[spinand->cur_target];
60 return 0;
61}
62
63static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
64{
65 struct nand_device *nand = spinand_to_nand(spinand);
66 int ret;
67
68 if (WARN_ON(spinand->cur_target < 0 ||
69 spinand->cur_target >= nand->memorg.ntargets))
70 return -EINVAL;
71
72 if (spinand->cfg_cache[spinand->cur_target] == cfg)
73 return 0;
74
75 ret = spinand_write_reg_op(spinand, REG_CFG, cfg);
76 if (ret)
77 return ret;
78
79 spinand->cfg_cache[spinand->cur_target] = cfg;
80 return 0;
81}
82
83/**
84 * spinand_upd_cfg() - Update the configuration register
85 * @spinand: the spinand device
86 * @mask: the mask encoding the bits to update in the config reg
87 * @val: the new value to apply
88 *
89 * Update the configuration register.
90 *
91 * Return: 0 on success, a negative error code otherwise.
92 */
93int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val)
94{
95 int ret;
96 u8 cfg;
97
98 ret = spinand_get_cfg(spinand, &cfg);
99 if (ret)
100 return ret;
101
102 cfg &= ~mask;
103 cfg |= val;
104
105 return spinand_set_cfg(spinand, cfg);
106}
107
108/**
109 * spinand_select_target() - Select a specific NAND target/die
110 * @spinand: the spinand device
111 * @target: the target/die to select
112 *
113 * Select a new target/die. If chip only has one die, this function is a NOOP.
114 *
115 * Return: 0 on success, a negative error code otherwise.
116 */
117int spinand_select_target(struct spinand_device *spinand, unsigned int target)
118{
119 struct nand_device *nand = spinand_to_nand(spinand);
120 int ret;
121
122 if (WARN_ON(target >= nand->memorg.ntargets))
123 return -EINVAL;
124
125 if (spinand->cur_target == target)
126 return 0;
127
128 if (nand->memorg.ntargets == 1) {
129 spinand->cur_target = target;
130 return 0;
131 }
132
133 ret = spinand->select_target(spinand, target);
134 if (ret)
135 return ret;
136
137 spinand->cur_target = target;
138 return 0;
139}
140
141static int spinand_init_cfg_cache(struct spinand_device *spinand)
142{
143 struct nand_device *nand = spinand_to_nand(spinand);
144 struct device *dev = &spinand->spimem->spi->dev;
145 unsigned int target;
146 int ret;
147
148 spinand->cfg_cache = devm_kcalloc(dev,
149 nand->memorg.ntargets,
150 sizeof(*spinand->cfg_cache),
151 GFP_KERNEL);
152 if (!spinand->cfg_cache)
153 return -ENOMEM;
154
155 for (target = 0; target < nand->memorg.ntargets; target++) {
156 ret = spinand_select_target(spinand, target);
157 if (ret)
158 return ret;
159
160 /*
161 * We use spinand_read_reg_op() instead of spinand_get_cfg()
162 * here to bypass the config cache.
163 */
164 ret = spinand_read_reg_op(spinand, REG_CFG,
165 &spinand->cfg_cache[target]);
166 if (ret)
167 return ret;
168 }
169
170 return 0;
171}
172
173static int spinand_init_quad_enable(struct spinand_device *spinand)
174{
175 bool enable = false;
176
177 if (!(spinand->flags & SPINAND_HAS_QE_BIT))
178 return 0;
179
180 if (spinand->op_templates.read_cache->data.buswidth == 4 ||
181 spinand->op_templates.write_cache->data.buswidth == 4 ||
182 spinand->op_templates.update_cache->data.buswidth == 4)
183 enable = true;
184
185 return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
186 enable ? CFG_QUAD_ENABLE : 0);
187}
188
189static int spinand_ecc_enable(struct spinand_device *spinand,
190 bool enable)
191{
192 return spinand_upd_cfg(spinand, CFG_ECC_ENABLE,
193 enable ? CFG_ECC_ENABLE : 0);
194}
195
196static int spinand_write_enable_op(struct spinand_device *spinand)
197{
198 struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true);
199
200 return spi_mem_exec_op(spinand->spimem, &op);
201}
202
203static int spinand_load_page_op(struct spinand_device *spinand,
204 const struct nand_page_io_req *req)
205{
206 struct nand_device *nand = spinand_to_nand(spinand);
207 unsigned int row = nanddev_pos_to_row(nand, &req->pos);
208 struct spi_mem_op op = SPINAND_PAGE_READ_OP(row);
209
210 return spi_mem_exec_op(spinand->spimem, &op);
211}
212
213static int spinand_read_from_cache_op(struct spinand_device *spinand,
214 const struct nand_page_io_req *req)
215{
7529df46
PP		 216 struct nand_device *nand = spinand_to_nand(spinand);
217 struct mtd_info *mtd = nanddev_to_mtd(nand);
981d1aa0 218 struct spi_mem_dirmap_desc *rdesc;
7529df46
PP		 219 unsigned int nbytes = 0;
220 void *buf = NULL;
221 u16 column = 0;
981d1aa0 222 ssize_t ret;
7529df46
PP		 223
224 if (req->datalen) {
7529df46 225 buf = spinand->databuf;
981d1aa0
BB		 226 nbytes = nanddev_page_size(nand);
227 column = 0;
7529df46
PP		 228 }
229
230 if (req->ooblen) {
7529df46
PP		 231 nbytes += nanddev_per_page_oobsize(nand);
232 if (!buf) {
233 buf = spinand->oobbuf;
234 column = nanddev_page_size(nand);
235 }
236 }
237
981d1aa0 238 rdesc = spinand->dirmaps[req->pos.plane].rdesc;
7529df46 239
7529df46 240 while (nbytes) {
981d1aa0
BB		 241 ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf);
242 if (ret < 0)
7529df46
PP		 243 return ret;
244
981d1aa0
BB		 245 if (!ret || ret > nbytes)
246 return -EIO;
7529df46 247
981d1aa0
BB		 248 nbytes -= ret;
249 column += ret;
250 buf += ret;
7529df46
PP		 251 }
252
253 if (req->datalen)
254 memcpy(req->databuf.in, spinand->databuf + req->dataoffs,
255 req->datalen);
256
257 if (req->ooblen) {
258 if (req->mode == MTD_OPS_AUTO_OOB)
259 mtd_ooblayout_get_databytes(mtd, req->oobbuf.in,
260 spinand->oobbuf,
261 req->ooboffs,
262 req->ooblen);
263 else
264 memcpy(req->oobbuf.in, spinand->oobbuf + req->ooboffs,
265 req->ooblen);
266 }
267
268 return 0;
269}
270
271static int spinand_write_to_cache_op(struct spinand_device *spinand,
272 const struct nand_page_io_req *req)
273{
7529df46
PP		 274 struct nand_device *nand = spinand_to_nand(spinand);
275 struct mtd_info *mtd = nanddev_to_mtd(nand);
981d1aa0
BB		 276 struct spi_mem_dirmap_desc *wdesc;
277 unsigned int nbytes, column = 0;
13c15e07 278 void *buf = spinand->databuf;
981d1aa0 279 ssize_t ret;
7529df46 280
13c15e07
BB		 281 /*
282 * Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset
283 * the cache content to 0xFF (depends on vendor implementation), so we
284 * must fill the page cache entirely even if we only want to program
285 * the data portion of the page, otherwise we might corrupt the BBM or
286 * user data previously programmed in OOB area.
287 */
288 nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
289 memset(spinand->databuf, 0xff, nbytes);
7529df46 290
13c15e07 291 if (req->datalen)
7529df46
PP		 292 memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
293 req->datalen);
7529df46
PP		 294
295 if (req->ooblen) {
296 if (req->mode == MTD_OPS_AUTO_OOB)
297 mtd_ooblayout_set_databytes(mtd, req->oobbuf.out,
298 spinand->oobbuf,
299 req->ooboffs,
300 req->ooblen);
301 else
302 memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
303 req->ooblen);
7529df46
PP		 304 }
305
981d1aa0 306 wdesc = spinand->dirmaps[req->pos.plane].wdesc;
7529df46 307
7529df46 308 while (nbytes) {
981d1aa0
BB		 309 ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf);
310 if (ret < 0)
7529df46
PP		 311 return ret;
312
981d1aa0
BB		 313 if (!ret || ret > nbytes)
314 return -EIO;
7529df46 315
981d1aa0
BB		 316 nbytes -= ret;
317 column += ret;
318 buf += ret;
7529df46
PP		 319 }
320
321 return 0;
322}
323
324static int spinand_program_op(struct spinand_device *spinand,
325 const struct nand_page_io_req *req)
326{
327 struct nand_device *nand = spinand_to_nand(spinand);
328 unsigned int row = nanddev_pos_to_row(nand, &req->pos);
329 struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row);
330
331 return spi_mem_exec_op(spinand->spimem, &op);
332}
333
334static int spinand_erase_op(struct spinand_device *spinand,
335 const struct nand_pos *pos)
336{
337 struct nand_device *nand = spinand_to_nand(spinand);
338 unsigned int row = nanddev_pos_to_row(nand, pos);
339 struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row);
340
341 return spi_mem_exec_op(spinand->spimem, &op);
342}
343
344static int spinand_wait(struct spinand_device *spinand, u8 *s)
345{
346 unsigned long timeo = jiffies + msecs_to_jiffies(400);
347 u8 status;
348 int ret;
349
350 do {
351 ret = spinand_read_status(spinand, &status);
352 if (ret)
353 return ret;
354
355 if (!(status & STATUS_BUSY))
356 goto out;
357 } while (time_before(jiffies, timeo));
358
359 /*
360 * Extra read, just in case the STATUS_READY bit has changed
361 * since our last check
362 */
363 ret = spinand_read_status(spinand, &status);
364 if (ret)
365 return ret;
366
367out:
368 if (s)
369 *s = status;
370
371 return status & STATUS_BUSY ? -ETIMEDOUT : 0;
372}
373
f1541773
CG		 374static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr,
375 u8 ndummy, u8 *buf)
7529df46 376{
f1541773
CG		 377 struct spi_mem_op op = SPINAND_READID_OP(
378 naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
7529df46
PP		 379 int ret;
380
381 ret = spi_mem_exec_op(spinand->spimem, &op);
382 if (!ret)
383 memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
384
385 return ret;
386}
387
388static int spinand_reset_op(struct spinand_device *spinand)
389{
390 struct spi_mem_op op = SPINAND_RESET_OP;
391 int ret;
392
393 ret = spi_mem_exec_op(spinand->spimem, &op);
394 if (ret)
395 return ret;
396
397 return spinand_wait(spinand, NULL);
398}
399
400static int spinand_lock_block(struct spinand_device *spinand, u8 lock)
401{
402 return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock);
403}
404
405static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
406{
407 struct nand_device *nand = spinand_to_nand(spinand);
408
409 if (spinand->eccinfo.get_status)
410 return spinand->eccinfo.get_status(spinand, status);
411
412 switch (status & STATUS_ECC_MASK) {
413 case STATUS_ECC_NO_BITFLIPS:
414 return 0;
415
416 case STATUS_ECC_HAS_BITFLIPS:
417 /*
418 * We have no way to know exactly how many bitflips have been
419 * fixed, so let's return the maximum possible value so that
420 * wear-leveling layers move the data immediately.
421 */
422 return nand->eccreq.strength;
423
424 case STATUS_ECC_UNCOR_ERROR:
425 return -EBADMSG;
426
427 default:
428 break;
429 }
430
431 return -EINVAL;
432}
433
434static int spinand_read_page(struct spinand_device *spinand,
435 const struct nand_page_io_req *req,
436 bool ecc_enabled)
437{
438 u8 status;
439 int ret;
440
441 ret = spinand_load_page_op(spinand, req);
442 if (ret)
443 return ret;
444
445 ret = spinand_wait(spinand, &status);
446 if (ret < 0)
447 return ret;
448
449 ret = spinand_read_from_cache_op(spinand, req);
450 if (ret)
451 return ret;
452
453 if (!ecc_enabled)
454 return 0;
455
456 return spinand_check_ecc_status(spinand, status);
457}
458
459static int spinand_write_page(struct spinand_device *spinand,
460 const struct nand_page_io_req *req)
461{
462 u8 status;
463 int ret;
464
465 ret = spinand_write_enable_op(spinand);
466 if (ret)
467 return ret;
468
469 ret = spinand_write_to_cache_op(spinand, req);
470 if (ret)
471 return ret;
472
473 ret = spinand_program_op(spinand, req);
474 if (ret)
475 return ret;
476
477 ret = spinand_wait(spinand, &status);
478 if (!ret && (status & STATUS_PROG_FAILED))
479 ret = -EIO;
480
481 return ret;
482}
483
484static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
485 struct mtd_oob_ops *ops)
486{
487 struct spinand_device *spinand = mtd_to_spinand(mtd);
488 struct nand_device *nand = mtd_to_nanddev(mtd);
489 unsigned int max_bitflips = 0;
490 struct nand_io_iter iter;
491 bool enable_ecc = false;
492 bool ecc_failed = false;
493 int ret = 0;
494
495 if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout)
496 enable_ecc = true;
497
498 mutex_lock(&spinand->lock);
499
500 nanddev_io_for_each_page(nand, from, ops, &iter) {
501 ret = spinand_select_target(spinand, iter.req.pos.target);
502 if (ret)
503 break;
504
505 ret = spinand_ecc_enable(spinand, enable_ecc);
506 if (ret)
507 break;
508
509 ret = spinand_read_page(spinand, &iter.req, enable_ecc);
510 if (ret < 0 && ret != -EBADMSG)
511 break;
512
513 if (ret == -EBADMSG) {
514 ecc_failed = true;
515 mtd->ecc_stats.failed++;
7529df46
PP		 516 } else {
517 mtd->ecc_stats.corrected += ret;
518 max_bitflips = max_t(unsigned int, max_bitflips, ret);
519 }
520
b83408b5 521 ret = 0;
7529df46
PP		 522 ops->retlen += iter.req.datalen;
523 ops->oobretlen += iter.req.ooblen;
524 }
525
526 mutex_unlock(&spinand->lock);
527
528 if (ecc_failed && !ret)
529 ret = -EBADMSG;
530
531 return ret ? ret : max_bitflips;
532}
533
534static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
535 struct mtd_oob_ops *ops)
536{
537 struct spinand_device *spinand = mtd_to_spinand(mtd);
538 struct nand_device *nand = mtd_to_nanddev(mtd);
539 struct nand_io_iter iter;
540 bool enable_ecc = false;
541 int ret = 0;
542
543 if (ops->mode != MTD_OPS_RAW && mtd->ooblayout)
544 enable_ecc = true;
545
546 mutex_lock(&spinand->lock);
547
548 nanddev_io_for_each_page(nand, to, ops, &iter) {
549 ret = spinand_select_target(spinand, iter.req.pos.target);
550 if (ret)
551 break;
552
553 ret = spinand_ecc_enable(spinand, enable_ecc);
554 if (ret)
555 break;
556
557 ret = spinand_write_page(spinand, &iter.req);
558 if (ret)
559 break;
560
561 ops->retlen += iter.req.datalen;
562 ops->oobretlen += iter.req.ooblen;
563 }
564
565 mutex_unlock(&spinand->lock);
566
567 return ret;
568}
569
570static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
571{
572 struct spinand_device *spinand = nand_to_spinand(nand);
21489375 573 u8 marker[2] = { };
7529df46
PP		 574 struct nand_page_io_req req = {
575 .pos = *pos,
21489375 576 .ooblen = sizeof(marker),
7529df46 577 .ooboffs = 0,
21489375 578 .oobbuf.in = marker,
7529df46
PP		 579 .mode = MTD_OPS_RAW,
580 };
581
7529df46
PP		 582 spinand_select_target(spinand, pos->target);
583 spinand_read_page(spinand, &req, false);
21489375 584 if (marker[0] != 0xff || marker[1] != 0xff)
7529df46
PP		 585 return true;
586
587 return false;
588}
589
590static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
591{
592 struct nand_device *nand = mtd_to_nanddev(mtd);
593 struct spinand_device *spinand = nand_to_spinand(nand);
594 struct nand_pos pos;
595 int ret;
596
597 nanddev_offs_to_pos(nand, offs, &pos);
598 mutex_lock(&spinand->lock);
599 ret = nanddev_isbad(nand, &pos);
600 mutex_unlock(&spinand->lock);
601
602 return ret;
603}
604
605static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
606{
607 struct spinand_device *spinand = nand_to_spinand(nand);
21489375 608 u8 marker[2] = { };
7529df46
PP		 609 struct nand_page_io_req req = {
610 .pos = *pos,
611 .ooboffs = 0,
21489375
FS		 612 .ooblen = sizeof(marker),
613 .oobbuf.out = marker,
621a7b78 614 .mode = MTD_OPS_RAW,
7529df46
PP		 615 };
616 int ret;
617
7529df46
PP		 618 ret = spinand_select_target(spinand, pos->target);
619 if (ret)
620 return ret;
621
622 ret = spinand_write_enable_op(spinand);
623 if (ret)
624 return ret;
625
7529df46
PP		 626 return spinand_write_page(spinand, &req);
627}
628
629static int spinand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
630{
631 struct nand_device *nand = mtd_to_nanddev(mtd);
632 struct spinand_device *spinand = nand_to_spinand(nand);
633 struct nand_pos pos;
634 int ret;
635
636 nanddev_offs_to_pos(nand, offs, &pos);
637 mutex_lock(&spinand->lock);
638 ret = nanddev_markbad(nand, &pos);
639 mutex_unlock(&spinand->lock);
640
641 return ret;
642}
643
644static int spinand_erase(struct nand_device *nand, const struct nand_pos *pos)
645{
646 struct spinand_device *spinand = nand_to_spinand(nand);
647 u8 status;
648 int ret;
649
650 ret = spinand_select_target(spinand, pos->target);
651 if (ret)
652 return ret;
653
654 ret = spinand_write_enable_op(spinand);
655 if (ret)
656 return ret;
657
658 ret = spinand_erase_op(spinand, pos);
659 if (ret)
660 return ret;
661
662 ret = spinand_wait(spinand, &status);
663 if (!ret && (status & STATUS_ERASE_FAILED))
664 ret = -EIO;
665
666 return ret;
667}
668
669static int spinand_mtd_erase(struct mtd_info *mtd,
670 struct erase_info *einfo)
671{
672 struct spinand_device *spinand = mtd_to_spinand(mtd);
673 int ret;
674
675 mutex_lock(&spinand->lock);
676 ret = nanddev_mtd_erase(mtd, einfo);
677 mutex_unlock(&spinand->lock);
678
679 return ret;
680}
681
682static int spinand_mtd_block_isreserved(struct mtd_info *mtd, loff_t offs)
683{
684 struct spinand_device *spinand = mtd_to_spinand(mtd);
685 struct nand_device *nand = mtd_to_nanddev(mtd);
686 struct nand_pos pos;
687 int ret;
688
689 nanddev_offs_to_pos(nand, offs, &pos);
690 mutex_lock(&spinand->lock);
691 ret = nanddev_isreserved(nand, &pos);
692 mutex_unlock(&spinand->lock);
693
694 return ret;
695}
696
981d1aa0
BB		 697static int spinand_create_dirmap(struct spinand_device *spinand,
698 unsigned int plane)
699{
700 struct nand_device *nand = spinand_to_nand(spinand);
701 struct spi_mem_dirmap_info info = {
702 .length = nanddev_page_size(nand) +
703 nanddev_per_page_oobsize(nand),
704 };
705 struct spi_mem_dirmap_desc *desc;
706
707 /* The plane number is passed in MSB just above the column address */
708 info.offset = plane << fls(nand->memorg.pagesize);
709
710 info.op_tmpl = *spinand->op_templates.update_cache;
711 desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
712 spinand->spimem, &info);
713 if (IS_ERR(desc))
714 return PTR_ERR(desc);
715
716 spinand->dirmaps[plane].wdesc = desc;
717
718 info.op_tmpl = *spinand->op_templates.read_cache;
719 desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
720 spinand->spimem, &info);
721 if (IS_ERR(desc))
722 return PTR_ERR(desc);
723
724 spinand->dirmaps[plane].rdesc = desc;
725
726 return 0;
727}
728
729static int spinand_create_dirmaps(struct spinand_device *spinand)
730{
731 struct nand_device *nand = spinand_to_nand(spinand);
732 int i, ret;
733
734 spinand->dirmaps = devm_kzalloc(&spinand->spimem->spi->dev,
735 sizeof(*spinand->dirmaps) *
736 nand->memorg.planes_per_lun,
737 GFP_KERNEL);
738 if (!spinand->dirmaps)
739 return -ENOMEM;
740
741 for (i = 0; i < nand->memorg.planes_per_lun; i++) {
742 ret = spinand_create_dirmap(spinand, i);
743 if (ret)
744 return ret;
745 }
746
747 return 0;
748}
749
7529df46
PP		 750static const struct nand_ops spinand_ops = {
751 .erase = spinand_erase,
752 .markbad = spinand_markbad,
753 .isbad = spinand_isbad,
754};
755
a508e887 756static const struct spinand_manufacturer *spinand_manufacturers[] = {
c93c6132 757 &gigadevice_spinand_manufacturer,
b02308af 758 &macronix_spinand_manufacturer,
a508e887 759 &micron_spinand_manufacturer,
35526916 760 &paragon_spinand_manufacturer,
10949af1 761 &toshiba_spinand_manufacturer,
1075492b 762 &winbond_spinand_manufacturer,
a508e887
PP		 763};
764
f1541773
CG		 765static int spinand_manufacturer_match(struct spinand_device *spinand,
766 enum spinand_readid_method rdid_method)
7529df46 767{
f1541773 768 u8 *id = spinand->id.data;
a508e887
PP		 769 unsigned int i;
770 int ret;
771
772 for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
f1541773
CG		 773 const struct spinand_manufacturer *manufacturer =
774 spinand_manufacturers[i];
775
776 if (id[0] != manufacturer->id)
777 continue;
a508e887 778
f1541773
CG		 779 ret = spinand_match_and_init(spinand,
780 manufacturer->chips,
781 manufacturer->nchips,
782 rdid_method);
783 if (ret < 0)
784 continue;
785
786 spinand->manufacturer = manufacturer;
787 return 0;
788 }
7529df46
PP		 789 return -ENOTSUPP;
790}
791
f1541773
CG		 792static int spinand_id_detect(struct spinand_device *spinand)
793{
794 u8 *id = spinand->id.data;
795 int ret;
796
797 ret = spinand_read_id_op(spinand, 0, 0, id);
798 if (ret)
799 return ret;
800 ret = spinand_manufacturer_match(spinand, SPINAND_READID_METHOD_OPCODE);
801 if (!ret)
802 return 0;
803
804 ret = spinand_read_id_op(spinand, 1, 0, id);
805 if (ret)
806 return ret;
807 ret = spinand_manufacturer_match(spinand,
808 SPINAND_READID_METHOD_OPCODE_ADDR);
809 if (!ret)
810 return 0;
811
812 ret = spinand_read_id_op(spinand, 0, 1, id);
813 if (ret)
814 return ret;
815 ret = spinand_manufacturer_match(spinand,
816 SPINAND_READID_METHOD_OPCODE_DUMMY);
817
818 return ret;
819}
820
7529df46
PP		 821static int spinand_manufacturer_init(struct spinand_device *spinand)
822{
823 if (spinand->manufacturer->ops->init)
824 return spinand->manufacturer->ops->init(spinand);
825
826 return 0;
827}
828
829static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
830{
831 /* Release manufacturer private data */
832 if (spinand->manufacturer->ops->cleanup)
833 return spinand->manufacturer->ops->cleanup(spinand);
834}
835
836static const struct spi_mem_op *
837spinand_select_op_variant(struct spinand_device *spinand,
838 const struct spinand_op_variants *variants)
839{
840 struct nand_device *nand = spinand_to_nand(spinand);
841 unsigned int i;
842
843 for (i = 0; i < variants->nops; i++) {
844 struct spi_mem_op op = variants->ops[i];
845 unsigned int nbytes;
846 int ret;
847
848 nbytes = nanddev_per_page_oobsize(nand) +
849 nanddev_page_size(nand);
850
851 while (nbytes) {
852 op.data.nbytes = nbytes;
853 ret = spi_mem_adjust_op_size(spinand->spimem, &op);
854 if (ret)
855 break;
856
857 if (!spi_mem_supports_op(spinand->spimem, &op))
858 break;
859
860 nbytes -= op.data.nbytes;
861 }
862
863 if (!nbytes)
864 return &variants->ops[i];
865 }
866
867 return NULL;
868}
869
870/**
871 * spinand_match_and_init() - Try to find a match between a device ID and an
872 * entry in a spinand_info table
873 * @spinand: SPI NAND object
874 * @table: SPI NAND device description table
875 * @table_size: size of the device description table
f1541773 876 * @rdid_method: read id method to match
7529df46 877 *
f1541773 878 * Match between a device ID retrieved through the READ_ID command and an
7529df46
PP		 879 * entry in the SPI NAND description table. If a match is found, the spinand
880 * object will be initialized with information provided by the matching
881 * spinand_info entry.
882 *
883 * Return: 0 on success, a negative error code otherwise.
884 */
885int spinand_match_and_init(struct spinand_device *spinand,
886 const struct spinand_info *table,
f1541773
CG		 887 unsigned int table_size,
888 enum spinand_readid_method rdid_method)
7529df46 889{
f1541773 890 u8 *id = spinand->id.data;
7529df46
PP		 891 struct nand_device *nand = spinand_to_nand(spinand);
892 unsigned int i;
893
894 for (i = 0; i < table_size; i++) {
895 const struct spinand_info *info = &table[i];
896 const struct spi_mem_op *op;
897
f1541773
CG		 898 if (rdid_method != info->devid.method)
899 continue;
900
901 if (memcmp(id + 1, info->devid.id, info->devid.len))
7529df46
PP		 902 continue;
903
904 nand->memorg = table[i].memorg;
905 nand->eccreq = table[i].eccreq;
906 spinand->eccinfo = table[i].eccinfo;
907 spinand->flags = table[i].flags;
f1541773 908 spinand->id.len = 1 + table[i].devid.len;
7529df46
PP		 909 spinand->select_target = table[i].select_target;
910
911 op = spinand_select_op_variant(spinand,
912 info->op_variants.read_cache);
913 if (!op)
914 return -ENOTSUPP;
915
916 spinand->op_templates.read_cache = op;
917
918 op = spinand_select_op_variant(spinand,
919 info->op_variants.write_cache);
920 if (!op)
921 return -ENOTSUPP;
922
923 spinand->op_templates.write_cache = op;
924
925 op = spinand_select_op_variant(spinand,
926 info->op_variants.update_cache);
927 spinand->op_templates.update_cache = op;
928
929 return 0;
930 }
931
932 return -ENOTSUPP;
933}
934
935static int spinand_detect(struct spinand_device *spinand)
936{
937 struct device *dev = &spinand->spimem->spi->dev;
938 struct nand_device *nand = spinand_to_nand(spinand);
939 int ret;
940
941 ret = spinand_reset_op(spinand);
942 if (ret)
943 return ret;
944
f1541773 945 ret = spinand_id_detect(spinand);
7529df46
PP		 946 if (ret) {
947 dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
948 spinand->id.data);
949 return ret;
950 }
951
952 if (nand->memorg.ntargets > 1 && !spinand->select_target) {
953 dev_err(dev,
954 "SPI NANDs with more than one die must implement ->select_target()\n");
955 return -EINVAL;
956 }
957
958 dev_info(&spinand->spimem->spi->dev,
959 "%s SPI NAND was found.\n", spinand->manufacturer->name);
960 dev_info(&spinand->spimem->spi->dev,
961 "%llu MiB, block size: %zu KiB, page size: %zu, OOB size: %u\n",
962 nanddev_size(nand) >> 20, nanddev_eraseblock_size(nand) >> 10,
963 nanddev_page_size(nand), nanddev_per_page_oobsize(nand));
964
965 return 0;
966}
967
968static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section,
969 struct mtd_oob_region *region)
970{
971 return -ERANGE;
972}
973
974static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section,
975 struct mtd_oob_region *region)
976{
977 if (section)
978 return -ERANGE;
979
980 /* Reserve 2 bytes for the BBM. */
981 region->offset = 2;
982 region->length = 62;
983
984 return 0;
985}
986
987static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = {
988 .ecc = spinand_noecc_ooblayout_ecc,
989 .free = spinand_noecc_ooblayout_free,
990};
991
992static int spinand_init(struct spinand_device *spinand)
993{
994 struct device *dev = &spinand->spimem->spi->dev;
995 struct mtd_info *mtd = spinand_to_mtd(spinand);
996 struct nand_device *nand = mtd_to_nanddev(mtd);
997 int ret, i;
998
999 /*
1000 * We need a scratch buffer because the spi_mem interface requires that
1001 * buf passed in spi_mem_op->data.buf be DMA-able.
1002 */
1003 spinand->scratchbuf = kzalloc(SPINAND_MAX_ID_LEN, GFP_KERNEL);
1004 if (!spinand->scratchbuf)
1005 return -ENOMEM;
1006
1007 ret = spinand_detect(spinand);
1008 if (ret)
1009 goto err_free_bufs;
1010
1011 /*
1012 * Use kzalloc() instead of devm_kzalloc() here, because some drivers
1013 * may use this buffer for DMA access.
1014 * Memory allocated by devm_ does not guarantee DMA-safe alignment.
1015 */
1016 spinand->databuf = kzalloc(nanddev_page_size(nand) +
1017 nanddev_per_page_oobsize(nand),
1018 GFP_KERNEL);
1019 if (!spinand->databuf) {
1020 ret = -ENOMEM;
1021 goto err_free_bufs;
1022 }
1023
1024 spinand->oobbuf = spinand->databuf + nanddev_page_size(nand);
1025
1026 ret = spinand_init_cfg_cache(spinand);
1027 if (ret)
1028 goto err_free_bufs;
1029
1030 ret = spinand_init_quad_enable(spinand);
1031 if (ret)
1032 goto err_free_bufs;
1033
1034 ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
1035 if (ret)
1036 goto err_free_bufs;
1037
1038 ret = spinand_manufacturer_init(spinand);
1039 if (ret) {
1040 dev_err(dev,
1041 "Failed to initialize the SPI NAND chip (err = %d)\n",
1042 ret);
1043 goto err_free_bufs;
1044 }
1045
981d1aa0
BB		 1046 ret = spinand_create_dirmaps(spinand);
1047 if (ret) {
1048 dev_err(dev,
1049 "Failed to create direct mappings for read/write operations (err = %d)\n",
1050 ret);
1051 goto err_manuf_cleanup;
1052 }
1053
7529df46
PP		 1054 /* After power up, all blocks are locked, so unlock them here. */
1055 for (i = 0; i < nand->memorg.ntargets; i++) {
1056 ret = spinand_select_target(spinand, i);
1057 if (ret)
c3c7dbf4 1058 goto err_manuf_cleanup;
7529df46
PP		 1059
1060 ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
1061 if (ret)
c3c7dbf4 1062 goto err_manuf_cleanup;
7529df46
PP		 1063 }
1064
1065 ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
1066 if (ret)
1067 goto err_manuf_cleanup;
1068
1069 /*
1070 * Right now, we don't support ECC, so let the whole oob
1071 * area is available for user.
1072 */
1073 mtd->_read_oob = spinand_mtd_read;
1074 mtd->_write_oob = spinand_mtd_write;
1075 mtd->_block_isbad = spinand_mtd_block_isbad;
1076 mtd->_block_markbad = spinand_mtd_block_markbad;
1077 mtd->_block_isreserved = spinand_mtd_block_isreserved;
1078 mtd->_erase = spinand_mtd_erase;
50919848 1079 mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks;
7529df46
PP		 1080
1081 if (spinand->eccinfo.ooblayout)
1082 mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
1083 else
1084 mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
1085
1086 ret = mtd_ooblayout_count_freebytes(mtd);
1087 if (ret < 0)
1088 goto err_cleanup_nanddev;
1089
1090 mtd->oobavail = ret;
1091
3507273d
MR		 1092 /* Propagate ECC information to mtd_info */
1093 mtd->ecc_strength = nand->eccreq.strength;
1094 mtd->ecc_step_size = nand->eccreq.step_size;
1095
7529df46
PP		 1096 return 0;
1097
1098err_cleanup_nanddev:
1099 nanddev_cleanup(nand);
1100
1101err_manuf_cleanup:
1102 spinand_manufacturer_cleanup(spinand);
1103
1104err_free_bufs:
1105 kfree(spinand->databuf);
1106 kfree(spinand->scratchbuf);
1107 return ret;
1108}
1109
1110static void spinand_cleanup(struct spinand_device *spinand)
1111{
1112 struct nand_device *nand = spinand_to_nand(spinand);
1113
1114 nanddev_cleanup(nand);
1115 spinand_manufacturer_cleanup(spinand);
1116 kfree(spinand->databuf);
1117 kfree(spinand->scratchbuf);
1118}
1119
1120static int spinand_probe(struct spi_mem *mem)
1121{
1122 struct spinand_device *spinand;
1123 struct mtd_info *mtd;
1124 int ret;
1125
1126 spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
1127 GFP_KERNEL);
1128 if (!spinand)
1129 return -ENOMEM;
1130
1131 spinand->spimem = mem;
1132 spi_mem_set_drvdata(mem, spinand);
1133 spinand_set_of_node(spinand, mem->spi->dev.of_node);
1134 mutex_init(&spinand->lock);
1135 mtd = spinand_to_mtd(spinand);
1136 mtd->dev.parent = &mem->spi->dev;
1137
1138 ret = spinand_init(spinand);
1139 if (ret)
1140 return ret;
1141
1142 ret = mtd_device_register(mtd, NULL, 0);
1143 if (ret)
1144 goto err_spinand_cleanup;
1145
1146 return 0;
1147
1148err_spinand_cleanup:
1149 spinand_cleanup(spinand);
1150
1151 return ret;
1152}
1153
1154static int spinand_remove(struct spi_mem *mem)
1155{
1156 struct spinand_device *spinand;
1157 struct mtd_info *mtd;
1158 int ret;
1159
1160 spinand = spi_mem_get_drvdata(mem);
1161 mtd = spinand_to_mtd(spinand);
1162
1163 ret = mtd_device_unregister(mtd);
1164 if (ret)
1165 return ret;
1166
1167 spinand_cleanup(spinand);
1168
1169 return 0;
1170}
1171
1172static const struct spi_device_id spinand_ids[] = {
1173 { .name = "spi-nand" },
1174 { /* sentinel */ },
1175};
1176
1177#ifdef CONFIG_OF
1178static const struct of_device_id spinand_of_ids[] = {
1179 { .compatible = "spi-nand" },
1180 { /* sentinel */ },
1181};
1182#endif
1183
1184static struct spi_mem_driver spinand_drv = {
1185 .spidrv = {
1186 .id_table = spinand_ids,
1187 .driver = {
1188 .name = "spi-nand",
1189 .of_match_table = of_match_ptr(spinand_of_ids),
1190 },
1191 },
1192 .probe = spinand_probe,
1193 .remove = spinand_remove,
1194};
1195module_spi_mem_driver(spinand_drv);
1196
1197MODULE_DESCRIPTION("SPI NAND framework");
1198MODULE_AUTHOR("Peter Pan<peterpandong@micron.com>");
1199MODULE_LICENSE("GPL v2");
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