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40d69043 DT |
1 | /* |
2 | * Copyright (C) ST-Ericsson AB 2010 | |
c2cd0a56 | 3 | * Author: Daniel Martensson |
c002090c | 4 | * Dmitry.Tarnyagin / dmitry.tarnyagin@lockless.no |
40d69043 DT |
5 | * License terms: GNU General Public License (GPL) version 2. |
6 | */ | |
7 | ||
39abbaef | 8 | #define pr_fmt(fmt) KBUILD_MODNAME fmt |
9 | ||
40d69043 DT |
10 | #include <linux/init.h> |
11 | #include <linux/module.h> | |
12 | #include <linux/device.h> | |
40d69043 DT |
13 | #include <linux/netdevice.h> |
14 | #include <linux/string.h> | |
15 | #include <linux/list.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/if_arp.h> | |
20 | #include <linux/timer.h> | |
c4125400 | 21 | #include <net/rtnetlink.h> |
ece367d5 | 22 | #include <linux/pkt_sched.h> |
40d69043 DT |
23 | #include <net/caif/caif_layer.h> |
24 | #include <net/caif/caif_hsi.h> | |
25 | ||
26 | MODULE_LICENSE("GPL"); | |
c2cd0a56 | 27 | MODULE_AUTHOR("Daniel Martensson"); |
40d69043 DT |
28 | MODULE_DESCRIPTION("CAIF HSI driver"); |
29 | ||
30 | /* Returns the number of padding bytes for alignment. */ | |
31 | #define PAD_POW2(x, pow) ((((x)&((pow)-1)) == 0) ? 0 :\ | |
32 | (((pow)-((x)&((pow)-1))))) | |
33 | ||
91fa0cbc | 34 | static const struct cfhsi_config hsi_default_config = { |
28bd2049 | 35 | |
91fa0cbc SB |
36 | /* Inactivity timeout on HSI, ms */ |
37 | .inactivity_timeout = HZ, | |
ece367d5 | 38 | |
91fa0cbc SB |
39 | /* Aggregation timeout (ms) of zero means no aggregation is done*/ |
40 | .aggregation_timeout = 1, | |
40d69043 | 41 | |
91fa0cbc SB |
42 | /* |
43 | * HSI link layer flow-control thresholds. | |
44 | * Threshold values for the HSI packet queue. Flow-control will be | |
45 | * asserted when the number of packets exceeds q_high_mark. It will | |
46 | * not be de-asserted before the number of packets drops below | |
47 | * q_low_mark. | |
48 | * Warning: A high threshold value might increase throughput but it | |
49 | * will at the same time prevent channel prioritization and increase | |
50 | * the risk of flooding the modem. The high threshold should be above | |
51 | * the low. | |
52 | */ | |
53 | .q_high_mark = 100, | |
54 | .q_low_mark = 50, | |
40d69043 | 55 | |
91fa0cbc SB |
56 | /* |
57 | * HSI padding options. | |
58 | * Warning: must be a base of 2 (& operation used) and can not be zero ! | |
59 | */ | |
60 | .head_align = 4, | |
61 | .tail_align = 4, | |
62 | }; | |
40d69043 DT |
63 | |
64 | #define ON 1 | |
65 | #define OFF 0 | |
66 | ||
40d69043 | 67 | static LIST_HEAD(cfhsi_list); |
40d69043 | 68 | |
e99e88a9 | 69 | static void cfhsi_inactivity_tout(struct timer_list *t) |
40d69043 | 70 | { |
e99e88a9 | 71 | struct cfhsi *cfhsi = from_timer(cfhsi, t, inactivity_timer); |
40d69043 | 72 | |
90de9bab | 73 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
74 | __func__); |
75 | ||
76 | /* Schedule power down work queue. */ | |
77 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
78 | queue_work(cfhsi->wq, &cfhsi->wake_down_work); | |
79 | } | |
80 | ||
ece367d5 DT |
81 | static void cfhsi_update_aggregation_stats(struct cfhsi *cfhsi, |
82 | const struct sk_buff *skb, | |
83 | int direction) | |
84 | { | |
85 | struct caif_payload_info *info; | |
86 | int hpad, tpad, len; | |
87 | ||
88 | info = (struct caif_payload_info *)&skb->cb; | |
91fa0cbc SB |
89 | hpad = 1 + PAD_POW2((info->hdr_len + 1), cfhsi->cfg.head_align); |
90 | tpad = PAD_POW2((skb->len + hpad), cfhsi->cfg.tail_align); | |
ece367d5 DT |
91 | len = skb->len + hpad + tpad; |
92 | ||
93 | if (direction > 0) | |
94 | cfhsi->aggregation_len += len; | |
95 | else if (direction < 0) | |
96 | cfhsi->aggregation_len -= len; | |
97 | } | |
98 | ||
99 | static bool cfhsi_can_send_aggregate(struct cfhsi *cfhsi) | |
100 | { | |
101 | int i; | |
102 | ||
91fa0cbc | 103 | if (cfhsi->cfg.aggregation_timeout == 0) |
ece367d5 DT |
104 | return true; |
105 | ||
106 | for (i = 0; i < CFHSI_PRIO_BEBK; ++i) { | |
107 | if (cfhsi->qhead[i].qlen) | |
108 | return true; | |
109 | } | |
110 | ||
111 | /* TODO: Use aggregation_len instead */ | |
112 | if (cfhsi->qhead[CFHSI_PRIO_BEBK].qlen >= CFHSI_MAX_PKTS) | |
113 | return true; | |
114 | ||
115 | return false; | |
116 | } | |
117 | ||
118 | static struct sk_buff *cfhsi_dequeue(struct cfhsi *cfhsi) | |
119 | { | |
120 | struct sk_buff *skb; | |
121 | int i; | |
122 | ||
123 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) { | |
124 | skb = skb_dequeue(&cfhsi->qhead[i]); | |
125 | if (skb) | |
126 | break; | |
127 | } | |
128 | ||
129 | return skb; | |
130 | } | |
131 | ||
132 | static int cfhsi_tx_queue_len(struct cfhsi *cfhsi) | |
133 | { | |
134 | int i, len = 0; | |
135 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) | |
136 | len += skb_queue_len(&cfhsi->qhead[i]); | |
137 | return len; | |
138 | } | |
139 | ||
40d69043 DT |
140 | static void cfhsi_abort_tx(struct cfhsi *cfhsi) |
141 | { | |
142 | struct sk_buff *skb; | |
143 | ||
144 | for (;;) { | |
145 | spin_lock_bh(&cfhsi->lock); | |
ece367d5 | 146 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
147 | if (!skb) |
148 | break; | |
149 | ||
150 | cfhsi->ndev->stats.tx_errors++; | |
151 | cfhsi->ndev->stats.tx_dropped++; | |
ece367d5 | 152 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
40d69043 DT |
153 | spin_unlock_bh(&cfhsi->lock); |
154 | kfree_skb(skb); | |
155 | } | |
156 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; | |
157 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
ece367d5 | 158 | mod_timer(&cfhsi->inactivity_timer, |
91fa0cbc | 159 | jiffies + cfhsi->cfg.inactivity_timeout); |
40d69043 DT |
160 | spin_unlock_bh(&cfhsi->lock); |
161 | } | |
162 | ||
163 | static int cfhsi_flush_fifo(struct cfhsi *cfhsi) | |
164 | { | |
165 | char buffer[32]; /* Any reasonable value */ | |
166 | size_t fifo_occupancy; | |
167 | int ret; | |
168 | ||
90de9bab | 169 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
170 | __func__); |
171 | ||
40d69043 | 172 | do { |
1c385f1f | 173 | ret = cfhsi->ops->cfhsi_fifo_occupancy(cfhsi->ops, |
40d69043 DT |
174 | &fifo_occupancy); |
175 | if (ret) { | |
90de9bab | 176 | netdev_warn(cfhsi->ndev, |
40d69043 DT |
177 | "%s: can't get FIFO occupancy: %d.\n", |
178 | __func__, ret); | |
179 | break; | |
180 | } else if (!fifo_occupancy) | |
181 | /* No more data, exitting normally */ | |
182 | break; | |
183 | ||
184 | fifo_occupancy = min(sizeof(buffer), fifo_occupancy); | |
185 | set_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); | |
1c385f1f SB |
186 | ret = cfhsi->ops->cfhsi_rx(buffer, fifo_occupancy, |
187 | cfhsi->ops); | |
40d69043 DT |
188 | if (ret) { |
189 | clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); | |
90de9bab | 190 | netdev_warn(cfhsi->ndev, |
40d69043 DT |
191 | "%s: can't read data: %d.\n", |
192 | __func__, ret); | |
193 | break; | |
194 | } | |
195 | ||
196 | ret = 5 * HZ; | |
687b13e9 | 197 | ret = wait_event_interruptible_timeout(cfhsi->flush_fifo_wait, |
40d69043 DT |
198 | !test_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits), ret); |
199 | ||
200 | if (ret < 0) { | |
90de9bab | 201 | netdev_warn(cfhsi->ndev, |
40d69043 DT |
202 | "%s: can't wait for flush complete: %d.\n", |
203 | __func__, ret); | |
204 | break; | |
205 | } else if (!ret) { | |
206 | ret = -ETIMEDOUT; | |
90de9bab | 207 | netdev_warn(cfhsi->ndev, |
40d69043 DT |
208 | "%s: timeout waiting for flush complete.\n", |
209 | __func__); | |
210 | break; | |
211 | } | |
212 | } while (1); | |
213 | ||
40d69043 DT |
214 | return ret; |
215 | } | |
216 | ||
217 | static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi) | |
218 | { | |
219 | int nfrms = 0; | |
220 | int pld_len = 0; | |
221 | struct sk_buff *skb; | |
222 | u8 *pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
223 | ||
ece367d5 | 224 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
225 | if (!skb) |
226 | return 0; | |
227 | ||
94230feb | 228 | /* Clear offset. */ |
229 | desc->offset = 0; | |
230 | ||
40d69043 DT |
231 | /* Check if we can embed a CAIF frame. */ |
232 | if (skb->len < CFHSI_MAX_EMB_FRM_SZ) { | |
233 | struct caif_payload_info *info; | |
b42f7b5c SB |
234 | int hpad; |
235 | int tpad; | |
40d69043 DT |
236 | |
237 | /* Calculate needed head alignment and tail alignment. */ | |
238 | info = (struct caif_payload_info *)&skb->cb; | |
239 | ||
91fa0cbc SB |
240 | hpad = 1 + PAD_POW2((info->hdr_len + 1), cfhsi->cfg.head_align); |
241 | tpad = PAD_POW2((skb->len + hpad), cfhsi->cfg.tail_align); | |
40d69043 DT |
242 | |
243 | /* Check if frame still fits with added alignment. */ | |
244 | if ((skb->len + hpad + tpad) <= CFHSI_MAX_EMB_FRM_SZ) { | |
245 | u8 *pemb = desc->emb_frm; | |
246 | desc->offset = CFHSI_DESC_SHORT_SZ; | |
247 | *pemb = (u8)(hpad - 1); | |
248 | pemb += hpad; | |
249 | ||
250 | /* Update network statistics. */ | |
ece367d5 | 251 | spin_lock_bh(&cfhsi->lock); |
40d69043 DT |
252 | cfhsi->ndev->stats.tx_packets++; |
253 | cfhsi->ndev->stats.tx_bytes += skb->len; | |
ece367d5 DT |
254 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
255 | spin_unlock_bh(&cfhsi->lock); | |
40d69043 DT |
256 | |
257 | /* Copy in embedded CAIF frame. */ | |
258 | skb_copy_bits(skb, 0, pemb, skb->len); | |
ece367d5 DT |
259 | |
260 | /* Consume the SKB */ | |
40d69043 DT |
261 | consume_skb(skb); |
262 | skb = NULL; | |
263 | } | |
94230feb | 264 | } |
40d69043 DT |
265 | |
266 | /* Create payload CAIF frames. */ | |
267 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
268 | while (nfrms < CFHSI_MAX_PKTS) { | |
269 | struct caif_payload_info *info; | |
b42f7b5c SB |
270 | int hpad; |
271 | int tpad; | |
40d69043 DT |
272 | |
273 | if (!skb) | |
ece367d5 | 274 | skb = cfhsi_dequeue(cfhsi); |
40d69043 DT |
275 | |
276 | if (!skb) | |
277 | break; | |
278 | ||
279 | /* Calculate needed head alignment and tail alignment. */ | |
280 | info = (struct caif_payload_info *)&skb->cb; | |
281 | ||
91fa0cbc SB |
282 | hpad = 1 + PAD_POW2((info->hdr_len + 1), cfhsi->cfg.head_align); |
283 | tpad = PAD_POW2((skb->len + hpad), cfhsi->cfg.tail_align); | |
40d69043 DT |
284 | |
285 | /* Fill in CAIF frame length in descriptor. */ | |
286 | desc->cffrm_len[nfrms] = hpad + skb->len + tpad; | |
287 | ||
288 | /* Fill head padding information. */ | |
289 | *pfrm = (u8)(hpad - 1); | |
290 | pfrm += hpad; | |
291 | ||
292 | /* Update network statistics. */ | |
ece367d5 | 293 | spin_lock_bh(&cfhsi->lock); |
40d69043 DT |
294 | cfhsi->ndev->stats.tx_packets++; |
295 | cfhsi->ndev->stats.tx_bytes += skb->len; | |
ece367d5 DT |
296 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
297 | spin_unlock_bh(&cfhsi->lock); | |
40d69043 DT |
298 | |
299 | /* Copy in CAIF frame. */ | |
300 | skb_copy_bits(skb, 0, pfrm, skb->len); | |
301 | ||
302 | /* Update payload length. */ | |
303 | pld_len += desc->cffrm_len[nfrms]; | |
304 | ||
305 | /* Update frame pointer. */ | |
306 | pfrm += skb->len + tpad; | |
ece367d5 DT |
307 | |
308 | /* Consume the SKB */ | |
40d69043 DT |
309 | consume_skb(skb); |
310 | skb = NULL; | |
311 | ||
312 | /* Update number of frames. */ | |
313 | nfrms++; | |
314 | } | |
315 | ||
316 | /* Unused length fields should be zero-filled (according to SPEC). */ | |
317 | while (nfrms < CFHSI_MAX_PKTS) { | |
318 | desc->cffrm_len[nfrms] = 0x0000; | |
319 | nfrms++; | |
320 | } | |
321 | ||
322 | /* Check if we can piggy-back another descriptor. */ | |
ece367d5 | 323 | if (cfhsi_can_send_aggregate(cfhsi)) |
40d69043 DT |
324 | desc->header |= CFHSI_PIGGY_DESC; |
325 | else | |
326 | desc->header &= ~CFHSI_PIGGY_DESC; | |
327 | ||
328 | return CFHSI_DESC_SZ + pld_len; | |
329 | } | |
330 | ||
ece367d5 | 331 | static void cfhsi_start_tx(struct cfhsi *cfhsi) |
40d69043 | 332 | { |
ece367d5 DT |
333 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; |
334 | int len, res; | |
40d69043 | 335 | |
90de9bab | 336 | netdev_dbg(cfhsi->ndev, "%s.\n", __func__); |
40d69043 DT |
337 | |
338 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
339 | return; | |
340 | ||
40d69043 | 341 | do { |
40d69043 | 342 | /* Create HSI frame. */ |
ece367d5 DT |
343 | len = cfhsi_tx_frm(desc, cfhsi); |
344 | if (!len) { | |
345 | spin_lock_bh(&cfhsi->lock); | |
346 | if (unlikely(cfhsi_tx_queue_len(cfhsi))) { | |
fe47f125 | 347 | spin_unlock_bh(&cfhsi->lock); |
ece367d5 DT |
348 | res = -EAGAIN; |
349 | continue; | |
fe47f125 | 350 | } |
ece367d5 DT |
351 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; |
352 | /* Start inactivity timer. */ | |
353 | mod_timer(&cfhsi->inactivity_timer, | |
91fa0cbc | 354 | jiffies + cfhsi->cfg.inactivity_timeout); |
ece367d5 DT |
355 | spin_unlock_bh(&cfhsi->lock); |
356 | break; | |
357 | } | |
40d69043 DT |
358 | |
359 | /* Set up new transfer. */ | |
1c385f1f | 360 | res = cfhsi->ops->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->ops); |
ece367d5 | 361 | if (WARN_ON(res < 0)) |
90de9bab | 362 | netdev_err(cfhsi->ndev, "%s: TX error %d.\n", |
40d69043 | 363 | __func__, res); |
40d69043 | 364 | } while (res < 0); |
ece367d5 DT |
365 | } |
366 | ||
367 | static void cfhsi_tx_done(struct cfhsi *cfhsi) | |
368 | { | |
90de9bab | 369 | netdev_dbg(cfhsi->ndev, "%s.\n", __func__); |
ece367d5 DT |
370 | |
371 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
372 | return; | |
373 | ||
374 | /* | |
375 | * Send flow on if flow off has been previously signalled | |
376 | * and number of packets is below low water mark. | |
377 | */ | |
378 | spin_lock_bh(&cfhsi->lock); | |
379 | if (cfhsi->flow_off_sent && | |
91fa0cbc | 380 | cfhsi_tx_queue_len(cfhsi) <= cfhsi->cfg.q_low_mark && |
ece367d5 DT |
381 | cfhsi->cfdev.flowctrl) { |
382 | ||
383 | cfhsi->flow_off_sent = 0; | |
384 | cfhsi->cfdev.flowctrl(cfhsi->ndev, ON); | |
385 | } | |
386 | ||
387 | if (cfhsi_can_send_aggregate(cfhsi)) { | |
388 | spin_unlock_bh(&cfhsi->lock); | |
389 | cfhsi_start_tx(cfhsi); | |
390 | } else { | |
391 | mod_timer(&cfhsi->aggregation_timer, | |
91fa0cbc | 392 | jiffies + cfhsi->cfg.aggregation_timeout); |
ece367d5 DT |
393 | spin_unlock_bh(&cfhsi->lock); |
394 | } | |
fe47f125 | 395 | |
fe47f125 | 396 | return; |
40d69043 DT |
397 | } |
398 | ||
1c385f1f | 399 | static void cfhsi_tx_done_cb(struct cfhsi_cb_ops *cb_ops) |
40d69043 DT |
400 | { |
401 | struct cfhsi *cfhsi; | |
402 | ||
1c385f1f | 403 | cfhsi = container_of(cb_ops, struct cfhsi, cb_ops); |
90de9bab | 404 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
405 | __func__); |
406 | ||
407 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
408 | return; | |
687b13e9 | 409 | cfhsi_tx_done(cfhsi); |
40d69043 DT |
410 | } |
411 | ||
5bbed92d | 412 | static int cfhsi_rx_desc(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
40d69043 DT |
413 | { |
414 | int xfer_sz = 0; | |
415 | int nfrms = 0; | |
416 | u16 *plen = NULL; | |
417 | u8 *pfrm = NULL; | |
418 | ||
419 | if ((desc->header & ~CFHSI_PIGGY_DESC) || | |
420 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { | |
90de9bab | 421 | netdev_err(cfhsi->ndev, "%s: Invalid descriptor.\n", |
40d69043 | 422 | __func__); |
5bbed92d | 423 | return -EPROTO; |
40d69043 DT |
424 | } |
425 | ||
426 | /* Check for embedded CAIF frame. */ | |
427 | if (desc->offset) { | |
428 | struct sk_buff *skb; | |
687b13e9 | 429 | int len = 0; |
40d69043 DT |
430 | pfrm = ((u8 *)desc) + desc->offset; |
431 | ||
432 | /* Remove offset padding. */ | |
433 | pfrm += *pfrm + 1; | |
434 | ||
435 | /* Read length of CAIF frame (little endian). */ | |
436 | len = *pfrm; | |
437 | len |= ((*(pfrm+1)) << 8) & 0xFF00; | |
438 | len += 2; /* Add FCS fields. */ | |
439 | ||
5bbed92d DM |
440 | /* Sanity check length of CAIF frame. */ |
441 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { | |
90de9bab | 442 | netdev_err(cfhsi->ndev, "%s: Invalid length.\n", |
5bbed92d DM |
443 | __func__); |
444 | return -EPROTO; | |
445 | } | |
40d69043 DT |
446 | |
447 | /* Allocate SKB (OK even in IRQ context). */ | |
687b13e9 DM |
448 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
449 | if (!skb) { | |
90de9bab | 450 | netdev_err(cfhsi->ndev, "%s: Out of memory !\n", |
687b13e9 DM |
451 | __func__); |
452 | return -ENOMEM; | |
40d69043 DT |
453 | } |
454 | caif_assert(skb != NULL); | |
455 | ||
b952f4df | 456 | skb_put_data(skb, pfrm, len); |
40d69043 DT |
457 | |
458 | skb->protocol = htons(ETH_P_CAIF); | |
459 | skb_reset_mac_header(skb); | |
460 | skb->dev = cfhsi->ndev; | |
461 | ||
462 | /* | |
1c385f1f SB |
463 | * We are in a callback handler and |
464 | * unfortunately we don't know what context we're | |
40d69043 DT |
465 | * running in. |
466 | */ | |
467 | if (in_interrupt()) | |
468 | netif_rx(skb); | |
469 | else | |
470 | netif_rx_ni(skb); | |
471 | ||
472 | /* Update network statistics. */ | |
473 | cfhsi->ndev->stats.rx_packets++; | |
474 | cfhsi->ndev->stats.rx_bytes += len; | |
475 | } | |
476 | ||
40d69043 DT |
477 | /* Calculate transfer length. */ |
478 | plen = desc->cffrm_len; | |
479 | while (nfrms < CFHSI_MAX_PKTS && *plen) { | |
480 | xfer_sz += *plen; | |
481 | plen++; | |
482 | nfrms++; | |
483 | } | |
484 | ||
485 | /* Check for piggy-backed descriptor. */ | |
486 | if (desc->header & CFHSI_PIGGY_DESC) | |
487 | xfer_sz += CFHSI_DESC_SZ; | |
488 | ||
5bbed92d | 489 | if ((xfer_sz % 4) || (xfer_sz > (CFHSI_BUF_SZ_RX - CFHSI_DESC_SZ))) { |
90de9bab | 490 | netdev_err(cfhsi->ndev, |
40d69043 DT |
491 | "%s: Invalid payload len: %d, ignored.\n", |
492 | __func__, xfer_sz); | |
5bbed92d | 493 | return -EPROTO; |
40d69043 | 494 | } |
40d69043 DT |
495 | return xfer_sz; |
496 | } | |
497 | ||
332ad43f | 498 | static int cfhsi_rx_desc_len(struct cfhsi_desc *desc) |
499 | { | |
500 | int xfer_sz = 0; | |
501 | int nfrms = 0; | |
502 | u16 *plen; | |
503 | ||
504 | if ((desc->header & ~CFHSI_PIGGY_DESC) || | |
505 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { | |
506 | ||
507 | pr_err("Invalid descriptor. %x %x\n", desc->header, | |
508 | desc->offset); | |
509 | return -EPROTO; | |
510 | } | |
511 | ||
512 | /* Calculate transfer length. */ | |
513 | plen = desc->cffrm_len; | |
514 | while (nfrms < CFHSI_MAX_PKTS && *plen) { | |
515 | xfer_sz += *plen; | |
516 | plen++; | |
517 | nfrms++; | |
518 | } | |
519 | ||
520 | if (xfer_sz % 4) { | |
521 | pr_err("Invalid payload len: %d, ignored.\n", xfer_sz); | |
522 | return -EPROTO; | |
523 | } | |
524 | return xfer_sz; | |
525 | } | |
526 | ||
5bbed92d | 527 | static int cfhsi_rx_pld(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
40d69043 DT |
528 | { |
529 | int rx_sz = 0; | |
530 | int nfrms = 0; | |
531 | u16 *plen = NULL; | |
532 | u8 *pfrm = NULL; | |
533 | ||
534 | /* Sanity check header and offset. */ | |
535 | if (WARN_ON((desc->header & ~CFHSI_PIGGY_DESC) || | |
536 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ))) { | |
90de9bab | 537 | netdev_err(cfhsi->ndev, "%s: Invalid descriptor.\n", |
40d69043 | 538 | __func__); |
5bbed92d | 539 | return -EPROTO; |
40d69043 DT |
540 | } |
541 | ||
542 | /* Set frame pointer to start of payload. */ | |
543 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; | |
544 | plen = desc->cffrm_len; | |
687b13e9 DM |
545 | |
546 | /* Skip already processed frames. */ | |
547 | while (nfrms < cfhsi->rx_state.nfrms) { | |
548 | pfrm += *plen; | |
549 | rx_sz += *plen; | |
550 | plen++; | |
551 | nfrms++; | |
552 | } | |
553 | ||
554 | /* Parse payload. */ | |
40d69043 DT |
555 | while (nfrms < CFHSI_MAX_PKTS && *plen) { |
556 | struct sk_buff *skb; | |
40d69043 | 557 | u8 *pcffrm = NULL; |
b42f7b5c | 558 | int len; |
40d69043 | 559 | |
40d69043 DT |
560 | /* CAIF frame starts after head padding. */ |
561 | pcffrm = pfrm + *pfrm + 1; | |
562 | ||
563 | /* Read length of CAIF frame (little endian). */ | |
564 | len = *pcffrm; | |
565 | len |= ((*(pcffrm + 1)) << 8) & 0xFF00; | |
566 | len += 2; /* Add FCS fields. */ | |
567 | ||
5bbed92d DM |
568 | /* Sanity check length of CAIF frames. */ |
569 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { | |
90de9bab | 570 | netdev_err(cfhsi->ndev, "%s: Invalid length.\n", |
5bbed92d DM |
571 | __func__); |
572 | return -EPROTO; | |
573 | } | |
574 | ||
40d69043 | 575 | /* Allocate SKB (OK even in IRQ context). */ |
687b13e9 DM |
576 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
577 | if (!skb) { | |
90de9bab | 578 | netdev_err(cfhsi->ndev, "%s: Out of memory !\n", |
687b13e9 DM |
579 | __func__); |
580 | cfhsi->rx_state.nfrms = nfrms; | |
581 | return -ENOMEM; | |
40d69043 DT |
582 | } |
583 | caif_assert(skb != NULL); | |
584 | ||
b952f4df | 585 | skb_put_data(skb, pcffrm, len); |
40d69043 DT |
586 | |
587 | skb->protocol = htons(ETH_P_CAIF); | |
588 | skb_reset_mac_header(skb); | |
589 | skb->dev = cfhsi->ndev; | |
590 | ||
591 | /* | |
1c385f1f | 592 | * We're called in callback from HSI |
40d69043 DT |
593 | * and don't know the context we're running in. |
594 | */ | |
595 | if (in_interrupt()) | |
596 | netif_rx(skb); | |
597 | else | |
598 | netif_rx_ni(skb); | |
599 | ||
600 | /* Update network statistics. */ | |
601 | cfhsi->ndev->stats.rx_packets++; | |
602 | cfhsi->ndev->stats.rx_bytes += len; | |
603 | ||
40d69043 DT |
604 | pfrm += *plen; |
605 | rx_sz += *plen; | |
606 | plen++; | |
607 | nfrms++; | |
608 | } | |
609 | ||
610 | return rx_sz; | |
611 | } | |
612 | ||
687b13e9 | 613 | static void cfhsi_rx_done(struct cfhsi *cfhsi) |
40d69043 DT |
614 | { |
615 | int res; | |
332ad43f | 616 | int desc_pld_len = 0, rx_len, rx_state; |
40d69043 | 617 | struct cfhsi_desc *desc = NULL; |
332ad43f | 618 | u8 *rx_ptr, *rx_buf; |
619 | struct cfhsi_desc *piggy_desc = NULL; | |
40d69043 | 620 | |
40d69043 DT |
621 | desc = (struct cfhsi_desc *)cfhsi->rx_buf; |
622 | ||
90de9bab | 623 | netdev_dbg(cfhsi->ndev, "%s\n", __func__); |
40d69043 DT |
624 | |
625 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
626 | return; | |
627 | ||
628 | /* Update inactivity timer if pending. */ | |
73033c98 | 629 | spin_lock_bh(&cfhsi->lock); |
ece367d5 | 630 | mod_timer_pending(&cfhsi->inactivity_timer, |
91fa0cbc | 631 | jiffies + cfhsi->cfg.inactivity_timeout); |
73033c98 | 632 | spin_unlock_bh(&cfhsi->lock); |
40d69043 | 633 | |
687b13e9 | 634 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
332ad43f | 635 | desc_pld_len = cfhsi_rx_desc_len(desc); |
636 | ||
637 | if (desc_pld_len < 0) | |
5bbed92d | 638 | goto out_of_sync; |
332ad43f | 639 | |
640 | rx_buf = cfhsi->rx_buf; | |
641 | rx_len = desc_pld_len; | |
642 | if (desc_pld_len > 0 && (desc->header & CFHSI_PIGGY_DESC)) | |
643 | rx_len += CFHSI_DESC_SZ; | |
644 | if (desc_pld_len == 0) | |
645 | rx_buf = cfhsi->rx_flip_buf; | |
40d69043 | 646 | } else { |
332ad43f | 647 | rx_buf = cfhsi->rx_flip_buf; |
40d69043 | 648 | |
332ad43f | 649 | rx_len = CFHSI_DESC_SZ; |
650 | if (cfhsi->rx_state.pld_len > 0 && | |
651 | (desc->header & CFHSI_PIGGY_DESC)) { | |
40d69043 | 652 | |
40d69043 DT |
653 | piggy_desc = (struct cfhsi_desc *) |
654 | (desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ + | |
332ad43f | 655 | cfhsi->rx_state.pld_len); |
656 | ||
687b13e9 | 657 | cfhsi->rx_state.piggy_desc = true; |
40d69043 | 658 | |
332ad43f | 659 | /* Extract payload len from piggy-backed descriptor. */ |
660 | desc_pld_len = cfhsi_rx_desc_len(piggy_desc); | |
661 | if (desc_pld_len < 0) | |
662 | goto out_of_sync; | |
663 | ||
4e7bb59d | 664 | if (desc_pld_len > 0) { |
332ad43f | 665 | rx_len = desc_pld_len; |
4e7bb59d KLX |
666 | if (piggy_desc->header & CFHSI_PIGGY_DESC) |
667 | rx_len += CFHSI_DESC_SZ; | |
668 | } | |
40d69043 DT |
669 | |
670 | /* | |
671 | * Copy needed information from the piggy-backed | |
672 | * descriptor to the descriptor in the start. | |
673 | */ | |
332ad43f | 674 | memcpy(rx_buf, (u8 *)piggy_desc, |
40d69043 | 675 | CFHSI_DESC_SHORT_SZ); |
5bbed92d | 676 | } |
687b13e9 DM |
677 | } |
678 | ||
40d69043 | 679 | if (desc_pld_len) { |
332ad43f | 680 | rx_state = CFHSI_RX_STATE_PAYLOAD; |
681 | rx_ptr = rx_buf + CFHSI_DESC_SZ; | |
40d69043 | 682 | } else { |
332ad43f | 683 | rx_state = CFHSI_RX_STATE_DESC; |
684 | rx_ptr = rx_buf; | |
685 | rx_len = CFHSI_DESC_SZ; | |
40d69043 | 686 | } |
40d69043 | 687 | |
332ad43f | 688 | /* Initiate next read */ |
40d69043 DT |
689 | if (test_bit(CFHSI_AWAKE, &cfhsi->bits)) { |
690 | /* Set up new transfer. */ | |
90de9bab | 691 | netdev_dbg(cfhsi->ndev, "%s: Start RX.\n", |
332ad43f | 692 | __func__); |
693 | ||
1c385f1f SB |
694 | res = cfhsi->ops->cfhsi_rx(rx_ptr, rx_len, |
695 | cfhsi->ops); | |
40d69043 | 696 | if (WARN_ON(res < 0)) { |
90de9bab | 697 | netdev_err(cfhsi->ndev, "%s: RX error %d.\n", |
40d69043 DT |
698 | __func__, res); |
699 | cfhsi->ndev->stats.rx_errors++; | |
700 | cfhsi->ndev->stats.rx_dropped++; | |
701 | } | |
702 | } | |
687b13e9 | 703 | |
332ad43f | 704 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
705 | /* Extract payload from descriptor */ | |
706 | if (cfhsi_rx_desc(desc, cfhsi) < 0) | |
707 | goto out_of_sync; | |
708 | } else { | |
709 | /* Extract payload */ | |
710 | if (cfhsi_rx_pld(desc, cfhsi) < 0) | |
711 | goto out_of_sync; | |
712 | if (piggy_desc) { | |
713 | /* Extract any payload in piggyback descriptor. */ | |
714 | if (cfhsi_rx_desc(piggy_desc, cfhsi) < 0) | |
715 | goto out_of_sync; | |
3935600a PE |
716 | /* Mark no embedded frame after extracting it */ |
717 | piggy_desc->offset = 0; | |
332ad43f | 718 | } |
687b13e9 | 719 | } |
332ad43f | 720 | |
721 | /* Update state info */ | |
722 | memset(&cfhsi->rx_state, 0, sizeof(cfhsi->rx_state)); | |
723 | cfhsi->rx_state.state = rx_state; | |
724 | cfhsi->rx_ptr = rx_ptr; | |
725 | cfhsi->rx_len = rx_len; | |
726 | cfhsi->rx_state.pld_len = desc_pld_len; | |
727 | cfhsi->rx_state.piggy_desc = desc->header & CFHSI_PIGGY_DESC; | |
728 | ||
729 | if (rx_buf != cfhsi->rx_buf) | |
730 | swap(cfhsi->rx_buf, cfhsi->rx_flip_buf); | |
5bbed92d DM |
731 | return; |
732 | ||
733 | out_of_sync: | |
90de9bab | 734 | netdev_err(cfhsi->ndev, "%s: Out of sync.\n", __func__); |
5bbed92d DM |
735 | print_hex_dump_bytes("--> ", DUMP_PREFIX_NONE, |
736 | cfhsi->rx_buf, CFHSI_DESC_SZ); | |
737 | schedule_work(&cfhsi->out_of_sync_work); | |
687b13e9 DM |
738 | } |
739 | ||
e99e88a9 | 740 | static void cfhsi_rx_slowpath(struct timer_list *t) |
687b13e9 | 741 | { |
e99e88a9 | 742 | struct cfhsi *cfhsi = from_timer(cfhsi, t, rx_slowpath_timer); |
687b13e9 | 743 | |
90de9bab | 744 | netdev_dbg(cfhsi->ndev, "%s.\n", |
687b13e9 DM |
745 | __func__); |
746 | ||
747 | cfhsi_rx_done(cfhsi); | |
40d69043 DT |
748 | } |
749 | ||
1c385f1f | 750 | static void cfhsi_rx_done_cb(struct cfhsi_cb_ops *cb_ops) |
40d69043 DT |
751 | { |
752 | struct cfhsi *cfhsi; | |
753 | ||
1c385f1f | 754 | cfhsi = container_of(cb_ops, struct cfhsi, cb_ops); |
90de9bab | 755 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
756 | __func__); |
757 | ||
758 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
759 | return; | |
760 | ||
40d69043 DT |
761 | if (test_and_clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits)) |
762 | wake_up_interruptible(&cfhsi->flush_fifo_wait); | |
763 | else | |
687b13e9 | 764 | cfhsi_rx_done(cfhsi); |
40d69043 DT |
765 | } |
766 | ||
767 | static void cfhsi_wake_up(struct work_struct *work) | |
768 | { | |
769 | struct cfhsi *cfhsi = NULL; | |
770 | int res; | |
771 | int len; | |
772 | long ret; | |
773 | ||
774 | cfhsi = container_of(work, struct cfhsi, wake_up_work); | |
775 | ||
776 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
777 | return; | |
778 | ||
779 | if (unlikely(test_bit(CFHSI_AWAKE, &cfhsi->bits))) { | |
780 | /* It happenes when wakeup is requested by | |
781 | * both ends at the same time. */ | |
782 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
5ea2ef5f | 783 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
40d69043 DT |
784 | return; |
785 | } | |
786 | ||
787 | /* Activate wake line. */ | |
1c385f1f | 788 | cfhsi->ops->cfhsi_wake_up(cfhsi->ops); |
40d69043 | 789 | |
90de9bab | 790 | netdev_dbg(cfhsi->ndev, "%s: Start waiting.\n", |
40d69043 DT |
791 | __func__); |
792 | ||
793 | /* Wait for acknowledge. */ | |
687b13e9 DM |
794 | ret = CFHSI_WAKE_TOUT; |
795 | ret = wait_event_interruptible_timeout(cfhsi->wake_up_wait, | |
796 | test_and_clear_bit(CFHSI_WAKE_UP_ACK, | |
40d69043 DT |
797 | &cfhsi->bits), ret); |
798 | if (unlikely(ret < 0)) { | |
799 | /* Interrupted by signal. */ | |
90de9bab | 800 | netdev_err(cfhsi->ndev, "%s: Signalled: %ld.\n", |
40d69043 | 801 | __func__, ret); |
5ea2ef5f | 802 | |
40d69043 | 803 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
1c385f1f | 804 | cfhsi->ops->cfhsi_wake_down(cfhsi->ops); |
40d69043 DT |
805 | return; |
806 | } else if (!ret) { | |
5ea2ef5f DM |
807 | bool ca_wake = false; |
808 | size_t fifo_occupancy = 0; | |
809 | ||
40d69043 | 810 | /* Wakeup timeout */ |
90de9bab | 811 | netdev_dbg(cfhsi->ndev, "%s: Timeout.\n", |
40d69043 | 812 | __func__); |
5ea2ef5f DM |
813 | |
814 | /* Check FIFO to check if modem has sent something. */ | |
1c385f1f | 815 | WARN_ON(cfhsi->ops->cfhsi_fifo_occupancy(cfhsi->ops, |
5ea2ef5f DM |
816 | &fifo_occupancy)); |
817 | ||
90de9bab | 818 | netdev_dbg(cfhsi->ndev, "%s: Bytes in FIFO: %u.\n", |
5ea2ef5f DM |
819 | __func__, (unsigned) fifo_occupancy); |
820 | ||
821 | /* Check if we misssed the interrupt. */ | |
1c385f1f | 822 | WARN_ON(cfhsi->ops->cfhsi_get_peer_wake(cfhsi->ops, |
5ea2ef5f DM |
823 | &ca_wake)); |
824 | ||
825 | if (ca_wake) { | |
90de9bab | 826 | netdev_err(cfhsi->ndev, "%s: CA Wake missed !.\n", |
5ea2ef5f DM |
827 | __func__); |
828 | ||
829 | /* Clear the CFHSI_WAKE_UP_ACK bit to prevent race. */ | |
830 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
831 | ||
832 | /* Continue execution. */ | |
833 | goto wake_ack; | |
834 | } | |
835 | ||
40d69043 | 836 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
1c385f1f | 837 | cfhsi->ops->cfhsi_wake_down(cfhsi->ops); |
40d69043 DT |
838 | return; |
839 | } | |
5ea2ef5f | 840 | wake_ack: |
90de9bab | 841 | netdev_dbg(cfhsi->ndev, "%s: Woken.\n", |
40d69043 DT |
842 | __func__); |
843 | ||
844 | /* Clear power up bit. */ | |
845 | set_bit(CFHSI_AWAKE, &cfhsi->bits); | |
846 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
847 | ||
848 | /* Resume read operation. */ | |
90de9bab | 849 | netdev_dbg(cfhsi->ndev, "%s: Start RX.\n", __func__); |
1c385f1f | 850 | res = cfhsi->ops->cfhsi_rx(cfhsi->rx_ptr, cfhsi->rx_len, cfhsi->ops); |
687b13e9 DM |
851 | |
852 | if (WARN_ON(res < 0)) | |
90de9bab | 853 | netdev_err(cfhsi->ndev, "%s: RX err %d.\n", __func__, res); |
40d69043 DT |
854 | |
855 | /* Clear power up acknowledment. */ | |
856 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
857 | ||
858 | spin_lock_bh(&cfhsi->lock); | |
859 | ||
ece367d5 DT |
860 | /* Resume transmit if queues are not empty. */ |
861 | if (!cfhsi_tx_queue_len(cfhsi)) { | |
90de9bab | 862 | netdev_dbg(cfhsi->ndev, "%s: Peer wake, start timer.\n", |
40d69043 DT |
863 | __func__); |
864 | /* Start inactivity timer. */ | |
ece367d5 | 865 | mod_timer(&cfhsi->inactivity_timer, |
91fa0cbc | 866 | jiffies + cfhsi->cfg.inactivity_timeout); |
40d69043 DT |
867 | spin_unlock_bh(&cfhsi->lock); |
868 | return; | |
869 | } | |
870 | ||
90de9bab | 871 | netdev_dbg(cfhsi->ndev, "%s: Host wake.\n", |
40d69043 DT |
872 | __func__); |
873 | ||
874 | spin_unlock_bh(&cfhsi->lock); | |
875 | ||
876 | /* Create HSI frame. */ | |
877 | len = cfhsi_tx_frm((struct cfhsi_desc *)cfhsi->tx_buf, cfhsi); | |
878 | ||
879 | if (likely(len > 0)) { | |
880 | /* Set up new transfer. */ | |
1c385f1f | 881 | res = cfhsi->ops->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->ops); |
40d69043 | 882 | if (WARN_ON(res < 0)) { |
90de9bab | 883 | netdev_err(cfhsi->ndev, "%s: TX error %d.\n", |
40d69043 DT |
884 | __func__, res); |
885 | cfhsi_abort_tx(cfhsi); | |
886 | } | |
887 | } else { | |
90de9bab | 888 | netdev_err(cfhsi->ndev, |
40d69043 DT |
889 | "%s: Failed to create HSI frame: %d.\n", |
890 | __func__, len); | |
891 | } | |
40d69043 DT |
892 | } |
893 | ||
894 | static void cfhsi_wake_down(struct work_struct *work) | |
895 | { | |
896 | long ret; | |
897 | struct cfhsi *cfhsi = NULL; | |
687b13e9 DM |
898 | size_t fifo_occupancy = 0; |
899 | int retry = CFHSI_WAKE_TOUT; | |
40d69043 DT |
900 | |
901 | cfhsi = container_of(work, struct cfhsi, wake_down_work); | |
90de9bab | 902 | netdev_dbg(cfhsi->ndev, "%s.\n", __func__); |
40d69043 DT |
903 | |
904 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
905 | return; | |
906 | ||
40d69043 | 907 | /* Deactivate wake line. */ |
1c385f1f | 908 | cfhsi->ops->cfhsi_wake_down(cfhsi->ops); |
40d69043 DT |
909 | |
910 | /* Wait for acknowledge. */ | |
687b13e9 | 911 | ret = CFHSI_WAKE_TOUT; |
40d69043 | 912 | ret = wait_event_interruptible_timeout(cfhsi->wake_down_wait, |
687b13e9 DM |
913 | test_and_clear_bit(CFHSI_WAKE_DOWN_ACK, |
914 | &cfhsi->bits), ret); | |
40d69043 DT |
915 | if (ret < 0) { |
916 | /* Interrupted by signal. */ | |
90de9bab | 917 | netdev_err(cfhsi->ndev, "%s: Signalled: %ld.\n", |
40d69043 DT |
918 | __func__, ret); |
919 | return; | |
920 | } else if (!ret) { | |
5ea2ef5f DM |
921 | bool ca_wake = true; |
922 | ||
40d69043 | 923 | /* Timeout */ |
90de9bab | 924 | netdev_err(cfhsi->ndev, "%s: Timeout.\n", __func__); |
5ea2ef5f DM |
925 | |
926 | /* Check if we misssed the interrupt. */ | |
1c385f1f | 927 | WARN_ON(cfhsi->ops->cfhsi_get_peer_wake(cfhsi->ops, |
5ea2ef5f DM |
928 | &ca_wake)); |
929 | if (!ca_wake) | |
90de9bab | 930 | netdev_err(cfhsi->ndev, "%s: CA Wake missed !.\n", |
5ea2ef5f | 931 | __func__); |
40d69043 DT |
932 | } |
933 | ||
687b13e9 DM |
934 | /* Check FIFO occupancy. */ |
935 | while (retry) { | |
1c385f1f | 936 | WARN_ON(cfhsi->ops->cfhsi_fifo_occupancy(cfhsi->ops, |
687b13e9 DM |
937 | &fifo_occupancy)); |
938 | ||
939 | if (!fifo_occupancy) | |
940 | break; | |
941 | ||
942 | set_current_state(TASK_INTERRUPTIBLE); | |
943 | schedule_timeout(1); | |
944 | retry--; | |
945 | } | |
946 | ||
947 | if (!retry) | |
90de9bab | 948 | netdev_err(cfhsi->ndev, "%s: FIFO Timeout.\n", __func__); |
687b13e9 DM |
949 | |
950 | /* Clear AWAKE condition. */ | |
40d69043 DT |
951 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); |
952 | ||
687b13e9 | 953 | /* Cancel pending RX requests. */ |
1c385f1f | 954 | cfhsi->ops->cfhsi_rx_cancel(cfhsi->ops); |
40d69043 DT |
955 | } |
956 | ||
5bbed92d DM |
957 | static void cfhsi_out_of_sync(struct work_struct *work) |
958 | { | |
959 | struct cfhsi *cfhsi = NULL; | |
960 | ||
961 | cfhsi = container_of(work, struct cfhsi, out_of_sync_work); | |
962 | ||
963 | rtnl_lock(); | |
964 | dev_close(cfhsi->ndev); | |
965 | rtnl_unlock(); | |
966 | } | |
967 | ||
1c385f1f | 968 | static void cfhsi_wake_up_cb(struct cfhsi_cb_ops *cb_ops) |
40d69043 DT |
969 | { |
970 | struct cfhsi *cfhsi = NULL; | |
971 | ||
1c385f1f | 972 | cfhsi = container_of(cb_ops, struct cfhsi, cb_ops); |
90de9bab | 973 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
974 | __func__); |
975 | ||
976 | set_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
977 | wake_up_interruptible(&cfhsi->wake_up_wait); | |
978 | ||
979 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) | |
980 | return; | |
981 | ||
982 | /* Schedule wake up work queue if the peer initiates. */ | |
983 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) | |
984 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); | |
985 | } | |
986 | ||
1c385f1f | 987 | static void cfhsi_wake_down_cb(struct cfhsi_cb_ops *cb_ops) |
40d69043 DT |
988 | { |
989 | struct cfhsi *cfhsi = NULL; | |
990 | ||
1c385f1f | 991 | cfhsi = container_of(cb_ops, struct cfhsi, cb_ops); |
90de9bab | 992 | netdev_dbg(cfhsi->ndev, "%s.\n", |
40d69043 DT |
993 | __func__); |
994 | ||
995 | /* Initiating low power is only permitted by the host (us). */ | |
996 | set_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); | |
997 | wake_up_interruptible(&cfhsi->wake_down_wait); | |
998 | } | |
999 | ||
e99e88a9 | 1000 | static void cfhsi_aggregation_tout(struct timer_list *t) |
ece367d5 | 1001 | { |
e99e88a9 | 1002 | struct cfhsi *cfhsi = from_timer(cfhsi, t, aggregation_timer); |
ece367d5 | 1003 | |
90de9bab | 1004 | netdev_dbg(cfhsi->ndev, "%s.\n", |
ece367d5 DT |
1005 | __func__); |
1006 | ||
1007 | cfhsi_start_tx(cfhsi); | |
1008 | } | |
1009 | ||
40d69043 DT |
1010 | static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev) |
1011 | { | |
1012 | struct cfhsi *cfhsi = NULL; | |
1013 | int start_xfer = 0; | |
1014 | int timer_active; | |
ece367d5 | 1015 | int prio; |
40d69043 DT |
1016 | |
1017 | if (!dev) | |
1018 | return -EINVAL; | |
1019 | ||
1020 | cfhsi = netdev_priv(dev); | |
1021 | ||
ece367d5 DT |
1022 | switch (skb->priority) { |
1023 | case TC_PRIO_BESTEFFORT: | |
1024 | case TC_PRIO_FILLER: | |
1025 | case TC_PRIO_BULK: | |
1026 | prio = CFHSI_PRIO_BEBK; | |
1027 | break; | |
1028 | case TC_PRIO_INTERACTIVE_BULK: | |
1029 | prio = CFHSI_PRIO_VI; | |
1030 | break; | |
1031 | case TC_PRIO_INTERACTIVE: | |
1032 | prio = CFHSI_PRIO_VO; | |
1033 | break; | |
1034 | case TC_PRIO_CONTROL: | |
1035 | default: | |
1036 | prio = CFHSI_PRIO_CTL; | |
1037 | break; | |
1038 | } | |
1039 | ||
40d69043 DT |
1040 | spin_lock_bh(&cfhsi->lock); |
1041 | ||
ece367d5 DT |
1042 | /* Update aggregation statistics */ |
1043 | cfhsi_update_aggregation_stats(cfhsi, skb, 1); | |
1044 | ||
1045 | /* Queue the SKB */ | |
1046 | skb_queue_tail(&cfhsi->qhead[prio], skb); | |
40d69043 DT |
1047 | |
1048 | /* Sanity check; xmit should not be called after unregister_netdev */ | |
1049 | if (WARN_ON(test_bit(CFHSI_SHUTDOWN, &cfhsi->bits))) { | |
1050 | spin_unlock_bh(&cfhsi->lock); | |
1051 | cfhsi_abort_tx(cfhsi); | |
1052 | return -EINVAL; | |
1053 | } | |
1054 | ||
1055 | /* Send flow off if number of packets is above high water mark. */ | |
1056 | if (!cfhsi->flow_off_sent && | |
91fa0cbc | 1057 | cfhsi_tx_queue_len(cfhsi) > cfhsi->cfg.q_high_mark && |
40d69043 DT |
1058 | cfhsi->cfdev.flowctrl) { |
1059 | cfhsi->flow_off_sent = 1; | |
1060 | cfhsi->cfdev.flowctrl(cfhsi->ndev, OFF); | |
1061 | } | |
1062 | ||
1063 | if (cfhsi->tx_state == CFHSI_TX_STATE_IDLE) { | |
1064 | cfhsi->tx_state = CFHSI_TX_STATE_XFER; | |
1065 | start_xfer = 1; | |
1066 | } | |
1067 | ||
73033c98 | 1068 | if (!start_xfer) { |
ece367d5 DT |
1069 | /* Send aggregate if it is possible */ |
1070 | bool aggregate_ready = | |
1071 | cfhsi_can_send_aggregate(cfhsi) && | |
1072 | del_timer(&cfhsi->aggregation_timer) > 0; | |
73033c98 | 1073 | spin_unlock_bh(&cfhsi->lock); |
ece367d5 DT |
1074 | if (aggregate_ready) |
1075 | cfhsi_start_tx(cfhsi); | |
40d69043 | 1076 | return 0; |
73033c98 | 1077 | } |
40d69043 DT |
1078 | |
1079 | /* Delete inactivity timer if started. */ | |
ece367d5 | 1080 | timer_active = del_timer_sync(&cfhsi->inactivity_timer); |
40d69043 | 1081 | |
73033c98 DT |
1082 | spin_unlock_bh(&cfhsi->lock); |
1083 | ||
40d69043 DT |
1084 | if (timer_active) { |
1085 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; | |
1086 | int len; | |
1087 | int res; | |
1088 | ||
1089 | /* Create HSI frame. */ | |
1090 | len = cfhsi_tx_frm(desc, cfhsi); | |
f84ea779 | 1091 | WARN_ON(!len); |
40d69043 DT |
1092 | |
1093 | /* Set up new transfer. */ | |
1c385f1f | 1094 | res = cfhsi->ops->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->ops); |
40d69043 | 1095 | if (WARN_ON(res < 0)) { |
90de9bab | 1096 | netdev_err(cfhsi->ndev, "%s: TX error %d.\n", |
40d69043 DT |
1097 | __func__, res); |
1098 | cfhsi_abort_tx(cfhsi); | |
1099 | } | |
1100 | } else { | |
1101 | /* Schedule wake up work queue if the we initiate. */ | |
1102 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) | |
1103 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); | |
1104 | } | |
1105 | ||
1106 | return 0; | |
1107 | } | |
1108 | ||
1c385f1f | 1109 | static const struct net_device_ops cfhsi_netdevops; |
40d69043 DT |
1110 | |
1111 | static void cfhsi_setup(struct net_device *dev) | |
1112 | { | |
ece367d5 | 1113 | int i; |
40d69043 DT |
1114 | struct cfhsi *cfhsi = netdev_priv(dev); |
1115 | dev->features = 0; | |
40d69043 DT |
1116 | dev->type = ARPHRD_CAIF; |
1117 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; | |
34efc283 | 1118 | dev->mtu = CFHSI_MAX_CAIF_FRAME_SZ; |
4676a152 | 1119 | dev->priv_flags |= IFF_NO_QUEUE; |
cf124db5 | 1120 | dev->needs_free_netdev = true; |
1c385f1f | 1121 | dev->netdev_ops = &cfhsi_netdevops; |
ece367d5 DT |
1122 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) |
1123 | skb_queue_head_init(&cfhsi->qhead[i]); | |
40d69043 DT |
1124 | cfhsi->cfdev.link_select = CAIF_LINK_HIGH_BANDW; |
1125 | cfhsi->cfdev.use_frag = false; | |
1126 | cfhsi->cfdev.use_stx = false; | |
1127 | cfhsi->cfdev.use_fcs = false; | |
1128 | cfhsi->ndev = dev; | |
7fa8ad6d | 1129 | cfhsi->cfg = hsi_default_config; |
40d69043 DT |
1130 | } |
1131 | ||
39abbaef | 1132 | static int cfhsi_open(struct net_device *ndev) |
1133 | { | |
1134 | struct cfhsi *cfhsi = netdev_priv(ndev); | |
1135 | int res; | |
1136 | ||
1137 | clear_bit(CFHSI_SHUTDOWN, &cfhsi->bits); | |
1138 | ||
40d69043 DT |
1139 | /* Initialize state vaiables. */ |
1140 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; | |
687b13e9 | 1141 | cfhsi->rx_state.state = CFHSI_RX_STATE_DESC; |
40d69043 DT |
1142 | |
1143 | /* Set flow info */ | |
1144 | cfhsi->flow_off_sent = 0; | |
40d69043 DT |
1145 | |
1146 | /* | |
1147 | * Allocate a TX buffer with the size of a HSI packet descriptors | |
1148 | * and the necessary room for CAIF payload frames. | |
1149 | */ | |
1150 | cfhsi->tx_buf = kzalloc(CFHSI_BUF_SZ_TX, GFP_KERNEL); | |
1151 | if (!cfhsi->tx_buf) { | |
40d69043 DT |
1152 | res = -ENODEV; |
1153 | goto err_alloc_tx; | |
1154 | } | |
1155 | ||
1156 | /* | |
1157 | * Allocate a RX buffer with the size of two HSI packet descriptors and | |
1158 | * the necessary room for CAIF payload frames. | |
1159 | */ | |
1160 | cfhsi->rx_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); | |
1161 | if (!cfhsi->rx_buf) { | |
40d69043 DT |
1162 | res = -ENODEV; |
1163 | goto err_alloc_rx; | |
1164 | } | |
1165 | ||
332ad43f | 1166 | cfhsi->rx_flip_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); |
1167 | if (!cfhsi->rx_flip_buf) { | |
1168 | res = -ENODEV; | |
1169 | goto err_alloc_rx_flip; | |
1170 | } | |
1171 | ||
ece367d5 | 1172 | /* Initialize aggregation timeout */ |
91fa0cbc | 1173 | cfhsi->cfg.aggregation_timeout = hsi_default_config.aggregation_timeout; |
ece367d5 | 1174 | |
28bd2049 | 1175 | /* Initialize recieve vaiables. */ |
40d69043 DT |
1176 | cfhsi->rx_ptr = cfhsi->rx_buf; |
1177 | cfhsi->rx_len = CFHSI_DESC_SZ; | |
1178 | ||
1179 | /* Initialize spin locks. */ | |
1180 | spin_lock_init(&cfhsi->lock); | |
1181 | ||
1182 | /* Set up the driver. */ | |
1c385f1f SB |
1183 | cfhsi->cb_ops.tx_done_cb = cfhsi_tx_done_cb; |
1184 | cfhsi->cb_ops.rx_done_cb = cfhsi_rx_done_cb; | |
1185 | cfhsi->cb_ops.wake_up_cb = cfhsi_wake_up_cb; | |
1186 | cfhsi->cb_ops.wake_down_cb = cfhsi_wake_down_cb; | |
40d69043 DT |
1187 | |
1188 | /* Initialize the work queues. */ | |
1189 | INIT_WORK(&cfhsi->wake_up_work, cfhsi_wake_up); | |
1190 | INIT_WORK(&cfhsi->wake_down_work, cfhsi_wake_down); | |
5bbed92d | 1191 | INIT_WORK(&cfhsi->out_of_sync_work, cfhsi_out_of_sync); |
40d69043 DT |
1192 | |
1193 | /* Clear all bit fields. */ | |
1194 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); | |
1195 | clear_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); | |
1196 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); | |
1197 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); | |
40d69043 DT |
1198 | |
1199 | /* Create work thread. */ | |
deb1f45a | 1200 | cfhsi->wq = alloc_ordered_workqueue(cfhsi->ndev->name, WQ_MEM_RECLAIM); |
40d69043 | 1201 | if (!cfhsi->wq) { |
90de9bab | 1202 | netdev_err(cfhsi->ndev, "%s: Failed to create work queue.\n", |
40d69043 DT |
1203 | __func__); |
1204 | res = -ENODEV; | |
1205 | goto err_create_wq; | |
1206 | } | |
1207 | ||
1208 | /* Initialize wait queues. */ | |
1209 | init_waitqueue_head(&cfhsi->wake_up_wait); | |
1210 | init_waitqueue_head(&cfhsi->wake_down_wait); | |
1211 | init_waitqueue_head(&cfhsi->flush_fifo_wait); | |
1212 | ||
1213 | /* Setup the inactivity timer. */ | |
e99e88a9 | 1214 | timer_setup(&cfhsi->inactivity_timer, cfhsi_inactivity_tout, 0); |
687b13e9 | 1215 | /* Setup the slowpath RX timer. */ |
e99e88a9 | 1216 | timer_setup(&cfhsi->rx_slowpath_timer, cfhsi_rx_slowpath, 0); |
ece367d5 | 1217 | /* Setup the aggregation timer. */ |
e99e88a9 | 1218 | timer_setup(&cfhsi->aggregation_timer, cfhsi_aggregation_tout, 0); |
40d69043 | 1219 | |
40d69043 | 1220 | /* Activate HSI interface. */ |
1c385f1f | 1221 | res = cfhsi->ops->cfhsi_up(cfhsi->ops); |
40d69043 | 1222 | if (res) { |
90de9bab | 1223 | netdev_err(cfhsi->ndev, |
40d69043 DT |
1224 | "%s: can't activate HSI interface: %d.\n", |
1225 | __func__, res); | |
1226 | goto err_activate; | |
1227 | } | |
1228 | ||
1229 | /* Flush FIFO */ | |
1230 | res = cfhsi_flush_fifo(cfhsi); | |
1231 | if (res) { | |
90de9bab | 1232 | netdev_err(cfhsi->ndev, "%s: Can't flush FIFO: %d.\n", |
40d69043 DT |
1233 | __func__, res); |
1234 | goto err_net_reg; | |
1235 | } | |
40d69043 DT |
1236 | return res; |
1237 | ||
1238 | err_net_reg: | |
1c385f1f | 1239 | cfhsi->ops->cfhsi_down(cfhsi->ops); |
40d69043 DT |
1240 | err_activate: |
1241 | destroy_workqueue(cfhsi->wq); | |
1242 | err_create_wq: | |
332ad43f | 1243 | kfree(cfhsi->rx_flip_buf); |
1244 | err_alloc_rx_flip: | |
40d69043 DT |
1245 | kfree(cfhsi->rx_buf); |
1246 | err_alloc_rx: | |
1247 | kfree(cfhsi->tx_buf); | |
1248 | err_alloc_tx: | |
40d69043 DT |
1249 | return res; |
1250 | } | |
1251 | ||
39abbaef | 1252 | static int cfhsi_close(struct net_device *ndev) |
40d69043 | 1253 | { |
39abbaef | 1254 | struct cfhsi *cfhsi = netdev_priv(ndev); |
5f614e6b | 1255 | u8 *tx_buf, *rx_buf, *flip_buf; |
40d69043 | 1256 | |
40d69043 DT |
1257 | /* going to shutdown driver */ |
1258 | set_bit(CFHSI_SHUTDOWN, &cfhsi->bits); | |
1259 | ||
687b13e9 | 1260 | /* Delete timers if pending */ |
ece367d5 | 1261 | del_timer_sync(&cfhsi->inactivity_timer); |
687b13e9 | 1262 | del_timer_sync(&cfhsi->rx_slowpath_timer); |
ece367d5 | 1263 | del_timer_sync(&cfhsi->aggregation_timer); |
40d69043 DT |
1264 | |
1265 | /* Cancel pending RX request (if any) */ | |
1c385f1f | 1266 | cfhsi->ops->cfhsi_rx_cancel(cfhsi->ops); |
40d69043 | 1267 | |
ca63f8c7 | 1268 | /* Destroy workqueue */ |
40d69043 DT |
1269 | destroy_workqueue(cfhsi->wq); |
1270 | ||
1271 | /* Store bufferes: will be freed later. */ | |
1272 | tx_buf = cfhsi->tx_buf; | |
1273 | rx_buf = cfhsi->rx_buf; | |
5f614e6b | 1274 | flip_buf = cfhsi->rx_flip_buf; |
40d69043 DT |
1275 | /* Flush transmit queues. */ |
1276 | cfhsi_abort_tx(cfhsi); | |
1277 | ||
1278 | /* Deactivate interface */ | |
1c385f1f | 1279 | cfhsi->ops->cfhsi_down(cfhsi->ops); |
40d69043 | 1280 | |
40d69043 DT |
1281 | /* Free buffers. */ |
1282 | kfree(tx_buf); | |
1283 | kfree(rx_buf); | |
5f614e6b | 1284 | kfree(flip_buf); |
39abbaef | 1285 | return 0; |
40d69043 DT |
1286 | } |
1287 | ||
c4125400 SB |
1288 | static void cfhsi_uninit(struct net_device *dev) |
1289 | { | |
1290 | struct cfhsi *cfhsi = netdev_priv(dev); | |
1291 | ASSERT_RTNL(); | |
1292 | symbol_put(cfhsi_get_device); | |
1293 | list_del(&cfhsi->list); | |
1294 | } | |
1295 | ||
1c385f1f | 1296 | static const struct net_device_ops cfhsi_netdevops = { |
c4125400 | 1297 | .ndo_uninit = cfhsi_uninit, |
39abbaef | 1298 | .ndo_open = cfhsi_open, |
1299 | .ndo_stop = cfhsi_close, | |
1300 | .ndo_start_xmit = cfhsi_xmit | |
1301 | }; | |
1302 | ||
c4125400 | 1303 | static void cfhsi_netlink_parms(struct nlattr *data[], struct cfhsi *cfhsi) |
40d69043 | 1304 | { |
c4125400 | 1305 | int i; |
40d69043 | 1306 | |
c4125400 SB |
1307 | if (!data) { |
1308 | pr_debug("no params data found\n"); | |
1309 | return; | |
40d69043 | 1310 | } |
c4125400 SB |
1311 | |
1312 | i = __IFLA_CAIF_HSI_INACTIVITY_TOUT; | |
91fa0cbc SB |
1313 | /* |
1314 | * Inactivity timeout in millisecs. Lowest possible value is 1, | |
1315 | * and highest possible is NEXT_TIMER_MAX_DELTA. | |
1316 | */ | |
1317 | if (data[i]) { | |
1318 | u32 inactivity_timeout = nla_get_u32(data[i]); | |
1319 | /* Pre-calculate inactivity timeout. */ | |
1320 | cfhsi->cfg.inactivity_timeout = inactivity_timeout * HZ / 1000; | |
1321 | if (cfhsi->cfg.inactivity_timeout == 0) | |
1322 | cfhsi->cfg.inactivity_timeout = 1; | |
1323 | else if (cfhsi->cfg.inactivity_timeout > NEXT_TIMER_MAX_DELTA) | |
1324 | cfhsi->cfg.inactivity_timeout = NEXT_TIMER_MAX_DELTA; | |
1325 | } | |
c4125400 SB |
1326 | |
1327 | i = __IFLA_CAIF_HSI_AGGREGATION_TOUT; | |
1328 | if (data[i]) | |
91fa0cbc | 1329 | cfhsi->cfg.aggregation_timeout = nla_get_u32(data[i]); |
c4125400 SB |
1330 | |
1331 | i = __IFLA_CAIF_HSI_HEAD_ALIGN; | |
1332 | if (data[i]) | |
91fa0cbc | 1333 | cfhsi->cfg.head_align = nla_get_u32(data[i]); |
c4125400 SB |
1334 | |
1335 | i = __IFLA_CAIF_HSI_TAIL_ALIGN; | |
1336 | if (data[i]) | |
91fa0cbc | 1337 | cfhsi->cfg.tail_align = nla_get_u32(data[i]); |
c4125400 SB |
1338 | |
1339 | i = __IFLA_CAIF_HSI_QHIGH_WATERMARK; | |
1340 | if (data[i]) | |
91fa0cbc SB |
1341 | cfhsi->cfg.q_high_mark = nla_get_u32(data[i]); |
1342 | ||
1343 | i = __IFLA_CAIF_HSI_QLOW_WATERMARK; | |
1344 | if (data[i]) | |
1345 | cfhsi->cfg.q_low_mark = nla_get_u32(data[i]); | |
c4125400 SB |
1346 | } |
1347 | ||
1348 | static int caif_hsi_changelink(struct net_device *dev, struct nlattr *tb[], | |
ad744b22 MS |
1349 | struct nlattr *data[], |
1350 | struct netlink_ext_ack *extack) | |
c4125400 SB |
1351 | { |
1352 | cfhsi_netlink_parms(data, netdev_priv(dev)); | |
1353 | netdev_state_change(dev); | |
1354 | return 0; | |
40d69043 DT |
1355 | } |
1356 | ||
c4125400 SB |
1357 | static const struct nla_policy caif_hsi_policy[__IFLA_CAIF_HSI_MAX + 1] = { |
1358 | [__IFLA_CAIF_HSI_INACTIVITY_TOUT] = { .type = NLA_U32, .len = 4 }, | |
1359 | [__IFLA_CAIF_HSI_AGGREGATION_TOUT] = { .type = NLA_U32, .len = 4 }, | |
1360 | [__IFLA_CAIF_HSI_HEAD_ALIGN] = { .type = NLA_U32, .len = 4 }, | |
1361 | [__IFLA_CAIF_HSI_TAIL_ALIGN] = { .type = NLA_U32, .len = 4 }, | |
1362 | [__IFLA_CAIF_HSI_QHIGH_WATERMARK] = { .type = NLA_U32, .len = 4 }, | |
1363 | [__IFLA_CAIF_HSI_QLOW_WATERMARK] = { .type = NLA_U32, .len = 4 }, | |
40d69043 DT |
1364 | }; |
1365 | ||
c4125400 SB |
1366 | static size_t caif_hsi_get_size(const struct net_device *dev) |
1367 | { | |
1368 | int i; | |
1369 | size_t s = 0; | |
1370 | for (i = __IFLA_CAIF_HSI_UNSPEC + 1; i < __IFLA_CAIF_HSI_MAX; i++) | |
1371 | s += nla_total_size(caif_hsi_policy[i].len); | |
1372 | return s; | |
1373 | } | |
1374 | ||
1375 | static int caif_hsi_fill_info(struct sk_buff *skb, const struct net_device *dev) | |
1376 | { | |
91fa0cbc SB |
1377 | struct cfhsi *cfhsi = netdev_priv(dev); |
1378 | ||
c4125400 | 1379 | if (nla_put_u32(skb, __IFLA_CAIF_HSI_INACTIVITY_TOUT, |
91fa0cbc | 1380 | cfhsi->cfg.inactivity_timeout) || |
c4125400 | 1381 | nla_put_u32(skb, __IFLA_CAIF_HSI_AGGREGATION_TOUT, |
91fa0cbc SB |
1382 | cfhsi->cfg.aggregation_timeout) || |
1383 | nla_put_u32(skb, __IFLA_CAIF_HSI_HEAD_ALIGN, | |
1384 | cfhsi->cfg.head_align) || | |
1385 | nla_put_u32(skb, __IFLA_CAIF_HSI_TAIL_ALIGN, | |
1386 | cfhsi->cfg.tail_align) || | |
c4125400 | 1387 | nla_put_u32(skb, __IFLA_CAIF_HSI_QHIGH_WATERMARK, |
91fa0cbc | 1388 | cfhsi->cfg.q_high_mark) || |
c4125400 | 1389 | nla_put_u32(skb, __IFLA_CAIF_HSI_QLOW_WATERMARK, |
91fa0cbc | 1390 | cfhsi->cfg.q_low_mark)) |
c4125400 SB |
1391 | return -EMSGSIZE; |
1392 | ||
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | static int caif_hsi_newlink(struct net *src_net, struct net_device *dev, | |
7a3f4a18 MS |
1397 | struct nlattr *tb[], struct nlattr *data[], |
1398 | struct netlink_ext_ack *extack) | |
40d69043 | 1399 | { |
40d69043 | 1400 | struct cfhsi *cfhsi = NULL; |
7fa8ad6d | 1401 | struct cfhsi_ops *(*get_ops)(void); |
40d69043 | 1402 | |
c4125400 SB |
1403 | ASSERT_RTNL(); |
1404 | ||
1405 | cfhsi = netdev_priv(dev); | |
1406 | cfhsi_netlink_parms(data, cfhsi); | |
c4125400 | 1407 | |
7fa8ad6d SB |
1408 | get_ops = symbol_get(cfhsi_get_ops); |
1409 | if (!get_ops) { | |
1410 | pr_err("%s: failed to get the cfhsi_ops\n", __func__); | |
1411 | return -ENODEV; | |
1412 | } | |
1413 | ||
1414 | /* Assign the HSI device. */ | |
1415 | cfhsi->ops = (*get_ops)(); | |
1416 | if (!cfhsi->ops) { | |
1417 | pr_err("%s: failed to get the cfhsi_ops\n", __func__); | |
1418 | goto err; | |
1419 | } | |
1420 | ||
1421 | /* Assign the driver to this HSI device. */ | |
1422 | cfhsi->ops->cb_ops = &cfhsi->cb_ops; | |
1423 | if (register_netdevice(dev)) { | |
1424 | pr_warn("%s: caif_hsi device registration failed\n", __func__); | |
1425 | goto err; | |
1426 | } | |
1427 | /* Add CAIF HSI device to list. */ | |
1428 | list_add_tail(&cfhsi->list, &cfhsi_list); | |
1429 | ||
c4125400 | 1430 | return 0; |
7fa8ad6d SB |
1431 | err: |
1432 | symbol_put(cfhsi_get_ops); | |
1433 | return -ENODEV; | |
40d69043 DT |
1434 | } |
1435 | ||
c4125400 SB |
1436 | static struct rtnl_link_ops caif_hsi_link_ops __read_mostly = { |
1437 | .kind = "cfhsi", | |
1438 | .priv_size = sizeof(struct cfhsi), | |
1439 | .setup = cfhsi_setup, | |
1440 | .maxtype = __IFLA_CAIF_HSI_MAX, | |
1441 | .policy = caif_hsi_policy, | |
1442 | .newlink = caif_hsi_newlink, | |
1443 | .changelink = caif_hsi_changelink, | |
1444 | .get_size = caif_hsi_get_size, | |
1445 | .fill_info = caif_hsi_fill_info, | |
1446 | }; | |
1447 | ||
1448 | static void __exit cfhsi_exit_module(void) | |
40d69043 | 1449 | { |
c4125400 SB |
1450 | struct list_head *list_node; |
1451 | struct list_head *n; | |
1452 | struct cfhsi *cfhsi; | |
40d69043 | 1453 | |
c4125400 | 1454 | rtnl_link_unregister(&caif_hsi_link_ops); |
40d69043 | 1455 | |
c4125400 SB |
1456 | rtnl_lock(); |
1457 | list_for_each_safe(list_node, n, &cfhsi_list) { | |
1458 | cfhsi = list_entry(list_node, struct cfhsi, list); | |
1459 | unregister_netdev(cfhsi->ndev); | |
40d69043 | 1460 | } |
c4125400 SB |
1461 | rtnl_unlock(); |
1462 | } | |
40d69043 | 1463 | |
c4125400 SB |
1464 | static int __init cfhsi_init_module(void) |
1465 | { | |
1466 | return rtnl_link_register(&caif_hsi_link_ops); | |
40d69043 DT |
1467 | } |
1468 | ||
1469 | module_init(cfhsi_init_module); | |
1470 | module_exit(cfhsi_exit_module); |