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amd-xgbe: Call netif_napi_del on ndo_stop operation
[thirdparty/kernel/stable.git] / drivers / net / ethernet / amd / xgbe / xgbe.h
CommitLineData
c5aa9e3b
LT		 1/*
2 * AMD 10Gb Ethernet driver
3 *
4 * This file is available to you under your choice of the following two
5 * licenses:
6 *
7 * License 1: GPLv2
8 *
9 * Copyright (c) 2014 Advanced Micro Devices, Inc.
10 *
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 *
24 * This file incorporates work covered by the following copyright and
25 * permission notice:
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
29 * and you.
30 *
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
43 *
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
55 *
56 *
57 * License 2: Modified BSD
58 *
59 * Copyright (c) 2014 Advanced Micro Devices, Inc.
60 * All rights reserved.
61 *
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83 *
84 * This file incorporates work covered by the following copyright and
85 * permission notice:
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
89 * and you.
90 *
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
100 *
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
103 *
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
115 */
116
117#ifndef __XGBE_H__
118#define __XGBE_H__
119
120#include <linux/dma-mapping.h>
121#include <linux/netdevice.h>
122#include <linux/workqueue.h>
123#include <linux/phy.h>
801c62d9
LT		 124#include <linux/if_vlan.h>
125#include <linux/bitops.h>
c5aa9e3b
LT		 126
127
128#define XGBE_DRV_NAME "amd-xgbe"
129#define XGBE_DRV_VERSION "1.0.0-a"
130#define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver"
131
132/* Descriptor related defines */
d0a8ba6c
LT		 133#define XGBE_TX_DESC_CNT 512
134#define XGBE_TX_DESC_MIN_FREE (XGBE_TX_DESC_CNT >> 3)
135#define XGBE_TX_DESC_MAX_PROC (XGBE_TX_DESC_CNT >> 1)
136#define XGBE_RX_DESC_CNT 512
c5aa9e3b 137
d0a8ba6c 138#define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
c5aa9e3b 139
d0a8ba6c
LT		 140#define XGBE_RX_MIN_BUF_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
141#define XGBE_RX_BUF_ALIGN 64
c5aa9e3b 142
d5c48582 143#define XGBE_MAX_DMA_CHANNELS 16
d0a8ba6c
LT		 144
145/* DMA cache settings - Outer sharable, write-back, write-allocate */
146#define XGBE_DMA_ARDOMAIN 0x2
147#define XGBE_DMA_ARCACHE 0xb
148#define XGBE_DMA_AWDOMAIN 0x2
149#define XGBE_DMA_AWCACHE 0x7
150
151#define XGBE_DMA_INTERRUPT_MASK 0x31c7
c5aa9e3b
LT		 152
153#define XGMAC_MIN_PACKET 60
154#define XGMAC_STD_PACKET_MTU 1500
155#define XGMAC_MAX_STD_PACKET 1518
156#define XGMAC_JUMBO_PACKET_MTU 9000
157#define XGMAC_MAX_JUMBO_PACKET 9018
158
c5aa9e3b
LT		 159/* MDIO bus phy name */
160#define XGBE_PHY_NAME "amd_xgbe_phy"
161#define XGBE_PRTAD 0
162
163/* Driver PMT macros */
164#define XGMAC_DRIVER_CONTEXT 1
165#define XGMAC_IOCTL_CONTEXT 2
166
d0a8ba6c
LT		 167#define XGBE_FIFO_SIZE_B(x) (x)
168#define XGBE_FIFO_SIZE_KB(x) (x * 1024)
c5aa9e3b
LT		 169
170#define XGBE_TC_CNT 2
171
172/* Helper macro for descriptor handling
d0a8ba6c 173 * Always use XGBE_GET_DESC_DATA to access the descriptor data
c5aa9e3b
LT		 174 * since the index is free-running and needs to be and-ed
175 * with the descriptor count value of the ring to index to
176 * the proper descriptor data.
177 */
d0a8ba6c 178#define XGBE_GET_DESC_DATA(_ring, _idx) \
c5aa9e3b
LT		 179 ((_ring)->rdata + \
180 ((_idx) & ((_ring)->rdesc_count - 1)))
181
182
183/* Default coalescing parameters */
184#define XGMAC_INIT_DMA_TX_USECS 100
185#define XGMAC_INIT_DMA_TX_FRAMES 16
186
187#define XGMAC_MAX_DMA_RIWT 0xff
188#define XGMAC_INIT_DMA_RX_USECS 100
189#define XGMAC_INIT_DMA_RX_FRAMES 16
190
191/* Flow control queue count */
192#define XGMAC_MAX_FLOW_CONTROL_QUEUES 8
193
b85e4d89
LT		 194/* Maximum MAC address hash table size (256 bits = 8 bytes) */
195#define XGBE_MAC_HASH_TABLE_SIZE 8
c5aa9e3b
LT		 196
197struct xgbe_prv_data;
198
199struct xgbe_packet_data {
200 unsigned int attributes;
201
202 unsigned int errors;
203
204 unsigned int rdesc_count;
205 unsigned int length;
206
207 unsigned int header_len;
208 unsigned int tcp_header_len;
209 unsigned int tcp_payload_len;
210 unsigned short mss;
211
212 unsigned short vlan_ctag;
213};
214
215/* Common Rx and Tx descriptor mapping */
216struct xgbe_ring_desc {
217 unsigned int desc0;
218 unsigned int desc1;
219 unsigned int desc2;
220 unsigned int desc3;
221};
222
223/* Structure used to hold information related to the descriptor
224 * and the packet associated with the descriptor (always use
d0a8ba6c 225 * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
c5aa9e3b
LT		 226 */
227struct xgbe_ring_data {
228 struct xgbe_ring_desc *rdesc; /* Virtual address of descriptor */
229 dma_addr_t rdesc_dma; /* DMA address of descriptor */
230
231 struct sk_buff *skb; /* Virtual address of SKB */
232 dma_addr_t skb_dma; /* DMA address of SKB data */
233 unsigned int skb_dma_len; /* Length of SKB DMA area */
234 unsigned int tso_header; /* TSO header indicator */
235
236 unsigned short len; /* Length of received Rx packet */
237
238 unsigned int interrupt; /* Interrupt indicator */
239
240 unsigned int mapped_as_page;
241};
242
243struct xgbe_ring {
244 /* Ring lock - used just for TX rings at the moment */
245 spinlock_t lock;
246
247 /* Per packet related information */
248 struct xgbe_packet_data packet_data;
249
250 /* Virtual/DMA addresses and count of allocated descriptor memory */
251 struct xgbe_ring_desc *rdesc;
252 dma_addr_t rdesc_dma;
253 unsigned int rdesc_count;
254
255 /* Array of descriptor data corresponding the descriptor memory
d0a8ba6c 256 * (always use the XGBE_GET_DESC_DATA macro to access this data)
c5aa9e3b
LT		 257 */
258 struct xgbe_ring_data *rdata;
259
260 /* Ring index values
261 * cur - Tx: index of descriptor to be used for current transfer
262 * Rx: index of descriptor to check for packet availability
263 * dirty - Tx: index of descriptor to check for transfer complete
264 * Rx: count of descriptors in which a packet has been received
265 * (used with skb_realloc_index to refresh the ring)
266 */
267 unsigned int cur;
268 unsigned int dirty;
269
270 /* Coalesce frame count used for interrupt bit setting */
271 unsigned int coalesce_count;
272
273 union {
274 struct {
275 unsigned int queue_stopped;
276 unsigned short cur_mss;
277 unsigned short cur_vlan_ctag;
278 } tx;
279
280 struct {
281 unsigned int realloc_index;
282 unsigned int realloc_threshold;
283 } rx;
284 };
285} ____cacheline_aligned;
286
287/* Structure used to describe the descriptor rings associated with
288 * a DMA channel.
289 */
290struct xgbe_channel {
291 char name[16];
292
293 /* Address of private data area for device */
294 struct xgbe_prv_data *pdata;
295
296 /* Queue index and base address of queue's DMA registers */
297 unsigned int queue_index;
298 void __iomem *dma_regs;
299
300 unsigned int saved_ier;
301
302 unsigned int tx_timer_active;
303 struct hrtimer tx_timer;
304
305 struct xgbe_ring *tx_ring;
306 struct xgbe_ring *rx_ring;
307} ____cacheline_aligned;
308
309enum xgbe_int {
310 XGMAC_INT_DMA_ISR_DC0IS,
311 XGMAC_INT_DMA_CH_SR_TI,
312 XGMAC_INT_DMA_CH_SR_TPS,
313 XGMAC_INT_DMA_CH_SR_TBU,
314 XGMAC_INT_DMA_CH_SR_RI,
315 XGMAC_INT_DMA_CH_SR_RBU,
316 XGMAC_INT_DMA_CH_SR_RPS,
317 XGMAC_INT_DMA_CH_SR_FBE,
318 XGMAC_INT_DMA_ALL,
319};
320
321enum xgbe_int_state {
322 XGMAC_INT_STATE_SAVE,
323 XGMAC_INT_STATE_RESTORE,
324};
325
326enum xgbe_mtl_fifo_size {
327 XGMAC_MTL_FIFO_SIZE_256 = 0x00,
328 XGMAC_MTL_FIFO_SIZE_512 = 0x01,
329 XGMAC_MTL_FIFO_SIZE_1K = 0x03,
330 XGMAC_MTL_FIFO_SIZE_2K = 0x07,
331 XGMAC_MTL_FIFO_SIZE_4K = 0x0f,
332 XGMAC_MTL_FIFO_SIZE_8K = 0x1f,
333 XGMAC_MTL_FIFO_SIZE_16K = 0x3f,
334 XGMAC_MTL_FIFO_SIZE_32K = 0x7f,
335 XGMAC_MTL_FIFO_SIZE_64K = 0xff,
336 XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
337 XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
338};
339
340struct xgbe_mmc_stats {
341 /* Tx Stats */
342 u64 txoctetcount_gb;
343 u64 txframecount_gb;
344 u64 txbroadcastframes_g;
345 u64 txmulticastframes_g;
346 u64 tx64octets_gb;
347 u64 tx65to127octets_gb;
348 u64 tx128to255octets_gb;
349 u64 tx256to511octets_gb;
350 u64 tx512to1023octets_gb;
351 u64 tx1024tomaxoctets_gb;
352 u64 txunicastframes_gb;
353 u64 txmulticastframes_gb;
354 u64 txbroadcastframes_gb;
355 u64 txunderflowerror;
356 u64 txoctetcount_g;
357 u64 txframecount_g;
358 u64 txpauseframes;
359 u64 txvlanframes_g;
360
361 /* Rx Stats */
362 u64 rxframecount_gb;
363 u64 rxoctetcount_gb;
364 u64 rxoctetcount_g;
365 u64 rxbroadcastframes_g;
366 u64 rxmulticastframes_g;
367 u64 rxcrcerror;
368 u64 rxrunterror;
369 u64 rxjabbererror;
370 u64 rxundersize_g;
371 u64 rxoversize_g;
372 u64 rx64octets_gb;
373 u64 rx65to127octets_gb;
374 u64 rx128to255octets_gb;
375 u64 rx256to511octets_gb;
376 u64 rx512to1023octets_gb;
377 u64 rx1024tomaxoctets_gb;
378 u64 rxunicastframes_g;
379 u64 rxlengtherror;
380 u64 rxoutofrangetype;
381 u64 rxpauseframes;
382 u64 rxfifooverflow;
383 u64 rxvlanframes_gb;
384 u64 rxwatchdogerror;
385};
386
387struct xgbe_hw_if {
388 int (*tx_complete)(struct xgbe_ring_desc *);
389
390 int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
391 int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
b85e4d89 392 int (*add_mac_addresses)(struct xgbe_prv_data *);
c5aa9e3b
LT		 393 int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
394
395 int (*enable_rx_csum)(struct xgbe_prv_data *);
396 int (*disable_rx_csum)(struct xgbe_prv_data *);
397
398 int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
399 int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
801c62d9
LT		 400 int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
401 int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
402 int (*update_vlan_hash_table)(struct xgbe_prv_data *);
c5aa9e3b
LT		 403
404 int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
405 void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
406 int (*set_gmii_speed)(struct xgbe_prv_data *);
407 int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
408 int (*set_xgmii_speed)(struct xgbe_prv_data *);
409
410 void (*enable_tx)(struct xgbe_prv_data *);
411 void (*disable_tx)(struct xgbe_prv_data *);
412 void (*enable_rx)(struct xgbe_prv_data *);
413 void (*disable_rx)(struct xgbe_prv_data *);
414
415 void (*powerup_tx)(struct xgbe_prv_data *);
416 void (*powerdown_tx)(struct xgbe_prv_data *);
417 void (*powerup_rx)(struct xgbe_prv_data *);
418 void (*powerdown_rx)(struct xgbe_prv_data *);
419
420 int (*init)(struct xgbe_prv_data *);
421 int (*exit)(struct xgbe_prv_data *);
422
423 int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
424 int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
425 void (*pre_xmit)(struct xgbe_channel *);
426 int (*dev_read)(struct xgbe_channel *);
427 void (*tx_desc_init)(struct xgbe_channel *);
428 void (*rx_desc_init)(struct xgbe_channel *);
429 void (*rx_desc_reset)(struct xgbe_ring_data *);
430 void (*tx_desc_reset)(struct xgbe_ring_data *);
431 int (*is_last_desc)(struct xgbe_ring_desc *);
432 int (*is_context_desc)(struct xgbe_ring_desc *);
433
434 /* For FLOW ctrl */
435 int (*config_tx_flow_control)(struct xgbe_prv_data *);
436 int (*config_rx_flow_control)(struct xgbe_prv_data *);
437
438 /* For RX coalescing */
439 int (*config_rx_coalesce)(struct xgbe_prv_data *);
440 int (*config_tx_coalesce)(struct xgbe_prv_data *);
441 unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
442 unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
443
444 /* For RX and TX threshold config */
445 int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
446 int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
447
448 /* For RX and TX Store and Forward Mode config */
449 int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
450 int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
451
452 /* For TX DMA Operate on Second Frame config */
453 int (*config_osp_mode)(struct xgbe_prv_data *);
454
455 /* For RX and TX PBL config */
456 int (*config_rx_pbl_val)(struct xgbe_prv_data *);
457 int (*get_rx_pbl_val)(struct xgbe_prv_data *);
458 int (*config_tx_pbl_val)(struct xgbe_prv_data *);
459 int (*get_tx_pbl_val)(struct xgbe_prv_data *);
460 int (*config_pblx8)(struct xgbe_prv_data *);
461
462 /* For MMC statistics */
463 void (*rx_mmc_int)(struct xgbe_prv_data *);
464 void (*tx_mmc_int)(struct xgbe_prv_data *);
465 void (*read_mmc_stats)(struct xgbe_prv_data *);
466};
467
468struct xgbe_desc_if {
469 int (*alloc_ring_resources)(struct xgbe_prv_data *);
470 void (*free_ring_resources)(struct xgbe_prv_data *);
471 int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
472 void (*realloc_skb)(struct xgbe_channel *);
473 void (*unmap_skb)(struct xgbe_prv_data *, struct xgbe_ring_data *);
474 void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
475 void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
476};
477
478/* This structure contains flags that indicate what hardware features
479 * or configurations are present in the device.
480 */
481struct xgbe_hw_features {
482 /* HW Feature Register0 */
483 unsigned int gmii; /* 1000 Mbps support */
484 unsigned int vlhash; /* VLAN Hash Filter */
485 unsigned int sma; /* SMA(MDIO) Interface */
486 unsigned int rwk; /* PMT remote wake-up packet */
487 unsigned int mgk; /* PMT magic packet */
488 unsigned int mmc; /* RMON module */
489 unsigned int aoe; /* ARP Offload */
490 unsigned int ts; /* IEEE 1588-2008 Adavanced Timestamp */
491 unsigned int eee; /* Energy Efficient Ethernet */
492 unsigned int tx_coe; /* Tx Checksum Offload */
493 unsigned int rx_coe; /* Rx Checksum Offload */
494 unsigned int addn_mac; /* Additional MAC Addresses */
495 unsigned int ts_src; /* Timestamp Source */
496 unsigned int sa_vlan_ins; /* Source Address or VLAN Insertion */
497
498 /* HW Feature Register1 */
499 unsigned int rx_fifo_size; /* MTL Receive FIFO Size */
500 unsigned int tx_fifo_size; /* MTL Transmit FIFO Size */
501 unsigned int adv_ts_hi; /* Advance Timestamping High Word */
502 unsigned int dcb; /* DCB Feature */
503 unsigned int sph; /* Split Header Feature */
504 unsigned int tso; /* TCP Segmentation Offload */
505 unsigned int dma_debug; /* DMA Debug Registers */
506 unsigned int rss; /* Receive Side Scaling */
507 unsigned int hash_table_size; /* Hash Table Size */
508 unsigned int l3l4_filter_num; /* Number of L3-L4 Filters */
509
510 /* HW Feature Register2 */
511 unsigned int rx_q_cnt; /* Number of MTL Receive Queues */
512 unsigned int tx_q_cnt; /* Number of MTL Transmit Queues */
513 unsigned int rx_ch_cnt; /* Number of DMA Receive Channels */
514 unsigned int tx_ch_cnt; /* Number of DMA Transmit Channels */
515 unsigned int pps_out_num; /* Number of PPS outputs */
516 unsigned int aux_snap_num; /* Number of Aux snapshot inputs */
517};
518
519struct xgbe_prv_data {
520 struct net_device *netdev;
521 struct platform_device *pdev;
522 struct device *dev;
523
524 /* XGMAC/XPCS related mmio registers */
525 void __iomem *xgmac_regs; /* XGMAC CSRs */
526 void __iomem *xpcs_regs; /* XPCS MMD registers */
527
528 /* Overall device lock */
529 spinlock_t lock;
530
531 /* XPCS indirect addressing mutex */
532 struct mutex xpcs_mutex;
533
534 int irq_number;
535
536 struct xgbe_hw_if hw_if;
537 struct xgbe_desc_if desc_if;
538
539 /* Rings for Tx/Rx on a DMA channel */
540 struct xgbe_channel *channel;
541 unsigned int channel_count;
542 unsigned int tx_ring_count;
543 unsigned int tx_desc_count;
544 unsigned int rx_ring_count;
545 unsigned int rx_desc_count;
546
547 /* Tx/Rx common settings */
548 unsigned int pblx8;
549
550 /* Tx settings */
551 unsigned int tx_sf_mode;
552 unsigned int tx_threshold;
553 unsigned int tx_pbl;
554 unsigned int tx_osp_mode;
555
556 /* Rx settings */
557 unsigned int rx_sf_mode;
558 unsigned int rx_threshold;
559 unsigned int rx_pbl;
560
561 /* Tx coalescing settings */
562 unsigned int tx_usecs;
563 unsigned int tx_frames;
564
565 /* Rx coalescing settings */
566 unsigned int rx_riwt;
567 unsigned int rx_frames;
568
569 /* Current MTU */
570 unsigned int rx_buf_size;
571
572 /* Flow control settings */
573 unsigned int pause_autoneg;
574 unsigned int tx_pause;
575 unsigned int rx_pause;
576
577 /* MDIO settings */
578 struct module *phy_module;
579 char *mii_bus_id;
580 struct mii_bus *mii;
581 int mdio_mmd;
582 struct phy_device *phydev;
583 int default_autoneg;
584 int default_speed;
585
586 /* Current PHY settings */
587 phy_interface_t phy_mode;
588 int phy_link;
589 int phy_speed;
590 unsigned int phy_tx_pause;
591 unsigned int phy_rx_pause;
592
593 /* Netdev related settings */
594 netdev_features_t netdev_features;
595 struct napi_struct napi;
596 struct xgbe_mmc_stats mmc_stats;
597
801c62d9
LT		 598 /* Filtering support */
599 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
600
c5aa9e3b
LT		 601 /* System clock value used for Rx watchdog */
602 struct clk *sysclock;
603
604 /* Hardware features of the device */
605 struct xgbe_hw_features hw_feat;
606
607 /* Device restart work structure */
608 struct work_struct restart_work;
609
610 /* Keeps track of power mode */
611 unsigned int power_down;
612
613#ifdef CONFIG_DEBUG_FS
614 struct dentry *xgbe_debugfs;
615
616 unsigned int debugfs_xgmac_reg;
617
618 unsigned int debugfs_xpcs_mmd;
619 unsigned int debugfs_xpcs_reg;
620#endif
621};
622
623/* Function prototypes*/
624
625void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
626void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
627struct net_device_ops *xgbe_get_netdev_ops(void);
628struct ethtool_ops *xgbe_get_ethtool_ops(void);
629
630int xgbe_mdio_register(struct xgbe_prv_data *);
631void xgbe_mdio_unregister(struct xgbe_prv_data *);
632void xgbe_dump_phy_registers(struct xgbe_prv_data *);
633void xgbe_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int,
634 unsigned int);
635void xgbe_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *,
636 unsigned int);
637void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
638void xgbe_get_all_hw_features(struct xgbe_prv_data *);
639int xgbe_powerup(struct net_device *, unsigned int);
640int xgbe_powerdown(struct net_device *, unsigned int);
641void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
642void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
643
644#ifdef CONFIG_DEBUG_FS
645void xgbe_debugfs_init(struct xgbe_prv_data *);
646void xgbe_debugfs_exit(struct xgbe_prv_data *);
647#else
648static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
649static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
650#endif /* CONFIG_DEBUG_FS */
651
652/* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */
653#if 0
654#define XGMAC_ENABLE_TX_DESC_DUMP
655#define XGMAC_ENABLE_RX_DESC_DUMP
656#endif
657
658/* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */
659#if 0
660#define XGMAC_ENABLE_TX_PKT_DUMP
661#define XGMAC_ENABLE_RX_PKT_DUMP
662#endif
663
664/* NOTE: Uncomment for function trace log messages in KERNEL LOG */
665#if 0
666#define YDEBUG
667#define YDEBUG_MDIO
668#endif
669
670/* For debug prints */
671#ifdef YDEBUG
672#define DBGPR(x...) pr_alert(x)
673#define DBGPHY_REGS(x...) xgbe_dump_phy_registers(x)
674#else
675#define DBGPR(x...) do { } while (0)
676#define DBGPHY_REGS(x...) do { } while (0)
677#endif
678
679#ifdef YDEBUG_MDIO
680#define DBGPR_MDIO(x...) pr_alert(x)
681#else
682#define DBGPR_MDIO(x...) do { } while (0)
683#endif
684
685#endif
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git