]> git.ipfire.org Git - thirdparty/kernel/stable.git/blame - drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
projects / thirdparty / kernel / stable.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
cxgb4: Add support in debugfs to display sensor information
[thirdparty/kernel/stable.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
CommitLineData
fd88b31a
HS		 1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#include <linux/seq_file.h>
36#include <linux/debugfs.h>
37#include <linux/string_helpers.h>
38#include <linux/sort.h>
688ea5fe 39#include <linux/ctype.h>
fd88b31a
HS		 40
41#include "cxgb4.h"
42#include "t4_regs.h"
43#include "t4fw_api.h"
44#include "cxgb4_debugfs.h"
b5a02f50 45#include "clip_tbl.h"
fd88b31a
HS		 46#include "l2t.h"
47
f1ff24aa
HS		 48/* generic seq_file support for showing a table of size rows x width. */
49static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
50{
51 pos -= tb->skip_first;
52 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
53}
54
55static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
56{
57 struct seq_tab *tb = seq->private;
58
59 if (tb->skip_first && *pos == 0)
60 return SEQ_START_TOKEN;
61
62 return seq_tab_get_idx(tb, *pos);
63}
64
65static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
66{
67 v = seq_tab_get_idx(seq->private, *pos + 1);
68 if (v)
69 ++*pos;
70 return v;
71}
72
73static void seq_tab_stop(struct seq_file *seq, void *v)
74{
75}
76
77static int seq_tab_show(struct seq_file *seq, void *v)
78{
79 const struct seq_tab *tb = seq->private;
80
81 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
82}
83
84static const struct seq_operations seq_tab_ops = {
85 .start = seq_tab_start,
86 .next = seq_tab_next,
87 .stop = seq_tab_stop,
88 .show = seq_tab_show
89};
90
91struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
92 unsigned int width, unsigned int have_header,
93 int (*show)(struct seq_file *seq, void *v, int i))
94{
95 struct seq_tab *p;
96
97 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
98 if (p) {
99 p->show = show;
100 p->rows = rows;
101 p->width = width;
102 p->skip_first = have_header != 0;
103 }
104 return p;
105}
106
c778af7d
HS		 107/* Trim the size of a seq_tab to the supplied number of rows. The operation is
108 * irreversible.
109 */
110static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
111{
112 if (new_rows > p->rows)
113 return -EINVAL;
114 p->rows = new_rows;
115 return 0;
116}
117
f1ff24aa
HS		 118static int cim_la_show(struct seq_file *seq, void *v, int idx)
119{
120 if (v == SEQ_START_TOKEN)
121 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
122 " LS0Data\n");
123 else {
124 const u32 *p = v;
125
126 seq_printf(seq,
127 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
128 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
129 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
130 p[6], p[7]);
131 }
132 return 0;
133}
134
135static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
136{
137 if (v == SEQ_START_TOKEN) {
138 seq_puts(seq, "Status Data PC\n");
139 } else {
140 const u32 *p = v;
141
142 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
143 p[7]);
144 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
145 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
146 p[4] & 0xff, p[5] >> 8);
147 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
148 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
149 }
150 return 0;
151}
152
153static int cim_la_open(struct inode *inode, struct file *file)
154{
155 int ret;
156 unsigned int cfg;
157 struct seq_tab *p;
158 struct adapter *adap = inode->i_private;
159
160 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
161 if (ret)
162 return ret;
163
164 p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
165 cfg & UPDBGLACAPTPCONLY_F ?
166 cim_la_show_3in1 : cim_la_show);
167 if (!p)
168 return -ENOMEM;
169
170 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
171 if (ret)
172 seq_release_private(inode, file);
173 return ret;
174}
175
176static const struct file_operations cim_la_fops = {
177 .owner = THIS_MODULE,
178 .open = cim_la_open,
179 .read = seq_read,
180 .llseek = seq_lseek,
181 .release = seq_release_private
182};
183
74b3092c
HS		 184static int cim_qcfg_show(struct seq_file *seq, void *v)
185{
186 static const char * const qname[] = {
187 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
188 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
189 "SGE0-RX", "SGE1-RX"
190 };
191
192 int i;
193 struct adapter *adap = seq->private;
194 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
195 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
196 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
197 u16 thres[CIM_NUM_IBQ];
198 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
199 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
200 u32 *p = stat;
201 int cim_num_obq = is_t4(adap->params.chip) ?
202 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
203
204 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
205 UP_IBQ_0_SHADOW_RDADDR_A,
206 ARRAY_SIZE(stat), stat);
207 if (!i) {
208 if (is_t4(adap->params.chip)) {
209 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
210 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
211 wr = obq_wr_t4;
212 } else {
213 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
214 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
215 wr = obq_wr_t5;
216 }
217 }
218 if (i)
219 return i;
220
221 t4_read_cimq_cfg(adap, base, size, thres);
222
223 seq_printf(seq,
224 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
225 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
226 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
227 qname[i], base[i], size[i], thres[i],
228 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
229 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
230 QUEREMFLITS_G(p[2]) * 16);
231 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
232 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
233 qname[i], base[i], size[i],
234 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
235 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
236 QUEREMFLITS_G(p[2]) * 16);
237 return 0;
238}
239
240static int cim_qcfg_open(struct inode *inode, struct file *file)
241{
242 return single_open(file, cim_qcfg_show, inode->i_private);
243}
244
245static const struct file_operations cim_qcfg_fops = {
246 .owner = THIS_MODULE,
247 .open = cim_qcfg_open,
248 .read = seq_read,
249 .llseek = seq_lseek,
250 .release = single_release,
251};
252
e5f0e43b
HS		 253static int cimq_show(struct seq_file *seq, void *v, int idx)
254{
255 const u32 *p = v;
256
257 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
258 p[2], p[3]);
259 return 0;
260}
261
262static int cim_ibq_open(struct inode *inode, struct file *file)
263{
264 int ret;
265 struct seq_tab *p;
266 unsigned int qid = (uintptr_t)inode->i_private & 7;
267 struct adapter *adap = inode->i_private - qid;
268
269 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
270 if (!p)
271 return -ENOMEM;
272
273 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
274 if (ret < 0)
275 seq_release_private(inode, file);
276 else
277 ret = 0;
278 return ret;
279}
280
281static const struct file_operations cim_ibq_fops = {
282 .owner = THIS_MODULE,
283 .open = cim_ibq_open,
284 .read = seq_read,
285 .llseek = seq_lseek,
286 .release = seq_release_private
287};
288
c778af7d
HS		 289static int cim_obq_open(struct inode *inode, struct file *file)
290{
291 int ret;
292 struct seq_tab *p;
293 unsigned int qid = (uintptr_t)inode->i_private & 7;
294 struct adapter *adap = inode->i_private - qid;
295
296 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
297 if (!p)
298 return -ENOMEM;
299
300 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
301 if (ret < 0) {
302 seq_release_private(inode, file);
303 } else {
304 seq_tab_trim(p, ret / 4);
305 ret = 0;
306 }
307 return ret;
308}
309
310static const struct file_operations cim_obq_fops = {
311 .owner = THIS_MODULE,
312 .open = cim_obq_open,
313 .read = seq_read,
314 .llseek = seq_lseek,
315 .release = seq_release_private
316};
317
b3bbe36a
HS		 318/* Show the PM memory stats. These stats include:
319 *
320 * TX:
321 * Read: memory read operation
322 * Write Bypass: cut-through
323 * Bypass + mem: cut-through and save copy
324 *
325 * RX:
326 * Read: memory read
327 * Write Bypass: cut-through
328 * Flush: payload trim or drop
329 */
330static int pm_stats_show(struct seq_file *seq, void *v)
331{
332 static const char * const tx_pm_stats[] = {
333 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
334 };
335 static const char * const rx_pm_stats[] = {
336 "Read:", "Write bypass:", "Write mem:", "Flush:"
337 };
338
339 int i;
340 u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
341 u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
342 struct adapter *adap = seq->private;
343
344 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
345 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
346
347 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
348 for (i = 0; i < PM_NSTATS - 1; i++)
349 seq_printf(seq, "%-13s %10u %20llu\n",
350 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
351
352 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
353 for (i = 0; i < PM_NSTATS - 1; i++)
354 seq_printf(seq, "%-13s %10u %20llu\n",
355 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
356 return 0;
357}
358
359static int pm_stats_open(struct inode *inode, struct file *file)
360{
361 return single_open(file, pm_stats_show, inode->i_private);
362}
363
364static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
365 size_t count, loff_t *pos)
366{
367 struct adapter *adap = FILE_DATA(file)->i_private;
368
369 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
370 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
371 return count;
372}
373
374static const struct file_operations pm_stats_debugfs_fops = {
375 .owner = THIS_MODULE,
376 .open = pm_stats_open,
377 .read = seq_read,
378 .llseek = seq_lseek,
379 .release = single_release,
380 .write = pm_stats_clear
381};
382
b58b6676
HS		 383/* Format a value in a unit that differs from the value's native unit by the
384 * given factor.
385 */
386static char *unit_conv(char *buf, size_t len, unsigned int val,
387 unsigned int factor)
388{
389 unsigned int rem = val % factor;
390
391 if (rem == 0) {
392 snprintf(buf, len, "%u", val / factor);
393 } else {
394 while (rem % 10 == 0)
395 rem /= 10;
396 snprintf(buf, len, "%u.%u", val / factor, rem);
397 }
398 return buf;
399}
400
401static int clk_show(struct seq_file *seq, void *v)
402{
403 char buf[32];
404 struct adapter *adap = seq->private;
405 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
406 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
407 unsigned int tre = TIMERRESOLUTION_G(res);
408 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
409 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
410
411 seq_printf(seq, "Core clock period: %s ns\n",
412 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
413 seq_printf(seq, "TP timer tick: %s us\n",
414 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
415 seq_printf(seq, "TCP timestamp tick: %s us\n",
416 unit_conv(buf, sizeof(buf),
417 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
418 seq_printf(seq, "DACK tick: %s us\n",
419 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
420 seq_printf(seq, "DACK timer: %u us\n",
421 ((cclk_ps << dack_re) / 1000000) *
422 t4_read_reg(adap, TP_DACK_TIMER_A));
423 seq_printf(seq, "Retransmit min: %llu us\n",
424 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
425 seq_printf(seq, "Retransmit max: %llu us\n",
426 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
427 seq_printf(seq, "Persist timer min: %llu us\n",
428 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
429 seq_printf(seq, "Persist timer max: %llu us\n",
430 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
431 seq_printf(seq, "Keepalive idle timer: %llu us\n",
432 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
433 seq_printf(seq, "Keepalive interval: %llu us\n",
434 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
435 seq_printf(seq, "Initial SRTT: %llu us\n",
436 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
437 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
438 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
439
440 return 0;
441}
442
443DEFINE_SIMPLE_DEBUGFS_FILE(clk);
444
f1ff24aa 445/* Firmware Device Log dump. */
49aa284f
HS		 446static const char * const devlog_level_strings[] = {
447 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
448 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
449 [FW_DEVLOG_LEVEL_ERR] = "ERR",
450 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
451 [FW_DEVLOG_LEVEL_INFO] = "INFO",
452 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
453};
454
455static const char * const devlog_facility_strings[] = {
456 [FW_DEVLOG_FACILITY_CORE] = "CORE",
457 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
458 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
459 [FW_DEVLOG_FACILITY_RES] = "RES",
460 [FW_DEVLOG_FACILITY_HW] = "HW",
461 [FW_DEVLOG_FACILITY_FLR] = "FLR",
462 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
463 [FW_DEVLOG_FACILITY_PHY] = "PHY",
464 [FW_DEVLOG_FACILITY_MAC] = "MAC",
465 [FW_DEVLOG_FACILITY_PORT] = "PORT",
466 [FW_DEVLOG_FACILITY_VI] = "VI",
467 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
468 [FW_DEVLOG_FACILITY_ACL] = "ACL",
469 [FW_DEVLOG_FACILITY_TM] = "TM",
470 [FW_DEVLOG_FACILITY_QFC] = "QFC",
471 [FW_DEVLOG_FACILITY_DCB] = "DCB",
472 [FW_DEVLOG_FACILITY_ETH] = "ETH",
473 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
474 [FW_DEVLOG_FACILITY_RI] = "RI",
475 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
476 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
477 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
478 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
479};
480
481/* Information gathered by Device Log Open routine for the display routine.
482 */
483struct devlog_info {
484 unsigned int nentries; /* number of entries in log[] */
485 unsigned int first; /* first [temporal] entry in log[] */
486 struct fw_devlog_e log[0]; /* Firmware Device Log */
487};
488
489/* Dump a Firmaware Device Log entry.
490 */
491static int devlog_show(struct seq_file *seq, void *v)
492{
493 if (v == SEQ_START_TOKEN)
494 seq_printf(seq, "%10s %15s %8s %8s %s\n",
495 "Seq#", "Tstamp", "Level", "Facility", "Message");
496 else {
497 struct devlog_info *dinfo = seq->private;
498 int fidx = (uintptr_t)v - 2;
499 unsigned long index;
500 struct fw_devlog_e *e;
501
502 /* Get a pointer to the log entry to display. Skip unused log
503 * entries.
504 */
505 index = dinfo->first + fidx;
506 if (index >= dinfo->nentries)
507 index -= dinfo->nentries;
508 e = &dinfo->log[index];
509 if (e->timestamp == 0)
510 return 0;
511
512 /* Print the message. This depends on the firmware using
513 * exactly the same formating strings as the kernel so we may
514 * eventually have to put a format interpreter in here ...
515 */
516 seq_printf(seq, "%10d %15llu %8s %8s ",
517 e->seqno, e->timestamp,
518 (e->level < ARRAY_SIZE(devlog_level_strings)
519 ? devlog_level_strings[e->level]
520 : "UNKNOWN"),
521 (e->facility < ARRAY_SIZE(devlog_facility_strings)
522 ? devlog_facility_strings[e->facility]
523 : "UNKNOWN"));
524 seq_printf(seq, e->fmt, e->params[0], e->params[1],
525 e->params[2], e->params[3], e->params[4],
526 e->params[5], e->params[6], e->params[7]);
527 }
528 return 0;
529}
530
531/* Sequential File Operations for Device Log.
532 */
533static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
534{
535 if (pos > dinfo->nentries)
536 return NULL;
537
538 return (void *)(uintptr_t)(pos + 1);
539}
540
541static void *devlog_start(struct seq_file *seq, loff_t *pos)
542{
543 struct devlog_info *dinfo = seq->private;
544
545 return (*pos
546 ? devlog_get_idx(dinfo, *pos)
547 : SEQ_START_TOKEN);
548}
549
550static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
551{
552 struct devlog_info *dinfo = seq->private;
553
554 (*pos)++;
555 return devlog_get_idx(dinfo, *pos);
556}
557
558static void devlog_stop(struct seq_file *seq, void *v)
559{
560}
561
562static const struct seq_operations devlog_seq_ops = {
563 .start = devlog_start,
564 .next = devlog_next,
565 .stop = devlog_stop,
566 .show = devlog_show
567};
568
569/* Set up for reading the firmware's device log. We read the entire log here
570 * and then display it incrementally in devlog_show().
571 */
572static int devlog_open(struct inode *inode, struct file *file)
573{
574 struct adapter *adap = inode->i_private;
575 struct devlog_params *dparams = &adap->params.devlog;
576 struct devlog_info *dinfo;
577 unsigned int index;
578 u32 fseqno;
579 int ret;
580
581 /* If we don't know where the log is we can't do anything.
582 */
583 if (dparams->start == 0)
584 return -ENXIO;
585
586 /* Allocate the space to read in the firmware's device log and set up
587 * for the iterated call to our display function.
588 */
589 dinfo = __seq_open_private(file, &devlog_seq_ops,
590 sizeof(*dinfo) + dparams->size);
591 if (!dinfo)
592 return -ENOMEM;
593
594 /* Record the basic log buffer information and read in the raw log.
595 */
596 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
597 dinfo->first = 0;
598 spin_lock(&adap->win0_lock);
599 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
600 dparams->start, dparams->size, (__be32 *)dinfo->log,
601 T4_MEMORY_READ);
602 spin_unlock(&adap->win0_lock);
603 if (ret) {
604 seq_release_private(inode, file);
605 return ret;
606 }
607
608 /* Translate log multi-byte integral elements into host native format
609 * and determine where the first entry in the log is.
610 */
611 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
612 struct fw_devlog_e *e = &dinfo->log[index];
613 int i;
614 __u32 seqno;
615
616 if (e->timestamp == 0)
617 continue;
618
619 e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
620 seqno = be32_to_cpu(e->seqno);
621 for (i = 0; i < 8; i++)
622 e->params[i] =
623 (__force __be32)be32_to_cpu(e->params[i]);
624
625 if (seqno < fseqno) {
626 fseqno = seqno;
627 dinfo->first = index;
628 }
629 }
630 return 0;
631}
632
633static const struct file_operations devlog_fops = {
634 .owner = THIS_MODULE,
635 .open = devlog_open,
636 .read = seq_read,
637 .llseek = seq_lseek,
638 .release = seq_release_private
639};
640
49216c1c
HS		 641static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
642 loff_t *ppos)
643{
644 loff_t pos = *ppos;
645 loff_t avail = FILE_DATA(file)->i_size;
646 struct adapter *adap = file->private_data;
647
648 if (pos < 0)
649 return -EINVAL;
650 if (pos >= avail)
651 return 0;
652 if (count > avail - pos)
653 count = avail - pos;
654
655 while (count) {
656 size_t len;
657 int ret, ofst;
658 u8 data[256];
659
660 ofst = pos & 3;
661 len = min(count + ofst, sizeof(data));
662 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
663 (u32 *)data, 1);
664 if (ret)
665 return ret;
666
667 len -= ofst;
668 if (copy_to_user(buf, data + ofst, len))
669 return -EFAULT;
670
671 buf += len;
672 pos += len;
673 count -= len;
674 }
675 count = pos - *ppos;
676 *ppos = pos;
677 return count;
678}
679
680static const struct file_operations flash_debugfs_fops = {
681 .owner = THIS_MODULE,
682 .open = mem_open,
683 .read = flash_read,
684};
685
ef82f662
HS		 686static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
687{
688 *mask = x | y;
689 y = (__force u64)cpu_to_be64(y);
690 memcpy(addr, (char *)&y + 2, ETH_ALEN);
691}
692
693static int mps_tcam_show(struct seq_file *seq, void *v)
694{
695 if (v == SEQ_START_TOKEN)
696 seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
697 " VF Replication "
698 "P0 P1 P2 P3 ML\n");
699 else {
700 u64 mask;
701 u8 addr[ETH_ALEN];
702 struct adapter *adap = seq->private;
703 unsigned int idx = (uintptr_t)v - 2;
704 u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
705 u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
706 u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
707 u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
708 u32 rplc[4] = {0, 0, 0, 0};
709
710 if (tcamx & tcamy) {
711 seq_printf(seq, "%3u -\n", idx);
712 goto out;
713 }
714
715 if (cls_lo & REPLICATE_F) {
716 struct fw_ldst_cmd ldst_cmd;
717 int ret;
718
719 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
720 ldst_cmd.op_to_addrspace =
721 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
722 FW_CMD_REQUEST_F |
723 FW_CMD_READ_F |
724 FW_LDST_CMD_ADDRSPACE_V(
725 FW_LDST_ADDRSPC_MPS));
726 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
727 ldst_cmd.u.mps.fid_ctl =
728 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
729 FW_LDST_CMD_CTL_V(idx));
730 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
731 sizeof(ldst_cmd), &ldst_cmd);
732 if (ret)
733 dev_warn(adap->pdev_dev, "Can't read MPS "
734 "replication map for idx %d: %d\n",
735 idx, -ret);
736 else {
737 rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
738 rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
739 rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
740 rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
741 }
742 }
743
744 tcamxy2valmask(tcamx, tcamy, addr, &mask);
745 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
746 "%3c %#x%4u%4d",
747 idx, addr[0], addr[1], addr[2], addr[3], addr[4],
748 addr[5], (unsigned long long)mask,
749 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
750 PF_G(cls_lo),
751 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
752 if (cls_lo & REPLICATE_F)
753 seq_printf(seq, " %08x %08x %08x %08x",
754 rplc[3], rplc[2], rplc[1], rplc[0]);
755 else
756 seq_printf(seq, "%36c", ' ');
757 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
758 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
759 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
760 (cls_lo >> MULTILISTEN0_S) & 0xf);
761 }
762out: return 0;
763}
764
765static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
766{
767 struct adapter *adap = seq->private;
768 int max_mac_addr = is_t4(adap->params.chip) ?
769 NUM_MPS_CLS_SRAM_L_INSTANCES :
770 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
771 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
772}
773
774static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
775{
776 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
777}
778
779static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
780{
781 ++*pos;
782 return mps_tcam_get_idx(seq, *pos);
783}
784
785static void mps_tcam_stop(struct seq_file *seq, void *v)
786{
787}
788
789static const struct seq_operations mps_tcam_seq_ops = {
790 .start = mps_tcam_start,
791 .next = mps_tcam_next,
792 .stop = mps_tcam_stop,
793 .show = mps_tcam_show
794};
795
796static int mps_tcam_open(struct inode *inode, struct file *file)
797{
798 int res = seq_open(file, &mps_tcam_seq_ops);
799
800 if (!res) {
801 struct seq_file *seq = file->private_data;
802
803 seq->private = inode->i_private;
804 }
805 return res;
806}
807
808static const struct file_operations mps_tcam_debugfs_fops = {
809 .owner = THIS_MODULE,
810 .open = mps_tcam_open,
811 .read = seq_read,
812 .llseek = seq_lseek,
813 .release = seq_release,
814};
815
70a5f3bb
HS		 816/* Display various sensor information.
817 */
818static int sensors_show(struct seq_file *seq, void *v)
819{
820 struct adapter *adap = seq->private;
821 u32 param[7], val[7];
822 int ret;
823
824 /* Note that if the sensors haven't been initialized and turned on
825 * we'll get values of 0, so treat those as "<unknown>" ...
826 */
827 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
828 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
829 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
830 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
831 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
832 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
833 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2,
834 param, val);
835
836 if (ret < 0 || val[0] == 0)
837 seq_puts(seq, "Temperature: <unknown>\n");
838 else
839 seq_printf(seq, "Temperature: %dC\n", val[0]);
840
841 if (ret < 0 || val[1] == 0)
842 seq_puts(seq, "Core VDD: <unknown>\n");
843 else
844 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
845
846 return 0;
847}
848
849DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
850
b5a02f50
AB		 851#if IS_ENABLED(CONFIG_IPV6)
852static int clip_tbl_open(struct inode *inode, struct file *file)
853{
854 return single_open(file, clip_tbl_show, PDE_DATA(inode));
855}
856
857static const struct file_operations clip_tbl_debugfs_fops = {
858 .owner = THIS_MODULE,
859 .open = clip_tbl_open,
860 .read = seq_read,
861 .llseek = seq_lseek,
862 .release = single_release
863};
864#endif
865
688ea5fe
HS		 866/*RSS Table.
867 */
868
869static int rss_show(struct seq_file *seq, void *v, int idx)
870{
871 u16 *entry = v;
872
873 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
874 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
875 entry[5], entry[6], entry[7]);
876 return 0;
877}
878
879static int rss_open(struct inode *inode, struct file *file)
880{
881 int ret;
882 struct seq_tab *p;
883 struct adapter *adap = inode->i_private;
884
885 p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
886 if (!p)
887 return -ENOMEM;
888
889 ret = t4_read_rss(adap, (u16 *)p->data);
890 if (ret)
891 seq_release_private(inode, file);
892
893 return ret;
894}
895
896static const struct file_operations rss_debugfs_fops = {
897 .owner = THIS_MODULE,
898 .open = rss_open,
899 .read = seq_read,
900 .llseek = seq_lseek,
901 .release = seq_release_private
902};
903
904/* RSS Configuration.
905 */
906
907/* Small utility function to return the strings "yes" or "no" if the supplied
908 * argument is non-zero.
909 */
910static const char *yesno(int x)
911{
912 static const char *yes = "yes";
913 static const char *no = "no";
914
915 return x ? yes : no;
916}
917
918static int rss_config_show(struct seq_file *seq, void *v)
919{
920 struct adapter *adapter = seq->private;
921 static const char * const keymode[] = {
922 "global",
923 "global and per-VF scramble",
924 "per-PF and per-VF scramble",
925 "per-VF and per-VF scramble",
926 };
927 u32 rssconf;
928
929 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
930 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
931 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
932 TNL4TUPENIPV6_F));
933 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
934 TNL2TUPENIPV6_F));
935 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
936 TNL4TUPENIPV4_F));
937 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
938 TNL2TUPENIPV4_F));
939 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
940 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
941 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
942 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
943 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
944 OFDHASHSAVE_F));
945 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
946 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
947 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
948 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
949 SYN4TUPENIPV6_F));
950 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
951 SYN2TUPENIPV6_F));
952 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
953 SYN4TUPENIPV4_F));
954 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
955 SYN2TUPENIPV4_F));
956 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
957 SYN4TUPENIPV6_F));
958 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
959 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
960 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
961 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
962 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
963 CHANNELENABLE_F));
964 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
965 PORTENABLE_F));
966 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
967 TNLALLLOOKUP_F));
968 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
969 VIRTENABLE_F));
970 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
971 CONGESTIONENABLE_F));
972 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
973 HASHTOEPLITZ_F));
974 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
975 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
976
977 seq_puts(seq, "\n");
978
979 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
980 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
981 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
982 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
983 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
984 seq_printf(seq, " HashAll: %3s\n",
985 yesno(rssconf & HASHALL_F));
986 seq_printf(seq, " HashEth: %3s\n",
987 yesno(rssconf & HASHETH_F));
988 }
989 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
990
991 seq_puts(seq, "\n");
992
993 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
994 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
995 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
996 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
997 RRCPLMAPEN_F));
998 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
999
1000 seq_puts(seq, "\n");
1001
1002 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1003 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1004 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1005 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
1006
1007 seq_puts(seq, "\n");
1008
1009 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1010 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1011 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1012 seq_printf(seq, " KeyWrAddrX: %3d\n",
1013 KEYWRADDRX_G(rssconf));
1014 seq_printf(seq, " KeyExtend: %3s\n",
1015 yesno(rssconf & KEYEXTEND_F));
1016 }
1017 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
1018 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
1019 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
1020 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
1021 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
1022 DISABLEVLAN_F));
1023 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
1024 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
1025 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1026 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
1027 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
1028 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
1029 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
1030 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
1031
1032 seq_puts(seq, "\n");
1033
1034 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1035 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1036 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
1037 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
1038 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
1039 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
1040 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
1041 CHNUNDFLOW3_F));
1042 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
1043 CHNUNDFLOW2_F));
1044 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
1045 CHNUNDFLOW1_F));
1046 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
1047 CHNUNDFLOW0_F));
1048 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
1049 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
1050 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
1051 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
1052 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
1053 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
1054 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
1055 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
1056 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
1057 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
1058 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
1059
1060 return 0;
1061}
1062
1063DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
1064
1065/* RSS Secret Key.
1066 */
1067
1068static int rss_key_show(struct seq_file *seq, void *v)
1069{
1070 u32 key[10];
1071
1072 t4_read_rss_key(seq->private, key);
1073 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
1074 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
1075 key[2], key[1], key[0]);
1076 return 0;
1077}
1078
1079static int rss_key_open(struct inode *inode, struct file *file)
1080{
1081 return single_open(file, rss_key_show, inode->i_private);
1082}
1083
1084static ssize_t rss_key_write(struct file *file, const char __user *buf,
1085 size_t count, loff_t *pos)
1086{
1087 int i, j;
1088 u32 key[10];
1089 char s[100], *p;
1090 struct adapter *adap = FILE_DATA(file)->i_private;
1091
1092 if (count > sizeof(s) - 1)
1093 return -EINVAL;
1094 if (copy_from_user(s, buf, count))
1095 return -EFAULT;
1096 for (i = count; i > 0 && isspace(s[i - 1]); i--)
1097 ;
1098 s[i] = '\0';
1099
1100 for (p = s, i = 9; i >= 0; i--) {
1101 key[i] = 0;
1102 for (j = 0; j < 8; j++, p++) {
1103 if (!isxdigit(*p))
1104 return -EINVAL;
1105 key[i] = (key[i] << 4) | hex2val(*p);
1106 }
1107 }
1108
1109 t4_write_rss_key(adap, key, -1);
1110 return count;
1111}
1112
1113static const struct file_operations rss_key_debugfs_fops = {
1114 .owner = THIS_MODULE,
1115 .open = rss_key_open,
1116 .read = seq_read,
1117 .llseek = seq_lseek,
1118 .release = single_release,
1119 .write = rss_key_write
1120};
1121
1122/* PF RSS Configuration.
1123 */
1124
1125struct rss_pf_conf {
1126 u32 rss_pf_map;
1127 u32 rss_pf_mask;
1128 u32 rss_pf_config;
1129};
1130
1131static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
1132{
1133 struct rss_pf_conf *pfconf;
1134
1135 if (v == SEQ_START_TOKEN) {
1136 /* use the 0th entry to dump the PF Map Index Size */
1137 pfconf = seq->private + offsetof(struct seq_tab, data);
1138 seq_printf(seq, "PF Map Index Size = %d\n\n",
1139 LKPIDXSIZE_G(pfconf->rss_pf_map));
1140
1141 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
1142 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
1143 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
1144 } else {
1145 #define G_PFnLKPIDX(map, n) \
1146 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1147 #define G_PFnMSKSIZE(mask, n) \
1148 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1149
1150 pfconf = v;
1151 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
1152 idx,
1153 yesno(pfconf->rss_pf_config & MAPENABLE_F),
1154 yesno(pfconf->rss_pf_config & CHNENABLE_F),
1155 yesno(pfconf->rss_pf_config & PRTENABLE_F),
1156 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
1157 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
1158 IVFWIDTH_G(pfconf->rss_pf_config),
1159 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
1160 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
1161 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
1162 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
1163 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
1164 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
1165 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
1166
1167 #undef G_PFnLKPIDX
1168 #undef G_PFnMSKSIZE
1169 }
1170 return 0;
1171}
1172
1173static int rss_pf_config_open(struct inode *inode, struct file *file)
1174{
1175 struct adapter *adapter = inode->i_private;
1176 struct seq_tab *p;
1177 u32 rss_pf_map, rss_pf_mask;
1178 struct rss_pf_conf *pfconf;
1179 int pf;
1180
1181 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
1182 if (!p)
1183 return -ENOMEM;
1184
1185 pfconf = (struct rss_pf_conf *)p->data;
1186 rss_pf_map = t4_read_rss_pf_map(adapter);
1187 rss_pf_mask = t4_read_rss_pf_mask(adapter);
1188 for (pf = 0; pf < 8; pf++) {
1189 pfconf[pf].rss_pf_map = rss_pf_map;
1190 pfconf[pf].rss_pf_mask = rss_pf_mask;
1191 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
1192 }
1193 return 0;
1194}
1195
1196static const struct file_operations rss_pf_config_debugfs_fops = {
1197 .owner = THIS_MODULE,
1198 .open = rss_pf_config_open,
1199 .read = seq_read,
1200 .llseek = seq_lseek,
1201 .release = seq_release_private
1202};
1203
1204/* VF RSS Configuration.
1205 */
1206
1207struct rss_vf_conf {
1208 u32 rss_vf_vfl;
1209 u32 rss_vf_vfh;
1210};
1211
1212static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
1213{
1214 if (v == SEQ_START_TOKEN) {
1215 seq_puts(seq, " RSS Hash Tuple Enable\n");
1216 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
1217 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
1218 } else {
1219 struct rss_vf_conf *vfconf = v;
1220
1221 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
1222 idx,
1223 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
1224 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
1225 VFLKPIDX_G(vfconf->rss_vf_vfh),
1226 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
1227 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
1228 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1229 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
1230 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1231 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
1232 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
1233 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
1234 KEYINDEX_G(vfconf->rss_vf_vfh),
1235 vfconf->rss_vf_vfl);
1236 }
1237 return 0;
1238}
1239
1240static int rss_vf_config_open(struct inode *inode, struct file *file)
1241{
1242 struct adapter *adapter = inode->i_private;
1243 struct seq_tab *p;
1244 struct rss_vf_conf *vfconf;
1245 int vf;
1246
1247 p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
1248 if (!p)
1249 return -ENOMEM;
1250
1251 vfconf = (struct rss_vf_conf *)p->data;
1252 for (vf = 0; vf < 128; vf++) {
1253 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
1254 &vfconf[vf].rss_vf_vfh);
1255 }
1256 return 0;
1257}
1258
1259static const struct file_operations rss_vf_config_debugfs_fops = {
1260 .owner = THIS_MODULE,
1261 .open = rss_vf_config_open,
1262 .read = seq_read,
1263 .llseek = seq_lseek,
1264 .release = seq_release_private
1265};
1266
3051fa61
HS		 1267/**
1268 * ethqset2pinfo - return port_info of an Ethernet Queue Set
1269 * @adap: the adapter
1270 * @qset: Ethernet Queue Set
1271 */
1272static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
1273{
1274 int pidx;
1275
1276 for_each_port(adap, pidx) {
1277 struct port_info *pi = adap2pinfo(adap, pidx);
1278
1279 if (qset >= pi->first_qset &&
1280 qset < pi->first_qset + pi->nqsets)
1281 return pi;
1282 }
1283
1284 /* should never happen! */
1285 BUG_ON(1);
1286 return NULL;
1287}
1288
dc9daab2
HS		 1289static int sge_qinfo_show(struct seq_file *seq, void *v)
1290{
1291 struct adapter *adap = seq->private;
1292 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1293 int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1294 int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1295 int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1296 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1297 int i, r = (uintptr_t)v - 1;
1298 int toe_idx = r - eth_entries;
1299 int rdma_idx = toe_idx - toe_entries;
1300 int ciq_idx = rdma_idx - rdma_entries;
1301 int ctrl_idx = ciq_idx - ciq_entries;
1302 int fq_idx = ctrl_idx - ctrl_entries;
1303
1304 if (r)
1305 seq_putc(seq, '\n');
1306
1307#define S3(fmt_spec, s, v) \
1308do { \
1309 seq_printf(seq, "%-12s", s); \
1310 for (i = 0; i < n; ++i) \
1311 seq_printf(seq, " %16" fmt_spec, v); \
1312 seq_putc(seq, '\n'); \
1313} while (0)
1314#define S(s, v) S3("s", s, v)
1315#define T(s, v) S3("u", s, tx[i].v)
1316#define R(s, v) S3("u", s, rx[i].v)
1317
1318 if (r < eth_entries) {
1319 int base_qset = r * 4;
1320 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1321 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1322 int n = min(4, adap->sge.ethqsets - 4 * r);
1323
1324 S("QType:", "Ethernet");
1325 S("Interface:",
1326 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1327 T("TxQ ID:", q.cntxt_id);
1328 T("TxQ size:", q.size);
1329 T("TxQ inuse:", q.in_use);
1330 T("TxQ CIDX:", q.cidx);
1331 T("TxQ PIDX:", q.pidx);
3051fa61 1332#ifdef CONFIG_CHELSIO_T4_DCB
dc9daab2
HS		 1333 T("DCB Prio:", dcb_prio);
1334 S3("u", "DCB PGID:",
1335 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1336 4*(7-tx[i].dcb_prio)) & 0xf);
1337 S3("u", "DCB PFC:",
1338 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1339 1*(7-tx[i].dcb_prio)) & 0x1);
1340#endif
1341 R("RspQ ID:", rspq.abs_id);
1342 R("RspQ size:", rspq.size);
1343 R("RspQE size:", rspq.iqe_len);
1344 R("RspQ CIDX:", rspq.cidx);
1345 R("RspQ Gen:", rspq.gen);
1346 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1347 S3("u", "Intr pktcnt:",
1348 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1349 R("FL ID:", fl.cntxt_id);
1350 R("FL size:", fl.size - 8);
1351 R("FL pend:", fl.pend_cred);
1352 R("FL avail:", fl.avail);
1353 R("FL PIDX:", fl.pidx);
1354 R("FL CIDX:", fl.cidx);
1355 } else if (toe_idx < toe_entries) {
1356 const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
1357 const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
1358 int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
1359
1360 S("QType:", "TOE");
1361 T("TxQ ID:", q.cntxt_id);
1362 T("TxQ size:", q.size);
1363 T("TxQ inuse:", q.in_use);
1364 T("TxQ CIDX:", q.cidx);
1365 T("TxQ PIDX:", q.pidx);
1366 R("RspQ ID:", rspq.abs_id);
1367 R("RspQ size:", rspq.size);
1368 R("RspQE size:", rspq.iqe_len);
1369 R("RspQ CIDX:", rspq.cidx);
1370 R("RspQ Gen:", rspq.gen);
1371 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1372 S3("u", "Intr pktcnt:",
1373 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1374 R("FL ID:", fl.cntxt_id);
1375 R("FL size:", fl.size - 8);
1376 R("FL pend:", fl.pend_cred);
1377 R("FL avail:", fl.avail);
1378 R("FL PIDX:", fl.pidx);
1379 R("FL CIDX:", fl.cidx);
1380 } else if (rdma_idx < rdma_entries) {
1381 const struct sge_ofld_rxq *rx =
1382 &adap->sge.rdmarxq[rdma_idx * 4];
1383 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
1384
1385 S("QType:", "RDMA-CPL");
1386 R("RspQ ID:", rspq.abs_id);
1387 R("RspQ size:", rspq.size);
1388 R("RspQE size:", rspq.iqe_len);
1389 R("RspQ CIDX:", rspq.cidx);
1390 R("RspQ Gen:", rspq.gen);
1391 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1392 S3("u", "Intr pktcnt:",
1393 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1394 R("FL ID:", fl.cntxt_id);
1395 R("FL size:", fl.size - 8);
1396 R("FL pend:", fl.pend_cred);
1397 R("FL avail:", fl.avail);
1398 R("FL PIDX:", fl.pidx);
1399 R("FL CIDX:", fl.cidx);
1400 } else if (ciq_idx < ciq_entries) {
1401 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
1402 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
1403
1404 S("QType:", "RDMA-CIQ");
1405 R("RspQ ID:", rspq.abs_id);
1406 R("RspQ size:", rspq.size);
1407 R("RspQE size:", rspq.iqe_len);
1408 R("RspQ CIDX:", rspq.cidx);
1409 R("RspQ Gen:", rspq.gen);
1410 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1411 S3("u", "Intr pktcnt:",
1412 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1413 } else if (ctrl_idx < ctrl_entries) {
1414 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
1415 int n = min(4, adap->params.nports - 4 * ctrl_idx);
1416
1417 S("QType:", "Control");
1418 T("TxQ ID:", q.cntxt_id);
1419 T("TxQ size:", q.size);
1420 T("TxQ inuse:", q.in_use);
1421 T("TxQ CIDX:", q.cidx);
1422 T("TxQ PIDX:", q.pidx);
1423 } else if (fq_idx == 0) {
1424 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
1425
1426 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1427 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1428 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
1429 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
1430 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
1431 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1432 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1433 qtimer_val(adap, evtq));
1434 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1435 adap->sge.counter_val[evtq->pktcnt_idx]);
1436 }
1437#undef R
1438#undef T
1439#undef S
1440#undef S3
1441return 0;
1442}
1443
1444static int sge_queue_entries(const struct adapter *adap)
1445{
1446 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
1447 DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
1448 DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
1449 DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
1450 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
1451}
1452
1453static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1454{
1455 int entries = sge_queue_entries(seq->private);
1456
1457 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1458}
1459
1460static void sge_queue_stop(struct seq_file *seq, void *v)
1461{
1462}
1463
1464static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1465{
1466 int entries = sge_queue_entries(seq->private);
1467
1468 ++*pos;
1469 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1470}
1471
1472static const struct seq_operations sge_qinfo_seq_ops = {
1473 .start = sge_queue_start,
1474 .next = sge_queue_next,
1475 .stop = sge_queue_stop,
1476 .show = sge_qinfo_show
1477};
1478
1479static int sge_qinfo_open(struct inode *inode, struct file *file)
1480{
1481 int res = seq_open(file, &sge_qinfo_seq_ops);
1482
1483 if (!res) {
1484 struct seq_file *seq = file->private_data;
1485
1486 seq->private = inode->i_private;
1487 }
1488 return res;
1489}
1490
1491static const struct file_operations sge_qinfo_debugfs_fops = {
1492 .owner = THIS_MODULE,
1493 .open = sge_qinfo_open,
1494 .read = seq_read,
1495 .llseek = seq_lseek,
1496 .release = seq_release,
1497};
1498
49216c1c
HS		 1499int mem_open(struct inode *inode, struct file *file)
1500{
1501 unsigned int mem;
1502 struct adapter *adap;
1503
1504 file->private_data = inode->i_private;
1505
1506 mem = (uintptr_t)file->private_data & 0x3;
1507 adap = file->private_data - mem;
1508
1509 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
1510
1511 return 0;
1512}
1513
fd88b31a
HS		 1514static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
1515 loff_t *ppos)
1516{
1517 loff_t pos = *ppos;
1518 loff_t avail = file_inode(file)->i_size;
1519 unsigned int mem = (uintptr_t)file->private_data & 3;
1520 struct adapter *adap = file->private_data - mem;
1521 __be32 *data;
1522 int ret;
1523
1524 if (pos < 0)
1525 return -EINVAL;
1526 if (pos >= avail)
1527 return 0;
1528 if (count > avail - pos)
1529 count = avail - pos;
1530
1531 data = t4_alloc_mem(count);
1532 if (!data)
1533 return -ENOMEM;
1534
1535 spin_lock(&adap->win0_lock);
1536 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
1537 spin_unlock(&adap->win0_lock);
1538 if (ret) {
1539 t4_free_mem(data);
1540 return ret;
1541 }
1542 ret = copy_to_user(buf, data, count);
1543
1544 t4_free_mem(data);
1545 if (ret)
1546 return -EFAULT;
1547
1548 *ppos = pos + count;
1549 return count;
1550}
fd88b31a
HS		 1551static const struct file_operations mem_debugfs_fops = {
1552 .owner = THIS_MODULE,
1553 .open = simple_open,
1554 .read = mem_read,
1555 .llseek = default_llseek,
1556};
1557
49216c1c
HS		 1558static void set_debugfs_file_size(struct dentry *de, loff_t size)
1559{
1560 if (!IS_ERR(de) && de->d_inode)
1561 de->d_inode->i_size = size;
1562}
1563
fd88b31a
HS		 1564static void add_debugfs_mem(struct adapter *adap, const char *name,
1565 unsigned int idx, unsigned int size_mb)
1566{
1567 struct dentry *de;
1568
1569 de = debugfs_create_file(name, S_IRUSR, adap->debugfs_root,
1570 (void *)adap + idx, &mem_debugfs_fops);
1571 if (de && de->d_inode)
1572 de->d_inode->i_size = size_mb << 20;
1573}
1574
1575/* Add an array of Debug FS files.
1576 */
1577void add_debugfs_files(struct adapter *adap,
1578 struct t4_debugfs_entry *files,
1579 unsigned int nfiles)
1580{
1581 int i;
1582
1583 /* debugfs support is best effort */
1584 for (i = 0; i < nfiles; i++)
1585 debugfs_create_file(files[i].name, files[i].mode,
1586 adap->debugfs_root,
1587 (void *)adap + files[i].data,
1588 files[i].ops);
1589}
1590
1591int t4_setup_debugfs(struct adapter *adap)
1592{
1593 int i;
1594 u32 size;
49216c1c 1595 struct dentry *de;
fd88b31a
HS		 1596
1597 static struct t4_debugfs_entry t4_debugfs_files[] = {
f1ff24aa 1598 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
74b3092c 1599 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
b58b6676 1600 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
49aa284f 1601 { "devlog", &devlog_fops, S_IRUSR, 0 },
fd88b31a 1602 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
ef82f662 1603 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
688ea5fe
HS		 1604 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
1605 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
1606 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
1607 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
1608 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
dc9daab2 1609 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
e5f0e43b
HS		 1610 { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
1611 { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
1612 { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
1613 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
1614 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
1615 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
c778af7d
HS		 1616 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
1617 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
1618 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
1619 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
1620 { "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
1621 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
70a5f3bb 1622 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
b3bbe36a 1623 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
b5a02f50
AB		 1624#if IS_ENABLED(CONFIG_IPV6)
1625 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
1626#endif
fd88b31a
HS		 1627 };
1628
c778af7d
HS		 1629 /* Debug FS nodes common to all T5 and later adapters.
1630 */
1631 static struct t4_debugfs_entry t5_debugfs_files[] = {
1632 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
1633 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
1634 };
1635
fd88b31a
HS		 1636 add_debugfs_files(adap,
1637 t4_debugfs_files,
1638 ARRAY_SIZE(t4_debugfs_files));
c778af7d
HS		 1639 if (!is_t4(adap->params.chip))
1640 add_debugfs_files(adap,
1641 t5_debugfs_files,
1642 ARRAY_SIZE(t5_debugfs_files));
fd88b31a 1643
6559a7e8
HS		 1644 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
1645 if (i & EDRAM0_ENABLE_F) {
1646 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
1647 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
fd88b31a 1648 }
6559a7e8
HS		 1649 if (i & EDRAM1_ENABLE_F) {
1650 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
1651 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
fd88b31a
HS		 1652 }
1653 if (is_t4(adap->params.chip)) {
6559a7e8
HS		 1654 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
1655 if (i & EXT_MEM_ENABLE_F)
fd88b31a 1656 add_debugfs_mem(adap, "mc", MEM_MC,
6559a7e8 1657 EXT_MEM_SIZE_G(size));
fd88b31a 1658 } else {
6559a7e8
HS		 1659 if (i & EXT_MEM0_ENABLE_F) {
1660 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
fd88b31a 1661 add_debugfs_mem(adap, "mc0", MEM_MC0,
6559a7e8 1662 EXT_MEM0_SIZE_G(size));
fd88b31a 1663 }
6559a7e8
HS		 1664 if (i & EXT_MEM1_ENABLE_F) {
1665 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
fd88b31a 1666 add_debugfs_mem(adap, "mc1", MEM_MC1,
6559a7e8 1667 EXT_MEM1_SIZE_G(size));
fd88b31a
HS		 1668 }
1669 }
49216c1c
HS		 1670
1671 de = debugfs_create_file("flash", S_IRUSR, adap->debugfs_root, adap,
1672 &flash_debugfs_fops);
1673 set_debugfs_file_size(de, adap->params.sf_size);
1674
fd88b31a
HS		 1675 return 0;
1676}
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git