]> git.ipfire.org Git - thirdparty/kernel/stable.git/blame - drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
cxgb4: Added support in debugfs to dump cim ingress bound queue contents
[thirdparty/kernel/stable.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
CommitLineData
fd88b31a
HS
1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#include <linux/seq_file.h>
36#include <linux/debugfs.h>
37#include <linux/string_helpers.h>
38#include <linux/sort.h>
688ea5fe 39#include <linux/ctype.h>
fd88b31a
HS
40
41#include "cxgb4.h"
42#include "t4_regs.h"
43#include "t4fw_api.h"
44#include "cxgb4_debugfs.h"
b5a02f50 45#include "clip_tbl.h"
fd88b31a
HS
46#include "l2t.h"
47
f1ff24aa
HS
48/* generic seq_file support for showing a table of size rows x width. */
49static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
50{
51 pos -= tb->skip_first;
52 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
53}
54
55static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
56{
57 struct seq_tab *tb = seq->private;
58
59 if (tb->skip_first && *pos == 0)
60 return SEQ_START_TOKEN;
61
62 return seq_tab_get_idx(tb, *pos);
63}
64
65static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
66{
67 v = seq_tab_get_idx(seq->private, *pos + 1);
68 if (v)
69 ++*pos;
70 return v;
71}
72
73static void seq_tab_stop(struct seq_file *seq, void *v)
74{
75}
76
77static int seq_tab_show(struct seq_file *seq, void *v)
78{
79 const struct seq_tab *tb = seq->private;
80
81 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
82}
83
84static const struct seq_operations seq_tab_ops = {
85 .start = seq_tab_start,
86 .next = seq_tab_next,
87 .stop = seq_tab_stop,
88 .show = seq_tab_show
89};
90
91struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
92 unsigned int width, unsigned int have_header,
93 int (*show)(struct seq_file *seq, void *v, int i))
94{
95 struct seq_tab *p;
96
97 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
98 if (p) {
99 p->show = show;
100 p->rows = rows;
101 p->width = width;
102 p->skip_first = have_header != 0;
103 }
104 return p;
105}
106
107static int cim_la_show(struct seq_file *seq, void *v, int idx)
108{
109 if (v == SEQ_START_TOKEN)
110 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
111 " LS0Data\n");
112 else {
113 const u32 *p = v;
114
115 seq_printf(seq,
116 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
117 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
118 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
119 p[6], p[7]);
120 }
121 return 0;
122}
123
124static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
125{
126 if (v == SEQ_START_TOKEN) {
127 seq_puts(seq, "Status Data PC\n");
128 } else {
129 const u32 *p = v;
130
131 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
132 p[7]);
133 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
134 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
135 p[4] & 0xff, p[5] >> 8);
136 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
137 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
138 }
139 return 0;
140}
141
142static int cim_la_open(struct inode *inode, struct file *file)
143{
144 int ret;
145 unsigned int cfg;
146 struct seq_tab *p;
147 struct adapter *adap = inode->i_private;
148
149 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
150 if (ret)
151 return ret;
152
153 p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
154 cfg & UPDBGLACAPTPCONLY_F ?
155 cim_la_show_3in1 : cim_la_show);
156 if (!p)
157 return -ENOMEM;
158
159 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
160 if (ret)
161 seq_release_private(inode, file);
162 return ret;
163}
164
165static const struct file_operations cim_la_fops = {
166 .owner = THIS_MODULE,
167 .open = cim_la_open,
168 .read = seq_read,
169 .llseek = seq_lseek,
170 .release = seq_release_private
171};
172
74b3092c
HS
173static int cim_qcfg_show(struct seq_file *seq, void *v)
174{
175 static const char * const qname[] = {
176 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
177 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
178 "SGE0-RX", "SGE1-RX"
179 };
180
181 int i;
182 struct adapter *adap = seq->private;
183 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
184 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
185 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
186 u16 thres[CIM_NUM_IBQ];
187 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
188 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
189 u32 *p = stat;
190 int cim_num_obq = is_t4(adap->params.chip) ?
191 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
192
193 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
194 UP_IBQ_0_SHADOW_RDADDR_A,
195 ARRAY_SIZE(stat), stat);
196 if (!i) {
197 if (is_t4(adap->params.chip)) {
198 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
199 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
200 wr = obq_wr_t4;
201 } else {
202 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
203 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
204 wr = obq_wr_t5;
205 }
206 }
207 if (i)
208 return i;
209
210 t4_read_cimq_cfg(adap, base, size, thres);
211
212 seq_printf(seq,
213 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
214 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
215 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
216 qname[i], base[i], size[i], thres[i],
217 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
218 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
219 QUEREMFLITS_G(p[2]) * 16);
220 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
221 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
222 qname[i], base[i], size[i],
223 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
224 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
225 QUEREMFLITS_G(p[2]) * 16);
226 return 0;
227}
228
229static int cim_qcfg_open(struct inode *inode, struct file *file)
230{
231 return single_open(file, cim_qcfg_show, inode->i_private);
232}
233
234static const struct file_operations cim_qcfg_fops = {
235 .owner = THIS_MODULE,
236 .open = cim_qcfg_open,
237 .read = seq_read,
238 .llseek = seq_lseek,
239 .release = single_release,
240};
241
e5f0e43b
HS
242static int cimq_show(struct seq_file *seq, void *v, int idx)
243{
244 const u32 *p = v;
245
246 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
247 p[2], p[3]);
248 return 0;
249}
250
251static int cim_ibq_open(struct inode *inode, struct file *file)
252{
253 int ret;
254 struct seq_tab *p;
255 unsigned int qid = (uintptr_t)inode->i_private & 7;
256 struct adapter *adap = inode->i_private - qid;
257
258 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
259 if (!p)
260 return -ENOMEM;
261
262 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
263 if (ret < 0)
264 seq_release_private(inode, file);
265 else
266 ret = 0;
267 return ret;
268}
269
270static const struct file_operations cim_ibq_fops = {
271 .owner = THIS_MODULE,
272 .open = cim_ibq_open,
273 .read = seq_read,
274 .llseek = seq_lseek,
275 .release = seq_release_private
276};
277
f1ff24aa 278/* Firmware Device Log dump. */
49aa284f
HS
279static const char * const devlog_level_strings[] = {
280 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
281 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
282 [FW_DEVLOG_LEVEL_ERR] = "ERR",
283 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
284 [FW_DEVLOG_LEVEL_INFO] = "INFO",
285 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
286};
287
288static const char * const devlog_facility_strings[] = {
289 [FW_DEVLOG_FACILITY_CORE] = "CORE",
290 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
291 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
292 [FW_DEVLOG_FACILITY_RES] = "RES",
293 [FW_DEVLOG_FACILITY_HW] = "HW",
294 [FW_DEVLOG_FACILITY_FLR] = "FLR",
295 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
296 [FW_DEVLOG_FACILITY_PHY] = "PHY",
297 [FW_DEVLOG_FACILITY_MAC] = "MAC",
298 [FW_DEVLOG_FACILITY_PORT] = "PORT",
299 [FW_DEVLOG_FACILITY_VI] = "VI",
300 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
301 [FW_DEVLOG_FACILITY_ACL] = "ACL",
302 [FW_DEVLOG_FACILITY_TM] = "TM",
303 [FW_DEVLOG_FACILITY_QFC] = "QFC",
304 [FW_DEVLOG_FACILITY_DCB] = "DCB",
305 [FW_DEVLOG_FACILITY_ETH] = "ETH",
306 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
307 [FW_DEVLOG_FACILITY_RI] = "RI",
308 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
309 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
310 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
311 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
312};
313
314/* Information gathered by Device Log Open routine for the display routine.
315 */
316struct devlog_info {
317 unsigned int nentries; /* number of entries in log[] */
318 unsigned int first; /* first [temporal] entry in log[] */
319 struct fw_devlog_e log[0]; /* Firmware Device Log */
320};
321
322/* Dump a Firmaware Device Log entry.
323 */
324static int devlog_show(struct seq_file *seq, void *v)
325{
326 if (v == SEQ_START_TOKEN)
327 seq_printf(seq, "%10s %15s %8s %8s %s\n",
328 "Seq#", "Tstamp", "Level", "Facility", "Message");
329 else {
330 struct devlog_info *dinfo = seq->private;
331 int fidx = (uintptr_t)v - 2;
332 unsigned long index;
333 struct fw_devlog_e *e;
334
335 /* Get a pointer to the log entry to display. Skip unused log
336 * entries.
337 */
338 index = dinfo->first + fidx;
339 if (index >= dinfo->nentries)
340 index -= dinfo->nentries;
341 e = &dinfo->log[index];
342 if (e->timestamp == 0)
343 return 0;
344
345 /* Print the message. This depends on the firmware using
346 * exactly the same formating strings as the kernel so we may
347 * eventually have to put a format interpreter in here ...
348 */
349 seq_printf(seq, "%10d %15llu %8s %8s ",
350 e->seqno, e->timestamp,
351 (e->level < ARRAY_SIZE(devlog_level_strings)
352 ? devlog_level_strings[e->level]
353 : "UNKNOWN"),
354 (e->facility < ARRAY_SIZE(devlog_facility_strings)
355 ? devlog_facility_strings[e->facility]
356 : "UNKNOWN"));
357 seq_printf(seq, e->fmt, e->params[0], e->params[1],
358 e->params[2], e->params[3], e->params[4],
359 e->params[5], e->params[6], e->params[7]);
360 }
361 return 0;
362}
363
364/* Sequential File Operations for Device Log.
365 */
366static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
367{
368 if (pos > dinfo->nentries)
369 return NULL;
370
371 return (void *)(uintptr_t)(pos + 1);
372}
373
374static void *devlog_start(struct seq_file *seq, loff_t *pos)
375{
376 struct devlog_info *dinfo = seq->private;
377
378 return (*pos
379 ? devlog_get_idx(dinfo, *pos)
380 : SEQ_START_TOKEN);
381}
382
383static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
384{
385 struct devlog_info *dinfo = seq->private;
386
387 (*pos)++;
388 return devlog_get_idx(dinfo, *pos);
389}
390
391static void devlog_stop(struct seq_file *seq, void *v)
392{
393}
394
395static const struct seq_operations devlog_seq_ops = {
396 .start = devlog_start,
397 .next = devlog_next,
398 .stop = devlog_stop,
399 .show = devlog_show
400};
401
402/* Set up for reading the firmware's device log. We read the entire log here
403 * and then display it incrementally in devlog_show().
404 */
405static int devlog_open(struct inode *inode, struct file *file)
406{
407 struct adapter *adap = inode->i_private;
408 struct devlog_params *dparams = &adap->params.devlog;
409 struct devlog_info *dinfo;
410 unsigned int index;
411 u32 fseqno;
412 int ret;
413
414 /* If we don't know where the log is we can't do anything.
415 */
416 if (dparams->start == 0)
417 return -ENXIO;
418
419 /* Allocate the space to read in the firmware's device log and set up
420 * for the iterated call to our display function.
421 */
422 dinfo = __seq_open_private(file, &devlog_seq_ops,
423 sizeof(*dinfo) + dparams->size);
424 if (!dinfo)
425 return -ENOMEM;
426
427 /* Record the basic log buffer information and read in the raw log.
428 */
429 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
430 dinfo->first = 0;
431 spin_lock(&adap->win0_lock);
432 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
433 dparams->start, dparams->size, (__be32 *)dinfo->log,
434 T4_MEMORY_READ);
435 spin_unlock(&adap->win0_lock);
436 if (ret) {
437 seq_release_private(inode, file);
438 return ret;
439 }
440
441 /* Translate log multi-byte integral elements into host native format
442 * and determine where the first entry in the log is.
443 */
444 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
445 struct fw_devlog_e *e = &dinfo->log[index];
446 int i;
447 __u32 seqno;
448
449 if (e->timestamp == 0)
450 continue;
451
452 e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
453 seqno = be32_to_cpu(e->seqno);
454 for (i = 0; i < 8; i++)
455 e->params[i] =
456 (__force __be32)be32_to_cpu(e->params[i]);
457
458 if (seqno < fseqno) {
459 fseqno = seqno;
460 dinfo->first = index;
461 }
462 }
463 return 0;
464}
465
466static const struct file_operations devlog_fops = {
467 .owner = THIS_MODULE,
468 .open = devlog_open,
469 .read = seq_read,
470 .llseek = seq_lseek,
471 .release = seq_release_private
472};
473
49216c1c
HS
474static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
475 loff_t *ppos)
476{
477 loff_t pos = *ppos;
478 loff_t avail = FILE_DATA(file)->i_size;
479 struct adapter *adap = file->private_data;
480
481 if (pos < 0)
482 return -EINVAL;
483 if (pos >= avail)
484 return 0;
485 if (count > avail - pos)
486 count = avail - pos;
487
488 while (count) {
489 size_t len;
490 int ret, ofst;
491 u8 data[256];
492
493 ofst = pos & 3;
494 len = min(count + ofst, sizeof(data));
495 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
496 (u32 *)data, 1);
497 if (ret)
498 return ret;
499
500 len -= ofst;
501 if (copy_to_user(buf, data + ofst, len))
502 return -EFAULT;
503
504 buf += len;
505 pos += len;
506 count -= len;
507 }
508 count = pos - *ppos;
509 *ppos = pos;
510 return count;
511}
512
513static const struct file_operations flash_debugfs_fops = {
514 .owner = THIS_MODULE,
515 .open = mem_open,
516 .read = flash_read,
517};
518
ef82f662
HS
519static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
520{
521 *mask = x | y;
522 y = (__force u64)cpu_to_be64(y);
523 memcpy(addr, (char *)&y + 2, ETH_ALEN);
524}
525
526static int mps_tcam_show(struct seq_file *seq, void *v)
527{
528 if (v == SEQ_START_TOKEN)
529 seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
530 " VF Replication "
531 "P0 P1 P2 P3 ML\n");
532 else {
533 u64 mask;
534 u8 addr[ETH_ALEN];
535 struct adapter *adap = seq->private;
536 unsigned int idx = (uintptr_t)v - 2;
537 u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
538 u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
539 u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
540 u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
541 u32 rplc[4] = {0, 0, 0, 0};
542
543 if (tcamx & tcamy) {
544 seq_printf(seq, "%3u -\n", idx);
545 goto out;
546 }
547
548 if (cls_lo & REPLICATE_F) {
549 struct fw_ldst_cmd ldst_cmd;
550 int ret;
551
552 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
553 ldst_cmd.op_to_addrspace =
554 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
555 FW_CMD_REQUEST_F |
556 FW_CMD_READ_F |
557 FW_LDST_CMD_ADDRSPACE_V(
558 FW_LDST_ADDRSPC_MPS));
559 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
560 ldst_cmd.u.mps.fid_ctl =
561 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
562 FW_LDST_CMD_CTL_V(idx));
563 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
564 sizeof(ldst_cmd), &ldst_cmd);
565 if (ret)
566 dev_warn(adap->pdev_dev, "Can't read MPS "
567 "replication map for idx %d: %d\n",
568 idx, -ret);
569 else {
570 rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
571 rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
572 rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
573 rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
574 }
575 }
576
577 tcamxy2valmask(tcamx, tcamy, addr, &mask);
578 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
579 "%3c %#x%4u%4d",
580 idx, addr[0], addr[1], addr[2], addr[3], addr[4],
581 addr[5], (unsigned long long)mask,
582 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
583 PF_G(cls_lo),
584 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
585 if (cls_lo & REPLICATE_F)
586 seq_printf(seq, " %08x %08x %08x %08x",
587 rplc[3], rplc[2], rplc[1], rplc[0]);
588 else
589 seq_printf(seq, "%36c", ' ');
590 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
591 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
592 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
593 (cls_lo >> MULTILISTEN0_S) & 0xf);
594 }
595out: return 0;
596}
597
598static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
599{
600 struct adapter *adap = seq->private;
601 int max_mac_addr = is_t4(adap->params.chip) ?
602 NUM_MPS_CLS_SRAM_L_INSTANCES :
603 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
604 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
605}
606
607static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
608{
609 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
610}
611
612static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
613{
614 ++*pos;
615 return mps_tcam_get_idx(seq, *pos);
616}
617
618static void mps_tcam_stop(struct seq_file *seq, void *v)
619{
620}
621
622static const struct seq_operations mps_tcam_seq_ops = {
623 .start = mps_tcam_start,
624 .next = mps_tcam_next,
625 .stop = mps_tcam_stop,
626 .show = mps_tcam_show
627};
628
629static int mps_tcam_open(struct inode *inode, struct file *file)
630{
631 int res = seq_open(file, &mps_tcam_seq_ops);
632
633 if (!res) {
634 struct seq_file *seq = file->private_data;
635
636 seq->private = inode->i_private;
637 }
638 return res;
639}
640
641static const struct file_operations mps_tcam_debugfs_fops = {
642 .owner = THIS_MODULE,
643 .open = mps_tcam_open,
644 .read = seq_read,
645 .llseek = seq_lseek,
646 .release = seq_release,
647};
648
b5a02f50
AB
649#if IS_ENABLED(CONFIG_IPV6)
650static int clip_tbl_open(struct inode *inode, struct file *file)
651{
652 return single_open(file, clip_tbl_show, PDE_DATA(inode));
653}
654
655static const struct file_operations clip_tbl_debugfs_fops = {
656 .owner = THIS_MODULE,
657 .open = clip_tbl_open,
658 .read = seq_read,
659 .llseek = seq_lseek,
660 .release = single_release
661};
662#endif
663
688ea5fe
HS
664/*RSS Table.
665 */
666
667static int rss_show(struct seq_file *seq, void *v, int idx)
668{
669 u16 *entry = v;
670
671 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
672 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
673 entry[5], entry[6], entry[7]);
674 return 0;
675}
676
677static int rss_open(struct inode *inode, struct file *file)
678{
679 int ret;
680 struct seq_tab *p;
681 struct adapter *adap = inode->i_private;
682
683 p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
684 if (!p)
685 return -ENOMEM;
686
687 ret = t4_read_rss(adap, (u16 *)p->data);
688 if (ret)
689 seq_release_private(inode, file);
690
691 return ret;
692}
693
694static const struct file_operations rss_debugfs_fops = {
695 .owner = THIS_MODULE,
696 .open = rss_open,
697 .read = seq_read,
698 .llseek = seq_lseek,
699 .release = seq_release_private
700};
701
702/* RSS Configuration.
703 */
704
705/* Small utility function to return the strings "yes" or "no" if the supplied
706 * argument is non-zero.
707 */
708static const char *yesno(int x)
709{
710 static const char *yes = "yes";
711 static const char *no = "no";
712
713 return x ? yes : no;
714}
715
716static int rss_config_show(struct seq_file *seq, void *v)
717{
718 struct adapter *adapter = seq->private;
719 static const char * const keymode[] = {
720 "global",
721 "global and per-VF scramble",
722 "per-PF and per-VF scramble",
723 "per-VF and per-VF scramble",
724 };
725 u32 rssconf;
726
727 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
728 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
729 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
730 TNL4TUPENIPV6_F));
731 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
732 TNL2TUPENIPV6_F));
733 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
734 TNL4TUPENIPV4_F));
735 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
736 TNL2TUPENIPV4_F));
737 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
738 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
739 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
740 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
741 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
742 OFDHASHSAVE_F));
743 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
744 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
745 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
746 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
747 SYN4TUPENIPV6_F));
748 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
749 SYN2TUPENIPV6_F));
750 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
751 SYN4TUPENIPV4_F));
752 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
753 SYN2TUPENIPV4_F));
754 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
755 SYN4TUPENIPV6_F));
756 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
757 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
758 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
759 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
760 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
761 CHANNELENABLE_F));
762 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
763 PORTENABLE_F));
764 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
765 TNLALLLOOKUP_F));
766 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
767 VIRTENABLE_F));
768 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
769 CONGESTIONENABLE_F));
770 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
771 HASHTOEPLITZ_F));
772 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
773 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
774
775 seq_puts(seq, "\n");
776
777 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
778 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
779 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
780 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
781 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
782 seq_printf(seq, " HashAll: %3s\n",
783 yesno(rssconf & HASHALL_F));
784 seq_printf(seq, " HashEth: %3s\n",
785 yesno(rssconf & HASHETH_F));
786 }
787 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
788
789 seq_puts(seq, "\n");
790
791 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
792 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
793 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
794 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
795 RRCPLMAPEN_F));
796 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
797
798 seq_puts(seq, "\n");
799
800 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
801 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
802 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
803 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
804
805 seq_puts(seq, "\n");
806
807 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
808 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
809 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
810 seq_printf(seq, " KeyWrAddrX: %3d\n",
811 KEYWRADDRX_G(rssconf));
812 seq_printf(seq, " KeyExtend: %3s\n",
813 yesno(rssconf & KEYEXTEND_F));
814 }
815 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
816 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
817 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
818 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
819 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
820 DISABLEVLAN_F));
821 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
822 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
823 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
824 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
825 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
826 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
827 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
828 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
829
830 seq_puts(seq, "\n");
831
832 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
833 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
834 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
835 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
836 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
837 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
838 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
839 CHNUNDFLOW3_F));
840 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
841 CHNUNDFLOW2_F));
842 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
843 CHNUNDFLOW1_F));
844 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
845 CHNUNDFLOW0_F));
846 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
847 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
848 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
849 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
850 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
851 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
852 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
853 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
854 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
855 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
856 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
857
858 return 0;
859}
860
861DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
862
863/* RSS Secret Key.
864 */
865
866static int rss_key_show(struct seq_file *seq, void *v)
867{
868 u32 key[10];
869
870 t4_read_rss_key(seq->private, key);
871 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
872 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
873 key[2], key[1], key[0]);
874 return 0;
875}
876
877static int rss_key_open(struct inode *inode, struct file *file)
878{
879 return single_open(file, rss_key_show, inode->i_private);
880}
881
882static ssize_t rss_key_write(struct file *file, const char __user *buf,
883 size_t count, loff_t *pos)
884{
885 int i, j;
886 u32 key[10];
887 char s[100], *p;
888 struct adapter *adap = FILE_DATA(file)->i_private;
889
890 if (count > sizeof(s) - 1)
891 return -EINVAL;
892 if (copy_from_user(s, buf, count))
893 return -EFAULT;
894 for (i = count; i > 0 && isspace(s[i - 1]); i--)
895 ;
896 s[i] = '\0';
897
898 for (p = s, i = 9; i >= 0; i--) {
899 key[i] = 0;
900 for (j = 0; j < 8; j++, p++) {
901 if (!isxdigit(*p))
902 return -EINVAL;
903 key[i] = (key[i] << 4) | hex2val(*p);
904 }
905 }
906
907 t4_write_rss_key(adap, key, -1);
908 return count;
909}
910
911static const struct file_operations rss_key_debugfs_fops = {
912 .owner = THIS_MODULE,
913 .open = rss_key_open,
914 .read = seq_read,
915 .llseek = seq_lseek,
916 .release = single_release,
917 .write = rss_key_write
918};
919
920/* PF RSS Configuration.
921 */
922
923struct rss_pf_conf {
924 u32 rss_pf_map;
925 u32 rss_pf_mask;
926 u32 rss_pf_config;
927};
928
929static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
930{
931 struct rss_pf_conf *pfconf;
932
933 if (v == SEQ_START_TOKEN) {
934 /* use the 0th entry to dump the PF Map Index Size */
935 pfconf = seq->private + offsetof(struct seq_tab, data);
936 seq_printf(seq, "PF Map Index Size = %d\n\n",
937 LKPIDXSIZE_G(pfconf->rss_pf_map));
938
939 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
940 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
941 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
942 } else {
943 #define G_PFnLKPIDX(map, n) \
944 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
945 #define G_PFnMSKSIZE(mask, n) \
946 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
947
948 pfconf = v;
949 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
950 idx,
951 yesno(pfconf->rss_pf_config & MAPENABLE_F),
952 yesno(pfconf->rss_pf_config & CHNENABLE_F),
953 yesno(pfconf->rss_pf_config & PRTENABLE_F),
954 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
955 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
956 IVFWIDTH_G(pfconf->rss_pf_config),
957 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
958 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
959 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
960 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
961 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
962 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
963 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
964
965 #undef G_PFnLKPIDX
966 #undef G_PFnMSKSIZE
967 }
968 return 0;
969}
970
971static int rss_pf_config_open(struct inode *inode, struct file *file)
972{
973 struct adapter *adapter = inode->i_private;
974 struct seq_tab *p;
975 u32 rss_pf_map, rss_pf_mask;
976 struct rss_pf_conf *pfconf;
977 int pf;
978
979 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
980 if (!p)
981 return -ENOMEM;
982
983 pfconf = (struct rss_pf_conf *)p->data;
984 rss_pf_map = t4_read_rss_pf_map(adapter);
985 rss_pf_mask = t4_read_rss_pf_mask(adapter);
986 for (pf = 0; pf < 8; pf++) {
987 pfconf[pf].rss_pf_map = rss_pf_map;
988 pfconf[pf].rss_pf_mask = rss_pf_mask;
989 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
990 }
991 return 0;
992}
993
994static const struct file_operations rss_pf_config_debugfs_fops = {
995 .owner = THIS_MODULE,
996 .open = rss_pf_config_open,
997 .read = seq_read,
998 .llseek = seq_lseek,
999 .release = seq_release_private
1000};
1001
1002/* VF RSS Configuration.
1003 */
1004
1005struct rss_vf_conf {
1006 u32 rss_vf_vfl;
1007 u32 rss_vf_vfh;
1008};
1009
1010static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
1011{
1012 if (v == SEQ_START_TOKEN) {
1013 seq_puts(seq, " RSS Hash Tuple Enable\n");
1014 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
1015 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
1016 } else {
1017 struct rss_vf_conf *vfconf = v;
1018
1019 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
1020 idx,
1021 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
1022 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
1023 VFLKPIDX_G(vfconf->rss_vf_vfh),
1024 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
1025 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
1026 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1027 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
1028 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1029 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
1030 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
1031 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
1032 KEYINDEX_G(vfconf->rss_vf_vfh),
1033 vfconf->rss_vf_vfl);
1034 }
1035 return 0;
1036}
1037
1038static int rss_vf_config_open(struct inode *inode, struct file *file)
1039{
1040 struct adapter *adapter = inode->i_private;
1041 struct seq_tab *p;
1042 struct rss_vf_conf *vfconf;
1043 int vf;
1044
1045 p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
1046 if (!p)
1047 return -ENOMEM;
1048
1049 vfconf = (struct rss_vf_conf *)p->data;
1050 for (vf = 0; vf < 128; vf++) {
1051 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
1052 &vfconf[vf].rss_vf_vfh);
1053 }
1054 return 0;
1055}
1056
1057static const struct file_operations rss_vf_config_debugfs_fops = {
1058 .owner = THIS_MODULE,
1059 .open = rss_vf_config_open,
1060 .read = seq_read,
1061 .llseek = seq_lseek,
1062 .release = seq_release_private
1063};
1064
dc9daab2
HS
1065static int sge_qinfo_show(struct seq_file *seq, void *v)
1066{
1067 struct adapter *adap = seq->private;
1068 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1069 int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1070 int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1071 int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1072 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1073 int i, r = (uintptr_t)v - 1;
1074 int toe_idx = r - eth_entries;
1075 int rdma_idx = toe_idx - toe_entries;
1076 int ciq_idx = rdma_idx - rdma_entries;
1077 int ctrl_idx = ciq_idx - ciq_entries;
1078 int fq_idx = ctrl_idx - ctrl_entries;
1079
1080 if (r)
1081 seq_putc(seq, '\n');
1082
1083#define S3(fmt_spec, s, v) \
1084do { \
1085 seq_printf(seq, "%-12s", s); \
1086 for (i = 0; i < n; ++i) \
1087 seq_printf(seq, " %16" fmt_spec, v); \
1088 seq_putc(seq, '\n'); \
1089} while (0)
1090#define S(s, v) S3("s", s, v)
1091#define T(s, v) S3("u", s, tx[i].v)
1092#define R(s, v) S3("u", s, rx[i].v)
1093
1094 if (r < eth_entries) {
1095 int base_qset = r * 4;
1096 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1097 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1098 int n = min(4, adap->sge.ethqsets - 4 * r);
1099
1100 S("QType:", "Ethernet");
1101 S("Interface:",
1102 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1103 T("TxQ ID:", q.cntxt_id);
1104 T("TxQ size:", q.size);
1105 T("TxQ inuse:", q.in_use);
1106 T("TxQ CIDX:", q.cidx);
1107 T("TxQ PIDX:", q.pidx);
1108#ifdef CONFIG_CXGB4_DCB
1109 T("DCB Prio:", dcb_prio);
1110 S3("u", "DCB PGID:",
1111 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1112 4*(7-tx[i].dcb_prio)) & 0xf);
1113 S3("u", "DCB PFC:",
1114 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1115 1*(7-tx[i].dcb_prio)) & 0x1);
1116#endif
1117 R("RspQ ID:", rspq.abs_id);
1118 R("RspQ size:", rspq.size);
1119 R("RspQE size:", rspq.iqe_len);
1120 R("RspQ CIDX:", rspq.cidx);
1121 R("RspQ Gen:", rspq.gen);
1122 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1123 S3("u", "Intr pktcnt:",
1124 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1125 R("FL ID:", fl.cntxt_id);
1126 R("FL size:", fl.size - 8);
1127 R("FL pend:", fl.pend_cred);
1128 R("FL avail:", fl.avail);
1129 R("FL PIDX:", fl.pidx);
1130 R("FL CIDX:", fl.cidx);
1131 } else if (toe_idx < toe_entries) {
1132 const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
1133 const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
1134 int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
1135
1136 S("QType:", "TOE");
1137 T("TxQ ID:", q.cntxt_id);
1138 T("TxQ size:", q.size);
1139 T("TxQ inuse:", q.in_use);
1140 T("TxQ CIDX:", q.cidx);
1141 T("TxQ PIDX:", q.pidx);
1142 R("RspQ ID:", rspq.abs_id);
1143 R("RspQ size:", rspq.size);
1144 R("RspQE size:", rspq.iqe_len);
1145 R("RspQ CIDX:", rspq.cidx);
1146 R("RspQ Gen:", rspq.gen);
1147 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1148 S3("u", "Intr pktcnt:",
1149 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1150 R("FL ID:", fl.cntxt_id);
1151 R("FL size:", fl.size - 8);
1152 R("FL pend:", fl.pend_cred);
1153 R("FL avail:", fl.avail);
1154 R("FL PIDX:", fl.pidx);
1155 R("FL CIDX:", fl.cidx);
1156 } else if (rdma_idx < rdma_entries) {
1157 const struct sge_ofld_rxq *rx =
1158 &adap->sge.rdmarxq[rdma_idx * 4];
1159 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
1160
1161 S("QType:", "RDMA-CPL");
1162 R("RspQ ID:", rspq.abs_id);
1163 R("RspQ size:", rspq.size);
1164 R("RspQE size:", rspq.iqe_len);
1165 R("RspQ CIDX:", rspq.cidx);
1166 R("RspQ Gen:", rspq.gen);
1167 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1168 S3("u", "Intr pktcnt:",
1169 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1170 R("FL ID:", fl.cntxt_id);
1171 R("FL size:", fl.size - 8);
1172 R("FL pend:", fl.pend_cred);
1173 R("FL avail:", fl.avail);
1174 R("FL PIDX:", fl.pidx);
1175 R("FL CIDX:", fl.cidx);
1176 } else if (ciq_idx < ciq_entries) {
1177 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
1178 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
1179
1180 S("QType:", "RDMA-CIQ");
1181 R("RspQ ID:", rspq.abs_id);
1182 R("RspQ size:", rspq.size);
1183 R("RspQE size:", rspq.iqe_len);
1184 R("RspQ CIDX:", rspq.cidx);
1185 R("RspQ Gen:", rspq.gen);
1186 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1187 S3("u", "Intr pktcnt:",
1188 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1189 } else if (ctrl_idx < ctrl_entries) {
1190 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
1191 int n = min(4, adap->params.nports - 4 * ctrl_idx);
1192
1193 S("QType:", "Control");
1194 T("TxQ ID:", q.cntxt_id);
1195 T("TxQ size:", q.size);
1196 T("TxQ inuse:", q.in_use);
1197 T("TxQ CIDX:", q.cidx);
1198 T("TxQ PIDX:", q.pidx);
1199 } else if (fq_idx == 0) {
1200 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
1201
1202 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1203 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1204 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
1205 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
1206 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
1207 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1208 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1209 qtimer_val(adap, evtq));
1210 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1211 adap->sge.counter_val[evtq->pktcnt_idx]);
1212 }
1213#undef R
1214#undef T
1215#undef S
1216#undef S3
1217return 0;
1218}
1219
1220static int sge_queue_entries(const struct adapter *adap)
1221{
1222 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
1223 DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
1224 DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
1225 DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
1226 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
1227}
1228
1229static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1230{
1231 int entries = sge_queue_entries(seq->private);
1232
1233 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1234}
1235
1236static void sge_queue_stop(struct seq_file *seq, void *v)
1237{
1238}
1239
1240static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1241{
1242 int entries = sge_queue_entries(seq->private);
1243
1244 ++*pos;
1245 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1246}
1247
1248static const struct seq_operations sge_qinfo_seq_ops = {
1249 .start = sge_queue_start,
1250 .next = sge_queue_next,
1251 .stop = sge_queue_stop,
1252 .show = sge_qinfo_show
1253};
1254
1255static int sge_qinfo_open(struct inode *inode, struct file *file)
1256{
1257 int res = seq_open(file, &sge_qinfo_seq_ops);
1258
1259 if (!res) {
1260 struct seq_file *seq = file->private_data;
1261
1262 seq->private = inode->i_private;
1263 }
1264 return res;
1265}
1266
1267static const struct file_operations sge_qinfo_debugfs_fops = {
1268 .owner = THIS_MODULE,
1269 .open = sge_qinfo_open,
1270 .read = seq_read,
1271 .llseek = seq_lseek,
1272 .release = seq_release,
1273};
1274
49216c1c
HS
1275int mem_open(struct inode *inode, struct file *file)
1276{
1277 unsigned int mem;
1278 struct adapter *adap;
1279
1280 file->private_data = inode->i_private;
1281
1282 mem = (uintptr_t)file->private_data & 0x3;
1283 adap = file->private_data - mem;
1284
1285 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
1286
1287 return 0;
1288}
1289
fd88b31a
HS
1290static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
1291 loff_t *ppos)
1292{
1293 loff_t pos = *ppos;
1294 loff_t avail = file_inode(file)->i_size;
1295 unsigned int mem = (uintptr_t)file->private_data & 3;
1296 struct adapter *adap = file->private_data - mem;
1297 __be32 *data;
1298 int ret;
1299
1300 if (pos < 0)
1301 return -EINVAL;
1302 if (pos >= avail)
1303 return 0;
1304 if (count > avail - pos)
1305 count = avail - pos;
1306
1307 data = t4_alloc_mem(count);
1308 if (!data)
1309 return -ENOMEM;
1310
1311 spin_lock(&adap->win0_lock);
1312 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
1313 spin_unlock(&adap->win0_lock);
1314 if (ret) {
1315 t4_free_mem(data);
1316 return ret;
1317 }
1318 ret = copy_to_user(buf, data, count);
1319
1320 t4_free_mem(data);
1321 if (ret)
1322 return -EFAULT;
1323
1324 *ppos = pos + count;
1325 return count;
1326}
fd88b31a
HS
1327static const struct file_operations mem_debugfs_fops = {
1328 .owner = THIS_MODULE,
1329 .open = simple_open,
1330 .read = mem_read,
1331 .llseek = default_llseek,
1332};
1333
49216c1c
HS
1334static void set_debugfs_file_size(struct dentry *de, loff_t size)
1335{
1336 if (!IS_ERR(de) && de->d_inode)
1337 de->d_inode->i_size = size;
1338}
1339
fd88b31a
HS
1340static void add_debugfs_mem(struct adapter *adap, const char *name,
1341 unsigned int idx, unsigned int size_mb)
1342{
1343 struct dentry *de;
1344
1345 de = debugfs_create_file(name, S_IRUSR, adap->debugfs_root,
1346 (void *)adap + idx, &mem_debugfs_fops);
1347 if (de && de->d_inode)
1348 de->d_inode->i_size = size_mb << 20;
1349}
1350
1351/* Add an array of Debug FS files.
1352 */
1353void add_debugfs_files(struct adapter *adap,
1354 struct t4_debugfs_entry *files,
1355 unsigned int nfiles)
1356{
1357 int i;
1358
1359 /* debugfs support is best effort */
1360 for (i = 0; i < nfiles; i++)
1361 debugfs_create_file(files[i].name, files[i].mode,
1362 adap->debugfs_root,
1363 (void *)adap + files[i].data,
1364 files[i].ops);
1365}
1366
1367int t4_setup_debugfs(struct adapter *adap)
1368{
1369 int i;
1370 u32 size;
49216c1c 1371 struct dentry *de;
fd88b31a
HS
1372
1373 static struct t4_debugfs_entry t4_debugfs_files[] = {
f1ff24aa 1374 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
74b3092c 1375 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
49aa284f 1376 { "devlog", &devlog_fops, S_IRUSR, 0 },
fd88b31a 1377 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
ef82f662 1378 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
688ea5fe
HS
1379 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
1380 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
1381 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
1382 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
1383 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
dc9daab2 1384 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
e5f0e43b
HS
1385 { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
1386 { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
1387 { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
1388 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
1389 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
1390 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
b5a02f50
AB
1391#if IS_ENABLED(CONFIG_IPV6)
1392 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
1393#endif
fd88b31a
HS
1394 };
1395
1396 add_debugfs_files(adap,
1397 t4_debugfs_files,
1398 ARRAY_SIZE(t4_debugfs_files));
1399
6559a7e8
HS
1400 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
1401 if (i & EDRAM0_ENABLE_F) {
1402 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
1403 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
fd88b31a 1404 }
6559a7e8
HS
1405 if (i & EDRAM1_ENABLE_F) {
1406 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
1407 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
fd88b31a
HS
1408 }
1409 if (is_t4(adap->params.chip)) {
6559a7e8
HS
1410 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
1411 if (i & EXT_MEM_ENABLE_F)
fd88b31a 1412 add_debugfs_mem(adap, "mc", MEM_MC,
6559a7e8 1413 EXT_MEM_SIZE_G(size));
fd88b31a 1414 } else {
6559a7e8
HS
1415 if (i & EXT_MEM0_ENABLE_F) {
1416 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
fd88b31a 1417 add_debugfs_mem(adap, "mc0", MEM_MC0,
6559a7e8 1418 EXT_MEM0_SIZE_G(size));
fd88b31a 1419 }
6559a7e8
HS
1420 if (i & EXT_MEM1_ENABLE_F) {
1421 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
fd88b31a 1422 add_debugfs_mem(adap, "mc1", MEM_MC1,
6559a7e8 1423 EXT_MEM1_SIZE_G(size));
fd88b31a
HS
1424 }
1425 }
49216c1c
HS
1426
1427 de = debugfs_create_file("flash", S_IRUSR, adap->debugfs_root, adap,
1428 &flash_debugfs_fops);
1429 set_debugfs_file_size(de, adap->params.sf_size);
1430
fd88b31a
HS
1431 return 0;
1432}