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net/mlx5e: Ethtool link speed setting fixes
[thirdparty/kernel/stable.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
CommitLineData
f62b8bb8
AV		 1/*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include "en.h"
34
35static void mlx5e_get_drvinfo(struct net_device *dev,
36 struct ethtool_drvinfo *drvinfo)
37{
38 struct mlx5e_priv *priv = netdev_priv(dev);
39 struct mlx5_core_dev *mdev = priv->mdev;
40
41 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42 strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43 sizeof(drvinfo->version));
44 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45 "%d.%d.%d",
46 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
49}
50
51static const struct {
52 u32 supported;
53 u32 advertised;
54 u32 speed;
55} ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56 [MLX5E_1000BASE_CX_SGMII] = {
57 .supported = SUPPORTED_1000baseKX_Full,
58 .advertised = ADVERTISED_1000baseKX_Full,
59 .speed = 1000,
60 },
61 [MLX5E_1000BASE_KX] = {
62 .supported = SUPPORTED_1000baseKX_Full,
63 .advertised = ADVERTISED_1000baseKX_Full,
64 .speed = 1000,
65 },
66 [MLX5E_10GBASE_CX4] = {
67 .supported = SUPPORTED_10000baseKX4_Full,
68 .advertised = ADVERTISED_10000baseKX4_Full,
69 .speed = 10000,
70 },
71 [MLX5E_10GBASE_KX4] = {
72 .supported = SUPPORTED_10000baseKX4_Full,
73 .advertised = ADVERTISED_10000baseKX4_Full,
74 .speed = 10000,
75 },
76 [MLX5E_10GBASE_KR] = {
77 .supported = SUPPORTED_10000baseKR_Full,
78 .advertised = ADVERTISED_10000baseKR_Full,
79 .speed = 10000,
80 },
81 [MLX5E_20GBASE_KR2] = {
82 .supported = SUPPORTED_20000baseKR2_Full,
83 .advertised = ADVERTISED_20000baseKR2_Full,
84 .speed = 20000,
85 },
86 [MLX5E_40GBASE_CR4] = {
87 .supported = SUPPORTED_40000baseCR4_Full,
88 .advertised = ADVERTISED_40000baseCR4_Full,
89 .speed = 40000,
90 },
91 [MLX5E_40GBASE_KR4] = {
92 .supported = SUPPORTED_40000baseKR4_Full,
93 .advertised = ADVERTISED_40000baseKR4_Full,
94 .speed = 40000,
95 },
96 [MLX5E_56GBASE_R4] = {
97 .supported = SUPPORTED_56000baseKR4_Full,
98 .advertised = ADVERTISED_56000baseKR4_Full,
99 .speed = 56000,
100 },
101 [MLX5E_10GBASE_CR] = {
102 .supported = SUPPORTED_10000baseKR_Full,
103 .advertised = ADVERTISED_10000baseKR_Full,
104 .speed = 10000,
105 },
106 [MLX5E_10GBASE_SR] = {
107 .supported = SUPPORTED_10000baseKR_Full,
108 .advertised = ADVERTISED_10000baseKR_Full,
109 .speed = 10000,
110 },
111 [MLX5E_10GBASE_ER] = {
112 .supported = SUPPORTED_10000baseKR_Full,
113 .advertised = ADVERTISED_10000baseKR_Full,
114 .speed = 10000,
115 },
116 [MLX5E_40GBASE_SR4] = {
117 .supported = SUPPORTED_40000baseSR4_Full,
118 .advertised = ADVERTISED_40000baseSR4_Full,
119 .speed = 40000,
120 },
121 [MLX5E_40GBASE_LR4] = {
122 .supported = SUPPORTED_40000baseLR4_Full,
123 .advertised = ADVERTISED_40000baseLR4_Full,
124 .speed = 40000,
125 },
126 [MLX5E_100GBASE_CR4] = {
127 .speed = 100000,
128 },
129 [MLX5E_100GBASE_SR4] = {
130 .speed = 100000,
131 },
132 [MLX5E_100GBASE_KR4] = {
133 .speed = 100000,
134 },
135 [MLX5E_100GBASE_LR4] = {
136 .speed = 100000,
137 },
138 [MLX5E_100BASE_TX] = {
139 .speed = 100,
140 },
141 [MLX5E_100BASE_T] = {
142 .supported = SUPPORTED_100baseT_Full,
143 .advertised = ADVERTISED_100baseT_Full,
144 .speed = 100,
145 },
146 [MLX5E_10GBASE_T] = {
147 .supported = SUPPORTED_10000baseT_Full,
148 .advertised = ADVERTISED_10000baseT_Full,
149 .speed = 1000,
150 },
151 [MLX5E_25GBASE_CR] = {
152 .speed = 25000,
153 },
154 [MLX5E_25GBASE_KR] = {
155 .speed = 25000,
156 },
157 [MLX5E_25GBASE_SR] = {
158 .speed = 25000,
159 },
160 [MLX5E_50GBASE_CR2] = {
161 .speed = 50000,
162 },
163 [MLX5E_50GBASE_KR2] = {
164 .speed = 50000,
165 },
166};
167
168static int mlx5e_get_sset_count(struct net_device *dev, int sset)
169{
170 struct mlx5e_priv *priv = netdev_priv(dev);
171
172 switch (sset) {
173 case ETH_SS_STATS:
efea389d 174 return NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
f62b8bb8 175 priv->params.num_channels * NUM_RQ_STATS +
a4418a6c 176 priv->params.num_channels * priv->params.num_tc *
f62b8bb8
AV		 177 NUM_SQ_STATS;
178 /* fallthrough */
179 default:
180 return -EOPNOTSUPP;
181 }
182}
183
184static void mlx5e_get_strings(struct net_device *dev,
185 uint32_t stringset, uint8_t *data)
186{
187 int i, j, tc, idx = 0;
188 struct mlx5e_priv *priv = netdev_priv(dev);
189
190 switch (stringset) {
191 case ETH_SS_PRIV_FLAGS:
192 break;
193
194 case ETH_SS_TEST:
195 break;
196
197 case ETH_SS_STATS:
198 /* VPORT counters */
199 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200 strcpy(data + (idx++) * ETH_GSTRING_LEN,
201 vport_strings[i]);
202
efea389d
GP		 203 /* PPORT counters */
204 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
205 strcpy(data + (idx++) * ETH_GSTRING_LEN,
206 pport_strings[i]);
207
f62b8bb8
AV		 208 /* per channel counters */
209 for (i = 0; i < priv->params.num_channels; i++)
210 for (j = 0; j < NUM_RQ_STATS; j++)
211 sprintf(data + (idx++) * ETH_GSTRING_LEN,
212 "rx%d_%s", i, rq_stats_strings[j]);
213
214 for (i = 0; i < priv->params.num_channels; i++)
a4418a6c 215 for (tc = 0; tc < priv->params.num_tc; tc++)
f62b8bb8
AV		 216 for (j = 0; j < NUM_SQ_STATS; j++)
217 sprintf(data +
218 (idx++) * ETH_GSTRING_LEN,
219 "tx%d_%d_%s", i, tc,
220 sq_stats_strings[j]);
221 break;
222 }
223}
224
225static void mlx5e_get_ethtool_stats(struct net_device *dev,
226 struct ethtool_stats *stats, u64 *data)
227{
228 struct mlx5e_priv *priv = netdev_priv(dev);
229 int i, j, tc, idx = 0;
230
231 if (!data)
232 return;
233
234 mutex_lock(&priv->state_lock);
235 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
236 mlx5e_update_stats(priv);
237 mutex_unlock(&priv->state_lock);
238
239 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
240 data[idx++] = ((u64 *)&priv->stats.vport)[i];
241
efea389d
GP		 242 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
243 data[idx++] = be64_to_cpu(((__be64 *)&priv->stats.pport)[i]);
244
f62b8bb8
AV		 245 /* per channel counters */
246 for (i = 0; i < priv->params.num_channels; i++)
247 for (j = 0; j < NUM_RQ_STATS; j++)
248 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
249 &priv->state) ? 0 :
250 ((u64 *)&priv->channel[i]->rq.stats)[j];
251
252 for (i = 0; i < priv->params.num_channels; i++)
a4418a6c 253 for (tc = 0; tc < priv->params.num_tc; tc++)
f62b8bb8
AV		 254 for (j = 0; j < NUM_SQ_STATS; j++)
255 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
256 &priv->state) ? 0 :
257 ((u64 *)&priv->channel[i]->sq[tc].stats)[j];
258}
259
260static void mlx5e_get_ringparam(struct net_device *dev,
261 struct ethtool_ringparam *param)
262{
263 struct mlx5e_priv *priv = netdev_priv(dev);
264
265 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
266 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
267 param->rx_pending = 1 << priv->params.log_rq_size;
268 param->tx_pending = 1 << priv->params.log_sq_size;
269}
270
271static int mlx5e_set_ringparam(struct net_device *dev,
272 struct ethtool_ringparam *param)
273{
274 struct mlx5e_priv *priv = netdev_priv(dev);
98e81b0a 275 bool was_opened;
f62b8bb8
AV		 276 u16 min_rx_wqes;
277 u8 log_rq_size;
278 u8 log_sq_size;
279 int err = 0;
280
281 if (param->rx_jumbo_pending) {
282 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
283 __func__);
284 return -EINVAL;
285 }
286 if (param->rx_mini_pending) {
287 netdev_info(dev, "%s: rx_mini_pending not supported\n",
288 __func__);
289 return -EINVAL;
290 }
291 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
292 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
293 __func__, param->rx_pending,
294 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
295 return -EINVAL;
296 }
297 if (param->rx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE)) {
298 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
299 __func__, param->rx_pending,
300 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE);
301 return -EINVAL;
302 }
303 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
304 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
305 __func__, param->tx_pending,
306 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
307 return -EINVAL;
308 }
309 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
310 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
311 __func__, param->tx_pending,
312 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
313 return -EINVAL;
314 }
315
316 log_rq_size = order_base_2(param->rx_pending);
317 log_sq_size = order_base_2(param->tx_pending);
318 min_rx_wqes = min_t(u16, param->rx_pending - 1,
319 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
320
321 if (log_rq_size == priv->params.log_rq_size &&
322 log_sq_size == priv->params.log_sq_size &&
323 min_rx_wqes == priv->params.min_rx_wqes)
324 return 0;
325
326 mutex_lock(&priv->state_lock);
98e81b0a
AS		 327
328 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
329 if (was_opened)
330 mlx5e_close_locked(dev);
331
332 priv->params.log_rq_size = log_rq_size;
333 priv->params.log_sq_size = log_sq_size;
334 priv->params.min_rx_wqes = min_rx_wqes;
335
336 if (was_opened)
337 err = mlx5e_open_locked(dev);
338
f62b8bb8
AV		 339 mutex_unlock(&priv->state_lock);
340
341 return err;
342}
343
344static void mlx5e_get_channels(struct net_device *dev,
345 struct ethtool_channels *ch)
346{
347 struct mlx5e_priv *priv = netdev_priv(dev);
348 int ncv = priv->mdev->priv.eq_table.num_comp_vectors;
349
350 ch->max_combined = ncv;
351 ch->combined_count = priv->params.num_channels;
352}
353
354static int mlx5e_set_channels(struct net_device *dev,
355 struct ethtool_channels *ch)
356{
357 struct mlx5e_priv *priv = netdev_priv(dev);
358 int ncv = priv->mdev->priv.eq_table.num_comp_vectors;
359 unsigned int count = ch->combined_count;
98e81b0a 360 bool was_opened;
f62b8bb8
AV		 361 int err = 0;
362
363 if (!count) {
364 netdev_info(dev, "%s: combined_count=0 not supported\n",
365 __func__);
366 return -EINVAL;
367 }
368 if (ch->rx_count || ch->tx_count) {
369 netdev_info(dev, "%s: separate rx/tx count not supported\n",
370 __func__);
371 return -EINVAL;
372 }
373 if (count > ncv) {
374 netdev_info(dev, "%s: count (%d) > max (%d)\n",
375 __func__, count, ncv);
376 return -EINVAL;
377 }
378
379 if (priv->params.num_channels == count)
380 return 0;
381
382 mutex_lock(&priv->state_lock);
98e81b0a
AS		 383
384 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
385 if (was_opened)
386 mlx5e_close_locked(dev);
387
388 priv->params.num_channels = count;
389
390 if (was_opened)
391 err = mlx5e_open_locked(dev);
392
f62b8bb8
AV		 393 mutex_unlock(&priv->state_lock);
394
395 return err;
396}
397
398static int mlx5e_get_coalesce(struct net_device *netdev,
399 struct ethtool_coalesce *coal)
400{
401 struct mlx5e_priv *priv = netdev_priv(netdev);
402
403 coal->rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
404 coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation_pkts;
405 coal->tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
406 coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation_pkts;
407
408 return 0;
409}
410
411static int mlx5e_set_coalesce(struct net_device *netdev,
412 struct ethtool_coalesce *coal)
413{
414 struct mlx5e_priv *priv = netdev_priv(netdev);
415 struct mlx5_core_dev *mdev = priv->mdev;
416 struct mlx5e_channel *c;
417 int tc;
418 int i;
419
420 priv->params.tx_cq_moderation_usec = coal->tx_coalesce_usecs;
421 priv->params.tx_cq_moderation_pkts = coal->tx_max_coalesced_frames;
422 priv->params.rx_cq_moderation_usec = coal->rx_coalesce_usecs;
423 priv->params.rx_cq_moderation_pkts = coal->rx_max_coalesced_frames;
424
425 for (i = 0; i < priv->params.num_channels; ++i) {
426 c = priv->channel[i];
427
428 for (tc = 0; tc < c->num_tc; tc++) {
429 mlx5_core_modify_cq_moderation(mdev,
430 &c->sq[tc].cq.mcq,
431 coal->tx_coalesce_usecs,
432 coal->tx_max_coalesced_frames);
433 }
434
435 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
436 coal->rx_coalesce_usecs,
437 coal->rx_max_coalesced_frames);
438 }
439
440 return 0;
441}
442
443static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
444{
445 int i;
446 u32 supported_modes = 0;
447
448 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
449 if (eth_proto_cap & MLX5E_PROT_MASK(i))
450 supported_modes |= ptys2ethtool_table[i].supported;
451 }
452 return supported_modes;
453}
454
455static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
456{
457 int i;
458 u32 advertising_modes = 0;
459
460 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
461 if (eth_proto_cap & MLX5E_PROT_MASK(i))
462 advertising_modes |= ptys2ethtool_table[i].advertised;
463 }
464 return advertising_modes;
465}
466
467static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
468{
469 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
470 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
471 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
472 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
473 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
474 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
475 return SUPPORTED_FIBRE;
476 }
477
478 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
479 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
480 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
481 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
482 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
483 return SUPPORTED_Backplane;
484 }
485 return 0;
486}
487
488static void get_speed_duplex(struct net_device *netdev,
489 u32 eth_proto_oper,
490 struct ethtool_cmd *cmd)
491{
492 int i;
493 u32 speed = SPEED_UNKNOWN;
494 u8 duplex = DUPLEX_UNKNOWN;
495
496 if (!netif_carrier_ok(netdev))
497 goto out;
498
499 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
500 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
501 speed = ptys2ethtool_table[i].speed;
502 duplex = DUPLEX_FULL;
503 break;
504 }
505 }
506out:
507 ethtool_cmd_speed_set(cmd, speed);
508 cmd->duplex = duplex;
509}
510
511static void get_supported(u32 eth_proto_cap, u32 *supported)
512{
513 *supported |= ptys2ethtool_supported_port(eth_proto_cap);
514 *supported |= ptys2ethtool_supported_link(eth_proto_cap);
515 *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
516}
517
518static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
519 u8 rx_pause, u32 *advertising)
520{
521 *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
522 *advertising |= tx_pause ? ADVERTISED_Pause : 0;
523 *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
524}
525
526static u8 get_connector_port(u32 eth_proto)
527{
528 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
529 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
530 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
531 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
532 return PORT_FIBRE;
533 }
534
535 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
536 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
537 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
538 return PORT_DA;
539 }
540
541 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
542 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
543 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
544 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
545 return PORT_NONE;
546 }
547
548 return PORT_OTHER;
549}
550
551static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
552{
553 *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
554}
555
556static int mlx5e_get_settings(struct net_device *netdev,
557 struct ethtool_cmd *cmd)
558{
559 struct mlx5e_priv *priv = netdev_priv(netdev);
560 struct mlx5_core_dev *mdev = priv->mdev;
561 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
562 u32 eth_proto_cap;
563 u32 eth_proto_admin;
564 u32 eth_proto_lp;
565 u32 eth_proto_oper;
566 int err;
567
a05bdefa 568 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
f62b8bb8
AV		 569
570 if (err) {
571 netdev_err(netdev, "%s: query port ptys failed: %d\n",
572 __func__, err);
573 goto err_query_ptys;
574 }
575
576 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
577 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
578 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
579 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
580
581 cmd->supported = 0;
582 cmd->advertising = 0;
583
584 get_supported(eth_proto_cap, &cmd->supported);
585 get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
586 get_speed_duplex(netdev, eth_proto_oper, cmd);
587
588 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
589
590 cmd->port = get_connector_port(eth_proto_oper);
591 get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
592
593 cmd->transceiver = XCVR_INTERNAL;
594
595err_query_ptys:
596 return err;
597}
598
599static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
600{
601 u32 i, ptys_modes = 0;
602
603 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
604 if (ptys2ethtool_table[i].advertised & link_modes)
605 ptys_modes |= MLX5E_PROT_MASK(i);
606 }
607
608 return ptys_modes;
609}
610
611static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
612{
613 u32 i, speed_links = 0;
614
615 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
616 if (ptys2ethtool_table[i].speed == speed)
617 speed_links |= MLX5E_PROT_MASK(i);
618 }
619
620 return speed_links;
621}
622
623static int mlx5e_set_settings(struct net_device *netdev,
624 struct ethtool_cmd *cmd)
625{
626 struct mlx5e_priv *priv = netdev_priv(netdev);
627 struct mlx5_core_dev *mdev = priv->mdev;
628 u32 link_modes;
629 u32 speed;
630 u32 eth_proto_cap, eth_proto_admin;
6fa1bcab 631 enum mlx5_port_status ps;
f62b8bb8
AV		 632 int err;
633
634 speed = ethtool_cmd_speed(cmd);
635
636 link_modes = cmd->autoneg == AUTONEG_ENABLE ?
637 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
638 mlx5e_ethtool2ptys_speed_link(speed);
639
640 err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
641 if (err) {
642 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
643 __func__, err);
644 goto out;
645 }
646
647 link_modes = link_modes & eth_proto_cap;
648 if (!link_modes) {
649 netdev_err(netdev, "%s: Not supported link mode(s) requested",
650 __func__);
651 err = -EINVAL;
652 goto out;
653 }
654
655 err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
656 if (err) {
657 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
658 __func__, err);
659 goto out;
660 }
661
662 if (link_modes == eth_proto_admin)
663 goto out;
664
6fa1bcab
AS		 665 mlx5_query_port_admin_status(mdev, &ps);
666 if (ps == MLX5_PORT_UP)
667 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
668 mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
669 if (ps == MLX5_PORT_UP)
670 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
f62b8bb8 671
f62b8bb8
AV		 672out:
673 return err;
674}
675
2d75b2bc
AS		 676static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
677{
678 struct mlx5e_priv *priv = netdev_priv(netdev);
679
680 return sizeof(priv->params.toeplitz_hash_key);
681}
682
683static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
684{
685 return MLX5E_INDIR_RQT_SIZE;
686}
687
2be6967c
SM		 688static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
689 u8 *hfunc)
690{
691 struct mlx5e_priv *priv = netdev_priv(netdev);
692
2d75b2bc
AS		 693 if (indir)
694 memcpy(indir, priv->params.indirection_rqt,
695 sizeof(priv->params.indirection_rqt));
696
697 if (key)
698 memcpy(key, priv->params.toeplitz_hash_key,
699 sizeof(priv->params.toeplitz_hash_key));
700
2be6967c
SM		 701 if (hfunc)
702 *hfunc = priv->params.rss_hfunc;
703
704 return 0;
705}
706
98e81b0a 707static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
2be6967c
SM		 708 const u8 *key, const u8 hfunc)
709{
98e81b0a 710 struct mlx5e_priv *priv = netdev_priv(dev);
2d75b2bc 711 bool close_open;
2be6967c
SM		 712 int err = 0;
713
2d75b2bc
AS		 714 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
715 (hfunc != ETH_RSS_HASH_XOR) &&
2be6967c
SM		 716 (hfunc != ETH_RSS_HASH_TOP))
717 return -EINVAL;
718
719 mutex_lock(&priv->state_lock);
720
2d75b2bc
AS		 721 if (indir) {
722 memcpy(priv->params.indirection_rqt, indir,
723 sizeof(priv->params.indirection_rqt));
724 mlx5e_redirect_rqt(priv, MLX5E_INDIRECTION_RQT);
2be6967c
SM		 725 }
726
2d75b2bc
AS		 727 close_open = (key || (hfunc != ETH_RSS_HASH_NO_CHANGE)) &&
728 test_bit(MLX5E_STATE_OPENED, &priv->state);
729 if (close_open)
730 mlx5e_close_locked(dev);
731
732 if (key)
733 memcpy(priv->params.toeplitz_hash_key, key,
734 sizeof(priv->params.toeplitz_hash_key));
735
736 if (hfunc != ETH_RSS_HASH_NO_CHANGE)
737 priv->params.rss_hfunc = hfunc;
738
739 if (close_open)
740 err = mlx5e_open_locked(priv->netdev);
741
2be6967c
SM		 742 mutex_unlock(&priv->state_lock);
743
744 return err;
745}
746
2d75b2bc
AS		 747static int mlx5e_get_rxnfc(struct net_device *netdev,
748 struct ethtool_rxnfc *info, u32 *rule_locs)
749{
750 struct mlx5e_priv *priv = netdev_priv(netdev);
751 int err = 0;
752
753 switch (info->cmd) {
754 case ETHTOOL_GRXRINGS:
755 info->data = priv->params.num_channels;
756 break;
757 default:
758 err = -EOPNOTSUPP;
759 break;
760 }
761
762 return err;
763}
764
58d52291
AS		 765static int mlx5e_get_tunable(struct net_device *dev,
766 const struct ethtool_tunable *tuna,
767 void *data)
768{
769 const struct mlx5e_priv *priv = netdev_priv(dev);
770 int err = 0;
771
772 switch (tuna->id) {
773 case ETHTOOL_TX_COPYBREAK:
774 *(u32 *)data = priv->params.tx_max_inline;
775 break;
776 default:
777 err = -EINVAL;
778 break;
779 }
780
781 return err;
782}
783
784static int mlx5e_set_tunable(struct net_device *dev,
785 const struct ethtool_tunable *tuna,
786 const void *data)
787{
788 struct mlx5e_priv *priv = netdev_priv(dev);
789 struct mlx5_core_dev *mdev = priv->mdev;
98e81b0a 790 bool was_opened;
58d52291
AS		 791 u32 val;
792 int err = 0;
793
794 switch (tuna->id) {
795 case ETHTOOL_TX_COPYBREAK:
796 val = *(u32 *)data;
797 if (val > mlx5e_get_max_inline_cap(mdev)) {
798 err = -EINVAL;
799 break;
800 }
801
802 mutex_lock(&priv->state_lock);
98e81b0a
AS		 803
804 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
805 if (was_opened)
806 mlx5e_close_locked(dev);
807
808 priv->params.tx_max_inline = val;
809
810 if (was_opened)
811 err = mlx5e_open_locked(dev);
812
58d52291
AS		 813 mutex_unlock(&priv->state_lock);
814 break;
815 default:
816 err = -EINVAL;
817 break;
818 }
819
820 return err;
821}
822
f62b8bb8
AV		 823const struct ethtool_ops mlx5e_ethtool_ops = {
824 .get_drvinfo = mlx5e_get_drvinfo,
825 .get_link = ethtool_op_get_link,
826 .get_strings = mlx5e_get_strings,
827 .get_sset_count = mlx5e_get_sset_count,
828 .get_ethtool_stats = mlx5e_get_ethtool_stats,
829 .get_ringparam = mlx5e_get_ringparam,
830 .set_ringparam = mlx5e_set_ringparam,
831 .get_channels = mlx5e_get_channels,
832 .set_channels = mlx5e_set_channels,
833 .get_coalesce = mlx5e_get_coalesce,
834 .set_coalesce = mlx5e_set_coalesce,
835 .get_settings = mlx5e_get_settings,
836 .set_settings = mlx5e_set_settings,
2d75b2bc
AS		 837 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
838 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2be6967c
SM		 839 .get_rxfh = mlx5e_get_rxfh,
840 .set_rxfh = mlx5e_set_rxfh,
2d75b2bc 841 .get_rxnfc = mlx5e_get_rxnfc,
58d52291
AS		 842 .get_tunable = mlx5e_get_tunable,
843 .set_tunable = mlx5e_set_tunable,
f62b8bb8 844};
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git