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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3396c782 | 2 | /* drivers/net/ethernet/micrel/ks8851.c |
3ba81f3e BD |
3 | * |
4 | * Copyright 2009 Simtec Electronics | |
5 | * http://www.simtec.co.uk/ | |
6 | * Ben Dooks <ben@simtec.co.uk> | |
3ba81f3e BD |
7 | */ |
8 | ||
0dc7d2b3 JP |
9 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
10 | ||
a6b7a407 | 11 | #include <linux/interrupt.h> |
3ba81f3e BD |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/netdevice.h> | |
15 | #include <linux/etherdevice.h> | |
16 | #include <linux/ethtool.h> | |
17 | #include <linux/cache.h> | |
18 | #include <linux/crc32.h> | |
19 | #include <linux/mii.h> | |
7b77bb5c | 20 | #include <linux/gpio/consumer.h> |
ebf4ad95 | 21 | #include <linux/regulator/consumer.h> |
3ba81f3e | 22 | |
ef363122 | 23 | #include <linux/of_mdio.h> |
566bd54b | 24 | #include <linux/of_net.h> |
3ba81f3e BD |
25 | |
26 | #include "ks8851.h" | |
27 | ||
7a552c85 MV |
28 | /** |
29 | * ks8851_lock - register access lock | |
30 | * @ks: The chip state | |
31 | * @flags: Spinlock flags | |
32 | * | |
33 | * Claim chip register access lock | |
34 | */ | |
35 | static void ks8851_lock(struct ks8851_net *ks, unsigned long *flags) | |
36 | { | |
37 | ks->lock(ks, flags); | |
38 | } | |
39 | ||
40 | /** | |
41 | * ks8851_unlock - register access unlock | |
42 | * @ks: The chip state | |
43 | * @flags: Spinlock flags | |
44 | * | |
45 | * Release chip register access lock | |
46 | */ | |
47 | static void ks8851_unlock(struct ks8851_net *ks, unsigned long *flags) | |
48 | { | |
49 | ks->unlock(ks, flags); | |
50 | } | |
51 | ||
7a552c85 MV |
52 | /** |
53 | * ks8851_wrreg16 - write 16bit register value to chip | |
54 | * @ks: The chip state | |
55 | * @reg: The register address | |
56 | * @val: The value to write | |
57 | * | |
58 | * Issue a write to put the value @val into the register specified in @reg. | |
59 | */ | |
60 | static void ks8851_wrreg16(struct ks8851_net *ks, unsigned int reg, | |
61 | unsigned int val) | |
62 | { | |
63 | ks->wrreg16(ks, reg, val); | |
64 | } | |
65 | ||
7a552c85 MV |
66 | /** |
67 | * ks8851_rdreg16 - read 16 bit register from device | |
68 | * @ks: The chip information | |
69 | * @reg: The register address | |
70 | * | |
71 | * Read a 16bit register from the chip, returning the result | |
72 | */ | |
73 | static unsigned int ks8851_rdreg16(struct ks8851_net *ks, | |
74 | unsigned int reg) | |
75 | { | |
76 | return ks->rdreg16(ks, reg); | |
77 | } | |
78 | ||
3ba81f3e BD |
79 | /** |
80 | * ks8851_soft_reset - issue one of the soft reset to the device | |
81 | * @ks: The device state. | |
82 | * @op: The bit(s) to set in the GRR | |
83 | * | |
84 | * Issue the relevant soft-reset command to the device's GRR register | |
85 | * specified by @op. | |
86 | * | |
87 | * Note, the delays are in there as a caution to ensure that the reset | |
88 | * has time to take effect and then complete. Since the datasheet does | |
89 | * not currently specify the exact sequence, we have chosen something | |
90 | * that seems to work with our device. | |
91 | */ | |
92 | static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op) | |
93 | { | |
94 | ks8851_wrreg16(ks, KS_GRR, op); | |
95 | mdelay(1); /* wait a short time to effect reset */ | |
96 | ks8851_wrreg16(ks, KS_GRR, 0); | |
97 | mdelay(1); /* wait for condition to clear */ | |
98 | } | |
99 | ||
32f160d9 TH |
100 | /** |
101 | * ks8851_set_powermode - set power mode of the device | |
102 | * @ks: The device state | |
103 | * @pwrmode: The power mode value to write to KS_PMECR. | |
104 | * | |
105 | * Change the power mode of the chip. | |
106 | */ | |
107 | static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode) | |
108 | { | |
109 | unsigned pmecr; | |
110 | ||
111 | netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode); | |
112 | ||
113 | pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
114 | pmecr &= ~PMECR_PM_MASK; | |
115 | pmecr |= pwrmode; | |
116 | ||
117 | ks8851_wrreg16(ks, KS_PMECR, pmecr); | |
118 | } | |
119 | ||
3ba81f3e BD |
120 | /** |
121 | * ks8851_write_mac_addr - write mac address to device registers | |
122 | * @dev: The network device | |
123 | * | |
124 | * Update the KS8851 MAC address registers from the address in @dev. | |
125 | * | |
126 | * This call assumes that the chip is not running, so there is no need to | |
127 | * shutdown the RXQ process whilst setting this. | |
128 | */ | |
129 | static int ks8851_write_mac_addr(struct net_device *dev) | |
130 | { | |
131 | struct ks8851_net *ks = netdev_priv(dev); | |
22726020 | 132 | unsigned long flags; |
88cfedd0 | 133 | u16 val; |
160d0fad | 134 | int i; |
3ba81f3e | 135 | |
22726020 | 136 | ks8851_lock(ks, &flags); |
3ba81f3e | 137 | |
32f160d9 TH |
138 | /* |
139 | * Wake up chip in case it was powered off when stopped; otherwise, | |
140 | * the first write to the MAC address does not take effect. | |
141 | */ | |
142 | ks8851_set_powermode(ks, PMECR_PM_NORMAL); | |
88cfedd0 MV |
143 | |
144 | for (i = 0; i < ETH_ALEN; i += 2) { | |
145 | val = (dev->dev_addr[i] << 8) | dev->dev_addr[i + 1]; | |
146 | ks8851_wrreg16(ks, KS_MAR(i), val); | |
147 | } | |
148 | ||
32f160d9 TH |
149 | if (!netif_running(dev)) |
150 | ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); | |
3ba81f3e | 151 | |
22726020 | 152 | ks8851_unlock(ks, &flags); |
3ba81f3e BD |
153 | |
154 | return 0; | |
155 | } | |
156 | ||
a9a8de21 BD |
157 | /** |
158 | * ks8851_read_mac_addr - read mac address from device registers | |
159 | * @dev: The network device | |
160 | * | |
161 | * Update our copy of the KS8851 MAC address from the registers of @dev. | |
162 | */ | |
163 | static void ks8851_read_mac_addr(struct net_device *dev) | |
164 | { | |
165 | struct ks8851_net *ks = netdev_priv(dev); | |
22726020 | 166 | unsigned long flags; |
4abd7cff | 167 | u8 addr[ETH_ALEN]; |
88cfedd0 | 168 | u16 reg; |
a9a8de21 BD |
169 | int i; |
170 | ||
22726020 | 171 | ks8851_lock(ks, &flags); |
a9a8de21 | 172 | |
88cfedd0 MV |
173 | for (i = 0; i < ETH_ALEN; i += 2) { |
174 | reg = ks8851_rdreg16(ks, KS_MAR(i)); | |
4abd7cff JK |
175 | addr[i] = reg >> 8; |
176 | addr[i + 1] = reg & 0xff; | |
88cfedd0 | 177 | } |
4abd7cff | 178 | eth_hw_addr_set(dev, addr); |
a9a8de21 | 179 | |
22726020 | 180 | ks8851_unlock(ks, &flags); |
a9a8de21 BD |
181 | } |
182 | ||
3ba81f3e BD |
183 | /** |
184 | * ks8851_init_mac - initialise the mac address | |
185 | * @ks: The device structure | |
848fc0ce | 186 | * @np: The device node pointer |
3ba81f3e BD |
187 | * |
188 | * Get or create the initial mac address for the device and then set that | |
566bd54b LW |
189 | * into the station address register. A mac address supplied in the device |
190 | * tree takes precedence. Otherwise, if there is an EEPROM present, then | |
7efd26d0 | 191 | * we try that. If no valid mac address is found we use eth_random_addr() |
3ba81f3e | 192 | * to create a new one. |
3ba81f3e | 193 | */ |
848fc0ce | 194 | static void ks8851_init_mac(struct ks8851_net *ks, struct device_node *np) |
3ba81f3e BD |
195 | { |
196 | struct net_device *dev = ks->netdev; | |
83216e39 | 197 | int ret; |
566bd54b | 198 | |
9ca01b25 | 199 | ret = of_get_ethdev_address(np, dev); |
83216e39 | 200 | if (!ret) { |
566bd54b LW |
201 | ks8851_write_mac_addr(dev); |
202 | return; | |
203 | } | |
3ba81f3e | 204 | |
a9a8de21 BD |
205 | if (ks->rc_ccr & CCR_EEPROM) { |
206 | ks8851_read_mac_addr(dev); | |
207 | if (is_valid_ether_addr(dev->dev_addr)) | |
208 | return; | |
209 | ||
210 | netdev_err(ks->netdev, "invalid mac address read %pM\n", | |
211 | dev->dev_addr); | |
212 | } | |
213 | ||
7ce5d222 | 214 | eth_hw_addr_random(dev); |
3ba81f3e BD |
215 | ks8851_write_mac_addr(dev); |
216 | } | |
217 | ||
3ba81f3e BD |
218 | /** |
219 | * ks8851_dbg_dumpkkt - dump initial packet contents to debug | |
220 | * @ks: The device state | |
221 | * @rxpkt: The data for the received packet | |
222 | * | |
223 | * Dump the initial data from the packet to dev_dbg(). | |
b07f987a | 224 | */ |
3ba81f3e BD |
225 | static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt) |
226 | { | |
0dc7d2b3 JP |
227 | netdev_dbg(ks->netdev, |
228 | "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n", | |
229 | rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7], | |
230 | rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11], | |
231 | rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]); | |
3ba81f3e BD |
232 | } |
233 | ||
7a552c85 MV |
234 | /** |
235 | * ks8851_rx_skb - receive skbuff | |
b07f987a | 236 | * @ks: The device state. |
7a552c85 MV |
237 | * @skb: The skbuff |
238 | */ | |
239 | static void ks8851_rx_skb(struct ks8851_net *ks, struct sk_buff *skb) | |
240 | { | |
241 | ks->rx_skb(ks, skb); | |
242 | } | |
243 | ||
3ba81f3e BD |
244 | /** |
245 | * ks8851_rx_pkts - receive packets from the host | |
246 | * @ks: The device information. | |
247 | * | |
248 | * This is called from the IRQ work queue when the system detects that there | |
249 | * are packets in the receive queue. Find out how many packets there are and | |
250 | * read them from the FIFO. | |
251 | */ | |
252 | static void ks8851_rx_pkts(struct ks8851_net *ks) | |
253 | { | |
254 | struct sk_buff *skb; | |
255 | unsigned rxfc; | |
256 | unsigned rxlen; | |
257 | unsigned rxstat; | |
3ba81f3e BD |
258 | u8 *rxpkt; |
259 | ||
aa39bf67 | 260 | rxfc = (ks8851_rdreg16(ks, KS_RXFCTR) >> 8) & 0xff; |
3ba81f3e | 261 | |
0dc7d2b3 JP |
262 | netif_dbg(ks, rx_status, ks->netdev, |
263 | "%s: %d packets\n", __func__, rxfc); | |
3ba81f3e BD |
264 | |
265 | /* Currently we're issuing a read per packet, but we could possibly | |
266 | * improve the code by issuing a single read, getting the receive | |
267 | * header, allocating the packet and then reading the packet data | |
268 | * out in one go. | |
269 | * | |
270 | * This form of operation would require us to hold the SPI bus' | |
271 | * chipselect low during the entie transaction to avoid any | |
25985edc | 272 | * reset to the data stream coming from the chip. |
3ba81f3e BD |
273 | */ |
274 | ||
275 | for (; rxfc != 0; rxfc--) { | |
806f6649 MV |
276 | rxstat = ks8851_rdreg16(ks, KS_RXFHSR); |
277 | rxlen = ks8851_rdreg16(ks, KS_RXFHBCR) & RXFHBCR_CNT_MASK; | |
3ba81f3e | 278 | |
0dc7d2b3 JP |
279 | netif_dbg(ks, rx_status, ks->netdev, |
280 | "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen); | |
3ba81f3e BD |
281 | |
282 | /* the length of the packet includes the 32bit CRC */ | |
283 | ||
284 | /* set dma read address */ | |
285 | ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); | |
286 | ||
536d3680 LW |
287 | /* start DMA access */ |
288 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA); | |
3ba81f3e | 289 | |
972c40b5 ED |
290 | if (rxlen > 4) { |
291 | unsigned int rxalign; | |
292 | ||
293 | rxlen -= 4; | |
294 | rxalign = ALIGN(rxlen, 4); | |
295 | skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign); | |
296 | if (skb) { | |
3ba81f3e | 297 | |
972c40b5 ED |
298 | /* 4 bytes of status header + 4 bytes of |
299 | * garbage: we put them before ethernet | |
300 | * header, so that they are copied, | |
301 | * but ignored. | |
302 | */ | |
3ba81f3e | 303 | |
972c40b5 | 304 | rxpkt = skb_put(skb, rxlen) - 8; |
3ba81f3e | 305 | |
7a552c85 | 306 | ks->rdfifo(ks, rxpkt, rxalign + 8); |
3ba81f3e | 307 | |
972c40b5 ED |
308 | if (netif_msg_pktdata(ks)) |
309 | ks8851_dbg_dumpkkt(ks, rxpkt); | |
3ba81f3e | 310 | |
972c40b5 | 311 | skb->protocol = eth_type_trans(skb, ks->netdev); |
7a552c85 | 312 | ks8851_rx_skb(ks, skb); |
3ba81f3e | 313 | |
972c40b5 ED |
314 | ks->netdev->stats.rx_packets++; |
315 | ks->netdev->stats.rx_bytes += rxlen; | |
316 | } | |
3ba81f3e BD |
317 | } |
318 | ||
536d3680 LW |
319 | /* end DMA access and dequeue packet */ |
320 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_RRXEF); | |
3ba81f3e BD |
321 | } |
322 | } | |
323 | ||
324 | /** | |
656a05c8 FB |
325 | * ks8851_irq - IRQ handler for dealing with interrupt requests |
326 | * @irq: IRQ number | |
327 | * @_ks: cookie | |
3ba81f3e | 328 | * |
656a05c8 FB |
329 | * This handler is invoked when the IRQ line asserts to find out what happened. |
330 | * As we cannot allow ourselves to sleep in HARDIRQ context, this handler runs | |
331 | * in thread context. | |
3ba81f3e BD |
332 | * |
333 | * Read the interrupt status, work out what needs to be done and then clear | |
334 | * any of the interrupts that are not needed. | |
335 | */ | |
656a05c8 | 336 | static irqreturn_t ks8851_irq(int irq, void *_ks) |
3ba81f3e | 337 | { |
656a05c8 | 338 | struct ks8851_net *ks = _ks; |
3ba81f3e | 339 | unsigned handled = 0; |
22726020 MV |
340 | unsigned long flags; |
341 | unsigned int status; | |
3ba81f3e | 342 | |
22726020 | 343 | ks8851_lock(ks, &flags); |
3ba81f3e BD |
344 | |
345 | status = ks8851_rdreg16(ks, KS_ISR); | |
346 | ||
0dc7d2b3 JP |
347 | netif_dbg(ks, intr, ks->netdev, |
348 | "%s: status 0x%04x\n", __func__, status); | |
3ba81f3e | 349 | |
062e55e3 | 350 | if (status & IRQ_LCI) |
3ba81f3e | 351 | handled |= IRQ_LCI; |
3ba81f3e BD |
352 | |
353 | if (status & IRQ_LDI) { | |
354 | u16 pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
355 | pmecr &= ~PMECR_WKEVT_MASK; | |
356 | ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK); | |
357 | ||
358 | handled |= IRQ_LDI; | |
359 | } | |
360 | ||
361 | if (status & IRQ_RXPSI) | |
362 | handled |= IRQ_RXPSI; | |
363 | ||
364 | if (status & IRQ_TXI) { | |
3dc5d445 | 365 | unsigned short tx_space = ks8851_rdreg16(ks, KS_TXMIR); |
3ba81f3e | 366 | |
3dc5d445 RW |
367 | netif_dbg(ks, intr, ks->netdev, |
368 | "%s: txspace %d\n", __func__, tx_space); | |
3ba81f3e | 369 | |
3dc5d445 RW |
370 | spin_lock(&ks->statelock); |
371 | ks->tx_space = tx_space; | |
372 | if (netif_queue_stopped(ks->netdev)) | |
373 | netif_wake_queue(ks->netdev); | |
374 | spin_unlock(&ks->statelock); | |
3ba81f3e | 375 | |
3dc5d445 | 376 | handled |= IRQ_TXI; |
3ba81f3e BD |
377 | } |
378 | ||
379 | if (status & IRQ_RXI) | |
380 | handled |= IRQ_RXI; | |
381 | ||
382 | if (status & IRQ_SPIBEI) { | |
2f3271c9 | 383 | netdev_err(ks->netdev, "%s: spi bus error\n", __func__); |
3ba81f3e BD |
384 | handled |= IRQ_SPIBEI; |
385 | } | |
386 | ||
387 | ks8851_wrreg16(ks, KS_ISR, handled); | |
388 | ||
389 | if (status & IRQ_RXI) { | |
390 | /* the datasheet says to disable the rx interrupt during | |
391 | * packet read-out, however we're masking the interrupt | |
392 | * from the device so do not bother masking just the RX | |
393 | * from the device. */ | |
394 | ||
395 | ks8851_rx_pkts(ks); | |
396 | } | |
397 | ||
398 | /* if something stopped the rx process, probably due to wanting | |
399 | * to change the rx settings, then do something about restarting | |
400 | * it. */ | |
401 | if (status & IRQ_RXPSI) { | |
402 | struct ks8851_rxctrl *rxc = &ks->rxctrl; | |
403 | ||
404 | /* update the multicast hash table */ | |
405 | ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]); | |
406 | ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]); | |
407 | ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]); | |
408 | ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]); | |
409 | ||
410 | ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2); | |
411 | ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1); | |
412 | } | |
413 | ||
22726020 | 414 | ks8851_unlock(ks, &flags); |
3ba81f3e | 415 | |
062e55e3 SB |
416 | if (status & IRQ_LCI) |
417 | mii_check_link(&ks->mii); | |
418 | ||
656a05c8 | 419 | return IRQ_HANDLED; |
3ba81f3e BD |
420 | } |
421 | ||
7a552c85 MV |
422 | /** |
423 | * ks8851_flush_tx_work - flush outstanding TX work | |
424 | * @ks: The device state | |
425 | */ | |
426 | static void ks8851_flush_tx_work(struct ks8851_net *ks) | |
427 | { | |
428 | if (ks->flush_tx_work) | |
429 | ks->flush_tx_work(ks); | |
430 | } | |
431 | ||
3ba81f3e BD |
432 | /** |
433 | * ks8851_net_open - open network device | |
434 | * @dev: The network device being opened. | |
435 | * | |
436 | * Called when the network device is marked active, such as a user executing | |
437 | * 'ifconfig up' on the device. | |
438 | */ | |
439 | static int ks8851_net_open(struct net_device *dev) | |
440 | { | |
441 | struct ks8851_net *ks = netdev_priv(dev); | |
22726020 | 442 | unsigned long flags; |
d268f315 LW |
443 | int ret; |
444 | ||
445 | ret = request_threaded_irq(dev->irq, NULL, ks8851_irq, | |
446 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
447 | dev->name, ks); | |
448 | if (ret < 0) { | |
449 | netdev_err(dev, "failed to get irq\n"); | |
450 | return ret; | |
451 | } | |
3ba81f3e BD |
452 | |
453 | /* lock the card, even if we may not actually be doing anything | |
454 | * else at the moment */ | |
22726020 | 455 | ks8851_lock(ks, &flags); |
3ba81f3e | 456 | |
0dc7d2b3 | 457 | netif_dbg(ks, ifup, ks->netdev, "opening\n"); |
3ba81f3e BD |
458 | |
459 | /* bring chip out of any power saving mode it was in */ | |
460 | ks8851_set_powermode(ks, PMECR_PM_NORMAL); | |
461 | ||
462 | /* issue a soft reset to the RX/TX QMU to put it into a known | |
463 | * state. */ | |
464 | ks8851_soft_reset(ks, GRR_QMU); | |
465 | ||
466 | /* setup transmission parameters */ | |
467 | ||
468 | ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */ | |
469 | TXCR_TXPE | /* pad to min length */ | |
470 | TXCR_TXCRC | /* add CRC */ | |
471 | TXCR_TXFCE)); /* enable flow control */ | |
472 | ||
473 | /* auto-increment tx data, reset tx pointer */ | |
474 | ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); | |
475 | ||
476 | /* setup receiver control */ | |
477 | ||
478 | ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */ | |
479 | RXCR1_RXFCE | /* enable flow control */ | |
480 | RXCR1_RXBE | /* broadcast enable */ | |
481 | RXCR1_RXUE | /* unicast enable */ | |
482 | RXCR1_RXE)); /* enable rx block */ | |
483 | ||
484 | /* transfer entire frames out in one go */ | |
485 | ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME); | |
486 | ||
487 | /* set receive counter timeouts */ | |
488 | ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */ | |
489 | ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */ | |
490 | ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */ | |
491 | ||
492 | ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */ | |
493 | RXQCR_RXDBCTE | /* IRQ on byte count exceeded */ | |
494 | RXQCR_RXDTTE); /* IRQ on time exceeded */ | |
495 | ||
496 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
497 | ||
498 | /* clear then enable interrupts */ | |
d2a1c643 MV |
499 | ks8851_wrreg16(ks, KS_ISR, ks->rc_ier); |
500 | ks8851_wrreg16(ks, KS_IER, ks->rc_ier); | |
3ba81f3e | 501 | |
3dc5d445 | 502 | ks->queued_len = 0; |
3ba81f3e BD |
503 | netif_start_queue(ks->netdev); |
504 | ||
0dc7d2b3 | 505 | netif_dbg(ks, ifup, ks->netdev, "network device up\n"); |
3ba81f3e | 506 | |
22726020 | 507 | ks8851_unlock(ks, &flags); |
9624bafa | 508 | mii_check_link(&ks->mii); |
3ba81f3e BD |
509 | return 0; |
510 | } | |
511 | ||
512 | /** | |
513 | * ks8851_net_stop - close network device | |
514 | * @dev: The device being closed. | |
515 | * | |
516 | * Called to close down a network device which has been active. Cancell any | |
517 | * work, shutdown the RX and TX process and then place the chip into a low | |
518 | * power state whilst it is not being used. | |
519 | */ | |
520 | static int ks8851_net_stop(struct net_device *dev) | |
521 | { | |
522 | struct ks8851_net *ks = netdev_priv(dev); | |
22726020 | 523 | unsigned long flags; |
3ba81f3e | 524 | |
0dc7d2b3 | 525 | netif_info(ks, ifdown, dev, "shutting down\n"); |
3ba81f3e BD |
526 | |
527 | netif_stop_queue(dev); | |
528 | ||
22726020 | 529 | ks8851_lock(ks, &flags); |
c5a99937 SB |
530 | /* turn off the IRQs and ack any outstanding */ |
531 | ks8851_wrreg16(ks, KS_IER, 0x0000); | |
532 | ks8851_wrreg16(ks, KS_ISR, 0xffff); | |
22726020 | 533 | ks8851_unlock(ks, &flags); |
3ba81f3e BD |
534 | |
535 | /* stop any outstanding work */ | |
144ad36c | 536 | ks8851_flush_tx_work(ks); |
3ba81f3e BD |
537 | flush_work(&ks->rxctrl_work); |
538 | ||
22726020 | 539 | ks8851_lock(ks, &flags); |
3ba81f3e BD |
540 | /* shutdown RX process */ |
541 | ks8851_wrreg16(ks, KS_RXCR1, 0x0000); | |
542 | ||
543 | /* shutdown TX process */ | |
544 | ks8851_wrreg16(ks, KS_TXCR, 0x0000); | |
545 | ||
546 | /* set powermode to soft power down to save power */ | |
547 | ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); | |
22726020 | 548 | ks8851_unlock(ks, &flags); |
3ba81f3e BD |
549 | |
550 | /* ensure any queued tx buffers are dumped */ | |
551 | while (!skb_queue_empty(&ks->txq)) { | |
552 | struct sk_buff *txb = skb_dequeue(&ks->txq); | |
553 | ||
0dc7d2b3 JP |
554 | netif_dbg(ks, ifdown, ks->netdev, |
555 | "%s: freeing txb %p\n", __func__, txb); | |
3ba81f3e BD |
556 | |
557 | dev_kfree_skb(txb); | |
558 | } | |
559 | ||
d268f315 LW |
560 | free_irq(dev->irq, ks); |
561 | ||
3ba81f3e BD |
562 | return 0; |
563 | } | |
564 | ||
7a552c85 MV |
565 | /** |
566 | * ks8851_start_xmit - transmit packet | |
567 | * @skb: The buffer to transmit | |
568 | * @dev: The device used to transmit the packet. | |
569 | * | |
570 | * Called by the network layer to transmit the @skb. Queue the packet for | |
571 | * the device and schedule the necessary work to transmit the packet when | |
572 | * it is free. | |
573 | * | |
574 | * We do this to firstly avoid sleeping with the network device locked, | |
575 | * and secondly so we can round up more than one packet to transmit which | |
576 | * means we can try and avoid generating too many transmit done interrupts. | |
577 | */ | |
578 | static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb, | |
579 | struct net_device *dev) | |
580 | { | |
581 | struct ks8851_net *ks = netdev_priv(dev); | |
582 | ||
583 | return ks->start_xmit(skb, dev); | |
584 | } | |
585 | ||
3ba81f3e BD |
586 | /** |
587 | * ks8851_rxctrl_work - work handler to change rx mode | |
588 | * @work: The work structure this belongs to. | |
589 | * | |
590 | * Lock the device and issue the necessary changes to the receive mode from | |
591 | * the network device layer. This is done so that we can do this without | |
592 | * having to sleep whilst holding the network device lock. | |
593 | * | |
594 | * Since the recommendation from Micrel is that the RXQ is shutdown whilst the | |
595 | * receive parameters are programmed, we issue a write to disable the RXQ and | |
596 | * then wait for the interrupt handler to be triggered once the RXQ shutdown is | |
597 | * complete. The interrupt handler then writes the new values into the chip. | |
598 | */ | |
599 | static void ks8851_rxctrl_work(struct work_struct *work) | |
600 | { | |
601 | struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work); | |
22726020 | 602 | unsigned long flags; |
3ba81f3e | 603 | |
22726020 | 604 | ks8851_lock(ks, &flags); |
3ba81f3e BD |
605 | |
606 | /* need to shutdown RXQ before modifying filter parameters */ | |
607 | ks8851_wrreg16(ks, KS_RXCR1, 0x00); | |
608 | ||
22726020 | 609 | ks8851_unlock(ks, &flags); |
3ba81f3e BD |
610 | } |
611 | ||
612 | static void ks8851_set_rx_mode(struct net_device *dev) | |
613 | { | |
614 | struct ks8851_net *ks = netdev_priv(dev); | |
615 | struct ks8851_rxctrl rxctrl; | |
616 | ||
617 | memset(&rxctrl, 0, sizeof(rxctrl)); | |
618 | ||
619 | if (dev->flags & IFF_PROMISC) { | |
620 | /* interface to receive everything */ | |
621 | ||
622 | rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF; | |
623 | } else if (dev->flags & IFF_ALLMULTI) { | |
624 | /* accept all multicast packets */ | |
625 | ||
626 | rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE | | |
627 | RXCR1_RXPAFMA | RXCR1_RXMAFMA); | |
4cd24eaf | 628 | } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) { |
22bedad3 | 629 | struct netdev_hw_addr *ha; |
3ba81f3e | 630 | u32 crc; |
3ba81f3e BD |
631 | |
632 | /* accept some multicast */ | |
633 | ||
22bedad3 JP |
634 | netdev_for_each_mc_addr(ha, dev) { |
635 | crc = ether_crc(ETH_ALEN, ha->addr); | |
3ba81f3e BD |
636 | crc >>= (32 - 6); /* get top six bits */ |
637 | ||
638 | rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf)); | |
3ba81f3e BD |
639 | } |
640 | ||
b6a71bfa | 641 | rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA; |
3ba81f3e BD |
642 | } else { |
643 | /* just accept broadcast / unicast */ | |
644 | rxctrl.rxcr1 = RXCR1_RXPAFMA; | |
645 | } | |
646 | ||
647 | rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */ | |
648 | RXCR1_RXBE | /* broadcast enable */ | |
649 | RXCR1_RXE | /* RX process enable */ | |
650 | RXCR1_RXFCE); /* enable flow control */ | |
651 | ||
652 | rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME; | |
653 | ||
654 | /* schedule work to do the actual set of the data if needed */ | |
655 | ||
656 | spin_lock(&ks->statelock); | |
657 | ||
658 | if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) { | |
659 | memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl)); | |
660 | schedule_work(&ks->rxctrl_work); | |
661 | } | |
662 | ||
663 | spin_unlock(&ks->statelock); | |
664 | } | |
665 | ||
666 | static int ks8851_set_mac_address(struct net_device *dev, void *addr) | |
667 | { | |
668 | struct sockaddr *sa = addr; | |
669 | ||
670 | if (netif_running(dev)) | |
671 | return -EBUSY; | |
672 | ||
673 | if (!is_valid_ether_addr(sa->sa_data)) | |
674 | return -EADDRNOTAVAIL; | |
675 | ||
a96d317f | 676 | eth_hw_addr_set(dev, sa->sa_data); |
3ba81f3e BD |
677 | return ks8851_write_mac_addr(dev); |
678 | } | |
679 | ||
680 | static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd) | |
681 | { | |
682 | struct ks8851_net *ks = netdev_priv(dev); | |
683 | ||
684 | if (!netif_running(dev)) | |
685 | return -EINVAL; | |
686 | ||
687 | return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL); | |
688 | } | |
689 | ||
690 | static const struct net_device_ops ks8851_netdev_ops = { | |
691 | .ndo_open = ks8851_net_open, | |
692 | .ndo_stop = ks8851_net_stop, | |
a7605370 | 693 | .ndo_eth_ioctl = ks8851_net_ioctl, |
3ba81f3e BD |
694 | .ndo_start_xmit = ks8851_start_xmit, |
695 | .ndo_set_mac_address = ks8851_set_mac_address, | |
696 | .ndo_set_rx_mode = ks8851_set_rx_mode, | |
3ba81f3e BD |
697 | .ndo_validate_addr = eth_validate_addr, |
698 | }; | |
699 | ||
700 | /* ethtool support */ | |
701 | ||
702 | static void ks8851_get_drvinfo(struct net_device *dev, | |
703 | struct ethtool_drvinfo *di) | |
704 | { | |
f029c781 WS |
705 | strscpy(di->driver, "KS8851", sizeof(di->driver)); |
706 | strscpy(di->version, "1.00", sizeof(di->version)); | |
707 | strscpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info)); | |
3ba81f3e BD |
708 | } |
709 | ||
710 | static u32 ks8851_get_msglevel(struct net_device *dev) | |
711 | { | |
712 | struct ks8851_net *ks = netdev_priv(dev); | |
713 | return ks->msg_enable; | |
714 | } | |
715 | ||
716 | static void ks8851_set_msglevel(struct net_device *dev, u32 to) | |
717 | { | |
718 | struct ks8851_net *ks = netdev_priv(dev); | |
719 | ks->msg_enable = to; | |
720 | } | |
721 | ||
98f2b092 PR |
722 | static int ks8851_get_link_ksettings(struct net_device *dev, |
723 | struct ethtool_link_ksettings *cmd) | |
3ba81f3e BD |
724 | { |
725 | struct ks8851_net *ks = netdev_priv(dev); | |
82c01a84 | 726 | |
727 | mii_ethtool_get_link_ksettings(&ks->mii, cmd); | |
728 | ||
729 | return 0; | |
3ba81f3e BD |
730 | } |
731 | ||
98f2b092 PR |
732 | static int ks8851_set_link_ksettings(struct net_device *dev, |
733 | const struct ethtool_link_ksettings *cmd) | |
3ba81f3e BD |
734 | { |
735 | struct ks8851_net *ks = netdev_priv(dev); | |
98f2b092 | 736 | return mii_ethtool_set_link_ksettings(&ks->mii, cmd); |
3ba81f3e BD |
737 | } |
738 | ||
739 | static u32 ks8851_get_link(struct net_device *dev) | |
740 | { | |
741 | struct ks8851_net *ks = netdev_priv(dev); | |
742 | return mii_link_ok(&ks->mii); | |
743 | } | |
744 | ||
745 | static int ks8851_nway_reset(struct net_device *dev) | |
746 | { | |
747 | struct ks8851_net *ks = netdev_priv(dev); | |
748 | return mii_nway_restart(&ks->mii); | |
749 | } | |
750 | ||
51b7b1c3 | 751 | /* EEPROM support */ |
a84afa40 | 752 | |
51b7b1c3 | 753 | static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee) |
a84afa40 | 754 | { |
51b7b1c3 BD |
755 | struct ks8851_net *ks = ee->data; |
756 | unsigned val; | |
a84afa40 | 757 | |
51b7b1c3 | 758 | val = ks8851_rdreg16(ks, KS_EEPCR); |
a84afa40 | 759 | |
51b7b1c3 BD |
760 | ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0; |
761 | ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0; | |
762 | ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0; | |
763 | } | |
a84afa40 | 764 | |
51b7b1c3 BD |
765 | static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee) |
766 | { | |
767 | struct ks8851_net *ks = ee->data; | |
768 | unsigned val = EEPCR_EESA; /* default - eeprom access on */ | |
769 | ||
770 | if (ee->drive_data) | |
771 | val |= EEPCR_EESRWA; | |
772 | if (ee->reg_data_in) | |
773 | val |= EEPCR_EEDO; | |
774 | if (ee->reg_data_clock) | |
775 | val |= EEPCR_EESCK; | |
776 | if (ee->reg_chip_select) | |
777 | val |= EEPCR_EECS; | |
778 | ||
779 | ks8851_wrreg16(ks, KS_EEPCR, val); | |
780 | } | |
a84afa40 | 781 | |
51b7b1c3 BD |
782 | /** |
783 | * ks8851_eeprom_claim - claim device EEPROM and activate the interface | |
784 | * @ks: The network device state. | |
785 | * | |
786 | * Check for the presence of an EEPROM, and then activate software access | |
787 | * to the device. | |
788 | */ | |
789 | static int ks8851_eeprom_claim(struct ks8851_net *ks) | |
790 | { | |
51b7b1c3 BD |
791 | /* start with clock low, cs high */ |
792 | ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS); | |
793 | return 0; | |
794 | } | |
a84afa40 | 795 | |
51b7b1c3 BD |
796 | /** |
797 | * ks8851_eeprom_release - release the EEPROM interface | |
798 | * @ks: The device state | |
799 | * | |
800 | * Release the software access to the device EEPROM | |
801 | */ | |
802 | static void ks8851_eeprom_release(struct ks8851_net *ks) | |
803 | { | |
804 | unsigned val = ks8851_rdreg16(ks, KS_EEPCR); | |
a84afa40 | 805 | |
51b7b1c3 | 806 | ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA); |
a84afa40 SJ |
807 | } |
808 | ||
51b7b1c3 BD |
809 | #define KS_EEPROM_MAGIC (0x00008851) |
810 | ||
a84afa40 | 811 | static int ks8851_set_eeprom(struct net_device *dev, |
51b7b1c3 | 812 | struct ethtool_eeprom *ee, u8 *data) |
a84afa40 SJ |
813 | { |
814 | struct ks8851_net *ks = netdev_priv(dev); | |
51b7b1c3 | 815 | int offset = ee->offset; |
22726020 | 816 | unsigned long flags; |
51b7b1c3 BD |
817 | int len = ee->len; |
818 | u16 tmp; | |
819 | ||
820 | /* currently only support byte writing */ | |
821 | if (len != 1) | |
a84afa40 SJ |
822 | return -EINVAL; |
823 | ||
51b7b1c3 BD |
824 | if (ee->magic != KS_EEPROM_MAGIC) |
825 | return -EINVAL; | |
a84afa40 | 826 | |
22726020 | 827 | if (!(ks->rc_ccr & CCR_EEPROM)) |
51b7b1c3 BD |
828 | return -ENOENT; |
829 | ||
22726020 MV |
830 | ks8851_lock(ks, &flags); |
831 | ||
832 | ks8851_eeprom_claim(ks); | |
833 | ||
51b7b1c3 BD |
834 | eeprom_93cx6_wren(&ks->eeprom, true); |
835 | ||
836 | /* ethtool currently only supports writing bytes, which means | |
837 | * we have to read/modify/write our 16bit EEPROMs */ | |
a84afa40 | 838 | |
51b7b1c3 | 839 | eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp); |
a84afa40 | 840 | |
51b7b1c3 BD |
841 | if (offset & 1) { |
842 | tmp &= 0xff; | |
843 | tmp |= *data << 8; | |
844 | } else { | |
845 | tmp &= 0xff00; | |
846 | tmp |= *data; | |
a84afa40 | 847 | } |
a84afa40 | 848 | |
51b7b1c3 BD |
849 | eeprom_93cx6_write(&ks->eeprom, offset/2, tmp); |
850 | eeprom_93cx6_wren(&ks->eeprom, false); | |
851 | ||
852 | ks8851_eeprom_release(ks); | |
22726020 | 853 | ks8851_unlock(ks, &flags); |
51b7b1c3 BD |
854 | |
855 | return 0; | |
856 | } | |
a84afa40 | 857 | |
51b7b1c3 BD |
858 | static int ks8851_get_eeprom(struct net_device *dev, |
859 | struct ethtool_eeprom *ee, u8 *data) | |
860 | { | |
861 | struct ks8851_net *ks = netdev_priv(dev); | |
862 | int offset = ee->offset; | |
22726020 | 863 | unsigned long flags; |
51b7b1c3 | 864 | int len = ee->len; |
a84afa40 | 865 | |
51b7b1c3 BD |
866 | /* must be 2 byte aligned */ |
867 | if (len & 1 || offset & 1) | |
868 | return -EINVAL; | |
a84afa40 | 869 | |
22726020 | 870 | if (!(ks->rc_ccr & CCR_EEPROM)) |
51b7b1c3 | 871 | return -ENOENT; |
a84afa40 | 872 | |
22726020 MV |
873 | ks8851_lock(ks, &flags); |
874 | ||
875 | ks8851_eeprom_claim(ks); | |
876 | ||
51b7b1c3 | 877 | ee->magic = KS_EEPROM_MAGIC; |
a84afa40 | 878 | |
51b7b1c3 BD |
879 | eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2); |
880 | ks8851_eeprom_release(ks); | |
22726020 | 881 | ks8851_unlock(ks, &flags); |
a84afa40 | 882 | |
51b7b1c3 BD |
883 | return 0; |
884 | } | |
a84afa40 | 885 | |
51b7b1c3 BD |
886 | static int ks8851_get_eeprom_len(struct net_device *dev) |
887 | { | |
888 | struct ks8851_net *ks = netdev_priv(dev); | |
889 | ||
890 | /* currently, we assume it is an 93C46 attached, so return 128 */ | |
891 | return ks->rc_ccr & CCR_EEPROM ? 128 : 0; | |
a84afa40 SJ |
892 | } |
893 | ||
3ba81f3e BD |
894 | static const struct ethtool_ops ks8851_ethtool_ops = { |
895 | .get_drvinfo = ks8851_get_drvinfo, | |
896 | .get_msglevel = ks8851_get_msglevel, | |
897 | .set_msglevel = ks8851_set_msglevel, | |
3ba81f3e BD |
898 | .get_link = ks8851_get_link, |
899 | .nway_reset = ks8851_nway_reset, | |
a84afa40 SJ |
900 | .get_eeprom_len = ks8851_get_eeprom_len, |
901 | .get_eeprom = ks8851_get_eeprom, | |
902 | .set_eeprom = ks8851_set_eeprom, | |
98f2b092 PR |
903 | .get_link_ksettings = ks8851_get_link_ksettings, |
904 | .set_link_ksettings = ks8851_set_link_ksettings, | |
3ba81f3e BD |
905 | }; |
906 | ||
907 | /* MII interface controls */ | |
908 | ||
909 | /** | |
910 | * ks8851_phy_reg - convert MII register into a KS8851 register | |
911 | * @reg: MII register number. | |
912 | * | |
913 | * Return the KS8851 register number for the corresponding MII PHY register | |
914 | * if possible. Return zero if the MII register has no direct mapping to the | |
915 | * KS8851 register set. | |
916 | */ | |
917 | static int ks8851_phy_reg(int reg) | |
918 | { | |
919 | switch (reg) { | |
920 | case MII_BMCR: | |
921 | return KS_P1MBCR; | |
922 | case MII_BMSR: | |
923 | return KS_P1MBSR; | |
924 | case MII_PHYSID1: | |
925 | return KS_PHY1ILR; | |
926 | case MII_PHYSID2: | |
927 | return KS_PHY1IHR; | |
928 | case MII_ADVERTISE: | |
929 | return KS_P1ANAR; | |
930 | case MII_LPA: | |
931 | return KS_P1ANLPR; | |
932 | } | |
933 | ||
ef363122 MV |
934 | return -EOPNOTSUPP; |
935 | } | |
936 | ||
937 | static int ks8851_phy_read_common(struct net_device *dev, int phy_addr, int reg) | |
938 | { | |
939 | struct ks8851_net *ks = netdev_priv(dev); | |
940 | unsigned long flags; | |
941 | int result; | |
942 | int ksreg; | |
943 | ||
944 | ksreg = ks8851_phy_reg(reg); | |
945 | if (ksreg < 0) | |
946 | return ksreg; | |
947 | ||
948 | ks8851_lock(ks, &flags); | |
949 | result = ks8851_rdreg16(ks, ksreg); | |
950 | ks8851_unlock(ks, &flags); | |
951 | ||
952 | return result; | |
3ba81f3e BD |
953 | } |
954 | ||
955 | /** | |
956 | * ks8851_phy_read - MII interface PHY register read. | |
957 | * @dev: The network device the PHY is on. | |
958 | * @phy_addr: Address of PHY (ignored as we only have one) | |
959 | * @reg: The register to read. | |
960 | * | |
961 | * This call reads data from the PHY register specified in @reg. Since the | |
25985edc | 962 | * device does not support all the MII registers, the non-existent values |
3ba81f3e BD |
963 | * are always returned as zero. |
964 | * | |
965 | * We return zero for unsupported registers as the MII code does not check | |
966 | * the value returned for any error status, and simply returns it to the | |
967 | * caller. The mii-tool that the driver was tested with takes any -ve error | |
968 | * as real PHY capabilities, thus displaying incorrect data to the user. | |
969 | */ | |
970 | static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg) | |
971 | { | |
ef363122 | 972 | int ret; |
3ba81f3e | 973 | |
ef363122 MV |
974 | ret = ks8851_phy_read_common(dev, phy_addr, reg); |
975 | if (ret < 0) | |
3ba81f3e BD |
976 | return 0x0; /* no error return allowed, so use zero */ |
977 | ||
ef363122 | 978 | return ret; |
3ba81f3e BD |
979 | } |
980 | ||
981 | static void ks8851_phy_write(struct net_device *dev, | |
982 | int phy, int reg, int value) | |
983 | { | |
984 | struct ks8851_net *ks = netdev_priv(dev); | |
22726020 | 985 | unsigned long flags; |
3ba81f3e BD |
986 | int ksreg; |
987 | ||
988 | ksreg = ks8851_phy_reg(reg); | |
ef363122 | 989 | if (ksreg >= 0) { |
22726020 | 990 | ks8851_lock(ks, &flags); |
3ba81f3e | 991 | ks8851_wrreg16(ks, ksreg, value); |
22726020 | 992 | ks8851_unlock(ks, &flags); |
3ba81f3e BD |
993 | } |
994 | } | |
995 | ||
ef363122 MV |
996 | static int ks8851_mdio_read(struct mii_bus *bus, int phy_id, int reg) |
997 | { | |
998 | struct ks8851_net *ks = bus->priv; | |
999 | ||
1000 | if (phy_id != 0) | |
1001 | return -EOPNOTSUPP; | |
1002 | ||
1003 | /* KS8851 PHY ID registers are swapped in HW, swap them back. */ | |
1004 | if (reg == MII_PHYSID1) | |
1005 | reg = MII_PHYSID2; | |
1006 | else if (reg == MII_PHYSID2) | |
1007 | reg = MII_PHYSID1; | |
1008 | ||
1009 | return ks8851_phy_read_common(ks->netdev, phy_id, reg); | |
1010 | } | |
1011 | ||
1012 | static int ks8851_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 val) | |
1013 | { | |
1014 | struct ks8851_net *ks = bus->priv; | |
1015 | ||
1016 | ks8851_phy_write(ks->netdev, phy_id, reg, val); | |
1017 | return 0; | |
1018 | } | |
1019 | ||
3ba81f3e BD |
1020 | /** |
1021 | * ks8851_read_selftest - read the selftest memory info. | |
1022 | * @ks: The device state | |
1023 | * | |
1024 | * Read and check the TX/RX memory selftest information. | |
1025 | */ | |
819fb78f | 1026 | static void ks8851_read_selftest(struct ks8851_net *ks) |
3ba81f3e BD |
1027 | { |
1028 | unsigned both_done = MBIR_TXMBF | MBIR_RXMBF; | |
3ba81f3e BD |
1029 | unsigned rd; |
1030 | ||
1031 | rd = ks8851_rdreg16(ks, KS_MBIR); | |
1032 | ||
1033 | if ((rd & both_done) != both_done) { | |
0dc7d2b3 | 1034 | netdev_warn(ks->netdev, "Memory selftest not finished\n"); |
819fb78f | 1035 | return; |
3ba81f3e BD |
1036 | } |
1037 | ||
819fb78f | 1038 | if (rd & MBIR_TXMBFA) |
0dc7d2b3 | 1039 | netdev_err(ks->netdev, "TX memory selftest fail\n"); |
3ba81f3e | 1040 | |
819fb78f | 1041 | if (rd & MBIR_RXMBFA) |
0dc7d2b3 | 1042 | netdev_err(ks->netdev, "RX memory selftest fail\n"); |
3ba81f3e BD |
1043 | } |
1044 | ||
1045 | /* driver bus management functions */ | |
1046 | ||
d5b40921 LPC |
1047 | #ifdef CONFIG_PM_SLEEP |
1048 | ||
b07f987a | 1049 | int ks8851_suspend(struct device *dev) |
1d5439b9 | 1050 | { |
d5b40921 LPC |
1051 | struct ks8851_net *ks = dev_get_drvdata(dev); |
1052 | struct net_device *netdev = ks->netdev; | |
1d5439b9 | 1053 | |
d5b40921 LPC |
1054 | if (netif_running(netdev)) { |
1055 | netif_device_detach(netdev); | |
1056 | ks8851_net_stop(netdev); | |
1d5439b9 AA |
1057 | } |
1058 | ||
1059 | return 0; | |
1060 | } | |
51bb08dd | 1061 | EXPORT_SYMBOL_GPL(ks8851_suspend); |
1d5439b9 | 1062 | |
b07f987a | 1063 | int ks8851_resume(struct device *dev) |
1d5439b9 | 1064 | { |
d5b40921 LPC |
1065 | struct ks8851_net *ks = dev_get_drvdata(dev); |
1066 | struct net_device *netdev = ks->netdev; | |
1d5439b9 | 1067 | |
d5b40921 LPC |
1068 | if (netif_running(netdev)) { |
1069 | ks8851_net_open(netdev); | |
1070 | netif_device_attach(netdev); | |
1d5439b9 AA |
1071 | } |
1072 | ||
1073 | return 0; | |
1074 | } | |
51bb08dd | 1075 | EXPORT_SYMBOL_GPL(ks8851_resume); |
8ac2b3c0 | 1076 | #endif |
d5b40921 | 1077 | |
ef363122 MV |
1078 | static int ks8851_register_mdiobus(struct ks8851_net *ks, struct device *dev) |
1079 | { | |
1080 | struct mii_bus *mii_bus; | |
1081 | int ret; | |
1082 | ||
1083 | mii_bus = mdiobus_alloc(); | |
1084 | if (!mii_bus) | |
1085 | return -ENOMEM; | |
1086 | ||
1087 | mii_bus->name = "ks8851_eth_mii"; | |
1088 | mii_bus->read = ks8851_mdio_read; | |
1089 | mii_bus->write = ks8851_mdio_write; | |
1090 | mii_bus->priv = ks; | |
1091 | mii_bus->parent = dev; | |
1092 | mii_bus->phy_mask = ~((u32)BIT(0)); | |
1093 | snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); | |
1094 | ||
1095 | ret = mdiobus_register(mii_bus); | |
1096 | if (ret) | |
1097 | goto err_mdiobus_register; | |
1098 | ||
1099 | ks->mii_bus = mii_bus; | |
1100 | ||
1101 | return 0; | |
1102 | ||
1103 | err_mdiobus_register: | |
1104 | mdiobus_free(mii_bus); | |
1105 | return ret; | |
1106 | } | |
1107 | ||
1108 | static void ks8851_unregister_mdiobus(struct ks8851_net *ks) | |
1109 | { | |
1110 | mdiobus_unregister(ks->mii_bus); | |
1111 | mdiobus_free(ks->mii_bus); | |
1112 | } | |
1113 | ||
b07f987a MV |
1114 | int ks8851_probe_common(struct net_device *netdev, struct device *dev, |
1115 | int msg_en) | |
3ba81f3e | 1116 | { |
24be7263 | 1117 | struct ks8851_net *ks = netdev_priv(netdev); |
51c61a28 | 1118 | unsigned cider; |
24be7263 | 1119 | int ret; |
3ba81f3e | 1120 | |
bfd1e0eb | 1121 | ks->netdev = netdev; |
3ba81f3e BD |
1122 | ks->tx_space = 6144; |
1123 | ||
7b77bb5c DT |
1124 | ks->gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); |
1125 | ret = PTR_ERR_OR_ZERO(ks->gpio); | |
1126 | if (ret) { | |
1127 | if (ret != -EPROBE_DEFER) | |
1128 | dev_err(dev, "reset gpio request failed: %d\n", ret); | |
1129 | return ret; | |
1130 | } | |
1131 | ||
1132 | ret = gpiod_set_consumer_name(ks->gpio, "ks8851_rst_n"); | |
1133 | if (ret) { | |
1134 | dev_err(dev, "failed to set reset gpio name: %d\n", ret); | |
1135 | return ret; | |
73fdeb82 SB |
1136 | } |
1137 | ||
d320692d | 1138 | ks->vdd_io = devm_regulator_get(dev, "vdd-io"); |
73fdeb82 SB |
1139 | if (IS_ERR(ks->vdd_io)) { |
1140 | ret = PTR_ERR(ks->vdd_io); | |
d64eed1d SB |
1141 | goto err_reg_io; |
1142 | } | |
1143 | ||
1144 | ret = regulator_enable(ks->vdd_io); | |
1145 | if (ret) { | |
d320692d | 1146 | dev_err(dev, "regulator vdd_io enable fail: %d\n", ret); |
d64eed1d | 1147 | goto err_reg_io; |
73fdeb82 SB |
1148 | } |
1149 | ||
d320692d | 1150 | ks->vdd_reg = devm_regulator_get(dev, "vdd"); |
ebf4ad95 NM |
1151 | if (IS_ERR(ks->vdd_reg)) { |
1152 | ret = PTR_ERR(ks->vdd_reg); | |
d64eed1d SB |
1153 | goto err_reg; |
1154 | } | |
1155 | ||
1156 | ret = regulator_enable(ks->vdd_reg); | |
1157 | if (ret) { | |
d320692d | 1158 | dev_err(dev, "regulator vdd enable fail: %d\n", ret); |
d64eed1d | 1159 | goto err_reg; |
ebf4ad95 NM |
1160 | } |
1161 | ||
7b77bb5c | 1162 | if (ks->gpio) { |
73fdeb82 | 1163 | usleep_range(10000, 11000); |
7b77bb5c | 1164 | gpiod_set_value_cansleep(ks->gpio, 0); |
73fdeb82 | 1165 | } |
ebf4ad95 | 1166 | |
3ba81f3e BD |
1167 | spin_lock_init(&ks->statelock); |
1168 | ||
3ba81f3e BD |
1169 | INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work); |
1170 | ||
ef363122 MV |
1171 | SET_NETDEV_DEV(netdev, dev); |
1172 | ||
51b7b1c3 | 1173 | /* setup EEPROM state */ |
51b7b1c3 BD |
1174 | ks->eeprom.data = ks; |
1175 | ks->eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1176 | ks->eeprom.register_read = ks8851_eeprom_regread; | |
1177 | ks->eeprom.register_write = ks8851_eeprom_regwrite; | |
1178 | ||
3ba81f3e | 1179 | /* setup mii state */ |
bfd1e0eb | 1180 | ks->mii.dev = netdev; |
eba251f2 | 1181 | ks->mii.phy_id = 1; |
3ba81f3e BD |
1182 | ks->mii.phy_id_mask = 1; |
1183 | ks->mii.reg_num_mask = 0xf; | |
1184 | ks->mii.mdio_read = ks8851_phy_read; | |
1185 | ks->mii.mdio_write = ks8851_phy_write; | |
1186 | ||
24be7263 | 1187 | dev_info(dev, "message enable is %d\n", msg_en); |
3ba81f3e | 1188 | |
ef363122 MV |
1189 | ret = ks8851_register_mdiobus(ks, dev); |
1190 | if (ret) | |
1191 | goto err_mdio; | |
1192 | ||
3ba81f3e | 1193 | /* set the default message enable */ |
24be7263 MV |
1194 | ks->msg_enable = netif_msg_init(msg_en, NETIF_MSG_DRV | |
1195 | NETIF_MSG_PROBE | | |
1196 | NETIF_MSG_LINK); | |
3ba81f3e BD |
1197 | |
1198 | skb_queue_head_init(&ks->txq); | |
1199 | ||
bfd1e0eb | 1200 | netdev->ethtool_ops = &ks8851_ethtool_ops; |
3ba81f3e | 1201 | |
2c5b0a86 | 1202 | dev_set_drvdata(dev, ks); |
3ba81f3e | 1203 | |
9624bafa | 1204 | netif_carrier_off(ks->netdev); |
bfd1e0eb MV |
1205 | netdev->if_port = IF_PORT_100BASET; |
1206 | netdev->netdev_ops = &ks8851_netdev_ops; | |
3ba81f3e | 1207 | |
57dada68 BD |
1208 | /* issue a global soft reset to reset the device. */ |
1209 | ks8851_soft_reset(ks, GRR_GSR); | |
1210 | ||
3ba81f3e | 1211 | /* simple check for a valid chip being connected to the bus */ |
51c61a28 MR |
1212 | cider = ks8851_rdreg16(ks, KS_CIDER); |
1213 | if ((cider & ~CIDER_REV_MASK) != CIDER_ID) { | |
d320692d | 1214 | dev_err(dev, "failed to read device ID\n"); |
3ba81f3e BD |
1215 | ret = -ENODEV; |
1216 | goto err_id; | |
1217 | } | |
1218 | ||
7d997466 SJ |
1219 | /* cache the contents of the CCR register for EEPROM, etc. */ |
1220 | ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR); | |
1221 | ||
3ba81f3e | 1222 | ks8851_read_selftest(ks); |
848fc0ce | 1223 | ks8851_init_mac(ks, dev->of_node); |
3ba81f3e | 1224 | |
bfd1e0eb | 1225 | ret = register_netdev(netdev); |
3ba81f3e | 1226 | if (ret) { |
d320692d | 1227 | dev_err(dev, "failed to register network device\n"); |
ef363122 | 1228 | goto err_id; |
3ba81f3e BD |
1229 | } |
1230 | ||
bfd1e0eb MV |
1231 | netdev_info(netdev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n", |
1232 | CIDER_REV_GET(cider), netdev->dev_addr, netdev->irq, | |
a9a8de21 | 1233 | ks->rc_ccr & CCR_EEPROM ? "has" : "no"); |
3ba81f3e BD |
1234 | |
1235 | return 0; | |
1236 | ||
761cfa97 | 1237 | err_id: |
ef363122 MV |
1238 | ks8851_unregister_mdiobus(ks); |
1239 | err_mdio: | |
7b77bb5c DT |
1240 | if (ks->gpio) |
1241 | gpiod_set_value_cansleep(ks->gpio, 1); | |
d64eed1d | 1242 | regulator_disable(ks->vdd_reg); |
ebf4ad95 | 1243 | err_reg: |
d64eed1d | 1244 | regulator_disable(ks->vdd_io); |
73fdeb82 | 1245 | err_reg_io: |
3ba81f3e BD |
1246 | return ret; |
1247 | } | |
51bb08dd | 1248 | EXPORT_SYMBOL_GPL(ks8851_probe_common); |
3ba81f3e | 1249 | |
2841bfd1 | 1250 | void ks8851_remove_common(struct device *dev) |
3ba81f3e | 1251 | { |
24be7263 | 1252 | struct ks8851_net *priv = dev_get_drvdata(dev); |
3ba81f3e | 1253 | |
ef363122 MV |
1254 | ks8851_unregister_mdiobus(priv); |
1255 | ||
3ba81f3e | 1256 | if (netif_msg_drv(priv)) |
d320692d | 1257 | dev_info(dev, "remove\n"); |
3ba81f3e BD |
1258 | |
1259 | unregister_netdev(priv->netdev); | |
7b77bb5c DT |
1260 | if (priv->gpio) |
1261 | gpiod_set_value_cansleep(priv->gpio, 1); | |
d64eed1d SB |
1262 | regulator_disable(priv->vdd_reg); |
1263 | regulator_disable(priv->vdd_io); | |
3ba81f3e | 1264 | } |
51bb08dd AB |
1265 | EXPORT_SYMBOL_GPL(ks8851_remove_common); |
1266 | ||
1267 | MODULE_DESCRIPTION("KS8851 Network driver"); | |
1268 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
1269 | MODULE_LICENSE("GPL"); |