[people/ms/u-boot.git] / drivers / net / fm / tgec.c

/*
 * Copyright 2009-2011 Freescale Semiconductor, Inc.
 *	Dave Liu <daveliu@freescale.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* MAXFRM - maximum frame length */
#define MAXFRM_MASK	0x0000ffff

#include <common.h>
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/fsl_enet.h>
#include <asm/fsl_tgec.h>

#include "fm.h"

#define TGEC_CMD_CFG_INIT	(TGEC_CMD_CFG_NO_LEN_CHK | \
				 TGEC_CMD_CFG_RX_ER_DISC | \
				 TGEC_CMD_CFG_STAT_CLR | \
				 TGEC_CMD_CFG_PAUSE_IGNORE | \
				 TGEC_CMD_CFG_CRC_FWD)
#define TGEC_CMD_CFG_FINAL	(TGEC_CMD_CFG_NO_LEN_CHK | \
				 TGEC_CMD_CFG_RX_ER_DISC | \
				 TGEC_CMD_CFG_PAUSE_IGNORE | \
				 TGEC_CMD_CFG_CRC_FWD)

static void tgec_init_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	/* mask all interrupt */
	out_be32(&regs->imask, IMASK_MASK_ALL);

	/* clear all events */
	out_be32(&regs->ievent, IEVENT_CLEAR_ALL);

	/* set the max receive length */
	out_be32(&regs->maxfrm, mac->max_rx_len & MAXFRM_MASK);

	/*
	 * 1588 disable, insert second mac disable payload length check
	 * disable, normal operation, any rx error frame is discarded, clear
	 * counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
	 * strip, Tx CRC append, Rx disable and Tx disable
	 */
	out_be32(&regs->command_config, TGEC_CMD_CFG_INIT);
	udelay(1000);
	out_be32(&regs->command_config, TGEC_CMD_CFG_FINAL);

	/* multicast frame reception for the hash entry disable */
	out_be32(&regs->hashtable_ctrl, 0);
}

static void tgec_enable_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	setbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
}

static void tgec_disable_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	clrbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
}

static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
{
	struct tgec *regs = mac->base;
	u32 mac_addr0, mac_addr1;

	/*
	 * if a station address of 0x12345678ABCD, perform a write to
	 * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
	 */
	mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
			(mac_addr[1] << 8)  | (mac_addr[0]);
	out_be32(&regs->mac_addr_0, mac_addr0);

	mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
	out_be32(&regs->mac_addr_1, mac_addr1);
}

static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
					phy_interface_t type, int speed)
{
	/* nothing right now */
	return;
}

void init_tgec(struct fsl_enet_mac *mac, void *base,
		void *phyregs, int max_rx_len)
{
	mac->base = base;
	mac->phyregs = phyregs;
	mac->max_rx_len = max_rx_len;
	mac->init_mac = tgec_init_mac;
	mac->enable_mac = tgec_enable_mac;
	mac->disable_mac = tgec_disable_mac;
	mac->set_mac_addr = tgec_set_mac_addr;
	mac->set_if_mode = tgec_set_interface_mode;
}
Commit	Line	Data
c916d7c9 KG	1	/*
	2	* Copyright 2009-2011 Freescale Semiconductor, Inc.
	3	* Dave Liu <daveliu@freescale.com>
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
c916d7c9 KG	6	*/
	7
	8	/* MAXFRM - maximum frame length */
	9	#define MAXFRM_MASK 0x0000ffff
	10
	11	#include <common.h>
	12	#include <phy.h>
	13	#include <asm/types.h>
	14	#include <asm/io.h>
	15	#include <asm/fsl_enet.h>
	16	#include <asm/fsl_tgec.h>
	17
	18	#include "fm.h"
	19
	20	#define TGEC_CMD_CFG_INIT (TGEC_CMD_CFG_NO_LEN_CHK \| \
	21	TGEC_CMD_CFG_RX_ER_DISC \| \
	22	TGEC_CMD_CFG_STAT_CLR \| \
	23	TGEC_CMD_CFG_PAUSE_IGNORE \| \
	24	TGEC_CMD_CFG_CRC_FWD)
	25	#define TGEC_CMD_CFG_FINAL (TGEC_CMD_CFG_NO_LEN_CHK \| \
	26	TGEC_CMD_CFG_RX_ER_DISC \| \
	27	TGEC_CMD_CFG_PAUSE_IGNORE \| \
	28	TGEC_CMD_CFG_CRC_FWD)
	29
	30	static void tgec_init_mac(struct fsl_enet_mac *mac)
	31	{
	32	struct tgec *regs = mac->base;
	33
	34	/* mask all interrupt */
	35	out_be32(&regs->imask, IMASK_MASK_ALL);
	36
	37	/* clear all events */
	38	out_be32(&regs->ievent, IEVENT_CLEAR_ALL);
	39
	40	/* set the max receive length */
	41	out_be32(&regs->maxfrm, mac->max_rx_len & MAXFRM_MASK);
	42
	43	/*
	44	* 1588 disable, insert second mac disable payload length check
	45	* disable, normal operation, any rx error frame is discarded, clear
	46	* counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
	47	* strip, Tx CRC append, Rx disable and Tx disable
	48	*/
	49	out_be32(&regs->command_config, TGEC_CMD_CFG_INIT);
	50	udelay(1000);
	51	out_be32(&regs->command_config, TGEC_CMD_CFG_FINAL);
	52
	53	/* multicast frame reception for the hash entry disable */
	54	out_be32(&regs->hashtable_ctrl, 0);
	55	}
	56
	57	static void tgec_enable_mac(struct fsl_enet_mac *mac)
	58	{
	59	struct tgec *regs = mac->base;
	60
	61	setbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
	62	}
	63
	64	static void tgec_disable_mac(struct fsl_enet_mac *mac)
	65	{
	66	struct tgec *regs = mac->base;
	67
	68	clrbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
	69	}
70
71	static void tgec_set_mac_addr(struct fsl_enet_mac mac, u8 mac_addr)
72	{
73	struct tgec *regs = mac->base;
74	u32 mac_addr0, mac_addr1;
75
76	/*
77	* if a station address of 0x12345678ABCD, perform a write to
78	* MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
79	*/
80	mac_addr0 = (mac_addr[3] << 24) \| (mac_addr[2] << 16) \| \
81	(mac_addr[1] << 8) \| (mac_addr[0]);
82	out_be32(&regs->mac_addr_0, mac_addr0);
83
84	mac_addr1 = ((mac_addr[5] << 8) \| mac_addr[4]) & 0x0000ffff;
85	out_be32(&regs->mac_addr_1, mac_addr1);
86	}
87
88	static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
89	phy_interface_t type, int speed)
90	{
91	/* nothing right now */
92	return;
93	}
94
95	void init_tgec(struct fsl_enet_mac mac, void base,
96	void *phyregs, int max_rx_len)
97	{
98	mac->base = base;
99	mac->phyregs = phyregs;
100	mac->max_rx_len = max_rx_len;
101	mac->init_mac = tgec_init_mac;
102	mac->enable_mac = tgec_enable_mac;
103	mac->disable_mac = tgec_disable_mac;
104	mac->set_mac_addr = tgec_set_mac_addr;
105	mac->set_if_mode = tgec_set_interface_mode;
106	}