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Commit | Line | Data |
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c4775476 KJS |
1 | /* |
2 | * Faraday 10/100Mbps Ethernet Controller | |
3 | * | |
102a8cd3 | 4 | * (C) Copyright 2013 Faraday Technology |
c4775476 KJS |
5 | * Dante Su <dantesu@faraday-tech.com> |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
c4775476 KJS |
8 | */ |
9 | ||
10 | #include <common.h> | |
11 | #include <command.h> | |
12 | #include <malloc.h> | |
13 | #include <net.h> | |
1221ce45 | 14 | #include <linux/errno.h> |
c4775476 KJS |
15 | #include <asm/io.h> |
16 | #include <asm/dma-mapping.h> | |
17 | ||
18 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) | |
19 | #include <miiphy.h> | |
20 | #endif | |
21 | ||
22 | #include "ftmac110.h" | |
23 | ||
24 | #define CFG_RXDES_NUM 8 | |
25 | #define CFG_TXDES_NUM 2 | |
26 | #define CFG_XBUF_SIZE 1536 | |
27 | ||
28 | #define CFG_MDIORD_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ | |
29 | #define CFG_MDIOWR_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ | |
30 | #define CFG_LINKUP_TIMEOUT (CONFIG_SYS_HZ << 2) /* 4 sec */ | |
31 | ||
32 | /* | |
33 | * FTMAC110 DMA design issue | |
34 | * | |
35 | * Its DMA engine has a weird restriction that its Rx DMA engine | |
36 | * accepts only 16-bits aligned address, 32-bits aligned is not | |
37 | * acceptable. However this restriction does not apply to Tx DMA. | |
38 | * | |
39 | * Conclusion: | |
40 | * (1) Tx DMA Buffer Address: | |
41 | * 1 bytes aligned: Invalid | |
42 | * 2 bytes aligned: O.K | |
43 | * 4 bytes aligned: O.K (-> u-boot ZeroCopy is possible) | |
44 | * (2) Rx DMA Buffer Address: | |
45 | * 1 bytes aligned: Invalid | |
46 | * 2 bytes aligned: O.K | |
47 | * 4 bytes aligned: Invalid | |
48 | */ | |
49 | ||
50 | struct ftmac110_chip { | |
51 | void __iomem *regs; | |
52 | uint32_t imr; | |
53 | uint32_t maccr; | |
54 | uint32_t lnkup; | |
55 | uint32_t phy_addr; | |
56 | ||
0628cb26 | 57 | struct ftmac110_desc *rxd; |
c4775476 KJS |
58 | ulong rxd_dma; |
59 | uint32_t rxd_idx; | |
60 | ||
0628cb26 | 61 | struct ftmac110_desc *txd; |
c4775476 KJS |
62 | ulong txd_dma; |
63 | uint32_t txd_idx; | |
64 | }; | |
65 | ||
66 | static int ftmac110_reset(struct eth_device *dev); | |
67 | ||
68 | static uint16_t mdio_read(struct eth_device *dev, | |
69 | uint8_t phyaddr, uint8_t phyreg) | |
70 | { | |
71 | struct ftmac110_chip *chip = dev->priv; | |
4b7be199 | 72 | struct ftmac110_regs *regs = chip->regs; |
c4775476 KJS |
73 | uint32_t tmp, ts; |
74 | uint16_t ret = 0xffff; | |
75 | ||
76 | tmp = PHYCR_READ | |
77 | | (phyaddr << PHYCR_ADDR_SHIFT) | |
78 | | (phyreg << PHYCR_REG_SHIFT); | |
79 | ||
80 | writel(tmp, ®s->phycr); | |
81 | ||
82 | for (ts = get_timer(0); get_timer(ts) < CFG_MDIORD_TIMEOUT; ) { | |
83 | tmp = readl(®s->phycr); | |
84 | if (tmp & PHYCR_READ) | |
85 | continue; | |
86 | break; | |
87 | } | |
88 | ||
89 | if (tmp & PHYCR_READ) | |
90 | printf("ftmac110: mdio read timeout\n"); | |
91 | else | |
92 | ret = (uint16_t)(tmp & 0xffff); | |
93 | ||
94 | return ret; | |
95 | } | |
96 | ||
97 | static void mdio_write(struct eth_device *dev, | |
98 | uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) | |
99 | { | |
100 | struct ftmac110_chip *chip = dev->priv; | |
4b7be199 | 101 | struct ftmac110_regs *regs = chip->regs; |
c4775476 KJS |
102 | uint32_t tmp, ts; |
103 | ||
104 | tmp = PHYCR_WRITE | |
105 | | (phyaddr << PHYCR_ADDR_SHIFT) | |
106 | | (phyreg << PHYCR_REG_SHIFT); | |
107 | ||
108 | writel(phydata, ®s->phydr); | |
109 | writel(tmp, ®s->phycr); | |
110 | ||
111 | for (ts = get_timer(0); get_timer(ts) < CFG_MDIOWR_TIMEOUT; ) { | |
112 | if (readl(®s->phycr) & PHYCR_WRITE) | |
113 | continue; | |
114 | break; | |
115 | } | |
116 | ||
117 | if (readl(®s->phycr) & PHYCR_WRITE) | |
118 | printf("ftmac110: mdio write timeout\n"); | |
119 | } | |
120 | ||
121 | static uint32_t ftmac110_phyqry(struct eth_device *dev) | |
122 | { | |
123 | ulong ts; | |
124 | uint32_t maccr; | |
125 | uint16_t pa, tmp, bmsr, bmcr; | |
126 | struct ftmac110_chip *chip = dev->priv; | |
127 | ||
128 | /* Default = 100Mbps Full */ | |
129 | maccr = MACCR_100M | MACCR_FD; | |
130 | ||
131 | /* 1. find the phy device */ | |
132 | for (pa = 0; pa < 32; ++pa) { | |
133 | tmp = mdio_read(dev, pa, MII_PHYSID1); | |
134 | if (tmp == 0xFFFF || tmp == 0x0000) | |
135 | continue; | |
136 | chip->phy_addr = pa; | |
137 | break; | |
138 | } | |
139 | if (pa >= 32) { | |
140 | puts("ftmac110: phy device not found!\n"); | |
141 | goto exit; | |
142 | } | |
143 | ||
144 | /* 2. wait until link-up & auto-negotiation complete */ | |
145 | chip->lnkup = 0; | |
146 | bmcr = mdio_read(dev, chip->phy_addr, MII_BMCR); | |
147 | ts = get_timer(0); | |
148 | do { | |
149 | bmsr = mdio_read(dev, chip->phy_addr, MII_BMSR); | |
150 | chip->lnkup = (bmsr & BMSR_LSTATUS) ? 1 : 0; | |
151 | if (!chip->lnkup) | |
152 | continue; | |
153 | if (!(bmcr & BMCR_ANENABLE) || (bmsr & BMSR_ANEGCOMPLETE)) | |
154 | break; | |
155 | } while (get_timer(ts) < CFG_LINKUP_TIMEOUT); | |
156 | if (!chip->lnkup) { | |
157 | puts("ftmac110: link down\n"); | |
158 | goto exit; | |
159 | } | |
160 | if (!(bmcr & BMCR_ANENABLE)) | |
161 | puts("ftmac110: auto negotiation disabled\n"); | |
162 | else if (!(bmsr & BMSR_ANEGCOMPLETE)) | |
163 | puts("ftmac110: auto negotiation timeout\n"); | |
164 | ||
165 | /* 3. derive MACCR */ | |
166 | if ((bmcr & BMCR_ANENABLE) && (bmsr & BMSR_ANEGCOMPLETE)) { | |
167 | tmp = mdio_read(dev, chip->phy_addr, MII_ADVERTISE); | |
168 | tmp &= mdio_read(dev, chip->phy_addr, MII_LPA); | |
169 | if (tmp & LPA_100FULL) /* 100Mbps full-duplex */ | |
170 | maccr = MACCR_100M | MACCR_FD; | |
171 | else if (tmp & LPA_100HALF) /* 100Mbps half-duplex */ | |
172 | maccr = MACCR_100M; | |
173 | else if (tmp & LPA_10FULL) /* 10Mbps full-duplex */ | |
174 | maccr = MACCR_FD; | |
175 | else if (tmp & LPA_10HALF) /* 10Mbps half-duplex */ | |
176 | maccr = 0; | |
177 | } else { | |
178 | if (bmcr & BMCR_SPEED100) | |
179 | maccr = MACCR_100M; | |
180 | else | |
181 | maccr = 0; | |
182 | if (bmcr & BMCR_FULLDPLX) | |
183 | maccr |= MACCR_FD; | |
184 | } | |
185 | ||
186 | exit: | |
187 | printf("ftmac110: %d Mbps, %s\n", | |
188 | (maccr & MACCR_100M) ? 100 : 10, | |
189 | (maccr & MACCR_FD) ? "Full" : "half"); | |
190 | return maccr; | |
191 | } | |
192 | ||
193 | static int ftmac110_reset(struct eth_device *dev) | |
194 | { | |
195 | uint8_t *a; | |
196 | uint32_t i, maccr; | |
197 | struct ftmac110_chip *chip = dev->priv; | |
4b7be199 | 198 | struct ftmac110_regs *regs = chip->regs; |
c4775476 KJS |
199 | |
200 | /* 1. MAC reset */ | |
201 | writel(MACCR_RESET, ®s->maccr); | |
202 | for (i = get_timer(0); get_timer(i) < 1000; ) { | |
203 | if (readl(®s->maccr) & MACCR_RESET) | |
204 | continue; | |
205 | break; | |
206 | } | |
207 | if (readl(®s->maccr) & MACCR_RESET) { | |
208 | printf("ftmac110: reset failed\n"); | |
209 | return -ENXIO; | |
210 | } | |
211 | ||
212 | /* 1-1. Init tx ring */ | |
213 | for (i = 0; i < CFG_TXDES_NUM; ++i) { | |
214 | /* owned by SW */ | |
0628cb26 | 215 | chip->txd[i].ctrl &= cpu_to_le64(FTMAC110_TXD_CLRMASK); |
c4775476 KJS |
216 | } |
217 | chip->txd_idx = 0; | |
218 | ||
219 | /* 1-2. Init rx ring */ | |
220 | for (i = 0; i < CFG_RXDES_NUM; ++i) { | |
221 | /* owned by HW */ | |
0628cb26 KJS |
222 | chip->rxd[i].ctrl &= cpu_to_le64(FTMAC110_RXD_CLRMASK); |
223 | chip->rxd[i].ctrl |= cpu_to_le64(FTMAC110_RXD_OWNER); | |
c4775476 KJS |
224 | } |
225 | chip->rxd_idx = 0; | |
226 | ||
227 | /* 2. PHY status query */ | |
228 | maccr = ftmac110_phyqry(dev); | |
229 | ||
230 | /* 3. Fix up the MACCR value */ | |
231 | chip->maccr = maccr | MACCR_CRCAPD | MACCR_RXALL | MACCR_RXRUNT | |
232 | | MACCR_RXEN | MACCR_TXEN | MACCR_RXDMAEN | MACCR_TXDMAEN; | |
233 | ||
234 | /* 4. MAC address setup */ | |
235 | a = dev->enetaddr; | |
236 | writel(a[1] | (a[0] << 8), ®s->mac[0]); | |
237 | writel(a[5] | (a[4] << 8) | (a[3] << 16) | |
238 | | (a[2] << 24), ®s->mac[1]); | |
239 | ||
240 | /* 5. MAC registers setup */ | |
241 | writel(chip->rxd_dma, ®s->rxba); | |
242 | writel(chip->txd_dma, ®s->txba); | |
243 | /* interrupt at each tx/rx */ | |
244 | writel(ITC_DEFAULT, ®s->itc); | |
245 | /* no tx pool, rx poll = 1 normal cycle */ | |
246 | writel(APTC_DEFAULT, ®s->aptc); | |
247 | /* rx threshold = [6/8 fifo, 2/8 fifo] */ | |
248 | writel(DBLAC_DEFAULT, ®s->dblac); | |
249 | /* disable & clear all interrupt status */ | |
250 | chip->imr = 0; | |
251 | writel(ISR_ALL, ®s->isr); | |
252 | writel(chip->imr, ®s->imr); | |
253 | /* enable mac */ | |
254 | writel(chip->maccr, ®s->maccr); | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
259 | static int ftmac110_probe(struct eth_device *dev, bd_t *bis) | |
260 | { | |
261 | debug("ftmac110: probe\n"); | |
262 | ||
263 | if (ftmac110_reset(dev)) | |
264 | return -1; | |
265 | ||
266 | return 0; | |
267 | } | |
268 | ||
269 | static void ftmac110_halt(struct eth_device *dev) | |
270 | { | |
271 | struct ftmac110_chip *chip = dev->priv; | |
4b7be199 | 272 | struct ftmac110_regs *regs = chip->regs; |
c4775476 KJS |
273 | |
274 | writel(0, ®s->imr); | |
275 | writel(0, ®s->maccr); | |
276 | ||
277 | debug("ftmac110: halt\n"); | |
278 | } | |
279 | ||
280 | static int ftmac110_send(struct eth_device *dev, void *pkt, int len) | |
281 | { | |
282 | struct ftmac110_chip *chip = dev->priv; | |
4b7be199 | 283 | struct ftmac110_regs *regs = chip->regs; |
0628cb26 KJS |
284 | struct ftmac110_desc *txd; |
285 | uint64_t ctrl; | |
c4775476 KJS |
286 | |
287 | if (!chip->lnkup) | |
288 | return 0; | |
289 | ||
290 | if (len <= 0 || len > CFG_XBUF_SIZE) { | |
291 | printf("ftmac110: bad tx pkt len(%d)\n", len); | |
292 | return 0; | |
293 | } | |
294 | ||
295 | len = max(60, len); | |
296 | ||
0628cb26 KJS |
297 | txd = &chip->txd[chip->txd_idx]; |
298 | ctrl = le64_to_cpu(txd->ctrl); | |
299 | if (ctrl & FTMAC110_TXD_OWNER) { | |
c4775476 KJS |
300 | /* kick-off Tx DMA */ |
301 | writel(0xffffffff, ®s->txpd); | |
302 | printf("ftmac110: out of txd\n"); | |
303 | return 0; | |
304 | } | |
305 | ||
0628cb26 KJS |
306 | memcpy(txd->vbuf, (void *)pkt, len); |
307 | dma_map_single(txd->vbuf, len, DMA_TO_DEVICE); | |
c4775476 | 308 | |
0628cb26 KJS |
309 | /* clear control bits */ |
310 | ctrl &= FTMAC110_TXD_CLRMASK; | |
311 | /* set len, fts and lts */ | |
312 | ctrl |= FTMAC110_TXD_LEN(len) | FTMAC110_TXD_FTS | FTMAC110_TXD_LTS; | |
313 | /* set owner bit */ | |
314 | ctrl |= FTMAC110_TXD_OWNER; | |
315 | /* write back to descriptor */ | |
316 | txd->ctrl = cpu_to_le64(ctrl); | |
c4775476 KJS |
317 | |
318 | /* kick-off Tx DMA */ | |
319 | writel(0xffffffff, ®s->txpd); | |
320 | ||
321 | chip->txd_idx = (chip->txd_idx + 1) % CFG_TXDES_NUM; | |
322 | ||
323 | return len; | |
324 | } | |
325 | ||
326 | static int ftmac110_recv(struct eth_device *dev) | |
327 | { | |
328 | struct ftmac110_chip *chip = dev->priv; | |
0628cb26 KJS |
329 | struct ftmac110_desc *rxd; |
330 | uint32_t len, rlen = 0; | |
331 | uint64_t ctrl; | |
c4775476 KJS |
332 | uint8_t *buf; |
333 | ||
334 | if (!chip->lnkup) | |
335 | return 0; | |
336 | ||
337 | do { | |
0628cb26 KJS |
338 | rxd = &chip->rxd[chip->rxd_idx]; |
339 | ctrl = le64_to_cpu(rxd->ctrl); | |
340 | if (ctrl & FTMAC110_RXD_OWNER) | |
c4775476 KJS |
341 | break; |
342 | ||
0628cb26 KJS |
343 | len = (uint32_t)FTMAC110_RXD_LEN(ctrl); |
344 | buf = rxd->vbuf; | |
c4775476 | 345 | |
0628cb26 | 346 | if (ctrl & FTMAC110_RXD_ERRMASK) { |
c4775476 KJS |
347 | printf("ftmac110: rx error\n"); |
348 | } else { | |
349 | dma_map_single(buf, len, DMA_FROM_DEVICE); | |
1fd92db8 | 350 | net_process_received_packet(buf, len); |
c4775476 KJS |
351 | rlen += len; |
352 | } | |
353 | ||
354 | /* owned by hardware */ | |
0628cb26 KJS |
355 | ctrl &= FTMAC110_RXD_CLRMASK; |
356 | ctrl |= FTMAC110_RXD_OWNER; | |
357 | rxd->ctrl |= cpu_to_le64(ctrl); | |
c4775476 KJS |
358 | |
359 | chip->rxd_idx = (chip->rxd_idx + 1) % CFG_RXDES_NUM; | |
360 | } while (0); | |
361 | ||
362 | return rlen; | |
363 | } | |
364 | ||
365 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) | |
366 | ||
5a49f174 JH |
367 | static int ftmac110_mdio_read(struct mii_dev *bus, int addr, int devad, |
368 | int reg) | |
c4775476 | 369 | { |
5a49f174 | 370 | uint16_t value = 0; |
c4775476 KJS |
371 | int ret = 0; |
372 | struct eth_device *dev; | |
373 | ||
5a49f174 | 374 | dev = eth_get_dev_by_name(bus->name); |
c4775476 | 375 | if (dev == NULL) { |
5a49f174 | 376 | printf("%s: no such device\n", bus->name); |
c4775476 KJS |
377 | ret = -1; |
378 | } else { | |
5a49f174 | 379 | value = mdio_read(dev, addr, reg); |
c4775476 KJS |
380 | } |
381 | ||
5a49f174 JH |
382 | if (ret < 0) |
383 | return ret; | |
384 | return value; | |
c4775476 KJS |
385 | } |
386 | ||
5a49f174 JH |
387 | static int ftmac110_mdio_write(struct mii_dev *bus, int addr, int devad, |
388 | int reg, u16 value) | |
c4775476 KJS |
389 | { |
390 | int ret = 0; | |
391 | struct eth_device *dev; | |
392 | ||
5a49f174 | 393 | dev = eth_get_dev_by_name(bus->name); |
c4775476 | 394 | if (dev == NULL) { |
5a49f174 | 395 | printf("%s: no such device\n", bus->name); |
c4775476 KJS |
396 | ret = -1; |
397 | } else { | |
398 | mdio_write(dev, addr, reg, value); | |
399 | } | |
400 | ||
401 | return ret; | |
402 | } | |
403 | ||
404 | #endif /* #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) */ | |
405 | ||
406 | int ftmac110_initialize(bd_t *bis) | |
407 | { | |
408 | int i, card_nr = 0; | |
409 | struct eth_device *dev; | |
410 | struct ftmac110_chip *chip; | |
411 | ||
412 | dev = malloc(sizeof(*dev) + sizeof(*chip)); | |
413 | if (dev == NULL) { | |
414 | panic("ftmac110: out of memory 1\n"); | |
415 | return -1; | |
416 | } | |
417 | chip = (struct ftmac110_chip *)(dev + 1); | |
418 | memset(dev, 0, sizeof(*dev) + sizeof(*chip)); | |
419 | ||
420 | sprintf(dev->name, "FTMAC110#%d", card_nr); | |
421 | ||
422 | dev->iobase = CONFIG_FTMAC110_BASE; | |
423 | chip->regs = (void __iomem *)dev->iobase; | |
424 | dev->priv = chip; | |
425 | dev->init = ftmac110_probe; | |
426 | dev->halt = ftmac110_halt; | |
427 | dev->send = ftmac110_send; | |
428 | dev->recv = ftmac110_recv; | |
429 | ||
c4775476 KJS |
430 | /* allocate tx descriptors (it must be 16 bytes aligned) */ |
431 | chip->txd = dma_alloc_coherent( | |
0628cb26 | 432 | sizeof(struct ftmac110_desc) * CFG_TXDES_NUM, &chip->txd_dma); |
c4775476 KJS |
433 | if (!chip->txd) |
434 | panic("ftmac110: out of memory 3\n"); | |
435 | memset(chip->txd, 0, | |
0628cb26 | 436 | sizeof(struct ftmac110_desc) * CFG_TXDES_NUM); |
c4775476 KJS |
437 | for (i = 0; i < CFG_TXDES_NUM; ++i) { |
438 | void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE); | |
0628cb26 | 439 | |
c4775476 KJS |
440 | if (!va) |
441 | panic("ftmac110: out of memory 4\n"); | |
0628cb26 KJS |
442 | chip->txd[i].vbuf = va; |
443 | chip->txd[i].pbuf = cpu_to_le32(virt_to_phys(va)); | |
444 | chip->txd[i].ctrl = 0; /* owned by SW */ | |
c4775476 | 445 | } |
0628cb26 | 446 | chip->txd[i - 1].ctrl |= cpu_to_le64(FTMAC110_TXD_END); |
c4775476 KJS |
447 | chip->txd_idx = 0; |
448 | ||
449 | /* allocate rx descriptors (it must be 16 bytes aligned) */ | |
450 | chip->rxd = dma_alloc_coherent( | |
0628cb26 | 451 | sizeof(struct ftmac110_desc) * CFG_RXDES_NUM, &chip->rxd_dma); |
c4775476 KJS |
452 | if (!chip->rxd) |
453 | panic("ftmac110: out of memory 4\n"); | |
454 | memset((void *)chip->rxd, 0, | |
0628cb26 | 455 | sizeof(struct ftmac110_desc) * CFG_RXDES_NUM); |
c4775476 KJS |
456 | for (i = 0; i < CFG_RXDES_NUM; ++i) { |
457 | void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2); | |
0628cb26 | 458 | |
c4775476 KJS |
459 | if (!va) |
460 | panic("ftmac110: out of memory 5\n"); | |
461 | /* it needs to be exactly 2 bytes aligned */ | |
462 | va = ((uint8_t *)va + 2); | |
0628cb26 KJS |
463 | chip->rxd[i].vbuf = va; |
464 | chip->rxd[i].pbuf = cpu_to_le32(virt_to_phys(va)); | |
465 | chip->rxd[i].ctrl = cpu_to_le64(FTMAC110_RXD_OWNER | |
466 | | FTMAC110_RXD_BUFSZ(CFG_XBUF_SIZE)); | |
c4775476 | 467 | } |
0628cb26 | 468 | chip->rxd[i - 1].ctrl |= cpu_to_le64(FTMAC110_RXD_END); |
c4775476 KJS |
469 | chip->rxd_idx = 0; |
470 | ||
471 | eth_register(dev); | |
472 | ||
473 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) | |
5a49f174 JH |
474 | int retval; |
475 | struct mii_dev *mdiodev = mdio_alloc(); | |
476 | if (!mdiodev) | |
477 | return -ENOMEM; | |
478 | strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); | |
479 | mdiodev->read = ftmac110_mdio_read; | |
480 | mdiodev->write = ftmac110_mdio_write; | |
481 | ||
482 | retval = mdio_register(mdiodev); | |
483 | if (retval < 0) | |
484 | return retval; | |
c4775476 KJS |
485 | #endif |
486 | ||
487 | card_nr++; | |
488 | ||
489 | return card_nr; | |
490 | } |