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45219c46 WD |
1 | /*------------------------------------------------------------------------ |
2 | * lan91c96.c | |
3 | * This is a driver for SMSC's LAN91C96 single-chip Ethernet device, based | |
4 | * on the SMC91111 driver from U-boot. | |
5 | * | |
6 | * (C) Copyright 2002 | |
7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
8 | * Rolf Offermanns <rof@sysgo.de> | |
9 | * | |
10 | * Copyright (C) 2001 Standard Microsystems Corporation (SMSC) | |
11 | * Developed by Simple Network Magic Corporation (SNMC) | |
12 | * Copyright (C) 1996 by Erik Stahlman (ES) | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
27 | * | |
28 | * Information contained in this file was obtained from the LAN91C96 | |
29 | * manual from SMC. To get a copy, if you really want one, you can find | |
30 | * information under www.smsc.com. | |
31 | * | |
32 | * | |
33 | * "Features" of the SMC chip: | |
34 | * 6144 byte packet memory. ( for the 91C96 ) | |
35 | * EEPROM for configuration | |
36 | * AUI/TP selection ( mine has 10Base2/10BaseT select ) | |
37 | * | |
38 | * Arguments: | |
1b769881 | 39 | * io = for the base address |
45219c46 WD |
40 | * irq = for the IRQ |
41 | * | |
42 | * author: | |
1b769881 JCPV |
43 | * Erik Stahlman ( erik@vt.edu ) |
44 | * Daris A Nevil ( dnevil@snmc.com ) | |
45219c46 WD |
45 | * |
46 | * | |
47 | * Hardware multicast code from Peter Cammaert ( pc@denkart.be ) | |
48 | * | |
49 | * Sources: | |
50 | * o SMSC LAN91C96 databook (www.smsc.com) | |
51 | * o smc91111.c (u-boot driver) | |
52 | * o smc9194.c (linux kernel driver) | |
53 | * o lan91c96.c (Intel Diagnostic Manager driver) | |
54 | * | |
55 | * History: | |
1b769881 | 56 | * 04/30/03 Mathijs Haarman Modified smc91111.c (u-boot version) |
45219c46 WD |
57 | * for lan91c96 |
58 | *--------------------------------------------------------------------------- | |
59 | */ | |
60 | ||
61 | #include <common.h> | |
62 | #include <command.h> | |
63 | #include "lan91c96.h" | |
64 | #include <net.h> | |
65 | ||
45219c46 WD |
66 | /*------------------------------------------------------------------------ |
67 | * | |
68 | * Configuration options, for the experienced user to change. | |
69 | * | |
70 | -------------------------------------------------------------------------*/ | |
71 | ||
72 | /* Use power-down feature of the chip */ | |
73 | #define POWER_DOWN 0 | |
74 | ||
75 | /* | |
76 | * Wait time for memory to be free. This probably shouldn't be | |
77 | * tuned that much, as waiting for this means nothing else happens | |
78 | * in the system | |
79 | */ | |
80 | #define MEMORY_WAIT_TIME 16 | |
81 | ||
82 | #define SMC_DEBUG 0 | |
83 | ||
84 | #if (SMC_DEBUG > 2 ) | |
85 | #define PRINTK3(args...) printf(args) | |
86 | #else | |
87 | #define PRINTK3(args...) | |
88 | #endif | |
89 | ||
90 | #if SMC_DEBUG > 1 | |
91 | #define PRINTK2(args...) printf(args) | |
92 | #else | |
93 | #define PRINTK2(args...) | |
94 | #endif | |
95 | ||
96 | #ifdef SMC_DEBUG | |
97 | #define PRINTK(args...) printf(args) | |
98 | #else | |
99 | #define PRINTK(args...) | |
100 | #endif | |
101 | ||
102 | ||
103 | /*------------------------------------------------------------------------ | |
104 | * | |
105 | * The internal workings of the driver. If you are changing anything | |
106 | * here with the SMC stuff, you should have the datasheet and know | |
107 | * what you are doing. | |
108 | * | |
109 | *------------------------------------------------------------------------ | |
110 | */ | |
111 | #define CARDNAME "LAN91C96" | |
112 | ||
113 | #define SMC_BASE_ADDRESS CONFIG_LAN91C96_BASE | |
114 | ||
115 | #define SMC_DEV_NAME "LAN91C96" | |
116 | #define SMC_ALLOC_MAX_TRY 5 | |
117 | #define SMC_TX_TIMEOUT 30 | |
118 | ||
119 | #define ETH_ZLEN 60 | |
120 | ||
121 | #ifdef CONFIG_LAN91C96_USE_32_BIT | |
122 | #define USE_32_BIT 1 | |
123 | #else | |
124 | #undef USE_32_BIT | |
125 | #endif | |
126 | ||
127 | /*----------------------------------------------------------------- | |
128 | * | |
129 | * The driver can be entered at any of the following entry points. | |
130 | * | |
131 | *----------------------------------------------------------------- | |
132 | */ | |
133 | ||
134 | extern int eth_init (bd_t * bd); | |
135 | extern void eth_halt (void); | |
136 | extern int eth_rx (void); | |
137 | extern int eth_send (volatile void *packet, int length); | |
39539887 | 138 | #if 0 |
45219c46 | 139 | static int smc_hw_init (void); |
39539887 | 140 | #endif |
45219c46 WD |
141 | |
142 | /* | |
143 | * This is called by register_netdev(). It is responsible for | |
144 | * checking the portlist for the SMC9000 series chipset. If it finds | |
145 | * one, then it will initialize the device, find the hardware information, | |
146 | * and sets up the appropriate device parameters. | |
147 | * NOTE: Interrupts are *OFF* when this procedure is called. | |
148 | * | |
149 | * NB:This shouldn't be static since it is referred to externally. | |
150 | */ | |
151 | int smc_init (void); | |
152 | ||
153 | /* | |
154 | * This is called by unregister_netdev(). It is responsible for | |
155 | * cleaning up before the driver is finally unregistered and discarded. | |
156 | */ | |
157 | void smc_destructor (void); | |
158 | ||
159 | /* | |
160 | * The kernel calls this function when someone wants to use the device, | |
161 | * typically 'ifconfig ethX up'. | |
162 | */ | |
5ca26799 | 163 | static int smc_open (bd_t *bd); |
45219c46 WD |
164 | |
165 | ||
166 | /* | |
167 | * This is called by the kernel in response to 'ifconfig ethX down'. It | |
168 | * is responsible for cleaning up everything that the open routine | |
169 | * does, and maybe putting the card into a powerdown state. | |
170 | */ | |
171 | static int smc_close (void); | |
172 | ||
173 | /* | |
174 | * This is a separate procedure to handle the receipt of a packet, to | |
175 | * leave the interrupt code looking slightly cleaner | |
176 | */ | |
177 | static int smc_rcv (void); | |
178 | ||
5ca26799 WD |
179 | /* See if a MAC address is defined in the current environment. If so use it. If not |
180 | . print a warning and set the environment and other globals with the default. | |
181 | . If an EEPROM is present it really should be consulted. | |
182 | */ | |
183 | int smc_get_ethaddr(bd_t *bd); | |
d52fb7e3 | 184 | int get_rom_mac(unsigned char *v_rom_mac); |
45219c46 | 185 | |
45219c46 WD |
186 | /* ------------------------------------------------------------ |
187 | * Internal routines | |
188 | * ------------------------------------------------------------ | |
189 | */ | |
190 | ||
d52fb7e3 | 191 | static unsigned char smc_mac_addr[] = { 0xc0, 0x00, 0x00, 0x1b, 0x62, 0x9c }; |
45219c46 WD |
192 | |
193 | /* | |
194 | * This function must be called before smc_open() if you want to override | |
195 | * the default mac address. | |
196 | */ | |
197 | ||
d52fb7e3 | 198 | void smc_set_mac_addr (const unsigned char *addr) |
45219c46 WD |
199 | { |
200 | int i; | |
201 | ||
202 | for (i = 0; i < sizeof (smc_mac_addr); i++) { | |
203 | smc_mac_addr[i] = addr[i]; | |
204 | } | |
205 | } | |
206 | ||
207 | /* | |
208 | * smc_get_macaddr is no longer used. If you want to override the default | |
209 | * mac address, call smc_get_mac_addr as a part of the board initialisation. | |
210 | */ | |
211 | ||
212 | #if 0 | |
213 | void smc_get_macaddr (byte * addr) | |
214 | { | |
215 | /* MAC ADDRESS AT FLASHBLOCK 1 / OFFSET 0x10 */ | |
216 | unsigned char *dnp1110_mac = (unsigned char *) (0xE8000000 + 0x20010); | |
217 | int i; | |
218 | ||
219 | ||
220 | for (i = 0; i < 6; i++) { | |
221 | addr[0] = *(dnp1110_mac + 0); | |
222 | addr[1] = *(dnp1110_mac + 1); | |
223 | addr[2] = *(dnp1110_mac + 2); | |
224 | addr[3] = *(dnp1110_mac + 3); | |
225 | addr[4] = *(dnp1110_mac + 4); | |
226 | addr[5] = *(dnp1110_mac + 5); | |
227 | } | |
228 | } | |
229 | #endif /* 0 */ | |
230 | ||
231 | /*********************************************** | |
232 | * Show available memory * | |
233 | ***********************************************/ | |
234 | void dump_memory_info (void) | |
235 | { | |
236 | word mem_info; | |
237 | word old_bank; | |
238 | ||
239 | old_bank = SMC_inw (LAN91C96_BANK_SELECT) & 0xF; | |
240 | ||
241 | SMC_SELECT_BANK (0); | |
242 | mem_info = SMC_inw (LAN91C96_MIR); | |
243 | PRINTK2 ("Memory: %4d available\n", (mem_info >> 8) * 2048); | |
244 | ||
245 | SMC_SELECT_BANK (old_bank); | |
246 | } | |
247 | ||
248 | /* | |
249 | * A rather simple routine to print out a packet for debugging purposes. | |
250 | */ | |
251 | #if SMC_DEBUG > 2 | |
252 | static void print_packet (byte *, int); | |
253 | #endif | |
254 | ||
255 | /* #define tx_done(dev) 1 */ | |
256 | ||
257 | ||
45219c46 WD |
258 | /* this does a soft reset on the device */ |
259 | static void smc_reset (void); | |
260 | ||
261 | /* Enable Interrupts, Receive, and Transmit */ | |
262 | static void smc_enable (void); | |
263 | ||
264 | /* this puts the device in an inactive state */ | |
265 | static void smc_shutdown (void); | |
266 | ||
267 | ||
268 | static int poll4int (byte mask, int timeout) | |
269 | { | |
6d0f6bcf | 270 | int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ; |
45219c46 WD |
271 | int is_timeout = 0; |
272 | word old_bank = SMC_inw (LAN91C96_BANK_SELECT); | |
273 | ||
274 | PRINTK2 ("Polling...\n"); | |
275 | SMC_SELECT_BANK (2); | |
276 | while ((SMC_inw (LAN91C96_INT_STATS) & mask) == 0) { | |
277 | if (get_timer (0) >= tmo) { | |
278 | is_timeout = 1; | |
279 | break; | |
280 | } | |
281 | } | |
282 | ||
283 | /* restore old bank selection */ | |
284 | SMC_SELECT_BANK (old_bank); | |
285 | ||
286 | if (is_timeout) | |
287 | return 1; | |
288 | else | |
289 | return 0; | |
290 | } | |
291 | ||
292 | /* | |
293 | * Function: smc_reset( void ) | |
294 | * Purpose: | |
1b769881 JCPV |
295 | * This sets the SMC91111 chip to its normal state, hopefully from whatever |
296 | * mess that any other DOS driver has put it in. | |
45219c46 WD |
297 | * |
298 | * Maybe I should reset more registers to defaults in here? SOFTRST should | |
299 | * do that for me. | |
300 | * | |
301 | * Method: | |
302 | * 1. send a SOFT RESET | |
303 | * 2. wait for it to finish | |
304 | * 3. enable autorelease mode | |
305 | * 4. reset the memory management unit | |
306 | * 5. clear all interrupts | |
307 | * | |
308 | */ | |
309 | static void smc_reset (void) | |
310 | { | |
311 | PRINTK2 ("%s:smc_reset\n", SMC_DEV_NAME); | |
312 | ||
313 | /* This resets the registers mostly to defaults, but doesn't | |
314 | affect EEPROM. That seems unnecessary */ | |
315 | SMC_SELECT_BANK (0); | |
316 | SMC_outw (LAN91C96_RCR_SOFT_RST, LAN91C96_RCR); | |
317 | ||
318 | udelay (10); | |
319 | ||
320 | /* Disable transmit and receive functionality */ | |
321 | SMC_outw (0, LAN91C96_RCR); | |
322 | SMC_outw (0, LAN91C96_TCR); | |
323 | ||
324 | /* set the control register */ | |
325 | SMC_SELECT_BANK (1); | |
326 | SMC_outw (SMC_inw (LAN91C96_CONTROL) | LAN91C96_CTR_BIT_8, | |
327 | LAN91C96_CONTROL); | |
328 | ||
329 | /* Disable all interrupts */ | |
330 | SMC_outb (0, LAN91C96_INT_MASK); | |
331 | } | |
332 | ||
333 | /* | |
334 | * Function: smc_enable | |
335 | * Purpose: let the chip talk to the outside work | |
336 | * Method: | |
337 | * 1. Initialize the Memory Configuration Register | |
338 | * 2. Enable the transmitter | |
339 | * 3. Enable the receiver | |
340 | */ | |
341 | static void smc_enable () | |
342 | { | |
343 | PRINTK2 ("%s:smc_enable\n", SMC_DEV_NAME); | |
344 | SMC_SELECT_BANK (0); | |
345 | ||
346 | /* Initialize the Memory Configuration Register. See page | |
347 | 49 of the LAN91C96 data sheet for details. */ | |
348 | SMC_outw (LAN91C96_MCR_TRANSMIT_PAGES, LAN91C96_MCR); | |
349 | ||
350 | /* Initialize the Transmit Control Register */ | |
351 | SMC_outw (LAN91C96_TCR_TXENA, LAN91C96_TCR); | |
352 | /* Initialize the Receive Control Register | |
353 | * FIXME: | |
354 | * The promiscuous bit set because I could not receive ARP reply | |
355 | * packets from the server when I send a ARP request. It only works | |
356 | * when I set the promiscuous bit | |
357 | */ | |
358 | SMC_outw (LAN91C96_RCR_RXEN | LAN91C96_RCR_PRMS, LAN91C96_RCR); | |
359 | } | |
360 | ||
361 | /* | |
362 | * Function: smc_shutdown | |
363 | * Purpose: closes down the SMC91xxx chip. | |
364 | * Method: | |
365 | * 1. zero the interrupt mask | |
366 | * 2. clear the enable receive flag | |
367 | * 3. clear the enable xmit flags | |
368 | * | |
369 | * TODO: | |
370 | * (1) maybe utilize power down mode. | |
371 | * Why not yet? Because while the chip will go into power down mode, | |
372 | * the manual says that it will wake up in response to any I/O requests | |
373 | * in the register space. Empirical results do not show this working. | |
374 | */ | |
375 | static void smc_shutdown () | |
376 | { | |
377 | PRINTK2 (CARDNAME ":smc_shutdown\n"); | |
378 | ||
379 | /* no more interrupts for me */ | |
380 | SMC_SELECT_BANK (2); | |
381 | SMC_outb (0, LAN91C96_INT_MASK); | |
382 | ||
383 | /* and tell the card to stay away from that nasty outside world */ | |
384 | SMC_SELECT_BANK (0); | |
385 | SMC_outb (0, LAN91C96_RCR); | |
386 | SMC_outb (0, LAN91C96_TCR); | |
387 | } | |
388 | ||
389 | ||
390 | /* | |
391 | * Function: smc_hardware_send_packet(struct net_device * ) | |
392 | * Purpose: | |
393 | * This sends the actual packet to the SMC9xxx chip. | |
394 | * | |
395 | * Algorithm: | |
1b769881 | 396 | * First, see if a saved_skb is available. |
45219c46 WD |
397 | * ( this should NOT be called if there is no 'saved_skb' |
398 | * Now, find the packet number that the chip allocated | |
399 | * Point the data pointers at it in memory | |
400 | * Set the length word in the chip's memory | |
401 | * Dump the packet to chip memory | |
402 | * Check if a last byte is needed ( odd length packet ) | |
403 | * if so, set the control flag right | |
1b769881 | 404 | * Tell the card to send it |
45219c46 | 405 | * Enable the transmit interrupt, so I know if it failed |
1b769881 | 406 | * Free the kernel data if I actually sent it. |
45219c46 WD |
407 | */ |
408 | static int smc_send_packet (volatile void *packet, int packet_length) | |
409 | { | |
410 | byte packet_no; | |
411 | unsigned long ioaddr; | |
412 | byte *buf; | |
413 | int length; | |
414 | int numPages; | |
415 | int try = 0; | |
416 | int time_out; | |
417 | byte status; | |
418 | ||
419 | ||
420 | PRINTK3 ("%s:smc_hardware_send_packet\n", SMC_DEV_NAME); | |
421 | ||
422 | length = ETH_ZLEN < packet_length ? packet_length : ETH_ZLEN; | |
423 | ||
424 | /* allocate memory | |
425 | ** The MMU wants the number of pages to be the number of 256 bytes | |
426 | ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) ) | |
427 | ** | |
428 | ** The 91C111 ignores the size bits, but the code is left intact | |
429 | ** for backwards and future compatibility. | |
430 | ** | |
431 | ** Pkt size for allocating is data length +6 (for additional status | |
432 | ** words, length and ctl!) | |
433 | ** | |
434 | ** If odd size then last byte is included in this header. | |
435 | */ | |
436 | numPages = ((length & 0xfffe) + 6); | |
437 | numPages >>= 8; /* Divide by 256 */ | |
438 | ||
439 | if (numPages > 7) { | |
440 | printf ("%s: Far too big packet error. \n", SMC_DEV_NAME); | |
441 | return 0; | |
442 | } | |
443 | ||
444 | /* now, try to allocate the memory */ | |
445 | ||
446 | SMC_SELECT_BANK (2); | |
447 | SMC_outw (LAN91C96_MMUCR_ALLOC_TX | numPages, LAN91C96_MMU); | |
448 | ||
449 | again: | |
450 | try++; | |
451 | time_out = MEMORY_WAIT_TIME; | |
452 | do { | |
453 | status = SMC_inb (LAN91C96_INT_STATS); | |
454 | if (status & LAN91C96_IST_ALLOC_INT) { | |
455 | ||
456 | SMC_outb (LAN91C96_IST_ALLOC_INT, LAN91C96_INT_STATS); | |
457 | break; | |
458 | } | |
459 | } while (--time_out); | |
460 | ||
461 | if (!time_out) { | |
462 | PRINTK2 ("%s: memory allocation, try %d failed ...\n", | |
463 | SMC_DEV_NAME, try); | |
464 | if (try < SMC_ALLOC_MAX_TRY) | |
465 | goto again; | |
466 | else | |
467 | return 0; | |
468 | } | |
469 | ||
470 | PRINTK2 ("%s: memory allocation, try %d succeeded ...\n", | |
471 | SMC_DEV_NAME, try); | |
472 | ||
473 | /* I can send the packet now.. */ | |
474 | ||
475 | ioaddr = SMC_BASE_ADDRESS; | |
476 | ||
477 | buf = (byte *) packet; | |
478 | ||
479 | /* If I get here, I _know_ there is a packet slot waiting for me */ | |
480 | packet_no = SMC_inb (LAN91C96_ARR); | |
481 | if (packet_no & LAN91C96_ARR_FAILED) { | |
482 | /* or isn't there? BAD CHIP! */ | |
483 | printf ("%s: Memory allocation failed. \n", SMC_DEV_NAME); | |
484 | return 0; | |
485 | } | |
486 | ||
487 | /* we have a packet address, so tell the card to use it */ | |
488 | SMC_outb (packet_no, LAN91C96_PNR); | |
489 | ||
490 | /* point to the beginning of the packet */ | |
491 | SMC_outw (LAN91C96_PTR_AUTO_INCR, LAN91C96_POINTER); | |
492 | ||
493 | PRINTK3 ("%s: Trying to xmit packet of length %x\n", | |
494 | SMC_DEV_NAME, length); | |
495 | ||
496 | #if SMC_DEBUG > 2 | |
497 | printf ("Transmitting Packet\n"); | |
498 | print_packet (buf, length); | |
499 | #endif | |
500 | ||
501 | /* send the packet length ( +6 for status, length and ctl byte ) | |
502 | and the status word ( set to zeros ) */ | |
503 | #ifdef USE_32_BIT | |
504 | SMC_outl ((length + 6) << 16, LAN91C96_DATA_HIGH); | |
505 | #else | |
506 | SMC_outw (0, LAN91C96_DATA_HIGH); | |
507 | /* send the packet length ( +6 for status words, length, and ctl */ | |
508 | SMC_outw ((length + 6), LAN91C96_DATA_HIGH); | |
509 | #endif /* USE_32_BIT */ | |
510 | ||
511 | /* send the actual data | |
512 | * I _think_ it's faster to send the longs first, and then | |
513 | * mop up by sending the last word. It depends heavily | |
514 | * on alignment, at least on the 486. Maybe it would be | |
515 | * a good idea to check which is optimal? But that could take | |
516 | * almost as much time as is saved? | |
517 | */ | |
518 | #ifdef USE_32_BIT | |
519 | SMC_outsl (LAN91C96_DATA_HIGH, buf, length >> 2); | |
520 | if (length & 0x2) | |
521 | SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))), | |
522 | LAN91C96_DATA_HIGH); | |
523 | #else | |
524 | SMC_outsw (LAN91C96_DATA_HIGH, buf, (length) >> 1); | |
525 | #endif /* USE_32_BIT */ | |
526 | ||
527 | /* Send the last byte, if there is one. */ | |
528 | if ((length & 1) == 0) { | |
529 | SMC_outw (0, LAN91C96_DATA_HIGH); | |
530 | } else { | |
531 | SMC_outw (buf[length - 1] | 0x2000, LAN91C96_DATA_HIGH); | |
532 | } | |
533 | ||
534 | /* and let the chipset deal with it */ | |
535 | SMC_outw (LAN91C96_MMUCR_ENQUEUE, LAN91C96_MMU); | |
536 | ||
537 | /* poll for TX INT */ | |
538 | if (poll4int (LAN91C96_MSK_TX_INT, SMC_TX_TIMEOUT)) { | |
539 | /* sending failed */ | |
540 | PRINTK2 ("%s: TX timeout, sending failed...\n", SMC_DEV_NAME); | |
541 | ||
542 | /* release packet */ | |
543 | SMC_outw (LAN91C96_MMUCR_RELEASE_TX, LAN91C96_MMU); | |
544 | ||
545 | /* wait for MMU getting ready (low) */ | |
546 | while (SMC_inw (LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY) { | |
547 | udelay (10); | |
548 | } | |
549 | ||
550 | PRINTK2 ("MMU ready\n"); | |
551 | ||
552 | ||
553 | return 0; | |
554 | } else { | |
555 | /* ack. int */ | |
556 | SMC_outw (LAN91C96_IST_TX_INT, LAN91C96_INT_STATS); | |
557 | ||
558 | PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME, length); | |
559 | ||
560 | /* release packet */ | |
561 | SMC_outw (LAN91C96_MMUCR_RELEASE_TX, LAN91C96_MMU); | |
562 | ||
563 | /* wait for MMU getting ready (low) */ | |
564 | while (SMC_inw (LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY) { | |
565 | udelay (10); | |
566 | } | |
567 | ||
568 | PRINTK2 ("MMU ready\n"); | |
569 | } | |
570 | ||
571 | return length; | |
572 | } | |
573 | ||
574 | /*------------------------------------------------------------------------- | |
575 | * smc_destructor( struct net_device * dev ) | |
576 | * Input parameters: | |
577 | * dev, pointer to the device structure | |
578 | * | |
579 | * Output: | |
580 | * None. | |
581 | *-------------------------------------------------------------------------- | |
582 | */ | |
583 | void smc_destructor () | |
584 | { | |
585 | PRINTK2 (CARDNAME ":smc_destructor\n"); | |
586 | } | |
587 | ||
588 | ||
589 | /* | |
590 | * Open and Initialize the board | |
591 | * | |
592 | * Set up everything, reset the card, etc .. | |
593 | * | |
594 | */ | |
5ca26799 | 595 | static int smc_open (bd_t *bd) |
45219c46 | 596 | { |
5ca26799 | 597 | int i, err; /* used to set hw ethernet address */ |
45219c46 WD |
598 | |
599 | PRINTK2 ("%s:smc_open\n", SMC_DEV_NAME); | |
600 | ||
601 | /* reset the hardware */ | |
602 | ||
603 | smc_reset (); | |
604 | smc_enable (); | |
605 | ||
606 | SMC_SELECT_BANK (1); | |
607 | ||
5ca26799 | 608 | err = smc_get_ethaddr (bd); /* set smc_mac_addr, and sync it with u-boot globals */ |
03f3d8d3 MF |
609 | if (err < 0) |
610 | return -1; | |
5ca26799 | 611 | #ifdef USE_32_BIT |
45219c46 WD |
612 | for (i = 0; i < 6; i += 2) { |
613 | word address; | |
614 | ||
615 | address = smc_mac_addr[i + 1] << 8; | |
616 | address |= smc_mac_addr[i]; | |
617 | SMC_outw (address, LAN91C96_IA0 + i); | |
618 | } | |
a56bd922 | 619 | #else |
5ca26799 WD |
620 | for (i = 0; i < 6; i++) |
621 | SMC_outb (smc_mac_addr[i], LAN91C96_IA0 + i); | |
622 | #endif | |
45219c46 WD |
623 | return 0; |
624 | } | |
625 | ||
626 | /*------------------------------------------------------------- | |
627 | * | |
628 | * smc_rcv - receive a packet from the card | |
629 | * | |
630 | * There is ( at least ) a packet waiting to be read from | |
631 | * chip-memory. | |
632 | * | |
633 | * o Read the status | |
634 | * o If an error, record it | |
635 | * o otherwise, read in the packet | |
636 | *------------------------------------------------------------- | |
637 | */ | |
638 | static int smc_rcv () | |
639 | { | |
640 | int packet_number; | |
641 | word status; | |
642 | word packet_length; | |
643 | int is_error = 0; | |
644 | ||
645 | #ifdef USE_32_BIT | |
646 | dword stat_len; | |
647 | #endif | |
648 | ||
649 | ||
650 | SMC_SELECT_BANK (2); | |
651 | packet_number = SMC_inw (LAN91C96_FIFO); | |
652 | ||
653 | if (packet_number & LAN91C96_FIFO_RXEMPTY) { | |
654 | return 0; | |
655 | } | |
656 | ||
657 | PRINTK3 ("%s:smc_rcv\n", SMC_DEV_NAME); | |
658 | /* start reading from the start of the packet */ | |
659 | SMC_outw (LAN91C96_PTR_READ | LAN91C96_PTR_RCV | | |
660 | LAN91C96_PTR_AUTO_INCR, LAN91C96_POINTER); | |
661 | ||
662 | /* First two words are status and packet_length */ | |
663 | #ifdef USE_32_BIT | |
664 | stat_len = SMC_inl (LAN91C96_DATA_HIGH); | |
665 | status = stat_len & 0xffff; | |
666 | packet_length = stat_len >> 16; | |
667 | #else | |
668 | status = SMC_inw (LAN91C96_DATA_HIGH); | |
669 | packet_length = SMC_inw (LAN91C96_DATA_HIGH); | |
670 | #endif | |
671 | ||
672 | packet_length &= 0x07ff; /* mask off top bits */ | |
673 | ||
674 | PRINTK2 ("RCV: STATUS %4x LENGTH %4x\n", status, packet_length); | |
675 | ||
676 | if (!(status & FRAME_FILTER)) { | |
677 | /* Adjust for having already read the first two words */ | |
678 | packet_length -= 4; /*4; */ | |
679 | ||
680 | ||
45219c46 WD |
681 | /* set odd length for bug in LAN91C111, */ |
682 | /* which never sets RS_ODDFRAME */ | |
683 | /* TODO ? */ | |
684 | ||
685 | ||
686 | #ifdef USE_32_BIT | |
687 | PRINTK3 (" Reading %d dwords (and %d bytes) \n", | |
688 | packet_length >> 2, packet_length & 3); | |
689 | /* QUESTION: Like in the TX routine, do I want | |
690 | to send the DWORDs or the bytes first, or some | |
691 | mixture. A mixture might improve already slow PIO | |
692 | performance */ | |
693 | SMC_insl (LAN91C96_DATA_HIGH, NetRxPackets[0], packet_length >> 2); | |
694 | /* read the left over bytes */ | |
695 | if (packet_length & 3) { | |
696 | int i; | |
697 | ||
698 | byte *tail = (byte *) (NetRxPackets[0] + (packet_length & ~3)); | |
699 | dword leftover = SMC_inl (LAN91C96_DATA_HIGH); | |
700 | ||
701 | for (i = 0; i < (packet_length & 3); i++) | |
702 | *tail++ = (byte) (leftover >> (8 * i)) & 0xff; | |
703 | } | |
704 | #else | |
705 | PRINTK3 (" Reading %d words and %d byte(s) \n", | |
706 | (packet_length >> 1), packet_length & 1); | |
707 | SMC_insw (LAN91C96_DATA_HIGH, NetRxPackets[0], packet_length >> 1); | |
708 | ||
709 | #endif /* USE_32_BIT */ | |
710 | ||
711 | #if SMC_DEBUG > 2 | |
712 | printf ("Receiving Packet\n"); | |
713 | print_packet (NetRxPackets[0], packet_length); | |
714 | #endif | |
715 | } else { | |
716 | /* error ... */ | |
717 | /* TODO ? */ | |
718 | is_error = 1; | |
719 | } | |
720 | ||
721 | while (SMC_inw (LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY) | |
722 | udelay (1); /* Wait until not busy */ | |
723 | ||
724 | /* error or good, tell the card to get rid of this packet */ | |
725 | SMC_outw (LAN91C96_MMUCR_RELEASE_RX, LAN91C96_MMU); | |
726 | ||
727 | while (SMC_inw (LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY) | |
728 | udelay (1); /* Wait until not busy */ | |
729 | ||
730 | if (!is_error) { | |
731 | /* Pass the packet up to the protocol layers. */ | |
732 | NetReceive (NetRxPackets[0], packet_length); | |
733 | return packet_length; | |
734 | } else { | |
735 | return 0; | |
736 | } | |
737 | ||
738 | } | |
739 | ||
740 | /*---------------------------------------------------- | |
741 | * smc_close | |
742 | * | |
743 | * this makes the board clean up everything that it can | |
744 | * and not talk to the outside world. Caused by | |
745 | * an 'ifconfig ethX down' | |
746 | * | |
747 | -----------------------------------------------------*/ | |
748 | static int smc_close () | |
749 | { | |
750 | PRINTK2 ("%s:smc_close\n", SMC_DEV_NAME); | |
751 | ||
752 | /* clear everything */ | |
753 | smc_shutdown (); | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
758 | #if SMC_DEBUG > 2 | |
759 | static void print_packet (byte * buf, int length) | |
760 | { | |
761 | #if 0 | |
762 | int i; | |
763 | int remainder; | |
764 | int lines; | |
765 | ||
766 | printf ("Packet of length %d \n", length); | |
767 | ||
768 | lines = length / 16; | |
769 | remainder = length % 16; | |
770 | ||
771 | for (i = 0; i < lines; i++) { | |
772 | int cur; | |
773 | ||
774 | for (cur = 0; cur < 8; cur++) { | |
775 | byte a, b; | |
776 | ||
777 | a = *(buf++); | |
778 | b = *(buf++); | |
779 | printf ("%02x%02x ", a, b); | |
780 | } | |
781 | printf ("\n"); | |
782 | } | |
783 | for (i = 0; i < remainder / 2; i++) { | |
784 | byte a, b; | |
785 | ||
786 | a = *(buf++); | |
787 | b = *(buf++); | |
788 | printf ("%02x%02x ", a, b); | |
789 | } | |
790 | printf ("\n"); | |
791 | #endif /* 0 */ | |
792 | } | |
793 | #endif /* SMC_DEBUG > 2 */ | |
794 | ||
795 | int eth_init (bd_t * bd) | |
796 | { | |
5ca26799 | 797 | return (smc_open(bd)); |
45219c46 WD |
798 | } |
799 | ||
800 | void eth_halt () | |
801 | { | |
802 | smc_close (); | |
803 | } | |
804 | ||
805 | int eth_rx () | |
806 | { | |
807 | return smc_rcv (); | |
808 | } | |
809 | ||
810 | int eth_send (volatile void *packet, int length) | |
811 | { | |
812 | return smc_send_packet (packet, length); | |
813 | } | |
814 | ||
45219c46 | 815 | |
39539887 | 816 | #if 0 |
45219c46 WD |
817 | /*------------------------------------------------------------------------- |
818 | * smc_hw_init() | |
819 | * | |
820 | * Function: | |
821 | * Reset and enable the device, check if the I/O space location | |
822 | * is correct | |
823 | * | |
824 | * Input parameters: | |
825 | * None | |
826 | * | |
827 | * Output: | |
828 | * 0 --> success | |
829 | * 1 --> error | |
830 | *-------------------------------------------------------------------------- | |
831 | */ | |
832 | static int smc_hw_init () | |
833 | { | |
834 | unsigned short status_test; | |
835 | ||
836 | /* The attribute register of the LAN91C96 is located at address | |
837 | 0x0e000000 on the lubbock platform */ | |
838 | volatile unsigned *attaddr = (unsigned *) (0x0e000000); | |
839 | ||
840 | /* first reset, then enable the device. Sequence is critical */ | |
841 | attaddr[LAN91C96_ECOR] |= LAN91C96_ECOR_SRESET; | |
842 | udelay (100); | |
843 | attaddr[LAN91C96_ECOR] &= ~LAN91C96_ECOR_SRESET; | |
844 | attaddr[LAN91C96_ECOR] |= LAN91C96_ECOR_ENABLE; | |
845 | ||
846 | /* force 16-bit mode */ | |
847 | attaddr[LAN91C96_ECSR] &= ~LAN91C96_ECSR_IOIS8; | |
848 | udelay (100); | |
849 | ||
850 | /* check if the I/O address is correct, the upper byte of the | |
851 | bank select register should read 0x33 */ | |
852 | ||
853 | status_test = SMC_inw (LAN91C96_BANK_SELECT); | |
854 | if ((status_test & 0xFF00) != 0x3300) { | |
855 | printf ("Failed to initialize ethernetchip\n"); | |
856 | return 1; | |
857 | } | |
858 | return 0; | |
859 | } | |
39539887 | 860 | #endif /* 0 */ |
45219c46 | 861 | |
5ca26799 WD |
862 | /* smc_get_ethaddr (bd_t * bd) |
863 | * | |
864 | * This checks both the environment and the ROM for an ethernet address. If | |
865 | * found, the environment takes precedence. | |
866 | */ | |
867 | ||
868 | int smc_get_ethaddr (bd_t * bd) | |
869 | { | |
03f3d8d3 | 870 | uchar v_mac[6]; |
5ca26799 | 871 | |
03f3d8d3 MF |
872 | if (!eth_getenv_enetaddr("ethaddr", v_mac)) { |
873 | /* get ROM mac value if any */ | |
874 | if (!get_rom_mac(v_mac)) { | |
875 | printf("\n*** ERROR: ethaddr is NOT set !!\n"); | |
876 | return -1; | |
5ca26799 | 877 | } |
03f3d8d3 | 878 | eth_setenv_enetaddr("ethaddr", v_mac); |
5ca26799 WD |
879 | } |
880 | ||
03f3d8d3 MF |
881 | smc_set_mac_addr(v_mac); /* use old function to update smc default */ |
882 | PRINTK("Using MAC Address %pM\n", v_mac); | |
883 | return 0; | |
5ca26799 WD |
884 | } |
885 | ||
a56bd922 | 886 | /* |
5ca26799 WD |
887 | * get_rom_mac() |
888 | * Note, this has omly been tested for the OMAP730 P2. | |
889 | */ | |
890 | ||
d52fb7e3 | 891 | int get_rom_mac (unsigned char *v_rom_mac) |
5ca26799 WD |
892 | { |
893 | #ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */ | |
894 | char hw_mac_addr[] = { 0x02, 0x80, 0xad, 0x20, 0x31, 0xb8 }; | |
895 | ||
896 | memcpy (v_rom_mac, hw_mac_addr, 6); | |
897 | return (1); | |
898 | #else | |
899 | int i; | |
900 | SMC_SELECT_BANK (1); | |
901 | for (i=0; i<6; i++) | |
902 | { | |
903 | v_rom_mac[i] = SMC_inb (LAN91C96_IA0 + i); | |
904 | } | |
905 | return (1); | |
906 | #endif | |
907 | } |