]> git.ipfire.org Git - thirdparty/u-boot.git/blame - drivers/net/macb.h
Add GPL-2.0+ SPDX-License-Identifier to source files
[thirdparty/u-boot.git] / drivers / net / macb.h
CommitLineData
5c1fe1ff
HS
1/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
5c1fe1ff
HS
5 */
6#ifndef __DRIVERS_MACB_H__
7#define __DRIVERS_MACB_H__
8
9/* MACB register offsets */
10#define MACB_NCR 0x0000
11#define MACB_NCFGR 0x0004
12#define MACB_NSR 0x0008
d256be29 13#define GEM_UR 0x000c
5c1fe1ff
HS
14#define MACB_TSR 0x0014
15#define MACB_RBQP 0x0018
16#define MACB_TBQP 0x001c
17#define MACB_RSR 0x0020
18#define MACB_ISR 0x0024
19#define MACB_IER 0x0028
20#define MACB_IDR 0x002c
21#define MACB_IMR 0x0030
22#define MACB_MAN 0x0034
23#define MACB_PTR 0x0038
24#define MACB_PFR 0x003c
25#define MACB_FTO 0x0040
26#define MACB_SCF 0x0044
27#define MACB_MCF 0x0048
28#define MACB_FRO 0x004c
29#define MACB_FCSE 0x0050
30#define MACB_ALE 0x0054
31#define MACB_DTF 0x0058
32#define MACB_LCOL 0x005c
33#define MACB_EXCOL 0x0060
34#define MACB_TUND 0x0064
35#define MACB_CSE 0x0068
36#define MACB_RRE 0x006c
37#define MACB_ROVR 0x0070
38#define MACB_RSE 0x0074
39#define MACB_ELE 0x0078
40#define MACB_RJA 0x007c
41#define MACB_USF 0x0080
42#define MACB_STE 0x0084
43#define MACB_RLE 0x0088
44#define MACB_TPF 0x008c
45#define MACB_HRB 0x0090
46#define MACB_HRT 0x0094
47#define MACB_SA1B 0x0098
48#define MACB_SA1T 0x009c
49#define MACB_SA2B 0x00a0
50#define MACB_SA2T 0x00a4
51#define MACB_SA3B 0x00a8
52#define MACB_SA3T 0x00ac
53#define MACB_SA4B 0x00b0
54#define MACB_SA4T 0x00b4
55#define MACB_TID 0x00b8
56#define MACB_TPQ 0x00bc
57#define MACB_USRIO 0x00c0
58#define MACB_WOL 0x00c4
d256be29 59#define MACB_MID 0x00fc
5c1fe1ff
HS
60
61/* Bitfields in NCR */
62#define MACB_LB_OFFSET 0
63#define MACB_LB_SIZE 1
64#define MACB_LLB_OFFSET 1
65#define MACB_LLB_SIZE 1
66#define MACB_RE_OFFSET 2
67#define MACB_RE_SIZE 1
68#define MACB_TE_OFFSET 3
69#define MACB_TE_SIZE 1
70#define MACB_MPE_OFFSET 4
71#define MACB_MPE_SIZE 1
72#define MACB_CLRSTAT_OFFSET 5
73#define MACB_CLRSTAT_SIZE 1
74#define MACB_INCSTAT_OFFSET 6
75#define MACB_INCSTAT_SIZE 1
76#define MACB_WESTAT_OFFSET 7
77#define MACB_WESTAT_SIZE 1
78#define MACB_BP_OFFSET 8
79#define MACB_BP_SIZE 1
80#define MACB_TSTART_OFFSET 9
81#define MACB_TSTART_SIZE 1
82#define MACB_THALT_OFFSET 10
83#define MACB_THALT_SIZE 1
84#define MACB_NCR_TPF_OFFSET 11
85#define MACB_NCR_TPF_SIZE 1
86#define MACB_TZQ_OFFSET 12
87#define MACB_TZQ_SIZE 1
88
89/* Bitfields in NCFGR */
90#define MACB_SPD_OFFSET 0
91#define MACB_SPD_SIZE 1
92#define MACB_FD_OFFSET 1
93#define MACB_FD_SIZE 1
94#define MACB_BIT_RATE_OFFSET 2
95#define MACB_BIT_RATE_SIZE 1
96#define MACB_JFRAME_OFFSET 3
97#define MACB_JFRAME_SIZE 1
98#define MACB_CAF_OFFSET 4
99#define MACB_CAF_SIZE 1
100#define MACB_NBC_OFFSET 5
101#define MACB_NBC_SIZE 1
102#define MACB_NCFGR_MTI_OFFSET 6
103#define MACB_NCFGR_MTI_SIZE 1
104#define MACB_UNI_OFFSET 7
105#define MACB_UNI_SIZE 1
106#define MACB_BIG_OFFSET 8
107#define MACB_BIG_SIZE 1
108#define MACB_EAE_OFFSET 9
109#define MACB_EAE_SIZE 1
110#define MACB_CLK_OFFSET 10
111#define MACB_CLK_SIZE 2
112#define MACB_RTY_OFFSET 12
113#define MACB_RTY_SIZE 1
114#define MACB_PAE_OFFSET 13
115#define MACB_PAE_SIZE 1
116#define MACB_RBOF_OFFSET 14
117#define MACB_RBOF_SIZE 2
118#define MACB_RLCE_OFFSET 16
119#define MACB_RLCE_SIZE 1
120#define MACB_DRFCS_OFFSET 17
121#define MACB_DRFCS_SIZE 1
122#define MACB_EFRHD_OFFSET 18
123#define MACB_EFRHD_SIZE 1
124#define MACB_IRXFCS_OFFSET 19
125#define MACB_IRXFCS_SIZE 1
126
d256be29
BS
127#define GEM_GBE_OFFSET 10
128#define GEM_GBE_SIZE 1
129#define GEM_CLK_OFFSET 18
130#define GEM_CLK_SIZE 3
131#define GEM_DBW_OFFSET 21
132#define GEM_DBW_SIZE 2
133
5c1fe1ff
HS
134/* Bitfields in NSR */
135#define MACB_NSR_LINK_OFFSET 0
136#define MACB_NSR_LINK_SIZE 1
137#define MACB_MDIO_OFFSET 1
138#define MACB_MDIO_SIZE 1
139#define MACB_IDLE_OFFSET 2
140#define MACB_IDLE_SIZE 1
141
d256be29
BS
142/* Bitfields in UR */
143#define GEM_RGMII_OFFSET 0
144#define GEM_RGMII_SIZE 1
145
5c1fe1ff
HS
146/* Bitfields in TSR */
147#define MACB_UBR_OFFSET 0
148#define MACB_UBR_SIZE 1
149#define MACB_COL_OFFSET 1
150#define MACB_COL_SIZE 1
151#define MACB_TSR_RLE_OFFSET 2
152#define MACB_TSR_RLE_SIZE 1
153#define MACB_TGO_OFFSET 3
154#define MACB_TGO_SIZE 1
155#define MACB_BEX_OFFSET 4
156#define MACB_BEX_SIZE 1
157#define MACB_COMP_OFFSET 5
158#define MACB_COMP_SIZE 1
159#define MACB_UND_OFFSET 6
160#define MACB_UND_SIZE 1
161
162/* Bitfields in RSR */
163#define MACB_BNA_OFFSET 0
164#define MACB_BNA_SIZE 1
165#define MACB_REC_OFFSET 1
166#define MACB_REC_SIZE 1
167#define MACB_OVR_OFFSET 2
168#define MACB_OVR_SIZE 1
169
170/* Bitfields in ISR/IER/IDR/IMR */
171#define MACB_MFD_OFFSET 0
172#define MACB_MFD_SIZE 1
173#define MACB_RCOMP_OFFSET 1
174#define MACB_RCOMP_SIZE 1
175#define MACB_RXUBR_OFFSET 2
176#define MACB_RXUBR_SIZE 1
177#define MACB_TXUBR_OFFSET 3
178#define MACB_TXUBR_SIZE 1
179#define MACB_ISR_TUND_OFFSET 4
180#define MACB_ISR_TUND_SIZE 1
181#define MACB_ISR_RLE_OFFSET 5
182#define MACB_ISR_RLE_SIZE 1
183#define MACB_TXERR_OFFSET 6
184#define MACB_TXERR_SIZE 1
185#define MACB_TCOMP_OFFSET 7
186#define MACB_TCOMP_SIZE 1
187#define MACB_ISR_LINK_OFFSET 9
188#define MACB_ISR_LINK_SIZE 1
189#define MACB_ISR_ROVR_OFFSET 10
190#define MACB_ISR_ROVR_SIZE 1
191#define MACB_HRESP_OFFSET 11
192#define MACB_HRESP_SIZE 1
193#define MACB_PFR_OFFSET 12
194#define MACB_PFR_SIZE 1
195#define MACB_PTZ_OFFSET 13
196#define MACB_PTZ_SIZE 1
197
198/* Bitfields in MAN */
199#define MACB_DATA_OFFSET 0
200#define MACB_DATA_SIZE 16
201#define MACB_CODE_OFFSET 16
202#define MACB_CODE_SIZE 2
203#define MACB_REGA_OFFSET 18
204#define MACB_REGA_SIZE 5
205#define MACB_PHYA_OFFSET 23
206#define MACB_PHYA_SIZE 5
207#define MACB_RW_OFFSET 28
208#define MACB_RW_SIZE 2
209#define MACB_SOF_OFFSET 30
210#define MACB_SOF_SIZE 2
211
212/* Bitfields in USRIO */
213#define MACB_MII_OFFSET 0
214#define MACB_MII_SIZE 1
215#define MACB_EAM_OFFSET 1
216#define MACB_EAM_SIZE 1
217#define MACB_TX_PAUSE_OFFSET 2
218#define MACB_TX_PAUSE_SIZE 1
219#define MACB_TX_PAUSE_ZERO_OFFSET 3
220#define MACB_TX_PAUSE_ZERO_SIZE 1
221
7263ef19
SP
222/* Bitfields in USRIO (AT91) */
223#define MACB_RMII_OFFSET 0
224#define MACB_RMII_SIZE 1
225#define MACB_CLKEN_OFFSET 1
226#define MACB_CLKEN_SIZE 1
227
5c1fe1ff
HS
228/* Bitfields in WOL */
229#define MACB_IP_OFFSET 0
230#define MACB_IP_SIZE 16
231#define MACB_MAG_OFFSET 16
232#define MACB_MAG_SIZE 1
233#define MACB_ARP_OFFSET 17
234#define MACB_ARP_SIZE 1
235#define MACB_SA1_OFFSET 18
236#define MACB_SA1_SIZE 1
237#define MACB_WOL_MTI_OFFSET 19
238#define MACB_WOL_MTI_SIZE 1
239
d256be29
BS
240/* Bitfields in MID */
241#define MACB_IDNUM_OFFSET 16
242#define MACB_IDNUM_SIZE 16
243
244/* Bitfields in DCFG1 */
5c1fe1ff
HS
245/* Constants for CLK */
246#define MACB_CLK_DIV8 0
247#define MACB_CLK_DIV16 1
248#define MACB_CLK_DIV32 2
249#define MACB_CLK_DIV64 3
250
d256be29
BS
251/* GEM specific constants for CLK */
252#define GEM_CLK_DIV8 0
253#define GEM_CLK_DIV16 1
254#define GEM_CLK_DIV32 2
255#define GEM_CLK_DIV48 3
256#define GEM_CLK_DIV64 4
257#define GEM_CLK_DIV96 5
258
5c1fe1ff
HS
259/* Constants for MAN register */
260#define MACB_MAN_SOF 1
261#define MACB_MAN_WRITE 1
262#define MACB_MAN_READ 2
263#define MACB_MAN_CODE 2
264
265/* Bit manipulation macros */
266#define MACB_BIT(name) \
267 (1 << MACB_##name##_OFFSET)
d256be29 268#define MACB_BF(name, value) \
5c1fe1ff
HS
269 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \
270 << MACB_##name##_OFFSET)
d256be29 271#define MACB_BFEXT(name, value)\
5c1fe1ff
HS
272 (((value) >> MACB_##name##_OFFSET) \
273 & ((1 << MACB_##name##_SIZE) - 1))
d256be29 274#define MACB_BFINS(name, value, old) \
5c1fe1ff
HS
275 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \
276 << MACB_##name##_OFFSET)) \
d256be29
BS
277 | MACB_BF(name, value))
278
279#define GEM_BIT(name) \
280 (1 << GEM_##name##_OFFSET)
281#define GEM_BF(name, value) \
282 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
283 << GEM_##name##_OFFSET)
284#define GEM_BFEXT(name, value)\
285 (((value) >> GEM_##name##_OFFSET) \
286 & ((1 << GEM_##name##_SIZE) - 1))
287#define GEM_BFINS(name, value, old) \
288 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
289 << GEM_##name##_OFFSET)) \
290 | GEM_BF(name, value))
5c1fe1ff
HS
291
292/* Register access macros */
d256be29 293#define macb_readl(port, reg) \
5c1fe1ff 294 readl((port)->regs + MACB_##reg)
d256be29 295#define macb_writel(port, reg, value) \
5c1fe1ff 296 writel((value), (port)->regs + MACB_##reg)
d256be29
BS
297#define gem_readl(port, reg) \
298 readl((port)->regs + GEM_##reg)
299#define gem_writel(port, reg, value) \
300 writel((value), (port)->regs + GEM_##reg)
5c1fe1ff
HS
301
302#endif /* __DRIVERS_MACB_H__ */