[people/ms/linux.git] / drivers / net / phy / davicom.c

/*
 * drivers/net/phy/davicom.c
 *
 * Driver for Davicom PHYs
 *
 * Author: Andy Fleming
 *
 * Copyright (c) 2004 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>

#include <asm/io.h>
#include <asm/irq.h>
#include <linux/uaccess.h>

#define MII_DM9161_SCR		0x10
#define MII_DM9161_SCR_INIT	0x0610
#define MII_DM9161_SCR_RMII	0x0100

/* DM9161 Interrupt Register */
#define MII_DM9161_INTR	0x15
#define MII_DM9161_INTR_PEND		0x8000
#define MII_DM9161_INTR_DPLX_MASK	0x0800
#define MII_DM9161_INTR_SPD_MASK	0x0400
#define MII_DM9161_INTR_LINK_MASK	0x0200
#define MII_DM9161_INTR_MASK		0x0100
#define MII_DM9161_INTR_DPLX_CHANGE	0x0010
#define MII_DM9161_INTR_SPD_CHANGE	0x0008
#define MII_DM9161_INTR_LINK_CHANGE	0x0004
#define MII_DM9161_INTR_INIT 		0x0000
#define MII_DM9161_INTR_STOP	\
(MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
 | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)

/* DM9161 10BT Configuration/Status */
#define MII_DM9161_10BTCSR	0x12
#define MII_DM9161_10BTCSR_INIT	0x7800

MODULE_DESCRIPTION("Davicom PHY driver");
MODULE_AUTHOR("Andy Fleming");
MODULE_LICENSE("GPL");


#define DM9161_DELAY 1
static int dm9161_config_intr(struct phy_device *phydev)
{
	int temp;

	temp = phy_read(phydev, MII_DM9161_INTR);

	if (temp < 0)
		return temp;

	if (PHY_INTERRUPT_ENABLED == phydev->interrupts)
		temp &= ~(MII_DM9161_INTR_STOP);
	else
		temp |= MII_DM9161_INTR_STOP;

	temp = phy_write(phydev, MII_DM9161_INTR, temp);

	return temp;
}

static int dm9161_config_aneg(struct phy_device *phydev)
{
	int err;

	/* Isolate the PHY */
	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);

	if (err < 0)
		return err;

	/* Configure the new settings */
	err = genphy_config_aneg(phydev);

	if (err < 0)
		return err;

	return 0;
}

static int dm9161_config_init(struct phy_device *phydev)
{
	int err, temp;

	/* Isolate the PHY */
	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);

	if (err < 0)
		return err;

	switch (phydev->interface) {
	case PHY_INTERFACE_MODE_MII:
		temp = MII_DM9161_SCR_INIT;
		break;
	case PHY_INTERFACE_MODE_RMII:
		temp =  MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII;
		break;
	default:
		return -EINVAL;
	}

	/* Do not bypass the scrambler/descrambler */
	err = phy_write(phydev, MII_DM9161_SCR, temp);
	if (err < 0)
		return err;

	/* Clear 10BTCSR to default */
	err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);

	if (err < 0)
		return err;

	/* Reconnect the PHY, and enable Autonegotiation */
	return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
}

static int dm9161_ack_interrupt(struct phy_device *phydev)
{
	int err = phy_read(phydev, MII_DM9161_INTR);

	return (err < 0) ? err : 0;
}

static struct phy_driver dm91xx_driver[] = {
{
	.phy_id		= 0x0181b880,
	.name		= "Davicom DM9161E",
	.phy_id_mask	= 0x0ffffff0,
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.config_init	= dm9161_config_init,
	.config_aneg	= dm9161_config_aneg,
	.read_status	= genphy_read_status,
	.ack_interrupt	= dm9161_ack_interrupt,
	.config_intr	= dm9161_config_intr,
}, {
	.phy_id		= 0x0181b8b0,
	.name		= "Davicom DM9161B/C",
	.phy_id_mask	= 0x0ffffff0,
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.config_init	= dm9161_config_init,
	.config_aneg	= dm9161_config_aneg,
	.read_status	= genphy_read_status,
	.ack_interrupt	= dm9161_ack_interrupt,
	.config_intr	= dm9161_config_intr,
}, {
	.phy_id		= 0x0181b8a0,
	.name		= "Davicom DM9161A",
	.phy_id_mask	= 0x0ffffff0,
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.config_init	= dm9161_config_init,
	.config_aneg	= dm9161_config_aneg,
	.read_status	= genphy_read_status,
	.ack_interrupt	= dm9161_ack_interrupt,
	.config_intr	= dm9161_config_intr,
}, {
	.phy_id		= 0x00181b80,
	.name		= "Davicom DM9131",
	.phy_id_mask	= 0x0ffffff0,
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.config_aneg	= genphy_config_aneg,
	.read_status	= genphy_read_status,
	.ack_interrupt	= dm9161_ack_interrupt,
	.config_intr	= dm9161_config_intr,
} };

module_phy_driver(dm91xx_driver);

static struct mdio_device_id __maybe_unused davicom_tbl[] = {
	{ 0x0181b880, 0x0ffffff0 },
	{ 0x0181b8b0, 0x0ffffff0 },
	{ 0x0181b8a0, 0x0ffffff0 },
	{ 0x00181b80, 0x0ffffff0 },
	{ }
};

MODULE_DEVICE_TABLE(mdio, davicom_tbl);
Commit	Line	Data
00db8189 AF	1	/*
	2	* drivers/net/phy/davicom.c
	3	*
	4	* Driver for Davicom PHYs
	5	*
	6	* Author: Andy Fleming
	7	*
	8	* Copyright (c) 2004 Freescale Semiconductor, Inc.
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*
	15	*/
00db8189	16	#include <linux/kernel.h>
00db8189 AF	17	#include <linux/string.h>
	18	#include <linux/errno.h>
	19	#include <linux/unistd.h>
00db8189 AF	20	#include <linux/interrupt.h>
	21	#include <linux/init.h>
	22	#include <linux/delay.h>
	23	#include <linux/netdevice.h>
	24	#include <linux/etherdevice.h>
	25	#include <linux/skbuff.h>
	26	#include <linux/spinlock.h>
	27	#include <linux/mm.h>
	28	#include <linux/module.h>
00db8189 AF	29	#include <linux/mii.h>
	30	#include <linux/ethtool.h>
	31	#include <linux/phy.h>
	32
	33	#include <asm/io.h>
	34	#include <asm/irq.h>
7c0f6ba6	35	#include <linux/uaccess.h>
00db8189 AF	36
	37	#define MII_DM9161_SCR 0x10
	38	#define MII_DM9161_SCR_INIT 0x0610
8b7c1664	39	#define MII_DM9161_SCR_RMII 0x0100
00db8189 AF	40
	41	/* DM9161 Interrupt Register */
	42	#define MII_DM9161_INTR 0x15
	43	#define MII_DM9161_INTR_PEND 0x8000
	44	#define MII_DM9161_INTR_DPLX_MASK 0x0800
	45	#define MII_DM9161_INTR_SPD_MASK 0x0400
	46	#define MII_DM9161_INTR_LINK_MASK 0x0200
	47	#define MII_DM9161_INTR_MASK 0x0100
	48	#define MII_DM9161_INTR_DPLX_CHANGE 0x0010
	49	#define MII_DM9161_INTR_SPD_CHANGE 0x0008
	50	#define MII_DM9161_INTR_LINK_CHANGE 0x0004
	51	#define MII_DM9161_INTR_INIT 0x0000
	52	#define MII_DM9161_INTR_STOP \
	53	(MII_DM9161_INTR_DPLX_MASK \| MII_DM9161_INTR_SPD_MASK \
	54	\| MII_DM9161_INTR_LINK_MASK \| MII_DM9161_INTR_MASK)
	55
	56	/* DM9161 10BT Configuration/Status */
	57	#define MII_DM9161_10BTCSR 0x12
	58	#define MII_DM9161_10BTCSR_INIT 0x7800
	59
	60	MODULE_DESCRIPTION("Davicom PHY driver");
	61	MODULE_AUTHOR("Andy Fleming");
	62	MODULE_LICENSE("GPL");
	63
	64
	65	#define DM9161_DELAY 1
	66	static int dm9161_config_intr(struct phy_device *phydev)
	67	{
	68	int temp;
	69
	70	temp = phy_read(phydev, MII_DM9161_INTR);
	71
	72	if (temp < 0)
	73	return temp;
	74
a60e7e1e	75	if (PHY_INTERRUPT_ENABLED == phydev->interrupts)
00db8189 AF	76	temp &= ~(MII_DM9161_INTR_STOP);
	77	else
	78	temp \|= MII_DM9161_INTR_STOP;
	79
	80	temp = phy_write(phydev, MII_DM9161_INTR, temp);
	81
	82	return temp;
	83	}
	84
	85	static int dm9161_config_aneg(struct phy_device *phydev)
	86	{
	87	int err;
	88
	89	/* Isolate the PHY */
	90	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
	91
	92	if (err < 0)
	93	return err;
	94
	95	/* Configure the new settings */
	96	err = genphy_config_aneg(phydev);
	97
	98	if (err < 0)
	99	return err;
	100
	101	return 0;
	102	}
	103
	104	static int dm9161_config_init(struct phy_device *phydev)
	105	{
8b7c1664	106	int err, temp;
00db8189 AF	107
	108	/* Isolate the PHY */
	109	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
	110
	111	if (err < 0)
	112	return err;
	113
8b7c1664 R	114	switch (phydev->interface) {
	115	case PHY_INTERFACE_MODE_MII:
	116	temp = MII_DM9161_SCR_INIT;
	117	break;
	118	case PHY_INTERFACE_MODE_RMII:
	119	temp = MII_DM9161_SCR_INIT \| MII_DM9161_SCR_RMII;
	120	break;
	121	default:
	122	return -EINVAL;
	123	}
00db8189	124
8b7c1664 R	125	/* Do not bypass the scrambler/descrambler */
8b7c1664 R	126	err = phy_write(phydev, MII_DM9161_SCR, temp);
00db8189 AF	127	if (err < 0)
	128	return err;
	129
	130	/* Clear 10BTCSR to default */
	131	err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
	132
	133	if (err < 0)
	134	return err;
	135
	136	/* Reconnect the PHY, and enable Autonegotiation */
8bc47ec6	137	return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
00db8189 AF	138	}
	139
	140	static int dm9161_ack_interrupt(struct phy_device *phydev)
	141	{
	142	int err = phy_read(phydev, MII_DM9161_INTR);
	143
	144	return (err < 0) ? err : 0;
	145	}
	146
d5bf9071 CH	147	static struct phy_driver dm91xx_driver[] = {
d5bf9071 CH	148	{
00db8189 AF	149	.phy_id = 0x0181b880,
	150	.name = "Davicom DM9161E",
	151	.phy_id_mask = 0x0ffffff0,
	152	.features = PHY_BASIC_FEATURES,
63f71dd0	153	.flags = PHY_HAS_INTERRUPT,
00db8189 AF	154	.config_init = dm9161_config_init,
	155	.config_aneg = dm9161_config_aneg,
	156	.read_status = genphy_read_status,
63f71dd0 JE	157	.ack_interrupt = dm9161_ack_interrupt,
63f71dd0 JE	158	.config_intr = dm9161_config_intr,
1059261e GZ	159	}, {
	160	.phy_id = 0x0181b8b0,
	161	.name = "Davicom DM9161B/C",
	162	.phy_id_mask = 0x0ffffff0,
	163	.features = PHY_BASIC_FEATURES,
	164	.flags = PHY_HAS_INTERRUPT,
	165	.config_init = dm9161_config_init,
	166	.config_aneg = dm9161_config_aneg,
	167	.read_status = genphy_read_status,
	168	.ack_interrupt = dm9161_ack_interrupt,
	169	.config_intr = dm9161_config_intr,
d5bf9071	170	}, {
12414db1 KP	171	.phy_id = 0x0181b8a0,
	172	.name = "Davicom DM9161A",
	173	.phy_id_mask = 0x0ffffff0,
	174	.features = PHY_BASIC_FEATURES,
63f71dd0	175	.flags = PHY_HAS_INTERRUPT,
12414db1 KP	176	.config_init = dm9161_config_init,
	177	.config_aneg = dm9161_config_aneg,
	178	.read_status = genphy_read_status,
63f71dd0 JE	179	.ack_interrupt = dm9161_ack_interrupt,
63f71dd0 JE	180	.config_intr = dm9161_config_intr,
d5bf9071	181	}, {
00db8189 AF	182	.phy_id = 0x00181b80,
	183	.name = "Davicom DM9131",
	184	.phy_id_mask = 0x0ffffff0,
	185	.features = PHY_BASIC_FEATURES,
	186	.flags = PHY_HAS_INTERRUPT,
	187	.config_aneg = genphy_config_aneg,
	188	.read_status = genphy_read_status,
	189	.ack_interrupt = dm9161_ack_interrupt,
	190	.config_intr = dm9161_config_intr,
d5bf9071	191	} };
00db8189	192
50fd7150	193	module_phy_driver(dm91xx_driver);
4e4f10f6	194
cf93c945	195	static struct mdio_device_id __maybe_unused davicom_tbl[] = {
4e4f10f6	196	{ 0x0181b880, 0x0ffffff0 },
1059261e	197	{ 0x0181b8b0, 0x0ffffff0 },
4e4f10f6 DW	198	{ 0x0181b8a0, 0x0ffffff0 },
	199	{ 0x00181b80, 0x0ffffff0 },
	200	{ }
	201	};
	202
	203	MODULE_DEVICE_TABLE(mdio, davicom_tbl);