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a2443fd1 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
00db8189 AF |
2 | /* |
3 | * drivers/net/phy/marvell.c | |
4 | * | |
5 | * Driver for Marvell PHYs | |
6 | * | |
7 | * Author: Andy Fleming | |
8 | * | |
9 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
10 | * | |
3871c387 | 11 | * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> |
00db8189 | 12 | */ |
00db8189 | 13 | #include <linux/kernel.h> |
00db8189 | 14 | #include <linux/string.h> |
0b04680f | 15 | #include <linux/ctype.h> |
00db8189 AF |
16 | #include <linux/errno.h> |
17 | #include <linux/unistd.h> | |
0b04680f | 18 | #include <linux/hwmon.h> |
00db8189 AF |
19 | #include <linux/interrupt.h> |
20 | #include <linux/init.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/netdevice.h> | |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/skbuff.h> | |
25 | #include <linux/spinlock.h> | |
26 | #include <linux/mm.h> | |
27 | #include <linux/module.h> | |
00db8189 AF |
28 | #include <linux/mii.h> |
29 | #include <linux/ethtool.h> | |
fc879f72 | 30 | #include <linux/ethtool_netlink.h> |
00db8189 | 31 | #include <linux/phy.h> |
2f495c39 | 32 | #include <linux/marvell_phy.h> |
69f42be8 | 33 | #include <linux/bitfield.h> |
cf41a51d | 34 | #include <linux/of.h> |
00db8189 | 35 | |
eea3b201 | 36 | #include <linux/io.h> |
00db8189 | 37 | #include <asm/irq.h> |
eea3b201 | 38 | #include <linux/uaccess.h> |
00db8189 | 39 | |
27d916d6 | 40 | #define MII_MARVELL_PHY_PAGE 22 |
52295666 AL |
41 | #define MII_MARVELL_COPPER_PAGE 0x00 |
42 | #define MII_MARVELL_FIBER_PAGE 0x01 | |
43 | #define MII_MARVELL_MSCR_PAGE 0x02 | |
44 | #define MII_MARVELL_LED_PAGE 0x03 | |
0c9bcc1d | 45 | #define MII_MARVELL_VCT5_PAGE 0x05 |
52295666 | 46 | #define MII_MARVELL_MISC_TEST_PAGE 0x06 |
fc879f72 | 47 | #define MII_MARVELL_VCT7_PAGE 0x07 |
52295666 | 48 | #define MII_MARVELL_WOL_PAGE 0x11 |
27d916d6 | 49 | |
00db8189 AF |
50 | #define MII_M1011_IEVENT 0x13 |
51 | #define MII_M1011_IEVENT_CLEAR 0x0000 | |
52 | ||
53 | #define MII_M1011_IMASK 0x12 | |
54 | #define MII_M1011_IMASK_INIT 0x6400 | |
55 | #define MII_M1011_IMASK_CLEAR 0x0000 | |
56 | ||
fecd5e91 AL |
57 | #define MII_M1011_PHY_SCR 0x10 |
58 | #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) | |
f8d975be | 59 | #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) |
a3bdfce7 | 60 | #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 |
fecd5e91 AL |
61 | #define MII_M1011_PHY_SCR_MDI (0x0 << 5) |
62 | #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) | |
63 | #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) | |
76884679 | 64 | |
a3bdfce7 HK |
65 | #define MII_M1011_PHY_SSR 0x11 |
66 | #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) | |
67 | ||
76884679 AF |
68 | #define MII_M1111_PHY_LED_CONTROL 0x18 |
69 | #define MII_M1111_PHY_LED_DIRECT 0x4100 | |
70 | #define MII_M1111_PHY_LED_COMBINE 0x411c | |
895ee682 | 71 | #define MII_M1111_PHY_EXT_CR 0x14 |
5c6bc519 HK |
72 | #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) |
73 | #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 | |
74 | #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) | |
61111598 AL |
75 | #define MII_M1111_RGMII_RX_DELAY BIT(7) |
76 | #define MII_M1111_RGMII_TX_DELAY BIT(1) | |
895ee682 | 77 | #define MII_M1111_PHY_EXT_SR 0x1b |
be937f1f AS |
78 | |
79 | #define MII_M1111_HWCFG_MODE_MASK 0xf | |
be937f1f | 80 | #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 |
4117b5be | 81 | #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 |
865b813a | 82 | #define MII_M1111_HWCFG_MODE_RTBI 0x7 |
5f8cbc13 | 83 | #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 |
865b813a AL |
84 | #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb |
85 | #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) | |
86 | #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) | |
be937f1f | 87 | |
c477d044 CC |
88 | #define MII_88E1121_PHY_MSCR_REG 21 |
89 | #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) | |
90 | #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) | |
424ca4c5 | 91 | #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) |
c477d044 | 92 | |
0b04680f AL |
93 | #define MII_88E1121_MISC_TEST 0x1a |
94 | #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 | |
95 | #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 | |
96 | #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) | |
97 | #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) | |
98 | #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) | |
99 | #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f | |
100 | ||
101 | #define MII_88E1510_TEMP_SENSOR 0x1b | |
102 | #define MII_88E1510_TEMP_SENSOR_MASK 0xff | |
103 | ||
69f42be8 HK |
104 | #define MII_88E1540_COPPER_CTRL3 0x1a |
105 | #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) | |
106 | #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 | |
107 | #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 | |
108 | #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 | |
109 | #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 | |
110 | #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) | |
111 | ||
fee2d546 AL |
112 | #define MII_88E6390_MISC_TEST 0x1b |
113 | #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 | |
114 | #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) | |
115 | #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) | |
116 | #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 | |
117 | #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) | |
118 | ||
119 | #define MII_88E6390_TEMP_SENSOR 0x1c | |
120 | #define MII_88E6390_TEMP_SENSOR_MASK 0xff | |
121 | #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 | |
122 | ||
337ac9d5 CC |
123 | #define MII_88E1318S_PHY_MSCR1_REG 16 |
124 | #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) | |
3ff1c259 | 125 | |
3871c387 | 126 | /* Copper Specific Interrupt Enable Register */ |
8cf8b87b | 127 | #define MII_88E1318S_PHY_CSIER 0x12 |
3871c387 | 128 | /* WOL Event Interrupt Enable */ |
8cf8b87b | 129 | #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) |
3871c387 MS |
130 | |
131 | /* LED Timer Control Register */ | |
8cf8b87b AL |
132 | #define MII_88E1318S_PHY_LED_TCR 0x12 |
133 | #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) | |
134 | #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) | |
135 | #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) | |
3871c387 MS |
136 | |
137 | /* Magic Packet MAC address registers */ | |
8cf8b87b AL |
138 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 |
139 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 | |
140 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 | |
3871c387 | 141 | |
8cf8b87b AL |
142 | #define MII_88E1318S_PHY_WOL_CTRL 0x10 |
143 | #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) | |
144 | #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) | |
3871c387 | 145 | |
07777246 | 146 | #define MII_PHY_LED_CTRL 16 |
140bc929 | 147 | #define MII_88E1121_PHY_LED_DEF 0x0030 |
07777246 | 148 | #define MII_88E1510_PHY_LED_DEF 0x1177 |
a93f7fe1 | 149 | #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 |
140bc929 | 150 | |
be937f1f AS |
151 | #define MII_M1011_PHY_STATUS 0x11 |
152 | #define MII_M1011_PHY_STATUS_1000 0x8000 | |
153 | #define MII_M1011_PHY_STATUS_100 0x4000 | |
154 | #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 | |
155 | #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 | |
156 | #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 | |
157 | #define MII_M1011_PHY_STATUS_LINK 0x0400 | |
158 | ||
6b358aed SH |
159 | #define MII_88E3016_PHY_SPEC_CTRL 0x10 |
160 | #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 | |
161 | #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 | |
76884679 | 162 | |
930b37ee SR |
163 | #define MII_88E1510_GEN_CTRL_REG_1 0x14 |
164 | #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 | |
165 | #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ | |
166 | #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ | |
167 | ||
0c9bcc1d AL |
168 | #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 |
169 | #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 | |
170 | #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 | |
171 | #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 | |
172 | #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 | |
173 | #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 | |
174 | #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) | |
175 | ||
176 | #define MII_VCT5_CTRL 0x17 | |
177 | #define MII_VCT5_CTRL_ENABLE BIT(15) | |
178 | #define MII_VCT5_CTRL_COMPLETE BIT(14) | |
179 | #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) | |
180 | #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) | |
181 | #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) | |
182 | #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) | |
183 | #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) | |
184 | #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) | |
185 | #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) | |
186 | #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) | |
187 | #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) | |
188 | #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) | |
189 | #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) | |
190 | #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) | |
191 | #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) | |
192 | #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) | |
193 | #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 | |
194 | #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) | |
195 | #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) | |
196 | #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) | |
197 | #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) | |
198 | #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 | |
199 | ||
200 | #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 | |
f2bc8ad3 | 201 | #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 |
0c9bcc1d AL |
202 | #define MII_VCT5_TX_PULSE_CTRL 0x1c |
203 | #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) | |
204 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) | |
205 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) | |
206 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) | |
207 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) | |
208 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 | |
209 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) | |
210 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) | |
211 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) | |
212 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) | |
213 | #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 | |
214 | #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) | |
215 | #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) | |
216 | ||
db8668a1 AL |
217 | /* For TDR measurements less than 11 meters, a short pulse should be |
218 | * used. | |
219 | */ | |
220 | #define TDR_SHORT_CABLE_LENGTH 11 | |
221 | ||
fc879f72 AL |
222 | #define MII_VCT7_PAIR_0_DISTANCE 0x10 |
223 | #define MII_VCT7_PAIR_1_DISTANCE 0x11 | |
224 | #define MII_VCT7_PAIR_2_DISTANCE 0x12 | |
225 | #define MII_VCT7_PAIR_3_DISTANCE 0x13 | |
226 | ||
227 | #define MII_VCT7_RESULTS 0x14 | |
228 | #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 | |
229 | #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 | |
230 | #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 | |
231 | #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f | |
232 | #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 | |
233 | #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 | |
234 | #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 | |
235 | #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 | |
236 | #define MII_VCT7_RESULTS_INVALID 0 | |
237 | #define MII_VCT7_RESULTS_OK 1 | |
238 | #define MII_VCT7_RESULTS_OPEN 2 | |
239 | #define MII_VCT7_RESULTS_SAME_SHORT 3 | |
240 | #define MII_VCT7_RESULTS_CROSS_SHORT 4 | |
241 | #define MII_VCT7_RESULTS_BUSY 9 | |
242 | ||
243 | #define MII_VCT7_CTRL 0x15 | |
244 | #define MII_VCT7_CTRL_RUN_NOW BIT(15) | |
245 | #define MII_VCT7_CTRL_RUN_ANEG BIT(14) | |
246 | #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) | |
247 | #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) | |
248 | #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) | |
249 | #define MII_VCT7_CTRL_METERS BIT(10) | |
250 | #define MII_VCT7_CTRL_CENTIMETERS 0 | |
251 | ||
8cf8b87b | 252 | #define LPA_PAUSE_FIBER 0x180 |
6cfb3bcc CAC |
253 | #define LPA_PAUSE_ASYM_FIBER 0x100 |
254 | ||
2170fef7 | 255 | #define NB_FIBER_STATS 1 |
6cfb3bcc | 256 | |
00db8189 AF |
257 | MODULE_DESCRIPTION("Marvell PHY driver"); |
258 | MODULE_AUTHOR("Andy Fleming"); | |
259 | MODULE_LICENSE("GPL"); | |
260 | ||
d2fa47d9 AL |
261 | struct marvell_hw_stat { |
262 | const char *string; | |
263 | u8 page; | |
264 | u8 reg; | |
265 | u8 bits; | |
266 | }; | |
267 | ||
268 | static struct marvell_hw_stat marvell_hw_stats[] = { | |
2170fef7 | 269 | { "phy_receive_errors_copper", 0, 21, 16}, |
d2fa47d9 | 270 | { "phy_idle_errors", 0, 10, 8 }, |
2170fef7 | 271 | { "phy_receive_errors_fiber", 1, 21, 16}, |
d2fa47d9 AL |
272 | }; |
273 | ||
274 | struct marvell_priv { | |
275 | u64 stats[ARRAY_SIZE(marvell_hw_stats)]; | |
0b04680f AL |
276 | char *hwmon_name; |
277 | struct device *hwmon_dev; | |
0c9bcc1d | 278 | bool cable_test_tdr; |
f2bc8ad3 AL |
279 | u32 first; |
280 | u32 last; | |
281 | u32 step; | |
282 | s8 pair; | |
d2fa47d9 AL |
283 | }; |
284 | ||
424ca4c5 | 285 | static int marvell_read_page(struct phy_device *phydev) |
6427bb2d | 286 | { |
424ca4c5 | 287 | return __phy_read(phydev, MII_MARVELL_PHY_PAGE); |
6427bb2d AL |
288 | } |
289 | ||
424ca4c5 | 290 | static int marvell_write_page(struct phy_device *phydev, int page) |
6427bb2d | 291 | { |
424ca4c5 | 292 | return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); |
6427bb2d AL |
293 | } |
294 | ||
424ca4c5 | 295 | static int marvell_set_page(struct phy_device *phydev, int page) |
53798328 | 296 | { |
424ca4c5 | 297 | return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); |
53798328 AL |
298 | } |
299 | ||
00db8189 AF |
300 | static int marvell_ack_interrupt(struct phy_device *phydev) |
301 | { | |
302 | int err; | |
303 | ||
304 | /* Clear the interrupts by reading the reg */ | |
305 | err = phy_read(phydev, MII_M1011_IEVENT); | |
306 | ||
307 | if (err < 0) | |
308 | return err; | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | static int marvell_config_intr(struct phy_device *phydev) | |
314 | { | |
315 | int err; | |
316 | ||
76884679 | 317 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
23beb38f AL |
318 | err = phy_write(phydev, MII_M1011_IMASK, |
319 | MII_M1011_IMASK_INIT); | |
00db8189 | 320 | else |
23beb38f AL |
321 | err = phy_write(phydev, MII_M1011_IMASK, |
322 | MII_M1011_IMASK_CLEAR); | |
00db8189 AF |
323 | |
324 | return err; | |
325 | } | |
326 | ||
239aa55b DT |
327 | static int marvell_set_polarity(struct phy_device *phydev, int polarity) |
328 | { | |
329 | int reg; | |
330 | int err; | |
331 | int val; | |
332 | ||
333 | /* get the current settings */ | |
334 | reg = phy_read(phydev, MII_M1011_PHY_SCR); | |
335 | if (reg < 0) | |
336 | return reg; | |
337 | ||
338 | val = reg; | |
339 | val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; | |
340 | switch (polarity) { | |
341 | case ETH_TP_MDI: | |
342 | val |= MII_M1011_PHY_SCR_MDI; | |
343 | break; | |
344 | case ETH_TP_MDI_X: | |
345 | val |= MII_M1011_PHY_SCR_MDI_X; | |
346 | break; | |
347 | case ETH_TP_MDI_AUTO: | |
348 | case ETH_TP_MDI_INVALID: | |
349 | default: | |
350 | val |= MII_M1011_PHY_SCR_AUTO_CROSS; | |
351 | break; | |
352 | } | |
353 | ||
354 | if (val != reg) { | |
355 | /* Set the new polarity value in the register */ | |
356 | err = phy_write(phydev, MII_M1011_PHY_SCR, val); | |
357 | if (err) | |
358 | return err; | |
359 | } | |
360 | ||
d6ab9336 | 361 | return val != reg; |
239aa55b DT |
362 | } |
363 | ||
00db8189 AF |
364 | static int marvell_config_aneg(struct phy_device *phydev) |
365 | { | |
d6ab9336 | 366 | int changed = 0; |
00db8189 AF |
367 | int err; |
368 | ||
4e26c5c3 | 369 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); |
76884679 AF |
370 | if (err < 0) |
371 | return err; | |
372 | ||
d6ab9336 FF |
373 | changed = err; |
374 | ||
76884679 AF |
375 | err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, |
376 | MII_M1111_PHY_LED_DIRECT); | |
377 | if (err < 0) | |
378 | return err; | |
00db8189 AF |
379 | |
380 | err = genphy_config_aneg(phydev); | |
8ff44985 AV |
381 | if (err < 0) |
382 | return err; | |
00db8189 | 383 | |
d6ab9336 | 384 | if (phydev->autoneg != AUTONEG_ENABLE || changed) { |
0c3439bc | 385 | /* A write to speed/duplex bits (that is performed by |
8ff44985 AV |
386 | * genphy_config_aneg() call above) must be followed by |
387 | * a software reset. Otherwise, the write has no effect. | |
388 | */ | |
34386344 | 389 | err = genphy_soft_reset(phydev); |
8ff44985 AV |
390 | if (err < 0) |
391 | return err; | |
392 | } | |
393 | ||
394 | return 0; | |
00db8189 AF |
395 | } |
396 | ||
f2899788 AL |
397 | static int m88e1101_config_aneg(struct phy_device *phydev) |
398 | { | |
399 | int err; | |
400 | ||
401 | /* This Marvell PHY has an errata which requires | |
402 | * that certain registers get written in order | |
403 | * to restart autonegotiation | |
404 | */ | |
34386344 | 405 | err = genphy_soft_reset(phydev); |
f2899788 AL |
406 | if (err < 0) |
407 | return err; | |
408 | ||
409 | err = phy_write(phydev, 0x1d, 0x1f); | |
410 | if (err < 0) | |
411 | return err; | |
412 | ||
413 | err = phy_write(phydev, 0x1e, 0x200c); | |
414 | if (err < 0) | |
415 | return err; | |
416 | ||
417 | err = phy_write(phydev, 0x1d, 0x5); | |
418 | if (err < 0) | |
419 | return err; | |
420 | ||
421 | err = phy_write(phydev, 0x1e, 0); | |
422 | if (err < 0) | |
423 | return err; | |
424 | ||
425 | err = phy_write(phydev, 0x1e, 0x100); | |
426 | if (err < 0) | |
427 | return err; | |
428 | ||
429 | return marvell_config_aneg(phydev); | |
430 | } | |
431 | ||
5cd119d9 | 432 | #if IS_ENABLED(CONFIG_OF_MDIO) |
0c3439bc | 433 | /* Set and/or override some configuration registers based on the |
cf41a51d DD |
434 | * marvell,reg-init property stored in the of_node for the phydev. |
435 | * | |
436 | * marvell,reg-init = <reg-page reg mask value>,...; | |
437 | * | |
438 | * There may be one or more sets of <reg-page reg mask value>: | |
439 | * | |
440 | * reg-page: which register bank to use. | |
441 | * reg: the register. | |
442 | * mask: if non-zero, ANDed with existing register value. | |
443 | * value: ORed with the masked value and written to the regiser. | |
444 | * | |
445 | */ | |
446 | static int marvell_of_reg_init(struct phy_device *phydev) | |
447 | { | |
448 | const __be32 *paddr; | |
424ca4c5 | 449 | int len, i, saved_page, current_page, ret = 0; |
cf41a51d | 450 | |
e5a03bfd | 451 | if (!phydev->mdio.dev.of_node) |
cf41a51d DD |
452 | return 0; |
453 | ||
e5a03bfd AL |
454 | paddr = of_get_property(phydev->mdio.dev.of_node, |
455 | "marvell,reg-init", &len); | |
cf41a51d DD |
456 | if (!paddr || len < (4 * sizeof(*paddr))) |
457 | return 0; | |
458 | ||
424ca4c5 | 459 | saved_page = phy_save_page(phydev); |
cf41a51d | 460 | if (saved_page < 0) |
424ca4c5 | 461 | goto err; |
cf41a51d DD |
462 | current_page = saved_page; |
463 | ||
cf41a51d DD |
464 | len /= sizeof(*paddr); |
465 | for (i = 0; i < len - 3; i += 4) { | |
6427bb2d | 466 | u16 page = be32_to_cpup(paddr + i); |
cf41a51d DD |
467 | u16 reg = be32_to_cpup(paddr + i + 1); |
468 | u16 mask = be32_to_cpup(paddr + i + 2); | |
469 | u16 val_bits = be32_to_cpup(paddr + i + 3); | |
470 | int val; | |
471 | ||
6427bb2d AL |
472 | if (page != current_page) { |
473 | current_page = page; | |
424ca4c5 | 474 | ret = marvell_write_page(phydev, page); |
cf41a51d DD |
475 | if (ret < 0) |
476 | goto err; | |
477 | } | |
478 | ||
479 | val = 0; | |
480 | if (mask) { | |
424ca4c5 | 481 | val = __phy_read(phydev, reg); |
cf41a51d DD |
482 | if (val < 0) { |
483 | ret = val; | |
484 | goto err; | |
485 | } | |
486 | val &= mask; | |
487 | } | |
488 | val |= val_bits; | |
489 | ||
424ca4c5 | 490 | ret = __phy_write(phydev, reg, val); |
cf41a51d DD |
491 | if (ret < 0) |
492 | goto err; | |
cf41a51d DD |
493 | } |
494 | err: | |
424ca4c5 | 495 | return phy_restore_page(phydev, saved_page, ret); |
cf41a51d DD |
496 | } |
497 | #else | |
498 | static int marvell_of_reg_init(struct phy_device *phydev) | |
499 | { | |
500 | return 0; | |
501 | } | |
502 | #endif /* CONFIG_OF_MDIO */ | |
503 | ||
864dc729 | 504 | static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) |
140bc929 | 505 | { |
424ca4c5 | 506 | int mscr; |
864dc729 AL |
507 | |
508 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) | |
424ca4c5 RK |
509 | mscr = MII_88E1121_PHY_MSCR_RX_DELAY | |
510 | MII_88E1121_PHY_MSCR_TX_DELAY; | |
864dc729 | 511 | else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) |
424ca4c5 | 512 | mscr = MII_88E1121_PHY_MSCR_RX_DELAY; |
864dc729 | 513 | else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) |
424ca4c5 RK |
514 | mscr = MII_88E1121_PHY_MSCR_TX_DELAY; |
515 | else | |
516 | mscr = 0; | |
140bc929 | 517 | |
424ca4c5 RK |
518 | return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, |
519 | MII_88E1121_PHY_MSCR_REG, | |
520 | MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); | |
864dc729 AL |
521 | } |
522 | ||
523 | static int m88e1121_config_aneg(struct phy_device *phydev) | |
524 | { | |
d6ab9336 | 525 | int changed = 0; |
864dc729 AL |
526 | int err = 0; |
527 | ||
528 | if (phy_interface_is_rgmii(phydev)) { | |
529 | err = m88e1121_config_aneg_rgmii_delays(phydev); | |
fea23fb5 | 530 | if (err < 0) |
864dc729 AL |
531 | return err; |
532 | } | |
533 | ||
d6ab9336 | 534 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); |
140bc929 SP |
535 | if (err < 0) |
536 | return err; | |
537 | ||
d6ab9336 FF |
538 | changed = err; |
539 | ||
540 | err = genphy_config_aneg(phydev); | |
140bc929 SP |
541 | if (err < 0) |
542 | return err; | |
543 | ||
4b1bd697 | 544 | if (phydev->autoneg != AUTONEG_ENABLE || changed) { |
d6ab9336 FF |
545 | /* A software reset is used to ensure a "commit" of the |
546 | * changes is done. | |
547 | */ | |
548 | err = genphy_soft_reset(phydev); | |
549 | if (err < 0) | |
550 | return err; | |
551 | } | |
552 | ||
553 | return 0; | |
140bc929 SP |
554 | } |
555 | ||
337ac9d5 | 556 | static int m88e1318_config_aneg(struct phy_device *phydev) |
3ff1c259 | 557 | { |
424ca4c5 | 558 | int err; |
3ff1c259 | 559 | |
424ca4c5 RK |
560 | err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, |
561 | MII_88E1318S_PHY_MSCR1_REG, | |
562 | 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); | |
3ff1c259 CC |
563 | if (err < 0) |
564 | return err; | |
565 | ||
566 | return m88e1121_config_aneg(phydev); | |
567 | } | |
568 | ||
78301ebe | 569 | /** |
3c1bcc86 AL |
570 | * linkmode_adv_to_fiber_adv_t |
571 | * @advertise: the linkmode advertisement settings | |
78301ebe | 572 | * |
3c1bcc86 AL |
573 | * A small helper function that translates linkmode advertisement |
574 | * settings to phy autonegotiation advertisements for the MII_ADV | |
575 | * register for fiber link. | |
78301ebe | 576 | */ |
3c1bcc86 | 577 | static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) |
78301ebe CAC |
578 | { |
579 | u32 result = 0; | |
580 | ||
3c1bcc86 | 581 | if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) |
20ecf424 | 582 | result |= ADVERTISE_1000XHALF; |
3c1bcc86 | 583 | if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) |
20ecf424 | 584 | result |= ADVERTISE_1000XFULL; |
78301ebe | 585 | |
3c1bcc86 AL |
586 | if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && |
587 | linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) | |
20ecf424 | 588 | result |= ADVERTISE_1000XPSE_ASYM; |
3c1bcc86 | 589 | else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) |
20ecf424 | 590 | result |= ADVERTISE_1000XPAUSE; |
78301ebe CAC |
591 | |
592 | return result; | |
593 | } | |
594 | ||
595 | /** | |
596 | * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR | |
597 | * @phydev: target phy_device struct | |
598 | * | |
599 | * Description: If auto-negotiation is enabled, we configure the | |
600 | * advertising, and then restart auto-negotiation. If it is not | |
601 | * enabled, then we write the BMCR. Adapted for fiber link in | |
602 | * some Marvell's devices. | |
603 | */ | |
604 | static int marvell_config_aneg_fiber(struct phy_device *phydev) | |
605 | { | |
606 | int changed = 0; | |
607 | int err; | |
9f4bae70 | 608 | u16 adv; |
78301ebe CAC |
609 | |
610 | if (phydev->autoneg != AUTONEG_ENABLE) | |
611 | return genphy_setup_forced(phydev); | |
612 | ||
613 | /* Only allow advertising what this PHY supports */ | |
3c1bcc86 AL |
614 | linkmode_and(phydev->advertising, phydev->advertising, |
615 | phydev->supported); | |
78301ebe | 616 | |
9f4bae70 | 617 | adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); |
78301ebe | 618 | |
9f4bae70 RK |
619 | /* Setup fiber advertisement */ |
620 | err = phy_modify_changed(phydev, MII_ADVERTISE, | |
621 | ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | | |
622 | ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, | |
623 | adv); | |
624 | if (err < 0) | |
625 | return err; | |
626 | if (err > 0) | |
78301ebe | 627 | changed = 1; |
78301ebe | 628 | |
b5abac2d | 629 | return genphy_check_and_restart_aneg(phydev, changed); |
78301ebe CAC |
630 | } |
631 | ||
10e24caa MS |
632 | static int m88e1510_config_aneg(struct phy_device *phydev) |
633 | { | |
634 | int err; | |
635 | ||
52295666 | 636 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe CAC |
637 | if (err < 0) |
638 | goto error; | |
639 | ||
640 | /* Configure the copper link first */ | |
10e24caa MS |
641 | err = m88e1318_config_aneg(phydev); |
642 | if (err < 0) | |
78301ebe | 643 | goto error; |
10e24caa | 644 | |
de9c4e06 RK |
645 | /* Do not touch the fiber page if we're in copper->sgmii mode */ |
646 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) | |
647 | return 0; | |
648 | ||
78301ebe | 649 | /* Then the fiber link */ |
52295666 | 650 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
78301ebe CAC |
651 | if (err < 0) |
652 | goto error; | |
653 | ||
654 | err = marvell_config_aneg_fiber(phydev); | |
655 | if (err < 0) | |
656 | goto error; | |
657 | ||
52295666 | 658 | return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe CAC |
659 | |
660 | error: | |
52295666 | 661 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe | 662 | return err; |
79be1a1c CG |
663 | } |
664 | ||
07777246 WD |
665 | static void marvell_config_led(struct phy_device *phydev) |
666 | { | |
667 | u16 def_config; | |
668 | int err; | |
669 | ||
670 | switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { | |
671 | /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ | |
672 | case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): | |
673 | case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): | |
674 | def_config = MII_88E1121_PHY_LED_DEF; | |
675 | break; | |
676 | /* Default PHY LED config: | |
677 | * LED[0] .. 1000Mbps Link | |
678 | * LED[1] .. 100Mbps Link | |
679 | * LED[2] .. Blink, Activity | |
680 | */ | |
681 | case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): | |
a93f7fe1 JS |
682 | if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) |
683 | def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; | |
684 | else | |
685 | def_config = MII_88E1510_PHY_LED_DEF; | |
07777246 WD |
686 | break; |
687 | default: | |
688 | return; | |
689 | } | |
690 | ||
691 | err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, | |
692 | def_config); | |
693 | if (err < 0) | |
ab2a605f | 694 | phydev_warn(phydev, "Fail to config marvell phy LED.\n"); |
07777246 WD |
695 | } |
696 | ||
79be1a1c CG |
697 | static int marvell_config_init(struct phy_device *phydev) |
698 | { | |
07777246 WD |
699 | /* Set defalut LED */ |
700 | marvell_config_led(phydev); | |
701 | ||
79be1a1c | 702 | /* Set registers from marvell,reg-init DT property */ |
10e24caa MS |
703 | return marvell_of_reg_init(phydev); |
704 | } | |
705 | ||
6b358aed SH |
706 | static int m88e3016_config_init(struct phy_device *phydev) |
707 | { | |
fea23fb5 | 708 | int ret; |
6b358aed SH |
709 | |
710 | /* Enable Scrambler and Auto-Crossover */ | |
fea23fb5 | 711 | ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, |
f102852f | 712 | MII_88E3016_DISABLE_SCRAMBLER, |
fea23fb5 RK |
713 | MII_88E3016_AUTO_MDIX_CROSSOVER); |
714 | if (ret < 0) | |
715 | return ret; | |
6b358aed | 716 | |
79be1a1c | 717 | return marvell_config_init(phydev); |
6b358aed SH |
718 | } |
719 | ||
865b813a AL |
720 | static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, |
721 | u16 mode, | |
722 | int fibre_copper_auto) | |
723 | { | |
865b813a | 724 | if (fibre_copper_auto) |
fea23fb5 | 725 | mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; |
865b813a | 726 | |
fea23fb5 | 727 | return phy_modify(phydev, MII_M1111_PHY_EXT_SR, |
f102852f RK |
728 | MII_M1111_HWCFG_MODE_MASK | |
729 | MII_M1111_HWCFG_FIBER_COPPER_AUTO | | |
730 | MII_M1111_HWCFG_FIBER_COPPER_RES, | |
fea23fb5 | 731 | mode); |
865b813a AL |
732 | } |
733 | ||
61111598 | 734 | static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) |
895ee682 | 735 | { |
fea23fb5 | 736 | int delay; |
895ee682 | 737 | |
e1dde8dc | 738 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
fea23fb5 | 739 | delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; |
e1dde8dc | 740 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { |
fea23fb5 | 741 | delay = MII_M1111_RGMII_RX_DELAY; |
e1dde8dc | 742 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { |
fea23fb5 RK |
743 | delay = MII_M1111_RGMII_TX_DELAY; |
744 | } else { | |
745 | delay = 0; | |
e1dde8dc | 746 | } |
895ee682 | 747 | |
fea23fb5 | 748 | return phy_modify(phydev, MII_M1111_PHY_EXT_CR, |
f102852f | 749 | MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, |
fea23fb5 | 750 | delay); |
61111598 AL |
751 | } |
752 | ||
753 | static int m88e1111_config_init_rgmii(struct phy_device *phydev) | |
754 | { | |
755 | int temp; | |
756 | int err; | |
757 | ||
758 | err = m88e1111_config_init_rgmii_delays(phydev); | |
e1dde8dc AL |
759 | if (err < 0) |
760 | return err; | |
9daf5a76 | 761 | |
e1dde8dc AL |
762 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); |
763 | if (temp < 0) | |
764 | return temp; | |
895ee682 | 765 | |
e1dde8dc | 766 | temp &= ~(MII_M1111_HWCFG_MODE_MASK); |
be937f1f | 767 | |
e1dde8dc AL |
768 | if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) |
769 | temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; | |
770 | else | |
771 | temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; | |
895ee682 | 772 | |
e1dde8dc AL |
773 | return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); |
774 | } | |
895ee682 | 775 | |
e1dde8dc AL |
776 | static int m88e1111_config_init_sgmii(struct phy_device *phydev) |
777 | { | |
778 | int err; | |
4117b5be | 779 | |
865b813a AL |
780 | err = m88e1111_config_init_hwcfg_mode( |
781 | phydev, | |
782 | MII_M1111_HWCFG_MODE_SGMII_NO_CLK, | |
783 | MII_M1111_HWCFG_FIBER_COPPER_AUTO); | |
e1dde8dc AL |
784 | if (err < 0) |
785 | return err; | |
07151bc9 | 786 | |
e1dde8dc | 787 | /* make sure copper is selected */ |
52295666 | 788 | return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
e1dde8dc | 789 | } |
5f8cbc13 | 790 | |
e1dde8dc AL |
791 | static int m88e1111_config_init_rtbi(struct phy_device *phydev) |
792 | { | |
61111598 | 793 | int err; |
e1dde8dc | 794 | |
61111598 | 795 | err = m88e1111_config_init_rgmii_delays(phydev); |
fea23fb5 | 796 | if (err < 0) |
e1dde8dc AL |
797 | return err; |
798 | ||
865b813a AL |
799 | err = m88e1111_config_init_hwcfg_mode( |
800 | phydev, | |
801 | MII_M1111_HWCFG_MODE_RTBI, | |
802 | MII_M1111_HWCFG_FIBER_COPPER_AUTO); | |
e1dde8dc AL |
803 | if (err < 0) |
804 | return err; | |
805 | ||
806 | /* soft reset */ | |
34386344 | 807 | err = genphy_soft_reset(phydev); |
e1dde8dc AL |
808 | if (err < 0) |
809 | return err; | |
810 | ||
865b813a AL |
811 | return m88e1111_config_init_hwcfg_mode( |
812 | phydev, | |
813 | MII_M1111_HWCFG_MODE_RTBI, | |
814 | MII_M1111_HWCFG_FIBER_COPPER_AUTO); | |
e1dde8dc AL |
815 | } |
816 | ||
817 | static int m88e1111_config_init(struct phy_device *phydev) | |
818 | { | |
819 | int err; | |
820 | ||
821 | if (phy_interface_is_rgmii(phydev)) { | |
822 | err = m88e1111_config_init_rgmii(phydev); | |
fea23fb5 | 823 | if (err < 0) |
5f8cbc13 | 824 | return err; |
e1dde8dc | 825 | } |
5f8cbc13 | 826 | |
e1dde8dc AL |
827 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { |
828 | err = m88e1111_config_init_sgmii(phydev); | |
5f8cbc13 LYB |
829 | if (err < 0) |
830 | return err; | |
e1dde8dc | 831 | } |
5f8cbc13 | 832 | |
e1dde8dc AL |
833 | if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { |
834 | err = m88e1111_config_init_rtbi(phydev); | |
5f8cbc13 LYB |
835 | if (err < 0) |
836 | return err; | |
837 | } | |
838 | ||
cf41a51d DD |
839 | err = marvell_of_reg_init(phydev); |
840 | if (err < 0) | |
841 | return err; | |
5f8cbc13 | 842 | |
34386344 | 843 | return genphy_soft_reset(phydev); |
895ee682 KP |
844 | } |
845 | ||
5c6bc519 HK |
846 | static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) |
847 | { | |
848 | int val, cnt, enable; | |
849 | ||
850 | val = phy_read(phydev, MII_M1111_PHY_EXT_CR); | |
851 | if (val < 0) | |
852 | return val; | |
853 | ||
854 | enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); | |
855 | cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; | |
856 | ||
857 | *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; | |
858 | ||
859 | return 0; | |
860 | } | |
861 | ||
862 | static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) | |
863 | { | |
864 | int val; | |
865 | ||
866 | if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) | |
867 | return -E2BIG; | |
868 | ||
869 | if (!cnt) | |
870 | return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, | |
871 | MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); | |
872 | ||
873 | val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; | |
874 | val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); | |
875 | ||
876 | return phy_modify(phydev, MII_M1111_PHY_EXT_CR, | |
877 | MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | | |
878 | MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, | |
879 | val); | |
880 | } | |
881 | ||
882 | static int m88e1111_get_tunable(struct phy_device *phydev, | |
883 | struct ethtool_tunable *tuna, void *data) | |
884 | { | |
885 | switch (tuna->id) { | |
886 | case ETHTOOL_PHY_DOWNSHIFT: | |
887 | return m88e1111_get_downshift(phydev, data); | |
888 | default: | |
889 | return -EOPNOTSUPP; | |
890 | } | |
891 | } | |
892 | ||
893 | static int m88e1111_set_tunable(struct phy_device *phydev, | |
894 | struct ethtool_tunable *tuna, const void *data) | |
895 | { | |
896 | switch (tuna->id) { | |
897 | case ETHTOOL_PHY_DOWNSHIFT: | |
898 | return m88e1111_set_downshift(phydev, *(const u8 *)data); | |
899 | default: | |
900 | return -EOPNOTSUPP; | |
901 | } | |
902 | } | |
903 | ||
911af5e1 | 904 | static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) |
a3bdfce7 HK |
905 | { |
906 | int val, cnt, enable; | |
907 | ||
908 | val = phy_read(phydev, MII_M1011_PHY_SCR); | |
909 | if (val < 0) | |
910 | return val; | |
911 | ||
912 | enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); | |
f8d975be | 913 | cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; |
a3bdfce7 HK |
914 | |
915 | *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; | |
916 | ||
917 | return 0; | |
918 | } | |
919 | ||
911af5e1 | 920 | static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) |
a3bdfce7 HK |
921 | { |
922 | int val; | |
923 | ||
924 | if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) | |
925 | return -E2BIG; | |
926 | ||
927 | if (!cnt) | |
928 | return phy_clear_bits(phydev, MII_M1011_PHY_SCR, | |
929 | MII_M1011_PHY_SCR_DOWNSHIFT_EN); | |
930 | ||
931 | val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; | |
f8d975be | 932 | val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); |
a3bdfce7 HK |
933 | |
934 | return phy_modify(phydev, MII_M1011_PHY_SCR, | |
935 | MII_M1011_PHY_SCR_DOWNSHIFT_EN | | |
f8d975be | 936 | MII_M1011_PHY_SCR_DOWNSHIFT_MASK, |
a3bdfce7 HK |
937 | val); |
938 | } | |
939 | ||
911af5e1 | 940 | static int m88e1011_get_tunable(struct phy_device *phydev, |
a3bdfce7 HK |
941 | struct ethtool_tunable *tuna, void *data) |
942 | { | |
943 | switch (tuna->id) { | |
944 | case ETHTOOL_PHY_DOWNSHIFT: | |
911af5e1 | 945 | return m88e1011_get_downshift(phydev, data); |
a3bdfce7 HK |
946 | default: |
947 | return -EOPNOTSUPP; | |
948 | } | |
949 | } | |
950 | ||
911af5e1 | 951 | static int m88e1011_set_tunable(struct phy_device *phydev, |
a3bdfce7 HK |
952 | struct ethtool_tunable *tuna, const void *data) |
953 | { | |
954 | switch (tuna->id) { | |
955 | case ETHTOOL_PHY_DOWNSHIFT: | |
911af5e1 | 956 | return m88e1011_set_downshift(phydev, *(const u8 *)data); |
a3bdfce7 HK |
957 | default: |
958 | return -EOPNOTSUPP; | |
959 | } | |
960 | } | |
961 | ||
e2d861cc HK |
962 | static int m88e1116r_config_init(struct phy_device *phydev) |
963 | { | |
964 | int err; | |
965 | ||
966 | err = genphy_soft_reset(phydev); | |
967 | if (err < 0) | |
968 | return err; | |
969 | ||
970 | msleep(500); | |
971 | ||
972 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); | |
973 | if (err < 0) | |
974 | return err; | |
975 | ||
976 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); | |
977 | if (err < 0) | |
978 | return err; | |
979 | ||
911af5e1 | 980 | err = m88e1011_set_downshift(phydev, 8); |
e2d861cc HK |
981 | if (err < 0) |
982 | return err; | |
983 | ||
984 | if (phy_interface_is_rgmii(phydev)) { | |
985 | err = m88e1121_config_aneg_rgmii_delays(phydev); | |
986 | if (err < 0) | |
987 | return err; | |
988 | } | |
989 | ||
990 | err = genphy_soft_reset(phydev); | |
991 | if (err < 0) | |
992 | return err; | |
993 | ||
994 | return marvell_config_init(phydev); | |
995 | } | |
996 | ||
dd9a122a EH |
997 | static int m88e1318_config_init(struct phy_device *phydev) |
998 | { | |
999 | if (phy_interrupt_is_valid(phydev)) { | |
1000 | int err = phy_modify_paged( | |
1001 | phydev, MII_MARVELL_LED_PAGE, | |
1002 | MII_88E1318S_PHY_LED_TCR, | |
1003 | MII_88E1318S_PHY_LED_TCR_FORCE_INT, | |
1004 | MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | | |
1005 | MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); | |
1006 | if (err < 0) | |
1007 | return err; | |
1008 | } | |
1009 | ||
07777246 | 1010 | return marvell_config_init(phydev); |
dd9a122a EH |
1011 | } |
1012 | ||
407353ec CG |
1013 | static int m88e1510_config_init(struct phy_device *phydev) |
1014 | { | |
1015 | int err; | |
407353ec CG |
1016 | |
1017 | /* SGMII-to-Copper mode initialization */ | |
1018 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { | |
1019 | /* Select page 18 */ | |
6427bb2d | 1020 | err = marvell_set_page(phydev, 18); |
407353ec CG |
1021 | if (err < 0) |
1022 | return err; | |
1023 | ||
1024 | /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ | |
fea23fb5 | 1025 | err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, |
f102852f | 1026 | MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, |
fea23fb5 | 1027 | MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); |
407353ec CG |
1028 | if (err < 0) |
1029 | return err; | |
1030 | ||
1031 | /* PHY reset is necessary after changing MODE[2:0] */ | |
fea23fb5 RK |
1032 | err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, |
1033 | MII_88E1510_GEN_CTRL_REG_1_RESET); | |
407353ec CG |
1034 | if (err < 0) |
1035 | return err; | |
1036 | ||
1037 | /* Reset page selection */ | |
52295666 | 1038 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
407353ec CG |
1039 | if (err < 0) |
1040 | return err; | |
1041 | } | |
1042 | ||
dd9a122a | 1043 | return m88e1318_config_init(phydev); |
407353ec CG |
1044 | } |
1045 | ||
605f196e RM |
1046 | static int m88e1118_config_aneg(struct phy_device *phydev) |
1047 | { | |
1048 | int err; | |
1049 | ||
34386344 | 1050 | err = genphy_soft_reset(phydev); |
605f196e RM |
1051 | if (err < 0) |
1052 | return err; | |
1053 | ||
fecd5e91 | 1054 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); |
605f196e RM |
1055 | if (err < 0) |
1056 | return err; | |
1057 | ||
1058 | err = genphy_config_aneg(phydev); | |
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | static int m88e1118_config_init(struct phy_device *phydev) | |
1063 | { | |
1064 | int err; | |
1065 | ||
1066 | /* Change address */ | |
52295666 | 1067 | err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
605f196e RM |
1068 | if (err < 0) |
1069 | return err; | |
1070 | ||
1071 | /* Enable 1000 Mbit */ | |
1072 | err = phy_write(phydev, 0x15, 0x1070); | |
1073 | if (err < 0) | |
1074 | return err; | |
1075 | ||
1076 | /* Change address */ | |
52295666 | 1077 | err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); |
605f196e RM |
1078 | if (err < 0) |
1079 | return err; | |
1080 | ||
1081 | /* Adjust LED Control */ | |
2f495c39 BH |
1082 | if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) |
1083 | err = phy_write(phydev, 0x10, 0x1100); | |
1084 | else | |
1085 | err = phy_write(phydev, 0x10, 0x021e); | |
605f196e RM |
1086 | if (err < 0) |
1087 | return err; | |
1088 | ||
cf41a51d DD |
1089 | err = marvell_of_reg_init(phydev); |
1090 | if (err < 0) | |
1091 | return err; | |
1092 | ||
605f196e | 1093 | /* Reset address */ |
52295666 | 1094 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
605f196e RM |
1095 | if (err < 0) |
1096 | return err; | |
1097 | ||
34386344 | 1098 | return genphy_soft_reset(phydev); |
605f196e RM |
1099 | } |
1100 | ||
90600732 DD |
1101 | static int m88e1149_config_init(struct phy_device *phydev) |
1102 | { | |
1103 | int err; | |
1104 | ||
1105 | /* Change address */ | |
52295666 | 1106 | err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
90600732 DD |
1107 | if (err < 0) |
1108 | return err; | |
1109 | ||
1110 | /* Enable 1000 Mbit */ | |
1111 | err = phy_write(phydev, 0x15, 0x1048); | |
1112 | if (err < 0) | |
1113 | return err; | |
1114 | ||
cf41a51d DD |
1115 | err = marvell_of_reg_init(phydev); |
1116 | if (err < 0) | |
1117 | return err; | |
1118 | ||
90600732 | 1119 | /* Reset address */ |
52295666 | 1120 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
90600732 DD |
1121 | if (err < 0) |
1122 | return err; | |
1123 | ||
34386344 | 1124 | return genphy_soft_reset(phydev); |
90600732 DD |
1125 | } |
1126 | ||
e1dde8dc AL |
1127 | static int m88e1145_config_init_rgmii(struct phy_device *phydev) |
1128 | { | |
1129 | int err; | |
e1dde8dc | 1130 | |
61111598 | 1131 | err = m88e1111_config_init_rgmii_delays(phydev); |
e1dde8dc AL |
1132 | if (err < 0) |
1133 | return err; | |
1134 | ||
1135 | if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { | |
1136 | err = phy_write(phydev, 0x1d, 0x0012); | |
1137 | if (err < 0) | |
1138 | return err; | |
1139 | ||
f102852f | 1140 | err = phy_modify(phydev, 0x1e, 0x0fc0, |
fea23fb5 RK |
1141 | 2 << 9 | /* 36 ohm */ |
1142 | 2 << 6); /* 39 ohm */ | |
e1dde8dc AL |
1143 | if (err < 0) |
1144 | return err; | |
1145 | ||
1146 | err = phy_write(phydev, 0x1d, 0x3); | |
1147 | if (err < 0) | |
1148 | return err; | |
1149 | ||
1150 | err = phy_write(phydev, 0x1e, 0x8000); | |
1151 | } | |
1152 | return err; | |
1153 | } | |
1154 | ||
1155 | static int m88e1145_config_init_sgmii(struct phy_device *phydev) | |
1156 | { | |
865b813a AL |
1157 | return m88e1111_config_init_hwcfg_mode( |
1158 | phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, | |
1159 | MII_M1111_HWCFG_FIBER_COPPER_AUTO); | |
e1dde8dc AL |
1160 | } |
1161 | ||
76884679 AF |
1162 | static int m88e1145_config_init(struct phy_device *phydev) |
1163 | { | |
1164 | int err; | |
1165 | ||
1166 | /* Take care of errata E0 & E1 */ | |
1167 | err = phy_write(phydev, 0x1d, 0x001b); | |
1168 | if (err < 0) | |
1169 | return err; | |
1170 | ||
1171 | err = phy_write(phydev, 0x1e, 0x418f); | |
1172 | if (err < 0) | |
1173 | return err; | |
1174 | ||
1175 | err = phy_write(phydev, 0x1d, 0x0016); | |
1176 | if (err < 0) | |
1177 | return err; | |
1178 | ||
1179 | err = phy_write(phydev, 0x1e, 0xa2da); | |
1180 | if (err < 0) | |
1181 | return err; | |
1182 | ||
895ee682 | 1183 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
e1dde8dc | 1184 | err = m88e1145_config_init_rgmii(phydev); |
76884679 AF |
1185 | if (err < 0) |
1186 | return err; | |
76884679 AF |
1187 | } |
1188 | ||
b0224175 | 1189 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { |
e1dde8dc | 1190 | err = m88e1145_config_init_sgmii(phydev); |
b0224175 VND |
1191 | if (err < 0) |
1192 | return err; | |
1193 | } | |
1194 | ||
cf41a51d DD |
1195 | err = marvell_of_reg_init(phydev); |
1196 | if (err < 0) | |
1197 | return err; | |
1198 | ||
76884679 AF |
1199 | return 0; |
1200 | } | |
00db8189 | 1201 | |
69f42be8 HK |
1202 | static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) |
1203 | { | |
1204 | int val; | |
1205 | ||
1206 | val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); | |
1207 | if (val < 0) | |
1208 | return val; | |
1209 | ||
1210 | if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { | |
1211 | *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; | |
1212 | return 0; | |
1213 | } | |
1214 | ||
1215 | val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); | |
1216 | ||
1217 | switch (val) { | |
1218 | case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: | |
1219 | *msecs = 0; | |
1220 | break; | |
1221 | case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: | |
1222 | *msecs = 10; | |
1223 | break; | |
1224 | case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: | |
1225 | *msecs = 20; | |
1226 | break; | |
1227 | case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: | |
1228 | *msecs = 40; | |
1229 | break; | |
1230 | default: | |
1231 | return -EINVAL; | |
1232 | } | |
1233 | ||
1234 | return 0; | |
1235 | } | |
1236 | ||
1237 | static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) | |
1238 | { | |
1239 | struct ethtool_eee eee; | |
1240 | int val, ret; | |
1241 | ||
1242 | if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) | |
1243 | return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, | |
1244 | MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); | |
1245 | ||
1246 | /* According to the Marvell data sheet EEE must be disabled for | |
1247 | * Fast Link Down detection to work properly | |
1248 | */ | |
1249 | ret = phy_ethtool_get_eee(phydev, &eee); | |
1250 | if (!ret && eee.eee_enabled) { | |
1251 | phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); | |
1252 | return -EBUSY; | |
1253 | } | |
1254 | ||
1255 | if (*msecs <= 5) | |
1256 | val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; | |
1257 | else if (*msecs <= 15) | |
1258 | val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; | |
1259 | else if (*msecs <= 30) | |
1260 | val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; | |
1261 | else | |
1262 | val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; | |
1263 | ||
1264 | val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); | |
1265 | ||
1266 | ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, | |
1267 | MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); | |
1268 | if (ret) | |
1269 | return ret; | |
1270 | ||
1271 | return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, | |
1272 | MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); | |
1273 | } | |
1274 | ||
1275 | static int m88e1540_get_tunable(struct phy_device *phydev, | |
1276 | struct ethtool_tunable *tuna, void *data) | |
1277 | { | |
1278 | switch (tuna->id) { | |
1279 | case ETHTOOL_PHY_FAST_LINK_DOWN: | |
1280 | return m88e1540_get_fld(phydev, data); | |
a3bdfce7 | 1281 | case ETHTOOL_PHY_DOWNSHIFT: |
911af5e1 | 1282 | return m88e1011_get_downshift(phydev, data); |
69f42be8 HK |
1283 | default: |
1284 | return -EOPNOTSUPP; | |
1285 | } | |
1286 | } | |
1287 | ||
1288 | static int m88e1540_set_tunable(struct phy_device *phydev, | |
1289 | struct ethtool_tunable *tuna, const void *data) | |
1290 | { | |
1291 | switch (tuna->id) { | |
1292 | case ETHTOOL_PHY_FAST_LINK_DOWN: | |
1293 | return m88e1540_set_fld(phydev, data); | |
a3bdfce7 | 1294 | case ETHTOOL_PHY_DOWNSHIFT: |
911af5e1 | 1295 | return m88e1011_set_downshift(phydev, *(const u8 *)data); |
69f42be8 HK |
1296 | default: |
1297 | return -EOPNOTSUPP; | |
1298 | } | |
1299 | } | |
1300 | ||
8cbcdc1a AL |
1301 | /* The VOD can be out of specification on link up. Poke an |
1302 | * undocumented register, in an undocumented page, with a magic value | |
1303 | * to fix this. | |
1304 | */ | |
1305 | static int m88e6390_errata(struct phy_device *phydev) | |
1306 | { | |
1307 | int err; | |
1308 | ||
1309 | err = phy_write(phydev, MII_BMCR, | |
1310 | BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1311 | if (err) | |
1312 | return err; | |
1313 | ||
1314 | usleep_range(300, 400); | |
1315 | ||
1316 | err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); | |
1317 | if (err) | |
1318 | return err; | |
1319 | ||
1320 | return genphy_soft_reset(phydev); | |
1321 | } | |
1322 | ||
1323 | static int m88e6390_config_aneg(struct phy_device *phydev) | |
1324 | { | |
1325 | int err; | |
1326 | ||
1327 | err = m88e6390_errata(phydev); | |
1328 | if (err) | |
1329 | return err; | |
1330 | ||
1331 | return m88e1510_config_aneg(phydev); | |
1332 | } | |
1333 | ||
6cfb3bcc | 1334 | /** |
ab9cb729 | 1335 | * fiber_lpa_mod_linkmode_lpa_t |
c0ec3c27 | 1336 | * @advertising: the linkmode advertisement settings |
6cfb3bcc CAC |
1337 | * @lpa: value of the MII_LPA register for fiber link |
1338 | * | |
ab9cb729 AL |
1339 | * A small helper function that translates MII_LPA bits to linkmode LP |
1340 | * advertisement settings. Other bits in advertising are left | |
1341 | * unchanged. | |
6cfb3bcc | 1342 | */ |
ab9cb729 | 1343 | static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) |
6cfb3bcc | 1344 | { |
ab9cb729 | 1345 | linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, |
20ecf424 | 1346 | advertising, lpa & LPA_1000XHALF); |
ab9cb729 AL |
1347 | |
1348 | linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, | |
20ecf424 | 1349 | advertising, lpa & LPA_1000XFULL); |
6cfb3bcc CAC |
1350 | } |
1351 | ||
e1dde8dc | 1352 | static int marvell_read_status_page_an(struct phy_device *phydev, |
d2004e27 | 1353 | int fiber, int status) |
e1dde8dc | 1354 | { |
e1dde8dc | 1355 | int lpa; |
fcf1f59a | 1356 | int err; |
e1dde8dc | 1357 | |
3b72f84f CG |
1358 | if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { |
1359 | phydev->link = 0; | |
1360 | return 0; | |
1361 | } | |
1362 | ||
1363 | if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) | |
1364 | phydev->duplex = DUPLEX_FULL; | |
1365 | else | |
1366 | phydev->duplex = DUPLEX_HALF; | |
1367 | ||
1368 | switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { | |
1369 | case MII_M1011_PHY_STATUS_1000: | |
1370 | phydev->speed = SPEED_1000; | |
1371 | break; | |
1372 | ||
1373 | case MII_M1011_PHY_STATUS_100: | |
1374 | phydev->speed = SPEED_100; | |
1375 | break; | |
1376 | ||
1377 | default: | |
1378 | phydev->speed = SPEED_10; | |
1379 | break; | |
1380 | } | |
1381 | ||
e1dde8dc | 1382 | if (!fiber) { |
fcf1f59a RK |
1383 | err = genphy_read_lpa(phydev); |
1384 | if (err < 0) | |
1385 | return err; | |
e1dde8dc | 1386 | |
af006240 | 1387 | phy_resolve_aneg_pause(phydev); |
e1dde8dc | 1388 | } else { |
fcf1f59a RK |
1389 | lpa = phy_read(phydev, MII_LPA); |
1390 | if (lpa < 0) | |
1391 | return lpa; | |
1392 | ||
e1dde8dc | 1393 | /* The fiber link is only 1000M capable */ |
ab9cb729 | 1394 | fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); |
e1dde8dc AL |
1395 | |
1396 | if (phydev->duplex == DUPLEX_FULL) { | |
1397 | if (!(lpa & LPA_PAUSE_FIBER)) { | |
1398 | phydev->pause = 0; | |
1399 | phydev->asym_pause = 0; | |
1400 | } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { | |
1401 | phydev->pause = 1; | |
1402 | phydev->asym_pause = 1; | |
1403 | } else { | |
1404 | phydev->pause = 1; | |
1405 | phydev->asym_pause = 0; | |
1406 | } | |
1407 | } | |
1408 | } | |
fcf1f59a | 1409 | |
e1dde8dc AL |
1410 | return 0; |
1411 | } | |
1412 | ||
6cfb3bcc | 1413 | /* marvell_read_status_page |
be937f1f | 1414 | * |
f0c88f9c | 1415 | * Description: |
be937f1f AS |
1416 | * Check the link, then figure out the current state |
1417 | * by comparing what we advertise with what the link partner | |
1418 | * advertises. Start by checking the gigabit possibilities, | |
1419 | * then move on to 10/100. | |
1420 | */ | |
6cfb3bcc | 1421 | static int marvell_read_status_page(struct phy_device *phydev, int page) |
be937f1f | 1422 | { |
d2004e27 | 1423 | int status; |
6cfb3bcc | 1424 | int fiber; |
e1dde8dc | 1425 | int err; |
be937f1f | 1426 | |
d2004e27 RK |
1427 | status = phy_read(phydev, MII_M1011_PHY_STATUS); |
1428 | if (status < 0) | |
1429 | return status; | |
1430 | ||
1431 | /* Use the generic register for copper link status, | |
1432 | * and the PHY status register for fiber link status. | |
0c3439bc | 1433 | */ |
d2004e27 RK |
1434 | if (page == MII_MARVELL_FIBER_PAGE) { |
1435 | phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); | |
1436 | } else { | |
1437 | err = genphy_update_link(phydev); | |
1438 | if (err) | |
1439 | return err; | |
1440 | } | |
1441 | ||
52295666 | 1442 | if (page == MII_MARVELL_FIBER_PAGE) |
6cfb3bcc CAC |
1443 | fiber = 1; |
1444 | else | |
1445 | fiber = 0; | |
1446 | ||
98f92831 RK |
1447 | linkmode_zero(phydev->lp_advertising); |
1448 | phydev->pause = 0; | |
1449 | phydev->asym_pause = 0; | |
b82cf17f RK |
1450 | phydev->speed = SPEED_UNKNOWN; |
1451 | phydev->duplex = DUPLEX_UNKNOWN; | |
98f92831 | 1452 | |
e1dde8dc | 1453 | if (phydev->autoneg == AUTONEG_ENABLE) |
d2004e27 | 1454 | err = marvell_read_status_page_an(phydev, fiber, status); |
e1dde8dc | 1455 | else |
98f92831 | 1456 | err = genphy_read_status_fixed(phydev); |
be937f1f | 1457 | |
e1dde8dc | 1458 | return err; |
be937f1f AS |
1459 | } |
1460 | ||
6cfb3bcc CAC |
1461 | /* marvell_read_status |
1462 | * | |
1463 | * Some Marvell's phys have two modes: fiber and copper. | |
1464 | * Both need status checked. | |
1465 | * Description: | |
1466 | * First, check the fiber link and status. | |
1467 | * If the fiber link is down, check the copper link and status which | |
1468 | * will be the default value if both link are down. | |
1469 | */ | |
1470 | static int marvell_read_status(struct phy_device *phydev) | |
1471 | { | |
1472 | int err; | |
1473 | ||
1474 | /* Check the fiber mode first */ | |
3c1bcc86 AL |
1475 | if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, |
1476 | phydev->supported) && | |
a13c0652 | 1477 | phydev->interface != PHY_INTERFACE_MODE_SGMII) { |
52295666 | 1478 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
6cfb3bcc CAC |
1479 | if (err < 0) |
1480 | goto error; | |
1481 | ||
52295666 | 1482 | err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); |
6cfb3bcc CAC |
1483 | if (err < 0) |
1484 | goto error; | |
1485 | ||
0c3439bc AL |
1486 | /* If the fiber link is up, it is the selected and |
1487 | * used link. In this case, we need to stay in the | |
1488 | * fiber page. Please to be careful about that, avoid | |
1489 | * to restore Copper page in other functions which | |
1490 | * could break the behaviour for some fiber phy like | |
1491 | * 88E1512. | |
1492 | */ | |
6cfb3bcc CAC |
1493 | if (phydev->link) |
1494 | return 0; | |
1495 | ||
1496 | /* If fiber link is down, check and save copper mode state */ | |
52295666 | 1497 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1498 | if (err < 0) |
1499 | goto error; | |
1500 | } | |
1501 | ||
52295666 | 1502 | return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1503 | |
1504 | error: | |
52295666 | 1505 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1506 | return err; |
1507 | } | |
3758be3d CAC |
1508 | |
1509 | /* marvell_suspend | |
1510 | * | |
1511 | * Some Marvell's phys have two modes: fiber and copper. | |
1512 | * Both need to be suspended | |
1513 | */ | |
1514 | static int marvell_suspend(struct phy_device *phydev) | |
1515 | { | |
1516 | int err; | |
1517 | ||
1518 | /* Suspend the fiber mode first */ | |
3c1bcc86 AL |
1519 | if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, |
1520 | phydev->supported)) { | |
52295666 | 1521 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
3758be3d CAC |
1522 | if (err < 0) |
1523 | goto error; | |
1524 | ||
1525 | /* With the page set, use the generic suspend */ | |
1526 | err = genphy_suspend(phydev); | |
1527 | if (err < 0) | |
1528 | goto error; | |
1529 | ||
1530 | /* Then, the copper link */ | |
52295666 | 1531 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1532 | if (err < 0) |
1533 | goto error; | |
1534 | } | |
1535 | ||
1536 | /* With the page set, use the generic suspend */ | |
1537 | return genphy_suspend(phydev); | |
1538 | ||
1539 | error: | |
52295666 | 1540 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1541 | return err; |
1542 | } | |
1543 | ||
1544 | /* marvell_resume | |
1545 | * | |
1546 | * Some Marvell's phys have two modes: fiber and copper. | |
1547 | * Both need to be resumed | |
1548 | */ | |
1549 | static int marvell_resume(struct phy_device *phydev) | |
1550 | { | |
1551 | int err; | |
1552 | ||
1553 | /* Resume the fiber mode first */ | |
3c1bcc86 AL |
1554 | if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, |
1555 | phydev->supported)) { | |
52295666 | 1556 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
3758be3d CAC |
1557 | if (err < 0) |
1558 | goto error; | |
1559 | ||
1560 | /* With the page set, use the generic resume */ | |
1561 | err = genphy_resume(phydev); | |
1562 | if (err < 0) | |
1563 | goto error; | |
1564 | ||
1565 | /* Then, the copper link */ | |
52295666 | 1566 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1567 | if (err < 0) |
1568 | goto error; | |
1569 | } | |
1570 | ||
1571 | /* With the page set, use the generic resume */ | |
1572 | return genphy_resume(phydev); | |
1573 | ||
1574 | error: | |
52295666 | 1575 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1576 | return err; |
1577 | } | |
1578 | ||
6b358aed SH |
1579 | static int marvell_aneg_done(struct phy_device *phydev) |
1580 | { | |
1581 | int retval = phy_read(phydev, MII_M1011_PHY_STATUS); | |
e69d9ed4 | 1582 | |
6b358aed SH |
1583 | return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); |
1584 | } | |
1585 | ||
dcd07be3 AG |
1586 | static int m88e1121_did_interrupt(struct phy_device *phydev) |
1587 | { | |
1588 | int imask; | |
1589 | ||
1590 | imask = phy_read(phydev, MII_M1011_IEVENT); | |
1591 | ||
1592 | if (imask & MII_M1011_IMASK_INIT) | |
1593 | return 1; | |
1594 | ||
1595 | return 0; | |
1596 | } | |
1597 | ||
23beb38f AL |
1598 | static void m88e1318_get_wol(struct phy_device *phydev, |
1599 | struct ethtool_wolinfo *wol) | |
3871c387 | 1600 | { |
424ca4c5 RK |
1601 | int oldpage, ret = 0; |
1602 | ||
3871c387 MS |
1603 | wol->supported = WAKE_MAGIC; |
1604 | wol->wolopts = 0; | |
1605 | ||
424ca4c5 RK |
1606 | oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE); |
1607 | if (oldpage < 0) | |
1608 | goto error; | |
3871c387 | 1609 | |
424ca4c5 RK |
1610 | ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); |
1611 | if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) | |
3871c387 MS |
1612 | wol->wolopts |= WAKE_MAGIC; |
1613 | ||
424ca4c5 RK |
1614 | error: |
1615 | phy_restore_page(phydev, oldpage, ret); | |
3871c387 MS |
1616 | } |
1617 | ||
23beb38f AL |
1618 | static int m88e1318_set_wol(struct phy_device *phydev, |
1619 | struct ethtool_wolinfo *wol) | |
3871c387 | 1620 | { |
424ca4c5 | 1621 | int err = 0, oldpage; |
3871c387 | 1622 | |
424ca4c5 RK |
1623 | oldpage = phy_save_page(phydev); |
1624 | if (oldpage < 0) | |
1625 | goto error; | |
3871c387 MS |
1626 | |
1627 | if (wol->wolopts & WAKE_MAGIC) { | |
1628 | /* Explicitly switch to page 0x00, just to be sure */ | |
424ca4c5 | 1629 | err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); |
3871c387 | 1630 | if (err < 0) |
424ca4c5 | 1631 | goto error; |
3871c387 | 1632 | |
b6a930fa JH |
1633 | /* If WOL event happened once, the LED[2] interrupt pin |
1634 | * will not be cleared unless we reading the interrupt status | |
1635 | * register. If interrupts are in use, the normal interrupt | |
1636 | * handling will clear the WOL event. Clear the WOL event | |
1637 | * before enabling it if !phy_interrupt_is_valid() | |
1638 | */ | |
1639 | if (!phy_interrupt_is_valid(phydev)) | |
e0a7328f | 1640 | __phy_read(phydev, MII_M1011_IEVENT); |
b6a930fa | 1641 | |
3871c387 | 1642 | /* Enable the WOL interrupt */ |
424ca4c5 RK |
1643 | err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, |
1644 | MII_88E1318S_PHY_CSIER_WOL_EIE); | |
3871c387 | 1645 | if (err < 0) |
424ca4c5 | 1646 | goto error; |
3871c387 | 1647 | |
424ca4c5 | 1648 | err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); |
3871c387 | 1649 | if (err < 0) |
424ca4c5 | 1650 | goto error; |
3871c387 MS |
1651 | |
1652 | /* Setup LED[2] as interrupt pin (active low) */ | |
424ca4c5 | 1653 | err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, |
f102852f | 1654 | MII_88E1318S_PHY_LED_TCR_FORCE_INT, |
424ca4c5 RK |
1655 | MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | |
1656 | MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); | |
3871c387 | 1657 | if (err < 0) |
424ca4c5 | 1658 | goto error; |
3871c387 | 1659 | |
424ca4c5 | 1660 | err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); |
3871c387 | 1661 | if (err < 0) |
424ca4c5 | 1662 | goto error; |
3871c387 MS |
1663 | |
1664 | /* Store the device address for the magic packet */ | |
424ca4c5 | 1665 | err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, |
3871c387 MS |
1666 | ((phydev->attached_dev->dev_addr[5] << 8) | |
1667 | phydev->attached_dev->dev_addr[4])); | |
1668 | if (err < 0) | |
424ca4c5 RK |
1669 | goto error; |
1670 | err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, | |
3871c387 MS |
1671 | ((phydev->attached_dev->dev_addr[3] << 8) | |
1672 | phydev->attached_dev->dev_addr[2])); | |
1673 | if (err < 0) | |
424ca4c5 RK |
1674 | goto error; |
1675 | err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, | |
3871c387 MS |
1676 | ((phydev->attached_dev->dev_addr[1] << 8) | |
1677 | phydev->attached_dev->dev_addr[0])); | |
1678 | if (err < 0) | |
424ca4c5 | 1679 | goto error; |
3871c387 MS |
1680 | |
1681 | /* Clear WOL status and enable magic packet matching */ | |
424ca4c5 RK |
1682 | err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, |
1683 | MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | | |
1684 | MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); | |
3871c387 | 1685 | if (err < 0) |
424ca4c5 | 1686 | goto error; |
3871c387 | 1687 | } else { |
424ca4c5 | 1688 | err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); |
3871c387 | 1689 | if (err < 0) |
424ca4c5 | 1690 | goto error; |
3871c387 MS |
1691 | |
1692 | /* Clear WOL status and disable magic packet matching */ | |
424ca4c5 | 1693 | err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, |
f102852f | 1694 | MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, |
424ca4c5 | 1695 | MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); |
3871c387 | 1696 | if (err < 0) |
424ca4c5 | 1697 | goto error; |
3871c387 MS |
1698 | } |
1699 | ||
424ca4c5 RK |
1700 | error: |
1701 | return phy_restore_page(phydev, oldpage, err); | |
3871c387 MS |
1702 | } |
1703 | ||
d2fa47d9 AL |
1704 | static int marvell_get_sset_count(struct phy_device *phydev) |
1705 | { | |
3c1bcc86 AL |
1706 | if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, |
1707 | phydev->supported)) | |
2170fef7 CAC |
1708 | return ARRAY_SIZE(marvell_hw_stats); |
1709 | else | |
1710 | return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; | |
d2fa47d9 AL |
1711 | } |
1712 | ||
1713 | static void marvell_get_strings(struct phy_device *phydev, u8 *data) | |
1714 | { | |
fdfdf867 | 1715 | int count = marvell_get_sset_count(phydev); |
d2fa47d9 AL |
1716 | int i; |
1717 | ||
fdfdf867 | 1718 | for (i = 0; i < count; i++) { |
98409b2b FF |
1719 | strlcpy(data + i * ETH_GSTRING_LEN, |
1720 | marvell_hw_stats[i].string, ETH_GSTRING_LEN); | |
d2fa47d9 AL |
1721 | } |
1722 | } | |
1723 | ||
d2fa47d9 AL |
1724 | static u64 marvell_get_stat(struct phy_device *phydev, int i) |
1725 | { | |
1726 | struct marvell_hw_stat stat = marvell_hw_stats[i]; | |
1727 | struct marvell_priv *priv = phydev->priv; | |
424ca4c5 | 1728 | int val; |
321b4d4b | 1729 | u64 ret; |
d2fa47d9 | 1730 | |
424ca4c5 | 1731 | val = phy_read_paged(phydev, stat.page, stat.reg); |
d2fa47d9 | 1732 | if (val < 0) { |
6c3442f5 | 1733 | ret = U64_MAX; |
d2fa47d9 AL |
1734 | } else { |
1735 | val = val & ((1 << stat.bits) - 1); | |
1736 | priv->stats[i] += val; | |
321b4d4b | 1737 | ret = priv->stats[i]; |
d2fa47d9 AL |
1738 | } |
1739 | ||
321b4d4b | 1740 | return ret; |
d2fa47d9 AL |
1741 | } |
1742 | ||
1743 | static void marvell_get_stats(struct phy_device *phydev, | |
1744 | struct ethtool_stats *stats, u64 *data) | |
1745 | { | |
fdfdf867 | 1746 | int count = marvell_get_sset_count(phydev); |
d2fa47d9 AL |
1747 | int i; |
1748 | ||
fdfdf867 | 1749 | for (i = 0; i < count; i++) |
d2fa47d9 AL |
1750 | data[i] = marvell_get_stat(phydev, i); |
1751 | } | |
1752 | ||
0c9bcc1d AL |
1753 | static int marvell_vct5_wait_complete(struct phy_device *phydev) |
1754 | { | |
1755 | int i; | |
1756 | int val; | |
1757 | ||
1758 | for (i = 0; i < 32; i++) { | |
a618e86d | 1759 | val = __phy_read(phydev, MII_VCT5_CTRL); |
0c9bcc1d AL |
1760 | if (val < 0) |
1761 | return val; | |
1762 | ||
1763 | if (val & MII_VCT5_CTRL_COMPLETE) | |
1764 | return 0; | |
0c9bcc1d AL |
1765 | } |
1766 | ||
1767 | phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); | |
1768 | return -ETIMEDOUT; | |
1769 | } | |
1770 | ||
1771 | static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) | |
1772 | { | |
1773 | int amplitude; | |
1774 | int val; | |
1775 | int reg; | |
1776 | ||
1777 | reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; | |
a618e86d | 1778 | val = __phy_read(phydev, reg); |
0c9bcc1d AL |
1779 | |
1780 | if (val < 0) | |
1781 | return 0; | |
1782 | ||
1783 | amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> | |
1784 | MII_VCT5_TX_RX_AMPLITUDE_SHIFT; | |
1785 | ||
1786 | if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) | |
1787 | amplitude = -amplitude; | |
1788 | ||
1789 | return 1000 * amplitude / 128; | |
1790 | } | |
1791 | ||
1792 | static u32 marvell_vct5_distance2cm(int distance) | |
1793 | { | |
1794 | return distance * 805 / 10; | |
1795 | } | |
1796 | ||
f2bc8ad3 AL |
1797 | static u32 marvell_vct5_cm2distance(int cm) |
1798 | { | |
1799 | return cm * 10 / 805; | |
1800 | } | |
1801 | ||
0c9bcc1d | 1802 | static int marvell_vct5_amplitude_distance(struct phy_device *phydev, |
f2bc8ad3 | 1803 | int distance, int pair) |
0c9bcc1d | 1804 | { |
0c9bcc1d AL |
1805 | u16 reg; |
1806 | int err; | |
f2bc8ad3 AL |
1807 | int mV; |
1808 | int i; | |
0c9bcc1d | 1809 | |
a618e86d AL |
1810 | err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, |
1811 | distance); | |
0c9bcc1d AL |
1812 | if (err) |
1813 | return err; | |
1814 | ||
1815 | reg = MII_VCT5_CTRL_ENABLE | | |
1816 | MII_VCT5_CTRL_TX_SAME_CHANNEL | | |
1817 | MII_VCT5_CTRL_SAMPLES_DEFAULT | | |
1818 | MII_VCT5_CTRL_SAMPLE_POINT | | |
1819 | MII_VCT5_CTRL_PEEK_HYST_DEFAULT; | |
a618e86d | 1820 | err = __phy_write(phydev, MII_VCT5_CTRL, reg); |
0c9bcc1d AL |
1821 | if (err) |
1822 | return err; | |
1823 | ||
1824 | err = marvell_vct5_wait_complete(phydev); | |
1825 | if (err) | |
1826 | return err; | |
1827 | ||
f2bc8ad3 AL |
1828 | for (i = 0; i < 4; i++) { |
1829 | if (pair != PHY_PAIR_ALL && i != pair) | |
1830 | continue; | |
0c9bcc1d | 1831 | |
f2bc8ad3 AL |
1832 | mV = marvell_vct5_amplitude(phydev, i); |
1833 | ethnl_cable_test_amplitude(phydev, i, mV); | |
1834 | } | |
0c9bcc1d AL |
1835 | |
1836 | return 0; | |
1837 | } | |
1838 | ||
1839 | static int marvell_vct5_amplitude_graph(struct phy_device *phydev) | |
1840 | { | |
f2bc8ad3 | 1841 | struct marvell_priv *priv = phydev->priv; |
0c9bcc1d | 1842 | int distance; |
db8668a1 | 1843 | u16 width; |
a618e86d | 1844 | int page; |
0c9bcc1d AL |
1845 | int err; |
1846 | u16 reg; | |
1847 | ||
db8668a1 AL |
1848 | if (priv->first <= TDR_SHORT_CABLE_LENGTH) |
1849 | width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; | |
1850 | else | |
1851 | width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; | |
1852 | ||
0c9bcc1d AL |
1853 | reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | |
1854 | MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | | |
db8668a1 | 1855 | MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; |
0c9bcc1d AL |
1856 | |
1857 | err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, | |
1858 | MII_VCT5_TX_PULSE_CTRL, reg); | |
1859 | if (err) | |
1860 | return err; | |
1861 | ||
a618e86d AL |
1862 | /* Reading the TDR data is very MDIO heavy. We need to optimize |
1863 | * access to keep the time to a minimum. So lock the bus once, | |
1864 | * and don't release it until complete. We can then avoid having | |
1865 | * to change the page for every access, greatly speeding things | |
1866 | * up. | |
1867 | */ | |
1868 | page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); | |
1869 | if (page < 0) | |
830f5ce2 | 1870 | goto restore_page; |
a618e86d | 1871 | |
f2bc8ad3 AL |
1872 | for (distance = priv->first; |
1873 | distance <= priv->last; | |
1874 | distance += priv->step) { | |
1875 | err = marvell_vct5_amplitude_distance(phydev, distance, | |
1876 | priv->pair); | |
0c9bcc1d | 1877 | if (err) |
a618e86d | 1878 | goto restore_page; |
db8668a1 AL |
1879 | |
1880 | if (distance > TDR_SHORT_CABLE_LENGTH && | |
1881 | width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { | |
1882 | width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; | |
1883 | reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | | |
1884 | MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | | |
1885 | MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; | |
1886 | err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); | |
1887 | if (err) | |
1888 | goto restore_page; | |
1889 | } | |
0c9bcc1d AL |
1890 | } |
1891 | ||
a618e86d AL |
1892 | restore_page: |
1893 | return phy_restore_page(phydev, page, err); | |
0c9bcc1d AL |
1894 | } |
1895 | ||
1896 | static int marvell_cable_test_start_common(struct phy_device *phydev) | |
fc879f72 AL |
1897 | { |
1898 | int bmcr, bmsr, ret; | |
1899 | ||
1900 | /* If auto-negotiation is enabled, but not complete, the cable | |
1901 | * test never completes. So disable auto-neg. | |
1902 | */ | |
1903 | bmcr = phy_read(phydev, MII_BMCR); | |
1904 | if (bmcr < 0) | |
1905 | return bmcr; | |
1906 | ||
1907 | bmsr = phy_read(phydev, MII_BMSR); | |
1908 | ||
1909 | if (bmsr < 0) | |
1910 | return bmsr; | |
1911 | ||
1912 | if (bmcr & BMCR_ANENABLE) { | |
1913 | ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); | |
1914 | if (ret < 0) | |
1915 | return ret; | |
1916 | ret = genphy_soft_reset(phydev); | |
1917 | if (ret < 0) | |
1918 | return ret; | |
1919 | } | |
1920 | ||
1921 | /* If the link is up, allow it some time to go down */ | |
1922 | if (bmsr & BMSR_LSTATUS) | |
1923 | msleep(1500); | |
1924 | ||
0c9bcc1d AL |
1925 | return 0; |
1926 | } | |
1927 | ||
1928 | static int marvell_vct7_cable_test_start(struct phy_device *phydev) | |
1929 | { | |
1930 | struct marvell_priv *priv = phydev->priv; | |
1931 | int ret; | |
1932 | ||
1933 | ret = marvell_cable_test_start_common(phydev); | |
1934 | if (ret) | |
1935 | return ret; | |
1936 | ||
1937 | priv->cable_test_tdr = false; | |
1938 | ||
1939 | /* Reset the VCT5 API control to defaults, otherwise | |
1940 | * VCT7 does not work correctly. | |
1941 | */ | |
1942 | ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, | |
1943 | MII_VCT5_CTRL, | |
1944 | MII_VCT5_CTRL_TX_SAME_CHANNEL | | |
1945 | MII_VCT5_CTRL_SAMPLES_DEFAULT | | |
1946 | MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | | |
1947 | MII_VCT5_CTRL_PEEK_HYST_DEFAULT); | |
1948 | if (ret) | |
1949 | return ret; | |
1950 | ||
1951 | ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, | |
1952 | MII_VCT5_SAMPLE_POINT_DISTANCE, 0); | |
1953 | if (ret) | |
1954 | return ret; | |
1955 | ||
fc879f72 AL |
1956 | return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, |
1957 | MII_VCT7_CTRL, | |
1958 | MII_VCT7_CTRL_RUN_NOW | | |
1959 | MII_VCT7_CTRL_CENTIMETERS); | |
1960 | } | |
1961 | ||
f2bc8ad3 AL |
1962 | static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, |
1963 | const struct phy_tdr_config *cfg) | |
0c9bcc1d AL |
1964 | { |
1965 | struct marvell_priv *priv = phydev->priv; | |
1966 | int ret; | |
1967 | ||
f2bc8ad3 AL |
1968 | priv->cable_test_tdr = true; |
1969 | priv->first = marvell_vct5_cm2distance(cfg->first); | |
1970 | priv->last = marvell_vct5_cm2distance(cfg->last); | |
1971 | priv->step = marvell_vct5_cm2distance(cfg->step); | |
1972 | priv->pair = cfg->pair; | |
1973 | ||
1974 | if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) | |
1975 | return -EINVAL; | |
1976 | ||
1977 | if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) | |
1978 | return -EINVAL; | |
1979 | ||
0c9bcc1d AL |
1980 | /* Disable VCT7 */ |
1981 | ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, | |
1982 | MII_VCT7_CTRL, 0); | |
1983 | if (ret) | |
1984 | return ret; | |
1985 | ||
1986 | ret = marvell_cable_test_start_common(phydev); | |
1987 | if (ret) | |
1988 | return ret; | |
1989 | ||
0c9bcc1d AL |
1990 | ret = ethnl_cable_test_pulse(phydev, 1000); |
1991 | if (ret) | |
1992 | return ret; | |
1993 | ||
1994 | return ethnl_cable_test_step(phydev, | |
f2bc8ad3 AL |
1995 | marvell_vct5_distance2cm(priv->first), |
1996 | marvell_vct5_distance2cm(priv->last), | |
1997 | marvell_vct5_distance2cm(priv->step)); | |
0c9bcc1d AL |
1998 | } |
1999 | ||
fc879f72 AL |
2000 | static int marvell_vct7_distance_to_length(int distance, bool meter) |
2001 | { | |
2002 | if (meter) | |
2003 | distance *= 100; | |
2004 | ||
2005 | return distance; | |
2006 | } | |
2007 | ||
2008 | static bool marvell_vct7_distance_valid(int result) | |
2009 | { | |
2010 | switch (result) { | |
2011 | case MII_VCT7_RESULTS_OPEN: | |
2012 | case MII_VCT7_RESULTS_SAME_SHORT: | |
2013 | case MII_VCT7_RESULTS_CROSS_SHORT: | |
2014 | return true; | |
2015 | } | |
2016 | return false; | |
2017 | } | |
2018 | ||
2019 | static int marvell_vct7_report_length(struct phy_device *phydev, | |
2020 | int pair, bool meter) | |
2021 | { | |
2022 | int length; | |
2023 | int ret; | |
2024 | ||
2025 | ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, | |
2026 | MII_VCT7_PAIR_0_DISTANCE + pair); | |
2027 | if (ret < 0) | |
2028 | return ret; | |
2029 | ||
2030 | length = marvell_vct7_distance_to_length(ret, meter); | |
2031 | ||
2032 | ethnl_cable_test_fault_length(phydev, pair, length); | |
2033 | ||
2034 | return 0; | |
2035 | } | |
2036 | ||
2037 | static int marvell_vct7_cable_test_report_trans(int result) | |
2038 | { | |
2039 | switch (result) { | |
2040 | case MII_VCT7_RESULTS_OK: | |
2041 | return ETHTOOL_A_CABLE_RESULT_CODE_OK; | |
2042 | case MII_VCT7_RESULTS_OPEN: | |
2043 | return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; | |
2044 | case MII_VCT7_RESULTS_SAME_SHORT: | |
2045 | return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; | |
2046 | case MII_VCT7_RESULTS_CROSS_SHORT: | |
2047 | return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; | |
2048 | default: | |
2049 | return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; | |
2050 | } | |
2051 | } | |
2052 | ||
2053 | static int marvell_vct7_cable_test_report(struct phy_device *phydev) | |
2054 | { | |
2055 | int pair0, pair1, pair2, pair3; | |
2056 | bool meter; | |
2057 | int ret; | |
2058 | ||
2059 | ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, | |
2060 | MII_VCT7_RESULTS); | |
2061 | if (ret < 0) | |
2062 | return ret; | |
2063 | ||
2064 | pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> | |
2065 | MII_VCT7_RESULTS_PAIR3_SHIFT; | |
2066 | pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> | |
2067 | MII_VCT7_RESULTS_PAIR2_SHIFT; | |
2068 | pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> | |
2069 | MII_VCT7_RESULTS_PAIR1_SHIFT; | |
2070 | pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> | |
2071 | MII_VCT7_RESULTS_PAIR0_SHIFT; | |
2072 | ||
2073 | ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, | |
2074 | marvell_vct7_cable_test_report_trans(pair0)); | |
2075 | ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, | |
2076 | marvell_vct7_cable_test_report_trans(pair1)); | |
2077 | ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, | |
2078 | marvell_vct7_cable_test_report_trans(pair2)); | |
2079 | ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, | |
2080 | marvell_vct7_cable_test_report_trans(pair3)); | |
2081 | ||
2082 | ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); | |
2083 | if (ret < 0) | |
2084 | return ret; | |
2085 | ||
2086 | meter = ret & MII_VCT7_CTRL_METERS; | |
2087 | ||
2088 | if (marvell_vct7_distance_valid(pair0)) | |
2089 | marvell_vct7_report_length(phydev, 0, meter); | |
2090 | if (marvell_vct7_distance_valid(pair1)) | |
2091 | marvell_vct7_report_length(phydev, 1, meter); | |
2092 | if (marvell_vct7_distance_valid(pair2)) | |
2093 | marvell_vct7_report_length(phydev, 2, meter); | |
2094 | if (marvell_vct7_distance_valid(pair3)) | |
2095 | marvell_vct7_report_length(phydev, 3, meter); | |
2096 | ||
2097 | return 0; | |
2098 | } | |
2099 | ||
2100 | static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, | |
2101 | bool *finished) | |
2102 | { | |
0c9bcc1d | 2103 | struct marvell_priv *priv = phydev->priv; |
fc879f72 AL |
2104 | int ret; |
2105 | ||
0c9bcc1d AL |
2106 | if (priv->cable_test_tdr) { |
2107 | ret = marvell_vct5_amplitude_graph(phydev); | |
2108 | *finished = true; | |
2109 | return ret; | |
2110 | } | |
2111 | ||
fc879f72 AL |
2112 | *finished = false; |
2113 | ||
2114 | ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, | |
2115 | MII_VCT7_CTRL); | |
2116 | ||
2117 | if (ret < 0) | |
2118 | return ret; | |
2119 | ||
2120 | if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { | |
2121 | *finished = true; | |
2122 | ||
2123 | return marvell_vct7_cable_test_report(phydev); | |
2124 | } | |
2125 | ||
2126 | return 0; | |
2127 | } | |
2128 | ||
0b04680f AL |
2129 | #ifdef CONFIG_HWMON |
2130 | static int m88e1121_get_temp(struct phy_device *phydev, long *temp) | |
2131 | { | |
975b388c | 2132 | int oldpage; |
424ca4c5 | 2133 | int ret = 0; |
0b04680f AL |
2134 | int val; |
2135 | ||
2136 | *temp = 0; | |
2137 | ||
424ca4c5 RK |
2138 | oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
2139 | if (oldpage < 0) | |
2140 | goto error; | |
975b388c | 2141 | |
0b04680f | 2142 | /* Enable temperature sensor */ |
424ca4c5 | 2143 | ret = __phy_read(phydev, MII_88E1121_MISC_TEST); |
0b04680f AL |
2144 | if (ret < 0) |
2145 | goto error; | |
2146 | ||
424ca4c5 RK |
2147 | ret = __phy_write(phydev, MII_88E1121_MISC_TEST, |
2148 | ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); | |
0b04680f AL |
2149 | if (ret < 0) |
2150 | goto error; | |
2151 | ||
2152 | /* Wait for temperature to stabilize */ | |
2153 | usleep_range(10000, 12000); | |
2154 | ||
424ca4c5 | 2155 | val = __phy_read(phydev, MII_88E1121_MISC_TEST); |
0b04680f AL |
2156 | if (val < 0) { |
2157 | ret = val; | |
2158 | goto error; | |
2159 | } | |
2160 | ||
2161 | /* Disable temperature sensor */ | |
424ca4c5 RK |
2162 | ret = __phy_write(phydev, MII_88E1121_MISC_TEST, |
2163 | ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); | |
0b04680f AL |
2164 | if (ret < 0) |
2165 | goto error; | |
2166 | ||
2167 | *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; | |
2168 | ||
2169 | error: | |
424ca4c5 | 2170 | return phy_restore_page(phydev, oldpage, ret); |
0b04680f AL |
2171 | } |
2172 | ||
2173 | static int m88e1121_hwmon_read(struct device *dev, | |
2174 | enum hwmon_sensor_types type, | |
2175 | u32 attr, int channel, long *temp) | |
2176 | { | |
2177 | struct phy_device *phydev = dev_get_drvdata(dev); | |
2178 | int err; | |
2179 | ||
2180 | switch (attr) { | |
2181 | case hwmon_temp_input: | |
2182 | err = m88e1121_get_temp(phydev, temp); | |
2183 | break; | |
2184 | default: | |
2185 | return -EOPNOTSUPP; | |
2186 | } | |
2187 | ||
2188 | return err; | |
2189 | } | |
2190 | ||
2191 | static umode_t m88e1121_hwmon_is_visible(const void *data, | |
2192 | enum hwmon_sensor_types type, | |
2193 | u32 attr, int channel) | |
2194 | { | |
2195 | if (type != hwmon_temp) | |
2196 | return 0; | |
2197 | ||
2198 | switch (attr) { | |
2199 | case hwmon_temp_input: | |
2200 | return 0444; | |
2201 | default: | |
2202 | return 0; | |
2203 | } | |
2204 | } | |
2205 | ||
2206 | static u32 m88e1121_hwmon_chip_config[] = { | |
2207 | HWMON_C_REGISTER_TZ, | |
2208 | 0 | |
2209 | }; | |
2210 | ||
2211 | static const struct hwmon_channel_info m88e1121_hwmon_chip = { | |
2212 | .type = hwmon_chip, | |
2213 | .config = m88e1121_hwmon_chip_config, | |
2214 | }; | |
2215 | ||
2216 | static u32 m88e1121_hwmon_temp_config[] = { | |
2217 | HWMON_T_INPUT, | |
2218 | 0 | |
2219 | }; | |
2220 | ||
2221 | static const struct hwmon_channel_info m88e1121_hwmon_temp = { | |
2222 | .type = hwmon_temp, | |
2223 | .config = m88e1121_hwmon_temp_config, | |
2224 | }; | |
2225 | ||
2226 | static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { | |
2227 | &m88e1121_hwmon_chip, | |
2228 | &m88e1121_hwmon_temp, | |
2229 | NULL | |
2230 | }; | |
2231 | ||
2232 | static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { | |
2233 | .is_visible = m88e1121_hwmon_is_visible, | |
2234 | .read = m88e1121_hwmon_read, | |
2235 | }; | |
2236 | ||
2237 | static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { | |
2238 | .ops = &m88e1121_hwmon_hwmon_ops, | |
2239 | .info = m88e1121_hwmon_info, | |
2240 | }; | |
2241 | ||
2242 | static int m88e1510_get_temp(struct phy_device *phydev, long *temp) | |
2243 | { | |
2244 | int ret; | |
2245 | ||
2246 | *temp = 0; | |
2247 | ||
424ca4c5 RK |
2248 | ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, |
2249 | MII_88E1510_TEMP_SENSOR); | |
0b04680f | 2250 | if (ret < 0) |
424ca4c5 | 2251 | return ret; |
0b04680f AL |
2252 | |
2253 | *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; | |
2254 | ||
424ca4c5 | 2255 | return 0; |
0b04680f AL |
2256 | } |
2257 | ||
f0a45816 | 2258 | static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) |
0b04680f AL |
2259 | { |
2260 | int ret; | |
2261 | ||
2262 | *temp = 0; | |
2263 | ||
424ca4c5 RK |
2264 | ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, |
2265 | MII_88E1121_MISC_TEST); | |
0b04680f | 2266 | if (ret < 0) |
424ca4c5 | 2267 | return ret; |
0b04680f AL |
2268 | |
2269 | *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> | |
2270 | MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; | |
2271 | /* convert to mC */ | |
2272 | *temp *= 1000; | |
2273 | ||
424ca4c5 | 2274 | return 0; |
0b04680f AL |
2275 | } |
2276 | ||
f0a45816 | 2277 | static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) |
0b04680f | 2278 | { |
0b04680f AL |
2279 | temp = temp / 1000; |
2280 | temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); | |
0b04680f | 2281 | |
424ca4c5 RK |
2282 | return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, |
2283 | MII_88E1121_MISC_TEST, | |
2284 | MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, | |
2285 | temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); | |
0b04680f AL |
2286 | } |
2287 | ||
f0a45816 | 2288 | static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) |
0b04680f AL |
2289 | { |
2290 | int ret; | |
2291 | ||
2292 | *alarm = false; | |
2293 | ||
424ca4c5 RK |
2294 | ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, |
2295 | MII_88E1121_MISC_TEST); | |
0b04680f | 2296 | if (ret < 0) |
424ca4c5 | 2297 | return ret; |
0b04680f | 2298 | |
424ca4c5 | 2299 | *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); |
0b04680f | 2300 | |
424ca4c5 | 2301 | return 0; |
0b04680f AL |
2302 | } |
2303 | ||
2304 | static int m88e1510_hwmon_read(struct device *dev, | |
2305 | enum hwmon_sensor_types type, | |
2306 | u32 attr, int channel, long *temp) | |
2307 | { | |
2308 | struct phy_device *phydev = dev_get_drvdata(dev); | |
2309 | int err; | |
2310 | ||
2311 | switch (attr) { | |
2312 | case hwmon_temp_input: | |
2313 | err = m88e1510_get_temp(phydev, temp); | |
2314 | break; | |
2315 | case hwmon_temp_crit: | |
2316 | err = m88e1510_get_temp_critical(phydev, temp); | |
2317 | break; | |
2318 | case hwmon_temp_max_alarm: | |
2319 | err = m88e1510_get_temp_alarm(phydev, temp); | |
2320 | break; | |
2321 | default: | |
2322 | return -EOPNOTSUPP; | |
2323 | } | |
2324 | ||
2325 | return err; | |
2326 | } | |
2327 | ||
2328 | static int m88e1510_hwmon_write(struct device *dev, | |
2329 | enum hwmon_sensor_types type, | |
2330 | u32 attr, int channel, long temp) | |
2331 | { | |
2332 | struct phy_device *phydev = dev_get_drvdata(dev); | |
2333 | int err; | |
2334 | ||
2335 | switch (attr) { | |
2336 | case hwmon_temp_crit: | |
2337 | err = m88e1510_set_temp_critical(phydev, temp); | |
2338 | break; | |
2339 | default: | |
2340 | return -EOPNOTSUPP; | |
2341 | } | |
2342 | return err; | |
2343 | } | |
2344 | ||
2345 | static umode_t m88e1510_hwmon_is_visible(const void *data, | |
2346 | enum hwmon_sensor_types type, | |
2347 | u32 attr, int channel) | |
2348 | { | |
2349 | if (type != hwmon_temp) | |
2350 | return 0; | |
2351 | ||
2352 | switch (attr) { | |
2353 | case hwmon_temp_input: | |
2354 | case hwmon_temp_max_alarm: | |
2355 | return 0444; | |
2356 | case hwmon_temp_crit: | |
2357 | return 0644; | |
2358 | default: | |
2359 | return 0; | |
2360 | } | |
2361 | } | |
2362 | ||
2363 | static u32 m88e1510_hwmon_temp_config[] = { | |
2364 | HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, | |
2365 | 0 | |
2366 | }; | |
2367 | ||
2368 | static const struct hwmon_channel_info m88e1510_hwmon_temp = { | |
2369 | .type = hwmon_temp, | |
2370 | .config = m88e1510_hwmon_temp_config, | |
2371 | }; | |
2372 | ||
2373 | static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { | |
2374 | &m88e1121_hwmon_chip, | |
2375 | &m88e1510_hwmon_temp, | |
2376 | NULL | |
2377 | }; | |
2378 | ||
2379 | static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { | |
2380 | .is_visible = m88e1510_hwmon_is_visible, | |
2381 | .read = m88e1510_hwmon_read, | |
2382 | .write = m88e1510_hwmon_write, | |
2383 | }; | |
2384 | ||
2385 | static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { | |
2386 | .ops = &m88e1510_hwmon_hwmon_ops, | |
2387 | .info = m88e1510_hwmon_info, | |
2388 | }; | |
2389 | ||
fee2d546 AL |
2390 | static int m88e6390_get_temp(struct phy_device *phydev, long *temp) |
2391 | { | |
2392 | int sum = 0; | |
2393 | int oldpage; | |
2394 | int ret = 0; | |
2395 | int i; | |
2396 | ||
2397 | *temp = 0; | |
2398 | ||
2399 | oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); | |
2400 | if (oldpage < 0) | |
2401 | goto error; | |
2402 | ||
2403 | /* Enable temperature sensor */ | |
2404 | ret = __phy_read(phydev, MII_88E6390_MISC_TEST); | |
2405 | if (ret < 0) | |
2406 | goto error; | |
2407 | ||
2408 | ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; | |
2409 | ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | | |
2410 | MII_88E6390_MISC_TEST_SAMPLE_1S; | |
2411 | ||
2412 | ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); | |
2413 | if (ret < 0) | |
2414 | goto error; | |
2415 | ||
2416 | /* Wait for temperature to stabilize */ | |
2417 | usleep_range(10000, 12000); | |
2418 | ||
2419 | /* Reading the temperature sense has an errata. You need to read | |
2420 | * a number of times and take an average. | |
2421 | */ | |
2422 | for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { | |
2423 | ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); | |
2424 | if (ret < 0) | |
2425 | goto error; | |
2426 | sum += ret & MII_88E6390_TEMP_SENSOR_MASK; | |
2427 | } | |
2428 | ||
2429 | sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; | |
2430 | *temp = (sum - 75) * 1000; | |
2431 | ||
2432 | /* Disable temperature sensor */ | |
2433 | ret = __phy_read(phydev, MII_88E6390_MISC_TEST); | |
2434 | if (ret < 0) | |
2435 | goto error; | |
2436 | ||
2437 | ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; | |
2438 | ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; | |
2439 | ||
2440 | ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); | |
2441 | ||
2442 | error: | |
2443 | phy_restore_page(phydev, oldpage, ret); | |
2444 | ||
2445 | return ret; | |
2446 | } | |
2447 | ||
2448 | static int m88e6390_hwmon_read(struct device *dev, | |
2449 | enum hwmon_sensor_types type, | |
2450 | u32 attr, int channel, long *temp) | |
2451 | { | |
2452 | struct phy_device *phydev = dev_get_drvdata(dev); | |
2453 | int err; | |
2454 | ||
2455 | switch (attr) { | |
2456 | case hwmon_temp_input: | |
2457 | err = m88e6390_get_temp(phydev, temp); | |
2458 | break; | |
2459 | default: | |
2460 | return -EOPNOTSUPP; | |
2461 | } | |
2462 | ||
2463 | return err; | |
2464 | } | |
2465 | ||
2466 | static umode_t m88e6390_hwmon_is_visible(const void *data, | |
2467 | enum hwmon_sensor_types type, | |
2468 | u32 attr, int channel) | |
2469 | { | |
2470 | if (type != hwmon_temp) | |
2471 | return 0; | |
2472 | ||
2473 | switch (attr) { | |
2474 | case hwmon_temp_input: | |
2475 | return 0444; | |
2476 | default: | |
2477 | return 0; | |
2478 | } | |
2479 | } | |
2480 | ||
2481 | static u32 m88e6390_hwmon_temp_config[] = { | |
2482 | HWMON_T_INPUT, | |
2483 | 0 | |
2484 | }; | |
2485 | ||
2486 | static const struct hwmon_channel_info m88e6390_hwmon_temp = { | |
2487 | .type = hwmon_temp, | |
2488 | .config = m88e6390_hwmon_temp_config, | |
2489 | }; | |
2490 | ||
2491 | static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { | |
2492 | &m88e1121_hwmon_chip, | |
2493 | &m88e6390_hwmon_temp, | |
2494 | NULL | |
2495 | }; | |
2496 | ||
2497 | static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { | |
2498 | .is_visible = m88e6390_hwmon_is_visible, | |
2499 | .read = m88e6390_hwmon_read, | |
2500 | }; | |
2501 | ||
2502 | static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { | |
2503 | .ops = &m88e6390_hwmon_hwmon_ops, | |
2504 | .info = m88e6390_hwmon_info, | |
2505 | }; | |
2506 | ||
0b04680f AL |
2507 | static int marvell_hwmon_name(struct phy_device *phydev) |
2508 | { | |
2509 | struct marvell_priv *priv = phydev->priv; | |
2510 | struct device *dev = &phydev->mdio.dev; | |
2511 | const char *devname = dev_name(dev); | |
2512 | size_t len = strlen(devname); | |
2513 | int i, j; | |
2514 | ||
2515 | priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); | |
2516 | if (!priv->hwmon_name) | |
2517 | return -ENOMEM; | |
2518 | ||
2519 | for (i = j = 0; i < len && devname[i]; i++) { | |
2520 | if (isalnum(devname[i])) | |
2521 | priv->hwmon_name[j++] = devname[i]; | |
2522 | } | |
2523 | ||
2524 | return 0; | |
2525 | } | |
2526 | ||
2527 | static int marvell_hwmon_probe(struct phy_device *phydev, | |
2528 | const struct hwmon_chip_info *chip) | |
2529 | { | |
2530 | struct marvell_priv *priv = phydev->priv; | |
2531 | struct device *dev = &phydev->mdio.dev; | |
2532 | int err; | |
2533 | ||
2534 | err = marvell_hwmon_name(phydev); | |
2535 | if (err) | |
2536 | return err; | |
2537 | ||
2538 | priv->hwmon_dev = devm_hwmon_device_register_with_info( | |
2539 | dev, priv->hwmon_name, phydev, chip, NULL); | |
2540 | ||
2541 | return PTR_ERR_OR_ZERO(priv->hwmon_dev); | |
2542 | } | |
2543 | ||
2544 | static int m88e1121_hwmon_probe(struct phy_device *phydev) | |
2545 | { | |
2546 | return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); | |
2547 | } | |
2548 | ||
2549 | static int m88e1510_hwmon_probe(struct phy_device *phydev) | |
2550 | { | |
2551 | return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); | |
2552 | } | |
fee2d546 AL |
2553 | |
2554 | static int m88e6390_hwmon_probe(struct phy_device *phydev) | |
2555 | { | |
2556 | return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); | |
2557 | } | |
0b04680f AL |
2558 | #else |
2559 | static int m88e1121_hwmon_probe(struct phy_device *phydev) | |
2560 | { | |
2561 | return 0; | |
2562 | } | |
2563 | ||
2564 | static int m88e1510_hwmon_probe(struct phy_device *phydev) | |
2565 | { | |
2566 | return 0; | |
2567 | } | |
fee2d546 AL |
2568 | |
2569 | static int m88e6390_hwmon_probe(struct phy_device *phydev) | |
2570 | { | |
2571 | return 0; | |
2572 | } | |
0b04680f AL |
2573 | #endif |
2574 | ||
d2fa47d9 AL |
2575 | static int marvell_probe(struct phy_device *phydev) |
2576 | { | |
2577 | struct marvell_priv *priv; | |
2578 | ||
e5a03bfd | 2579 | priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); |
d2fa47d9 AL |
2580 | if (!priv) |
2581 | return -ENOMEM; | |
2582 | ||
2583 | phydev->priv = priv; | |
2584 | ||
2585 | return 0; | |
2586 | } | |
2587 | ||
0b04680f AL |
2588 | static int m88e1121_probe(struct phy_device *phydev) |
2589 | { | |
2590 | int err; | |
2591 | ||
2592 | err = marvell_probe(phydev); | |
2593 | if (err) | |
2594 | return err; | |
2595 | ||
2596 | return m88e1121_hwmon_probe(phydev); | |
2597 | } | |
2598 | ||
2599 | static int m88e1510_probe(struct phy_device *phydev) | |
2600 | { | |
2601 | int err; | |
2602 | ||
2603 | err = marvell_probe(phydev); | |
2604 | if (err) | |
2605 | return err; | |
2606 | ||
2607 | return m88e1510_hwmon_probe(phydev); | |
2608 | } | |
2609 | ||
fee2d546 AL |
2610 | static int m88e6390_probe(struct phy_device *phydev) |
2611 | { | |
2612 | int err; | |
2613 | ||
2614 | err = marvell_probe(phydev); | |
2615 | if (err) | |
2616 | return err; | |
2617 | ||
2618 | return m88e6390_hwmon_probe(phydev); | |
2619 | } | |
2620 | ||
e5479239 OJ |
2621 | static struct phy_driver marvell_drivers[] = { |
2622 | { | |
2f495c39 BH |
2623 | .phy_id = MARVELL_PHY_ID_88E1101, |
2624 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 | 2625 | .name = "Marvell 88E1101", |
dcdecdcf | 2626 | /* PHY_GBIT_FEATURES */ |
18702414 | 2627 | .probe = marvell_probe, |
ef0f9545 MK |
2628 | .config_init = marvell_config_init, |
2629 | .config_aneg = m88e1101_config_aneg, | |
2630 | .ack_interrupt = marvell_ack_interrupt, | |
2631 | .config_intr = marvell_config_intr, | |
2632 | .resume = genphy_resume, | |
2633 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2634 | .read_page = marvell_read_page, |
2635 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2636 | .get_sset_count = marvell_get_sset_count, |
2637 | .get_strings = marvell_get_strings, | |
2638 | .get_stats = marvell_get_stats, | |
e5479239 | 2639 | }, |
85cfb534 | 2640 | { |
2f495c39 BH |
2641 | .phy_id = MARVELL_PHY_ID_88E1112, |
2642 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
85cfb534 | 2643 | .name = "Marvell 88E1112", |
dcdecdcf | 2644 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2645 | .probe = marvell_probe, |
ef0f9545 MK |
2646 | .config_init = m88e1111_config_init, |
2647 | .config_aneg = marvell_config_aneg, | |
2648 | .ack_interrupt = marvell_ack_interrupt, | |
2649 | .config_intr = marvell_config_intr, | |
2650 | .resume = genphy_resume, | |
2651 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2652 | .read_page = marvell_read_page, |
2653 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2654 | .get_sset_count = marvell_get_sset_count, |
2655 | .get_strings = marvell_get_strings, | |
2656 | .get_stats = marvell_get_stats, | |
262caf47 HK |
2657 | .get_tunable = m88e1011_get_tunable, |
2658 | .set_tunable = m88e1011_set_tunable, | |
85cfb534 | 2659 | }, |
e5479239 | 2660 | { |
2f495c39 BH |
2661 | .phy_id = MARVELL_PHY_ID_88E1111, |
2662 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 | 2663 | .name = "Marvell 88E1111", |
dcdecdcf | 2664 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2665 | .probe = marvell_probe, |
ef0f9545 MK |
2666 | .config_init = m88e1111_config_init, |
2667 | .config_aneg = marvell_config_aneg, | |
2668 | .read_status = marvell_read_status, | |
2669 | .ack_interrupt = marvell_ack_interrupt, | |
2670 | .config_intr = marvell_config_intr, | |
2671 | .resume = genphy_resume, | |
2672 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2673 | .read_page = marvell_read_page, |
2674 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2675 | .get_sset_count = marvell_get_sset_count, |
2676 | .get_strings = marvell_get_strings, | |
2677 | .get_stats = marvell_get_stats, | |
5c6bc519 HK |
2678 | .get_tunable = m88e1111_get_tunable, |
2679 | .set_tunable = m88e1111_set_tunable, | |
e5479239 | 2680 | }, |
605f196e | 2681 | { |
2f495c39 BH |
2682 | .phy_id = MARVELL_PHY_ID_88E1118, |
2683 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
605f196e | 2684 | .name = "Marvell 88E1118", |
dcdecdcf | 2685 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2686 | .probe = marvell_probe, |
ef0f9545 MK |
2687 | .config_init = m88e1118_config_init, |
2688 | .config_aneg = m88e1118_config_aneg, | |
2689 | .ack_interrupt = marvell_ack_interrupt, | |
2690 | .config_intr = marvell_config_intr, | |
2691 | .resume = genphy_resume, | |
2692 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2693 | .read_page = marvell_read_page, |
2694 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2695 | .get_sset_count = marvell_get_sset_count, |
2696 | .get_strings = marvell_get_strings, | |
2697 | .get_stats = marvell_get_stats, | |
605f196e | 2698 | }, |
140bc929 | 2699 | { |
2f495c39 BH |
2700 | .phy_id = MARVELL_PHY_ID_88E1121R, |
2701 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
140bc929 | 2702 | .name = "Marvell 88E1121R", |
dcdecdcf | 2703 | /* PHY_GBIT_FEATURES */ |
ef0f9545 MK |
2704 | .probe = m88e1121_probe, |
2705 | .config_init = marvell_config_init, | |
2706 | .config_aneg = m88e1121_config_aneg, | |
2707 | .read_status = marvell_read_status, | |
2708 | .ack_interrupt = marvell_ack_interrupt, | |
2709 | .config_intr = marvell_config_intr, | |
2710 | .did_interrupt = m88e1121_did_interrupt, | |
2711 | .resume = genphy_resume, | |
2712 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2713 | .read_page = marvell_read_page, |
2714 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2715 | .get_sset_count = marvell_get_sset_count, |
2716 | .get_strings = marvell_get_strings, | |
2717 | .get_stats = marvell_get_stats, | |
911af5e1 HK |
2718 | .get_tunable = m88e1011_get_tunable, |
2719 | .set_tunable = m88e1011_set_tunable, | |
140bc929 | 2720 | }, |
3ff1c259 | 2721 | { |
337ac9d5 | 2722 | .phy_id = MARVELL_PHY_ID_88E1318S, |
6ba74014 | 2723 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
337ac9d5 | 2724 | .name = "Marvell 88E1318S", |
dcdecdcf | 2725 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2726 | .probe = marvell_probe, |
ef0f9545 MK |
2727 | .config_init = m88e1318_config_init, |
2728 | .config_aneg = m88e1318_config_aneg, | |
2729 | .read_status = marvell_read_status, | |
2730 | .ack_interrupt = marvell_ack_interrupt, | |
2731 | .config_intr = marvell_config_intr, | |
2732 | .did_interrupt = m88e1121_did_interrupt, | |
2733 | .get_wol = m88e1318_get_wol, | |
2734 | .set_wol = m88e1318_set_wol, | |
2735 | .resume = genphy_resume, | |
2736 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2737 | .read_page = marvell_read_page, |
2738 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2739 | .get_sset_count = marvell_get_sset_count, |
2740 | .get_strings = marvell_get_strings, | |
2741 | .get_stats = marvell_get_stats, | |
3ff1c259 | 2742 | }, |
e5479239 | 2743 | { |
2f495c39 BH |
2744 | .phy_id = MARVELL_PHY_ID_88E1145, |
2745 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 | 2746 | .name = "Marvell 88E1145", |
dcdecdcf | 2747 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2748 | .probe = marvell_probe, |
ef0f9545 MK |
2749 | .config_init = m88e1145_config_init, |
2750 | .config_aneg = m88e1101_config_aneg, | |
2751 | .read_status = genphy_read_status, | |
2752 | .ack_interrupt = marvell_ack_interrupt, | |
2753 | .config_intr = marvell_config_intr, | |
2754 | .resume = genphy_resume, | |
2755 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2756 | .read_page = marvell_read_page, |
2757 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2758 | .get_sset_count = marvell_get_sset_count, |
2759 | .get_strings = marvell_get_strings, | |
2760 | .get_stats = marvell_get_stats, | |
a319fb52 HK |
2761 | .get_tunable = m88e1111_get_tunable, |
2762 | .set_tunable = m88e1111_set_tunable, | |
ac8c635a | 2763 | }, |
90600732 DD |
2764 | { |
2765 | .phy_id = MARVELL_PHY_ID_88E1149R, | |
2766 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2767 | .name = "Marvell 88E1149R", | |
dcdecdcf | 2768 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2769 | .probe = marvell_probe, |
ef0f9545 MK |
2770 | .config_init = m88e1149_config_init, |
2771 | .config_aneg = m88e1118_config_aneg, | |
2772 | .ack_interrupt = marvell_ack_interrupt, | |
2773 | .config_intr = marvell_config_intr, | |
2774 | .resume = genphy_resume, | |
2775 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2776 | .read_page = marvell_read_page, |
2777 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2778 | .get_sset_count = marvell_get_sset_count, |
2779 | .get_strings = marvell_get_strings, | |
2780 | .get_stats = marvell_get_stats, | |
90600732 | 2781 | }, |
ac8c635a | 2782 | { |
2f495c39 BH |
2783 | .phy_id = MARVELL_PHY_ID_88E1240, |
2784 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
ac8c635a | 2785 | .name = "Marvell 88E1240", |
dcdecdcf | 2786 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2787 | .probe = marvell_probe, |
ef0f9545 MK |
2788 | .config_init = m88e1111_config_init, |
2789 | .config_aneg = marvell_config_aneg, | |
2790 | .ack_interrupt = marvell_ack_interrupt, | |
2791 | .config_intr = marvell_config_intr, | |
2792 | .resume = genphy_resume, | |
2793 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2794 | .read_page = marvell_read_page, |
2795 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2796 | .get_sset_count = marvell_get_sset_count, |
2797 | .get_strings = marvell_get_strings, | |
2798 | .get_stats = marvell_get_stats, | |
ac8c635a | 2799 | }, |
3da09a51 MS |
2800 | { |
2801 | .phy_id = MARVELL_PHY_ID_88E1116R, | |
2802 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2803 | .name = "Marvell 88E1116R", | |
dcdecdcf | 2804 | /* PHY_GBIT_FEATURES */ |
d2fa47d9 | 2805 | .probe = marvell_probe, |
ef0f9545 MK |
2806 | .config_init = m88e1116r_config_init, |
2807 | .ack_interrupt = marvell_ack_interrupt, | |
2808 | .config_intr = marvell_config_intr, | |
2809 | .resume = genphy_resume, | |
2810 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2811 | .read_page = marvell_read_page, |
2812 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2813 | .get_sset_count = marvell_get_sset_count, |
2814 | .get_strings = marvell_get_strings, | |
2815 | .get_stats = marvell_get_stats, | |
262caf47 HK |
2816 | .get_tunable = m88e1011_get_tunable, |
2817 | .set_tunable = m88e1011_set_tunable, | |
3da09a51 | 2818 | }, |
10e24caa MS |
2819 | { |
2820 | .phy_id = MARVELL_PHY_ID_88E1510, | |
2821 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2822 | .name = "Marvell 88E1510", | |
719655a1 | 2823 | .features = PHY_GBIT_FIBRE_FEATURES, |
fc879f72 | 2824 | .flags = PHY_POLL_CABLE_TEST, |
ef0f9545 MK |
2825 | .probe = m88e1510_probe, |
2826 | .config_init = m88e1510_config_init, | |
2827 | .config_aneg = m88e1510_config_aneg, | |
2828 | .read_status = marvell_read_status, | |
2829 | .ack_interrupt = marvell_ack_interrupt, | |
2830 | .config_intr = marvell_config_intr, | |
2831 | .did_interrupt = m88e1121_did_interrupt, | |
2832 | .get_wol = m88e1318_get_wol, | |
2833 | .set_wol = m88e1318_set_wol, | |
2834 | .resume = marvell_resume, | |
2835 | .suspend = marvell_suspend, | |
424ca4c5 RK |
2836 | .read_page = marvell_read_page, |
2837 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2838 | .get_sset_count = marvell_get_sset_count, |
2839 | .get_strings = marvell_get_strings, | |
2840 | .get_stats = marvell_get_stats, | |
f0f9b4ed | 2841 | .set_loopback = genphy_loopback, |
262caf47 HK |
2842 | .get_tunable = m88e1011_get_tunable, |
2843 | .set_tunable = m88e1011_set_tunable, | |
fc879f72 | 2844 | .cable_test_start = marvell_vct7_cable_test_start, |
0c9bcc1d | 2845 | .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, |
fc879f72 | 2846 | .cable_test_get_status = marvell_vct7_cable_test_get_status, |
10e24caa | 2847 | }, |
819ec8e1 AL |
2848 | { |
2849 | .phy_id = MARVELL_PHY_ID_88E1540, | |
2850 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2851 | .name = "Marvell 88E1540", | |
dcdecdcf | 2852 | /* PHY_GBIT_FEATURES */ |
fc879f72 | 2853 | .flags = PHY_POLL_CABLE_TEST, |
18702414 | 2854 | .probe = m88e1510_probe, |
ef0f9545 MK |
2855 | .config_init = marvell_config_init, |
2856 | .config_aneg = m88e1510_config_aneg, | |
2857 | .read_status = marvell_read_status, | |
2858 | .ack_interrupt = marvell_ack_interrupt, | |
2859 | .config_intr = marvell_config_intr, | |
2860 | .did_interrupt = m88e1121_did_interrupt, | |
2861 | .resume = genphy_resume, | |
2862 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2863 | .read_page = marvell_read_page, |
2864 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2865 | .get_sset_count = marvell_get_sset_count, |
2866 | .get_strings = marvell_get_strings, | |
2867 | .get_stats = marvell_get_stats, | |
69f42be8 HK |
2868 | .get_tunable = m88e1540_get_tunable, |
2869 | .set_tunable = m88e1540_set_tunable, | |
fc879f72 | 2870 | .cable_test_start = marvell_vct7_cable_test_start, |
0c9bcc1d | 2871 | .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, |
fc879f72 | 2872 | .cable_test_get_status = marvell_vct7_cable_test_get_status, |
819ec8e1 | 2873 | }, |
60f06fde AL |
2874 | { |
2875 | .phy_id = MARVELL_PHY_ID_88E1545, | |
2876 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2877 | .name = "Marvell 88E1545", | |
2878 | .probe = m88e1510_probe, | |
dcdecdcf | 2879 | /* PHY_GBIT_FEATURES */ |
fc879f72 | 2880 | .flags = PHY_POLL_CABLE_TEST, |
ef0f9545 MK |
2881 | .config_init = marvell_config_init, |
2882 | .config_aneg = m88e1510_config_aneg, | |
2883 | .read_status = marvell_read_status, | |
2884 | .ack_interrupt = marvell_ack_interrupt, | |
2885 | .config_intr = marvell_config_intr, | |
2886 | .did_interrupt = m88e1121_did_interrupt, | |
2887 | .resume = genphy_resume, | |
2888 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2889 | .read_page = marvell_read_page, |
2890 | .write_page = marvell_write_page, | |
60f06fde AL |
2891 | .get_sset_count = marvell_get_sset_count, |
2892 | .get_strings = marvell_get_strings, | |
2893 | .get_stats = marvell_get_stats, | |
262caf47 HK |
2894 | .get_tunable = m88e1540_get_tunable, |
2895 | .set_tunable = m88e1540_set_tunable, | |
fc879f72 | 2896 | .cable_test_start = marvell_vct7_cable_test_start, |
0c9bcc1d | 2897 | .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, |
fc879f72 | 2898 | .cable_test_get_status = marvell_vct7_cable_test_get_status, |
60f06fde | 2899 | }, |
6b358aed SH |
2900 | { |
2901 | .phy_id = MARVELL_PHY_ID_88E3016, | |
2902 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2903 | .name = "Marvell 88E3016", | |
dcdecdcf | 2904 | /* PHY_BASIC_FEATURES */ |
d2fa47d9 | 2905 | .probe = marvell_probe, |
ef0f9545 MK |
2906 | .config_init = m88e3016_config_init, |
2907 | .aneg_done = marvell_aneg_done, | |
2908 | .read_status = marvell_read_status, | |
2909 | .ack_interrupt = marvell_ack_interrupt, | |
2910 | .config_intr = marvell_config_intr, | |
2911 | .did_interrupt = m88e1121_did_interrupt, | |
2912 | .resume = genphy_resume, | |
2913 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2914 | .read_page = marvell_read_page, |
2915 | .write_page = marvell_write_page, | |
d2fa47d9 AL |
2916 | .get_sset_count = marvell_get_sset_count, |
2917 | .get_strings = marvell_get_strings, | |
2918 | .get_stats = marvell_get_stats, | |
6b358aed | 2919 | }, |
e4cf8a38 AL |
2920 | { |
2921 | .phy_id = MARVELL_PHY_ID_88E6390, | |
2922 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2923 | .name = "Marvell 88E6390", | |
dcdecdcf | 2924 | /* PHY_GBIT_FEATURES */ |
fc879f72 | 2925 | .flags = PHY_POLL_CABLE_TEST, |
fee2d546 | 2926 | .probe = m88e6390_probe, |
ef0f9545 MK |
2927 | .config_init = marvell_config_init, |
2928 | .config_aneg = m88e6390_config_aneg, | |
2929 | .read_status = marvell_read_status, | |
2930 | .ack_interrupt = marvell_ack_interrupt, | |
2931 | .config_intr = marvell_config_intr, | |
2932 | .did_interrupt = m88e1121_did_interrupt, | |
2933 | .resume = genphy_resume, | |
2934 | .suspend = genphy_suspend, | |
424ca4c5 RK |
2935 | .read_page = marvell_read_page, |
2936 | .write_page = marvell_write_page, | |
e4cf8a38 AL |
2937 | .get_sset_count = marvell_get_sset_count, |
2938 | .get_strings = marvell_get_strings, | |
2939 | .get_stats = marvell_get_stats, | |
69f42be8 HK |
2940 | .get_tunable = m88e1540_get_tunable, |
2941 | .set_tunable = m88e1540_set_tunable, | |
fc879f72 | 2942 | .cable_test_start = marvell_vct7_cable_test_start, |
0c9bcc1d | 2943 | .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, |
fc879f72 | 2944 | .cable_test_get_status = marvell_vct7_cable_test_get_status, |
e4cf8a38 | 2945 | }, |
a602ea86 MK |
2946 | { |
2947 | .phy_id = MARVELL_PHY_ID_88E1340S, | |
2948 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2949 | .name = "Marvell 88E1340S", | |
2950 | .probe = m88e1510_probe, | |
2951 | /* PHY_GBIT_FEATURES */ | |
2952 | .config_init = marvell_config_init, | |
2953 | .config_aneg = m88e1510_config_aneg, | |
2954 | .read_status = marvell_read_status, | |
2955 | .ack_interrupt = marvell_ack_interrupt, | |
2956 | .config_intr = marvell_config_intr, | |
2957 | .did_interrupt = m88e1121_did_interrupt, | |
2958 | .resume = genphy_resume, | |
2959 | .suspend = genphy_suspend, | |
2960 | .read_page = marvell_read_page, | |
2961 | .write_page = marvell_write_page, | |
2962 | .get_sset_count = marvell_get_sset_count, | |
2963 | .get_strings = marvell_get_strings, | |
2964 | .get_stats = marvell_get_stats, | |
2965 | .get_tunable = m88e1540_get_tunable, | |
2966 | .set_tunable = m88e1540_set_tunable, | |
2967 | }, | |
f59babf9 MK |
2968 | { |
2969 | .phy_id = MARVELL_PHY_ID_88E1548P, | |
2970 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2971 | .name = "Marvell 88E1548P", | |
2972 | .probe = m88e1510_probe, | |
2973 | .features = PHY_GBIT_FIBRE_FEATURES, | |
2974 | .config_init = marvell_config_init, | |
2975 | .config_aneg = m88e1510_config_aneg, | |
2976 | .read_status = marvell_read_status, | |
2977 | .ack_interrupt = marvell_ack_interrupt, | |
2978 | .config_intr = marvell_config_intr, | |
2979 | .did_interrupt = m88e1121_did_interrupt, | |
2980 | .resume = genphy_resume, | |
2981 | .suspend = genphy_suspend, | |
2982 | .read_page = marvell_read_page, | |
2983 | .write_page = marvell_write_page, | |
2984 | .get_sset_count = marvell_get_sset_count, | |
2985 | .get_strings = marvell_get_strings, | |
2986 | .get_stats = marvell_get_stats, | |
2987 | .get_tunable = m88e1540_get_tunable, | |
2988 | .set_tunable = m88e1540_set_tunable, | |
2989 | }, | |
00db8189 AF |
2990 | }; |
2991 | ||
50fd7150 | 2992 | module_phy_driver(marvell_drivers); |
4e4f10f6 | 2993 | |
cf93c945 | 2994 | static struct mdio_device_id __maybe_unused marvell_tbl[] = { |
f5e1cabf MS |
2995 | { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, |
2996 | { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, | |
2997 | { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, | |
2998 | { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, | |
2999 | { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, | |
3000 | { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, | |
3001 | { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, | |
3002 | { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, | |
3003 | { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, | |
3da09a51 | 3004 | { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, |
10e24caa | 3005 | { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, |
819ec8e1 | 3006 | { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, |
60f06fde | 3007 | { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, |
6b358aed | 3008 | { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, |
e4cf8a38 | 3009 | { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, |
a602ea86 | 3010 | { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, |
f59babf9 | 3011 | { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, |
4e4f10f6 DW |
3012 | { } |
3013 | }; | |
3014 | ||
3015 | MODULE_DEVICE_TABLE(mdio, marvell_tbl); |