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Commit | Line | Data |
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00db8189 AF |
1 | /* |
2 | * drivers/net/phy/marvell.c | |
3 | * | |
4 | * Driver for Marvell PHYs | |
5 | * | |
6 | * Author: Andy Fleming | |
7 | * | |
8 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
9 | * | |
3871c387 MS |
10 | * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> |
11 | * | |
00db8189 AF |
12 | * This program is free software; you can redistribute it and/or modify it |
13 | * under the terms of the GNU General Public License as published by the | |
14 | * Free Software Foundation; either version 2 of the License, or (at your | |
15 | * option) any later version. | |
16 | * | |
17 | */ | |
00db8189 | 18 | #include <linux/kernel.h> |
00db8189 | 19 | #include <linux/string.h> |
0b04680f | 20 | #include <linux/ctype.h> |
00db8189 AF |
21 | #include <linux/errno.h> |
22 | #include <linux/unistd.h> | |
0b04680f | 23 | #include <linux/hwmon.h> |
00db8189 AF |
24 | #include <linux/interrupt.h> |
25 | #include <linux/init.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/netdevice.h> | |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/spinlock.h> | |
31 | #include <linux/mm.h> | |
32 | #include <linux/module.h> | |
00db8189 AF |
33 | #include <linux/mii.h> |
34 | #include <linux/ethtool.h> | |
35 | #include <linux/phy.h> | |
2f495c39 | 36 | #include <linux/marvell_phy.h> |
cf41a51d | 37 | #include <linux/of.h> |
00db8189 | 38 | |
eea3b201 | 39 | #include <linux/io.h> |
00db8189 | 40 | #include <asm/irq.h> |
eea3b201 | 41 | #include <linux/uaccess.h> |
00db8189 | 42 | |
27d916d6 | 43 | #define MII_MARVELL_PHY_PAGE 22 |
52295666 AL |
44 | #define MII_MARVELL_COPPER_PAGE 0x00 |
45 | #define MII_MARVELL_FIBER_PAGE 0x01 | |
46 | #define MII_MARVELL_MSCR_PAGE 0x02 | |
47 | #define MII_MARVELL_LED_PAGE 0x03 | |
48 | #define MII_MARVELL_MISC_TEST_PAGE 0x06 | |
49 | #define MII_MARVELL_WOL_PAGE 0x11 | |
27d916d6 | 50 | |
00db8189 AF |
51 | #define MII_M1011_IEVENT 0x13 |
52 | #define MII_M1011_IEVENT_CLEAR 0x0000 | |
53 | ||
54 | #define MII_M1011_IMASK 0x12 | |
55 | #define MII_M1011_IMASK_INIT 0x6400 | |
56 | #define MII_M1011_IMASK_CLEAR 0x0000 | |
57 | ||
76884679 | 58 | #define MII_M1011_PHY_SCR 0x10 |
239aa55b DT |
59 | #define MII_M1011_PHY_SCR_MDI 0x0000 |
60 | #define MII_M1011_PHY_SCR_MDI_X 0x0020 | |
76884679 AF |
61 | #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060 |
62 | ||
b0224175 | 63 | #define MII_M1145_PHY_EXT_SR 0x1b |
76884679 AF |
64 | #define MII_M1145_PHY_EXT_CR 0x14 |
65 | #define MII_M1145_RGMII_RX_DELAY 0x0080 | |
66 | #define MII_M1145_RGMII_TX_DELAY 0x0002 | |
b0224175 VND |
67 | #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4 |
68 | #define MII_M1145_HWCFG_MODE_MASK 0xf | |
69 | #define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000 | |
76884679 | 70 | |
99d881f9 VB |
71 | #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4 |
72 | #define MII_M1145_HWCFG_MODE_MASK 0xf | |
73 | #define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000 | |
74 | ||
76884679 AF |
75 | #define MII_M1111_PHY_LED_CONTROL 0x18 |
76 | #define MII_M1111_PHY_LED_DIRECT 0x4100 | |
77 | #define MII_M1111_PHY_LED_COMBINE 0x411c | |
895ee682 KP |
78 | #define MII_M1111_PHY_EXT_CR 0x14 |
79 | #define MII_M1111_RX_DELAY 0x80 | |
80 | #define MII_M1111_TX_DELAY 0x2 | |
81 | #define MII_M1111_PHY_EXT_SR 0x1b | |
be937f1f AS |
82 | |
83 | #define MII_M1111_HWCFG_MODE_MASK 0xf | |
84 | #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb | |
85 | #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 | |
4117b5be | 86 | #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 |
5f8cbc13 | 87 | #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 |
be937f1f AS |
88 | #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000 |
89 | #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000 | |
90 | ||
c477d044 CC |
91 | #define MII_88E1121_PHY_MSCR_REG 21 |
92 | #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) | |
93 | #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) | |
94 | #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4)) | |
95 | ||
0b04680f AL |
96 | #define MII_88E1121_MISC_TEST 0x1a |
97 | #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 | |
98 | #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 | |
99 | #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) | |
100 | #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) | |
101 | #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) | |
102 | #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f | |
103 | ||
104 | #define MII_88E1510_TEMP_SENSOR 0x1b | |
105 | #define MII_88E1510_TEMP_SENSOR_MASK 0xff | |
106 | ||
337ac9d5 CC |
107 | #define MII_88E1318S_PHY_MSCR1_REG 16 |
108 | #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) | |
3ff1c259 | 109 | |
3871c387 MS |
110 | /* Copper Specific Interrupt Enable Register */ |
111 | #define MII_88E1318S_PHY_CSIER 0x12 | |
112 | /* WOL Event Interrupt Enable */ | |
113 | #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) | |
114 | ||
115 | /* LED Timer Control Register */ | |
3871c387 MS |
116 | #define MII_88E1318S_PHY_LED_TCR 0x12 |
117 | #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) | |
118 | #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) | |
119 | #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) | |
120 | ||
121 | /* Magic Packet MAC address registers */ | |
122 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 | |
123 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 | |
124 | #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 | |
125 | ||
3871c387 MS |
126 | #define MII_88E1318S_PHY_WOL_CTRL 0x10 |
127 | #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) | |
128 | #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) | |
129 | ||
140bc929 | 130 | #define MII_88E1121_PHY_LED_CTRL 16 |
140bc929 | 131 | #define MII_88E1121_PHY_LED_DEF 0x0030 |
140bc929 | 132 | |
be937f1f AS |
133 | #define MII_M1011_PHY_STATUS 0x11 |
134 | #define MII_M1011_PHY_STATUS_1000 0x8000 | |
135 | #define MII_M1011_PHY_STATUS_100 0x4000 | |
136 | #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 | |
137 | #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 | |
138 | #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 | |
139 | #define MII_M1011_PHY_STATUS_LINK 0x0400 | |
140 | ||
3da09a51 MS |
141 | #define MII_M1116R_CONTROL_REG_MAC 21 |
142 | ||
6b358aed SH |
143 | #define MII_88E3016_PHY_SPEC_CTRL 0x10 |
144 | #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 | |
145 | #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 | |
76884679 | 146 | |
930b37ee SR |
147 | #define MII_88E1510_GEN_CTRL_REG_1 0x14 |
148 | #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 | |
149 | #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ | |
150 | #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ | |
151 | ||
6cfb3bcc CAC |
152 | #define LPA_FIBER_1000HALF 0x40 |
153 | #define LPA_FIBER_1000FULL 0x20 | |
154 | ||
155 | #define LPA_PAUSE_FIBER 0x180 | |
156 | #define LPA_PAUSE_ASYM_FIBER 0x100 | |
157 | ||
158 | #define ADVERTISE_FIBER_1000HALF 0x40 | |
159 | #define ADVERTISE_FIBER_1000FULL 0x20 | |
160 | ||
161 | #define ADVERTISE_PAUSE_FIBER 0x180 | |
162 | #define ADVERTISE_PAUSE_ASYM_FIBER 0x100 | |
163 | ||
164 | #define REGISTER_LINK_STATUS 0x400 | |
2170fef7 | 165 | #define NB_FIBER_STATS 1 |
6cfb3bcc | 166 | |
00db8189 AF |
167 | MODULE_DESCRIPTION("Marvell PHY driver"); |
168 | MODULE_AUTHOR("Andy Fleming"); | |
169 | MODULE_LICENSE("GPL"); | |
170 | ||
d2fa47d9 AL |
171 | struct marvell_hw_stat { |
172 | const char *string; | |
173 | u8 page; | |
174 | u8 reg; | |
175 | u8 bits; | |
176 | }; | |
177 | ||
178 | static struct marvell_hw_stat marvell_hw_stats[] = { | |
2170fef7 | 179 | { "phy_receive_errors_copper", 0, 21, 16}, |
d2fa47d9 | 180 | { "phy_idle_errors", 0, 10, 8 }, |
2170fef7 | 181 | { "phy_receive_errors_fiber", 1, 21, 16}, |
d2fa47d9 AL |
182 | }; |
183 | ||
184 | struct marvell_priv { | |
185 | u64 stats[ARRAY_SIZE(marvell_hw_stats)]; | |
0b04680f AL |
186 | char *hwmon_name; |
187 | struct device *hwmon_dev; | |
d2fa47d9 AL |
188 | }; |
189 | ||
6427bb2d AL |
190 | static int marvell_get_page(struct phy_device *phydev) |
191 | { | |
192 | return phy_read(phydev, MII_MARVELL_PHY_PAGE); | |
193 | } | |
194 | ||
195 | static int marvell_set_page(struct phy_device *phydev, int page) | |
196 | { | |
197 | return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); | |
198 | } | |
199 | ||
53798328 AL |
200 | static int marvell_get_set_page(struct phy_device *phydev, int page) |
201 | { | |
202 | int oldpage = marvell_get_page(phydev); | |
203 | ||
204 | if (oldpage < 0) | |
205 | return oldpage; | |
206 | ||
207 | if (page != oldpage) | |
208 | return marvell_set_page(phydev, page); | |
209 | ||
210 | return 0; | |
211 | } | |
212 | ||
00db8189 AF |
213 | static int marvell_ack_interrupt(struct phy_device *phydev) |
214 | { | |
215 | int err; | |
216 | ||
217 | /* Clear the interrupts by reading the reg */ | |
218 | err = phy_read(phydev, MII_M1011_IEVENT); | |
219 | ||
220 | if (err < 0) | |
221 | return err; | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
226 | static int marvell_config_intr(struct phy_device *phydev) | |
227 | { | |
228 | int err; | |
229 | ||
76884679 | 230 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
23beb38f AL |
231 | err = phy_write(phydev, MII_M1011_IMASK, |
232 | MII_M1011_IMASK_INIT); | |
00db8189 | 233 | else |
23beb38f AL |
234 | err = phy_write(phydev, MII_M1011_IMASK, |
235 | MII_M1011_IMASK_CLEAR); | |
00db8189 AF |
236 | |
237 | return err; | |
238 | } | |
239 | ||
239aa55b DT |
240 | static int marvell_set_polarity(struct phy_device *phydev, int polarity) |
241 | { | |
242 | int reg; | |
243 | int err; | |
244 | int val; | |
245 | ||
246 | /* get the current settings */ | |
247 | reg = phy_read(phydev, MII_M1011_PHY_SCR); | |
248 | if (reg < 0) | |
249 | return reg; | |
250 | ||
251 | val = reg; | |
252 | val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; | |
253 | switch (polarity) { | |
254 | case ETH_TP_MDI: | |
255 | val |= MII_M1011_PHY_SCR_MDI; | |
256 | break; | |
257 | case ETH_TP_MDI_X: | |
258 | val |= MII_M1011_PHY_SCR_MDI_X; | |
259 | break; | |
260 | case ETH_TP_MDI_AUTO: | |
261 | case ETH_TP_MDI_INVALID: | |
262 | default: | |
263 | val |= MII_M1011_PHY_SCR_AUTO_CROSS; | |
264 | break; | |
265 | } | |
266 | ||
267 | if (val != reg) { | |
268 | /* Set the new polarity value in the register */ | |
269 | err = phy_write(phydev, MII_M1011_PHY_SCR, val); | |
270 | if (err) | |
271 | return err; | |
272 | } | |
273 | ||
274 | return 0; | |
275 | } | |
276 | ||
00db8189 AF |
277 | static int marvell_config_aneg(struct phy_device *phydev) |
278 | { | |
279 | int err; | |
280 | ||
4e26c5c3 | 281 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); |
76884679 AF |
282 | if (err < 0) |
283 | return err; | |
284 | ||
285 | err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, | |
286 | MII_M1111_PHY_LED_DIRECT); | |
287 | if (err < 0) | |
288 | return err; | |
00db8189 AF |
289 | |
290 | err = genphy_config_aneg(phydev); | |
8ff44985 AV |
291 | if (err < 0) |
292 | return err; | |
00db8189 | 293 | |
8ff44985 AV |
294 | if (phydev->autoneg != AUTONEG_ENABLE) { |
295 | int bmcr; | |
296 | ||
0c3439bc | 297 | /* A write to speed/duplex bits (that is performed by |
8ff44985 AV |
298 | * genphy_config_aneg() call above) must be followed by |
299 | * a software reset. Otherwise, the write has no effect. | |
300 | */ | |
301 | bmcr = phy_read(phydev, MII_BMCR); | |
302 | if (bmcr < 0) | |
303 | return bmcr; | |
304 | ||
305 | err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET); | |
306 | if (err < 0) | |
307 | return err; | |
308 | } | |
309 | ||
310 | return 0; | |
00db8189 AF |
311 | } |
312 | ||
f2899788 AL |
313 | static int m88e1101_config_aneg(struct phy_device *phydev) |
314 | { | |
315 | int err; | |
316 | ||
317 | /* This Marvell PHY has an errata which requires | |
318 | * that certain registers get written in order | |
319 | * to restart autonegotiation | |
320 | */ | |
321 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | |
322 | ||
323 | if (err < 0) | |
324 | return err; | |
325 | ||
326 | err = phy_write(phydev, 0x1d, 0x1f); | |
327 | if (err < 0) | |
328 | return err; | |
329 | ||
330 | err = phy_write(phydev, 0x1e, 0x200c); | |
331 | if (err < 0) | |
332 | return err; | |
333 | ||
334 | err = phy_write(phydev, 0x1d, 0x5); | |
335 | if (err < 0) | |
336 | return err; | |
337 | ||
338 | err = phy_write(phydev, 0x1e, 0); | |
339 | if (err < 0) | |
340 | return err; | |
341 | ||
342 | err = phy_write(phydev, 0x1e, 0x100); | |
343 | if (err < 0) | |
344 | return err; | |
345 | ||
346 | return marvell_config_aneg(phydev); | |
347 | } | |
348 | ||
3ec0a0f1 HK |
349 | static int m88e1111_config_aneg(struct phy_device *phydev) |
350 | { | |
351 | int err; | |
352 | ||
353 | /* The Marvell PHY has an errata which requires | |
354 | * that certain registers get written in order | |
355 | * to restart autonegotiation | |
356 | */ | |
357 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | |
358 | ||
4e26c5c3 | 359 | err = marvell_set_polarity(phydev, phydev->mdix_ctrl); |
3ec0a0f1 HK |
360 | if (err < 0) |
361 | return err; | |
362 | ||
363 | err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, | |
364 | MII_M1111_PHY_LED_DIRECT); | |
365 | if (err < 0) | |
366 | return err; | |
367 | ||
368 | err = genphy_config_aneg(phydev); | |
369 | if (err < 0) | |
370 | return err; | |
371 | ||
372 | if (phydev->autoneg != AUTONEG_ENABLE) { | |
373 | int bmcr; | |
374 | ||
375 | /* A write to speed/duplex bits (that is performed by | |
376 | * genphy_config_aneg() call above) must be followed by | |
377 | * a software reset. Otherwise, the write has no effect. | |
378 | */ | |
379 | bmcr = phy_read(phydev, MII_BMCR); | |
380 | if (bmcr < 0) | |
381 | return bmcr; | |
382 | ||
383 | err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET); | |
384 | if (err < 0) | |
385 | return err; | |
386 | } | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
cf41a51d | 391 | #ifdef CONFIG_OF_MDIO |
0c3439bc | 392 | /* Set and/or override some configuration registers based on the |
cf41a51d DD |
393 | * marvell,reg-init property stored in the of_node for the phydev. |
394 | * | |
395 | * marvell,reg-init = <reg-page reg mask value>,...; | |
396 | * | |
397 | * There may be one or more sets of <reg-page reg mask value>: | |
398 | * | |
399 | * reg-page: which register bank to use. | |
400 | * reg: the register. | |
401 | * mask: if non-zero, ANDed with existing register value. | |
402 | * value: ORed with the masked value and written to the regiser. | |
403 | * | |
404 | */ | |
405 | static int marvell_of_reg_init(struct phy_device *phydev) | |
406 | { | |
407 | const __be32 *paddr; | |
b5718b5a | 408 | int len, i, saved_page, current_page, ret; |
cf41a51d | 409 | |
e5a03bfd | 410 | if (!phydev->mdio.dev.of_node) |
cf41a51d DD |
411 | return 0; |
412 | ||
e5a03bfd AL |
413 | paddr = of_get_property(phydev->mdio.dev.of_node, |
414 | "marvell,reg-init", &len); | |
cf41a51d DD |
415 | if (!paddr || len < (4 * sizeof(*paddr))) |
416 | return 0; | |
417 | ||
6427bb2d | 418 | saved_page = marvell_get_page(phydev); |
cf41a51d DD |
419 | if (saved_page < 0) |
420 | return saved_page; | |
cf41a51d DD |
421 | current_page = saved_page; |
422 | ||
423 | ret = 0; | |
424 | len /= sizeof(*paddr); | |
425 | for (i = 0; i < len - 3; i += 4) { | |
6427bb2d | 426 | u16 page = be32_to_cpup(paddr + i); |
cf41a51d DD |
427 | u16 reg = be32_to_cpup(paddr + i + 1); |
428 | u16 mask = be32_to_cpup(paddr + i + 2); | |
429 | u16 val_bits = be32_to_cpup(paddr + i + 3); | |
430 | int val; | |
431 | ||
6427bb2d AL |
432 | if (page != current_page) { |
433 | current_page = page; | |
434 | ret = marvell_set_page(phydev, page); | |
cf41a51d DD |
435 | if (ret < 0) |
436 | goto err; | |
437 | } | |
438 | ||
439 | val = 0; | |
440 | if (mask) { | |
441 | val = phy_read(phydev, reg); | |
442 | if (val < 0) { | |
443 | ret = val; | |
444 | goto err; | |
445 | } | |
446 | val &= mask; | |
447 | } | |
448 | val |= val_bits; | |
449 | ||
450 | ret = phy_write(phydev, reg, val); | |
451 | if (ret < 0) | |
452 | goto err; | |
cf41a51d DD |
453 | } |
454 | err: | |
b5718b5a | 455 | if (current_page != saved_page) { |
6427bb2d | 456 | i = marvell_set_page(phydev, saved_page); |
cf41a51d DD |
457 | if (ret == 0) |
458 | ret = i; | |
459 | } | |
460 | return ret; | |
461 | } | |
462 | #else | |
463 | static int marvell_of_reg_init(struct phy_device *phydev) | |
464 | { | |
465 | return 0; | |
466 | } | |
467 | #endif /* CONFIG_OF_MDIO */ | |
468 | ||
140bc929 SP |
469 | static int m88e1121_config_aneg(struct phy_device *phydev) |
470 | { | |
c477d044 CC |
471 | int err, oldpage, mscr; |
472 | ||
52295666 | 473 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
53798328 AL |
474 | if (oldpage < 0) |
475 | return oldpage; | |
be8c6480 | 476 | |
32a64161 | 477 | if (phy_interface_is_rgmii(phydev)) { |
be8c6480 AP |
478 | mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) & |
479 | MII_88E1121_PHY_MSCR_DELAY_MASK; | |
480 | ||
481 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) | |
482 | mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY | | |
483 | MII_88E1121_PHY_MSCR_TX_DELAY); | |
484 | else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) | |
485 | mscr |= MII_88E1121_PHY_MSCR_RX_DELAY; | |
486 | else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) | |
487 | mscr |= MII_88E1121_PHY_MSCR_TX_DELAY; | |
488 | ||
489 | err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr); | |
490 | if (err < 0) | |
491 | return err; | |
492 | } | |
c477d044 | 493 | |
6427bb2d | 494 | marvell_set_page(phydev, oldpage); |
140bc929 SP |
495 | |
496 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | |
497 | if (err < 0) | |
498 | return err; | |
499 | ||
500 | err = phy_write(phydev, MII_M1011_PHY_SCR, | |
501 | MII_M1011_PHY_SCR_AUTO_CROSS); | |
502 | if (err < 0) | |
503 | return err; | |
504 | ||
fdecf36f | 505 | return genphy_config_aneg(phydev); |
140bc929 SP |
506 | } |
507 | ||
337ac9d5 | 508 | static int m88e1318_config_aneg(struct phy_device *phydev) |
3ff1c259 CC |
509 | { |
510 | int err, oldpage, mscr; | |
511 | ||
52295666 | 512 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
53798328 AL |
513 | if (oldpage < 0) |
514 | return oldpage; | |
3ff1c259 | 515 | |
337ac9d5 CC |
516 | mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG); |
517 | mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD; | |
3ff1c259 | 518 | |
337ac9d5 | 519 | err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr); |
3ff1c259 CC |
520 | if (err < 0) |
521 | return err; | |
522 | ||
6427bb2d | 523 | err = marvell_set_page(phydev, oldpage); |
3ff1c259 CC |
524 | if (err < 0) |
525 | return err; | |
526 | ||
527 | return m88e1121_config_aneg(phydev); | |
528 | } | |
529 | ||
78301ebe CAC |
530 | /** |
531 | * ethtool_adv_to_fiber_adv_t | |
532 | * @ethadv: the ethtool advertisement settings | |
533 | * | |
534 | * A small helper function that translates ethtool advertisement | |
535 | * settings to phy autonegotiation advertisements for the | |
536 | * MII_ADV register for fiber link. | |
537 | */ | |
538 | static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv) | |
539 | { | |
540 | u32 result = 0; | |
541 | ||
542 | if (ethadv & ADVERTISED_1000baseT_Half) | |
543 | result |= ADVERTISE_FIBER_1000HALF; | |
544 | if (ethadv & ADVERTISED_1000baseT_Full) | |
545 | result |= ADVERTISE_FIBER_1000FULL; | |
546 | ||
547 | if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP)) | |
548 | result |= LPA_PAUSE_ASYM_FIBER; | |
549 | else if (ethadv & ADVERTISE_PAUSE_CAP) | |
550 | result |= (ADVERTISE_PAUSE_FIBER | |
551 | & (~ADVERTISE_PAUSE_ASYM_FIBER)); | |
552 | ||
553 | return result; | |
554 | } | |
555 | ||
556 | /** | |
557 | * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR | |
558 | * @phydev: target phy_device struct | |
559 | * | |
560 | * Description: If auto-negotiation is enabled, we configure the | |
561 | * advertising, and then restart auto-negotiation. If it is not | |
562 | * enabled, then we write the BMCR. Adapted for fiber link in | |
563 | * some Marvell's devices. | |
564 | */ | |
565 | static int marvell_config_aneg_fiber(struct phy_device *phydev) | |
566 | { | |
567 | int changed = 0; | |
568 | int err; | |
569 | int adv, oldadv; | |
570 | u32 advertise; | |
571 | ||
572 | if (phydev->autoneg != AUTONEG_ENABLE) | |
573 | return genphy_setup_forced(phydev); | |
574 | ||
575 | /* Only allow advertising what this PHY supports */ | |
576 | phydev->advertising &= phydev->supported; | |
577 | advertise = phydev->advertising; | |
578 | ||
579 | /* Setup fiber advertisement */ | |
580 | adv = phy_read(phydev, MII_ADVERTISE); | |
581 | if (adv < 0) | |
582 | return adv; | |
583 | ||
584 | oldadv = adv; | |
585 | adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL | |
586 | | LPA_PAUSE_FIBER); | |
587 | adv |= ethtool_adv_to_fiber_adv_t(advertise); | |
588 | ||
589 | if (adv != oldadv) { | |
590 | err = phy_write(phydev, MII_ADVERTISE, adv); | |
591 | if (err < 0) | |
592 | return err; | |
593 | ||
594 | changed = 1; | |
595 | } | |
596 | ||
597 | if (changed == 0) { | |
598 | /* Advertisement hasn't changed, but maybe aneg was never on to | |
599 | * begin with? Or maybe phy was isolated? | |
600 | */ | |
601 | int ctl = phy_read(phydev, MII_BMCR); | |
602 | ||
603 | if (ctl < 0) | |
604 | return ctl; | |
605 | ||
606 | if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) | |
607 | changed = 1; /* do restart aneg */ | |
608 | } | |
609 | ||
610 | /* Only restart aneg if we are advertising something different | |
611 | * than we were before. | |
612 | */ | |
613 | if (changed > 0) | |
614 | changed = genphy_restart_aneg(phydev); | |
615 | ||
616 | return changed; | |
617 | } | |
618 | ||
10e24caa MS |
619 | static int m88e1510_config_aneg(struct phy_device *phydev) |
620 | { | |
621 | int err; | |
622 | ||
52295666 | 623 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe CAC |
624 | if (err < 0) |
625 | goto error; | |
626 | ||
627 | /* Configure the copper link first */ | |
10e24caa MS |
628 | err = m88e1318_config_aneg(phydev); |
629 | if (err < 0) | |
78301ebe | 630 | goto error; |
10e24caa | 631 | |
78301ebe | 632 | /* Then the fiber link */ |
52295666 | 633 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
78301ebe CAC |
634 | if (err < 0) |
635 | goto error; | |
636 | ||
637 | err = marvell_config_aneg_fiber(phydev); | |
638 | if (err < 0) | |
639 | goto error; | |
640 | ||
52295666 | 641 | return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe CAC |
642 | |
643 | error: | |
52295666 | 644 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
78301ebe | 645 | return err; |
79be1a1c CG |
646 | } |
647 | ||
648 | static int marvell_config_init(struct phy_device *phydev) | |
649 | { | |
650 | /* Set registers from marvell,reg-init DT property */ | |
10e24caa MS |
651 | return marvell_of_reg_init(phydev); |
652 | } | |
653 | ||
3da09a51 MS |
654 | static int m88e1116r_config_init(struct phy_device *phydev) |
655 | { | |
656 | int temp; | |
657 | int err; | |
658 | ||
659 | temp = phy_read(phydev, MII_BMCR); | |
660 | temp |= BMCR_RESET; | |
661 | err = phy_write(phydev, MII_BMCR, temp); | |
662 | if (err < 0) | |
663 | return err; | |
664 | ||
665 | mdelay(500); | |
666 | ||
52295666 | 667 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3da09a51 MS |
668 | if (err < 0) |
669 | return err; | |
670 | ||
671 | temp = phy_read(phydev, MII_M1011_PHY_SCR); | |
672 | temp |= (7 << 12); /* max number of gigabit attempts */ | |
673 | temp |= (1 << 11); /* enable downshift */ | |
674 | temp |= MII_M1011_PHY_SCR_AUTO_CROSS; | |
675 | err = phy_write(phydev, MII_M1011_PHY_SCR, temp); | |
676 | if (err < 0) | |
677 | return err; | |
678 | ||
52295666 | 679 | err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
3da09a51 MS |
680 | if (err < 0) |
681 | return err; | |
682 | temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC); | |
683 | temp |= (1 << 5); | |
684 | temp |= (1 << 4); | |
685 | err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp); | |
686 | if (err < 0) | |
687 | return err; | |
52295666 | 688 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3da09a51 MS |
689 | if (err < 0) |
690 | return err; | |
691 | ||
692 | temp = phy_read(phydev, MII_BMCR); | |
693 | temp |= BMCR_RESET; | |
694 | err = phy_write(phydev, MII_BMCR, temp); | |
695 | if (err < 0) | |
696 | return err; | |
697 | ||
698 | mdelay(500); | |
699 | ||
79be1a1c | 700 | return marvell_config_init(phydev); |
3da09a51 MS |
701 | } |
702 | ||
6b358aed SH |
703 | static int m88e3016_config_init(struct phy_device *phydev) |
704 | { | |
705 | int reg; | |
706 | ||
707 | /* Enable Scrambler and Auto-Crossover */ | |
708 | reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL); | |
709 | if (reg < 0) | |
710 | return reg; | |
711 | ||
712 | reg &= ~MII_88E3016_DISABLE_SCRAMBLER; | |
713 | reg |= MII_88E3016_AUTO_MDIX_CROSSOVER; | |
714 | ||
715 | reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg); | |
716 | if (reg < 0) | |
717 | return reg; | |
718 | ||
79be1a1c | 719 | return marvell_config_init(phydev); |
6b358aed SH |
720 | } |
721 | ||
e1dde8dc | 722 | static int m88e1111_config_init_rgmii(struct phy_device *phydev) |
895ee682 KP |
723 | { |
724 | int err; | |
be937f1f | 725 | int temp; |
be937f1f | 726 | |
e1dde8dc AL |
727 | temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); |
728 | if (temp < 0) | |
729 | return temp; | |
895ee682 | 730 | |
e1dde8dc AL |
731 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
732 | temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); | |
733 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { | |
734 | temp &= ~MII_M1111_TX_DELAY; | |
735 | temp |= MII_M1111_RX_DELAY; | |
736 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { | |
737 | temp &= ~MII_M1111_RX_DELAY; | |
738 | temp |= MII_M1111_TX_DELAY; | |
739 | } | |
895ee682 | 740 | |
e1dde8dc AL |
741 | err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); |
742 | if (err < 0) | |
743 | return err; | |
9daf5a76 | 744 | |
e1dde8dc AL |
745 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); |
746 | if (temp < 0) | |
747 | return temp; | |
895ee682 | 748 | |
e1dde8dc | 749 | temp &= ~(MII_M1111_HWCFG_MODE_MASK); |
be937f1f | 750 | |
e1dde8dc AL |
751 | if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) |
752 | temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; | |
753 | else | |
754 | temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; | |
895ee682 | 755 | |
e1dde8dc AL |
756 | return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); |
757 | } | |
895ee682 | 758 | |
e1dde8dc AL |
759 | static int m88e1111_config_init_sgmii(struct phy_device *phydev) |
760 | { | |
761 | int err; | |
762 | int temp; | |
4117b5be | 763 | |
e1dde8dc AL |
764 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); |
765 | if (temp < 0) | |
766 | return temp; | |
4117b5be | 767 | |
e1dde8dc AL |
768 | temp &= ~(MII_M1111_HWCFG_MODE_MASK); |
769 | temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK; | |
770 | temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; | |
07151bc9 | 771 | |
e1dde8dc AL |
772 | err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); |
773 | if (err < 0) | |
774 | return err; | |
07151bc9 | 775 | |
e1dde8dc | 776 | /* make sure copper is selected */ |
52295666 | 777 | return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
e1dde8dc | 778 | } |
5f8cbc13 | 779 | |
e1dde8dc AL |
780 | static int m88e1111_config_init_rtbi(struct phy_device *phydev) |
781 | { | |
782 | int err; | |
783 | int temp; | |
784 | ||
785 | temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); | |
786 | if (temp < 0) | |
787 | return temp; | |
788 | ||
789 | temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); | |
790 | err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); | |
791 | if (err < 0) | |
792 | return err; | |
793 | ||
794 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); | |
795 | if (temp < 0) | |
796 | return temp; | |
797 | ||
798 | temp &= ~(MII_M1111_HWCFG_MODE_MASK | | |
799 | MII_M1111_HWCFG_FIBER_COPPER_RES); | |
800 | temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO; | |
801 | ||
802 | err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); | |
803 | if (err < 0) | |
804 | return err; | |
805 | ||
806 | /* soft reset */ | |
807 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | |
808 | if (err < 0) | |
809 | return err; | |
810 | ||
811 | do | |
812 | temp = phy_read(phydev, MII_BMCR); | |
813 | while (temp & BMCR_RESET); | |
814 | ||
815 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); | |
816 | if (temp < 0) | |
817 | return temp; | |
818 | ||
819 | temp &= ~(MII_M1111_HWCFG_MODE_MASK | | |
820 | MII_M1111_HWCFG_FIBER_COPPER_RES); | |
821 | temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | | |
822 | MII_M1111_HWCFG_FIBER_COPPER_AUTO; | |
823 | ||
824 | return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); | |
825 | } | |
826 | ||
827 | static int m88e1111_config_init(struct phy_device *phydev) | |
828 | { | |
829 | int err; | |
830 | ||
831 | if (phy_interface_is_rgmii(phydev)) { | |
832 | err = m88e1111_config_init_rgmii(phydev); | |
833 | if (err) | |
5f8cbc13 | 834 | return err; |
e1dde8dc | 835 | } |
5f8cbc13 | 836 | |
e1dde8dc AL |
837 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { |
838 | err = m88e1111_config_init_sgmii(phydev); | |
5f8cbc13 LYB |
839 | if (err < 0) |
840 | return err; | |
e1dde8dc | 841 | } |
5f8cbc13 | 842 | |
e1dde8dc AL |
843 | if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { |
844 | err = m88e1111_config_init_rtbi(phydev); | |
5f8cbc13 LYB |
845 | if (err < 0) |
846 | return err; | |
847 | } | |
848 | ||
cf41a51d DD |
849 | err = marvell_of_reg_init(phydev); |
850 | if (err < 0) | |
851 | return err; | |
5f8cbc13 | 852 | |
cc90cb3b | 853 | return phy_write(phydev, MII_BMCR, BMCR_RESET); |
895ee682 KP |
854 | } |
855 | ||
fdecf36f CG |
856 | static int m88e1121_config_init(struct phy_device *phydev) |
857 | { | |
858 | int err, oldpage; | |
859 | ||
52295666 | 860 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE); |
53798328 AL |
861 | if (oldpage < 0) |
862 | return oldpage; | |
fdecf36f CG |
863 | |
864 | /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ | |
865 | err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL, | |
866 | MII_88E1121_PHY_LED_DEF); | |
867 | if (err < 0) | |
868 | return err; | |
869 | ||
6427bb2d | 870 | marvell_set_page(phydev, oldpage); |
fdecf36f CG |
871 | |
872 | /* Set marvell,reg-init configuration from device tree */ | |
873 | return marvell_config_init(phydev); | |
874 | } | |
875 | ||
407353ec CG |
876 | static int m88e1510_config_init(struct phy_device *phydev) |
877 | { | |
878 | int err; | |
879 | int temp; | |
880 | ||
881 | /* SGMII-to-Copper mode initialization */ | |
882 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { | |
883 | /* Select page 18 */ | |
6427bb2d | 884 | err = marvell_set_page(phydev, 18); |
407353ec CG |
885 | if (err < 0) |
886 | return err; | |
887 | ||
888 | /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ | |
889 | temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1); | |
890 | temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK; | |
891 | temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII; | |
892 | err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp); | |
893 | if (err < 0) | |
894 | return err; | |
895 | ||
896 | /* PHY reset is necessary after changing MODE[2:0] */ | |
897 | temp |= MII_88E1510_GEN_CTRL_REG_1_RESET; | |
898 | err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp); | |
899 | if (err < 0) | |
900 | return err; | |
901 | ||
902 | /* Reset page selection */ | |
52295666 | 903 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
407353ec CG |
904 | if (err < 0) |
905 | return err; | |
906 | } | |
907 | ||
fdecf36f | 908 | return m88e1121_config_init(phydev); |
407353ec CG |
909 | } |
910 | ||
605f196e RM |
911 | static int m88e1118_config_aneg(struct phy_device *phydev) |
912 | { | |
913 | int err; | |
914 | ||
915 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | |
916 | if (err < 0) | |
917 | return err; | |
918 | ||
919 | err = phy_write(phydev, MII_M1011_PHY_SCR, | |
920 | MII_M1011_PHY_SCR_AUTO_CROSS); | |
921 | if (err < 0) | |
922 | return err; | |
923 | ||
924 | err = genphy_config_aneg(phydev); | |
925 | return 0; | |
926 | } | |
927 | ||
928 | static int m88e1118_config_init(struct phy_device *phydev) | |
929 | { | |
930 | int err; | |
931 | ||
932 | /* Change address */ | |
52295666 | 933 | err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
605f196e RM |
934 | if (err < 0) |
935 | return err; | |
936 | ||
937 | /* Enable 1000 Mbit */ | |
938 | err = phy_write(phydev, 0x15, 0x1070); | |
939 | if (err < 0) | |
940 | return err; | |
941 | ||
942 | /* Change address */ | |
52295666 | 943 | err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); |
605f196e RM |
944 | if (err < 0) |
945 | return err; | |
946 | ||
947 | /* Adjust LED Control */ | |
2f495c39 BH |
948 | if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) |
949 | err = phy_write(phydev, 0x10, 0x1100); | |
950 | else | |
951 | err = phy_write(phydev, 0x10, 0x021e); | |
605f196e RM |
952 | if (err < 0) |
953 | return err; | |
954 | ||
cf41a51d DD |
955 | err = marvell_of_reg_init(phydev); |
956 | if (err < 0) | |
957 | return err; | |
958 | ||
605f196e | 959 | /* Reset address */ |
52295666 | 960 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
605f196e RM |
961 | if (err < 0) |
962 | return err; | |
963 | ||
cc90cb3b | 964 | return phy_write(phydev, MII_BMCR, BMCR_RESET); |
605f196e RM |
965 | } |
966 | ||
90600732 DD |
967 | static int m88e1149_config_init(struct phy_device *phydev) |
968 | { | |
969 | int err; | |
970 | ||
971 | /* Change address */ | |
52295666 | 972 | err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); |
90600732 DD |
973 | if (err < 0) |
974 | return err; | |
975 | ||
976 | /* Enable 1000 Mbit */ | |
977 | err = phy_write(phydev, 0x15, 0x1048); | |
978 | if (err < 0) | |
979 | return err; | |
980 | ||
cf41a51d DD |
981 | err = marvell_of_reg_init(phydev); |
982 | if (err < 0) | |
983 | return err; | |
984 | ||
90600732 | 985 | /* Reset address */ |
52295666 | 986 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
90600732 DD |
987 | if (err < 0) |
988 | return err; | |
989 | ||
cc90cb3b | 990 | return phy_write(phydev, MII_BMCR, BMCR_RESET); |
90600732 DD |
991 | } |
992 | ||
e1dde8dc AL |
993 | static int m88e1145_config_init_rgmii(struct phy_device *phydev) |
994 | { | |
995 | int err; | |
996 | int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR); | |
997 | ||
998 | if (temp < 0) | |
999 | return temp; | |
1000 | ||
1001 | temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY); | |
1002 | ||
1003 | err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp); | |
1004 | if (err < 0) | |
1005 | return err; | |
1006 | ||
1007 | if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { | |
1008 | err = phy_write(phydev, 0x1d, 0x0012); | |
1009 | if (err < 0) | |
1010 | return err; | |
1011 | ||
1012 | temp = phy_read(phydev, 0x1e); | |
1013 | if (temp < 0) | |
1014 | return temp; | |
1015 | ||
1016 | temp &= 0xf03f; | |
1017 | temp |= 2 << 9; /* 36 ohm */ | |
1018 | temp |= 2 << 6; /* 39 ohm */ | |
1019 | ||
1020 | err = phy_write(phydev, 0x1e, temp); | |
1021 | if (err < 0) | |
1022 | return err; | |
1023 | ||
1024 | err = phy_write(phydev, 0x1d, 0x3); | |
1025 | if (err < 0) | |
1026 | return err; | |
1027 | ||
1028 | err = phy_write(phydev, 0x1e, 0x8000); | |
1029 | } | |
1030 | return err; | |
1031 | } | |
1032 | ||
1033 | static int m88e1145_config_init_sgmii(struct phy_device *phydev) | |
1034 | { | |
1035 | int temp = phy_read(phydev, MII_M1145_PHY_EXT_SR); | |
1036 | ||
1037 | if (temp < 0) | |
1038 | return temp; | |
1039 | ||
1040 | temp &= ~MII_M1145_HWCFG_MODE_MASK; | |
1041 | temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK; | |
1042 | temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO; | |
1043 | ||
1044 | return phy_write(phydev, MII_M1145_PHY_EXT_SR, temp); | |
1045 | } | |
1046 | ||
76884679 AF |
1047 | static int m88e1145_config_init(struct phy_device *phydev) |
1048 | { | |
1049 | int err; | |
1050 | ||
1051 | /* Take care of errata E0 & E1 */ | |
1052 | err = phy_write(phydev, 0x1d, 0x001b); | |
1053 | if (err < 0) | |
1054 | return err; | |
1055 | ||
1056 | err = phy_write(phydev, 0x1e, 0x418f); | |
1057 | if (err < 0) | |
1058 | return err; | |
1059 | ||
1060 | err = phy_write(phydev, 0x1d, 0x0016); | |
1061 | if (err < 0) | |
1062 | return err; | |
1063 | ||
1064 | err = phy_write(phydev, 0x1e, 0xa2da); | |
1065 | if (err < 0) | |
1066 | return err; | |
1067 | ||
895ee682 | 1068 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
e1dde8dc | 1069 | err = m88e1145_config_init_rgmii(phydev); |
76884679 AF |
1070 | if (err < 0) |
1071 | return err; | |
76884679 AF |
1072 | } |
1073 | ||
b0224175 | 1074 | if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { |
e1dde8dc | 1075 | err = m88e1145_config_init_sgmii(phydev); |
b0224175 VND |
1076 | if (err < 0) |
1077 | return err; | |
1078 | } | |
1079 | ||
cf41a51d DD |
1080 | err = marvell_of_reg_init(phydev); |
1081 | if (err < 0) | |
1082 | return err; | |
1083 | ||
76884679 AF |
1084 | return 0; |
1085 | } | |
00db8189 | 1086 | |
6cfb3bcc CAC |
1087 | /** |
1088 | * fiber_lpa_to_ethtool_lpa_t | |
1089 | * @lpa: value of the MII_LPA register for fiber link | |
1090 | * | |
1091 | * A small helper function that translates MII_LPA | |
1092 | * bits to ethtool LP advertisement settings. | |
1093 | */ | |
1094 | static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa) | |
1095 | { | |
1096 | u32 result = 0; | |
1097 | ||
1098 | if (lpa & LPA_FIBER_1000HALF) | |
1099 | result |= ADVERTISED_1000baseT_Half; | |
1100 | if (lpa & LPA_FIBER_1000FULL) | |
1101 | result |= ADVERTISED_1000baseT_Full; | |
1102 | ||
1103 | return result; | |
1104 | } | |
1105 | ||
1106 | /** | |
1107 | * marvell_update_link - update link status in real time in @phydev | |
1108 | * @phydev: target phy_device struct | |
1109 | * | |
1110 | * Description: Update the value in phydev->link to reflect the | |
1111 | * current link value. | |
1112 | */ | |
1113 | static int marvell_update_link(struct phy_device *phydev, int fiber) | |
1114 | { | |
1115 | int status; | |
1116 | ||
1117 | /* Use the generic register for copper link, or specific | |
0c3439bc AL |
1118 | * register for fiber case |
1119 | */ | |
6cfb3bcc CAC |
1120 | if (fiber) { |
1121 | status = phy_read(phydev, MII_M1011_PHY_STATUS); | |
1122 | if (status < 0) | |
1123 | return status; | |
1124 | ||
1125 | if ((status & REGISTER_LINK_STATUS) == 0) | |
1126 | phydev->link = 0; | |
1127 | else | |
1128 | phydev->link = 1; | |
1129 | } else { | |
1130 | return genphy_update_link(phydev); | |
1131 | } | |
1132 | ||
1133 | return 0; | |
1134 | } | |
1135 | ||
e1dde8dc AL |
1136 | static int marvell_read_status_page_an(struct phy_device *phydev, |
1137 | int fiber) | |
1138 | { | |
1139 | int status; | |
1140 | int lpa; | |
1141 | int lpagb; | |
e1dde8dc AL |
1142 | |
1143 | status = phy_read(phydev, MII_M1011_PHY_STATUS); | |
1144 | if (status < 0) | |
1145 | return status; | |
1146 | ||
1147 | lpa = phy_read(phydev, MII_LPA); | |
1148 | if (lpa < 0) | |
1149 | return lpa; | |
1150 | ||
1151 | lpagb = phy_read(phydev, MII_STAT1000); | |
1152 | if (lpagb < 0) | |
1153 | return lpagb; | |
1154 | ||
e1dde8dc AL |
1155 | if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) |
1156 | phydev->duplex = DUPLEX_FULL; | |
1157 | else | |
1158 | phydev->duplex = DUPLEX_HALF; | |
1159 | ||
1160 | status = status & MII_M1011_PHY_STATUS_SPD_MASK; | |
1161 | phydev->pause = 0; | |
1162 | phydev->asym_pause = 0; | |
1163 | ||
1164 | switch (status) { | |
1165 | case MII_M1011_PHY_STATUS_1000: | |
1166 | phydev->speed = SPEED_1000; | |
1167 | break; | |
1168 | ||
1169 | case MII_M1011_PHY_STATUS_100: | |
1170 | phydev->speed = SPEED_100; | |
1171 | break; | |
1172 | ||
1173 | default: | |
1174 | phydev->speed = SPEED_10; | |
1175 | break; | |
1176 | } | |
1177 | ||
1178 | if (!fiber) { | |
1179 | phydev->lp_advertising = | |
1180 | mii_stat1000_to_ethtool_lpa_t(lpagb) | | |
1181 | mii_lpa_to_ethtool_lpa_t(lpa); | |
1182 | ||
1183 | if (phydev->duplex == DUPLEX_FULL) { | |
1184 | phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; | |
1185 | phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; | |
1186 | } | |
1187 | } else { | |
1188 | /* The fiber link is only 1000M capable */ | |
1189 | phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa); | |
1190 | ||
1191 | if (phydev->duplex == DUPLEX_FULL) { | |
1192 | if (!(lpa & LPA_PAUSE_FIBER)) { | |
1193 | phydev->pause = 0; | |
1194 | phydev->asym_pause = 0; | |
1195 | } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { | |
1196 | phydev->pause = 1; | |
1197 | phydev->asym_pause = 1; | |
1198 | } else { | |
1199 | phydev->pause = 1; | |
1200 | phydev->asym_pause = 0; | |
1201 | } | |
1202 | } | |
1203 | } | |
1204 | return 0; | |
1205 | } | |
1206 | ||
1207 | static int marvell_read_status_page_fixed(struct phy_device *phydev) | |
1208 | { | |
1209 | int bmcr = phy_read(phydev, MII_BMCR); | |
1210 | ||
1211 | if (bmcr < 0) | |
1212 | return bmcr; | |
1213 | ||
1214 | if (bmcr & BMCR_FULLDPLX) | |
1215 | phydev->duplex = DUPLEX_FULL; | |
1216 | else | |
1217 | phydev->duplex = DUPLEX_HALF; | |
1218 | ||
1219 | if (bmcr & BMCR_SPEED1000) | |
1220 | phydev->speed = SPEED_1000; | |
1221 | else if (bmcr & BMCR_SPEED100) | |
1222 | phydev->speed = SPEED_100; | |
1223 | else | |
1224 | phydev->speed = SPEED_10; | |
1225 | ||
1226 | phydev->pause = 0; | |
1227 | phydev->asym_pause = 0; | |
1228 | phydev->lp_advertising = 0; | |
1229 | ||
1230 | return 0; | |
1231 | } | |
1232 | ||
6cfb3bcc | 1233 | /* marvell_read_status_page |
be937f1f | 1234 | * |
f0c88f9c | 1235 | * Description: |
be937f1f AS |
1236 | * Check the link, then figure out the current state |
1237 | * by comparing what we advertise with what the link partner | |
1238 | * advertises. Start by checking the gigabit possibilities, | |
1239 | * then move on to 10/100. | |
1240 | */ | |
6cfb3bcc | 1241 | static int marvell_read_status_page(struct phy_device *phydev, int page) |
be937f1f | 1242 | { |
6cfb3bcc | 1243 | int fiber; |
e1dde8dc | 1244 | int err; |
be937f1f | 1245 | |
6cfb3bcc | 1246 | /* Detect and update the link, but return if there |
0c3439bc AL |
1247 | * was an error |
1248 | */ | |
52295666 | 1249 | if (page == MII_MARVELL_FIBER_PAGE) |
6cfb3bcc CAC |
1250 | fiber = 1; |
1251 | else | |
1252 | fiber = 0; | |
1253 | ||
1254 | err = marvell_update_link(phydev, fiber); | |
be937f1f AS |
1255 | if (err) |
1256 | return err; | |
1257 | ||
e1dde8dc AL |
1258 | if (phydev->autoneg == AUTONEG_ENABLE) |
1259 | err = marvell_read_status_page_an(phydev, fiber); | |
1260 | else | |
1261 | err = marvell_read_status_page_fixed(phydev); | |
be937f1f | 1262 | |
e1dde8dc | 1263 | return err; |
be937f1f AS |
1264 | } |
1265 | ||
6cfb3bcc CAC |
1266 | /* marvell_read_status |
1267 | * | |
1268 | * Some Marvell's phys have two modes: fiber and copper. | |
1269 | * Both need status checked. | |
1270 | * Description: | |
1271 | * First, check the fiber link and status. | |
1272 | * If the fiber link is down, check the copper link and status which | |
1273 | * will be the default value if both link are down. | |
1274 | */ | |
1275 | static int marvell_read_status(struct phy_device *phydev) | |
1276 | { | |
1277 | int err; | |
1278 | ||
1279 | /* Check the fiber mode first */ | |
a13c0652 RK |
1280 | if (phydev->supported & SUPPORTED_FIBRE && |
1281 | phydev->interface != PHY_INTERFACE_MODE_SGMII) { | |
52295666 | 1282 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
6cfb3bcc CAC |
1283 | if (err < 0) |
1284 | goto error; | |
1285 | ||
52295666 | 1286 | err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); |
6cfb3bcc CAC |
1287 | if (err < 0) |
1288 | goto error; | |
1289 | ||
0c3439bc AL |
1290 | /* If the fiber link is up, it is the selected and |
1291 | * used link. In this case, we need to stay in the | |
1292 | * fiber page. Please to be careful about that, avoid | |
1293 | * to restore Copper page in other functions which | |
1294 | * could break the behaviour for some fiber phy like | |
1295 | * 88E1512. | |
1296 | */ | |
6cfb3bcc CAC |
1297 | if (phydev->link) |
1298 | return 0; | |
1299 | ||
1300 | /* If fiber link is down, check and save copper mode state */ | |
52295666 | 1301 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1302 | if (err < 0) |
1303 | goto error; | |
1304 | } | |
1305 | ||
52295666 | 1306 | return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1307 | |
1308 | error: | |
52295666 | 1309 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
6cfb3bcc CAC |
1310 | return err; |
1311 | } | |
3758be3d CAC |
1312 | |
1313 | /* marvell_suspend | |
1314 | * | |
1315 | * Some Marvell's phys have two modes: fiber and copper. | |
1316 | * Both need to be suspended | |
1317 | */ | |
1318 | static int marvell_suspend(struct phy_device *phydev) | |
1319 | { | |
1320 | int err; | |
1321 | ||
1322 | /* Suspend the fiber mode first */ | |
1323 | if (!(phydev->supported & SUPPORTED_FIBRE)) { | |
52295666 | 1324 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
3758be3d CAC |
1325 | if (err < 0) |
1326 | goto error; | |
1327 | ||
1328 | /* With the page set, use the generic suspend */ | |
1329 | err = genphy_suspend(phydev); | |
1330 | if (err < 0) | |
1331 | goto error; | |
1332 | ||
1333 | /* Then, the copper link */ | |
52295666 | 1334 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1335 | if (err < 0) |
1336 | goto error; | |
1337 | } | |
1338 | ||
1339 | /* With the page set, use the generic suspend */ | |
1340 | return genphy_suspend(phydev); | |
1341 | ||
1342 | error: | |
52295666 | 1343 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1344 | return err; |
1345 | } | |
1346 | ||
1347 | /* marvell_resume | |
1348 | * | |
1349 | * Some Marvell's phys have two modes: fiber and copper. | |
1350 | * Both need to be resumed | |
1351 | */ | |
1352 | static int marvell_resume(struct phy_device *phydev) | |
1353 | { | |
1354 | int err; | |
1355 | ||
1356 | /* Resume the fiber mode first */ | |
1357 | if (!(phydev->supported & SUPPORTED_FIBRE)) { | |
52295666 | 1358 | err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); |
3758be3d CAC |
1359 | if (err < 0) |
1360 | goto error; | |
1361 | ||
1362 | /* With the page set, use the generic resume */ | |
1363 | err = genphy_resume(phydev); | |
1364 | if (err < 0) | |
1365 | goto error; | |
1366 | ||
1367 | /* Then, the copper link */ | |
52295666 | 1368 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1369 | if (err < 0) |
1370 | goto error; | |
1371 | } | |
1372 | ||
1373 | /* With the page set, use the generic resume */ | |
1374 | return genphy_resume(phydev); | |
1375 | ||
1376 | error: | |
52295666 | 1377 | marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3758be3d CAC |
1378 | return err; |
1379 | } | |
1380 | ||
6b358aed SH |
1381 | static int marvell_aneg_done(struct phy_device *phydev) |
1382 | { | |
1383 | int retval = phy_read(phydev, MII_M1011_PHY_STATUS); | |
e69d9ed4 | 1384 | |
6b358aed SH |
1385 | return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); |
1386 | } | |
1387 | ||
dcd07be3 AG |
1388 | static int m88e1121_did_interrupt(struct phy_device *phydev) |
1389 | { | |
1390 | int imask; | |
1391 | ||
1392 | imask = phy_read(phydev, MII_M1011_IEVENT); | |
1393 | ||
1394 | if (imask & MII_M1011_IMASK_INIT) | |
1395 | return 1; | |
1396 | ||
1397 | return 0; | |
1398 | } | |
1399 | ||
23beb38f AL |
1400 | static void m88e1318_get_wol(struct phy_device *phydev, |
1401 | struct ethtool_wolinfo *wol) | |
3871c387 MS |
1402 | { |
1403 | wol->supported = WAKE_MAGIC; | |
1404 | wol->wolopts = 0; | |
1405 | ||
52295666 | 1406 | if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0) |
3871c387 MS |
1407 | return; |
1408 | ||
1409 | if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) & | |
1410 | MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) | |
1411 | wol->wolopts |= WAKE_MAGIC; | |
1412 | ||
52295666 | 1413 | if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0) |
3871c387 MS |
1414 | return; |
1415 | } | |
1416 | ||
23beb38f AL |
1417 | static int m88e1318_set_wol(struct phy_device *phydev, |
1418 | struct ethtool_wolinfo *wol) | |
3871c387 MS |
1419 | { |
1420 | int err, oldpage, temp; | |
1421 | ||
6427bb2d | 1422 | oldpage = marvell_get_page(phydev); |
3871c387 MS |
1423 | |
1424 | if (wol->wolopts & WAKE_MAGIC) { | |
1425 | /* Explicitly switch to page 0x00, just to be sure */ | |
52295666 | 1426 | err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); |
3871c387 MS |
1427 | if (err < 0) |
1428 | return err; | |
1429 | ||
1430 | /* Enable the WOL interrupt */ | |
1431 | temp = phy_read(phydev, MII_88E1318S_PHY_CSIER); | |
1432 | temp |= MII_88E1318S_PHY_CSIER_WOL_EIE; | |
1433 | err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp); | |
1434 | if (err < 0) | |
1435 | return err; | |
1436 | ||
52295666 | 1437 | err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); |
3871c387 MS |
1438 | if (err < 0) |
1439 | return err; | |
1440 | ||
1441 | /* Setup LED[2] as interrupt pin (active low) */ | |
1442 | temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR); | |
1443 | temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT; | |
1444 | temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE; | |
1445 | temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW; | |
1446 | err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp); | |
1447 | if (err < 0) | |
1448 | return err; | |
1449 | ||
52295666 | 1450 | err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE); |
3871c387 MS |
1451 | if (err < 0) |
1452 | return err; | |
1453 | ||
1454 | /* Store the device address for the magic packet */ | |
1455 | err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, | |
1456 | ((phydev->attached_dev->dev_addr[5] << 8) | | |
1457 | phydev->attached_dev->dev_addr[4])); | |
1458 | if (err < 0) | |
1459 | return err; | |
1460 | err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, | |
1461 | ((phydev->attached_dev->dev_addr[3] << 8) | | |
1462 | phydev->attached_dev->dev_addr[2])); | |
1463 | if (err < 0) | |
1464 | return err; | |
1465 | err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, | |
1466 | ((phydev->attached_dev->dev_addr[1] << 8) | | |
1467 | phydev->attached_dev->dev_addr[0])); | |
1468 | if (err < 0) | |
1469 | return err; | |
1470 | ||
1471 | /* Clear WOL status and enable magic packet matching */ | |
1472 | temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); | |
1473 | temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; | |
1474 | temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; | |
1475 | err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); | |
1476 | if (err < 0) | |
1477 | return err; | |
1478 | } else { | |
52295666 | 1479 | err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE); |
3871c387 MS |
1480 | if (err < 0) |
1481 | return err; | |
1482 | ||
1483 | /* Clear WOL status and disable magic packet matching */ | |
1484 | temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL); | |
1485 | temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS; | |
1486 | temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE; | |
1487 | err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp); | |
1488 | if (err < 0) | |
1489 | return err; | |
1490 | } | |
1491 | ||
6427bb2d | 1492 | err = marvell_set_page(phydev, oldpage); |
3871c387 MS |
1493 | if (err < 0) |
1494 | return err; | |
1495 | ||
1496 | return 0; | |
1497 | } | |
1498 | ||
d2fa47d9 AL |
1499 | static int marvell_get_sset_count(struct phy_device *phydev) |
1500 | { | |
2170fef7 CAC |
1501 | if (phydev->supported & SUPPORTED_FIBRE) |
1502 | return ARRAY_SIZE(marvell_hw_stats); | |
1503 | else | |
1504 | return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; | |
d2fa47d9 AL |
1505 | } |
1506 | ||
1507 | static void marvell_get_strings(struct phy_device *phydev, u8 *data) | |
1508 | { | |
1509 | int i; | |
1510 | ||
1511 | for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) { | |
1512 | memcpy(data + i * ETH_GSTRING_LEN, | |
1513 | marvell_hw_stats[i].string, ETH_GSTRING_LEN); | |
1514 | } | |
1515 | } | |
1516 | ||
1517 | #ifndef UINT64_MAX | |
1518 | #define UINT64_MAX (u64)(~((u64)0)) | |
1519 | #endif | |
1520 | static u64 marvell_get_stat(struct phy_device *phydev, int i) | |
1521 | { | |
1522 | struct marvell_hw_stat stat = marvell_hw_stats[i]; | |
1523 | struct marvell_priv *priv = phydev->priv; | |
53798328 | 1524 | int oldpage, val; |
321b4d4b | 1525 | u64 ret; |
d2fa47d9 | 1526 | |
53798328 AL |
1527 | oldpage = marvell_get_set_page(phydev, stat.page); |
1528 | if (oldpage < 0) | |
d2fa47d9 AL |
1529 | return UINT64_MAX; |
1530 | ||
1531 | val = phy_read(phydev, stat.reg); | |
1532 | if (val < 0) { | |
321b4d4b | 1533 | ret = UINT64_MAX; |
d2fa47d9 AL |
1534 | } else { |
1535 | val = val & ((1 << stat.bits) - 1); | |
1536 | priv->stats[i] += val; | |
321b4d4b | 1537 | ret = priv->stats[i]; |
d2fa47d9 AL |
1538 | } |
1539 | ||
6427bb2d | 1540 | marvell_set_page(phydev, oldpage); |
d2fa47d9 | 1541 | |
321b4d4b | 1542 | return ret; |
d2fa47d9 AL |
1543 | } |
1544 | ||
1545 | static void marvell_get_stats(struct phy_device *phydev, | |
1546 | struct ethtool_stats *stats, u64 *data) | |
1547 | { | |
1548 | int i; | |
1549 | ||
1550 | for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) | |
1551 | data[i] = marvell_get_stat(phydev, i); | |
1552 | } | |
1553 | ||
0b04680f AL |
1554 | #ifdef CONFIG_HWMON |
1555 | static int m88e1121_get_temp(struct phy_device *phydev, long *temp) | |
1556 | { | |
975b388c | 1557 | int oldpage; |
0b04680f AL |
1558 | int ret; |
1559 | int val; | |
1560 | ||
1561 | *temp = 0; | |
1562 | ||
1563 | mutex_lock(&phydev->lock); | |
1564 | ||
52295666 | 1565 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
975b388c AL |
1566 | if (oldpage < 0) { |
1567 | mutex_unlock(&phydev->lock); | |
1568 | return oldpage; | |
1569 | } | |
1570 | ||
0b04680f AL |
1571 | /* Enable temperature sensor */ |
1572 | ret = phy_read(phydev, MII_88E1121_MISC_TEST); | |
1573 | if (ret < 0) | |
1574 | goto error; | |
1575 | ||
1576 | ret = phy_write(phydev, MII_88E1121_MISC_TEST, | |
1577 | ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); | |
1578 | if (ret < 0) | |
1579 | goto error; | |
1580 | ||
1581 | /* Wait for temperature to stabilize */ | |
1582 | usleep_range(10000, 12000); | |
1583 | ||
1584 | val = phy_read(phydev, MII_88E1121_MISC_TEST); | |
1585 | if (val < 0) { | |
1586 | ret = val; | |
1587 | goto error; | |
1588 | } | |
1589 | ||
1590 | /* Disable temperature sensor */ | |
1591 | ret = phy_write(phydev, MII_88E1121_MISC_TEST, | |
1592 | ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); | |
1593 | if (ret < 0) | |
1594 | goto error; | |
1595 | ||
1596 | *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; | |
1597 | ||
1598 | error: | |
975b388c | 1599 | marvell_set_page(phydev, oldpage); |
0b04680f AL |
1600 | mutex_unlock(&phydev->lock); |
1601 | ||
1602 | return ret; | |
1603 | } | |
1604 | ||
1605 | static int m88e1121_hwmon_read(struct device *dev, | |
1606 | enum hwmon_sensor_types type, | |
1607 | u32 attr, int channel, long *temp) | |
1608 | { | |
1609 | struct phy_device *phydev = dev_get_drvdata(dev); | |
1610 | int err; | |
1611 | ||
1612 | switch (attr) { | |
1613 | case hwmon_temp_input: | |
1614 | err = m88e1121_get_temp(phydev, temp); | |
1615 | break; | |
1616 | default: | |
1617 | return -EOPNOTSUPP; | |
1618 | } | |
1619 | ||
1620 | return err; | |
1621 | } | |
1622 | ||
1623 | static umode_t m88e1121_hwmon_is_visible(const void *data, | |
1624 | enum hwmon_sensor_types type, | |
1625 | u32 attr, int channel) | |
1626 | { | |
1627 | if (type != hwmon_temp) | |
1628 | return 0; | |
1629 | ||
1630 | switch (attr) { | |
1631 | case hwmon_temp_input: | |
1632 | return 0444; | |
1633 | default: | |
1634 | return 0; | |
1635 | } | |
1636 | } | |
1637 | ||
1638 | static u32 m88e1121_hwmon_chip_config[] = { | |
1639 | HWMON_C_REGISTER_TZ, | |
1640 | 0 | |
1641 | }; | |
1642 | ||
1643 | static const struct hwmon_channel_info m88e1121_hwmon_chip = { | |
1644 | .type = hwmon_chip, | |
1645 | .config = m88e1121_hwmon_chip_config, | |
1646 | }; | |
1647 | ||
1648 | static u32 m88e1121_hwmon_temp_config[] = { | |
1649 | HWMON_T_INPUT, | |
1650 | 0 | |
1651 | }; | |
1652 | ||
1653 | static const struct hwmon_channel_info m88e1121_hwmon_temp = { | |
1654 | .type = hwmon_temp, | |
1655 | .config = m88e1121_hwmon_temp_config, | |
1656 | }; | |
1657 | ||
1658 | static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { | |
1659 | &m88e1121_hwmon_chip, | |
1660 | &m88e1121_hwmon_temp, | |
1661 | NULL | |
1662 | }; | |
1663 | ||
1664 | static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { | |
1665 | .is_visible = m88e1121_hwmon_is_visible, | |
1666 | .read = m88e1121_hwmon_read, | |
1667 | }; | |
1668 | ||
1669 | static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { | |
1670 | .ops = &m88e1121_hwmon_hwmon_ops, | |
1671 | .info = m88e1121_hwmon_info, | |
1672 | }; | |
1673 | ||
1674 | static int m88e1510_get_temp(struct phy_device *phydev, long *temp) | |
1675 | { | |
975b388c | 1676 | int oldpage; |
0b04680f AL |
1677 | int ret; |
1678 | ||
1679 | *temp = 0; | |
1680 | ||
1681 | mutex_lock(&phydev->lock); | |
1682 | ||
52295666 | 1683 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
975b388c AL |
1684 | if (oldpage < 0) { |
1685 | mutex_unlock(&phydev->lock); | |
1686 | return oldpage; | |
1687 | } | |
1688 | ||
0b04680f AL |
1689 | ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR); |
1690 | if (ret < 0) | |
1691 | goto error; | |
1692 | ||
1693 | *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; | |
1694 | ||
1695 | error: | |
975b388c | 1696 | marvell_set_page(phydev, oldpage); |
0b04680f AL |
1697 | mutex_unlock(&phydev->lock); |
1698 | ||
1699 | return ret; | |
1700 | } | |
1701 | ||
f0a45816 | 1702 | static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) |
0b04680f | 1703 | { |
975b388c | 1704 | int oldpage; |
0b04680f AL |
1705 | int ret; |
1706 | ||
1707 | *temp = 0; | |
1708 | ||
1709 | mutex_lock(&phydev->lock); | |
53798328 | 1710 | |
52295666 | 1711 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
975b388c AL |
1712 | if (oldpage < 0) { |
1713 | mutex_unlock(&phydev->lock); | |
1714 | return oldpage; | |
1715 | } | |
0b04680f | 1716 | |
0b04680f AL |
1717 | ret = phy_read(phydev, MII_88E1121_MISC_TEST); |
1718 | if (ret < 0) | |
1719 | goto error; | |
1720 | ||
1721 | *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> | |
1722 | MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; | |
1723 | /* convert to mC */ | |
1724 | *temp *= 1000; | |
1725 | ||
1726 | error: | |
975b388c | 1727 | marvell_set_page(phydev, oldpage); |
0b04680f AL |
1728 | mutex_unlock(&phydev->lock); |
1729 | ||
1730 | return ret; | |
1731 | } | |
1732 | ||
f0a45816 | 1733 | static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) |
0b04680f | 1734 | { |
975b388c | 1735 | int oldpage; |
0b04680f AL |
1736 | int ret; |
1737 | ||
1738 | mutex_lock(&phydev->lock); | |
1739 | ||
52295666 | 1740 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
975b388c AL |
1741 | if (oldpage < 0) { |
1742 | mutex_unlock(&phydev->lock); | |
1743 | return oldpage; | |
1744 | } | |
1745 | ||
0b04680f AL |
1746 | ret = phy_read(phydev, MII_88E1121_MISC_TEST); |
1747 | if (ret < 0) | |
1748 | goto error; | |
1749 | ||
1750 | temp = temp / 1000; | |
1751 | temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); | |
1752 | ret = phy_write(phydev, MII_88E1121_MISC_TEST, | |
1753 | (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) | | |
1754 | (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT)); | |
1755 | ||
1756 | error: | |
975b388c | 1757 | marvell_set_page(phydev, oldpage); |
0b04680f AL |
1758 | mutex_unlock(&phydev->lock); |
1759 | ||
1760 | return ret; | |
1761 | } | |
1762 | ||
f0a45816 | 1763 | static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) |
0b04680f | 1764 | { |
975b388c | 1765 | int oldpage; |
0b04680f AL |
1766 | int ret; |
1767 | ||
1768 | *alarm = false; | |
1769 | ||
1770 | mutex_lock(&phydev->lock); | |
1771 | ||
52295666 | 1772 | oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE); |
975b388c AL |
1773 | if (oldpage < 0) { |
1774 | mutex_unlock(&phydev->lock); | |
1775 | return oldpage; | |
1776 | } | |
1777 | ||
0b04680f AL |
1778 | ret = phy_read(phydev, MII_88E1121_MISC_TEST); |
1779 | if (ret < 0) | |
1780 | goto error; | |
1781 | *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); | |
1782 | ||
1783 | error: | |
975b388c | 1784 | marvell_set_page(phydev, oldpage); |
0b04680f AL |
1785 | mutex_unlock(&phydev->lock); |
1786 | ||
1787 | return ret; | |
1788 | } | |
1789 | ||
1790 | static int m88e1510_hwmon_read(struct device *dev, | |
1791 | enum hwmon_sensor_types type, | |
1792 | u32 attr, int channel, long *temp) | |
1793 | { | |
1794 | struct phy_device *phydev = dev_get_drvdata(dev); | |
1795 | int err; | |
1796 | ||
1797 | switch (attr) { | |
1798 | case hwmon_temp_input: | |
1799 | err = m88e1510_get_temp(phydev, temp); | |
1800 | break; | |
1801 | case hwmon_temp_crit: | |
1802 | err = m88e1510_get_temp_critical(phydev, temp); | |
1803 | break; | |
1804 | case hwmon_temp_max_alarm: | |
1805 | err = m88e1510_get_temp_alarm(phydev, temp); | |
1806 | break; | |
1807 | default: | |
1808 | return -EOPNOTSUPP; | |
1809 | } | |
1810 | ||
1811 | return err; | |
1812 | } | |
1813 | ||
1814 | static int m88e1510_hwmon_write(struct device *dev, | |
1815 | enum hwmon_sensor_types type, | |
1816 | u32 attr, int channel, long temp) | |
1817 | { | |
1818 | struct phy_device *phydev = dev_get_drvdata(dev); | |
1819 | int err; | |
1820 | ||
1821 | switch (attr) { | |
1822 | case hwmon_temp_crit: | |
1823 | err = m88e1510_set_temp_critical(phydev, temp); | |
1824 | break; | |
1825 | default: | |
1826 | return -EOPNOTSUPP; | |
1827 | } | |
1828 | return err; | |
1829 | } | |
1830 | ||
1831 | static umode_t m88e1510_hwmon_is_visible(const void *data, | |
1832 | enum hwmon_sensor_types type, | |
1833 | u32 attr, int channel) | |
1834 | { | |
1835 | if (type != hwmon_temp) | |
1836 | return 0; | |
1837 | ||
1838 | switch (attr) { | |
1839 | case hwmon_temp_input: | |
1840 | case hwmon_temp_max_alarm: | |
1841 | return 0444; | |
1842 | case hwmon_temp_crit: | |
1843 | return 0644; | |
1844 | default: | |
1845 | return 0; | |
1846 | } | |
1847 | } | |
1848 | ||
1849 | static u32 m88e1510_hwmon_temp_config[] = { | |
1850 | HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, | |
1851 | 0 | |
1852 | }; | |
1853 | ||
1854 | static const struct hwmon_channel_info m88e1510_hwmon_temp = { | |
1855 | .type = hwmon_temp, | |
1856 | .config = m88e1510_hwmon_temp_config, | |
1857 | }; | |
1858 | ||
1859 | static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { | |
1860 | &m88e1121_hwmon_chip, | |
1861 | &m88e1510_hwmon_temp, | |
1862 | NULL | |
1863 | }; | |
1864 | ||
1865 | static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { | |
1866 | .is_visible = m88e1510_hwmon_is_visible, | |
1867 | .read = m88e1510_hwmon_read, | |
1868 | .write = m88e1510_hwmon_write, | |
1869 | }; | |
1870 | ||
1871 | static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { | |
1872 | .ops = &m88e1510_hwmon_hwmon_ops, | |
1873 | .info = m88e1510_hwmon_info, | |
1874 | }; | |
1875 | ||
1876 | static int marvell_hwmon_name(struct phy_device *phydev) | |
1877 | { | |
1878 | struct marvell_priv *priv = phydev->priv; | |
1879 | struct device *dev = &phydev->mdio.dev; | |
1880 | const char *devname = dev_name(dev); | |
1881 | size_t len = strlen(devname); | |
1882 | int i, j; | |
1883 | ||
1884 | priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); | |
1885 | if (!priv->hwmon_name) | |
1886 | return -ENOMEM; | |
1887 | ||
1888 | for (i = j = 0; i < len && devname[i]; i++) { | |
1889 | if (isalnum(devname[i])) | |
1890 | priv->hwmon_name[j++] = devname[i]; | |
1891 | } | |
1892 | ||
1893 | return 0; | |
1894 | } | |
1895 | ||
1896 | static int marvell_hwmon_probe(struct phy_device *phydev, | |
1897 | const struct hwmon_chip_info *chip) | |
1898 | { | |
1899 | struct marvell_priv *priv = phydev->priv; | |
1900 | struct device *dev = &phydev->mdio.dev; | |
1901 | int err; | |
1902 | ||
1903 | err = marvell_hwmon_name(phydev); | |
1904 | if (err) | |
1905 | return err; | |
1906 | ||
1907 | priv->hwmon_dev = devm_hwmon_device_register_with_info( | |
1908 | dev, priv->hwmon_name, phydev, chip, NULL); | |
1909 | ||
1910 | return PTR_ERR_OR_ZERO(priv->hwmon_dev); | |
1911 | } | |
1912 | ||
1913 | static int m88e1121_hwmon_probe(struct phy_device *phydev) | |
1914 | { | |
1915 | return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); | |
1916 | } | |
1917 | ||
1918 | static int m88e1510_hwmon_probe(struct phy_device *phydev) | |
1919 | { | |
1920 | return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); | |
1921 | } | |
1922 | #else | |
1923 | static int m88e1121_hwmon_probe(struct phy_device *phydev) | |
1924 | { | |
1925 | return 0; | |
1926 | } | |
1927 | ||
1928 | static int m88e1510_hwmon_probe(struct phy_device *phydev) | |
1929 | { | |
1930 | return 0; | |
1931 | } | |
1932 | #endif | |
1933 | ||
d2fa47d9 AL |
1934 | static int marvell_probe(struct phy_device *phydev) |
1935 | { | |
1936 | struct marvell_priv *priv; | |
1937 | ||
e5a03bfd | 1938 | priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); |
d2fa47d9 AL |
1939 | if (!priv) |
1940 | return -ENOMEM; | |
1941 | ||
1942 | phydev->priv = priv; | |
1943 | ||
1944 | return 0; | |
1945 | } | |
1946 | ||
0b04680f AL |
1947 | static int m88e1121_probe(struct phy_device *phydev) |
1948 | { | |
1949 | int err; | |
1950 | ||
1951 | err = marvell_probe(phydev); | |
1952 | if (err) | |
1953 | return err; | |
1954 | ||
1955 | return m88e1121_hwmon_probe(phydev); | |
1956 | } | |
1957 | ||
1958 | static int m88e1510_probe(struct phy_device *phydev) | |
1959 | { | |
1960 | int err; | |
1961 | ||
1962 | err = marvell_probe(phydev); | |
1963 | if (err) | |
1964 | return err; | |
1965 | ||
1966 | return m88e1510_hwmon_probe(phydev); | |
1967 | } | |
1968 | ||
e5479239 OJ |
1969 | static struct phy_driver marvell_drivers[] = { |
1970 | { | |
2f495c39 BH |
1971 | .phy_id = MARVELL_PHY_ID_88E1101, |
1972 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 OJ |
1973 | .name = "Marvell 88E1101", |
1974 | .features = PHY_GBIT_FEATURES, | |
1975 | .flags = PHY_HAS_INTERRUPT, | |
18702414 | 1976 | .probe = marvell_probe, |
79be1a1c | 1977 | .config_init = &marvell_config_init, |
f2899788 | 1978 | .config_aneg = &m88e1101_config_aneg, |
e5479239 OJ |
1979 | .read_status = &genphy_read_status, |
1980 | .ack_interrupt = &marvell_ack_interrupt, | |
1981 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
1982 | .resume = &genphy_resume, |
1983 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
1984 | .get_sset_count = marvell_get_sset_count, |
1985 | .get_strings = marvell_get_strings, | |
1986 | .get_stats = marvell_get_stats, | |
e5479239 | 1987 | }, |
85cfb534 | 1988 | { |
2f495c39 BH |
1989 | .phy_id = MARVELL_PHY_ID_88E1112, |
1990 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
85cfb534 OJ |
1991 | .name = "Marvell 88E1112", |
1992 | .features = PHY_GBIT_FEATURES, | |
1993 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 1994 | .probe = marvell_probe, |
85cfb534 OJ |
1995 | .config_init = &m88e1111_config_init, |
1996 | .config_aneg = &marvell_config_aneg, | |
1997 | .read_status = &genphy_read_status, | |
1998 | .ack_interrupt = &marvell_ack_interrupt, | |
1999 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2000 | .resume = &genphy_resume, |
2001 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2002 | .get_sset_count = marvell_get_sset_count, |
2003 | .get_strings = marvell_get_strings, | |
2004 | .get_stats = marvell_get_stats, | |
85cfb534 | 2005 | }, |
e5479239 | 2006 | { |
2f495c39 BH |
2007 | .phy_id = MARVELL_PHY_ID_88E1111, |
2008 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 OJ |
2009 | .name = "Marvell 88E1111", |
2010 | .features = PHY_GBIT_FEATURES, | |
2011 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2012 | .probe = marvell_probe, |
e5479239 | 2013 | .config_init = &m88e1111_config_init, |
3ec0a0f1 | 2014 | .config_aneg = &m88e1111_config_aneg, |
be937f1f | 2015 | .read_status = &marvell_read_status, |
e5479239 OJ |
2016 | .ack_interrupt = &marvell_ack_interrupt, |
2017 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2018 | .resume = &genphy_resume, |
2019 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2020 | .get_sset_count = marvell_get_sset_count, |
2021 | .get_strings = marvell_get_strings, | |
2022 | .get_stats = marvell_get_stats, | |
e5479239 | 2023 | }, |
605f196e | 2024 | { |
2f495c39 BH |
2025 | .phy_id = MARVELL_PHY_ID_88E1118, |
2026 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
605f196e RM |
2027 | .name = "Marvell 88E1118", |
2028 | .features = PHY_GBIT_FEATURES, | |
2029 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2030 | .probe = marvell_probe, |
605f196e RM |
2031 | .config_init = &m88e1118_config_init, |
2032 | .config_aneg = &m88e1118_config_aneg, | |
2033 | .read_status = &genphy_read_status, | |
2034 | .ack_interrupt = &marvell_ack_interrupt, | |
2035 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2036 | .resume = &genphy_resume, |
2037 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2038 | .get_sset_count = marvell_get_sset_count, |
2039 | .get_strings = marvell_get_strings, | |
2040 | .get_stats = marvell_get_stats, | |
605f196e | 2041 | }, |
140bc929 | 2042 | { |
2f495c39 BH |
2043 | .phy_id = MARVELL_PHY_ID_88E1121R, |
2044 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
140bc929 SP |
2045 | .name = "Marvell 88E1121R", |
2046 | .features = PHY_GBIT_FEATURES, | |
2047 | .flags = PHY_HAS_INTERRUPT, | |
18702414 | 2048 | .probe = &m88e1121_probe, |
fdecf36f | 2049 | .config_init = &m88e1121_config_init, |
140bc929 SP |
2050 | .config_aneg = &m88e1121_config_aneg, |
2051 | .read_status = &marvell_read_status, | |
2052 | .ack_interrupt = &marvell_ack_interrupt, | |
2053 | .config_intr = &marvell_config_intr, | |
dcd07be3 | 2054 | .did_interrupt = &m88e1121_did_interrupt, |
0898b448 SH |
2055 | .resume = &genphy_resume, |
2056 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2057 | .get_sset_count = marvell_get_sset_count, |
2058 | .get_strings = marvell_get_strings, | |
2059 | .get_stats = marvell_get_stats, | |
140bc929 | 2060 | }, |
3ff1c259 | 2061 | { |
337ac9d5 | 2062 | .phy_id = MARVELL_PHY_ID_88E1318S, |
6ba74014 | 2063 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
337ac9d5 | 2064 | .name = "Marvell 88E1318S", |
3ff1c259 CC |
2065 | .features = PHY_GBIT_FEATURES, |
2066 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2067 | .probe = marvell_probe, |
fdecf36f | 2068 | .config_init = &m88e1121_config_init, |
337ac9d5 | 2069 | .config_aneg = &m88e1318_config_aneg, |
3ff1c259 CC |
2070 | .read_status = &marvell_read_status, |
2071 | .ack_interrupt = &marvell_ack_interrupt, | |
2072 | .config_intr = &marvell_config_intr, | |
2073 | .did_interrupt = &m88e1121_did_interrupt, | |
3871c387 MS |
2074 | .get_wol = &m88e1318_get_wol, |
2075 | .set_wol = &m88e1318_set_wol, | |
0898b448 SH |
2076 | .resume = &genphy_resume, |
2077 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2078 | .get_sset_count = marvell_get_sset_count, |
2079 | .get_strings = marvell_get_strings, | |
2080 | .get_stats = marvell_get_stats, | |
3ff1c259 | 2081 | }, |
e5479239 | 2082 | { |
2f495c39 BH |
2083 | .phy_id = MARVELL_PHY_ID_88E1145, |
2084 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
e5479239 OJ |
2085 | .name = "Marvell 88E1145", |
2086 | .features = PHY_GBIT_FEATURES, | |
2087 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2088 | .probe = marvell_probe, |
e5479239 OJ |
2089 | .config_init = &m88e1145_config_init, |
2090 | .config_aneg = &marvell_config_aneg, | |
2091 | .read_status = &genphy_read_status, | |
2092 | .ack_interrupt = &marvell_ack_interrupt, | |
2093 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2094 | .resume = &genphy_resume, |
2095 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2096 | .get_sset_count = marvell_get_sset_count, |
2097 | .get_strings = marvell_get_strings, | |
2098 | .get_stats = marvell_get_stats, | |
ac8c635a | 2099 | }, |
90600732 DD |
2100 | { |
2101 | .phy_id = MARVELL_PHY_ID_88E1149R, | |
2102 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2103 | .name = "Marvell 88E1149R", | |
2104 | .features = PHY_GBIT_FEATURES, | |
2105 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2106 | .probe = marvell_probe, |
90600732 DD |
2107 | .config_init = &m88e1149_config_init, |
2108 | .config_aneg = &m88e1118_config_aneg, | |
2109 | .read_status = &genphy_read_status, | |
2110 | .ack_interrupt = &marvell_ack_interrupt, | |
2111 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2112 | .resume = &genphy_resume, |
2113 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2114 | .get_sset_count = marvell_get_sset_count, |
2115 | .get_strings = marvell_get_strings, | |
2116 | .get_stats = marvell_get_stats, | |
90600732 | 2117 | }, |
ac8c635a | 2118 | { |
2f495c39 BH |
2119 | .phy_id = MARVELL_PHY_ID_88E1240, |
2120 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
ac8c635a OJ |
2121 | .name = "Marvell 88E1240", |
2122 | .features = PHY_GBIT_FEATURES, | |
2123 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2124 | .probe = marvell_probe, |
ac8c635a OJ |
2125 | .config_init = &m88e1111_config_init, |
2126 | .config_aneg = &marvell_config_aneg, | |
2127 | .read_status = &genphy_read_status, | |
2128 | .ack_interrupt = &marvell_ack_interrupt, | |
2129 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2130 | .resume = &genphy_resume, |
2131 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2132 | .get_sset_count = marvell_get_sset_count, |
2133 | .get_strings = marvell_get_strings, | |
2134 | .get_stats = marvell_get_stats, | |
ac8c635a | 2135 | }, |
3da09a51 MS |
2136 | { |
2137 | .phy_id = MARVELL_PHY_ID_88E1116R, | |
2138 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2139 | .name = "Marvell 88E1116R", | |
2140 | .features = PHY_GBIT_FEATURES, | |
2141 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2142 | .probe = marvell_probe, |
3da09a51 MS |
2143 | .config_init = &m88e1116r_config_init, |
2144 | .config_aneg = &genphy_config_aneg, | |
2145 | .read_status = &genphy_read_status, | |
2146 | .ack_interrupt = &marvell_ack_interrupt, | |
2147 | .config_intr = &marvell_config_intr, | |
0898b448 SH |
2148 | .resume = &genphy_resume, |
2149 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2150 | .get_sset_count = marvell_get_sset_count, |
2151 | .get_strings = marvell_get_strings, | |
2152 | .get_stats = marvell_get_stats, | |
3da09a51 | 2153 | }, |
10e24caa MS |
2154 | { |
2155 | .phy_id = MARVELL_PHY_ID_88E1510, | |
2156 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2157 | .name = "Marvell 88E1510", | |
6cfb3bcc | 2158 | .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, |
18702414 | 2159 | .flags = PHY_HAS_INTERRUPT, |
0b04680f | 2160 | .probe = &m88e1510_probe, |
930b37ee | 2161 | .config_init = &m88e1510_config_init, |
10e24caa MS |
2162 | .config_aneg = &m88e1510_config_aneg, |
2163 | .read_status = &marvell_read_status, | |
2164 | .ack_interrupt = &marvell_ack_interrupt, | |
2165 | .config_intr = &marvell_config_intr, | |
2166 | .did_interrupt = &m88e1121_did_interrupt, | |
f39aac7e JH |
2167 | .get_wol = &m88e1318_get_wol, |
2168 | .set_wol = &m88e1318_set_wol, | |
3758be3d CAC |
2169 | .resume = &marvell_resume, |
2170 | .suspend = &marvell_suspend, | |
d2fa47d9 AL |
2171 | .get_sset_count = marvell_get_sset_count, |
2172 | .get_strings = marvell_get_strings, | |
2173 | .get_stats = marvell_get_stats, | |
f0f9b4ed | 2174 | .set_loopback = genphy_loopback, |
10e24caa | 2175 | }, |
819ec8e1 AL |
2176 | { |
2177 | .phy_id = MARVELL_PHY_ID_88E1540, | |
2178 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2179 | .name = "Marvell 88E1540", | |
2180 | .features = PHY_GBIT_FEATURES, | |
2181 | .flags = PHY_HAS_INTERRUPT, | |
18702414 | 2182 | .probe = m88e1510_probe, |
79be1a1c | 2183 | .config_init = &marvell_config_init, |
819ec8e1 AL |
2184 | .config_aneg = &m88e1510_config_aneg, |
2185 | .read_status = &marvell_read_status, | |
2186 | .ack_interrupt = &marvell_ack_interrupt, | |
2187 | .config_intr = &marvell_config_intr, | |
2188 | .did_interrupt = &m88e1121_did_interrupt, | |
2189 | .resume = &genphy_resume, | |
2190 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2191 | .get_sset_count = marvell_get_sset_count, |
2192 | .get_strings = marvell_get_strings, | |
2193 | .get_stats = marvell_get_stats, | |
819ec8e1 | 2194 | }, |
60f06fde AL |
2195 | { |
2196 | .phy_id = MARVELL_PHY_ID_88E1545, | |
2197 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2198 | .name = "Marvell 88E1545", | |
2199 | .probe = m88e1510_probe, | |
60f06fde AL |
2200 | .features = PHY_GBIT_FEATURES, |
2201 | .flags = PHY_HAS_INTERRUPT, | |
2202 | .config_init = &marvell_config_init, | |
2203 | .config_aneg = &m88e1510_config_aneg, | |
2204 | .read_status = &marvell_read_status, | |
2205 | .ack_interrupt = &marvell_ack_interrupt, | |
2206 | .config_intr = &marvell_config_intr, | |
2207 | .did_interrupt = &m88e1121_did_interrupt, | |
2208 | .resume = &genphy_resume, | |
2209 | .suspend = &genphy_suspend, | |
2210 | .get_sset_count = marvell_get_sset_count, | |
2211 | .get_strings = marvell_get_strings, | |
2212 | .get_stats = marvell_get_stats, | |
2213 | }, | |
6b358aed SH |
2214 | { |
2215 | .phy_id = MARVELL_PHY_ID_88E3016, | |
2216 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2217 | .name = "Marvell 88E3016", | |
2218 | .features = PHY_BASIC_FEATURES, | |
2219 | .flags = PHY_HAS_INTERRUPT, | |
d2fa47d9 | 2220 | .probe = marvell_probe, |
6b358aed SH |
2221 | .config_aneg = &genphy_config_aneg, |
2222 | .config_init = &m88e3016_config_init, | |
2223 | .aneg_done = &marvell_aneg_done, | |
2224 | .read_status = &marvell_read_status, | |
2225 | .ack_interrupt = &marvell_ack_interrupt, | |
2226 | .config_intr = &marvell_config_intr, | |
2227 | .did_interrupt = &m88e1121_did_interrupt, | |
2228 | .resume = &genphy_resume, | |
2229 | .suspend = &genphy_suspend, | |
d2fa47d9 AL |
2230 | .get_sset_count = marvell_get_sset_count, |
2231 | .get_strings = marvell_get_strings, | |
2232 | .get_stats = marvell_get_stats, | |
6b358aed | 2233 | }, |
e4cf8a38 AL |
2234 | { |
2235 | .phy_id = MARVELL_PHY_ID_88E6390, | |
2236 | .phy_id_mask = MARVELL_PHY_ID_MASK, | |
2237 | .name = "Marvell 88E6390", | |
2238 | .features = PHY_GBIT_FEATURES, | |
2239 | .flags = PHY_HAS_INTERRUPT, | |
2240 | .probe = m88e1510_probe, | |
2241 | .config_init = &marvell_config_init, | |
2242 | .config_aneg = &m88e1510_config_aneg, | |
2243 | .read_status = &marvell_read_status, | |
2244 | .ack_interrupt = &marvell_ack_interrupt, | |
2245 | .config_intr = &marvell_config_intr, | |
2246 | .did_interrupt = &m88e1121_did_interrupt, | |
2247 | .resume = &genphy_resume, | |
2248 | .suspend = &genphy_suspend, | |
2249 | .get_sset_count = marvell_get_sset_count, | |
2250 | .get_strings = marvell_get_strings, | |
2251 | .get_stats = marvell_get_stats, | |
2252 | }, | |
00db8189 AF |
2253 | }; |
2254 | ||
50fd7150 | 2255 | module_phy_driver(marvell_drivers); |
4e4f10f6 | 2256 | |
cf93c945 | 2257 | static struct mdio_device_id __maybe_unused marvell_tbl[] = { |
f5e1cabf MS |
2258 | { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, |
2259 | { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, | |
2260 | { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, | |
2261 | { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, | |
2262 | { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, | |
2263 | { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, | |
2264 | { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, | |
2265 | { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, | |
2266 | { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, | |
3da09a51 | 2267 | { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, |
10e24caa | 2268 | { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, |
819ec8e1 | 2269 | { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, |
60f06fde | 2270 | { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, |
6b358aed | 2271 | { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, |
e4cf8a38 | 2272 | { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, |
4e4f10f6 DW |
2273 | { } |
2274 | }; | |
2275 | ||
2276 | MODULE_DEVICE_TABLE(mdio, marvell_tbl); |