]>
Commit | Line | Data |
---|---|---|
5f184715 AF |
1 | /* |
2 | * Generic PHY Management code | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5f184715 AF |
5 | * |
6 | * Copyright 2011 Freescale Semiconductor, Inc. | |
7 | * author Andy Fleming | |
8 | * | |
9 | * Based loosely off of Linux's PHY Lib | |
10 | */ | |
11 | ||
12 | #include <config.h> | |
13 | #include <common.h> | |
14 | #include <malloc.h> | |
15 | #include <net.h> | |
16 | #include <command.h> | |
17 | #include <miiphy.h> | |
18 | #include <phy.h> | |
19 | #include <errno.h> | |
1adb406b | 20 | #include <linux/err.h> |
5f184715 AF |
21 | |
22 | /* Generic PHY support and helper functions */ | |
23 | ||
24 | /** | |
25 | * genphy_config_advert - sanitize and advertise auto-negotation parameters | |
26 | * @phydev: target phy_device struct | |
27 | * | |
28 | * Description: Writes MII_ADVERTISE with the appropriate values, | |
29 | * after sanitizing the values to make sure we only advertise | |
30 | * what is supported. Returns < 0 on error, 0 if the PHY's advertisement | |
31 | * hasn't changed, and > 0 if it has changed. | |
32 | */ | |
960d70c6 | 33 | static int genphy_config_advert(struct phy_device *phydev) |
5f184715 AF |
34 | { |
35 | u32 advertise; | |
36 | int oldadv, adv; | |
37 | int err, changed = 0; | |
38 | ||
39 | /* Only allow advertising what | |
40 | * this PHY supports */ | |
41 | phydev->advertising &= phydev->supported; | |
42 | advertise = phydev->advertising; | |
43 | ||
44 | /* Setup standard advertisement */ | |
45 | oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); | |
46 | ||
47 | if (adv < 0) | |
48 | return adv; | |
49 | ||
50 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | | |
51 | ADVERTISE_PAUSE_ASYM); | |
52 | if (advertise & ADVERTISED_10baseT_Half) | |
53 | adv |= ADVERTISE_10HALF; | |
54 | if (advertise & ADVERTISED_10baseT_Full) | |
55 | adv |= ADVERTISE_10FULL; | |
56 | if (advertise & ADVERTISED_100baseT_Half) | |
57 | adv |= ADVERTISE_100HALF; | |
58 | if (advertise & ADVERTISED_100baseT_Full) | |
59 | adv |= ADVERTISE_100FULL; | |
60 | if (advertise & ADVERTISED_Pause) | |
61 | adv |= ADVERTISE_PAUSE_CAP; | |
62 | if (advertise & ADVERTISED_Asym_Pause) | |
63 | adv |= ADVERTISE_PAUSE_ASYM; | |
de1d786e CC |
64 | if (advertise & ADVERTISED_1000baseX_Half) |
65 | adv |= ADVERTISE_1000XHALF; | |
66 | if (advertise & ADVERTISED_1000baseX_Full) | |
67 | adv |= ADVERTISE_1000XFULL; | |
5f184715 AF |
68 | |
69 | if (adv != oldadv) { | |
70 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); | |
71 | ||
72 | if (err < 0) | |
73 | return err; | |
74 | changed = 1; | |
75 | } | |
76 | ||
77 | /* Configure gigabit if it's supported */ | |
78 | if (phydev->supported & (SUPPORTED_1000baseT_Half | | |
79 | SUPPORTED_1000baseT_Full)) { | |
80 | oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); | |
81 | ||
82 | if (adv < 0) | |
83 | return adv; | |
84 | ||
85 | adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
86 | if (advertise & SUPPORTED_1000baseT_Half) | |
87 | adv |= ADVERTISE_1000HALF; | |
88 | if (advertise & SUPPORTED_1000baseT_Full) | |
89 | adv |= ADVERTISE_1000FULL; | |
90 | ||
91 | if (adv != oldadv) { | |
92 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, | |
93 | adv); | |
94 | ||
95 | if (err < 0) | |
96 | return err; | |
97 | changed = 1; | |
98 | } | |
99 | } | |
100 | ||
101 | return changed; | |
102 | } | |
103 | ||
104 | ||
105 | /** | |
106 | * genphy_setup_forced - configures/forces speed/duplex from @phydev | |
107 | * @phydev: target phy_device struct | |
108 | * | |
109 | * Description: Configures MII_BMCR to force speed/duplex | |
110 | * to the values in phydev. Assumes that the values are valid. | |
111 | */ | |
960d70c6 | 112 | static int genphy_setup_forced(struct phy_device *phydev) |
5f184715 AF |
113 | { |
114 | int err; | |
115 | int ctl = 0; | |
116 | ||
117 | phydev->pause = phydev->asym_pause = 0; | |
118 | ||
119 | if (SPEED_1000 == phydev->speed) | |
120 | ctl |= BMCR_SPEED1000; | |
121 | else if (SPEED_100 == phydev->speed) | |
122 | ctl |= BMCR_SPEED100; | |
123 | ||
124 | if (DUPLEX_FULL == phydev->duplex) | |
125 | ctl |= BMCR_FULLDPLX; | |
126 | ||
127 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); | |
128 | ||
129 | return err; | |
130 | } | |
131 | ||
132 | ||
133 | /** | |
134 | * genphy_restart_aneg - Enable and Restart Autonegotiation | |
135 | * @phydev: target phy_device struct | |
136 | */ | |
137 | int genphy_restart_aneg(struct phy_device *phydev) | |
138 | { | |
139 | int ctl; | |
140 | ||
141 | ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
142 | ||
143 | if (ctl < 0) | |
144 | return ctl; | |
145 | ||
146 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
147 | ||
148 | /* Don't isolate the PHY if we're negotiating */ | |
149 | ctl &= ~(BMCR_ISOLATE); | |
150 | ||
151 | ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); | |
152 | ||
153 | return ctl; | |
154 | } | |
155 | ||
156 | ||
157 | /** | |
158 | * genphy_config_aneg - restart auto-negotiation or write BMCR | |
159 | * @phydev: target phy_device struct | |
160 | * | |
161 | * Description: If auto-negotiation is enabled, we configure the | |
162 | * advertising, and then restart auto-negotiation. If it is not | |
163 | * enabled, then we write the BMCR. | |
164 | */ | |
165 | int genphy_config_aneg(struct phy_device *phydev) | |
166 | { | |
167 | int result; | |
168 | ||
169 | if (AUTONEG_ENABLE != phydev->autoneg) | |
170 | return genphy_setup_forced(phydev); | |
171 | ||
172 | result = genphy_config_advert(phydev); | |
173 | ||
174 | if (result < 0) /* error */ | |
175 | return result; | |
176 | ||
177 | if (result == 0) { | |
178 | /* Advertisment hasn't changed, but maybe aneg was never on to | |
179 | * begin with? Or maybe phy was isolated? */ | |
180 | int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
181 | ||
182 | if (ctl < 0) | |
183 | return ctl; | |
184 | ||
185 | if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) | |
186 | result = 1; /* do restart aneg */ | |
187 | } | |
188 | ||
189 | /* Only restart aneg if we are advertising something different | |
190 | * than we were before. */ | |
191 | if (result > 0) | |
192 | result = genphy_restart_aneg(phydev); | |
193 | ||
194 | return result; | |
195 | } | |
196 | ||
197 | /** | |
198 | * genphy_update_link - update link status in @phydev | |
199 | * @phydev: target phy_device struct | |
200 | * | |
201 | * Description: Update the value in phydev->link to reflect the | |
202 | * current link value. In order to do this, we need to read | |
203 | * the status register twice, keeping the second value. | |
204 | */ | |
205 | int genphy_update_link(struct phy_device *phydev) | |
206 | { | |
207 | unsigned int mii_reg; | |
208 | ||
209 | /* | |
210 | * Wait if the link is up, and autonegotiation is in progress | |
211 | * (ie - we're capable and it's not done) | |
212 | */ | |
213 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
214 | ||
215 | /* | |
216 | * If we already saw the link up, and it hasn't gone down, then | |
217 | * we don't need to wait for autoneg again | |
218 | */ | |
219 | if (phydev->link && mii_reg & BMSR_LSTATUS) | |
220 | return 0; | |
221 | ||
222 | if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) { | |
223 | int i = 0; | |
224 | ||
225 | printf("%s Waiting for PHY auto negotiation to complete", | |
226 | phydev->dev->name); | |
227 | while (!(mii_reg & BMSR_ANEGCOMPLETE)) { | |
228 | /* | |
229 | * Timeout reached ? | |
230 | */ | |
231 | if (i > PHY_ANEG_TIMEOUT) { | |
232 | printf(" TIMEOUT !\n"); | |
233 | phydev->link = 0; | |
234 | return 0; | |
235 | } | |
236 | ||
237 | if (ctrlc()) { | |
238 | puts("user interrupt!\n"); | |
239 | phydev->link = 0; | |
240 | return -EINTR; | |
241 | } | |
242 | ||
243 | if ((i++ % 500) == 0) | |
244 | printf("."); | |
245 | ||
246 | udelay(1000); /* 1 ms */ | |
247 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
248 | } | |
249 | printf(" done\n"); | |
250 | phydev->link = 1; | |
251 | } else { | |
252 | /* Read the link a second time to clear the latched state */ | |
253 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
254 | ||
255 | if (mii_reg & BMSR_LSTATUS) | |
256 | phydev->link = 1; | |
257 | else | |
258 | phydev->link = 0; | |
259 | } | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
264 | /* | |
265 | * Generic function which updates the speed and duplex. If | |
266 | * autonegotiation is enabled, it uses the AND of the link | |
267 | * partner's advertised capabilities and our advertised | |
268 | * capabilities. If autonegotiation is disabled, we use the | |
269 | * appropriate bits in the control register. | |
270 | * | |
271 | * Stolen from Linux's mii.c and phy_device.c | |
272 | */ | |
e2043f5c | 273 | int genphy_parse_link(struct phy_device *phydev) |
5f184715 AF |
274 | { |
275 | int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
276 | ||
277 | /* We're using autonegotiation */ | |
278 | if (mii_reg & BMSR_ANEGCAPABLE) { | |
279 | u32 lpa = 0; | |
280 | u32 gblpa = 0; | |
de1d786e | 281 | u32 estatus = 0; |
5f184715 AF |
282 | |
283 | /* Check for gigabit capability */ | |
284 | if (mii_reg & BMSR_ERCAP) { | |
285 | /* We want a list of states supported by | |
286 | * both PHYs in the link | |
287 | */ | |
288 | gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); | |
289 | gblpa &= phy_read(phydev, | |
290 | MDIO_DEVAD_NONE, MII_CTRL1000) << 2; | |
291 | } | |
292 | ||
293 | /* Set the baseline so we only have to set them | |
294 | * if they're different | |
295 | */ | |
296 | phydev->speed = SPEED_10; | |
297 | phydev->duplex = DUPLEX_HALF; | |
298 | ||
299 | /* Check the gigabit fields */ | |
300 | if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { | |
301 | phydev->speed = SPEED_1000; | |
302 | ||
303 | if (gblpa & PHY_1000BTSR_1000FD) | |
304 | phydev->duplex = DUPLEX_FULL; | |
305 | ||
306 | /* We're done! */ | |
307 | return 0; | |
308 | } | |
309 | ||
310 | lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); | |
311 | lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); | |
312 | ||
0dcfb0fc | 313 | if (lpa & (LPA_100FULL | LPA_100HALF)) { |
5f184715 AF |
314 | phydev->speed = SPEED_100; |
315 | ||
0dcfb0fc WD |
316 | if (lpa & LPA_100FULL) |
317 | phydev->duplex = DUPLEX_FULL; | |
318 | ||
319 | } else if (lpa & LPA_10FULL) | |
5f184715 | 320 | phydev->duplex = DUPLEX_FULL; |
de1d786e | 321 | |
9ba30f6b SS |
322 | /* |
323 | * Extended status may indicate that the PHY supports | |
324 | * 1000BASE-T/X even though the 1000BASE-T registers | |
325 | * are missing. In this case we can't tell whether the | |
326 | * peer also supports it, so we only check extended | |
327 | * status if the 1000BASE-T registers are actually | |
328 | * missing. | |
329 | */ | |
330 | if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) | |
de1d786e CC |
331 | estatus = phy_read(phydev, MDIO_DEVAD_NONE, |
332 | MII_ESTATUS); | |
333 | ||
334 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | | |
335 | ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { | |
336 | phydev->speed = SPEED_1000; | |
337 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) | |
338 | phydev->duplex = DUPLEX_FULL; | |
339 | } | |
340 | ||
5f184715 AF |
341 | } else { |
342 | u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
343 | ||
344 | phydev->speed = SPEED_10; | |
345 | phydev->duplex = DUPLEX_HALF; | |
346 | ||
347 | if (bmcr & BMCR_FULLDPLX) | |
348 | phydev->duplex = DUPLEX_FULL; | |
349 | ||
350 | if (bmcr & BMCR_SPEED1000) | |
351 | phydev->speed = SPEED_1000; | |
352 | else if (bmcr & BMCR_SPEED100) | |
353 | phydev->speed = SPEED_100; | |
354 | } | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
359 | int genphy_config(struct phy_device *phydev) | |
360 | { | |
361 | int val; | |
362 | u32 features; | |
363 | ||
364 | /* For now, I'll claim that the generic driver supports | |
365 | * all possible port types */ | |
366 | features = (SUPPORTED_TP | SUPPORTED_MII | |
367 | | SUPPORTED_AUI | SUPPORTED_FIBRE | | |
368 | SUPPORTED_BNC); | |
369 | ||
370 | /* Do we support autonegotiation? */ | |
371 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
372 | ||
373 | if (val < 0) | |
374 | return val; | |
375 | ||
376 | if (val & BMSR_ANEGCAPABLE) | |
377 | features |= SUPPORTED_Autoneg; | |
378 | ||
379 | if (val & BMSR_100FULL) | |
380 | features |= SUPPORTED_100baseT_Full; | |
381 | if (val & BMSR_100HALF) | |
382 | features |= SUPPORTED_100baseT_Half; | |
383 | if (val & BMSR_10FULL) | |
384 | features |= SUPPORTED_10baseT_Full; | |
385 | if (val & BMSR_10HALF) | |
386 | features |= SUPPORTED_10baseT_Half; | |
387 | ||
388 | if (val & BMSR_ESTATEN) { | |
389 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); | |
390 | ||
391 | if (val < 0) | |
392 | return val; | |
393 | ||
394 | if (val & ESTATUS_1000_TFULL) | |
395 | features |= SUPPORTED_1000baseT_Full; | |
396 | if (val & ESTATUS_1000_THALF) | |
397 | features |= SUPPORTED_1000baseT_Half; | |
de1d786e CC |
398 | if (val & ESTATUS_1000_XFULL) |
399 | features |= SUPPORTED_1000baseX_Full; | |
400 | if (val & ESTATUS_1000_XHALF) | |
9a5dad23 | 401 | features |= SUPPORTED_1000baseX_Half; |
5f184715 AF |
402 | } |
403 | ||
404 | phydev->supported = features; | |
405 | phydev->advertising = features; | |
406 | ||
407 | genphy_config_aneg(phydev); | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | int genphy_startup(struct phy_device *phydev) | |
413 | { | |
414 | genphy_update_link(phydev); | |
415 | genphy_parse_link(phydev); | |
416 | ||
417 | return 0; | |
418 | } | |
419 | ||
420 | int genphy_shutdown(struct phy_device *phydev) | |
421 | { | |
422 | return 0; | |
423 | } | |
424 | ||
425 | static struct phy_driver genphy_driver = { | |
426 | .uid = 0xffffffff, | |
427 | .mask = 0xffffffff, | |
428 | .name = "Generic PHY", | |
429 | .features = 0, | |
430 | .config = genphy_config, | |
431 | .startup = genphy_startup, | |
432 | .shutdown = genphy_shutdown, | |
433 | }; | |
434 | ||
435 | static LIST_HEAD(phy_drivers); | |
436 | ||
437 | int phy_init(void) | |
438 | { | |
9082eeac AF |
439 | #ifdef CONFIG_PHY_ATHEROS |
440 | phy_atheros_init(); | |
441 | #endif | |
442 | #ifdef CONFIG_PHY_BROADCOM | |
443 | phy_broadcom_init(); | |
444 | #endif | |
445 | #ifdef CONFIG_PHY_DAVICOM | |
446 | phy_davicom_init(); | |
447 | #endif | |
f485c8a3 MP |
448 | #ifdef CONFIG_PHY_ET1011C |
449 | phy_et1011c_init(); | |
450 | #endif | |
0fae2508 YY |
451 | #ifdef CONFIG_PHY_ICPLUS |
452 | phy_icplus_init(); | |
453 | #endif | |
9082eeac AF |
454 | #ifdef CONFIG_PHY_LXT |
455 | phy_lxt_init(); | |
456 | #endif | |
457 | #ifdef CONFIG_PHY_MARVELL | |
458 | phy_marvell_init(); | |
459 | #endif | |
460 | #ifdef CONFIG_PHY_MICREL | |
461 | phy_micrel_init(); | |
462 | #endif | |
463 | #ifdef CONFIG_PHY_NATSEMI | |
464 | phy_natsemi_init(); | |
465 | #endif | |
466 | #ifdef CONFIG_PHY_REALTEK | |
467 | phy_realtek_init(); | |
468 | #endif | |
5751aa2f NI |
469 | #ifdef CONFIG_PHY_SMSC |
470 | phy_smsc_init(); | |
471 | #endif | |
9082eeac AF |
472 | #ifdef CONFIG_PHY_TERANETICS |
473 | phy_teranetics_init(); | |
474 | #endif | |
475 | #ifdef CONFIG_PHY_VITESSE | |
476 | phy_vitesse_init(); | |
477 | #endif | |
478 | ||
5f184715 AF |
479 | return 0; |
480 | } | |
481 | ||
482 | int phy_register(struct phy_driver *drv) | |
483 | { | |
484 | INIT_LIST_HEAD(&drv->list); | |
485 | list_add_tail(&drv->list, &phy_drivers); | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
960d70c6 | 490 | static int phy_probe(struct phy_device *phydev) |
5f184715 AF |
491 | { |
492 | int err = 0; | |
493 | ||
494 | phydev->advertising = phydev->supported = phydev->drv->features; | |
495 | phydev->mmds = phydev->drv->mmds; | |
496 | ||
497 | if (phydev->drv->probe) | |
498 | err = phydev->drv->probe(phydev); | |
499 | ||
500 | return err; | |
501 | } | |
502 | ||
503 | static struct phy_driver *generic_for_interface(phy_interface_t interface) | |
504 | { | |
505 | #ifdef CONFIG_PHYLIB_10G | |
506 | if (is_10g_interface(interface)) | |
507 | return &gen10g_driver; | |
508 | #endif | |
509 | ||
510 | return &genphy_driver; | |
511 | } | |
512 | ||
960d70c6 | 513 | static struct phy_driver *get_phy_driver(struct phy_device *phydev, |
5f184715 AF |
514 | phy_interface_t interface) |
515 | { | |
516 | struct list_head *entry; | |
517 | int phy_id = phydev->phy_id; | |
518 | struct phy_driver *drv = NULL; | |
519 | ||
520 | list_for_each(entry, &phy_drivers) { | |
521 | drv = list_entry(entry, struct phy_driver, list); | |
522 | if ((drv->uid & drv->mask) == (phy_id & drv->mask)) | |
523 | return drv; | |
524 | } | |
525 | ||
526 | /* If we made it here, there's no driver for this PHY */ | |
527 | return generic_for_interface(interface); | |
528 | } | |
529 | ||
960d70c6 KP |
530 | static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, |
531 | int phy_id, | |
532 | phy_interface_t interface) | |
5f184715 AF |
533 | { |
534 | struct phy_device *dev; | |
535 | ||
536 | /* We allocate the device, and initialize the | |
537 | * default values */ | |
538 | dev = malloc(sizeof(*dev)); | |
539 | if (!dev) { | |
540 | printf("Failed to allocate PHY device for %s:%d\n", | |
541 | bus->name, addr); | |
542 | return NULL; | |
543 | } | |
544 | ||
545 | memset(dev, 0, sizeof(*dev)); | |
546 | ||
547 | dev->duplex = -1; | |
548 | dev->link = 1; | |
549 | dev->interface = interface; | |
550 | ||
551 | dev->autoneg = AUTONEG_ENABLE; | |
552 | ||
553 | dev->addr = addr; | |
554 | dev->phy_id = phy_id; | |
555 | dev->bus = bus; | |
556 | ||
557 | dev->drv = get_phy_driver(dev, interface); | |
558 | ||
559 | phy_probe(dev); | |
560 | ||
561 | bus->phymap[addr] = dev; | |
562 | ||
563 | return dev; | |
564 | } | |
565 | ||
566 | /** | |
567 | * get_phy_id - reads the specified addr for its ID. | |
568 | * @bus: the target MII bus | |
569 | * @addr: PHY address on the MII bus | |
570 | * @phy_id: where to store the ID retrieved. | |
571 | * | |
572 | * Description: Reads the ID registers of the PHY at @addr on the | |
573 | * @bus, stores it in @phy_id and returns zero on success. | |
574 | */ | |
960d70c6 | 575 | static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) |
5f184715 AF |
576 | { |
577 | int phy_reg; | |
578 | ||
579 | /* Grab the bits from PHYIR1, and put them | |
580 | * in the upper half */ | |
581 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); | |
582 | ||
583 | if (phy_reg < 0) | |
584 | return -EIO; | |
585 | ||
586 | *phy_id = (phy_reg & 0xffff) << 16; | |
587 | ||
588 | /* Grab the bits from PHYIR2, and put them in the lower half */ | |
589 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); | |
590 | ||
591 | if (phy_reg < 0) | |
592 | return -EIO; | |
593 | ||
594 | *phy_id |= (phy_reg & 0xffff); | |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
1adb406b TK |
599 | static struct phy_device *create_phy_by_mask(struct mii_dev *bus, |
600 | unsigned phy_mask, int devad, phy_interface_t interface) | |
601 | { | |
602 | u32 phy_id = 0xffffffff; | |
603 | while (phy_mask) { | |
604 | int addr = ffs(phy_mask) - 1; | |
605 | int r = get_phy_id(bus, addr, devad, &phy_id); | |
606 | if (r < 0) | |
607 | return ERR_PTR(r); | |
608 | /* If the PHY ID is mostly f's, we didn't find anything */ | |
609 | if ((phy_id & 0x1fffffff) != 0x1fffffff) | |
610 | return phy_device_create(bus, addr, phy_id, interface); | |
611 | phy_mask &= ~(1 << addr); | |
612 | } | |
613 | return NULL; | |
614 | } | |
615 | ||
616 | static struct phy_device *search_for_existing_phy(struct mii_dev *bus, | |
617 | unsigned phy_mask, phy_interface_t interface) | |
618 | { | |
619 | /* If we have one, return the existing device, with new interface */ | |
620 | while (phy_mask) { | |
621 | int addr = ffs(phy_mask) - 1; | |
622 | if (bus->phymap[addr]) { | |
623 | bus->phymap[addr]->interface = interface; | |
624 | return bus->phymap[addr]; | |
625 | } | |
626 | phy_mask &= ~(1 << addr); | |
627 | } | |
628 | return NULL; | |
629 | } | |
630 | ||
631 | static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, | |
632 | unsigned phy_mask, phy_interface_t interface) | |
633 | { | |
634 | int i; | |
635 | struct phy_device *phydev; | |
636 | ||
637 | phydev = search_for_existing_phy(bus, phy_mask, interface); | |
638 | if (phydev) | |
639 | return phydev; | |
640 | /* Try Standard (ie Clause 22) access */ | |
641 | /* Otherwise we have to try Clause 45 */ | |
642 | for (i = 0; i < 5; i++) { | |
643 | phydev = create_phy_by_mask(bus, phy_mask, | |
644 | i ? i : MDIO_DEVAD_NONE, interface); | |
645 | if (IS_ERR(phydev)) | |
646 | return NULL; | |
647 | if (phydev) | |
648 | return phydev; | |
649 | } | |
650 | printf("Phy not found\n"); | |
651 | return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface); | |
652 | } | |
653 | ||
5f184715 AF |
654 | /** |
655 | * get_phy_device - reads the specified PHY device and returns its @phy_device struct | |
656 | * @bus: the target MII bus | |
657 | * @addr: PHY address on the MII bus | |
658 | * | |
659 | * Description: Reads the ID registers of the PHY at @addr on the | |
660 | * @bus, then allocates and returns the phy_device to represent it. | |
661 | */ | |
960d70c6 KP |
662 | static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, |
663 | phy_interface_t interface) | |
5f184715 | 664 | { |
1adb406b | 665 | return get_phy_device_by_mask(bus, 1 << addr, interface); |
5f184715 AF |
666 | } |
667 | ||
668 | int phy_reset(struct phy_device *phydev) | |
669 | { | |
670 | int reg; | |
671 | int timeout = 500; | |
672 | int devad = MDIO_DEVAD_NONE; | |
673 | ||
674 | #ifdef CONFIG_PHYLIB_10G | |
675 | /* If it's 10G, we need to issue reset through one of the MMDs */ | |
676 | if (is_10g_interface(phydev->interface)) { | |
677 | if (!phydev->mmds) | |
678 | gen10g_discover_mmds(phydev); | |
679 | ||
680 | devad = ffs(phydev->mmds) - 1; | |
681 | } | |
682 | #endif | |
683 | ||
684 | reg = phy_read(phydev, devad, MII_BMCR); | |
685 | if (reg < 0) { | |
686 | debug("PHY status read failed\n"); | |
687 | return -1; | |
688 | } | |
689 | ||
690 | reg |= BMCR_RESET; | |
691 | ||
692 | if (phy_write(phydev, devad, MII_BMCR, reg) < 0) { | |
693 | debug("PHY reset failed\n"); | |
694 | return -1; | |
695 | } | |
696 | ||
697 | #ifdef CONFIG_PHY_RESET_DELAY | |
698 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ | |
699 | #endif | |
700 | /* | |
701 | * Poll the control register for the reset bit to go to 0 (it is | |
702 | * auto-clearing). This should happen within 0.5 seconds per the | |
703 | * IEEE spec. | |
704 | */ | |
705 | while ((reg & BMCR_RESET) && timeout--) { | |
706 | reg = phy_read(phydev, devad, MII_BMCR); | |
707 | ||
708 | if (reg < 0) { | |
709 | debug("PHY status read failed\n"); | |
710 | return -1; | |
711 | } | |
712 | udelay(1000); | |
713 | } | |
714 | ||
715 | if (reg & BMCR_RESET) { | |
716 | puts("PHY reset timed out\n"); | |
717 | return -1; | |
718 | } | |
719 | ||
720 | return 0; | |
721 | } | |
722 | ||
723 | int miiphy_reset(const char *devname, unsigned char addr) | |
724 | { | |
725 | struct mii_dev *bus = miiphy_get_dev_by_name(devname); | |
726 | struct phy_device *phydev; | |
727 | ||
728 | /* | |
729 | * miiphy_reset was only used on standard PHYs, so we'll fake it here. | |
730 | * If later code tries to connect with the right interface, this will | |
731 | * be corrected by get_phy_device in phy_connect() | |
732 | */ | |
733 | phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); | |
734 | ||
735 | return phy_reset(phydev); | |
736 | } | |
737 | ||
1adb406b TK |
738 | struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, |
739 | phy_interface_t interface) | |
5f184715 | 740 | { |
5f184715 | 741 | /* Reset the bus */ |
e3a77218 VZ |
742 | if (bus->reset) |
743 | bus->reset(bus); | |
5f184715 AF |
744 | |
745 | /* Wait 15ms to make sure the PHY has come out of hard reset */ | |
746 | udelay(15000); | |
1adb406b TK |
747 | return get_phy_device_by_mask(bus, phy_mask, interface); |
748 | } | |
5f184715 | 749 | |
1adb406b TK |
750 | void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) |
751 | { | |
5f184715 AF |
752 | /* Soft Reset the PHY */ |
753 | phy_reset(phydev); | |
1adb406b | 754 | if (phydev->dev) { |
5f184715 | 755 | printf("%s:%d is connected to %s. Reconnecting to %s\n", |
1adb406b TK |
756 | phydev->bus->name, phydev->addr, |
757 | phydev->dev->name, dev->name); | |
758 | } | |
5f184715 | 759 | phydev->dev = dev; |
b91a9d9d | 760 | debug("%s connected to %s\n", dev->name, phydev->drv->name); |
1adb406b TK |
761 | } |
762 | ||
763 | struct phy_device *phy_connect(struct mii_dev *bus, int addr, | |
764 | struct eth_device *dev, phy_interface_t interface) | |
765 | { | |
766 | struct phy_device *phydev; | |
5f184715 | 767 | |
1adb406b TK |
768 | phydev = phy_find_by_mask(bus, 1 << addr, interface); |
769 | if (phydev) | |
770 | phy_connect_dev(phydev, dev); | |
771 | else | |
772 | printf("Could not get PHY for %s: addr %d\n", bus->name, addr); | |
5f184715 AF |
773 | return phydev; |
774 | } | |
775 | ||
6e5b9ac0 TT |
776 | /* |
777 | * Start the PHY. Returns 0 on success, or a negative error code. | |
778 | */ | |
5f184715 AF |
779 | int phy_startup(struct phy_device *phydev) |
780 | { | |
781 | if (phydev->drv->startup) | |
6e5b9ac0 | 782 | return phydev->drv->startup(phydev); |
5f184715 AF |
783 | |
784 | return 0; | |
785 | } | |
786 | ||
787 | static int __board_phy_config(struct phy_device *phydev) | |
788 | { | |
9fafe7da TK |
789 | if (phydev->drv->config) |
790 | return phydev->drv->config(phydev); | |
5f184715 AF |
791 | return 0; |
792 | } | |
793 | ||
794 | int board_phy_config(struct phy_device *phydev) | |
795 | __attribute__((weak, alias("__board_phy_config"))); | |
796 | ||
797 | int phy_config(struct phy_device *phydev) | |
798 | { | |
5f184715 AF |
799 | /* Invoke an optional board-specific helper */ |
800 | board_phy_config(phydev); | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | int phy_shutdown(struct phy_device *phydev) | |
806 | { | |
807 | if (phydev->drv->shutdown) | |
808 | phydev->drv->shutdown(phydev); | |
809 | ||
810 | return 0; | |
811 | } |