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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
5f184715
AF
2/*
3 * Generic PHY Management code
4 *
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5 * Copyright 2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 *
8 * Based loosely off of Linux's PHY Lib
9 */
10
11#include <config.h>
12#include <common.h>
24b852a7 13#include <console.h>
c74c8e66 14#include <dm.h>
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15#include <malloc.h>
16#include <net.h>
17#include <command.h>
18#include <miiphy.h>
19#include <phy.h>
20#include <errno.h>
1adb406b 21#include <linux/err.h>
597fe041 22#include <linux/compiler.h>
5f184715 23
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MS
24DECLARE_GLOBAL_DATA_PTR;
25
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26/* Generic PHY support and helper functions */
27
28/**
8d631203 29 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
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30 * @phydev: target phy_device struct
31 *
32 * Description: Writes MII_ADVERTISE with the appropriate values,
33 * after sanitizing the values to make sure we only advertise
34 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
35 * hasn't changed, and > 0 if it has changed.
36 */
960d70c6 37static int genphy_config_advert(struct phy_device *phydev)
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38{
39 u32 advertise;
bbdcaff1 40 int oldadv, adv, bmsr;
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41 int err, changed = 0;
42
bbdcaff1 43 /* Only allow advertising what this PHY supports */
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44 phydev->advertising &= phydev->supported;
45 advertise = phydev->advertising;
46
47 /* Setup standard advertisement */
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FF
48 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
49 oldadv = adv;
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AF
50
51 if (adv < 0)
52 return adv;
53
54 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
55 ADVERTISE_PAUSE_ASYM);
56 if (advertise & ADVERTISED_10baseT_Half)
57 adv |= ADVERTISE_10HALF;
58 if (advertise & ADVERTISED_10baseT_Full)
59 adv |= ADVERTISE_10FULL;
60 if (advertise & ADVERTISED_100baseT_Half)
61 adv |= ADVERTISE_100HALF;
62 if (advertise & ADVERTISED_100baseT_Full)
63 adv |= ADVERTISE_100FULL;
64 if (advertise & ADVERTISED_Pause)
65 adv |= ADVERTISE_PAUSE_CAP;
66 if (advertise & ADVERTISED_Asym_Pause)
67 adv |= ADVERTISE_PAUSE_ASYM;
de1d786e
CC
68 if (advertise & ADVERTISED_1000baseX_Half)
69 adv |= ADVERTISE_1000XHALF;
70 if (advertise & ADVERTISED_1000baseX_Full)
71 adv |= ADVERTISE_1000XFULL;
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AF
72
73 if (adv != oldadv) {
74 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
75
76 if (err < 0)
77 return err;
78 changed = 1;
79 }
80
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FF
81 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
82 if (bmsr < 0)
83 return bmsr;
84
85 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
86 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
87 * logical 1.
88 */
89 if (!(bmsr & BMSR_ESTATEN))
90 return changed;
91
5f184715 92 /* Configure gigabit if it's supported */
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FF
93 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
94 oldadv = adv;
95
96 if (adv < 0)
97 return adv;
5f184715 98
bbdcaff1 99 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
5f184715 100
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FF
101 if (phydev->supported & (SUPPORTED_1000baseT_Half |
102 SUPPORTED_1000baseT_Full)) {
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103 if (advertise & SUPPORTED_1000baseT_Half)
104 adv |= ADVERTISE_1000HALF;
105 if (advertise & SUPPORTED_1000baseT_Full)
106 adv |= ADVERTISE_1000FULL;
bbdcaff1 107 }
5f184715 108
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FF
109 if (adv != oldadv)
110 changed = 1;
5f184715 111
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112 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
113 if (err < 0)
114 return err;
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115
116 return changed;
117}
118
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119/**
120 * genphy_setup_forced - configures/forces speed/duplex from @phydev
121 * @phydev: target phy_device struct
122 *
123 * Description: Configures MII_BMCR to force speed/duplex
124 * to the values in phydev. Assumes that the values are valid.
125 */
960d70c6 126static int genphy_setup_forced(struct phy_device *phydev)
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127{
128 int err;
53b0c38c 129 int ctl = BMCR_ANRESTART;
5f184715 130
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MS
131 phydev->pause = 0;
132 phydev->asym_pause = 0;
5f184715 133
8d631203 134 if (phydev->speed == SPEED_1000)
5f184715 135 ctl |= BMCR_SPEED1000;
8d631203 136 else if (phydev->speed == SPEED_100)
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137 ctl |= BMCR_SPEED100;
138
8d631203 139 if (phydev->duplex == DUPLEX_FULL)
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140 ctl |= BMCR_FULLDPLX;
141
142 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
143
144 return err;
145}
146
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147/**
148 * genphy_restart_aneg - Enable and Restart Autonegotiation
149 * @phydev: target phy_device struct
150 */
151int genphy_restart_aneg(struct phy_device *phydev)
152{
153 int ctl;
154
155 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
156
157 if (ctl < 0)
158 return ctl;
159
160 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
161
162 /* Don't isolate the PHY if we're negotiating */
163 ctl &= ~(BMCR_ISOLATE);
164
165 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
166
167 return ctl;
168}
169
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170/**
171 * genphy_config_aneg - restart auto-negotiation or write BMCR
172 * @phydev: target phy_device struct
173 *
174 * Description: If auto-negotiation is enabled, we configure the
175 * advertising, and then restart auto-negotiation. If it is not
176 * enabled, then we write the BMCR.
177 */
178int genphy_config_aneg(struct phy_device *phydev)
179{
180 int result;
181
8d631203 182 if (phydev->autoneg != AUTONEG_ENABLE)
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183 return genphy_setup_forced(phydev);
184
185 result = genphy_config_advert(phydev);
186
187 if (result < 0) /* error */
188 return result;
189
190 if (result == 0) {
8d631203
MS
191 /*
192 * Advertisment hasn't changed, but maybe aneg was never on to
193 * begin with? Or maybe phy was isolated?
194 */
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195 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
196
197 if (ctl < 0)
198 return ctl;
199
200 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
201 result = 1; /* do restart aneg */
202 }
203
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MS
204 /*
205 * Only restart aneg if we are advertising something different
206 * than we were before.
207 */
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208 if (result > 0)
209 result = genphy_restart_aneg(phydev);
210
211 return result;
212}
213
214/**
215 * genphy_update_link - update link status in @phydev
216 * @phydev: target phy_device struct
217 *
218 * Description: Update the value in phydev->link to reflect the
219 * current link value. In order to do this, we need to read
220 * the status register twice, keeping the second value.
221 */
222int genphy_update_link(struct phy_device *phydev)
223{
224 unsigned int mii_reg;
225
226 /*
227 * Wait if the link is up, and autonegotiation is in progress
228 * (ie - we're capable and it's not done)
229 */
230 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
231
232 /*
233 * If we already saw the link up, and it hasn't gone down, then
234 * we don't need to wait for autoneg again
235 */
236 if (phydev->link && mii_reg & BMSR_LSTATUS)
237 return 0;
238
1f9e672c
AM
239 if ((phydev->autoneg == AUTONEG_ENABLE) &&
240 !(mii_reg & BMSR_ANEGCOMPLETE)) {
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241 int i = 0;
242
243 printf("%s Waiting for PHY auto negotiation to complete",
8d631203 244 phydev->dev->name);
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245 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
246 /*
247 * Timeout reached ?
248 */
249 if (i > PHY_ANEG_TIMEOUT) {
250 printf(" TIMEOUT !\n");
251 phydev->link = 0;
ef5e821b 252 return -ETIMEDOUT;
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AF
253 }
254
255 if (ctrlc()) {
256 puts("user interrupt!\n");
257 phydev->link = 0;
258 return -EINTR;
259 }
260
261 if ((i++ % 500) == 0)
262 printf(".");
263
264 udelay(1000); /* 1 ms */
265 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
266 }
267 printf(" done\n");
268 phydev->link = 1;
269 } else {
270 /* Read the link a second time to clear the latched state */
271 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
272
273 if (mii_reg & BMSR_LSTATUS)
274 phydev->link = 1;
275 else
276 phydev->link = 0;
277 }
278
279 return 0;
280}
281
282/*
283 * Generic function which updates the speed and duplex. If
284 * autonegotiation is enabled, it uses the AND of the link
285 * partner's advertised capabilities and our advertised
286 * capabilities. If autonegotiation is disabled, we use the
287 * appropriate bits in the control register.
288 *
289 * Stolen from Linux's mii.c and phy_device.c
290 */
e2043f5c 291int genphy_parse_link(struct phy_device *phydev)
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292{
293 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
294
295 /* We're using autonegotiation */
1f9e672c 296 if (phydev->autoneg == AUTONEG_ENABLE) {
5f184715 297 u32 lpa = 0;
f6d1f6e4 298 int gblpa = 0;
de1d786e 299 u32 estatus = 0;
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300
301 /* Check for gigabit capability */
3a530d1b
DD
302 if (phydev->supported & (SUPPORTED_1000baseT_Full |
303 SUPPORTED_1000baseT_Half)) {
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AF
304 /* We want a list of states supported by
305 * both PHYs in the link
306 */
307 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
f6d1f6e4 308 if (gblpa < 0) {
8d631203
MS
309 debug("Could not read MII_STAT1000. ");
310 debug("Ignoring gigabit capability\n");
f6d1f6e4
HS
311 gblpa = 0;
312 }
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313 gblpa &= phy_read(phydev,
314 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
315 }
316
317 /* Set the baseline so we only have to set them
318 * if they're different
319 */
320 phydev->speed = SPEED_10;
321 phydev->duplex = DUPLEX_HALF;
322
323 /* Check the gigabit fields */
324 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
325 phydev->speed = SPEED_1000;
326
327 if (gblpa & PHY_1000BTSR_1000FD)
328 phydev->duplex = DUPLEX_FULL;
329
330 /* We're done! */
331 return 0;
332 }
333
334 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
335 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
336
0dcfb0fc 337 if (lpa & (LPA_100FULL | LPA_100HALF)) {
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338 phydev->speed = SPEED_100;
339
0dcfb0fc
WD
340 if (lpa & LPA_100FULL)
341 phydev->duplex = DUPLEX_FULL;
342
8d631203 343 } else if (lpa & LPA_10FULL) {
5f184715 344 phydev->duplex = DUPLEX_FULL;
8d631203 345 }
de1d786e 346
9ba30f6b
SS
347 /*
348 * Extended status may indicate that the PHY supports
349 * 1000BASE-T/X even though the 1000BASE-T registers
350 * are missing. In this case we can't tell whether the
351 * peer also supports it, so we only check extended
352 * status if the 1000BASE-T registers are actually
353 * missing.
354 */
355 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
de1d786e
CC
356 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
357 MII_ESTATUS);
358
359 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
360 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
361 phydev->speed = SPEED_1000;
362 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
363 phydev->duplex = DUPLEX_FULL;
364 }
365
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AF
366 } else {
367 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
368
369 phydev->speed = SPEED_10;
370 phydev->duplex = DUPLEX_HALF;
371
372 if (bmcr & BMCR_FULLDPLX)
373 phydev->duplex = DUPLEX_FULL;
374
375 if (bmcr & BMCR_SPEED1000)
376 phydev->speed = SPEED_1000;
377 else if (bmcr & BMCR_SPEED100)
378 phydev->speed = SPEED_100;
379 }
380
381 return 0;
382}
383
384int genphy_config(struct phy_device *phydev)
385{
386 int val;
387 u32 features;
388
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AF
389 features = (SUPPORTED_TP | SUPPORTED_MII
390 | SUPPORTED_AUI | SUPPORTED_FIBRE |
391 SUPPORTED_BNC);
392
393 /* Do we support autonegotiation? */
394 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
395
396 if (val < 0)
397 return val;
398
399 if (val & BMSR_ANEGCAPABLE)
400 features |= SUPPORTED_Autoneg;
401
402 if (val & BMSR_100FULL)
403 features |= SUPPORTED_100baseT_Full;
404 if (val & BMSR_100HALF)
405 features |= SUPPORTED_100baseT_Half;
406 if (val & BMSR_10FULL)
407 features |= SUPPORTED_10baseT_Full;
408 if (val & BMSR_10HALF)
409 features |= SUPPORTED_10baseT_Half;
410
411 if (val & BMSR_ESTATEN) {
412 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
413
414 if (val < 0)
415 return val;
416
417 if (val & ESTATUS_1000_TFULL)
418 features |= SUPPORTED_1000baseT_Full;
419 if (val & ESTATUS_1000_THALF)
420 features |= SUPPORTED_1000baseT_Half;
de1d786e
CC
421 if (val & ESTATUS_1000_XFULL)
422 features |= SUPPORTED_1000baseX_Full;
423 if (val & ESTATUS_1000_XHALF)
9a5dad23 424 features |= SUPPORTED_1000baseX_Half;
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AF
425 }
426
44bc3174
SH
427 phydev->supported &= features;
428 phydev->advertising &= features;
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429
430 genphy_config_aneg(phydev);
431
432 return 0;
433}
434
435int genphy_startup(struct phy_device *phydev)
436{
b733c278 437 int ret;
5f184715 438
b733c278
MS
439 ret = genphy_update_link(phydev);
440 if (ret)
441 return ret;
442
443 return genphy_parse_link(phydev);
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AF
444}
445
446int genphy_shutdown(struct phy_device *phydev)
447{
448 return 0;
449}
450
451static struct phy_driver genphy_driver = {
452 .uid = 0xffffffff,
453 .mask = 0xffffffff,
454 .name = "Generic PHY",
44bc3174
SH
455 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
456 SUPPORTED_AUI | SUPPORTED_FIBRE |
457 SUPPORTED_BNC,
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AF
458 .config = genphy_config,
459 .startup = genphy_startup,
460 .shutdown = genphy_shutdown,
461};
462
463static LIST_HEAD(phy_drivers);
464
465int phy_init(void)
466{
137963d7
FF
467#ifdef CONFIG_B53_SWITCH
468 phy_b53_init();
469#endif
24ae3961
KS
470#ifdef CONFIG_MV88E61XX_SWITCH
471 phy_mv88e61xx_init();
472#endif
f7c38cf8
SX
473#ifdef CONFIG_PHY_AQUANTIA
474 phy_aquantia_init();
475#endif
9082eeac
AF
476#ifdef CONFIG_PHY_ATHEROS
477 phy_atheros_init();
478#endif
479#ifdef CONFIG_PHY_BROADCOM
480 phy_broadcom_init();
481#endif
9b18e519
SL
482#ifdef CONFIG_PHY_CORTINA
483 phy_cortina_init();
484#endif
9082eeac
AF
485#ifdef CONFIG_PHY_DAVICOM
486 phy_davicom_init();
487#endif
f485c8a3
MP
488#ifdef CONFIG_PHY_ET1011C
489 phy_et1011c_init();
490#endif
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AF
491#ifdef CONFIG_PHY_LXT
492 phy_lxt_init();
493#endif
494#ifdef CONFIG_PHY_MARVELL
495 phy_marvell_init();
496#endif
d397f7c4
AG
497#ifdef CONFIG_PHY_MICREL_KSZ8XXX
498 phy_micrel_ksz8xxx_init();
499#endif
500#ifdef CONFIG_PHY_MICREL_KSZ90X1
501 phy_micrel_ksz90x1_init();
9082eeac 502#endif
8995a96d
NA
503#ifdef CONFIG_PHY_MESON_GXL
504 phy_meson_gxl_init();
505#endif
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AF
506#ifdef CONFIG_PHY_NATSEMI
507 phy_natsemi_init();
508#endif
509#ifdef CONFIG_PHY_REALTEK
510 phy_realtek_init();
511#endif
5751aa2f
NI
512#ifdef CONFIG_PHY_SMSC
513 phy_smsc_init();
514#endif
9082eeac
AF
515#ifdef CONFIG_PHY_TERANETICS
516 phy_teranetics_init();
517#endif
721aed79
EI
518#ifdef CONFIG_PHY_TI
519 phy_ti_init();
520#endif
9082eeac
AF
521#ifdef CONFIG_PHY_VITESSE
522 phy_vitesse_init();
523#endif
ed6fad3e
SDPP
524#ifdef CONFIG_PHY_XILINX
525 phy_xilinx_init();
526#endif
a5fd13ad
JH
527#ifdef CONFIG_PHY_MSCC
528 phy_mscc_init();
529#endif
db40c1aa
HS
530#ifdef CONFIG_PHY_FIXED
531 phy_fixed_init();
532#endif
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533 return 0;
534}
535
536int phy_register(struct phy_driver *drv)
537{
538 INIT_LIST_HEAD(&drv->list);
539 list_add_tail(&drv->list, &phy_drivers);
540
abbfcbe5
MS
541#ifdef CONFIG_NEEDS_MANUAL_RELOC
542 if (drv->probe)
543 drv->probe += gd->reloc_off;
544 if (drv->config)
545 drv->config += gd->reloc_off;
546 if (drv->startup)
547 drv->startup += gd->reloc_off;
548 if (drv->shutdown)
549 drv->shutdown += gd->reloc_off;
550 if (drv->readext)
551 drv->readext += gd->reloc_off;
552 if (drv->writeext)
553 drv->writeext += gd->reloc_off;
554#endif
5f184715
AF
555 return 0;
556}
557
b18acb0a
AB
558int phy_set_supported(struct phy_device *phydev, u32 max_speed)
559{
560 /* The default values for phydev->supported are provided by the PHY
561 * driver "features" member, we want to reset to sane defaults first
562 * before supporting higher speeds.
563 */
564 phydev->supported &= PHY_DEFAULT_FEATURES;
565
566 switch (max_speed) {
567 default:
568 return -ENOTSUPP;
569 case SPEED_1000:
570 phydev->supported |= PHY_1000BT_FEATURES;
571 /* fall through */
572 case SPEED_100:
573 phydev->supported |= PHY_100BT_FEATURES;
574 /* fall through */
575 case SPEED_10:
576 phydev->supported |= PHY_10BT_FEATURES;
577 }
578
579 return 0;
580}
581
960d70c6 582static int phy_probe(struct phy_device *phydev)
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AF
583{
584 int err = 0;
585
8d631203
MS
586 phydev->advertising = phydev->drv->features;
587 phydev->supported = phydev->drv->features;
588
5f184715
AF
589 phydev->mmds = phydev->drv->mmds;
590
591 if (phydev->drv->probe)
592 err = phydev->drv->probe(phydev);
593
594 return err;
595}
596
597static struct phy_driver *generic_for_interface(phy_interface_t interface)
598{
599#ifdef CONFIG_PHYLIB_10G
600 if (is_10g_interface(interface))
601 return &gen10g_driver;
602#endif
603
604 return &genphy_driver;
605}
606
960d70c6 607static struct phy_driver *get_phy_driver(struct phy_device *phydev,
8d631203 608 phy_interface_t interface)
5f184715
AF
609{
610 struct list_head *entry;
611 int phy_id = phydev->phy_id;
612 struct phy_driver *drv = NULL;
613
614 list_for_each(entry, &phy_drivers) {
615 drv = list_entry(entry, struct phy_driver, list);
616 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
617 return drv;
618 }
619
620 /* If we made it here, there's no driver for this PHY */
621 return generic_for_interface(interface);
622}
623
960d70c6 624static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
2c171a2a 625 u32 phy_id,
960d70c6 626 phy_interface_t interface)
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AF
627{
628 struct phy_device *dev;
629
8d631203
MS
630 /*
631 * We allocate the device, and initialize the
632 * default values
633 */
5f184715
AF
634 dev = malloc(sizeof(*dev));
635 if (!dev) {
636 printf("Failed to allocate PHY device for %s:%d\n",
8d631203 637 bus->name, addr);
5f184715
AF
638 return NULL;
639 }
640
641 memset(dev, 0, sizeof(*dev));
642
643 dev->duplex = -1;
26d3acda 644 dev->link = 0;
5f184715
AF
645 dev->interface = interface;
646
647 dev->autoneg = AUTONEG_ENABLE;
648
649 dev->addr = addr;
650 dev->phy_id = phy_id;
651 dev->bus = bus;
652
653 dev->drv = get_phy_driver(dev, interface);
654
655 phy_probe(dev);
656
657 bus->phymap[addr] = dev;
658
659 return dev;
660}
661
662/**
663 * get_phy_id - reads the specified addr for its ID.
664 * @bus: the target MII bus
665 * @addr: PHY address on the MII bus
666 * @phy_id: where to store the ID retrieved.
667 *
668 * Description: Reads the ID registers of the PHY at @addr on the
669 * @bus, stores it in @phy_id and returns zero on success.
670 */
5707d5ff 671int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
5f184715
AF
672{
673 int phy_reg;
674
8d631203
MS
675 /*
676 * Grab the bits from PHYIR1, and put them
677 * in the upper half
678 */
5f184715
AF
679 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
680
681 if (phy_reg < 0)
682 return -EIO;
683
684 *phy_id = (phy_reg & 0xffff) << 16;
685
686 /* Grab the bits from PHYIR2, and put them in the lower half */
687 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
688
689 if (phy_reg < 0)
690 return -EIO;
691
692 *phy_id |= (phy_reg & 0xffff);
693
694 return 0;
695}
696
1adb406b 697static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
8d631203
MS
698 uint phy_mask, int devad,
699 phy_interface_t interface)
1adb406b
TK
700{
701 u32 phy_id = 0xffffffff;
8d631203 702
1adb406b
TK
703 while (phy_mask) {
704 int addr = ffs(phy_mask) - 1;
705 int r = get_phy_id(bus, addr, devad, &phy_id);
1adb406b 706 /* If the PHY ID is mostly f's, we didn't find anything */
08be2836 707 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
1adb406b
TK
708 return phy_device_create(bus, addr, phy_id, interface);
709 phy_mask &= ~(1 << addr);
710 }
711 return NULL;
712}
713
714static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
8d631203
MS
715 uint phy_mask,
716 phy_interface_t interface)
1adb406b
TK
717{
718 /* If we have one, return the existing device, with new interface */
719 while (phy_mask) {
720 int addr = ffs(phy_mask) - 1;
8d631203 721
1adb406b
TK
722 if (bus->phymap[addr]) {
723 bus->phymap[addr]->interface = interface;
724 return bus->phymap[addr];
725 }
726 phy_mask &= ~(1 << addr);
727 }
728 return NULL;
729}
730
731static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
8d631203
MS
732 uint phy_mask,
733 phy_interface_t interface)
1adb406b
TK
734{
735 int i;
736 struct phy_device *phydev;
737
738 phydev = search_for_existing_phy(bus, phy_mask, interface);
739 if (phydev)
740 return phydev;
741 /* Try Standard (ie Clause 22) access */
742 /* Otherwise we have to try Clause 45 */
743 for (i = 0; i < 5; i++) {
744 phydev = create_phy_by_mask(bus, phy_mask,
8d631203 745 i ? i : MDIO_DEVAD_NONE, interface);
1adb406b
TK
746 if (IS_ERR(phydev))
747 return NULL;
748 if (phydev)
749 return phydev;
750 }
3e1949d7
BM
751
752 debug("\n%s PHY: ", bus->name);
753 while (phy_mask) {
754 int addr = ffs(phy_mask) - 1;
8d631203 755
3e1949d7
BM
756 debug("%d ", addr);
757 phy_mask &= ~(1 << addr);
758 }
759 debug("not found\n");
0132b9ab
BM
760
761 return NULL;
1adb406b
TK
762}
763
5f184715 764/**
8d631203
MS
765 * get_phy_device - reads the specified PHY device and returns its
766 * @phy_device struct
5f184715
AF
767 * @bus: the target MII bus
768 * @addr: PHY address on the MII bus
769 *
770 * Description: Reads the ID registers of the PHY at @addr on the
771 * @bus, then allocates and returns the phy_device to represent it.
772 */
960d70c6
KP
773static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
774 phy_interface_t interface)
5f184715 775{
1adb406b 776 return get_phy_device_by_mask(bus, 1 << addr, interface);
5f184715
AF
777}
778
779int phy_reset(struct phy_device *phydev)
780{
781 int reg;
782 int timeout = 500;
783 int devad = MDIO_DEVAD_NONE;
784
ddcd1f30
SX
785 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
786 return 0;
787
5f184715
AF
788#ifdef CONFIG_PHYLIB_10G
789 /* If it's 10G, we need to issue reset through one of the MMDs */
790 if (is_10g_interface(phydev->interface)) {
791 if (!phydev->mmds)
792 gen10g_discover_mmds(phydev);
793
794 devad = ffs(phydev->mmds) - 1;
795 }
796#endif
797
a058052c 798 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
5f184715
AF
799 debug("PHY reset failed\n");
800 return -1;
801 }
802
803#ifdef CONFIG_PHY_RESET_DELAY
804 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
805#endif
806 /*
807 * Poll the control register for the reset bit to go to 0 (it is
808 * auto-clearing). This should happen within 0.5 seconds per the
809 * IEEE spec.
810 */
a058052c 811 reg = phy_read(phydev, devad, MII_BMCR);
5f184715
AF
812 while ((reg & BMCR_RESET) && timeout--) {
813 reg = phy_read(phydev, devad, MII_BMCR);
814
815 if (reg < 0) {
816 debug("PHY status read failed\n");
817 return -1;
818 }
819 udelay(1000);
820 }
821
822 if (reg & BMCR_RESET) {
823 puts("PHY reset timed out\n");
824 return -1;
825 }
826
827 return 0;
828}
829
830int miiphy_reset(const char *devname, unsigned char addr)
831{
832 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
833 struct phy_device *phydev;
834
835 /*
836 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
837 * If later code tries to connect with the right interface, this will
838 * be corrected by get_phy_device in phy_connect()
839 */
840 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
841
842 return phy_reset(phydev);
843}
844
8d631203
MS
845struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
846 phy_interface_t interface)
5f184715 847{
5f184715 848 /* Reset the bus */
59370f3f 849 if (bus->reset) {
e3a77218 850 bus->reset(bus);
5f184715 851
59370f3f 852 /* Wait 15ms to make sure the PHY has come out of hard reset */
8d631203 853 mdelay(15);
59370f3f
JK
854 }
855
1adb406b
TK
856 return get_phy_device_by_mask(bus, phy_mask, interface);
857}
5f184715 858
c74c8e66
SG
859#ifdef CONFIG_DM_ETH
860void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
861#else
1adb406b 862void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
c74c8e66 863#endif
1adb406b 864{
5f184715
AF
865 /* Soft Reset the PHY */
866 phy_reset(phydev);
17ecfa9b 867 if (phydev->dev && phydev->dev != dev) {
5f184715 868 printf("%s:%d is connected to %s. Reconnecting to %s\n",
8d631203
MS
869 phydev->bus->name, phydev->addr,
870 phydev->dev->name, dev->name);
1adb406b 871 }
5f184715 872 phydev->dev = dev;
b91a9d9d 873 debug("%s connected to %s\n", dev->name, phydev->drv->name);
1adb406b
TK
874}
875
c74c8e66
SG
876#ifdef CONFIG_DM_ETH
877struct phy_device *phy_connect(struct mii_dev *bus, int addr,
8d631203
MS
878 struct udevice *dev,
879 phy_interface_t interface)
c74c8e66 880#else
1adb406b 881struct phy_device *phy_connect(struct mii_dev *bus, int addr,
8d631203
MS
882 struct eth_device *dev,
883 phy_interface_t interface)
c74c8e66 884#endif
1adb406b 885{
db40c1aa
HS
886 struct phy_device *phydev = NULL;
887#ifdef CONFIG_PHY_FIXED
888 int sn;
889 const char *name;
8d631203 890
da409ccc 891 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
db40c1aa
HS
892 while (sn > 0) {
893 name = fdt_get_name(gd->fdt_blob, sn, NULL);
8d631203 894 if (name && strcmp(name, "fixed-link") == 0) {
db40c1aa
HS
895 phydev = phy_device_create(bus,
896 sn, PHY_FIXED_ID, interface);
897 break;
898 }
899 sn = fdt_next_subnode(gd->fdt_blob, sn);
900 }
901#endif
8d631203 902 if (!phydev)
db40c1aa 903 phydev = phy_find_by_mask(bus, 1 << addr, interface);
5f184715 904
1adb406b
TK
905 if (phydev)
906 phy_connect_dev(phydev, dev);
907 else
908 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
5f184715
AF
909 return phydev;
910}
911
6e5b9ac0
TT
912/*
913 * Start the PHY. Returns 0 on success, or a negative error code.
914 */
5f184715
AF
915int phy_startup(struct phy_device *phydev)
916{
917 if (phydev->drv->startup)
6e5b9ac0 918 return phydev->drv->startup(phydev);
5f184715
AF
919
920 return 0;
921}
922
3c6928fd 923__weak int board_phy_config(struct phy_device *phydev)
5f184715 924{
9fafe7da
TK
925 if (phydev->drv->config)
926 return phydev->drv->config(phydev);
5f184715
AF
927 return 0;
928}
929
5f184715
AF
930int phy_config(struct phy_device *phydev)
931{
5f184715 932 /* Invoke an optional board-specific helper */
7a673f0b 933 return board_phy_config(phydev);
5f184715
AF
934}
935
936int phy_shutdown(struct phy_device *phydev)
937{
938 if (phydev->drv->shutdown)
939 phydev->drv->shutdown(phydev);
940
941 return 0;
942}
c74c8e66
SG
943
944int phy_get_interface_by_name(const char *str)
945{
946 int i;
947
948 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
949 if (!strcmp(str, phy_interface_strings[i]))
950 return i;
951 }
952
953 return -1;
954}