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b55d98c6 TT |
1 | /* |
2 | * Vitesse 7385 Switch Firmware Upload | |
3 | * | |
4 | * Author: Timur Tabi <timur@freescale.com> | |
5 | * | |
6 | * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed | |
7 | * under the terms of the GNU General Public License version 2. This | |
8 | * program is licensed "as is" without any warranty of any kind, whether | |
9 | * express or implied. | |
10 | * | |
11 | * This module uploads proprietary firmware for the Vitesse VSC7385 5-port | |
12 | * switch. | |
13 | */ | |
14 | ||
15 | #include <config.h> | |
b55d98c6 TT |
16 | #include <common.h> |
17 | #include <asm/io.h> | |
18 | #include <asm/errno.h> | |
19 | ||
20 | /* | |
21 | * Upload a Vitesse VSC7385 firmware image to the hardware | |
22 | * | |
23 | * This function takes a pointer to a VSC7385 firmware image and a size, and | |
24 | * uploads that firmware to the VSC7385. | |
25 | * | |
26 | * This firmware is typically located at a board-specific flash address, | |
27 | * and the size is typically 8KB. | |
28 | * | |
29 | * The firmware is Vitesse proprietary. | |
30 | * | |
31 | * Further details on the register information can be obtained from Vitesse. | |
32 | */ | |
33 | int vsc7385_upload_firmware(void *firmware, unsigned int size) | |
34 | { | |
35 | u8 *fw = firmware; | |
36 | unsigned int i; | |
37 | ||
6d0f6bcf JCPV |
38 | u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050); |
39 | u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040); | |
40 | u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044); | |
41 | u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048); | |
42 | u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070); | |
b55d98c6 | 43 | #ifdef DEBUG |
6d0f6bcf | 44 | u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060); |
b55d98c6 TT |
45 | #endif |
46 | ||
47 | out_be32(gloreset, 3); | |
48 | udelay(200); | |
49 | ||
50 | out_be32(icpu_ctrl, 0x8E); | |
51 | udelay(20); | |
52 | ||
53 | out_be32(icpu_rom_map, 1); | |
54 | udelay(20); | |
55 | ||
438a4c11 | 56 | /* Write the firmware to I-RAM */ |
b55d98c6 TT |
57 | out_be32(icpu_addr, 0); |
58 | udelay(20); | |
59 | ||
60 | for (i = 0; i < size; i++) { | |
61 | out_be32(icpu_data, fw[i]); | |
62 | udelay(20); | |
63 | if (ctrlc()) | |
64 | return -EINTR; | |
65 | } | |
66 | ||
67 | /* Read back and compare */ | |
68 | out_be32(icpu_addr, 0); | |
69 | udelay(20); | |
70 | ||
71 | for (i = 0; i < size; i++) { | |
72 | u8 value; | |
73 | ||
74 | value = (u8) in_be32(icpu_data); | |
75 | udelay(20); | |
76 | if (value != fw[i]) { | |
77 | debug("VSC7385: Upload mismatch: address 0x%x, " | |
438a4c11 WD |
78 | "read value 0x%x, image value 0x%x\n", |
79 | i, value, fw[i]); | |
b55d98c6 TT |
80 | |
81 | return -EIO; | |
82 | } | |
83 | if (ctrlc()) | |
84 | break; | |
85 | } | |
86 | ||
87 | out_be32(icpu_ctrl, 0x0B); | |
88 | udelay(20); | |
89 | ||
90 | #ifdef DEBUG | |
91 | printf("VSC7385: Chip ID is %08x\n", in_be32(chipid)); | |
92 | udelay(20); | |
93 | #endif | |
94 | ||
95 | return 0; | |
96 | } |