]>
Commit | Line | Data |
---|---|---|
5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
d7579d12 | 31 | #include "wmi-ops.h" |
5e3dd157 KV |
32 | |
33 | unsigned int ath10k_debug_mask; | |
34 | static bool uart_print; | |
8868b12c RM |
35 | static bool skip_otp; |
36 | ||
5e3dd157 KV |
37 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
38 | module_param(uart_print, bool, 0644); | |
8868b12c RM |
39 | module_param(skip_otp, bool, 0644); |
40 | ||
5e3dd157 KV |
41 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
42 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
8868b12c | 43 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
44 | |
45 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
46 | { |
47 | .id = QCA988X_HW_2_0_VERSION, | |
48 | .name = "qca988x hw2.0", | |
49 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 50 | .uart_pin = 7, |
587f7031 | 51 | .has_shifted_cc_wraparound = true, |
5e3dd157 KV |
52 | .fw = { |
53 | .dir = QCA988X_HW_2_0_FW_DIR, | |
54 | .fw = QCA988X_HW_2_0_FW_FILE, | |
55 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
56 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
57 | .board_size = QCA988X_BOARD_DATA_SZ, |
58 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
59 | }, |
60 | }, | |
d63955b3 MK |
61 | { |
62 | .id = QCA6174_HW_2_1_VERSION, | |
63 | .name = "qca6174 hw2.1", | |
64 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
65 | .uart_pin = 6, | |
66 | .fw = { | |
67 | .dir = QCA6174_HW_2_1_FW_DIR, | |
68 | .fw = QCA6174_HW_2_1_FW_FILE, | |
69 | .otp = QCA6174_HW_2_1_OTP_FILE, | |
70 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, | |
71 | .board_size = QCA6174_BOARD_DATA_SZ, | |
72 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
73 | }, | |
74 | }, | |
75 | { | |
76 | .id = QCA6174_HW_3_0_VERSION, | |
77 | .name = "qca6174 hw3.0", | |
78 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
79 | .uart_pin = 6, | |
80 | .fw = { | |
81 | .dir = QCA6174_HW_3_0_FW_DIR, | |
82 | .fw = QCA6174_HW_3_0_FW_FILE, | |
83 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
84 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
85 | .board_size = QCA6174_BOARD_DATA_SZ, | |
86 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
87 | }, | |
88 | }, | |
608b8f73 MK |
89 | { |
90 | .id = QCA6174_HW_3_2_VERSION, | |
91 | .name = "qca6174 hw3.2", | |
92 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
93 | .uart_pin = 6, | |
94 | .fw = { | |
95 | /* uses same binaries as hw3.0 */ | |
96 | .dir = QCA6174_HW_3_0_FW_DIR, | |
97 | .fw = QCA6174_HW_3_0_FW_FILE, | |
98 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
99 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
100 | .board_size = QCA6174_BOARD_DATA_SZ, | |
101 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
102 | }, | |
103 | }, | |
8bd47021 VT |
104 | { |
105 | .id = QCA99X0_HW_2_0_DEV_VERSION, | |
106 | .name = "qca99x0 hw2.0", | |
107 | .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, | |
108 | .uart_pin = 7, | |
109 | .fw = { | |
110 | .dir = QCA99X0_HW_2_0_FW_DIR, | |
111 | .fw = QCA99X0_HW_2_0_FW_FILE, | |
112 | .otp = QCA99X0_HW_2_0_OTP_FILE, | |
113 | .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, | |
114 | .board_size = QCA99X0_BOARD_DATA_SZ, | |
115 | .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, | |
116 | }, | |
117 | }, | |
5e3dd157 KV |
118 | }; |
119 | ||
b27bc5a4 MK |
120 | static const char *const ath10k_core_fw_feature_str[] = { |
121 | [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", | |
122 | [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", | |
123 | [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", | |
124 | [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", | |
125 | [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", | |
126 | [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", | |
127 | [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", | |
128 | [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", | |
129 | [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", | |
130 | [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", | |
131 | }; | |
132 | ||
133 | static unsigned int ath10k_core_get_fw_feature_str(char *buf, | |
134 | size_t buf_len, | |
135 | enum ath10k_fw_features feat) | |
136 | { | |
137 | if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || | |
138 | WARN_ON(!ath10k_core_fw_feature_str[feat])) { | |
139 | return scnprintf(buf, buf_len, "bit%d", feat); | |
140 | } | |
141 | ||
142 | return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); | |
143 | } | |
144 | ||
145 | void ath10k_core_get_fw_features_str(struct ath10k *ar, | |
146 | char *buf, | |
147 | size_t buf_len) | |
148 | { | |
149 | unsigned int len = 0; | |
150 | int i; | |
151 | ||
152 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
153 | if (test_bit(i, ar->fw_features)) { | |
154 | if (len > 0) | |
155 | len += scnprintf(buf + len, buf_len - len, ","); | |
156 | ||
157 | len += ath10k_core_get_fw_feature_str(buf + len, | |
158 | buf_len - len, | |
159 | i); | |
160 | } | |
161 | } | |
162 | } | |
163 | ||
5e3dd157 KV |
164 | static void ath10k_send_suspend_complete(struct ath10k *ar) |
165 | { | |
7aa7a72a | 166 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 167 | |
9042e17d | 168 | complete(&ar->target_suspend); |
5e3dd157 KV |
169 | } |
170 | ||
5e3dd157 KV |
171 | static int ath10k_init_configure_target(struct ath10k *ar) |
172 | { | |
173 | u32 param_host; | |
174 | int ret; | |
175 | ||
176 | /* tell target which HTC version it is used*/ | |
177 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
178 | HTC_PROTOCOL_VERSION); | |
179 | if (ret) { | |
7aa7a72a | 180 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
181 | return ret; |
182 | } | |
183 | ||
184 | /* set the firmware mode to STA/IBSS/AP */ | |
185 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
186 | if (ret) { | |
7aa7a72a | 187 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
188 | return ret; |
189 | } | |
190 | ||
191 | /* TODO following parameters need to be re-visited. */ | |
192 | /* num_device */ | |
193 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
194 | /* Firmware mode */ | |
195 | /* FIXME: Why FW_MODE_AP ??.*/ | |
196 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
197 | /* mac_addr_method */ | |
198 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
199 | /* firmware_bridge */ | |
200 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
201 | /* fwsubmode */ | |
202 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
203 | ||
204 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
205 | if (ret) { | |
7aa7a72a | 206 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
207 | return ret; |
208 | } | |
209 | ||
210 | /* We do all byte-swapping on the host */ | |
211 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
212 | if (ret) { | |
7aa7a72a | 213 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
214 | return ret; |
215 | } | |
216 | ||
217 | /* FW descriptor/Data swap flags */ | |
218 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
219 | ||
220 | if (ret) { | |
7aa7a72a | 221 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
222 | return ret; |
223 | } | |
224 | ||
225 | return 0; | |
226 | } | |
227 | ||
228 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
229 | const char *dir, | |
230 | const char *file) | |
231 | { | |
232 | char filename[100]; | |
233 | const struct firmware *fw; | |
234 | int ret; | |
235 | ||
236 | if (file == NULL) | |
237 | return ERR_PTR(-ENOENT); | |
238 | ||
239 | if (dir == NULL) | |
240 | dir = "."; | |
241 | ||
242 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
243 | ret = request_firmware(&fw, filename, ar->dev); | |
244 | if (ret) | |
245 | return ERR_PTR(ret); | |
246 | ||
247 | return fw; | |
248 | } | |
249 | ||
a58227ef KV |
250 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
251 | size_t data_len) | |
5e3dd157 | 252 | { |
9764a2af MK |
253 | u32 board_data_size = ar->hw_params.fw.board_size; |
254 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
255 | u32 board_ext_data_addr; |
256 | int ret; | |
257 | ||
258 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
259 | if (ret) { | |
7aa7a72a MK |
260 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
261 | ret); | |
5e3dd157 KV |
262 | return ret; |
263 | } | |
264 | ||
7aa7a72a | 265 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 266 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
267 | board_ext_data_addr); |
268 | ||
269 | if (board_ext_data_addr == 0) | |
270 | return 0; | |
271 | ||
a58227ef | 272 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 273 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 274 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
275 | return -EINVAL; |
276 | } | |
277 | ||
278 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 279 | data + board_data_size, |
5e3dd157 KV |
280 | board_ext_data_size); |
281 | if (ret) { | |
7aa7a72a | 282 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
283 | return ret; |
284 | } | |
285 | ||
286 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
287 | (board_ext_data_size << 16) | 1); | |
288 | if (ret) { | |
7aa7a72a MK |
289 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
290 | ret); | |
5e3dd157 KV |
291 | return ret; |
292 | } | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
a58227ef KV |
297 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
298 | size_t data_len) | |
5e3dd157 | 299 | { |
9764a2af | 300 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 301 | u32 address; |
5e3dd157 KV |
302 | int ret; |
303 | ||
a58227ef | 304 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 305 | if (ret) { |
7aa7a72a | 306 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
307 | goto exit; |
308 | } | |
309 | ||
310 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
311 | if (ret) { | |
7aa7a72a | 312 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
313 | goto exit; |
314 | } | |
315 | ||
a58227ef | 316 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 317 | min_t(u32, board_data_size, |
a58227ef | 318 | data_len)); |
5e3dd157 | 319 | if (ret) { |
7aa7a72a | 320 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
321 | goto exit; |
322 | } | |
323 | ||
324 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
325 | if (ret) { | |
7aa7a72a | 326 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
327 | goto exit; |
328 | } | |
329 | ||
330 | exit: | |
5e3dd157 KV |
331 | return ret; |
332 | } | |
333 | ||
a58227ef KV |
334 | static int ath10k_download_cal_file(struct ath10k *ar) |
335 | { | |
336 | int ret; | |
337 | ||
338 | if (!ar->cal_file) | |
339 | return -ENOENT; | |
340 | ||
341 | if (IS_ERR(ar->cal_file)) | |
342 | return PTR_ERR(ar->cal_file); | |
343 | ||
344 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
345 | ar->cal_file->size); | |
346 | if (ret) { | |
347 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
348 | return ret; | |
349 | } | |
350 | ||
351 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
5aabff05 TK |
356 | static int ath10k_download_cal_dt(struct ath10k *ar) |
357 | { | |
358 | struct device_node *node; | |
359 | int data_len; | |
360 | void *data; | |
361 | int ret; | |
362 | ||
363 | node = ar->dev->of_node; | |
364 | if (!node) | |
365 | /* Device Tree is optional, don't print any warnings if | |
366 | * there's no node for ath10k. | |
367 | */ | |
368 | return -ENOENT; | |
369 | ||
370 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
371 | &data_len)) { | |
372 | /* The calibration data node is optional */ | |
373 | return -ENOENT; | |
374 | } | |
375 | ||
376 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
377 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
378 | data_len); | |
379 | ret = -EMSGSIZE; | |
380 | goto out; | |
381 | } | |
382 | ||
383 | data = kmalloc(data_len, GFP_KERNEL); | |
384 | if (!data) { | |
385 | ret = -ENOMEM; | |
386 | goto out; | |
387 | } | |
388 | ||
389 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
390 | data, data_len); | |
391 | if (ret) { | |
392 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
393 | ret); | |
394 | goto out_free; | |
395 | } | |
396 | ||
397 | ret = ath10k_download_board_data(ar, data, data_len); | |
398 | if (ret) { | |
399 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
400 | ret); | |
401 | goto out_free; | |
402 | } | |
403 | ||
404 | ret = 0; | |
405 | ||
406 | out_free: | |
407 | kfree(data); | |
408 | ||
409 | out: | |
410 | return ret; | |
411 | } | |
412 | ||
5e3dd157 KV |
413 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
414 | { | |
d6d4a58d | 415 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
416 | int ret; |
417 | ||
a58227ef | 418 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
419 | if (ret) { |
420 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
421 | return ret; | |
422 | } | |
423 | ||
5e3dd157 KV |
424 | /* OTP is optional */ |
425 | ||
7f06ea1e | 426 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 427 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 428 | ar->otp_data, ar->otp_len); |
5e3dd157 | 429 | return 0; |
7f06ea1e KV |
430 | } |
431 | ||
7aa7a72a | 432 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 433 | address, ar->otp_len); |
5e3dd157 | 434 | |
958df3a0 | 435 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 436 | if (ret) { |
7aa7a72a | 437 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 438 | return ret; |
5e3dd157 KV |
439 | } |
440 | ||
d6d4a58d | 441 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 442 | if (ret) { |
7aa7a72a | 443 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 444 | return ret; |
5e3dd157 KV |
445 | } |
446 | ||
7aa7a72a | 447 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 448 | |
d9153546 KV |
449 | if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, |
450 | ar->fw_features)) | |
451 | && result != 0) { | |
7aa7a72a | 452 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
453 | return -EINVAL; |
454 | } | |
455 | ||
456 | return 0; | |
5e3dd157 KV |
457 | } |
458 | ||
43d2a30f | 459 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 460 | { |
43d2a30f KV |
461 | u32 address, data_len; |
462 | const char *mode_name; | |
463 | const void *data; | |
5e3dd157 KV |
464 | int ret; |
465 | ||
5e3dd157 KV |
466 | address = ar->hw_params.patch_load_addr; |
467 | ||
43d2a30f KV |
468 | switch (mode) { |
469 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
470 | data = ar->firmware_data; | |
471 | data_len = ar->firmware_len; | |
472 | mode_name = "normal"; | |
dcb02db1 VT |
473 | ret = ath10k_swap_code_seg_configure(ar, |
474 | ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW); | |
475 | if (ret) { | |
476 | ath10k_err(ar, "failed to configure fw code swap: %d\n", | |
477 | ret); | |
478 | return ret; | |
479 | } | |
43d2a30f KV |
480 | break; |
481 | case ATH10K_FIRMWARE_MODE_UTF: | |
482 | data = ar->testmode.utf->data; | |
483 | data_len = ar->testmode.utf->size; | |
484 | mode_name = "utf"; | |
485 | break; | |
486 | default: | |
487 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
488 | return -EINVAL; | |
489 | } | |
490 | ||
491 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
492 | "boot uploading firmware image %p len %d mode %s\n", | |
493 | data, data_len, mode_name); | |
494 | ||
495 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 496 | if (ret) { |
43d2a30f KV |
497 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
498 | mode_name, ret); | |
499 | return ret; | |
5e3dd157 KV |
500 | } |
501 | ||
29385057 MK |
502 | return ret; |
503 | } | |
504 | ||
505 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
506 | { | |
db2cf865 | 507 | if (!IS_ERR(ar->board)) |
36527916 | 508 | release_firmware(ar->board); |
29385057 | 509 | |
db2cf865 | 510 | if (!IS_ERR(ar->otp)) |
29385057 MK |
511 | release_firmware(ar->otp); |
512 | ||
db2cf865 | 513 | if (!IS_ERR(ar->firmware)) |
29385057 MK |
514 | release_firmware(ar->firmware); |
515 | ||
db2cf865 | 516 | if (!IS_ERR(ar->cal_file)) |
a58227ef KV |
517 | release_firmware(ar->cal_file); |
518 | ||
dcb02db1 VT |
519 | ath10k_swap_code_seg_release(ar); |
520 | ||
36527916 | 521 | ar->board = NULL; |
958df3a0 KV |
522 | ar->board_data = NULL; |
523 | ar->board_len = 0; | |
524 | ||
29385057 | 525 | ar->otp = NULL; |
958df3a0 KV |
526 | ar->otp_data = NULL; |
527 | ar->otp_len = 0; | |
528 | ||
29385057 | 529 | ar->firmware = NULL; |
958df3a0 KV |
530 | ar->firmware_data = NULL; |
531 | ar->firmware_len = 0; | |
a58227ef KV |
532 | |
533 | ar->cal_file = NULL; | |
dcb02db1 | 534 | |
a58227ef KV |
535 | } |
536 | ||
537 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
538 | { | |
539 | char filename[100]; | |
540 | ||
541 | /* cal-<bus>-<id>.bin */ | |
542 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
543 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
544 | ||
545 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
546 | if (IS_ERR(ar->cal_file)) | |
547 | /* calibration file is optional, don't print any warnings */ | |
548 | return PTR_ERR(ar->cal_file); | |
549 | ||
550 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
551 | ATH10K_FW_DIR, filename); | |
552 | ||
553 | return 0; | |
29385057 MK |
554 | } |
555 | ||
de57e2c8 | 556 | static int ath10k_core_fetch_spec_board_file(struct ath10k *ar) |
29385057 | 557 | { |
de57e2c8 MK |
558 | char filename[100]; |
559 | ||
560 | scnprintf(filename, sizeof(filename), "board-%s-%s.bin", | |
561 | ath10k_bus_str(ar->hif.bus), ar->spec_board_id); | |
562 | ||
563 | ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename); | |
564 | if (IS_ERR(ar->board)) | |
565 | return PTR_ERR(ar->board); | |
566 | ||
567 | ar->board_data = ar->board->data; | |
568 | ar->board_len = ar->board->size; | |
569 | ar->spec_board_loaded = true; | |
29385057 | 570 | |
de57e2c8 MK |
571 | return 0; |
572 | } | |
573 | ||
574 | static int ath10k_core_fetch_generic_board_file(struct ath10k *ar) | |
575 | { | |
d0ed74f3 MK |
576 | if (!ar->hw_params.fw.board) { |
577 | ath10k_err(ar, "failed to find board file fw entry\n"); | |
29385057 MK |
578 | return -EINVAL; |
579 | } | |
580 | ||
36527916 KV |
581 | ar->board = ath10k_fetch_fw_file(ar, |
582 | ar->hw_params.fw.dir, | |
583 | ar->hw_params.fw.board); | |
de57e2c8 MK |
584 | if (IS_ERR(ar->board)) |
585 | return PTR_ERR(ar->board); | |
29385057 | 586 | |
958df3a0 KV |
587 | ar->board_data = ar->board->data; |
588 | ar->board_len = ar->board->size; | |
de57e2c8 MK |
589 | ar->spec_board_loaded = false; |
590 | ||
591 | return 0; | |
592 | } | |
593 | ||
594 | static int ath10k_core_fetch_board_file(struct ath10k *ar) | |
595 | { | |
596 | int ret; | |
597 | ||
598 | if (strlen(ar->spec_board_id) > 0) { | |
599 | ret = ath10k_core_fetch_spec_board_file(ar); | |
600 | if (ret) { | |
601 | ath10k_info(ar, "failed to load spec board file, falling back to generic: %d\n", | |
602 | ret); | |
603 | goto generic; | |
604 | } | |
605 | ||
606 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found specific board file for %s\n", | |
607 | ar->spec_board_id); | |
608 | return 0; | |
609 | } | |
610 | ||
611 | generic: | |
612 | ret = ath10k_core_fetch_generic_board_file(ar); | |
613 | if (ret) { | |
614 | ath10k_err(ar, "failed to fetch generic board data: %d\n", ret); | |
615 | return ret; | |
616 | } | |
958df3a0 | 617 | |
d0ed74f3 MK |
618 | return 0; |
619 | } | |
620 | ||
621 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) | |
622 | { | |
623 | int ret = 0; | |
624 | ||
625 | if (ar->hw_params.fw.fw == NULL) { | |
626 | ath10k_err(ar, "firmware file not defined\n"); | |
627 | return -EINVAL; | |
628 | } | |
629 | ||
29385057 MK |
630 | ar->firmware = ath10k_fetch_fw_file(ar, |
631 | ar->hw_params.fw.dir, | |
632 | ar->hw_params.fw.fw); | |
633 | if (IS_ERR(ar->firmware)) { | |
634 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 635 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
636 | goto err; |
637 | } | |
638 | ||
958df3a0 KV |
639 | ar->firmware_data = ar->firmware->data; |
640 | ar->firmware_len = ar->firmware->size; | |
641 | ||
29385057 MK |
642 | /* OTP may be undefined. If so, don't fetch it at all */ |
643 | if (ar->hw_params.fw.otp == NULL) | |
644 | return 0; | |
645 | ||
646 | ar->otp = ath10k_fetch_fw_file(ar, | |
647 | ar->hw_params.fw.dir, | |
648 | ar->hw_params.fw.otp); | |
649 | if (IS_ERR(ar->otp)) { | |
650 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 651 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
652 | goto err; |
653 | } | |
654 | ||
958df3a0 KV |
655 | ar->otp_data = ar->otp->data; |
656 | ar->otp_len = ar->otp->size; | |
657 | ||
29385057 MK |
658 | return 0; |
659 | ||
660 | err: | |
661 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
662 | return ret; |
663 | } | |
664 | ||
1a222435 KV |
665 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
666 | { | |
667 | size_t magic_len, len, ie_len; | |
668 | int ie_id, i, index, bit, ret; | |
669 | struct ath10k_fw_ie *hdr; | |
670 | const u8 *data; | |
202e86e6 | 671 | __le32 *timestamp, *version; |
1a222435 KV |
672 | |
673 | /* first fetch the firmware file (firmware-*.bin) */ | |
674 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
675 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 676 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 677 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
678 | return PTR_ERR(ar->firmware); |
679 | } | |
680 | ||
681 | data = ar->firmware->data; | |
682 | len = ar->firmware->size; | |
683 | ||
684 | /* magic also includes the null byte, check that as well */ | |
685 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
686 | ||
687 | if (len < magic_len) { | |
7aa7a72a | 688 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 689 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
690 | ret = -EINVAL; |
691 | goto err; | |
1a222435 KV |
692 | } |
693 | ||
694 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 695 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
696 | ret = -EINVAL; |
697 | goto err; | |
1a222435 KV |
698 | } |
699 | ||
700 | /* jump over the padding */ | |
701 | magic_len = ALIGN(magic_len, 4); | |
702 | ||
703 | len -= magic_len; | |
704 | data += magic_len; | |
705 | ||
706 | /* loop elements */ | |
707 | while (len > sizeof(struct ath10k_fw_ie)) { | |
708 | hdr = (struct ath10k_fw_ie *)data; | |
709 | ||
710 | ie_id = le32_to_cpu(hdr->id); | |
711 | ie_len = le32_to_cpu(hdr->len); | |
712 | ||
713 | len -= sizeof(*hdr); | |
714 | data += sizeof(*hdr); | |
715 | ||
716 | if (len < ie_len) { | |
7aa7a72a | 717 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 718 | ie_id, len, ie_len); |
9bab1cc0 MK |
719 | ret = -EINVAL; |
720 | goto err; | |
1a222435 KV |
721 | } |
722 | ||
723 | switch (ie_id) { | |
724 | case ATH10K_FW_IE_FW_VERSION: | |
725 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
726 | break; | |
727 | ||
728 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
729 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
730 | ||
7aa7a72a | 731 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
732 | "found fw version %s\n", |
733 | ar->hw->wiphy->fw_version); | |
734 | break; | |
735 | case ATH10K_FW_IE_TIMESTAMP: | |
736 | if (ie_len != sizeof(u32)) | |
737 | break; | |
738 | ||
739 | timestamp = (__le32 *)data; | |
740 | ||
7aa7a72a | 741 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
742 | le32_to_cpup(timestamp)); |
743 | break; | |
744 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 745 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
746 | "found firmware features ie (%zd B)\n", |
747 | ie_len); | |
748 | ||
749 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
750 | index = i / 8; | |
751 | bit = i % 8; | |
752 | ||
753 | if (index == ie_len) | |
754 | break; | |
755 | ||
f591a1a5 | 756 | if (data[index] & (1 << bit)) { |
7aa7a72a | 757 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
758 | "Enabling feature bit: %i\n", |
759 | i); | |
1a222435 | 760 | __set_bit(i, ar->fw_features); |
f591a1a5 | 761 | } |
1a222435 KV |
762 | } |
763 | ||
7aa7a72a | 764 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
765 | ar->fw_features, |
766 | sizeof(ar->fw_features)); | |
767 | break; | |
768 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 769 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
770 | "found fw image ie (%zd B)\n", |
771 | ie_len); | |
772 | ||
773 | ar->firmware_data = data; | |
774 | ar->firmware_len = ie_len; | |
775 | ||
776 | break; | |
777 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 778 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
779 | "found otp image ie (%zd B)\n", |
780 | ie_len); | |
781 | ||
782 | ar->otp_data = data; | |
783 | ar->otp_len = ie_len; | |
784 | ||
785 | break; | |
202e86e6 KV |
786 | case ATH10K_FW_IE_WMI_OP_VERSION: |
787 | if (ie_len != sizeof(u32)) | |
788 | break; | |
789 | ||
790 | version = (__le32 *)data; | |
791 | ||
792 | ar->wmi.op_version = le32_to_cpup(version); | |
793 | ||
794 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
795 | ar->wmi.op_version); | |
796 | break; | |
8348db29 RM |
797 | case ATH10K_FW_IE_HTT_OP_VERSION: |
798 | if (ie_len != sizeof(u32)) | |
799 | break; | |
800 | ||
801 | version = (__le32 *)data; | |
802 | ||
803 | ar->htt.op_version = le32_to_cpup(version); | |
804 | ||
805 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", | |
806 | ar->htt.op_version); | |
807 | break; | |
dcb02db1 VT |
808 | case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: |
809 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
810 | "found fw code swap image ie (%zd B)\n", | |
811 | ie_len); | |
812 | ar->swap.firmware_codeswap_data = data; | |
813 | ar->swap.firmware_codeswap_len = ie_len; | |
814 | break; | |
1a222435 | 815 | default: |
7aa7a72a | 816 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
817 | le32_to_cpu(hdr->id)); |
818 | break; | |
819 | } | |
820 | ||
821 | /* jump over the padding */ | |
822 | ie_len = ALIGN(ie_len, 4); | |
823 | ||
824 | len -= ie_len; | |
825 | data += ie_len; | |
e05634ee | 826 | } |
1a222435 KV |
827 | |
828 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 829 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 830 | ar->hw_params.fw.dir, name); |
1a222435 KV |
831 | ret = -ENOMEDIUM; |
832 | goto err; | |
833 | } | |
834 | ||
1a222435 KV |
835 | return 0; |
836 | ||
837 | err: | |
838 | ath10k_core_free_firmware_files(ar); | |
839 | return ret; | |
840 | } | |
841 | ||
842 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
843 | { | |
844 | int ret; | |
845 | ||
a58227ef KV |
846 | /* calibration file is optional, don't check for any errors */ |
847 | ath10k_fetch_cal_file(ar); | |
848 | ||
d0ed74f3 MK |
849 | ret = ath10k_core_fetch_board_file(ar); |
850 | if (ret) { | |
851 | ath10k_err(ar, "failed to fetch board file: %d\n", ret); | |
852 | return ret; | |
853 | } | |
854 | ||
53513c30 KV |
855 | ar->fw_api = 5; |
856 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
857 | ||
858 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE); | |
859 | if (ret == 0) | |
860 | goto success; | |
861 | ||
4a16fbec RM |
862 | ar->fw_api = 4; |
863 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
864 | ||
865 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); | |
866 | if (ret == 0) | |
867 | goto success; | |
868 | ||
24c88f78 | 869 | ar->fw_api = 3; |
7aa7a72a | 870 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
871 | |
872 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
873 | if (ret == 0) | |
874 | goto success; | |
875 | ||
53c02284 | 876 | ar->fw_api = 2; |
7aa7a72a | 877 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 878 | |
1a222435 | 879 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
880 | if (ret == 0) |
881 | goto success; | |
882 | ||
883 | ar->fw_api = 1; | |
7aa7a72a | 884 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
885 | |
886 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
887 | if (ret) | |
888 | return ret; | |
889 | ||
53c02284 | 890 | success: |
7aa7a72a | 891 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
892 | |
893 | return 0; | |
894 | } | |
895 | ||
83091559 | 896 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
897 | { |
898 | int ret; | |
899 | ||
a58227ef KV |
900 | ret = ath10k_download_cal_file(ar); |
901 | if (ret == 0) { | |
902 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
903 | goto done; | |
904 | } | |
905 | ||
906 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
907 | "boot did not find a calibration file, try DT next: %d\n", |
908 | ret); | |
909 | ||
910 | ret = ath10k_download_cal_dt(ar); | |
911 | if (ret == 0) { | |
912 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
913 | goto done; | |
914 | } | |
915 | ||
916 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
917 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
918 | ret); |
919 | ||
5e3dd157 | 920 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 921 | if (ret) { |
7aa7a72a | 922 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 923 | return ret; |
36a8f413 | 924 | } |
5e3dd157 | 925 | |
a58227ef KV |
926 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
927 | ||
928 | done: | |
929 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
930 | ath10k_cal_mode_str(ar->cal_mode)); | |
931 | return 0; | |
5e3dd157 KV |
932 | } |
933 | ||
934 | static int ath10k_init_uart(struct ath10k *ar) | |
935 | { | |
936 | int ret; | |
937 | ||
938 | /* | |
939 | * Explicitly setting UART prints to zero as target turns it on | |
940 | * based on scratch registers. | |
941 | */ | |
942 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
943 | if (ret) { | |
7aa7a72a | 944 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
945 | return ret; |
946 | } | |
947 | ||
c8c39afe | 948 | if (!uart_print) |
5e3dd157 | 949 | return 0; |
5e3dd157 | 950 | |
3a8200b2 | 951 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 952 | if (ret) { |
7aa7a72a | 953 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
954 | return ret; |
955 | } | |
956 | ||
957 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
958 | if (ret) { | |
7aa7a72a | 959 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
960 | return ret; |
961 | } | |
962 | ||
03fc137b BM |
963 | /* Set the UART baud rate to 19200. */ |
964 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
965 | if (ret) { | |
7aa7a72a | 966 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
967 | return ret; |
968 | } | |
969 | ||
7aa7a72a | 970 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
971 | return 0; |
972 | } | |
973 | ||
974 | static int ath10k_init_hw_params(struct ath10k *ar) | |
975 | { | |
976 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
977 | int i; | |
978 | ||
979 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
980 | hw_params = &ath10k_hw_params_list[i]; | |
981 | ||
982 | if (hw_params->id == ar->target_version) | |
983 | break; | |
984 | } | |
985 | ||
986 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 987 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
988 | ar->target_version); |
989 | return -EINVAL; | |
990 | } | |
991 | ||
992 | ar->hw_params = *hw_params; | |
993 | ||
7aa7a72a | 994 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 995 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
996 | |
997 | return 0; | |
998 | } | |
999 | ||
affd3217 MK |
1000 | static void ath10k_core_restart(struct work_struct *work) |
1001 | { | |
1002 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
1003 | ||
7962b0d8 MK |
1004 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1005 | ||
1006 | /* Place a barrier to make sure the compiler doesn't reorder | |
1007 | * CRASH_FLUSH and calling other functions. | |
1008 | */ | |
1009 | barrier(); | |
1010 | ||
1011 | ieee80211_stop_queues(ar->hw); | |
1012 | ath10k_drain_tx(ar); | |
1013 | complete_all(&ar->scan.started); | |
1014 | complete_all(&ar->scan.completed); | |
1015 | complete_all(&ar->scan.on_channel); | |
1016 | complete_all(&ar->offchan_tx_completed); | |
1017 | complete_all(&ar->install_key_done); | |
1018 | complete_all(&ar->vdev_setup_done); | |
ac2953fc | 1019 | complete_all(&ar->thermal.wmi_sync); |
7962b0d8 MK |
1020 | wake_up(&ar->htt.empty_tx_wq); |
1021 | wake_up(&ar->wmi.tx_credits_wq); | |
1022 | wake_up(&ar->peer_mapping_wq); | |
1023 | ||
affd3217 MK |
1024 | mutex_lock(&ar->conf_mutex); |
1025 | ||
1026 | switch (ar->state) { | |
1027 | case ATH10K_STATE_ON: | |
affd3217 | 1028 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 1029 | ath10k_hif_stop(ar); |
5c81c7fd | 1030 | ath10k_scan_finish(ar); |
affd3217 MK |
1031 | ieee80211_restart_hw(ar->hw); |
1032 | break; | |
1033 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
1034 | /* this can happen if driver is being unloaded |
1035 | * or if the crash happens during FW probing */ | |
7aa7a72a | 1036 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
1037 | break; |
1038 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
1039 | /* hw restart might be requested from multiple places */ |
1040 | break; | |
affd3217 MK |
1041 | case ATH10K_STATE_RESTARTED: |
1042 | ar->state = ATH10K_STATE_WEDGED; | |
1043 | /* fall through */ | |
1044 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 1045 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 1046 | break; |
43d2a30f KV |
1047 | case ATH10K_STATE_UTF: |
1048 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
1049 | break; | |
affd3217 MK |
1050 | } |
1051 | ||
1052 | mutex_unlock(&ar->conf_mutex); | |
1053 | } | |
1054 | ||
5f2144d9 | 1055 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 1056 | { |
5f2144d9 KV |
1057 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
1058 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
1059 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); | |
1060 | return -EINVAL; | |
1061 | } | |
1062 | ||
202e86e6 KV |
1063 | if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
1064 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", | |
1065 | ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); | |
1066 | return -EINVAL; | |
1067 | } | |
1068 | ||
1069 | /* Backwards compatibility for firmwares without | |
1070 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
1071 | */ | |
1072 | if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { | |
1073 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
4a16fbec RM |
1074 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, |
1075 | ar->fw_features)) | |
202e86e6 KV |
1076 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; |
1077 | else | |
1078 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; | |
1079 | } else { | |
1080 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; | |
1081 | } | |
1082 | } | |
1083 | ||
1084 | switch (ar->wmi.op_version) { | |
1085 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
cfd1061e MK |
1086 | ar->max_num_peers = TARGET_NUM_PEERS; |
1087 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
30c78167 | 1088 | ar->max_num_vdevs = TARGET_NUM_VDEVS; |
91ad5f56 | 1089 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
6274cd41 YL |
1090 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1091 | WMI_STAT_PEER; | |
202e86e6 KV |
1092 | break; |
1093 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1094 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
4a16fbec | 1095 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
202e86e6 KV |
1096 | ar->max_num_peers = TARGET_10X_NUM_PEERS; |
1097 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
30c78167 | 1098 | ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; |
91ad5f56 | 1099 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
6274cd41 | 1100 | ar->fw_stats_req_mask = WMI_STAT_PEER; |
202e86e6 | 1101 | break; |
ca996ec5 MK |
1102 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
1103 | ar->max_num_peers = TARGET_TLV_NUM_PEERS; | |
1104 | ar->max_num_stations = TARGET_TLV_NUM_STATIONS; | |
49274332 | 1105 | ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; |
8cca3d60 | 1106 | ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; |
ca996ec5 | 1107 | ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; |
25c86619 | 1108 | ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; |
6274cd41 YL |
1109 | ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | |
1110 | WMI_STAT_PEER; | |
ca996ec5 | 1111 | break; |
202e86e6 KV |
1112 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
1113 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
1114 | WARN_ON(1); | |
1115 | return -EINVAL; | |
cfd1061e | 1116 | } |
5f2144d9 | 1117 | |
dc3632a1 KV |
1118 | /* Backwards compatibility for firmwares without |
1119 | * ATH10K_FW_IE_HTT_OP_VERSION. | |
1120 | */ | |
1121 | if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { | |
1122 | switch (ar->wmi.op_version) { | |
1123 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
1124 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; | |
1125 | break; | |
1126 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
1127 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
1128 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: | |
1129 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1; | |
1130 | break; | |
1131 | case ATH10K_FW_WMI_OP_VERSION_TLV: | |
1132 | ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV; | |
1133 | break; | |
1134 | case ATH10K_FW_WMI_OP_VERSION_UNSET: | |
1135 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
1136 | WARN_ON(1); | |
1137 | return -EINVAL; | |
1138 | } | |
1139 | } | |
1140 | ||
5f2144d9 | 1141 | return 0; |
cfd1061e MK |
1142 | } |
1143 | ||
43d2a30f | 1144 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 1145 | { |
5e3dd157 KV |
1146 | int status; |
1147 | ||
60631c5c KV |
1148 | lockdep_assert_held(&ar->conf_mutex); |
1149 | ||
7962b0d8 MK |
1150 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
1151 | ||
64d151d4 MK |
1152 | ath10k_bmi_start(ar); |
1153 | ||
5e3dd157 KV |
1154 | if (ath10k_init_configure_target(ar)) { |
1155 | status = -EINVAL; | |
1156 | goto err; | |
1157 | } | |
1158 | ||
83091559 KV |
1159 | status = ath10k_download_cal_data(ar); |
1160 | if (status) | |
1161 | goto err; | |
1162 | ||
163f5264 RM |
1163 | /* Some of of qca988x solutions are having global reset issue |
1164 | * during target initialization. Bypassing PLL setting before | |
1165 | * downloading firmware and letting the SoC run on REF_CLK is | |
1166 | * fixing the problem. Corresponding firmware change is also needed | |
1167 | * to set the clock source once the target is initialized. | |
1168 | */ | |
1169 | if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, | |
1170 | ar->fw_features)) { | |
1171 | status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); | |
1172 | if (status) { | |
1173 | ath10k_err(ar, "could not write to skip_clock_init: %d\n", | |
1174 | status); | |
1175 | goto err; | |
1176 | } | |
1177 | } | |
1178 | ||
83091559 | 1179 | status = ath10k_download_fw(ar, mode); |
5e3dd157 KV |
1180 | if (status) |
1181 | goto err; | |
1182 | ||
1183 | status = ath10k_init_uart(ar); | |
1184 | if (status) | |
1185 | goto err; | |
1186 | ||
cd003fad MK |
1187 | ar->htc.htc_ops.target_send_suspend_complete = |
1188 | ath10k_send_suspend_complete; | |
5e3dd157 | 1189 | |
cd003fad MK |
1190 | status = ath10k_htc_init(ar); |
1191 | if (status) { | |
7aa7a72a | 1192 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
1193 | goto err; |
1194 | } | |
1195 | ||
1196 | status = ath10k_bmi_done(ar); | |
1197 | if (status) | |
cd003fad | 1198 | goto err; |
5e3dd157 KV |
1199 | |
1200 | status = ath10k_wmi_attach(ar); | |
1201 | if (status) { | |
7aa7a72a | 1202 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 1203 | goto err; |
5e3dd157 KV |
1204 | } |
1205 | ||
95bf21f9 MK |
1206 | status = ath10k_htt_init(ar); |
1207 | if (status) { | |
7aa7a72a | 1208 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
1209 | goto err_wmi_detach; |
1210 | } | |
1211 | ||
1212 | status = ath10k_htt_tx_alloc(&ar->htt); | |
1213 | if (status) { | |
7aa7a72a | 1214 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
1215 | goto err_wmi_detach; |
1216 | } | |
1217 | ||
1218 | status = ath10k_htt_rx_alloc(&ar->htt); | |
1219 | if (status) { | |
7aa7a72a | 1220 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
1221 | goto err_htt_tx_detach; |
1222 | } | |
1223 | ||
67e3c63f MK |
1224 | status = ath10k_hif_start(ar); |
1225 | if (status) { | |
7aa7a72a | 1226 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 1227 | goto err_htt_rx_detach; |
67e3c63f MK |
1228 | } |
1229 | ||
1230 | status = ath10k_htc_wait_target(&ar->htc); | |
1231 | if (status) { | |
7aa7a72a | 1232 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1233 | goto err_hif_stop; |
1234 | } | |
5e3dd157 | 1235 | |
43d2a30f KV |
1236 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1237 | status = ath10k_htt_connect(&ar->htt); | |
1238 | if (status) { | |
1239 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1240 | goto err_hif_stop; | |
1241 | } | |
5e3dd157 KV |
1242 | } |
1243 | ||
95bf21f9 MK |
1244 | status = ath10k_wmi_connect(ar); |
1245 | if (status) { | |
7aa7a72a | 1246 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1247 | goto err_hif_stop; |
1248 | } | |
1249 | ||
1250 | status = ath10k_htc_start(&ar->htc); | |
1251 | if (status) { | |
7aa7a72a | 1252 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
1253 | goto err_hif_stop; |
1254 | } | |
1255 | ||
43d2a30f KV |
1256 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1257 | status = ath10k_wmi_wait_for_service_ready(ar); | |
9eea5689 | 1258 | if (status) { |
43d2a30f | 1259 | ath10k_warn(ar, "wmi service ready event not received"); |
43d2a30f KV |
1260 | goto err_hif_stop; |
1261 | } | |
95bf21f9 | 1262 | } |
5e3dd157 | 1263 | |
7aa7a72a | 1264 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 1265 | ar->hw->wiphy->fw_version); |
5e3dd157 | 1266 | |
5e3dd157 KV |
1267 | status = ath10k_wmi_cmd_init(ar); |
1268 | if (status) { | |
7aa7a72a MK |
1269 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
1270 | status); | |
b7967dc7 | 1271 | goto err_hif_stop; |
5e3dd157 KV |
1272 | } |
1273 | ||
1274 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
9eea5689 | 1275 | if (status) { |
7aa7a72a | 1276 | ath10k_err(ar, "wmi unified ready event not received\n"); |
b7967dc7 | 1277 | goto err_hif_stop; |
5e3dd157 KV |
1278 | } |
1279 | ||
c545070e MK |
1280 | /* If firmware indicates Full Rx Reorder support it must be used in a |
1281 | * slightly different manner. Let HTT code know. | |
1282 | */ | |
1283 | ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, | |
1284 | ar->wmi.svc_map)); | |
1285 | ||
1286 | status = ath10k_htt_rx_ring_refill(ar); | |
1287 | if (status) { | |
1288 | ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); | |
1289 | goto err_hif_stop; | |
1290 | } | |
1291 | ||
43d2a30f KV |
1292 | /* we don't care about HTT in UTF mode */ |
1293 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1294 | status = ath10k_htt_setup(&ar->htt); | |
1295 | if (status) { | |
1296 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1297 | goto err_hif_stop; | |
1298 | } | |
95bf21f9 | 1299 | } |
5e3dd157 | 1300 | |
db66ea04 KV |
1301 | status = ath10k_debug_start(ar); |
1302 | if (status) | |
b7967dc7 | 1303 | goto err_hif_stop; |
db66ea04 | 1304 | |
30c78167 | 1305 | ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; |
dfa413de | 1306 | |
0579119f | 1307 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1308 | |
dd30a36e MK |
1309 | return 0; |
1310 | ||
67e3c63f MK |
1311 | err_hif_stop: |
1312 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1313 | err_htt_rx_detach: |
1314 | ath10k_htt_rx_free(&ar->htt); | |
1315 | err_htt_tx_detach: | |
1316 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1317 | err_wmi_detach: |
1318 | ath10k_wmi_detach(ar); | |
1319 | err: | |
1320 | return status; | |
1321 | } | |
818bdd16 | 1322 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1323 | |
00f5482b MP |
1324 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1325 | { | |
1326 | int ret; | |
a7a42849 | 1327 | unsigned long time_left; |
00f5482b MP |
1328 | |
1329 | reinit_completion(&ar->target_suspend); | |
1330 | ||
1331 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1332 | if (ret) { | |
7aa7a72a | 1333 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1334 | return ret; |
1335 | } | |
1336 | ||
a7a42849 | 1337 | time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); |
00f5482b | 1338 | |
a7a42849 | 1339 | if (!time_left) { |
7aa7a72a | 1340 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1341 | return -ETIMEDOUT; |
1342 | } | |
1343 | ||
1344 | return 0; | |
1345 | } | |
1346 | ||
dd30a36e MK |
1347 | void ath10k_core_stop(struct ath10k *ar) |
1348 | { | |
60631c5c KV |
1349 | lockdep_assert_held(&ar->conf_mutex); |
1350 | ||
00f5482b | 1351 | /* try to suspend target */ |
43d2a30f KV |
1352 | if (ar->state != ATH10K_STATE_RESTARTING && |
1353 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1354 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1355 | ||
db66ea04 | 1356 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1357 | ath10k_hif_stop(ar); |
1358 | ath10k_htt_tx_free(&ar->htt); | |
1359 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1360 | ath10k_wmi_detach(ar); |
1361 | } | |
818bdd16 MK |
1362 | EXPORT_SYMBOL(ath10k_core_stop); |
1363 | ||
1364 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1365 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1366 | * necessary to load the firmware (and tear it down immediately since start | |
1367 | * hook will try to init it again) before registering */ | |
1368 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1369 | { | |
29385057 MK |
1370 | struct bmi_target_info target_info; |
1371 | int ret = 0; | |
818bdd16 MK |
1372 | |
1373 | ret = ath10k_hif_power_up(ar); | |
1374 | if (ret) { | |
7aa7a72a | 1375 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1376 | return ret; |
1377 | } | |
1378 | ||
29385057 MK |
1379 | memset(&target_info, 0, sizeof(target_info)); |
1380 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1381 | if (ret) { | |
7aa7a72a | 1382 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1383 | goto err_power_down; |
29385057 MK |
1384 | } |
1385 | ||
1386 | ar->target_version = target_info.version; | |
1387 | ar->hw->wiphy->hw_version = target_info.version; | |
1388 | ||
1389 | ret = ath10k_init_hw_params(ar); | |
1390 | if (ret) { | |
7aa7a72a | 1391 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1392 | goto err_power_down; |
29385057 MK |
1393 | } |
1394 | ||
1395 | ret = ath10k_core_fetch_firmware_files(ar); | |
1396 | if (ret) { | |
7aa7a72a | 1397 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1398 | goto err_power_down; |
29385057 MK |
1399 | } |
1400 | ||
5f2144d9 KV |
1401 | ret = ath10k_core_init_firmware_features(ar); |
1402 | if (ret) { | |
1403 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
1404 | ret); | |
1405 | goto err_free_firmware_files; | |
1406 | } | |
cfd1061e | 1407 | |
dcb02db1 VT |
1408 | ret = ath10k_swap_code_seg_init(ar); |
1409 | if (ret) { | |
1410 | ath10k_err(ar, "failed to initialize code swap segment: %d\n", | |
1411 | ret); | |
1412 | goto err_free_firmware_files; | |
1413 | } | |
1414 | ||
60631c5c KV |
1415 | mutex_lock(&ar->conf_mutex); |
1416 | ||
43d2a30f | 1417 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1418 | if (ret) { |
7aa7a72a | 1419 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1420 | goto err_unlock; |
818bdd16 MK |
1421 | } |
1422 | ||
8079de0d | 1423 | ath10k_print_driver_info(ar); |
818bdd16 | 1424 | ath10k_core_stop(ar); |
60631c5c KV |
1425 | |
1426 | mutex_unlock(&ar->conf_mutex); | |
1427 | ||
818bdd16 MK |
1428 | ath10k_hif_power_down(ar); |
1429 | return 0; | |
c6ce492d KV |
1430 | |
1431 | err_unlock: | |
1432 | mutex_unlock(&ar->conf_mutex); | |
1433 | ||
5f2144d9 | 1434 | err_free_firmware_files: |
c6ce492d KV |
1435 | ath10k_core_free_firmware_files(ar); |
1436 | ||
1437 | err_power_down: | |
1438 | ath10k_hif_power_down(ar); | |
1439 | ||
1440 | return ret; | |
818bdd16 | 1441 | } |
dd30a36e | 1442 | |
6782cb69 | 1443 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1444 | { |
6782cb69 | 1445 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1446 | int status; |
1447 | ||
818bdd16 MK |
1448 | status = ath10k_core_probe_fw(ar); |
1449 | if (status) { | |
7aa7a72a | 1450 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1451 | goto err; |
818bdd16 | 1452 | } |
dd30a36e | 1453 | |
5e3dd157 | 1454 | status = ath10k_mac_register(ar); |
818bdd16 | 1455 | if (status) { |
7aa7a72a | 1456 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1457 | goto err_release_fw; |
818bdd16 | 1458 | } |
5e3dd157 | 1459 | |
e13cf7a3 | 1460 | status = ath10k_debug_register(ar); |
5e3dd157 | 1461 | if (status) { |
7aa7a72a | 1462 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1463 | goto err_unregister_mac; |
1464 | } | |
1465 | ||
855aed12 SW |
1466 | status = ath10k_spectral_create(ar); |
1467 | if (status) { | |
7aa7a72a | 1468 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1469 | goto err_debug_destroy; |
1470 | } | |
1471 | ||
fe6f36d6 RM |
1472 | status = ath10k_thermal_register(ar); |
1473 | if (status) { | |
1474 | ath10k_err(ar, "could not register thermal device: %d\n", | |
1475 | status); | |
1476 | goto err_spectral_destroy; | |
1477 | } | |
1478 | ||
6782cb69 MK |
1479 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1480 | return; | |
5e3dd157 | 1481 | |
fe6f36d6 RM |
1482 | err_spectral_destroy: |
1483 | ath10k_spectral_destroy(ar); | |
855aed12 SW |
1484 | err_debug_destroy: |
1485 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1486 | err_unregister_mac: |
1487 | ath10k_mac_unregister(ar); | |
29385057 MK |
1488 | err_release_fw: |
1489 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1490 | err: |
a491a920 MK |
1491 | /* TODO: It's probably a good idea to release device from the driver |
1492 | * but calling device_release_driver() here will cause a deadlock. | |
1493 | */ | |
6782cb69 MK |
1494 | return; |
1495 | } | |
1496 | ||
1497 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1498 | { | |
6782cb69 | 1499 | ar->chip_id = chip_id; |
6782cb69 MK |
1500 | queue_work(ar->workqueue, &ar->register_work); |
1501 | ||
1502 | return 0; | |
5e3dd157 KV |
1503 | } |
1504 | EXPORT_SYMBOL(ath10k_core_register); | |
1505 | ||
1506 | void ath10k_core_unregister(struct ath10k *ar) | |
1507 | { | |
6782cb69 MK |
1508 | cancel_work_sync(&ar->register_work); |
1509 | ||
1510 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1511 | return; | |
1512 | ||
fe6f36d6 | 1513 | ath10k_thermal_unregister(ar); |
804eef14 SW |
1514 | /* Stop spectral before unregistering from mac80211 to remove the |
1515 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1516 | * would be already be free'd recursively, leading to a double free. | |
1517 | */ | |
1518 | ath10k_spectral_destroy(ar); | |
1519 | ||
5e3dd157 KV |
1520 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1521 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1522 | * unhappy about callback failures. */ | |
1523 | ath10k_mac_unregister(ar); | |
db66ea04 | 1524 | |
43d2a30f KV |
1525 | ath10k_testmode_destroy(ar); |
1526 | ||
29385057 | 1527 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1528 | |
e13cf7a3 | 1529 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1530 | } |
1531 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1532 | ||
e7b54194 | 1533 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1534 | enum ath10k_bus bus, |
d63955b3 | 1535 | enum ath10k_hw_rev hw_rev, |
0d0a6939 MK |
1536 | const struct ath10k_hif_ops *hif_ops) |
1537 | { | |
1538 | struct ath10k *ar; | |
e13cf7a3 | 1539 | int ret; |
0d0a6939 | 1540 | |
e7b54194 | 1541 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1542 | if (!ar) |
1543 | return NULL; | |
1544 | ||
1545 | ar->ath_common.priv = ar; | |
1546 | ar->ath_common.hw = ar->hw; | |
0d0a6939 | 1547 | ar->dev = dev; |
d63955b3 | 1548 | ar->hw_rev = hw_rev; |
0d0a6939 | 1549 | ar->hif.ops = hif_ops; |
e07db352 | 1550 | ar->hif.bus = bus; |
0d0a6939 | 1551 | |
d63955b3 MK |
1552 | switch (hw_rev) { |
1553 | case ATH10K_HW_QCA988X: | |
1554 | ar->regs = &qca988x_regs; | |
2f2cfc4a | 1555 | ar->hw_values = &qca988x_values; |
d63955b3 MK |
1556 | break; |
1557 | case ATH10K_HW_QCA6174: | |
1558 | ar->regs = &qca6174_regs; | |
2f2cfc4a | 1559 | ar->hw_values = &qca6174_values; |
d63955b3 | 1560 | break; |
8bd47021 VT |
1561 | case ATH10K_HW_QCA99X0: |
1562 | ar->regs = &qca99x0_regs; | |
1563 | ar->hw_values = &qca99x0_values; | |
1564 | break; | |
d63955b3 MK |
1565 | default: |
1566 | ath10k_err(ar, "unsupported core hardware revision %d\n", | |
1567 | hw_rev); | |
1568 | ret = -ENOTSUPP; | |
1569 | goto err_free_mac; | |
1570 | } | |
1571 | ||
0d0a6939 MK |
1572 | init_completion(&ar->scan.started); |
1573 | init_completion(&ar->scan.completed); | |
1574 | init_completion(&ar->scan.on_channel); | |
1575 | init_completion(&ar->target_suspend); | |
5fd3ac3c | 1576 | init_completion(&ar->wow.wakeup_completed); |
0d0a6939 MK |
1577 | |
1578 | init_completion(&ar->install_key_done); | |
1579 | init_completion(&ar->vdev_setup_done); | |
ac2953fc | 1580 | init_completion(&ar->thermal.wmi_sync); |
0d0a6939 | 1581 | |
5c81c7fd | 1582 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1583 | |
1584 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1585 | if (!ar->workqueue) | |
e13cf7a3 | 1586 | goto err_free_mac; |
0d0a6939 MK |
1587 | |
1588 | mutex_init(&ar->conf_mutex); | |
1589 | spin_lock_init(&ar->data_lock); | |
1590 | ||
1591 | INIT_LIST_HEAD(&ar->peers); | |
1592 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1593 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1594 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1595 | |
1596 | init_completion(&ar->offchan_tx_completed); | |
1597 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1598 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1599 | ||
1600 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1601 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1602 | ||
6782cb69 | 1603 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1604 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1605 | ||
e13cf7a3 MK |
1606 | ret = ath10k_debug_create(ar); |
1607 | if (ret) | |
1608 | goto err_free_wq; | |
1609 | ||
0d0a6939 MK |
1610 | return ar; |
1611 | ||
e13cf7a3 MK |
1612 | err_free_wq: |
1613 | destroy_workqueue(ar->workqueue); | |
1614 | ||
1615 | err_free_mac: | |
0d0a6939 | 1616 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1617 | |
0d0a6939 MK |
1618 | return NULL; |
1619 | } | |
1620 | EXPORT_SYMBOL(ath10k_core_create); | |
1621 | ||
1622 | void ath10k_core_destroy(struct ath10k *ar) | |
1623 | { | |
1624 | flush_workqueue(ar->workqueue); | |
1625 | destroy_workqueue(ar->workqueue); | |
1626 | ||
e13cf7a3 | 1627 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1628 | ath10k_mac_destroy(ar); |
1629 | } | |
1630 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1631 | ||
5e3dd157 KV |
1632 | MODULE_AUTHOR("Qualcomm Atheros"); |
1633 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1634 | MODULE_LICENSE("Dual BSD/GPL"); |