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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[thirdparty/kernel/linux.git] / drivers / net / wireless / broadcom / b43legacy / xmit.h
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef B43legacy_XMIT_H_
3#define B43legacy_XMIT_H_
4
5#include "main.h"
6
7
8#define _b43legacy_declare_plcp_hdr(size) \
9 struct b43legacy_plcp_hdr##size { \
10 union { \
11 __le32 data; \
12 __u8 raw[size]; \
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13 } __packed; \
14 } __packed
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15
16/* struct b43legacy_plcp_hdr4 */
17_b43legacy_declare_plcp_hdr(4);
18/* struct b43legacy_plcp_hdr6 */
19_b43legacy_declare_plcp_hdr(6);
20
21#undef _b43legacy_declare_plcp_hdr
22
23
24/* TX header for v3 firmware */
25struct b43legacy_txhdr_fw3 {
26 __le32 mac_ctl; /* MAC TX control */
27 __le16 mac_frame_ctl; /* Copy of the FrameControl */
28 __le16 tx_fes_time_norm; /* TX FES Time Normal */
29 __le16 phy_ctl; /* PHY TX control */
30 __u8 iv[16]; /* Encryption IV */
31 __u8 tx_receiver[6]; /* TX Frame Receiver address */
32 __le16 tx_fes_time_fb; /* TX FES Time Fallback */
33 struct b43legacy_plcp_hdr4 rts_plcp_fb; /* RTS fallback PLCP */
34 __le16 rts_dur_fb; /* RTS fallback duration */
35 struct b43legacy_plcp_hdr4 plcp_fb; /* Fallback PLCP */
36 __le16 dur_fb; /* Fallback duration */
37 PAD_BYTES(2);
38 __le16 cookie;
39 __le16 unknown_scb_stuff;
40 struct b43legacy_plcp_hdr6 rts_plcp; /* RTS PLCP */
41 __u8 rts_frame[18]; /* The RTS frame (if used) */
42 struct b43legacy_plcp_hdr6 plcp;
ba2d3587 43} __packed;
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44
45/* MAC TX control */
46#define B43legacy_TX4_MAC_KEYIDX 0x0FF00000 /* Security key index */
47#define B43legacy_TX4_MAC_KEYIDX_SHIFT 20
48#define B43legacy_TX4_MAC_KEYALG 0x00070000 /* Security key algorithm */
49#define B43legacy_TX4_MAC_KEYALG_SHIFT 16
50#define B43legacy_TX4_MAC_LIFETIME 0x00001000
51#define B43legacy_TX4_MAC_FRAMEBURST 0x00000800
52#define B43legacy_TX4_MAC_SENDCTS 0x00000400
53#define B43legacy_TX4_MAC_AMPDU 0x00000300
54#define B43legacy_TX4_MAC_AMPDU_SHIFT 8
55#define B43legacy_TX4_MAC_CTSFALLBACKOFDM 0x00000200
56#define B43legacy_TX4_MAC_FALLBACKOFDM 0x00000100
57#define B43legacy_TX4_MAC_5GHZ 0x00000080
58#define B43legacy_TX4_MAC_IGNPMQ 0x00000020
59#define B43legacy_TX4_MAC_HWSEQ 0x00000010 /* Use Hardware Seq No */
60#define B43legacy_TX4_MAC_STMSDU 0x00000008 /* Start MSDU */
61#define B43legacy_TX4_MAC_SENDRTS 0x00000004
62#define B43legacy_TX4_MAC_LONGFRAME 0x00000002
63#define B43legacy_TX4_MAC_ACK 0x00000001
64
65/* Extra Frame Types */
66#define B43legacy_TX4_EFT_FBOFDM 0x0001 /* Data frame fb rate type */
67#define B43legacy_TX4_EFT_RTSOFDM 0x0004 /* RTS/CTS rate type */
68#define B43legacy_TX4_EFT_RTSFBOFDM 0x0010 /* RTS/CTS fallback rate type */
69
70/* PHY TX control word */
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71#define B43legacy_TX4_PHY_ENC 0x0003 /* Data frame encoding */
72#define B43legacy_TX4_PHY_ENC_CCK 0x0000 /* CCK */
73#define B43legacy_TX4_PHY_ENC_OFDM 0x0001 /* Data frame rate type */
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74#define B43legacy_TX4_PHY_SHORTPRMBL 0x0010 /* Use short preamble */
75#define B43legacy_TX4_PHY_ANT 0x03C0 /* Antenna selection */
76#define B43legacy_TX4_PHY_ANT0 0x0000 /* Use antenna 0 */
77#define B43legacy_TX4_PHY_ANT1 0x0100 /* Use antenna 1 */
78#define B43legacy_TX4_PHY_ANTLAST 0x0300 /* Use last used antenna */
79
80
81
9eca9a8e 82int b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
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83 u8 *txhdr,
84 const unsigned char *fragment_data,
85 unsigned int fragment_len,
e6a9854b 86 struct ieee80211_tx_info *info,
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87 u16 cookie);
88
89
90/* Transmit Status */
91struct b43legacy_txstatus {
92 u16 cookie; /* The cookie from the txhdr */
93 u16 seq; /* Sequence number */
94 u8 phy_stat; /* PHY TX status */
95 u8 frame_count; /* Frame transmit count */
96 u8 rts_count; /* RTS transmit count */
97 u8 supp_reason; /* Suppression reason */
98 /* flags */
99 u8 pm_indicated;/* PM mode indicated to AP */
100 u8 intermediate;/* Intermediate status notification */
101 u8 for_ampdu; /* Status is for an AMPDU (afterburner) */
102 u8 acked; /* Wireless ACK received */
103};
104
105/* txstatus supp_reason values */
106enum {
107 B43legacy_TXST_SUPP_NONE, /* Not suppressed */
108 B43legacy_TXST_SUPP_PMQ, /* Suppressed due to PMQ entry */
109 B43legacy_TXST_SUPP_FLUSH, /* Suppressed due to flush request */
110 B43legacy_TXST_SUPP_PREV, /* Previous fragment failed */
111 B43legacy_TXST_SUPP_CHAN, /* Channel mismatch */
112 B43legacy_TXST_SUPP_LIFE, /* Lifetime expired */
113 B43legacy_TXST_SUPP_UNDER, /* Buffer underflow */
114 B43legacy_TXST_SUPP_ABNACK, /* Afterburner NACK */
115};
116
117/* Transmit Status as received through DMA/PIO on old chips */
118struct b43legacy_hwtxstatus {
119 PAD_BYTES(4);
120 __le16 cookie;
121 u8 flags;
122 u8 count;
123 PAD_BYTES(2);
124 __le16 seq;
125 u8 phy_stat;
126 PAD_BYTES(1);
ba2d3587 127} __packed;
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128
129
130/* Receive header for v3 firmware. */
131struct b43legacy_rxhdr_fw3 {
132 __le16 frame_len; /* Frame length */
133 PAD_BYTES(2);
134 __le16 phy_status0; /* PHY RX Status 0 */
135 __u8 jssi; /* PHY RX Status 1: JSSI */
136 __u8 sig_qual; /* PHY RX Status 1: Signal Quality */
137 PAD_BYTES(2); /* PHY RX Status 2 */
138 __le16 phy_status3; /* PHY RX Status 3 */
139 __le16 mac_status; /* MAC RX status */
140 __le16 mac_time;
141 __le16 channel;
ba2d3587 142} __packed;
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143
144
145/* PHY RX Status 0 */
146#define B43legacy_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */
147#define B43legacy_RX_PHYST0_PLCPHCF 0x0200
148#define B43legacy_RX_PHYST0_PLCPFV 0x0100
149#define B43legacy_RX_PHYST0_SHORTPRMBL 0x0080 /* Recvd with Short Preamble */
150#define B43legacy_RX_PHYST0_LCRS 0x0040
151#define B43legacy_RX_PHYST0_ANT 0x0020 /* Antenna */
152#define B43legacy_RX_PHYST0_UNSRATE 0x0010
153#define B43legacy_RX_PHYST0_CLIP 0x000C
154#define B43legacy_RX_PHYST0_CLIP_SHIFT 2
155#define B43legacy_RX_PHYST0_FTYPE 0x0003 /* Frame type */
156#define B43legacy_RX_PHYST0_CCK 0x0000 /* Frame type: CCK */
157#define B43legacy_RX_PHYST0_OFDM 0x0001 /* Frame type: OFDM */
158#define B43legacy_RX_PHYST0_PRE_N 0x0002 /* Pre-standard N-PHY frame */
159#define B43legacy_RX_PHYST0_STD_N 0x0003 /* Standard N-PHY frame */
160
161/* PHY RX Status 2 */
162#define B43legacy_RX_PHYST2_LNAG 0xC000 /* LNA Gain */
163#define B43legacy_RX_PHYST2_LNAG_SHIFT 14
164#define B43legacy_RX_PHYST2_PNAG 0x3C00 /* PNA Gain */
165#define B43legacy_RX_PHYST2_PNAG_SHIFT 10
166#define B43legacy_RX_PHYST2_FOFF 0x03FF /* F offset */
167
168/* PHY RX Status 3 */
169#define B43legacy_RX_PHYST3_DIGG 0x1800 /* DIG Gain */
170#define B43legacy_RX_PHYST3_DIGG_SHIFT 11
171#define B43legacy_RX_PHYST3_TRSTATE 0x0400 /* TR state */
172
173/* MAC RX Status */
174#define B43legacy_RX_MAC_BEACONSENT 0x00008000 /* Beacon send flag */
175#define B43legacy_RX_MAC_KEYIDX 0x000007E0 /* Key index */
176#define B43legacy_RX_MAC_KEYIDX_SHIFT 5
177#define B43legacy_RX_MAC_DECERR 0x00000010 /* Decrypt error */
178#define B43legacy_RX_MAC_DEC 0x00000008 /* Decryption attempted */
179#define B43legacy_RX_MAC_PADDING 0x00000004 /* Pad bytes present */
180#define B43legacy_RX_MAC_RESP 0x00000002 /* Response frame xmitted */
181#define B43legacy_RX_MAC_FCSERR 0x00000001 /* FCS error */
182
183/* RX channel */
184#define B43legacy_RX_CHAN_GAIN 0xFC00 /* Gain */
185#define B43legacy_RX_CHAN_GAIN_SHIFT 10
186#define B43legacy_RX_CHAN_ID 0x03FC /* Channel ID */
187#define B43legacy_RX_CHAN_ID_SHIFT 2
188#define B43legacy_RX_CHAN_PHYTYPE 0x0003 /* PHY type */
189
190
191
192u8 b43legacy_plcp_get_ratecode_cck(const u8 bitrate);
193u8 b43legacy_plcp_get_ratecode_ofdm(const u8 bitrate);
194
195void b43legacy_generate_plcp_hdr(struct b43legacy_plcp_hdr4 *plcp,
196 const u16 octets, const u8 bitrate);
197
198void b43legacy_rx(struct b43legacy_wldev *dev,
199 struct sk_buff *skb,
200 const void *_rxhdr);
201
202void b43legacy_handle_txstatus(struct b43legacy_wldev *dev,
203 const struct b43legacy_txstatus *status);
204
205void b43legacy_handle_hwtxstatus(struct b43legacy_wldev *dev,
206 const struct b43legacy_hwtxstatus *hw);
207
208void b43legacy_tx_suspend(struct b43legacy_wldev *dev);
209void b43legacy_tx_resume(struct b43legacy_wldev *dev);
210
211
212#define B43legacy_NR_QOSPARMS 22
213enum {
214 B43legacy_QOSPARM_TXOP = 0,
215 B43legacy_QOSPARM_CWMIN,
216 B43legacy_QOSPARM_CWMAX,
217 B43legacy_QOSPARM_CWCUR,
218 B43legacy_QOSPARM_AIFS,
219 B43legacy_QOSPARM_BSLOTS,
220 B43legacy_QOSPARM_REGGAP,
221 B43legacy_QOSPARM_STATUS,
222};
223
224void b43legacy_qos_init(struct b43legacy_wldev *dev);
225
226
227/* Helper functions for converting the key-table index from "firmware-format"
228 * to "raw-format" and back. The firmware API changed for this at some revision.
229 * We need to account for that here. */
230static inline
231int b43legacy_new_kidx_api(struct b43legacy_wldev *dev)
232{
233 /* FIXME: Not sure the change was at rev 351 */
234 return (dev->fw.rev >= 351);
235}
236static inline
237u8 b43legacy_kidx_to_fw(struct b43legacy_wldev *dev, u8 raw_kidx)
238{
239 u8 firmware_kidx;
240 if (b43legacy_new_kidx_api(dev))
241 firmware_kidx = raw_kidx;
242 else {
243 if (raw_kidx >= 4) /* Is per STA key? */
244 firmware_kidx = raw_kidx - 4;
245 else
246 firmware_kidx = raw_kidx; /* TX default key */
247 }
248 return firmware_kidx;
249}
250static inline
251u8 b43legacy_kidx_to_raw(struct b43legacy_wldev *dev, u8 firmware_kidx)
252{
253 u8 raw_kidx;
254 if (b43legacy_new_kidx_api(dev))
255 raw_kidx = firmware_kidx;
256 else
257 /* RX default keys or per STA keys */
258 raw_kidx = firmware_kidx + 4;
259 return raw_kidx;
260}
261
262#endif /* B43legacy_XMIT_H_ */