[thirdparty/linux.git] / drivers / net / wireless / ti / wl12xx / wl12xx.h

/*
 * This file is part of wl12xx
 *
 * Copyright (C) 2011 Texas Instruments Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef __WL12XX_PRIV_H__
#define __WL12XX_PRIV_H__

#include "conf.h"

/* WiLink 6/7 chip IDs */
#define CHIP_ID_127X_PG10              (0x04030101)
#define CHIP_ID_127X_PG20              (0x04030111)
#define CHIP_ID_128X_PG10              (0x05030101)
#define CHIP_ID_128X_PG20              (0x05030111)

/* FW chip version for wl127x */
#define WL127X_CHIP_VER		6
/* minimum single-role FW version for wl127x */
#define WL127X_IFTYPE_SR_VER	3
#define WL127X_MAJOR_SR_VER	10
#define WL127X_SUBTYPE_SR_VER	WLCORE_FW_VER_IGNORE
#define WL127X_MINOR_SR_VER	133
/* minimum multi-role FW version for wl127x */
#define WL127X_IFTYPE_MR_VER	5
#define WL127X_MAJOR_MR_VER	7
#define WL127X_SUBTYPE_MR_VER	WLCORE_FW_VER_IGNORE
#define WL127X_MINOR_MR_VER	42

/* FW chip version for wl128x */
#define WL128X_CHIP_VER		7
/* minimum single-role FW version for wl128x */
#define WL128X_IFTYPE_SR_VER	3
#define WL128X_MAJOR_SR_VER	10
#define WL128X_SUBTYPE_SR_VER	WLCORE_FW_VER_IGNORE
#define WL128X_MINOR_SR_VER	133
/* minimum multi-role FW version for wl128x */
#define WL128X_IFTYPE_MR_VER	5
#define WL128X_MAJOR_MR_VER	7
#define WL128X_SUBTYPE_MR_VER	WLCORE_FW_VER_IGNORE
#define WL128X_MINOR_MR_VER	42

#define WL12XX_AGGR_BUFFER_SIZE	(4 * PAGE_SIZE)

#define WL12XX_NUM_TX_DESCRIPTORS 16
#define WL12XX_NUM_RX_DESCRIPTORS 8

#define WL12XX_NUM_MAC_ADDRESSES 2

#define WL12XX_RX_BA_MAX_SESSIONS 3

#define WL12XX_MAX_AP_STATIONS 8
#define WL12XX_MAX_LINKS 12

struct wl127x_rx_mem_pool_addr {
	u32 addr;
	u32 addr_extra;
};

struct wl12xx_priv {
	struct wl12xx_priv_conf conf;

	int ref_clock;
	int tcxo_clock;

	struct wl127x_rx_mem_pool_addr *rx_mem_addr;
};

/* Reference clock values */
enum {
	WL12XX_REFCLOCK_19	= 0, /* 19.2 MHz */
	WL12XX_REFCLOCK_26	= 1, /* 26 MHz */
	WL12XX_REFCLOCK_38	= 2, /* 38.4 MHz */
	WL12XX_REFCLOCK_52	= 3, /* 52 MHz */
	WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
	WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
};

/* TCXO clock values */
enum {
	WL12XX_TCXOCLOCK_19_2	= 0, /* 19.2MHz */
	WL12XX_TCXOCLOCK_26	= 1, /* 26 MHz */
	WL12XX_TCXOCLOCK_38_4	= 2, /* 38.4MHz */
	WL12XX_TCXOCLOCK_52	= 3, /* 52 MHz */
	WL12XX_TCXOCLOCK_16_368	= 4, /* 16.368 MHz */
	WL12XX_TCXOCLOCK_32_736	= 5, /* 32.736 MHz */
	WL12XX_TCXOCLOCK_16_8	= 6, /* 16.8 MHz */
	WL12XX_TCXOCLOCK_33_6	= 7, /* 33.6 MHz */
};

struct wl12xx_clock {
	u32	freq;
	bool	xtal;
	u8	hw_idx;
};

struct wl12xx_fw_packet_counters {
	/* Cumulative counter of released packets per AC */
	u8 tx_released_pkts[NUM_TX_QUEUES];

	/* Cumulative counter of freed packets per HLID */
	u8 tx_lnk_free_pkts[WL12XX_MAX_LINKS];

	/* Cumulative counter of released Voice memory blocks */
	u8 tx_voice_released_blks;

	/* Tx rate of the last transmitted packet */
	u8 tx_last_rate;

	u8 padding[2];
} __packed;

/* FW status registers */
struct wl12xx_fw_status {
	__le32 intr;
	u8  fw_rx_counter;
	u8  drv_rx_counter;
	u8  reserved;
	u8  tx_results_counter;
	__le32 rx_pkt_descs[WL12XX_NUM_RX_DESCRIPTORS];

	__le32 fw_localtime;

	/*
	 * A bitmap (where each bit represents a single HLID)
	 * to indicate if the station is in PS mode.
	 */
	__le32 link_ps_bitmap;

	/*
	 * A bitmap (where each bit represents a single HLID) to indicate
	 * if the station is in Fast mode
	 */
	__le32 link_fast_bitmap;

	/* Cumulative counter of total released mem blocks since FW-reset */
	__le32 total_released_blks;

	/* Size (in Memory Blocks) of TX pool */
	__le32 tx_total;

	struct wl12xx_fw_packet_counters counters;

	__le32 log_start_addr;
} __packed;

#endif /* __WL12XX_PRIV_H__ */
Commit	Line	Data
166b2136 LC	1	/*
	2	* This file is part of wl12xx
	3	*
	4	* Copyright (C) 2011 Texas Instruments Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	18	* 02110-1301 USA
	19	*
	20	*/
	21
	22	#ifndef __WL12XX_PRIV_H__
	23	#define __WL12XX_PRIV_H__
	24
	25	#include "conf.h"
	26
986f3aa1 LC	27	/* WiLink 6/7 chip IDs */
	28	#define CHIP_ID_127X_PG10 (0x04030101)
	29	#define CHIP_ID_127X_PG20 (0x04030111)
	30	#define CHIP_ID_128X_PG10 (0x05030101)
	31	#define CHIP_ID_128X_PG20 (0x05030111)
	32
8675f9ab	33	/* FW chip version for wl127x */
4a1ccce8	34	#define WL127X_CHIP_VER 6
8675f9ab LC	35	/* minimum single-role FW version for wl127x */
	36	#define WL127X_IFTYPE_SR_VER 3
	37	#define WL127X_MAJOR_SR_VER 10
	38	#define WL127X_SUBTYPE_SR_VER WLCORE_FW_VER_IGNORE
0e284c07	39	#define WL127X_MINOR_SR_VER 133
8675f9ab LC	40	/* minimum multi-role FW version for wl127x */
	41	#define WL127X_IFTYPE_MR_VER 5
	42	#define WL127X_MAJOR_MR_VER 7
	43	#define WL127X_SUBTYPE_MR_VER WLCORE_FW_VER_IGNORE
60c28cf1	44	#define WL127X_MINOR_MR_VER 42
4a1ccce8	45
8675f9ab	46	/* FW chip version for wl128x */
4a1ccce8	47	#define WL128X_CHIP_VER 7
8675f9ab LC	48	/* minimum single-role FW version for wl128x */
	49	#define WL128X_IFTYPE_SR_VER 3
	50	#define WL128X_MAJOR_SR_VER 10
	51	#define WL128X_SUBTYPE_SR_VER WLCORE_FW_VER_IGNORE
0e284c07	52	#define WL128X_MINOR_SR_VER 133
8675f9ab LC	53	/* minimum multi-role FW version for wl128x */
	54	#define WL128X_IFTYPE_MR_VER 5
	55	#define WL128X_MAJOR_MR_VER 7
	56	#define WL128X_SUBTYPE_MR_VER WLCORE_FW_VER_IGNORE
	57	#define WL128X_MINOR_MR_VER 42
4a1ccce8	58
26a309c7 IC	59	#define WL12XX_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
26a309c7 IC	60
f1c434df IC	61	#define WL12XX_NUM_TX_DESCRIPTORS 16
	62	#define WL12XX_NUM_RX_DESCRIPTORS 8
	63
f4afbed9 AN	64	#define WL12XX_NUM_MAC_ADDRESSES 2
f4afbed9 AN	65
d21553f8 IC	66	#define WL12XX_RX_BA_MAX_SESSIONS 3
d21553f8 IC	67
32f0fd5b	68	#define WL12XX_MAX_AP_STATIONS 8
da08fdfa EP	69	#define WL12XX_MAX_LINKS 12
da08fdfa EP	70
4b4887e9 LC	71	struct wl127x_rx_mem_pool_addr {
	72	u32 addr;
	73	u32 addr_extra;
	74	};
	75
166b2136 LC	76	struct wl12xx_priv {
166b2136 LC	77	struct wl12xx_priv_conf conf;
a5d751bb LC	78
	79	int ref_clock;
	80	int tcxo_clock;
2e07d028 IY	81
2e07d028 IY	82	struct wl127x_rx_mem_pool_addr *rx_mem_addr;
166b2136 LC	83	};
166b2136 LC	84
44486b48 LC	85	/* Reference clock values */
	86	enum {
	87	WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
	88	WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
	89	WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
	90	WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
	91	WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
	92	WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
	93	};
	94
	95	/* TCXO clock values */
	96	enum {
	97	WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
	98	WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
	99	WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
	100	WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
	101	WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
	102	WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
	103	WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
	104	WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
	105	};
	106
	107	struct wl12xx_clock {
	108	u32 freq;
	109	bool xtal;
	110	u8 hw_idx;
	111	};
	112
75fb4df7 EP	113	struct wl12xx_fw_packet_counters {
	114	/* Cumulative counter of released packets per AC */
	115	u8 tx_released_pkts[NUM_TX_QUEUES];
	116
	117	/* Cumulative counter of freed packets per HLID */
	118	u8 tx_lnk_free_pkts[WL12XX_MAX_LINKS];
	119
	120	/* Cumulative counter of released Voice memory blocks */
	121	u8 tx_voice_released_blks;
	122
	123	/* Tx rate of the last transmitted packet */
	124	u8 tx_last_rate;
	125
	126	u8 padding[2];
	127	} __packed;
	128
	129	/* FW status registers */
	130	struct wl12xx_fw_status {
	131	__le32 intr;
	132	u8 fw_rx_counter;
	133	u8 drv_rx_counter;
	134	u8 reserved;
	135	u8 tx_results_counter;
	136	__le32 rx_pkt_descs[WL12XX_NUM_RX_DESCRIPTORS];
	137
	138	__le32 fw_localtime;
	139
	140	/*
	141	* A bitmap (where each bit represents a single HLID)
	142	* to indicate if the station is in PS mode.
	143	*/
	144	__le32 link_ps_bitmap;
	145
	146	/*
	147	* A bitmap (where each bit represents a single HLID) to indicate
	148	* if the station is in Fast mode
	149	*/
	150	__le32 link_fast_bitmap;
	151
	152	/* Cumulative counter of total released mem blocks since FW-reset */
	153	__le32 total_released_blks;
	154
	155	/* Size (in Memory Blocks) of TX pool */
	156	__le32 tx_total;
	157
	158	struct wl12xx_fw_packet_counters counters;
	159
	160	__le32 log_start_addr;
	161	} __packed;
	162
166b2136	163	#endif /* __WL12XX_PRIV_H__ */