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Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
[people/ms/u-boot.git] / drivers / ns87308.c
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c609719b
WD
1/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25
26#ifdef CFG_NS87308
27
28#include <ns87308.h>
29
30void initialise_ns87308 (void)
31{
32#ifdef CFG_NS87308_PS2MOD
33 unsigned char data;
34
35 /*
36 * Switch floppy drive to PS/2 mode.
37 */
38 read_pnp_config(SUPOERIO_CONF1, &data);
39 data &= 0xFB;
40 write_pnp_config(SUPOERIO_CONF1, data);
41#endif
42
43#if (CFG_NS87308_DEVS & CFG_NS87308_KBC1)
44 PNP_SET_DEVICE_BASE(LDEV_KBC1, CFG_NS87308_KBC1_BASE);
45 write_pnp_config(LUN_CONFIG_REG, 0);
46 write_pnp_config(CBASE_HIGH, 0x00);
47 write_pnp_config(CBASE_LOW, 0x64);
48#endif
49
50#if (CFG_NS87308_DEVS & CFG_NS87308_MOUSE)
51 PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
52#endif
53
54#if (CFG_NS87308_DEVS & CFG_NS87308_RTC_APC)
55 PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CFG_NS87308_RTC_BASE);
56#endif
57
58#if (CFG_NS87308_DEVS & CFG_NS87308_FDC)
59 PNP_SET_DEVICE_BASE(LDEV_FDC, CFG_NS87308_FDC_BASE);
60 write_pnp_config(LUN_CONFIG_REG, 0x40);
61#endif
62
63#if (CFG_NS87308_DEVS & CFG_NS87308_RARP)
64 PNP_SET_DEVICE_BASE(LDEV_PARP, CFG_NS87308_LPT_BASE);
65#endif
66
67#if (CFG_NS87308_DEVS & CFG_NS87308_UART1)
68 PNP_SET_DEVICE_BASE(LDEV_UART1, CFG_NS87308_UART1_BASE);
69#endif
70
71#if (CFG_NS87308_DEVS & CFG_NS87308_UART2)
72 PNP_SET_DEVICE_BASE(LDEV_UART2, CFG_NS87308_UART2_BASE);
73#endif
74
75#if (CFG_NS87308_DEVS & CFG_NS87308_GPIO)
76 PNP_SET_DEVICE_BASE(LDEV_GPIO, CFG_NS87308_GPIO_BASE);
77#endif
78
79#if (CFG_NS87308_DEVS & CFG_NS87308_POWRMAN)
80#ifndef CFG_NS87308_PWMAN_BASE
81 PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
82#else
83 PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CFG_NS87308_PWMAN_BASE);
84
85 /*
86 * Enable all units
87 */
88 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
89 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
90
91#ifdef CFG_NS87308_PMC1
92 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC1, CFG_NS87308_PMC1);
93#endif
94
95#ifdef CFG_NS87308_PMC2
96 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC2, CFG_NS87308_PMC2);
97#endif
98
99#ifdef CFG_NS87308_PMC3
100 write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC3, CFG_NS87308_PMC3);
101#endif
102#endif
103#endif
104
105#ifdef CFG_NS87308_CS0_BASE
106 PNP_PGCS_CSLINE_BASE(0, CFG_NS87308_CS0_BASE);
107 PNP_PGCS_CSLINE_CONF(0, CFG_NS87308_CS0_CONF);
108#endif
109
110#ifdef CFG_NS87308_CS1_BASE
111 PNP_PGCS_CSLINE_BASE(1, CFG_NS87308_CS1_BASE);
112 PNP_PGCS_CSLINE_CONF(1, CFG_NS87308_CS1_CONF);
113#endif
114
115#ifdef CFG_NS87308_CS2_BASE
116 PNP_PGCS_CSLINE_BASE(2, CFG_NS87308_CS2_BASE);
117 PNP_PGCS_CSLINE_CONF(2, CFG_NS87308_CS2_CONF);
118#endif
119}
120
121#endif