projects / thirdparty / kernel / stable.git / blame
| Commit | Line | Data |
|---|---|---|
| 1802d0be | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 4c7e4fe3 ACC |
2 | /* |
| 3 | * Copyright (c) 2015 MediaTek Inc. | |
| 4 | * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com> | |
| 4c7e4fe3 ACC |
5 | */ |
| 6 | ||
| 7 | #include <linux/device.h> | |
| 8 | #include <linux/module.h> | |
| ac316725 | 9 | #include <linux/mod_devicetable.h> |
| ba360fd0 | 10 | #include <linux/io.h> |
| 4c7e4fe3 ACC |
11 | #include <linux/nvmem-provider.h> |
| 12 | #include <linux/platform_device.h> | |
| 4c7e4fe3 | 13 | |
| a48f1fff MY |
14 | struct mtk_efuse_priv { |
| 15 | void __iomem *base; | |
| 16 | }; | |
| 17 | ||
| ba360fd0 SK |
18 | static int mtk_reg_read(void *context, |
| 19 | unsigned int reg, void *_val, size_t bytes) | |
| 20 | { | |
| a48f1fff | 21 | struct mtk_efuse_priv *priv = context; |
| ba360fd0 SK |
22 | u32 *val = _val; |
| 23 | int i = 0, words = bytes / 4; | |
| 24 | ||
| 25 | while (words--) | |
| a48f1fff | 26 | *val++ = readl(priv->base + reg + (i++ * 4)); |
| ba360fd0 SK |
27 | |
| 28 | return 0; | |
| 29 | } | |
| 30 | ||
| 31 | static int mtk_reg_write(void *context, | |
| 32 | unsigned int reg, void *_val, size_t bytes) | |
| 33 | { | |
| a48f1fff | 34 | struct mtk_efuse_priv *priv = context; |
| ba360fd0 SK |
35 | u32 *val = _val; |
| 36 | int i = 0, words = bytes / 4; | |
| 37 | ||
| 38 | while (words--) | |
| a48f1fff | 39 | writel(*val++, priv->base + reg + (i++ * 4)); |
| ba360fd0 SK |
40 | |
| 41 | return 0; | |
| 42 | } | |
| 4c7e4fe3 ACC |
43 | |
| 44 | static int mtk_efuse_probe(struct platform_device *pdev) | |
| 45 | { | |
| 46 | struct device *dev = &pdev->dev; | |
| 47 | struct resource *res; | |
| 48 | struct nvmem_device *nvmem; | |
| 4dd5f60e | 49 | struct nvmem_config econfig = {}; |
| a48f1fff MY |
50 | struct mtk_efuse_priv *priv; |
| 51 | ||
| 52 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | |
| 53 | if (!priv) | |
| 54 | return -ENOMEM; | |
| 4c7e4fe3 ACC |
55 | |
| 56 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| a48f1fff MY |
57 | priv->base = devm_ioremap_resource(dev, res); |
| 58 | if (IS_ERR(priv->base)) | |
| 59 | return PTR_ERR(priv->base); | |
| 4c7e4fe3 | 60 | |
| 4dd5f60e MY |
61 | econfig.stride = 4; |
| 62 | econfig.word_size = 4; | |
| 63 | econfig.reg_read = mtk_reg_read; | |
| 64 | econfig.reg_write = mtk_reg_write; | |
| 65 | econfig.size = resource_size(res); | |
| a48f1fff | 66 | econfig.priv = priv; |
| 4dd5f60e | 67 | econfig.dev = dev; |
| 7e68a645 | 68 | nvmem = devm_nvmem_register(dev, &econfig); |
| 4c7e4fe3 | 69 | |
| 7e68a645 | 70 | return PTR_ERR_OR_ZERO(nvmem); |
| 4c7e4fe3 ACC |
71 | } |
| 72 | ||
| 73 | static const struct of_device_id mtk_efuse_of_match[] = { | |
| 74 | { .compatible = "mediatek,mt8173-efuse",}, | |
| 75 | { .compatible = "mediatek,efuse",}, | |
| 76 | {/* sentinel */}, | |
| 77 | }; | |
| 78 | MODULE_DEVICE_TABLE(of, mtk_efuse_of_match); | |
| 79 | ||
| 80 | static struct platform_driver mtk_efuse_driver = { | |
| 81 | .probe = mtk_efuse_probe, | |
| 4c7e4fe3 ACC |
82 | .driver = { |
| 83 | .name = "mediatek,efuse", | |
| 84 | .of_match_table = mtk_efuse_of_match, | |
| 85 | }, | |
| 86 | }; | |
| 564e7f87 ACC |
87 | |
| 88 | static int __init mtk_efuse_init(void) | |
| 89 | { | |
| 90 | int ret; | |
| 91 | ||
| 92 | ret = platform_driver_register(&mtk_efuse_driver); | |
| 93 | if (ret) { | |
| 94 | pr_err("Failed to register efuse driver\n"); | |
| 95 | return ret; | |
| 96 | } | |
| 97 | ||
| 98 | return 0; | |
| 99 | } | |
| 100 | ||
| 101 | static void __exit mtk_efuse_exit(void) | |
| 102 | { | |
| 103 | return platform_driver_unregister(&mtk_efuse_driver); | |
| 104 | } | |
| 105 | ||
| 106 | subsys_initcall(mtk_efuse_init); | |
| 107 | module_exit(mtk_efuse_exit); | |
| 108 | ||
| 4c7e4fe3 ACC |
109 | MODULE_AUTHOR("Andrew-CT Chen <andrew-ct.chen@mediatek.com>"); |
| 110 | MODULE_DESCRIPTION("Mediatek EFUSE driver"); | |
| 111 | MODULE_LICENSE("GPL v2"); |