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Commit | Line | Data |
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6854f87c SG |
1 | /* |
2 | * Copyright (C) 2014 Google, Inc | |
3 | * | |
4 | * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c). | |
5 | * | |
6 | * Modifications are: | |
7 | * Copyright (C) 2003-2004 Linux Networx | |
8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) | |
9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> | |
10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> | |
11 | * Copyright (C) 2005-2006 Tyan | |
12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) | |
13 | * Copyright (C) 2005-2009 coresystems GmbH | |
14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) | |
15 | * | |
16 | * PCI Bus Services, see include/linux/pci.h for further explanation. | |
17 | * | |
18 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, | |
19 | * David Mosberger-Tang | |
20 | * | |
21 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> | |
22 | ||
23 | * SPDX-License-Identifier: GPL-2.0 | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | #include <bios_emul.h> | |
3f4e1e8e | 28 | #include <dm.h> |
6854f87c SG |
29 | #include <errno.h> |
30 | #include <malloc.h> | |
31 | #include <pci.h> | |
32 | #include <pci_rom.h> | |
33 | #include <vbe.h> | |
ee87ee82 | 34 | #include <video.h> |
6854f87c | 35 | #include <video_fb.h> |
a4520022 | 36 | #include <linux/screen_info.h> |
6854f87c | 37 | |
68769ebc BM |
38 | #ifdef CONFIG_X86 |
39 | #include <asm/acpi_s3.h> | |
40 | DECLARE_GLOBAL_DATA_PTR; | |
41 | #endif | |
42 | ||
3f4e1e8e | 43 | __weak bool board_should_run_oprom(struct udevice *dev) |
6854f87c | 44 | { |
68769ebc BM |
45 | #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME) |
46 | if (gd->arch.prev_sleep_state == ACPI_S3) { | |
47 | if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN)) | |
48 | return true; | |
49 | else | |
50 | return false; | |
51 | } | |
52 | #endif | |
53 | ||
6854f87c SG |
54 | return true; |
55 | } | |
56 | ||
f698baa9 | 57 | __weak bool board_should_load_oprom(struct udevice *dev) |
6854f87c | 58 | { |
c0aea6ba | 59 | return true; |
6854f87c SG |
60 | } |
61 | ||
62 | __weak uint32_t board_map_oprom_vendev(uint32_t vendev) | |
63 | { | |
64 | return vendev; | |
65 | } | |
66 | ||
3f4e1e8e | 67 | static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) |
6854f87c | 68 | { |
3f4e1e8e | 69 | struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); |
6854f87c SG |
70 | struct pci_rom_header *rom_header; |
71 | struct pci_rom_data *rom_data; | |
40305240 | 72 | u16 rom_vendor, rom_device; |
d57c2f24 | 73 | u32 rom_class; |
6854f87c SG |
74 | u32 vendev; |
75 | u32 mapped_vendev; | |
76 | u32 rom_address; | |
77 | ||
3f4e1e8e | 78 | vendev = pplat->vendor << 16 | pplat->device; |
6854f87c SG |
79 | mapped_vendev = board_map_oprom_vendev(vendev); |
80 | if (vendev != mapped_vendev) | |
81 | debug("Device ID mapped to %#08x\n", mapped_vendev); | |
82 | ||
786a08e0 BM |
83 | #ifdef CONFIG_VGA_BIOS_ADDR |
84 | rom_address = CONFIG_VGA_BIOS_ADDR; | |
6854f87c | 85 | #else |
4a2708a0 | 86 | |
3f4e1e8e | 87 | dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); |
6854f87c SG |
88 | if (rom_address == 0x00000000 || rom_address == 0xffffffff) { |
89 | debug("%s: rom_address=%x\n", __func__, rom_address); | |
90 | return -ENOENT; | |
91 | } | |
92 | ||
93 | /* Enable expansion ROM address decoding. */ | |
3f4e1e8e SG |
94 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, |
95 | rom_address | PCI_ROM_ADDRESS_ENABLE); | |
6854f87c SG |
96 | #endif |
97 | debug("Option ROM address %x\n", rom_address); | |
ef2d17fe | 98 | rom_header = (struct pci_rom_header *)(unsigned long)rom_address; |
6854f87c SG |
99 | |
100 | debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", | |
40305240 SG |
101 | le16_to_cpu(rom_header->signature), |
102 | rom_header->size * 512, le16_to_cpu(rom_header->data)); | |
6854f87c | 103 | |
40305240 | 104 | if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) { |
6854f87c | 105 | printf("Incorrect expansion ROM header signature %04x\n", |
40305240 | 106 | le16_to_cpu(rom_header->signature)); |
f110da99 BM |
107 | #ifndef CONFIG_VGA_BIOS_ADDR |
108 | /* Disable expansion ROM address decoding */ | |
3f4e1e8e | 109 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address); |
f110da99 | 110 | #endif |
6854f87c SG |
111 | return -EINVAL; |
112 | } | |
113 | ||
40305240 SG |
114 | rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data)); |
115 | rom_vendor = le16_to_cpu(rom_data->vendor); | |
116 | rom_device = le16_to_cpu(rom_data->device); | |
6854f87c SG |
117 | |
118 | debug("PCI ROM image, vendor ID %04x, device ID %04x,\n", | |
40305240 | 119 | rom_vendor, rom_device); |
6854f87c SG |
120 | |
121 | /* If the device id is mapped, a mismatch is expected */ | |
3f4e1e8e | 122 | if ((pplat->vendor != rom_vendor || pplat->device != rom_device) && |
6854f87c SG |
123 | (vendev == mapped_vendev)) { |
124 | printf("ID mismatch: vendor ID %04x, device ID %04x\n", | |
40305240 | 125 | rom_vendor, rom_device); |
c5caba03 | 126 | /* Continue anyway */ |
6854f87c SG |
127 | } |
128 | ||
d57c2f24 BM |
129 | rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo; |
130 | debug("PCI ROM image, Class Code %06x, Code Type %02x\n", | |
131 | rom_class, rom_data->type); | |
6854f87c | 132 | |
3f4e1e8e | 133 | if (pplat->class != rom_class) { |
d57c2f24 | 134 | debug("Class Code mismatch ROM %06x, dev %06x\n", |
3f4e1e8e | 135 | rom_class, pplat->class); |
6854f87c SG |
136 | } |
137 | *hdrp = rom_header; | |
138 | ||
139 | return 0; | |
140 | } | |
141 | ||
d830b152 SG |
142 | /** |
143 | * pci_rom_load() - Load a ROM image and return a pointer to it | |
144 | * | |
145 | * @rom_header: Pointer to ROM image | |
146 | * @ram_headerp: Returns a pointer to the image in RAM | |
147 | * @allocedp: Returns true if @ram_headerp was allocated and needs | |
148 | * to be freed | |
149 | * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of | |
150 | * the error state. Even if this function returns an error, it may have | |
151 | * allocated memory. | |
152 | */ | |
153 | static int pci_rom_load(struct pci_rom_header *rom_header, | |
154 | struct pci_rom_header **ram_headerp, bool *allocedp) | |
6854f87c SG |
155 | { |
156 | struct pci_rom_data *rom_data; | |
157 | unsigned int rom_size; | |
158 | unsigned int image_size = 0; | |
159 | void *target; | |
160 | ||
d830b152 | 161 | *allocedp = false; |
6854f87c SG |
162 | do { |
163 | /* Get next image, until we see an x86 version */ | |
164 | rom_header = (struct pci_rom_header *)((void *)rom_header + | |
165 | image_size); | |
166 | ||
167 | rom_data = (struct pci_rom_data *)((void *)rom_header + | |
40305240 | 168 | le16_to_cpu(rom_header->data)); |
6854f87c | 169 | |
40305240 SG |
170 | image_size = le16_to_cpu(rom_data->ilen) * 512; |
171 | } while ((rom_data->type != 0) && (rom_data->indicator == 0)); | |
6854f87c SG |
172 | |
173 | if (rom_data->type != 0) | |
174 | return -EACCES; | |
175 | ||
176 | rom_size = rom_header->size * 512; | |
177 | ||
bdc88d4e | 178 | #ifdef PCI_VGA_RAM_IMAGE_START |
6854f87c | 179 | target = (void *)PCI_VGA_RAM_IMAGE_START; |
bdc88d4e SG |
180 | #else |
181 | target = (void *)malloc(rom_size); | |
182 | if (!target) | |
183 | return -ENOMEM; | |
d830b152 | 184 | *allocedp = true; |
bdc88d4e | 185 | #endif |
6854f87c | 186 | if (target != rom_header) { |
fba7eac1 SG |
187 | ulong start = get_timer(0); |
188 | ||
6854f87c SG |
189 | debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n", |
190 | rom_header, target, rom_size); | |
191 | memcpy(target, rom_header, rom_size); | |
192 | if (memcmp(target, rom_header, rom_size)) { | |
193 | printf("VGA ROM copy failed\n"); | |
194 | return -EFAULT; | |
195 | } | |
fba7eac1 | 196 | debug("Copy took %lums\n", get_timer(start)); |
6854f87c SG |
197 | } |
198 | *ram_headerp = target; | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
153e1dda | 203 | struct vbe_mode_info mode_info; |
6854f87c SG |
204 | |
205 | int vbe_get_video_info(struct graphic_device *gdev) | |
206 | { | |
207 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE | |
208 | struct vesa_mode_info *vesa = &mode_info.vesa; | |
209 | ||
210 | gdev->winSizeX = vesa->x_resolution; | |
211 | gdev->winSizeY = vesa->y_resolution; | |
212 | ||
213 | gdev->plnSizeX = vesa->x_resolution; | |
214 | gdev->plnSizeY = vesa->y_resolution; | |
215 | ||
216 | gdev->gdfBytesPP = vesa->bits_per_pixel / 8; | |
217 | ||
218 | switch (vesa->bits_per_pixel) { | |
0e98a147 | 219 | case 32: |
6854f87c SG |
220 | case 24: |
221 | gdev->gdfIndex = GDF_32BIT_X888RGB; | |
222 | break; | |
223 | case 16: | |
224 | gdev->gdfIndex = GDF_16BIT_565RGB; | |
225 | break; | |
226 | default: | |
227 | gdev->gdfIndex = GDF__8BIT_INDEX; | |
228 | break; | |
229 | } | |
230 | ||
231 | gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; | |
232 | gdev->pciBase = vesa->phys_base_ptr; | |
233 | ||
234 | gdev->frameAdrs = vesa->phys_base_ptr; | |
235 | gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution; | |
236 | ||
237 | gdev->vprBase = vesa->phys_base_ptr; | |
238 | gdev->cprBase = vesa->phys_base_ptr; | |
239 | ||
23609c71 | 240 | return gdev->winSizeX ? 0 : -ENOSYS; |
6854f87c SG |
241 | #else |
242 | return -ENOSYS; | |
243 | #endif | |
244 | } | |
245 | ||
a4520022 BM |
246 | void setup_video(struct screen_info *screen_info) |
247 | { | |
a4520022 BM |
248 | struct vesa_mode_info *vesa = &mode_info.vesa; |
249 | ||
1e7a0473 BM |
250 | /* Sanity test on VESA parameters */ |
251 | if (!vesa->x_resolution || !vesa->y_resolution) | |
252 | return; | |
253 | ||
a4520022 BM |
254 | screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB; |
255 | ||
256 | screen_info->lfb_width = vesa->x_resolution; | |
257 | screen_info->lfb_height = vesa->y_resolution; | |
258 | screen_info->lfb_depth = vesa->bits_per_pixel; | |
259 | screen_info->lfb_linelength = vesa->bytes_per_scanline; | |
260 | screen_info->lfb_base = vesa->phys_base_ptr; | |
261 | screen_info->lfb_size = | |
262 | ALIGN(screen_info->lfb_linelength * screen_info->lfb_height, | |
263 | 65536); | |
264 | screen_info->lfb_size >>= 16; | |
265 | screen_info->red_size = vesa->red_mask_size; | |
266 | screen_info->red_pos = vesa->red_mask_pos; | |
267 | screen_info->green_size = vesa->green_mask_size; | |
268 | screen_info->green_pos = vesa->green_mask_pos; | |
269 | screen_info->blue_size = vesa->blue_mask_size; | |
270 | screen_info->blue_pos = vesa->blue_mask_pos; | |
271 | screen_info->rsvd_size = vesa->reserved_mask_size; | |
272 | screen_info->rsvd_pos = vesa->reserved_mask_pos; | |
a4520022 BM |
273 | } |
274 | ||
3f4e1e8e SG |
275 | int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), |
276 | int exec_method) | |
6854f87c | 277 | { |
3f4e1e8e | 278 | struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); |
ed48899c | 279 | struct pci_rom_header *rom = NULL, *ram = NULL; |
6854f87c | 280 | int vesa_mode = -1; |
d830b152 | 281 | bool emulate, alloced; |
6854f87c SG |
282 | int ret; |
283 | ||
284 | /* Only execute VGA ROMs */ | |
3f4e1e8e SG |
285 | if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { |
286 | debug("%s: Class %#x, should be %#x\n", __func__, pplat->class, | |
6854f87c SG |
287 | PCI_CLASS_DISPLAY_VGA); |
288 | return -ENODEV; | |
289 | } | |
290 | ||
f698baa9 | 291 | if (!board_should_load_oprom(dev)) |
6854f87c SG |
292 | return -ENXIO; |
293 | ||
3f4e1e8e | 294 | ret = pci_rom_probe(dev, &rom); |
6854f87c SG |
295 | if (ret) |
296 | return ret; | |
297 | ||
d830b152 | 298 | ret = pci_rom_load(rom, &ram, &alloced); |
6854f87c | 299 | if (ret) |
d830b152 | 300 | goto err; |
6854f87c | 301 | |
d830b152 SG |
302 | if (!board_should_run_oprom(dev)) { |
303 | ret = -ENXIO; | |
304 | goto err; | |
305 | } | |
6854f87c SG |
306 | |
307 | #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \ | |
308 | defined(CONFIG_FRAMEBUFFER_VESA_MODE) | |
309 | vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; | |
310 | #endif | |
9a99caf3 | 311 | debug("Selected vesa mode %#x\n", vesa_mode); |
bc17d8f4 SG |
312 | |
313 | if (exec_method & PCI_ROM_USE_NATIVE) { | |
314 | #ifdef CONFIG_X86 | |
315 | emulate = false; | |
316 | #else | |
317 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { | |
318 | printf("BIOS native execution is only available on x86\n"); | |
d830b152 SG |
319 | ret = -ENOSYS; |
320 | goto err; | |
bc17d8f4 SG |
321 | } |
322 | emulate = true; | |
323 | #endif | |
324 | } else { | |
325 | #ifdef CONFIG_BIOSEMU | |
326 | emulate = true; | |
327 | #else | |
328 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { | |
329 | printf("BIOS emulation not available - see CONFIG_BIOSEMU\n"); | |
d830b152 SG |
330 | ret = -ENOSYS; |
331 | goto err; | |
bc17d8f4 SG |
332 | } |
333 | emulate = false; | |
334 | #endif | |
335 | } | |
336 | ||
6854f87c SG |
337 | if (emulate) { |
338 | #ifdef CONFIG_BIOSEMU | |
339 | BE_VGAInfo *info; | |
340 | ||
7282672d | 341 | ret = biosemu_setup(dev, &info); |
6854f87c | 342 | if (ret) |
d830b152 | 343 | goto err; |
6854f87c | 344 | biosemu_set_interrupt_handler(0x15, int15_handler); |
7282672d SG |
345 | ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, |
346 | true, vesa_mode, &mode_info); | |
6854f87c | 347 | if (ret) |
d830b152 | 348 | goto err; |
6854f87c SG |
349 | #endif |
350 | } else { | |
05cbd985 | 351 | #if defined(CONFIG_X86) && CONFIG_IS_ENABLED(X86_32BIT_INIT) |
6854f87c SG |
352 | bios_set_interrupt_handler(0x15, int15_handler); |
353 | ||
8beb0bda SG |
354 | bios_run_on_x86(dev, (unsigned long)ram, vesa_mode, |
355 | &mode_info); | |
6854f87c SG |
356 | #endif |
357 | } | |
9a99caf3 | 358 | debug("Final vesa mode %#x\n", mode_info.video_mode); |
d830b152 | 359 | ret = 0; |
6854f87c | 360 | |
d830b152 SG |
361 | err: |
362 | if (alloced) | |
363 | free(ram); | |
364 | return ret; | |
6854f87c | 365 | } |
ee87ee82 SG |
366 | |
367 | #ifdef CONFIG_DM_VIDEO | |
5f6ad029 BM |
368 | int vbe_setup_video_priv(struct vesa_mode_info *vesa, |
369 | struct video_priv *uc_priv, | |
370 | struct video_uc_platdata *plat) | |
ee87ee82 SG |
371 | { |
372 | if (!vesa->x_resolution) | |
373 | return -ENXIO; | |
374 | uc_priv->xsize = vesa->x_resolution; | |
375 | uc_priv->ysize = vesa->y_resolution; | |
376 | switch (vesa->bits_per_pixel) { | |
377 | case 32: | |
378 | case 24: | |
379 | uc_priv->bpix = VIDEO_BPP32; | |
380 | break; | |
381 | case 16: | |
382 | uc_priv->bpix = VIDEO_BPP16; | |
383 | break; | |
384 | default: | |
385 | return -EPROTONOSUPPORT; | |
386 | } | |
387 | plat->base = vesa->phys_base_ptr; | |
388 | plat->size = vesa->bytes_per_scanline * vesa->y_resolution; | |
389 | ||
390 | return 0; | |
391 | } | |
392 | ||
393 | int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void)) | |
394 | { | |
395 | struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); | |
396 | struct video_priv *uc_priv = dev_get_uclass_priv(dev); | |
397 | int ret; | |
398 | ||
f0920e4a BM |
399 | printf("Video: "); |
400 | ||
ee87ee82 | 401 | /* If we are running from EFI or coreboot, this can't work */ |
f0920e4a BM |
402 | if (!ll_boot_init()) { |
403 | printf("Not available (previous bootloader prevents it)\n"); | |
ee87ee82 | 404 | return -EPERM; |
f0920e4a | 405 | } |
ee87ee82 SG |
406 | bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display"); |
407 | ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE | | |
408 | PCI_ROM_ALLOW_FALLBACK); | |
409 | bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD); | |
410 | if (ret) { | |
411 | debug("failed to run video BIOS: %d\n", ret); | |
412 | return ret; | |
413 | } | |
414 | ||
415 | ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat); | |
416 | if (ret) { | |
417 | debug("No video mode configured\n"); | |
418 | return ret; | |
419 | } | |
420 | ||
f0920e4a BM |
421 | printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, |
422 | mode_info.vesa.bits_per_pixel); | |
423 | ||
ee87ee82 SG |
424 | return 0; |
425 | } | |
426 | #endif |