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7328c8f4 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
df62ab5e 3 * PCI ROM access routines
1da177e4
LT
4 *
5 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
6 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
1da177e4 7 */
1da177e4 8#include <linux/kernel.h>
363c75db 9#include <linux/export.h>
1da177e4 10#include <linux/pci.h>
4e57b681 11#include <linux/slab.h>
1da177e4
LT
12
13#include "pci.h"
14
15/**
16 * pci_enable_rom - enable ROM decoding for a PCI device
67be2dd1 17 * @pdev: PCI device to enable
1da177e4
LT
18 *
19 * Enable ROM decoding on @dev. This involves simply turning on the last
20 * bit of the PCI ROM BAR. Note that some cards may share address decoders
21 * between the ROM and other resources, so enabling it may disable access
22 * to MMIO registers or other card memory.
23 */
e416de5e 24int pci_enable_rom(struct pci_dev *pdev)
1da177e4 25{
4708f9a5 26 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
8085ce08 27 struct pci_bus_region region;
1da177e4
LT
28 u32 rom_addr;
29
8085ce08
BH
30 if (!res->flags)
31 return -1;
32
4708f9a5
BH
33 /* Nothing to enable if we're using a shadow copy in RAM */
34 if (res->flags & IORESOURCE_ROM_SHADOW)
35 return 0;
36
0b457dde
BH
37 /*
38 * Ideally pci_update_resource() would update the ROM BAR address,
39 * and we would only set the enable bit here. But apparently some
40 * devices have buggy ROM BARs that read as zero when disabled.
41 */
fc279850 42 pcibios_resource_to_bus(pdev->bus, &region, res);
1da177e4 43 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
8085ce08
BH
44 rom_addr &= ~PCI_ROM_ADDRESS_MASK;
45 rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
1da177e4 46 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
8085ce08 47 return 0;
1da177e4 48}
b7fe9434 49EXPORT_SYMBOL_GPL(pci_enable_rom);
1da177e4
LT
50
51/**
52 * pci_disable_rom - disable ROM decoding for a PCI device
67be2dd1 53 * @pdev: PCI device to disable
1da177e4
LT
54 *
55 * Disable ROM decoding on a PCI device by turning off the last bit in the
56 * ROM BAR.
57 */
e416de5e 58void pci_disable_rom(struct pci_dev *pdev)
1da177e4 59{
4708f9a5 60 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
1da177e4 61 u32 rom_addr;
4708f9a5
BH
62
63 if (res->flags & IORESOURCE_ROM_SHADOW)
64 return;
65
1da177e4
LT
66 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
67 rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
68 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
69}
b7fe9434 70EXPORT_SYMBOL_GPL(pci_disable_rom);
1da177e4 71
d7ad2254
JK
72/**
73 * pci_get_rom_size - obtain the actual size of the ROM image
4cc59c72 74 * @pdev: target PCI device
d7ad2254
JK
75 * @rom: kernel virtual pointer to image of ROM
76 * @size: size of PCI window
77 * return: size of actual ROM image
78 *
79 * Determine the actual length of the ROM image.
80 * The PCI window size could be much larger than the
81 * actual image size.
82 */
783e8496
BH
83static size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom,
84 size_t size)
d7ad2254
JK
85{
86 void __iomem *image;
87 int last_image;
16b036af 88 unsigned length;
d7ad2254
JK
89
90 image = rom;
91 do {
92 void __iomem *pds;
93 /* Standard PCI ROMs start out with these bytes 55 AA */
4066df63 94 if (readw(image) != 0xAA55) {
414ae760
BH
95 pci_info(pdev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n",
96 readw(image));
d7ad2254 97 break;
97c44836 98 }
4066df63 99 /* get the PCI data structure and check its "PCIR" signature */
d7ad2254 100 pds = image + readw(image + 24);
4066df63 101 if (readl(pds) != 0x52494350) {
414ae760
BH
102 pci_info(pdev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n",
103 readl(pds));
d7ad2254 104 break;
4066df63 105 }
d7ad2254 106 last_image = readb(pds + 21) & 0x80;
16b036af
MD
107 length = readw(pds + 16);
108 image += length * 512;
47b975d2 109 /* Avoid iterating through memory outside the resource window */
445ec321 110 if (image >= rom + size)
47b975d2 111 break;
beced88e
RZ
112 if (!last_image) {
113 if (readw(image) != 0xAA55) {
114 pci_info(pdev, "No more image in the PCI ROM\n");
115 break;
116 }
117 }
16b036af 118 } while (length && !last_image);
d7ad2254
JK
119
120 /* never return a size larger than the PCI resource window */
121 /* there are known ROMs that get the size wrong */
122 return min((size_t)(image - rom), size);
123}
124
1da177e4
LT
125/**
126 * pci_map_rom - map a PCI ROM to kernel space
67be2dd1 127 * @pdev: pointer to pci device struct
1da177e4 128 * @size: pointer to receive size of pci window over ROM
f5dafca5
RD
129 *
130 * Return: kernel virtual pointer to image of ROM
1da177e4
LT
131 *
132 * Map a PCI ROM into kernel space. If ROM is boot video ROM,
133 * the shadow BIOS copy will be returned instead of the
134 * actual ROM.
135 */
136void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
137{
138 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
fffe01f7 139 loff_t start;
1da177e4 140 void __iomem *rom;
1da177e4 141
f50dd8c3
BH
142 /* assign the ROM an address if it doesn't have one */
143 if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE))
144 return NULL;
145
146 start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
147 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
148 if (*size == 0)
149 return NULL;
150
151 /* Enable ROM space decodes */
152 if (pci_enable_rom(pdev))
153 return NULL;
547b5246 154
1da177e4 155 rom = ioremap(start, *size);
a48a687d
CD
156 if (!rom)
157 goto err_ioremap;
1da177e4
LT
158
159 /*
160 * Try to find the true size of the ROM since sometimes the PCI window
161 * size is much larger than the actual size of the ROM.
162 * True size is important if the ROM is going to be copied.
163 */
97c44836 164 *size = pci_get_rom_size(pdev, rom, *size);
a405f191
CD
165 if (!*size)
166 goto invalid_rom;
167
1da177e4 168 return rom;
a48a687d 169
a405f191
CD
170invalid_rom:
171 iounmap(rom);
a48a687d
CD
172err_ioremap:
173 /* restore enable if ioremap fails */
174 if (!(res->flags & IORESOURCE_ROM_ENABLE))
175 pci_disable_rom(pdev);
176 return NULL;
1da177e4 177}
b7fe9434 178EXPORT_SYMBOL(pci_map_rom);
1da177e4 179
1da177e4
LT
180/**
181 * pci_unmap_rom - unmap the ROM from kernel space
67be2dd1 182 * @pdev: pointer to pci device struct
1da177e4
LT
183 * @rom: virtual address of the previous mapping
184 *
185 * Remove a mapping of a previously mapped ROM
186 */
187void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
188{
189 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
190
fffe01f7 191 iounmap(rom);
1da177e4 192
4708f9a5
BH
193 /* Disable again before continuing */
194 if (!(res->flags & IORESOURCE_ROM_ENABLE))
1da177e4
LT
195 pci_disable_rom(pdev);
196}
b7fe9434 197EXPORT_SYMBOL(pci_unmap_rom);
1da177e4 198
fffe01f7
MG
199/**
200 * pci_platform_rom - provides a pointer to any ROM image provided by the
201 * platform
202 * @pdev: pointer to pci device struct
203 * @size: pointer to receive size of pci window over ROM
204 */
205void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
206{
207 if (pdev->rom && pdev->romlen) {
208 *size = pdev->romlen;
209 return phys_to_virt((phys_addr_t)pdev->rom);
210 }
211
212 return NULL;
213}
fffe01f7 214EXPORT_SYMBOL(pci_platform_rom);