[people/ms/u-boot.git] / drivers / pinctrl / uniphier / pinctrl-uniphier.h

/*
 * Copyright (C) 2015-2016 Socionext Inc.
 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __PINCTRL_UNIPHIER_H__
#define __PINCTRL_UNIPHIER_H__

#include <linux/bitops.h>
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/types.h>

#define UNIPHIER_PIN_ATTR_PACKED(iectrl)	(iectrl)

static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
{
	return data;
}

/**
 * struct uniphier_pinctrl_pin - pin data for UniPhier SoC
 *
 * @number: pin number
 * @data: additional per-pin data
 */
struct uniphier_pinctrl_pin {
	unsigned number;
	unsigned long data;
};

/**
 * struct uniphier_pinctrl_group - pin group data for UniPhier SoC
 *
 * @name: pin group name
 * @pins: array of pins that belong to the group
 * @num_pins: number of pins in the group
 * @muxvals: array of values to be set to pinmux registers
 */
struct uniphier_pinctrl_group {
	const char *name;
	const unsigned *pins;
	unsigned num_pins;
	const int *muxvals;
};

/**
 * struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
 *
 * @pins: array of pin data
 * @pins_count: number of pin data
 * @groups: array of pin group data
 * @groups_count: number of pin group data
 * @functions: array of pinmux function names
 * @functions_count: number of pinmux functions
 * @mux_bits: bit width of each pinmux register
 * @reg_stride: stride of pinmux register address
 * @caps: SoC-specific capability flag
 */
struct uniphier_pinctrl_socdata {
	const struct uniphier_pinctrl_pin *pins;
	int pins_count;
	const struct uniphier_pinctrl_group *groups;
	int groups_count;
	const char * const *functions;
	int functions_count;
	unsigned caps;
#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	BIT(2)
#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	BIT(1)
#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT		BIT(0)
};

#define UNIPHIER_PINCTRL_PIN(a, b)					\
{									\
	.number = a,							\
	.data = UNIPHIER_PIN_ATTR_PACKED(b),				\
}

#define __UNIPHIER_PINCTRL_GROUP(grp)					\
	{								\
		.name = #grp,						\
		.pins = grp##_pins,					\
		.num_pins = ARRAY_SIZE(grp##_pins),			\
		.muxvals = grp##_muxvals +				\
			BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) !=	\
					  ARRAY_SIZE(grp##_muxvals)),	\
	}

#define __UNIPHIER_PINMUX_FUNCTION(func)	#func

#ifdef CONFIG_SPL_BUILD
#define UNIPHIER_PINCTRL_GROUP(grp)		{ .name = NULL }
#define UNIPHIER_PINMUX_FUNCTION(func)		NULL
#else
#define UNIPHIER_PINCTRL_GROUP(grp)		__UNIPHIER_PINCTRL_GROUP(grp)
#define UNIPHIER_PINMUX_FUNCTION(func)		__UNIPHIER_PINMUX_FUNCTION(func)
#endif

#define UNIPHIER_PINCTRL_GROUP_SPL(grp)		__UNIPHIER_PINCTRL_GROUP(grp)
#define UNIPHIER_PINMUX_FUNCTION_SPL(func)	__UNIPHIER_PINMUX_FUNCTION(func)

/**
 * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
 *
 * @base: base address of the pinctrl device
 * @socdata: SoC specific data
 */
struct uniphier_pinctrl_priv {
	void __iomem *base;
	struct uniphier_pinctrl_socdata *socdata;
};

extern const struct pinctrl_ops uniphier_pinctrl_ops;

int uniphier_pinctrl_probe(struct udevice *dev,
			   struct uniphier_pinctrl_socdata *socdata);

#endif /* __PINCTRL_UNIPHIER_H__ */
Commit	Line	Data
5dc626f8	1	/*
4e3d8406 MY	2	* Copyright (C) 2015-2016 Socionext Inc.
4e3d8406 MY	3	* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5dc626f8 MY	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
	8	#ifndef __PINCTRL_UNIPHIER_H__
	9	#define __PINCTRL_UNIPHIER_H__
	10
8cc92b99	11	#include <linux/bitops.h>
84b8bf6d	12	#include <linux/bug.h>
5dc626f8 MY	13	#include <linux/kernel.h>
	14	#include <linux/types.h>
	15
5dc626f8 MY	16	#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl)
	17
	18	static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
	19	{
	20	return data;
	21	}
	22
	23	/**
	24	* struct uniphier_pinctrl_pin - pin data for UniPhier SoC
	25	*
	26	* @number: pin number
	27	* @data: additional per-pin data
	28	*/
	29	struct uniphier_pinctrl_pin {
	30	unsigned number;
	31	unsigned long data;
	32	};
	33
	34	/**
	35	* struct uniphier_pinctrl_group - pin group data for UniPhier SoC
	36	*
	37	* @name: pin group name
	38	* @pins: array of pins that belong to the group
	39	* @num_pins: number of pins in the group
	40	* @muxvals: array of values to be set to pinmux registers
	41	*/
	42	struct uniphier_pinctrl_group {
	43	const char *name;
	44	const unsigned *pins;
	45	unsigned num_pins;
5e25b9d5	46	const int *muxvals;
5dc626f8 MY	47	};
	48
	49	/**
	50	* struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
	51	*
	52	* @pins: array of pin data
	53	* @pins_count: number of pin data
	54	* @groups: array of pin group data
	55	* @groups_count: number of pin group data
	56	* @functions: array of pinmux function names
	57	* @functions_count: number of pinmux functions
	58	* @mux_bits: bit width of each pinmux register
	59	* @reg_stride: stride of pinmux register address
8cc92b99	60	* @caps: SoC-specific capability flag
5dc626f8 MY	61	*/
	62	struct uniphier_pinctrl_socdata {
	63	const struct uniphier_pinctrl_pin *pins;
	64	int pins_count;
	65	const struct uniphier_pinctrl_group *groups;
	66	int groups_count;
	67	const char * const *functions;
	68	int functions_count;
8cc92b99	69	unsigned caps;
bbb11980 MY	70	#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2)
	71	#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1)
	72	#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
5dc626f8 MY	73	};
	74
	75	#define UNIPHIER_PINCTRL_PIN(a, b) \
	76	{ \
	77	.number = a, \
	78	.data = UNIPHIER_PIN_ATTR_PACKED(b), \
	79	}
	80
64c1cc4c	81	#define __UNIPHIER_PINCTRL_GROUP(grp) \
5dc626f8 MY	82	{ \
	83	.name = #grp, \
	84	.pins = grp##_pins, \
	85	.num_pins = ARRAY_SIZE(grp##_pins), \
	86	.muxvals = grp##_muxvals + \
	87	BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
	88	ARRAY_SIZE(grp##_muxvals)), \
	89	}
	90
64c1cc4c MY	91	#define __UNIPHIER_PINMUX_FUNCTION(func) #func
	92
	93	#ifdef CONFIG_SPL_BUILD
	94	#define UNIPHIER_PINCTRL_GROUP(grp) { .name = NULL }
	95	#define UNIPHIER_PINMUX_FUNCTION(func) NULL
	96	#else
	97	#define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp)
	98	#define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func)
	99	#endif
	100
	101	#define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp)
	102	#define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func)
	103
5dc626f8 MY	104	/**
	105	* struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
	106	*
	107	* @base: base address of the pinctrl device
	108	* @socdata: SoC specific data
	109	*/
	110	struct uniphier_pinctrl_priv {
	111	void __iomem *base;
	112	struct uniphier_pinctrl_socdata *socdata;
	113	};
	114
	115	extern const struct pinctrl_ops uniphier_pinctrl_ops;
	116
	117	int uniphier_pinctrl_probe(struct udevice *dev,
	118	struct uniphier_pinctrl_socdata *socdata);
	119
5dc626f8	120	#endif /* __PINCTRL_UNIPHIER_H__ */