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Commit | Line | Data |
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6c51df68 SG |
1 | config RAM |
2 | bool "Enable RAM drivers using Driver Model" | |
3 | depends on DM | |
4 | help | |
5 | This allows drivers to be provided for SDRAM and other RAM | |
6 | controllers and their type to be specified in the board's device | |
7 | tree. Generally some parameters are required to set up the RAM and | |
8 | the RAM size can either be statically defined or dynamically | |
9 | detected. | |
10 | ||
40c9abbd | 11 | config SPL_RAM |
6c51df68 | 12 | bool "Enable RAM support in SPL" |
45233301 | 13 | depends on RAM && SPL_DM |
6c51df68 SG |
14 | help |
15 | The RAM subsystem adds a small amount of overhead to the image. | |
16 | If this is acceptable and you have a need to use RAM drivers in | |
17 | SPL, enable this option. It might provide a cleaner interface to | |
18 | setting up RAM (e.g. SDRAM / DDR) within SPL. | |
bf1ae442 | 19 | |
c336c3c3 | 20 | config TPL_RAM |
93fd5b0a | 21 | bool "Enable RAM support in TPL" |
8bea4bf7 | 22 | depends on RAM && TPL |
c336c3c3 PT |
23 | help |
24 | The RAM subsystem adds a small amount of overhead to the image. | |
25 | If this is acceptable and you have a need to use RAM drivers in | |
26 | TPL, enable this option. It might provide a cleaner interface to | |
27 | setting up RAM (e.g. SDRAM / DDR) within TPL. | |
28 | ||
bf1ae442 VM |
29 | config STM32_SDRAM |
30 | bool "Enable STM32 SDRAM support" | |
31 | depends on RAM | |
32 | help | |
33 | STM32F7 family devices support flexible memory controller(FMC) to | |
34 | support external memories like sdram, psram & nand. | |
35 | This driver is for the sdram memory interface with the FMC. | |
e70f70aa | 36 | |
e4061556 MS |
37 | config MPC83XX_SDRAM |
38 | bool "Enable MPC83XX SDRAM support" | |
39 | depends on RAM | |
40 | help | |
41 | Enable support for the internal DDR Memory Controller of the MPC83xx | |
42 | family of SoCs. Both static configurations, as well as configuring | |
43 | the RAM through the use of SPD (Serial Presence Detect) is supported | |
44 | via device tree settings. | |
45 | ||
06bda125 LV |
46 | config K3_AM654_DDRSS |
47 | bool "Enable AM654 DDRSS support" | |
80b93bb7 | 48 | depends on RAM && SOC_K3_AM654 |
06bda125 LV |
49 | help |
50 | K3 based AM654 devices has DDR memory subsystem that comprises | |
51 | Synopys DDR controller, Synopsis DDR phy and wrapper logic to | |
52 | intergrate these blocks into the device. This DDR subsystem | |
53 | provides an interface to external SDRAM devices. Enabling this | |
54 | config add support for the initialization of the external | |
55 | SDRAM devices connected to DDR subsystem. | |
56 | ||
db243813 DG |
57 | config K3_DDRSS |
58 | bool "Enable K3 DDRSS support" | |
59 | depends on RAM | |
60 | ||
61 | choice | |
62 | depends on K3_DDRSS | |
63 | prompt "K3 DDRSS Arch Support" | |
64 | ||
20d05541 | 65 | default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4 |
9f9b5c1c | 66 | default K3_AM64_DDRSS if SOC_K3_AM642 |
d98e8600 | 67 | default K3_AM64_DDRSS if SOC_K3_AM625 |
f54febe1 | 68 | default K3_AM62A_DDRSS if SOC_K3_AM62A7 |
9f9b5c1c | 69 | |
3bb3f266 KS |
70 | config K3_J721E_DDRSS |
71 | bool "Enable J721E DDRSS support" | |
3bb3f266 KS |
72 | help |
73 | The J721E DDR subsystem comprises DDR controller, DDR PHY and | |
74 | wrapper logic to integrate these blocks in the device. The DDR | |
75 | subsystem is used to provide an interface to external SDRAM | |
76 | devices which can be utilized for storing program or data. | |
77 | Enabling this config adds support for the DDR memory controller | |
78 | on J721E family of SoCs. | |
79 | ||
9f9b5c1c DG |
80 | config K3_AM64_DDRSS |
81 | bool "Enable AM64 DDRSS support" | |
82 | help | |
83 | The AM64 DDR subsystem comprises DDR controller, DDR PHY and | |
84 | wrapper logic to integrate these blocks in the device. The DDR | |
85 | subsystem is used to provide an interface to external SDRAM | |
86 | devices which can be utilized for storing program or data. | |
87 | Enabling this config adds support for the DDR memory controller | |
88 | on AM642 family of SoCs. | |
89 | ||
ee31be42 BB |
90 | config K3_AM62A_DDRSS |
91 | bool "Enable AM62A DDRSS support" | |
92 | help | |
93 | The AM62A DDR subsystem comprises of a DDR controller, DDR PHY and | |
94 | wrapper logic to integrate these blocks into once device. The DDR | |
95 | subsystem is used to provide an interface to external SDRAM devices | |
96 | which can be utilized for storing programs or any other data. | |
97 | Enabling this option adds support for the DDR memory controller for | |
98 | the AM62A family of SoCs. | |
99 | ||
db243813 DG |
100 | endchoice |
101 | ||
cd647fc4 GB |
102 | config IMXRT_SDRAM |
103 | bool "Enable i.MXRT SDRAM support" | |
104 | depends on RAM | |
105 | help | |
106 | i.MXRT family devices support smart external memory controller(SEMC) | |
107 | to support external memories like sdram, psram & nand. | |
108 | This driver is for the sdram memory interface with the SEMC. | |
109 | ||
0474050d | 110 | source "drivers/ram/aspeed/Kconfig" |
2d67a095 | 111 | source "drivers/ram/cadence/Kconfig" |
8bddb974 | 112 | source "drivers/ram/octeon/Kconfig" |
82ee138d | 113 | source "drivers/ram/rockchip/Kconfig" |
c514a94a | 114 | source "drivers/ram/sifive/Kconfig" |
e70f70aa | 115 | source "drivers/ram/stm32mp1/Kconfig" |
60abbadf | 116 | source "drivers/ram/starfive/Kconfig" |
8bddb974 | 117 | source "drivers/ram/sunxi/Kconfig" |