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Commit | Line | Data |
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b9e718e9 | 1 | /* |
90a068ed | 2 | * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996 |
b9e718e9 BA |
3 | * |
4 | * Copyright (C) 2016 Linaro Ltd | |
5 | * Copyright (C) 2014 Sony Mobile Communications AB | |
6 | * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
f33a7358 | 18 | #include <linux/clk.h> |
b9e718e9 BA |
19 | #include <linux/firmware.h> |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/of_address.h> | |
24 | #include <linux/of_device.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/qcom_scm.h> | |
27 | #include <linux/regulator/consumer.h> | |
28 | #include <linux/remoteproc.h> | |
2aad40d9 | 29 | #include <linux/soc/qcom/mdt_loader.h> |
b9e718e9 BA |
30 | #include <linux/soc/qcom/smem.h> |
31 | #include <linux/soc/qcom/smem_state.h> | |
32 | ||
bde440ee | 33 | #include "qcom_common.h" |
6103b1a6 | 34 | #include "qcom_q6v5.h" |
b9e718e9 BA |
35 | #include "remoteproc_internal.h" |
36 | ||
c7715e47 AKD |
37 | struct adsp_data { |
38 | int crash_reason_smem; | |
39 | const char *firmware_name; | |
40 | int pas_id; | |
e323fc03 | 41 | bool has_aggre2_clk; |
1fb82ee8 | 42 | |
1e140df0 | 43 | const char *ssr_name; |
1fb82ee8 BA |
44 | const char *sysmon_name; |
45 | int ssctl_id; | |
c7715e47 | 46 | }; |
b9e718e9 BA |
47 | |
48 | struct qcom_adsp { | |
49 | struct device *dev; | |
50 | struct rproc *rproc; | |
51 | ||
6103b1a6 | 52 | struct qcom_q6v5 q6v5; |
b9e718e9 | 53 | |
f33a7358 | 54 | struct clk *xo; |
e323fc03 | 55 | struct clk *aggre2_clk; |
f33a7358 | 56 | |
b9e718e9 | 57 | struct regulator *cx_supply; |
e323fc03 | 58 | struct regulator *px_supply; |
b9e718e9 | 59 | |
c7715e47 AKD |
60 | int pas_id; |
61 | int crash_reason_smem; | |
e323fc03 | 62 | bool has_aggre2_clk; |
c7715e47 | 63 | |
b9e718e9 BA |
64 | struct completion start_done; |
65 | struct completion stop_done; | |
66 | ||
67 | phys_addr_t mem_phys; | |
68 | phys_addr_t mem_reloc; | |
69 | void *mem_region; | |
70 | size_t mem_size; | |
4b48921a | 71 | |
eea07023 | 72 | struct qcom_rproc_glink glink_subdev; |
4b48921a | 73 | struct qcom_rproc_subdev smd_subdev; |
1e140df0 | 74 | struct qcom_rproc_ssr ssr_subdev; |
1fb82ee8 | 75 | struct qcom_sysmon *sysmon; |
b9e718e9 BA |
76 | }; |
77 | ||
78 | static int adsp_load(struct rproc *rproc, const struct firmware *fw) | |
79 | { | |
80 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
b9e718e9 | 81 | |
7f0dd07a | 82 | return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id, |
4dd27f54 BA |
83 | adsp->mem_region, adsp->mem_phys, adsp->mem_size, |
84 | &adsp->mem_reloc); | |
85 | ||
b9e718e9 BA |
86 | } |
87 | ||
b9e718e9 BA |
88 | static int adsp_start(struct rproc *rproc) |
89 | { | |
90 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
91 | int ret; | |
92 | ||
6103b1a6 BA |
93 | qcom_q6v5_prepare(&adsp->q6v5); |
94 | ||
f33a7358 | 95 | ret = clk_prepare_enable(adsp->xo); |
b9e718e9 BA |
96 | if (ret) |
97 | return ret; | |
98 | ||
e323fc03 AKD |
99 | ret = clk_prepare_enable(adsp->aggre2_clk); |
100 | if (ret) | |
101 | goto disable_xo_clk; | |
102 | ||
f33a7358 SJ |
103 | ret = regulator_enable(adsp->cx_supply); |
104 | if (ret) | |
e323fc03 AKD |
105 | goto disable_aggre2_clk; |
106 | ||
107 | ret = regulator_enable(adsp->px_supply); | |
108 | if (ret) | |
109 | goto disable_cx_supply; | |
f33a7358 | 110 | |
c7715e47 | 111 | ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); |
b9e718e9 BA |
112 | if (ret) { |
113 | dev_err(adsp->dev, | |
114 | "failed to authenticate image and release reset\n"); | |
e323fc03 | 115 | goto disable_px_supply; |
b9e718e9 BA |
116 | } |
117 | ||
6103b1a6 BA |
118 | ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); |
119 | if (ret == -ETIMEDOUT) { | |
b9e718e9 | 120 | dev_err(adsp->dev, "start timed out\n"); |
c7715e47 | 121 | qcom_scm_pas_shutdown(adsp->pas_id); |
e323fc03 | 122 | goto disable_px_supply; |
b9e718e9 BA |
123 | } |
124 | ||
6103b1a6 | 125 | return 0; |
b9e718e9 | 126 | |
e323fc03 AKD |
127 | disable_px_supply: |
128 | regulator_disable(adsp->px_supply); | |
129 | disable_cx_supply: | |
b9e718e9 | 130 | regulator_disable(adsp->cx_supply); |
e323fc03 AKD |
131 | disable_aggre2_clk: |
132 | clk_disable_unprepare(adsp->aggre2_clk); | |
133 | disable_xo_clk: | |
f33a7358 | 134 | clk_disable_unprepare(adsp->xo); |
b9e718e9 BA |
135 | |
136 | return ret; | |
137 | } | |
138 | ||
6103b1a6 BA |
139 | static void qcom_pas_handover(struct qcom_q6v5 *q6v5) |
140 | { | |
141 | struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); | |
142 | ||
143 | regulator_disable(adsp->px_supply); | |
144 | regulator_disable(adsp->cx_supply); | |
145 | clk_disable_unprepare(adsp->aggre2_clk); | |
146 | clk_disable_unprepare(adsp->xo); | |
147 | } | |
148 | ||
b9e718e9 BA |
149 | static int adsp_stop(struct rproc *rproc) |
150 | { | |
151 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
6103b1a6 | 152 | int handover; |
b9e718e9 BA |
153 | int ret; |
154 | ||
6103b1a6 BA |
155 | ret = qcom_q6v5_request_stop(&adsp->q6v5); |
156 | if (ret == -ETIMEDOUT) | |
b9e718e9 BA |
157 | dev_err(adsp->dev, "timed out on wait\n"); |
158 | ||
c7715e47 | 159 | ret = qcom_scm_pas_shutdown(adsp->pas_id); |
b9e718e9 BA |
160 | if (ret) |
161 | dev_err(adsp->dev, "failed to shutdown: %d\n", ret); | |
162 | ||
6103b1a6 BA |
163 | handover = qcom_q6v5_unprepare(&adsp->q6v5); |
164 | if (handover) | |
165 | qcom_pas_handover(&adsp->q6v5); | |
166 | ||
b9e718e9 BA |
167 | return ret; |
168 | } | |
169 | ||
170 | static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len) | |
171 | { | |
172 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
173 | int offset; | |
174 | ||
175 | offset = da - adsp->mem_reloc; | |
176 | if (offset < 0 || offset + len > adsp->mem_size) | |
177 | return NULL; | |
178 | ||
179 | return adsp->mem_region + offset; | |
180 | } | |
181 | ||
182 | static const struct rproc_ops adsp_ops = { | |
183 | .start = adsp_start, | |
184 | .stop = adsp_stop, | |
185 | .da_to_va = adsp_da_to_va, | |
dcb57ed4 | 186 | .parse_fw = qcom_register_dump_segments, |
0f21f9cc | 187 | .load = adsp_load, |
b9e718e9 BA |
188 | }; |
189 | ||
f33a7358 SJ |
190 | static int adsp_init_clock(struct qcom_adsp *adsp) |
191 | { | |
192 | int ret; | |
193 | ||
194 | adsp->xo = devm_clk_get(adsp->dev, "xo"); | |
195 | if (IS_ERR(adsp->xo)) { | |
196 | ret = PTR_ERR(adsp->xo); | |
197 | if (ret != -EPROBE_DEFER) | |
198 | dev_err(adsp->dev, "failed to get xo clock"); | |
199 | return ret; | |
200 | } | |
201 | ||
e323fc03 AKD |
202 | if (adsp->has_aggre2_clk) { |
203 | adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2"); | |
204 | if (IS_ERR(adsp->aggre2_clk)) { | |
205 | ret = PTR_ERR(adsp->aggre2_clk); | |
206 | if (ret != -EPROBE_DEFER) | |
207 | dev_err(adsp->dev, | |
208 | "failed to get aggre2 clock"); | |
209 | return ret; | |
210 | } | |
211 | } | |
212 | ||
f33a7358 SJ |
213 | return 0; |
214 | } | |
215 | ||
b9e718e9 BA |
216 | static int adsp_init_regulator(struct qcom_adsp *adsp) |
217 | { | |
218 | adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); | |
219 | if (IS_ERR(adsp->cx_supply)) | |
220 | return PTR_ERR(adsp->cx_supply); | |
221 | ||
222 | regulator_set_load(adsp->cx_supply, 100000); | |
223 | ||
e323fc03 | 224 | adsp->px_supply = devm_regulator_get(adsp->dev, "px"); |
c76929b3 | 225 | return PTR_ERR_OR_ZERO(adsp->px_supply); |
b9e718e9 BA |
226 | } |
227 | ||
b9e718e9 BA |
228 | static int adsp_alloc_memory_region(struct qcom_adsp *adsp) |
229 | { | |
230 | struct device_node *node; | |
231 | struct resource r; | |
232 | int ret; | |
233 | ||
234 | node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); | |
235 | if (!node) { | |
236 | dev_err(adsp->dev, "no memory-region specified\n"); | |
237 | return -EINVAL; | |
238 | } | |
239 | ||
240 | ret = of_address_to_resource(node, 0, &r); | |
241 | if (ret) | |
242 | return ret; | |
243 | ||
244 | adsp->mem_phys = adsp->mem_reloc = r.start; | |
245 | adsp->mem_size = resource_size(&r); | |
246 | adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); | |
247 | if (!adsp->mem_region) { | |
248 | dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", | |
249 | &r.start, adsp->mem_size); | |
250 | return -EBUSY; | |
251 | } | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
256 | static int adsp_probe(struct platform_device *pdev) | |
257 | { | |
c7715e47 | 258 | const struct adsp_data *desc; |
b9e718e9 BA |
259 | struct qcom_adsp *adsp; |
260 | struct rproc *rproc; | |
a5a4e02d | 261 | const char *fw_name; |
b9e718e9 BA |
262 | int ret; |
263 | ||
c7715e47 AKD |
264 | desc = of_device_get_match_data(&pdev->dev); |
265 | if (!desc) | |
266 | return -EINVAL; | |
267 | ||
b9e718e9 BA |
268 | if (!qcom_scm_is_available()) |
269 | return -EPROBE_DEFER; | |
270 | ||
a5a4e02d SS |
271 | fw_name = desc->firmware_name; |
272 | ret = of_property_read_string(pdev->dev.of_node, "firmware-name", | |
273 | &fw_name); | |
274 | if (ret < 0 && ret != -EINVAL) | |
275 | return ret; | |
276 | ||
b9e718e9 | 277 | rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops, |
a5a4e02d | 278 | fw_name, sizeof(*adsp)); |
b9e718e9 BA |
279 | if (!rproc) { |
280 | dev_err(&pdev->dev, "unable to allocate remoteproc\n"); | |
281 | return -ENOMEM; | |
282 | } | |
283 | ||
b9e718e9 BA |
284 | adsp = (struct qcom_adsp *)rproc->priv; |
285 | adsp->dev = &pdev->dev; | |
286 | adsp->rproc = rproc; | |
c7715e47 | 287 | adsp->pas_id = desc->pas_id; |
e323fc03 | 288 | adsp->has_aggre2_clk = desc->has_aggre2_clk; |
b9e718e9 BA |
289 | platform_set_drvdata(pdev, adsp); |
290 | ||
b9e718e9 BA |
291 | ret = adsp_alloc_memory_region(adsp); |
292 | if (ret) | |
293 | goto free_rproc; | |
294 | ||
f33a7358 SJ |
295 | ret = adsp_init_clock(adsp); |
296 | if (ret) | |
297 | goto free_rproc; | |
298 | ||
b9e718e9 BA |
299 | ret = adsp_init_regulator(adsp); |
300 | if (ret) | |
301 | goto free_rproc; | |
302 | ||
6103b1a6 BA |
303 | ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, |
304 | qcom_pas_handover); | |
305 | if (ret) | |
b9e718e9 | 306 | goto free_rproc; |
b9e718e9 | 307 | |
eea07023 | 308 | qcom_add_glink_subdev(rproc, &adsp->glink_subdev); |
4b48921a | 309 | qcom_add_smd_subdev(rproc, &adsp->smd_subdev); |
1e140df0 | 310 | qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); |
1fb82ee8 BA |
311 | adsp->sysmon = qcom_add_sysmon_subdev(rproc, |
312 | desc->sysmon_name, | |
313 | desc->ssctl_id); | |
027045a6 SS |
314 | if (IS_ERR(adsp->sysmon)) { |
315 | ret = PTR_ERR(adsp->sysmon); | |
316 | goto free_rproc; | |
317 | } | |
4b48921a | 318 | |
b9e718e9 BA |
319 | ret = rproc_add(rproc); |
320 | if (ret) | |
321 | goto free_rproc; | |
322 | ||
323 | return 0; | |
324 | ||
325 | free_rproc: | |
90a80d88 | 326 | rproc_free(rproc); |
b9e718e9 BA |
327 | |
328 | return ret; | |
329 | } | |
330 | ||
331 | static int adsp_remove(struct platform_device *pdev) | |
332 | { | |
333 | struct qcom_adsp *adsp = platform_get_drvdata(pdev); | |
334 | ||
b9e718e9 | 335 | rproc_del(adsp->rproc); |
4b48921a | 336 | |
eea07023 | 337 | qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); |
1fb82ee8 | 338 | qcom_remove_sysmon_subdev(adsp->sysmon); |
4b48921a | 339 | qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); |
1e140df0 | 340 | qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); |
90a80d88 | 341 | rproc_free(adsp->rproc); |
b9e718e9 BA |
342 | |
343 | return 0; | |
344 | } | |
345 | ||
c7715e47 AKD |
346 | static const struct adsp_data adsp_resource_init = { |
347 | .crash_reason_smem = 423, | |
348 | .firmware_name = "adsp.mdt", | |
349 | .pas_id = 1, | |
e323fc03 | 350 | .has_aggre2_clk = false, |
1e140df0 | 351 | .ssr_name = "lpass", |
1fb82ee8 BA |
352 | .sysmon_name = "adsp", |
353 | .ssctl_id = 0x14, | |
c7715e47 AKD |
354 | }; |
355 | ||
3b0d1b65 BA |
356 | static const struct adsp_data cdsp_resource_init = { |
357 | .crash_reason_smem = 601, | |
358 | .firmware_name = "cdsp.mdt", | |
359 | .pas_id = 18, | |
360 | .has_aggre2_clk = false, | |
361 | .ssr_name = "cdsp", | |
362 | .sysmon_name = "cdsp", | |
363 | .ssctl_id = 0x17, | |
364 | }; | |
365 | ||
90a068ed AKD |
366 | static const struct adsp_data slpi_resource_init = { |
367 | .crash_reason_smem = 424, | |
368 | .firmware_name = "slpi.mdt", | |
369 | .pas_id = 12, | |
370 | .has_aggre2_clk = true, | |
1e140df0 | 371 | .ssr_name = "dsps", |
1fb82ee8 BA |
372 | .sysmon_name = "slpi", |
373 | .ssctl_id = 0x16, | |
90a068ed AKD |
374 | }; |
375 | ||
0af93682 BA |
376 | static const struct adsp_data wcss_resource_init = { |
377 | .crash_reason_smem = 421, | |
378 | .firmware_name = "wcnss.mdt", | |
379 | .pas_id = 6, | |
380 | .ssr_name = "mpss", | |
381 | .sysmon_name = "wcnss", | |
382 | .ssctl_id = 0x12, | |
383 | }; | |
384 | ||
b9e718e9 | 385 | static const struct of_device_id adsp_of_match[] = { |
c7715e47 AKD |
386 | { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, |
387 | { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init}, | |
90a068ed | 388 | { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init}, |
0af93682 BA |
389 | { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, |
390 | { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, | |
391 | { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, | |
3b0d1b65 BA |
392 | { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init}, |
393 | { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init}, | |
b9e718e9 BA |
394 | { }, |
395 | }; | |
62423472 | 396 | MODULE_DEVICE_TABLE(of, adsp_of_match); |
b9e718e9 BA |
397 | |
398 | static struct platform_driver adsp_driver = { | |
399 | .probe = adsp_probe, | |
400 | .remove = adsp_remove, | |
401 | .driver = { | |
9e004f97 | 402 | .name = "qcom_q6v5_pas", |
b9e718e9 BA |
403 | .of_match_table = adsp_of_match, |
404 | }, | |
405 | }; | |
406 | ||
407 | module_platform_driver(adsp_driver); | |
9e004f97 | 408 | MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver"); |
b9e718e9 | 409 | MODULE_LICENSE("GPL v2"); |