[thirdparty/u-boot.git] / drivers / rtc / ds1306.c

/*
 * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
 *
 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
 * Stephan Linz <linz@li-pro.net>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Date & Time support for DS1306 RTC using SPI:
 *
 *    - SXNI855T:    it uses its own soft SPI here in this file
 *    - all other:   use the external spi_xfer() function
 *                   (see include/spi.h)
 */

#include <common.h>
#include <command.h>
#include <rtc.h>
#include <spi.h>

#if defined(CONFIG_CMD_DATE)

#define	RTC_SECONDS		0x00
#define	RTC_MINUTES		0x01
#define	RTC_HOURS		0x02
#define	RTC_DAY_OF_WEEK		0x03
#define	RTC_DATE_OF_MONTH	0x04
#define	RTC_MONTH		0x05
#define	RTC_YEAR		0x06

#define	RTC_SECONDS_ALARM0	0x07
#define	RTC_MINUTES_ALARM0	0x08
#define	RTC_HOURS_ALARM0	0x09
#define	RTC_DAY_OF_WEEK_ALARM0	0x0a

#define	RTC_SECONDS_ALARM1	0x0b
#define	RTC_MINUTES_ALARM1	0x0c
#define	RTC_HOURS_ALARM1	0x0d
#define	RTC_DAY_OF_WEEK_ALARM1	0x0e

#define	RTC_CONTROL		0x0f
#define	RTC_STATUS		0x10
#define	RTC_TRICKLE_CHARGER	0x11

#define	RTC_USER_RAM_BASE	0x20

/* ************************************************************************* */
#ifdef CONFIG_SXNI855T		/* !!! SHOULD BE CHANGED TO NEW CODE !!! */

static void soft_spi_send (unsigned char n);
static unsigned char soft_spi_read (void);
static void init_spi (void);

/*-----------------------------------------------------------------------
 * Definitions
 */

#define	PB_SPISCK	0x00000002	/* PB 30 */
#define PB_SPIMOSI	0x00000004	/* PB 29 */
#define PB_SPIMISO	0x00000008	/* PB 28 */
#define PB_SPI_CE	0x00010000	/* PB 15 */

/* ------------------------------------------------------------------------- */

/* read clock time from DS1306 and return it in *tmp */
int rtc_get (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
	unsigned char spi_byte;	/* Data Byte */

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Shift out the address (0) of the time in the Clock Chip */
	soft_spi_send (0);

	/* Put the clock readings into the rtc_time structure */
	tmp->tm_sec = bcd2bin (soft_spi_read ());	/* Read seconds */
	tmp->tm_min = bcd2bin (soft_spi_read ());	/* Read minutes */

	/* Hours are trickier */
	spi_byte = soft_spi_read ();	/* Read Hours into temporary value */
	if (spi_byte & 0x40) {
		/* 12 hour mode bit is set (time is in 1-12 format) */
		if (spi_byte & 0x20) {
			/* since PM we add 11 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
		} else {
			/* since AM we subtract 1 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
		}
	} else {
		/* Otherwise, 0-23 hour format */
		tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	}

	soft_spi_read ();	/* Read and discard Day of week */
	tmp->tm_mday = bcd2bin (soft_spi_read ());	/* Read Day of the Month */
	tmp->tm_mon = bcd2bin (soft_spi_read ());	/* Read Month */

	/* Read Year and convert to this century */
	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;

	/* Now we can disable the DS1306 RTC */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	GregorianDay (tmp);	/* Determine the day of week */

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* set clock time in DS1306 RTC and in MPC8xx RTC */
int rtc_set (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First disable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x00);	/* send control register contents */

	/* Now disable the DS1306 to terminate the write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	udelay (10);

	/* Now enable the DS1306 to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Next, send the address of the clock time write registers */
	soft_spi_send (0x80);	/* send address of the first time register */

	/* Use Burst Mode to send all of the time data to the clock */
	bin2bcd (tmp->tm_sec);
	soft_spi_send (bin2bcd (tmp->tm_sec));	/* Send Seconds */
	soft_spi_send (bin2bcd (tmp->tm_min));	/* Send Minutes */
	soft_spi_send (bin2bcd (tmp->tm_hour));	/* Send Hour */
	soft_spi_send (bin2bcd (tmp->tm_wday));	/* Send Day of the Week */
	soft_spi_send (bin2bcd (tmp->tm_mday));	/* Send Day of Month */
	soft_spi_send (bin2bcd (tmp->tm_mon));	/* Send Month */
	soft_spi_send (bin2bcd (tmp->tm_year - 2000));	/* Send Year */

	/* Now we can disable the Clock chip to terminate the burst write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	/* Now we can enable the Clock chip to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First we Enable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x40);	/* send out Control Register contents */

	/* Now disable the DS1306 */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/*  Disable DS1306 Chip */
	udelay (10);

	/* Set standard MPC8xx clock to the same time so Linux will
	 * see the time even if it doesn't have a DS1306 clock driver.
	 * This helps with experimenting with standard kernels.
	 */
	{
		ulong tim;

		tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
			      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

		immap->im_sitk.sitk_rtck = KAPWR_KEY;
		immap->im_sit.sit_rtc = tim;
	}

	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* Initialize Port B for software SPI */
static void init_spi (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	/* Force output pins to begin at logic 0 */
	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);

	/* Set these 3 signals as outputs */
	immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);

	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO;	/* Make MISO pin an input */
	udelay (10);
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
static void soft_spi_send (unsigned char n)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to send, start with most significant bit */
	bitpos = 0x80;

	/* Send 8 bits to software SPI */
	for (i = 0; i < 8; i++) {	/* Loop for 8 bits */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */

		if (n & bitpos)
			immap->im_cpm.cp_pbdat |= PB_SPIMOSI;	/* Set MOSI to 1 */
		else
			immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI;	/* Set MOSI to 0 */
		udelay (10);

		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);

		bitpos >>= 1;	/* Shift for next bit position */
	}
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
static unsigned char soft_spi_read (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	unsigned char spi_byte = 0;	/* Return value, assume success */
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to receive, start with most significant bit */
	bitpos = 0x80;

	/* Read 8 bits here */
	for (i = 0; i < 8; i++) {	/* Do 8 bits in loop */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
		udelay (10);
		if (immap->im_cpm.cp_pbdat & PB_SPIMISO)	/* Get a bit of data */
			spi_byte |= bitpos;	/* Set data accordingly */
		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);
		bitpos >>= 1;	/* Shift for next bit position */
	}

	return spi_byte;	/* Return the byte read */
}

/* ------------------------------------------------------------------------- */

void rtc_reset (void)
{
	return;			/* nothing to do */
}

#else  /* not CONFIG_SXNI855T */
/* ************************************************************************* */

static unsigned char rtc_read (unsigned char reg);
static void rtc_write (unsigned char reg, unsigned char val);

static struct spi_slave *slave;

/* read clock time from DS1306 and return it in *tmp */
int rtc_get (struct rtc_time *tmp)
{
	unsigned char sec, min, hour, mday, wday, mon, year;

	/*
	 * Assuming Vcc = 2.0V (lowest speed)
	 *
	 * REVISIT: If we add an rtc_init() function we can do this
	 * step just once.
	 */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	sec = rtc_read (RTC_SECONDS);
	min = rtc_read (RTC_MINUTES);
	hour = rtc_read (RTC_HOURS);
	mday = rtc_read (RTC_DATE_OF_MONTH);
	wday = rtc_read (RTC_DAY_OF_WEEK);
	mon = rtc_read (RTC_MONTH);
	year = rtc_read (RTC_YEAR);

	spi_release_bus(slave);

	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	       "hr: %02x min: %02x sec: %02x\n",
	       year, mon, mday, wday, hour, min, sec);
	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	       rtc_read (RTC_HOURS_ALARM0),
	       rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	       rtc_read (RTC_HOURS_ALARM1),
	       rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));

	tmp->tm_sec = bcd2bin (sec & 0x7F);	/* convert Seconds */
	tmp->tm_min = bcd2bin (min & 0x7F);	/* convert Minutes */

	/* convert Hours */
	tmp->tm_hour = (hour & 0x40)
		? ((hour & 0x20)	/* 12 hour mode */
		   ? bcd2bin (hour & 0x1F) + 11	/* PM */
		   : bcd2bin (hour & 0x1F) - 1	/* AM */
		)
		: bcd2bin (hour & 0x3F);	/* 24 hour mode */

	tmp->tm_mday = bcd2bin (mday & 0x3F);	/* convert Day of the Month */
	tmp->tm_mon = bcd2bin (mon & 0x1F);	/* convert Month */
	tmp->tm_year = bcd2bin (year) + 2000;	/* convert Year */
	tmp->tm_wday = bcd2bin (wday & 0x07) - 1;	/* convert Day of the Week */
	tmp->tm_yday = 0;
	tmp->tm_isdst = 0;

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

/* ------------------------------------------------------------------------- */

/* set clock time from *tmp in DS1306 RTC */
int rtc_set (struct rtc_time *tmp)
{
	/* Assuming Vcc = 2.0V (lowest speed) */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));

	spi_release_bus(slave);
}

/* ------------------------------------------------------------------------- */

/* reset the DS1306 */
void rtc_reset (void)
{
	/* Assuming Vcc = 2.0V (lowest speed) */
	if (!slave) {
		slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
				SPI_MODE_3 | SPI_CS_HIGH);
		if (!slave)
			return;
	}

	if (spi_claim_bus(slave))
		return;

	/* clear the control register */
	rtc_write (RTC_CONTROL, 0x00);	/* 1st step: reset WP */
	rtc_write (RTC_CONTROL, 0x00);	/* 2nd step: reset 1Hz, AIE1, AIE0 */

	/* reset all alarms */
	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	rtc_write (RTC_HOURS_ALARM0, 0x00);
	rtc_write (RTC_HOURS_ALARM1, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);

	spi_release_bus(slave);
}

/* ------------------------------------------------------------------------- */

static unsigned char rtc_read (unsigned char reg)
{
	int ret;

	ret = spi_w8r8(slave, reg);
	return ret < 0 ? 0 : ret;
}

/* ------------------------------------------------------------------------- */

static void rtc_write (unsigned char reg, unsigned char val)
{
	unsigned char dout[2];	/* SPI Output Data Bytes */
	unsigned char din[2];	/* SPI Input Data Bytes */

	dout[0] = 0x80 | reg;
	dout[1] = val;

	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
}

#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */

#endif
Commit	Line	Data
affae2bf WD	1	/*
	2	* (C) Copyright 2002 SIXNET, dge@sixnetio.com.
	3	*
ec4c544b WD	4	* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
	5	* Stephan Linz <linz@li-pro.net>
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
affae2bf WD	8	*/
	9
	10	/*
ec4c544b WD	11	* Date & Time support for DS1306 RTC using SPI:
	12	*
	13	* - SXNI855T: it uses its own soft SPI here in this file
	14	* - all other: use the external spi_xfer() function
	15	* (see include/spi.h)
affae2bf WD	16	*/
	17
	18	#include <common.h>
	19	#include <command.h>
	20	#include <rtc.h>
ec4c544b	21	#include <spi.h>
affae2bf	22
871c18dd	23	#if defined(CONFIG_CMD_DATE)
affae2bf	24
ec4c544b WD	25	#define RTC_SECONDS 0x00
	26	#define RTC_MINUTES 0x01
	27	#define RTC_HOURS 0x02
	28	#define RTC_DAY_OF_WEEK 0x03
	29	#define RTC_DATE_OF_MONTH 0x04
	30	#define RTC_MONTH 0x05
	31	#define RTC_YEAR 0x06
	32
	33	#define RTC_SECONDS_ALARM0 0x07
	34	#define RTC_MINUTES_ALARM0 0x08
	35	#define RTC_HOURS_ALARM0 0x09
	36	#define RTC_DAY_OF_WEEK_ALARM0 0x0a
	37
	38	#define RTC_SECONDS_ALARM1 0x0b
	39	#define RTC_MINUTES_ALARM1 0x0c
	40	#define RTC_HOURS_ALARM1 0x0d
	41	#define RTC_DAY_OF_WEEK_ALARM1 0x0e
	42
	43	#define RTC_CONTROL 0x0f
	44	#define RTC_STATUS 0x10
	45	#define RTC_TRICKLE_CHARGER 0x11
	46
	47	#define RTC_USER_RAM_BASE 0x20
	48
ec4c544b WD	49	/* ************************************************************************* */
	50	#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
	51
	52	static void soft_spi_send (unsigned char n);
	53	static unsigned char soft_spi_read (void);
	54	static void init_spi (void);
affae2bf WD	55
	56	/*-----------------------------------------------------------------------
	57	* Definitions
	58	*/
	59
	60	#define PB_SPISCK 0x00000002 /* PB 30 */
	61	#define PB_SPIMOSI 0x00000004 /* PB 29 */
	62	#define PB_SPIMISO 0x00000008 /* PB 28 */
	63	#define PB_SPI_CE 0x00010000 /* PB 15 */
	64
	65	/* ------------------------------------------------------------------------- */
	66
	67	/* read clock time from DS1306 and return it in tmp /
b73a19e1	68	int rtc_get (struct rtc_time *tmp)
affae2bf	69	{
6d0f6bcf	70	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	71	unsigned char spi_byte; /* Data Byte */
	72
	73	init_spi (); /* set port B for software SPI */
	74
	75	/* Now we can enable the DS1306 RTC */
	76	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	77	udelay (10);
	78
	79	/* Shift out the address (0) of the time in the Clock Chip */
	80	soft_spi_send (0);
	81
	82	/* Put the clock readings into the rtc_time structure */
	83	tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
	84	tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
	85
	86	/* Hours are trickier */
	87	spi_byte = soft_spi_read (); /* Read Hours into temporary value */
	88	if (spi_byte & 0x40) {
	89	/* 12 hour mode bit is set (time is in 1-12 format) */
	90	if (spi_byte & 0x20) {
	91	/* since PM we add 11 to get 0-23 for hours */
	92	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
	93	} else {
	94	/* since AM we subtract 1 to get 0-23 for hours */
	95	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
	96	}
	97	} else {
	98	/* Otherwise, 0-23 hour format */
	99	tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	100	}
affae2bf	101
ec4c544b WD	102	soft_spi_read (); /* Read and discard Day of week */
	103	tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
	104	tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
affae2bf	105
ec4c544b WD	106	/* Read Year and convert to this century */
ec4c544b WD	107	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
affae2bf	108
ec4c544b WD	109	/* Now we can disable the DS1306 RTC */
	110	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	111	udelay (10);
affae2bf	112
ec4c544b	113	GregorianDay (tmp); /* Determine the day of week */
affae2bf	114
ec4c544b WD	115	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	116	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	117	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	118
b73a19e1 YT	119	return 0;
ec4c544b WD	120	}
	121
	122	/* ------------------------------------------------------------------------- */
	123
	124	/* set clock time in DS1306 RTC and in MPC8xx RTC */
d1e23194	125	int rtc_set (struct rtc_time *tmp)
ec4c544b	126	{
6d0f6bcf	127	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	128
	129	init_spi (); /* set port B for software SPI */
	130
	131	/* Now we can enable the DS1306 RTC */
	132	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	133	udelay (10);
	134
	135	/* First disable write protect in the clock chip control register */
	136	soft_spi_send (0x8F); /* send address of the control register */
	137	soft_spi_send (0x00); /* send control register contents */
	138
	139	/* Now disable the DS1306 to terminate the write */
	140	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	141	udelay (10);
	142
	143	/* Now enable the DS1306 to initiate a new write */
	144	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	145	udelay (10);
	146
	147	/* Next, send the address of the clock time write registers */
	148	soft_spi_send (0x80); /* send address of the first time register */
	149
	150	/* Use Burst Mode to send all of the time data to the clock */
	151	bin2bcd (tmp->tm_sec);
	152	soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
	153	soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
	154	soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
	155	soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
	156	soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
	157	soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
	158	soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
	159
	160	/* Now we can disable the Clock chip to terminate the burst write */
	161	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	162	udelay (10);
	163
	164	/* Now we can enable the Clock chip to initiate a new write */
	165	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	166	udelay (10);
	167
	168	/* First we Enable write protect in the clock chip control register */
	169	soft_spi_send (0x8F); /* send address of the control register */
	170	soft_spi_send (0x40); /* send out Control Register contents */
	171
	172	/* Now disable the DS1306 */
	173	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	174	udelay (10);
	175
	176	/* Set standard MPC8xx clock to the same time so Linux will
	177	* see the time even if it doesn't have a DS1306 clock driver.
	178	* This helps with experimenting with standard kernels.
	179	*/
	180	{
	181	ulong tim;
	182
	183	tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
	184	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	185
	186	immap->im_sitk.sitk_rtck = KAPWR_KEY;
	187	immap->im_sit.sit_rtc = tim;
affae2bf	188	}
affae2bf	189
ec4c544b WD	190	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	191	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	192	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
d1e23194 JCPV	193
d1e23194 JCPV	194	return 0;
ec4c544b	195	}
affae2bf	196
ec4c544b	197	/* ------------------------------------------------------------------------- */
affae2bf	198
ec4c544b WD	199	/* Initialize Port B for software SPI */
	200	static void init_spi (void)
	201	{
6d0f6bcf	202	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
affae2bf	203
ec4c544b WD	204	/* Force output pins to begin at logic 0 */
ec4c544b WD	205	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE \| PB_SPIMOSI \| PB_SPISCK);
affae2bf	206
ec4c544b WD	207	/* Set these 3 signals as outputs */
	208	immap->im_cpm.cp_pbdir \|= (PB_SPIMOSI \| PB_SPI_CE \| PB_SPISCK);
	209
	210	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
	211	udelay (10);
affae2bf WD	212	}
	213
	214	/* ------------------------------------------------------------------------- */
	215
ec4c544b WD	216	/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
ec4c544b WD	217	static void soft_spi_send (unsigned char n)
affae2bf	218	{
6d0f6bcf	219	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	220	unsigned char bitpos; /* bit position to receive */
	221	unsigned char i; /* Loop Control */
	222
	223	/* bit position to send, start with most significant bit */
	224	bitpos = 0x80;
	225
	226	/* Send 8 bits to software SPI */
	227	for (i = 0; i < 8; i++) { /* Loop for 8 bits */
	228	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	229
	230	if (n & bitpos)
	231	immap->im_cpm.cp_pbdat \|= PB_SPIMOSI; /* Set MOSI to 1 */
	232	else
	233	immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
	234	udelay (10);
	235
	236	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	237	udelay (10);
	238
	239	bitpos >>= 1; /* Shift for next bit position */
	240	}
affae2bf WD	241	}
	242
	243	/* ------------------------------------------------------------------------- */
	244
ec4c544b WD	245	/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
ec4c544b WD	246	static unsigned char soft_spi_read (void)
affae2bf	247	{
6d0f6bcf	248	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
ec4c544b WD	249
	250	unsigned char spi_byte = 0; /* Return value, assume success */
	251	unsigned char bitpos; /* bit position to receive */
	252	unsigned char i; /* Loop Control */
	253
	254	/* bit position to receive, start with most significant bit */
	255	bitpos = 0x80;
	256
	257	/* Read 8 bits here */
	258	for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
	259	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	260	udelay (10);
	261	if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
	262	spi_byte \|= bitpos; /* Set data accordingly */
	263	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	264	udelay (10);
	265	bitpos >>= 1; /* Shift for next bit position */
	266	}
	267
	268	return spi_byte; /* Return the byte read */
affae2bf WD	269	}
	270
	271	/* ------------------------------------------------------------------------- */
	272
ec4c544b	273	void rtc_reset (void)
affae2bf	274	{
ec4c544b WD	275	return; /* nothing to do */
	276	}
	277
	278	#else /* not CONFIG_SXNI855T */
	279	/* ************************************************************************* */
	280
3f85ce27 WD	281	static unsigned char rtc_read (unsigned char reg);
	282	static void rtc_write (unsigned char reg, unsigned char val);
	283
d255bb0e HS	284	static struct spi_slave *slave;
d255bb0e HS	285
ec4c544b	286	/* read clock time from DS1306 and return it in tmp /
b73a19e1	287	int rtc_get (struct rtc_time *tmp)
ec4c544b WD	288	{
	289	unsigned char sec, min, hour, mday, wday, mon, year;
	290
d255bb0e HS	291	/*
	292	* Assuming Vcc = 2.0V (lowest speed)
	293	*
	294	* REVISIT: If we add an rtc_init() function we can do this
	295	* step just once.
	296	*/
	297	if (!slave) {
6d0f6bcf	298	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	299	SPI_MODE_3 \| SPI_CS_HIGH);
	300	if (!slave)
	301	return;
	302	}
	303
	304	if (spi_claim_bus(slave))
	305	return;
	306
ec4c544b WD	307	sec = rtc_read (RTC_SECONDS);
	308	min = rtc_read (RTC_MINUTES);
	309	hour = rtc_read (RTC_HOURS);
	310	mday = rtc_read (RTC_DATE_OF_MONTH);
	311	wday = rtc_read (RTC_DAY_OF_WEEK);
	312	mon = rtc_read (RTC_MONTH);
	313	year = rtc_read (RTC_YEAR);
	314
d255bb0e HS	315	spi_release_bus(slave);
d255bb0e HS	316
ec4c544b WD	317	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	318	"hr: %02x min: %02x sec: %02x\n",
	319	year, mon, mday, wday, hour, min, sec);
	320	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	321	rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	322	rtc_read (RTC_HOURS_ALARM0),
	323	rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	324	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	325	rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	326	rtc_read (RTC_HOURS_ALARM1),
	327	rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
	328
	329	tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
	330	tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
	331
	332	/* convert Hours */
	333	tmp->tm_hour = (hour & 0x40)
	334	? ((hour & 0x20) /* 12 hour mode */
	335	? bcd2bin (hour & 0x1F) + 11 /* PM */
	336	: bcd2bin (hour & 0x1F) - 1 /* AM */
	337	)
	338	: bcd2bin (hour & 0x3F); /* 24 hour mode */
	339
	340	tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
	341	tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
	342	tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
	343	tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
	344	tmp->tm_yday = 0;
	345	tmp->tm_isdst = 0;
	346
	347	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	348	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	349	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	350
b73a19e1 YT	351	return 0;
affae2bf WD	352	}
	353
	354	/* ------------------------------------------------------------------------- */
	355
ec4c544b	356	/* set clock time from tmp in DS1306 RTC /
d1e23194	357	int rtc_set (struct rtc_time *tmp)
affae2bf	358	{
d255bb0e HS	359	/* Assuming Vcc = 2.0V (lowest speed) */
d255bb0e HS	360	if (!slave) {
6d0f6bcf	361	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	362	SPI_MODE_3 \| SPI_CS_HIGH);
	363	if (!slave)
	364	return;
	365	}
	366
	367	if (spi_claim_bus(slave))
	368	return;
	369
ec4c544b WD	370	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	371	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	372	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	373
ec4c544b	374	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
da4849fb WD	375	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	376	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	377	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	378	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	379	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	380	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
d255bb0e HS	381
d255bb0e HS	382	spi_release_bus(slave);
affae2bf WD	383	}
	384
	385	/* ------------------------------------------------------------------------- */
	386
ec4c544b WD	387	/* reset the DS1306 */
	388	void rtc_reset (void)
	389	{
d255bb0e HS	390	/* Assuming Vcc = 2.0V (lowest speed) */
d255bb0e HS	391	if (!slave) {
6d0f6bcf	392	slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
d255bb0e HS	393	SPI_MODE_3 \| SPI_CS_HIGH);
	394	if (!slave)
	395	return;
	396	}
	397
	398	if (spi_claim_bus(slave))
	399	return;
	400
ec4c544b WD	401	/* clear the control register */
	402	rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
	403	rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
	404
	405	/* reset all alarms */
	406	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	407	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	408	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	409	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	410	rtc_write (RTC_HOURS_ALARM0, 0x00);
	411	rtc_write (RTC_HOURS_ALARM1, 0x00);
	412	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	413	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
d255bb0e HS	414
d255bb0e HS	415	spi_release_bus(slave);
ec4c544b WD	416	}
	417
	418	/* ------------------------------------------------------------------------- */
affae2bf	419
ec4c544b WD	420	static unsigned char rtc_read (unsigned char reg)
ec4c544b WD	421	{
d255bb0e	422	int ret;
affae2bf	423
d255bb0e HS	424	ret = spi_w8r8(slave, reg);
d255bb0e HS	425	return ret < 0 ? 0 : ret;
affae2bf WD	426	}
	427
	428	/* ------------------------------------------------------------------------- */
	429
ec4c544b	430	static void rtc_write (unsigned char reg, unsigned char val)
affae2bf	431	{
ec4c544b WD	432	unsigned char dout[2]; /* SPI Output Data Bytes */
ec4c544b WD	433	unsigned char din[2]; /* SPI Input Data Bytes */
affae2bf	434
ec4c544b WD	435	dout[0] = 0x80 \| reg;
ec4c544b WD	436	dout[1] = val;
affae2bf	437
d255bb0e	438	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN \| SPI_XFER_END);
ec4c544b	439	}
affae2bf	440
ec4c544b	441	#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
affae2bf	442
affae2bf	443	#endif