]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/rtc/ds174x.c
bootcounter_ram: Flush dcache after data is written into SDRAM
[people/ms/u-boot.git] / drivers / rtc / ds174x.c
CommitLineData
5b1d7137
WD
1/*
2 * (C) Copyright 2001
3 * ARIO Data Networks, Inc. dchiu@ariodata.com
4 *
5 * Based on MontaVista DS1743 code and U-Boot mc146818 code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
5b1d7137
WD
8 */
9
10/*
11 * Date & Time support for the DS174x RTC
12 */
13
14/*#define DEBUG*/
15
16#include <common.h>
17#include <command.h>
18#include <rtc.h>
19
871c18dd 20#if defined(CONFIG_CMD_DATE)
5b1d7137
WD
21
22static uchar rtc_read( unsigned int addr );
23static void rtc_write( unsigned int addr, uchar val);
5b1d7137 24
6d0f6bcf 25#define RTC_BASE ( CONFIG_SYS_NVRAM_SIZE + CONFIG_SYS_NVRAM_BASE_ADDR )
5b1d7137
WD
26
27#define RTC_YEAR ( RTC_BASE + 7 )
28#define RTC_MONTH ( RTC_BASE + 6 )
29#define RTC_DAY_OF_MONTH ( RTC_BASE + 5 )
30#define RTC_DAY_OF_WEEK ( RTC_BASE + 4 )
31#define RTC_HOURS ( RTC_BASE + 3 )
32#define RTC_MINUTES ( RTC_BASE + 2 )
33#define RTC_SECONDS ( RTC_BASE + 1 )
34#define RTC_CENTURY ( RTC_BASE + 0 )
35
36#define RTC_CONTROLA RTC_CENTURY
37#define RTC_CONTROLB RTC_SECONDS
38#define RTC_CONTROLC RTC_DAY_OF_WEEK
39
40#define RTC_CA_WRITE 0x80
41#define RTC_CA_READ 0x40
42
43#define RTC_CB_OSC_DISABLE 0x80
44
45#define RTC_CC_BATTERY_FLAG 0x80
46#define RTC_CC_FREQ_TEST 0x40
47
48/* ------------------------------------------------------------------------- */
49
b73a19e1 50int rtc_get( struct rtc_time *tmp )
5b1d7137
WD
51{
52 uchar sec, min, hour;
53 uchar mday, wday, mon, year;
54
55 int century;
56
57 uchar reg_a;
58
59 reg_a = rtc_read( RTC_CONTROLA );
60 /* lock clock registers for read */
61 rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_READ ));
62
63 sec = rtc_read( RTC_SECONDS );
64 min = rtc_read( RTC_MINUTES );
65 hour = rtc_read( RTC_HOURS );
66 mday = rtc_read( RTC_DAY_OF_MONTH );
67 wday = rtc_read( RTC_DAY_OF_WEEK );
68 mon = rtc_read( RTC_MONTH );
69 year = rtc_read( RTC_YEAR );
70 century = rtc_read( RTC_CENTURY );
71
72 /* unlock clock registers after read */
73 rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_READ ));
74
75#ifdef RTC_DEBUG
76 printf( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
77 "hr: %02x min: %02x sec: %02x\n",
78 year, mon_cent, mday, wday,
79 hour, min, sec );
80#endif
81 tmp->tm_sec = bcd2bin( sec & 0x7F );
82 tmp->tm_min = bcd2bin( min & 0x7F );
83 tmp->tm_hour = bcd2bin( hour & 0x3F );
84 tmp->tm_mday = bcd2bin( mday & 0x3F );
85 tmp->tm_mon = bcd2bin( mon & 0x1F );
86 tmp->tm_wday = bcd2bin( wday & 0x07 );
87
88 /* glue year from century and year in century */
89 tmp->tm_year = bcd2bin( year ) +
90 ( bcd2bin( century & 0x3F ) * 100 );
91
92 tmp->tm_yday = 0;
93 tmp->tm_isdst= 0;
94#ifdef RTC_DEBUG
95 printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
96 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
97 tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
98#endif
53eec6f1 99 return 0;
5b1d7137
WD
100}
101
d1e23194 102int rtc_set( struct rtc_time *tmp )
5b1d7137
WD
103{
104 uchar reg_a;
105#ifdef RTC_DEBUG
106 printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
107 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
108 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
109#endif
110 /* lock clock registers for write */
111 reg_a = rtc_read( RTC_CONTROLA );
112 rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_WRITE ));
113
114 rtc_write( RTC_MONTH, bin2bcd( tmp->tm_mon ));
115
116 rtc_write( RTC_DAY_OF_WEEK, bin2bcd( tmp->tm_wday ));
117 rtc_write( RTC_DAY_OF_MONTH, bin2bcd( tmp->tm_mday ));
118 rtc_write( RTC_HOURS, bin2bcd( tmp->tm_hour ));
119 rtc_write( RTC_MINUTES, bin2bcd( tmp->tm_min ));
120 rtc_write( RTC_SECONDS, bin2bcd( tmp->tm_sec ));
121
122 /* break year up into century and year in century */
123 rtc_write( RTC_YEAR, bin2bcd( tmp->tm_year % 100 ));
124 rtc_write( RTC_CENTURY, bin2bcd( tmp->tm_year / 100 ));
125
126 /* unlock clock registers after read */
127 rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_WRITE ));
d1e23194
JCPV
128
129 return 0;
5b1d7137
WD
130}
131
132void rtc_reset (void)
133{
134 uchar reg_a, reg_b, reg_c;
135
136 reg_a = rtc_read( RTC_CONTROLA );
137 reg_b = rtc_read( RTC_CONTROLB );
138
139 if ( reg_b & RTC_CB_OSC_DISABLE )
140 {
141 printf( "real-time-clock was stopped. Now starting...\n" );
142 reg_a |= RTC_CA_WRITE;
143 reg_b &= ~RTC_CB_OSC_DISABLE;
144
145 rtc_write( RTC_CONTROLA, reg_a );
146 rtc_write( RTC_CONTROLB, reg_b );
147 }
148
149 /* make sure read/write clock register bits are cleared */
150 reg_a &= ~( RTC_CA_WRITE | RTC_CA_READ );
151 rtc_write( RTC_CONTROLA, reg_a );
152
153 reg_c = rtc_read( RTC_CONTROLC );
154 if (( reg_c & RTC_CC_BATTERY_FLAG ) == 0 )
155 printf( "RTC battery low. Clock setting may not be reliable.\n" );
156}
157
158/* ------------------------------------------------------------------------- */
159
160static uchar rtc_read( unsigned int addr )
161{
162 uchar val = in8( addr );
163#ifdef RTC_DEBUG
164 printf( "rtc_read: %x:%x\n", addr, val );
165#endif
166 return( val );
167}
168
169static void rtc_write( unsigned int addr, uchar val )
170{
171#ifdef RTC_DEBUG
172 printf( "rtc_write: %x:%x\n", addr, val );
173#endif
174 out8( addr, val );
175}
176
068b60a0 177#endif