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affae2bf WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Denis Peter MPL AG Switzerland. d.peter@mpl.ch | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
affae2bf WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Date & Time support for the MC146818 (PIXX4) RTC | |
10 | */ | |
11 | ||
12 | /*#define DEBUG*/ | |
13 | ||
14 | #include <common.h> | |
15 | #include <command.h> | |
16 | #include <rtc.h> | |
17 | ||
3ced12a0 | 18 | #if defined(__I386__) || defined(CONFIG_MALTA) |
21831001 GR |
19 | #include <asm/io.h> |
20 | #define in8(p) inb(p) | |
21 | #define out8(p, v) outb(v, p) | |
22 | #endif | |
23 | ||
871c18dd | 24 | #if defined(CONFIG_CMD_DATE) |
affae2bf WD |
25 | |
26 | static uchar rtc_read (uchar reg); | |
27 | static void rtc_write (uchar reg, uchar val); | |
affae2bf | 28 | |
6d0f6bcf | 29 | #define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70 |
53677ef1 WD |
30 | #define RTC_SECONDS 0x00 |
31 | #define RTC_SECONDS_ALARM 0x01 | |
32 | #define RTC_MINUTES 0x02 | |
33 | #define RTC_MINUTES_ALARM 0x03 | |
34 | #define RTC_HOURS 0x04 | |
35 | #define RTC_HOURS_ALARM 0x05 | |
36 | #define RTC_DAY_OF_WEEK 0x06 | |
37 | #define RTC_DATE_OF_MONTH 0x07 | |
38 | #define RTC_MONTH 0x08 | |
39 | #define RTC_YEAR 0x09 | |
40 | #define RTC_CONFIG_A 0x0A | |
41 | #define RTC_CONFIG_B 0x0B | |
42 | #define RTC_CONFIG_C 0x0C | |
43 | #define RTC_CONFIG_D 0x0D | |
affae2bf WD |
44 | |
45 | ||
46 | /* ------------------------------------------------------------------------- */ | |
47 | ||
b73a19e1 | 48 | int rtc_get (struct rtc_time *tmp) |
affae2bf WD |
49 | { |
50 | uchar sec, min, hour, mday, wday, mon, year; | |
51 | /* here check if rtc can be accessed */ | |
52 | while((rtc_read(RTC_CONFIG_A)&0x80)==0x80); | |
53677ef1 WD |
53 | sec = rtc_read (RTC_SECONDS); |
54 | min = rtc_read (RTC_MINUTES); | |
affae2bf WD |
55 | hour = rtc_read (RTC_HOURS); |
56 | mday = rtc_read (RTC_DATE_OF_MONTH); | |
57 | wday = rtc_read (RTC_DAY_OF_WEEK); | |
53677ef1 | 58 | mon = rtc_read (RTC_MONTH); |
affae2bf WD |
59 | year = rtc_read (RTC_YEAR); |
60 | #ifdef RTC_DEBUG | |
61 | printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " | |
62 | "hr: %02x min: %02x sec: %02x\n", | |
c7de829c | 63 | year, mon, mday, wday, |
affae2bf WD |
64 | hour, min, sec ); |
65 | printf ( "Alarms: month: %02x hour: %02x min: %02x sec: %02x\n", | |
66 | rtc_read (RTC_CONFIG_D) & 0x3F, | |
67 | rtc_read (RTC_HOURS_ALARM), | |
68 | rtc_read (RTC_MINUTES_ALARM), | |
69 | rtc_read (RTC_SECONDS_ALARM) ); | |
70 | #endif | |
71 | tmp->tm_sec = bcd2bin (sec & 0x7F); | |
72 | tmp->tm_min = bcd2bin (min & 0x7F); | |
73 | tmp->tm_hour = bcd2bin (hour & 0x3F); | |
74 | tmp->tm_mday = bcd2bin (mday & 0x3F); | |
75 | tmp->tm_mon = bcd2bin (mon & 0x1F); | |
76 | tmp->tm_year = bcd2bin (year); | |
77 | tmp->tm_wday = bcd2bin (wday & 0x07); | |
78 | if(tmp->tm_year<70) | |
79 | tmp->tm_year+=2000; | |
80 | else | |
81 | tmp->tm_year+=1900; | |
82 | tmp->tm_yday = 0; | |
83 | tmp->tm_isdst= 0; | |
84 | #ifdef RTC_DEBUG | |
85 | printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
86 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
87 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
88 | #endif | |
b73a19e1 YT |
89 | |
90 | return 0; | |
affae2bf WD |
91 | } |
92 | ||
d1e23194 | 93 | int rtc_set (struct rtc_time *tmp) |
affae2bf WD |
94 | { |
95 | #ifdef RTC_DEBUG | |
96 | printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
97 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
98 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
99 | #endif | |
100 | rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */ | |
101 | ||
102 | rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100)); | |
103 | rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon)); | |
affae2bf WD |
104 | rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday)); |
105 | rtc_write (RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday)); | |
106 | rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour)); | |
107 | rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min )); | |
108 | rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec )); | |
109 | rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */ | |
110 | ||
d1e23194 | 111 | return 0; |
affae2bf WD |
112 | } |
113 | ||
114 | void rtc_reset (void) | |
115 | { | |
116 | rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */ | |
117 | rtc_write(RTC_CONFIG_A,0x20); /* Normal OP */ | |
118 | rtc_write(RTC_CONFIG_B,0x00); | |
119 | rtc_write(RTC_CONFIG_B,0x00); | |
120 | rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */ | |
121 | } | |
122 | ||
123 | /* ------------------------------------------------------------------------- */ | |
124 | ||
6d0f6bcf | 125 | #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR |
affae2bf WD |
126 | /* |
127 | * use direct memory access | |
128 | */ | |
129 | static uchar rtc_read (uchar reg) | |
130 | { | |
6d0f6bcf | 131 | return(in8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg)); |
affae2bf WD |
132 | } |
133 | ||
134 | static void rtc_write (uchar reg, uchar val) | |
135 | { | |
6d0f6bcf | 136 | out8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg, val); |
affae2bf WD |
137 | } |
138 | #else | |
139 | static uchar rtc_read (uchar reg) | |
140 | { | |
141 | out8(RTC_PORT_MC146818,reg); | |
142 | return(in8(RTC_PORT_MC146818+1)); | |
143 | } | |
144 | ||
145 | static void rtc_write (uchar reg, uchar val) | |
146 | { | |
147 | out8(RTC_PORT_MC146818,reg); | |
148 | out8(RTC_PORT_MC146818+1,val); | |
149 | } | |
150 | #endif | |
151 | ||
068b60a0 | 152 | #endif |