[thirdparty/u-boot.git] / drivers / rtc / pl031.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2008
 * Gururaja Hebbar gururajakr@sanyo.co.in
 *
 * reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
 */

#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
#include <rtc.h>
#include <asm/io.h>
#include <asm/types.h>

/*
 * Register definitions
 */
#define	RTC_DR		0x00	/* Data read register */
#define	RTC_MR		0x04	/* Match register */
#define	RTC_LR		0x08	/* Data load register */
#define	RTC_CR		0x0c	/* Control register */
#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
#define	RTC_RIS		0x14	/* Raw interrupt status register */
#define	RTC_MIS		0x18	/* Masked interrupt status register */
#define	RTC_ICR		0x1c	/* Interrupt clear register */

#define RTC_CR_START	(1 << 0)

struct pl031_platdata {
	phys_addr_t base;
};

static inline u32 pl031_read_reg(struct udevice *dev, int reg)
{
	struct pl031_platdata *pdata = dev_get_platdata(dev);

	return readl(pdata->base + reg);
}

static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
{
	struct pl031_platdata *pdata = dev_get_platdata(dev);

	return writel(value, pdata->base + reg);
}

/*
 * Probe RTC device
 */
static int pl031_probe(struct udevice *dev)
{
	/* Enable RTC Start in Control register*/
	pl031_write_reg(dev, RTC_CR, RTC_CR_START);

	return 0;
}

/*
 * Get the current time from the RTC
 */
static int pl031_get(struct udevice *dev, struct rtc_time *tm)
{
	unsigned long tim;

	if (!tm)
		return -EINVAL;

	tim = pl031_read_reg(dev, RTC_DR);

	rtc_to_tm(tim, tm);

	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	      tm->tm_hour, tm->tm_min, tm->tm_sec);

	return 0;
}

/*
 * Set the RTC
 */
static int pl031_set(struct udevice *dev, const struct rtc_time *tm)
{
	unsigned long tim;

	if (!tm)
		return -EINVAL;

	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	      tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	      tm->tm_hour, tm->tm_min, tm->tm_sec);

	/* Calculate number of seconds this incoming time represents */
	tim = rtc_mktime(tm);

	pl031_write_reg(dev, RTC_LR, tim);

	return 0;
}

/*
 * Reset the RTC. We set the date back to 1970-01-01.
 */
static int pl031_reset(struct udevice *dev)
{
	pl031_write_reg(dev, RTC_LR, 0);

	return 0;
}

static const struct rtc_ops pl031_ops = {
	.get = pl031_get,
	.set = pl031_set,
	.reset = pl031_reset,
};

static const struct udevice_id pl031_ids[] = {
	{ .compatible = "arm,pl031" },
	{ }
};

static int pl031_ofdata_to_platdata(struct udevice *dev)
{
	struct pl031_platdata *pdata = dev_get_platdata(dev);

	pdata->base = dev_read_addr(dev);

	return 0;
}

U_BOOT_DRIVER(rtc_pl031) = {
	.name	= "rtc-pl031",
	.id	= UCLASS_RTC,
	.of_match = pl031_ids,
	.probe	= pl031_probe,
	.ofdata_to_platdata = pl031_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct pl031_platdata),
	.ops	= &pl031_ops,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
535cfa4f GH	2	/*
	3	* (C) Copyright 2008
	4	* Gururaja Hebbar gururajakr@sanyo.co.in
	5	*
	6	* reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
535cfa4f GH	7	*/
	8
	9	#include <common.h>
	10	#include <command.h>
a370e429 AT	11	#include <dm.h>
a370e429 AT	12	#include <errno.h>
535cfa4f	13	#include <rtc.h>
a370e429 AT	14	#include <asm/io.h>
a370e429 AT	15	#include <asm/types.h>
535cfa4f GH	16
	17	/*
	18	* Register definitions
	19	*/
	20	#define RTC_DR 0x00 /* Data read register */
	21	#define RTC_MR 0x04 /* Match register */
	22	#define RTC_LR 0x08 /* Data load register */
	23	#define RTC_CR 0x0c /* Control register */
	24	#define RTC_IMSC 0x10 /* Interrupt mask and set register */
	25	#define RTC_RIS 0x14 /* Raw interrupt status register */
	26	#define RTC_MIS 0x18 /* Masked interrupt status register */
	27	#define RTC_ICR 0x1c /* Interrupt clear register */
	28
	29	#define RTC_CR_START (1 << 0)
	30
a370e429 AT	31	struct pl031_platdata {
	32	phys_addr_t base;
	33	};
535cfa4f	34
a370e429 AT	35	static inline u32 pl031_read_reg(struct udevice *dev, int reg)
	36	{
	37	struct pl031_platdata *pdata = dev_get_platdata(dev);
535cfa4f	38
a370e429 AT	39	return readl(pdata->base + reg);
	40	}
	41
	42	static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
535cfa4f	43	{
a370e429	44	struct pl031_platdata *pdata = dev_get_platdata(dev);
535cfa4f	45
a370e429	46	return writel(value, pdata->base + reg);
535cfa4f GH	47	}
	48
	49	/*
a370e429 AT	50	* Probe RTC device
	51	*/
	52	static int pl031_probe(struct udevice *dev)
	53	{
	54	/* Enable RTC Start in Control register*/
	55	pl031_write_reg(dev, RTC_CR, RTC_CR_START);
	56
	57	return 0;
	58	}
	59
	60	/*
	61	* Get the current time from the RTC
535cfa4f	62	*/
a370e429	63	static int pl031_get(struct udevice dev, struct rtc_time tm)
535cfa4f	64	{
a370e429 AT	65	unsigned long tim;
	66
	67	if (!tm)
	68	return -EINVAL;
	69
	70	tim = pl031_read_reg(dev, RTC_DR);
	71
	72	rtc_to_tm(tim, tm);
	73
	74	debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	75	tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	76	tm->tm_hour, tm->tm_min, tm->tm_sec);
	77
	78	return 0;
535cfa4f GH	79	}
	80
	81	/*
	82	* Set the RTC
a370e429 AT	83	*/
a370e429 AT	84	static int pl031_set(struct udevice dev, const struct rtc_time tm)
535cfa4f GH	85	{
	86	unsigned long tim;
	87
a370e429 AT	88	if (!tm)
a370e429 AT	89	return -EINVAL;
535cfa4f	90
a370e429 AT	91	debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	92	tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
	93	tm->tm_hour, tm->tm_min, tm->tm_sec);
535cfa4f GH	94
535cfa4f GH	95	/* Calculate number of seconds this incoming time represents */
a370e429	96	tim = rtc_mktime(tm);
535cfa4f	97
a370e429	98	pl031_write_reg(dev, RTC_LR, tim);
d1e23194	99
a370e429	100	return 0;
535cfa4f GH	101	}
	102
	103	/*
a370e429	104	* Reset the RTC. We set the date back to 1970-01-01.
535cfa4f	105	*/
a370e429	106	static int pl031_reset(struct udevice *dev)
535cfa4f	107	{
a370e429	108	pl031_write_reg(dev, RTC_LR, 0);
535cfa4f	109
a370e429 AT	110	return 0;
a370e429 AT	111	}
535cfa4f	112
a370e429 AT	113	static const struct rtc_ops pl031_ops = {
	114	.get = pl031_get,
	115	.set = pl031_set,
	116	.reset = pl031_reset,
	117	};
535cfa4f	118
a370e429 AT	119	static const struct udevice_id pl031_ids[] = {
	120	{ .compatible = "arm,pl031" },
	121	{ }
	122	};
535cfa4f	123
a370e429 AT	124	static int pl031_ofdata_to_platdata(struct udevice *dev)
	125	{
	126	struct pl031_platdata *pdata = dev_get_platdata(dev);
535cfa4f	127
a370e429	128	pdata->base = dev_read_addr(dev);
535cfa4f GH	129
	130	return 0;
	131	}
	132
a370e429 AT	133	U_BOOT_DRIVER(rtc_pl031) = {
	134	.name = "rtc-pl031",
	135	.id = UCLASS_RTC,
	136	.of_match = pl031_ids,
	137	.probe = pl031_probe,
	138	.ofdata_to_platdata = pl031_ofdata_to_platdata,
	139	.platdata_auto_alloc_size = sizeof(struct pl031_platdata),
	140	.ops = &pl031_ops,
	141	};