[thirdparty/kernel/stable.git] / drivers / s390 / cio / qdio_setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 * qdio queue initialization
 *
 * Copyright IBM Corp. 2008
 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
 */
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <linux/io.h>

#include <asm/ebcdic.h>
#include <asm/qdio.h>

#include "cio.h"
#include "css.h"
#include "device.h"
#include "ioasm.h"
#include "chsc.h"
#include "qdio.h"
#include "qdio_debug.h"

#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))

static struct kmem_cache *qdio_q_cache;
static struct kmem_cache *qdio_aob_cache;

struct qaob *qdio_allocate_aob(void)
{
	return kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
}
EXPORT_SYMBOL_GPL(qdio_allocate_aob);

void qdio_release_aob(struct qaob *aob)
{
	kmem_cache_free(qdio_aob_cache, aob);
}
EXPORT_SYMBOL_GPL(qdio_release_aob);

/**
 * qdio_free_buffers() - free qdio buffers
 * @buf: array of pointers to qdio buffers
 * @count: number of qdio buffers to free
 */
void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count)
{
	int pos;

	for (pos = 0; pos < count; pos += QBUFF_PER_PAGE)
		free_page((unsigned long) buf[pos]);
}
EXPORT_SYMBOL_GPL(qdio_free_buffers);

/**
 * qdio_alloc_buffers() - allocate qdio buffers
 * @buf: array of pointers to qdio buffers
 * @count: number of qdio buffers to allocate
 */
int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count)
{
	int pos;

	for (pos = 0; pos < count; pos += QBUFF_PER_PAGE) {
		buf[pos] = (void *) get_zeroed_page(GFP_KERNEL);
		if (!buf[pos]) {
			qdio_free_buffers(buf, count);
			return -ENOMEM;
		}
	}
	for (pos = 0; pos < count; pos++)
		if (pos % QBUFF_PER_PAGE)
			buf[pos] = buf[pos - 1] + 1;
	return 0;
}
EXPORT_SYMBOL_GPL(qdio_alloc_buffers);

/**
 * qdio_reset_buffers() - reset qdio buffers
 * @buf: array of pointers to qdio buffers
 * @count: number of qdio buffers that will be zeroed
 */
void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count)
{
	int pos;

	for (pos = 0; pos < count; pos++)
		memset(buf[pos], 0, sizeof(struct qdio_buffer));
}
EXPORT_SYMBOL_GPL(qdio_reset_buffers);

static void __qdio_free_queues(struct qdio_q **queues, unsigned int count)
{
	struct qdio_q *q;
	unsigned int i;

	for (i = 0; i < count; i++) {
		q = queues[i];
		free_page((unsigned long) q->slib);
		kmem_cache_free(qdio_q_cache, q);
	}
}

void qdio_free_queues(struct qdio_irq *irq_ptr)
{
	__qdio_free_queues(irq_ptr->input_qs, irq_ptr->max_input_qs);
	irq_ptr->max_input_qs = 0;

	__qdio_free_queues(irq_ptr->output_qs, irq_ptr->max_output_qs);
	irq_ptr->max_output_qs = 0;
}

static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
{
	struct qdio_q *q;
	int i;

	for (i = 0; i < nr_queues; i++) {
		q = kmem_cache_zalloc(qdio_q_cache, GFP_KERNEL);
		if (!q) {
			__qdio_free_queues(irq_ptr_qs, i);
			return -ENOMEM;
		}

		q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
		if (!q->slib) {
			kmem_cache_free(qdio_q_cache, q);
			__qdio_free_queues(irq_ptr_qs, i);
			return -ENOMEM;
		}
		irq_ptr_qs[i] = q;
	}
	return 0;
}

int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
{
	int rc;

	rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
	if (rc)
		return rc;

	rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
	if (rc) {
		__qdio_free_queues(irq_ptr->input_qs, nr_input_qs);
		return rc;
	}

	irq_ptr->max_input_qs = nr_input_qs;
	irq_ptr->max_output_qs = nr_output_qs;
	return 0;
}

static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
			      qdio_handler_t *handler, int i)
{
	struct slib *slib = q->slib;

	/* queue must be cleared for qdio_establish */
	memset(q, 0, sizeof(*q));
	memset(slib, 0, PAGE_SIZE);
	q->slib = slib;
	q->irq_ptr = irq_ptr;
	q->mask = 1 << (31 - i);
	q->nr = i;
	q->handler = handler;
}

static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
				struct qdio_buffer **sbals_array, int i)
{
	struct qdio_q *prev;
	int j;

	DBF_HEX(&q, sizeof(void *));
	q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);

	/* fill in sbal */
	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
		q->sbal[j] = *sbals_array++;

	/* fill in slib */
	if (i > 0) {
		prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
			: irq_ptr->output_qs[i - 1];
		prev->slib->nsliba = (unsigned long)q->slib;
	}

	q->slib->sla = (unsigned long)q->sl;
	q->slib->slsba = (unsigned long)&q->slsb.val[0];

	/* fill in sl */
	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
		q->sl->element[j].sbal = virt_to_phys(q->sbal[j]);
}

static void setup_queues(struct qdio_irq *irq_ptr,
			 struct qdio_initialize *qdio_init)
{
	struct qdio_q *q;
	int i;

	for_each_input_queue(irq_ptr, q, i) {
		DBF_EVENT("inq:%1d", i);
		setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);

		q->is_input_q = 1;

		setup_storage_lists(q, irq_ptr,
				    qdio_init->input_sbal_addr_array[i], i);
	}

	for_each_output_queue(irq_ptr, q, i) {
		DBF_EVENT("outq:%1d", i);
		setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);

		q->is_input_q = 0;
		setup_storage_lists(q, irq_ptr,
				    qdio_init->output_sbal_addr_array[i], i);
	}
}

static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
				  unsigned char qdioac, unsigned long token)
{
	if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
		goto no_qebsm;
	if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
	    (!(qdioac & AC1_SC_QEBSM_ENABLED)))
		goto no_qebsm;

	irq_ptr->sch_token = token;

	DBF_EVENT("V=V:1");
	DBF_EVENT("%8lx", irq_ptr->sch_token);
	return;

no_qebsm:
	irq_ptr->sch_token = 0;
	irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
	DBF_EVENT("noV=V");
}

/*
 * If there is a qdio_irq we use the chsc_page and store the information
 * in the qdio_irq, otherwise we copy it to the specified structure.
 */
int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
			struct subchannel_id *schid,
			struct qdio_ssqd_desc *data)
{
	struct chsc_ssqd_area *ssqd;
	int rc;

	DBF_EVENT("getssqd:%4x", schid->sch_no);
	if (!irq_ptr) {
		ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
		if (!ssqd)
			return -ENOMEM;
	} else {
		ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
	}

	rc = chsc_ssqd(*schid, ssqd);
	if (rc)
		goto out;

	if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
	    !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
	    (ssqd->qdio_ssqd.sch != schid->sch_no))
		rc = -EINVAL;

	if (!rc)
		memcpy(data, &ssqd->qdio_ssqd, sizeof(*data));

out:
	if (!irq_ptr)
		free_page((unsigned long)ssqd);

	return rc;
}

void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
{
	unsigned char qdioac;
	int rc;

	rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, &irq_ptr->ssqd_desc);
	if (rc) {
		DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
		DBF_ERROR("rc:%x", rc);
		/* all flags set, worst case */
		qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
			 AC1_SIGA_SYNC_NEEDED;
	} else
		qdioac = irq_ptr->ssqd_desc.qdioac1;

	check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
	irq_ptr->qdioac1 = qdioac;
	DBF_EVENT("ac 1:%2x 2:%4x", qdioac, irq_ptr->ssqd_desc.qdioac2);
	DBF_EVENT("3:%4x qib:%4x", irq_ptr->ssqd_desc.qdioac3, irq_ptr->qib.ac);
}

static void qdio_fill_qdr_desc(struct qdesfmt0 *desc, struct qdio_q *queue)
{
	desc->sliba = virt_to_phys(queue->slib);
	desc->sla = virt_to_phys(queue->sl);
	desc->slsba = virt_to_phys(&queue->slsb);

	desc->akey = PAGE_DEFAULT_KEY >> 4;
	desc->bkey = PAGE_DEFAULT_KEY >> 4;
	desc->ckey = PAGE_DEFAULT_KEY >> 4;
	desc->dkey = PAGE_DEFAULT_KEY >> 4;
}

static void setup_qdr(struct qdio_irq *irq_ptr,
		      struct qdio_initialize *qdio_init)
{
	struct qdesfmt0 *desc = &irq_ptr->qdr->qdf0[0];
	int i;

	memset(irq_ptr->qdr, 0, sizeof(struct qdr));

	irq_ptr->qdr->qfmt = qdio_init->q_format;
	irq_ptr->qdr->ac = qdio_init->qdr_ac;
	irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
	irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
	irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
	irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
	irq_ptr->qdr->qiba = virt_to_phys(&irq_ptr->qib);
	irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;

	for (i = 0; i < qdio_init->no_input_qs; i++)
		qdio_fill_qdr_desc(desc++, irq_ptr->input_qs[i]);

	for (i = 0; i < qdio_init->no_output_qs; i++)
		qdio_fill_qdr_desc(desc++, irq_ptr->output_qs[i]);
}

static void setup_qib(struct qdio_irq *irq_ptr,
		      struct qdio_initialize *init_data)
{
	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));

	irq_ptr->qib.qfmt = init_data->q_format;
	irq_ptr->qib.pfmt = init_data->qib_param_field_format;

	irq_ptr->qib.rflags = init_data->qib_rflags;
	if (css_general_characteristics.qebsm)
		irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;

	if (init_data->no_input_qs)
		irq_ptr->qib.isliba =
			(unsigned long)(irq_ptr->input_qs[0]->slib);
	if (init_data->no_output_qs)
		irq_ptr->qib.osliba =
			(unsigned long)(irq_ptr->output_qs[0]->slib);
	memcpy(irq_ptr->qib.ebcnam, dev_name(&irq_ptr->cdev->dev), 8);
	ASCEBC(irq_ptr->qib.ebcnam, 8);

	if (init_data->qib_param_field)
		memcpy(irq_ptr->qib.parm, init_data->qib_param_field,
		       sizeof(irq_ptr->qib.parm));
}

int qdio_setup_irq(struct qdio_irq *irq_ptr, struct qdio_initialize *init_data)
{
	struct ccw_device *cdev = irq_ptr->cdev;
	struct ciw *ciw;

	irq_ptr->qdioac1 = 0;
	memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
	memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
	memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));

	irq_ptr->debugfs_dev = NULL;
	irq_ptr->sch_token = irq_ptr->perf_stat_enabled = 0;
	irq_ptr->state = QDIO_IRQ_STATE_INACTIVE;

	irq_ptr->int_parm = init_data->int_parm;
	irq_ptr->nr_input_qs = init_data->no_input_qs;
	irq_ptr->nr_output_qs = init_data->no_output_qs;
	ccw_device_get_schid(cdev, &irq_ptr->schid);
	setup_queues(irq_ptr, init_data);

	irq_ptr->irq_poll = init_data->irq_poll;
	set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state);

	setup_qib(irq_ptr, init_data);

	/* fill input and output descriptors */
	setup_qdr(irq_ptr, init_data);

	/* qdr, qib, sls, slsbs, slibs, sbales are filled now */

	/* set our IRQ handler */
	spin_lock_irq(get_ccwdev_lock(cdev));
	irq_ptr->orig_handler = cdev->handler;
	cdev->handler = qdio_int_handler;
	spin_unlock_irq(get_ccwdev_lock(cdev));

	/* get qdio commands */
	ciw = ccw_device_get_ciw(cdev, CIW_TYPE_EQUEUE);
	if (!ciw) {
		DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
		return -EINVAL;
	}
	irq_ptr->equeue = *ciw;

	ciw = ccw_device_get_ciw(cdev, CIW_TYPE_AQUEUE);
	if (!ciw) {
		DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
		return -EINVAL;
	}
	irq_ptr->aqueue = *ciw;

	return 0;
}

void qdio_shutdown_irq(struct qdio_irq *irq)
{
	struct ccw_device *cdev = irq->cdev;

	/* restore IRQ handler */
	spin_lock_irq(get_ccwdev_lock(cdev));
	cdev->handler = irq->orig_handler;
	cdev->private->intparm = 0;
	spin_unlock_irq(get_ccwdev_lock(cdev));
}

void qdio_print_subchannel_info(struct qdio_irq *irq_ptr)
{
	dev_info(&irq_ptr->cdev->dev,
		 "qdio: %s on SC %x using AI:%d QEBSM:%d PRI:%d TDD:%d SIGA:%s%s%s\n",
		 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
			((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
		 irq_ptr->schid.sch_no,
		 is_thinint_irq(irq_ptr),
		 (irq_ptr->sch_token) ? 1 : 0,
		 pci_out_supported(irq_ptr) ? 1 : 0,
		 css_general_characteristics.aif_tdd,
		 qdio_need_siga_in(irq_ptr) ? "R" : " ",
		 qdio_need_siga_out(irq_ptr) ? "W" : " ",
		 qdio_need_siga_sync(irq_ptr) ? "S" : " ");
}

int __init qdio_setup_init(void)
{
	int rc;

	qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
					 256, 0, NULL);
	if (!qdio_q_cache)
		return -ENOMEM;

	qdio_aob_cache = kmem_cache_create("qdio_aob",
					sizeof(struct qaob),
					sizeof(struct qaob),
					0,
					NULL);
	if (!qdio_aob_cache) {
		rc = -ENOMEM;
		goto free_qdio_q_cache;
	}

	/* Check for OSA/FCP thin interrupts (bit 67). */
	DBF_EVENT("thinint:%1d",
		  (css_general_characteristics.aif_osa) ? 1 : 0);

	/* Check for QEBSM support in general (bit 58). */
	DBF_EVENT("cssQEBSM:%1d", css_general_characteristics.qebsm);
	rc = 0;
out:
	return rc;
free_qdio_q_cache:
	kmem_cache_destroy(qdio_q_cache);
	goto out;
}

void qdio_setup_exit(void)
{
	kmem_cache_destroy(qdio_aob_cache);
	kmem_cache_destroy(qdio_q_cache);
}
Commit	Line	Data
724117b7	1	// SPDX-License-Identifier: GPL-2.0
779e6e1c	2	/*
779e6e1c JG	3	* qdio queue initialization
779e6e1c JG	4	*
a53c8fab	5	* Copyright IBM Corp. 2008
779e6e1c JG	6	* Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
	7	*/
	8	#include <linux/kernel.h>
	9	#include <linux/slab.h>
3a4c5d59	10	#include <linux/export.h>
e9091ffd	11	#include <linux/io.h>
180a4c42 JW	12
180a4c42 JW	13	#include <asm/ebcdic.h>
779e6e1c JG	14	#include <asm/qdio.h>
	15
	16	#include "cio.h"
	17	#include "css.h"
	18	#include "device.h"
	19	#include "ioasm.h"
	20	#include "chsc.h"
	21	#include "qdio.h"
	22	#include "qdio_debug.h"
	23
5245c924 SO	24	#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))
5245c924 SO	25
779e6e1c	26	static struct kmem_cache *qdio_q_cache;
104ea556	27	static struct kmem_cache *qdio_aob_cache;
104ea556	28
400d8291	29	struct qaob *qdio_allocate_aob(void)
104ea556	30	{
400d8291	31	return kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
104ea556	32	}
396c1004	33	EXPORT_SYMBOL_GPL(qdio_allocate_aob);
104ea556	34
	35	void qdio_release_aob(struct qaob *aob)
	36	{
	37	kmem_cache_free(qdio_aob_cache, aob);
	38	}
	39	EXPORT_SYMBOL_GPL(qdio_release_aob);
779e6e1c	40
5245c924 SO	41	/**
	42	* qdio_free_buffers() - free qdio buffers
	43	* @buf: array of pointers to qdio buffers
	44	* @count: number of qdio buffers to free
	45	*/
	46	void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count)
	47	{
	48	int pos;
	49
	50	for (pos = 0; pos < count; pos += QBUFF_PER_PAGE)
	51	free_page((unsigned long) buf[pos]);
	52	}
	53	EXPORT_SYMBOL_GPL(qdio_free_buffers);
	54
	55	/**
	56	* qdio_alloc_buffers() - allocate qdio buffers
	57	* @buf: array of pointers to qdio buffers
	58	* @count: number of qdio buffers to allocate
	59	*/
	60	int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count)
	61	{
	62	int pos;
	63
	64	for (pos = 0; pos < count; pos += QBUFF_PER_PAGE) {
	65	buf[pos] = (void *) get_zeroed_page(GFP_KERNEL);
	66	if (!buf[pos]) {
	67	qdio_free_buffers(buf, count);
	68	return -ENOMEM;
	69	}
	70	}
	71	for (pos = 0; pos < count; pos++)
	72	if (pos % QBUFF_PER_PAGE)
	73	buf[pos] = buf[pos - 1] + 1;
	74	return 0;
	75	}
	76	EXPORT_SYMBOL_GPL(qdio_alloc_buffers);
	77
	78	/**
	79	* qdio_reset_buffers() - reset qdio buffers
	80	* @buf: array of pointers to qdio buffers
	81	* @count: number of qdio buffers that will be zeroed
	82	*/
	83	void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count)
	84	{
	85	int pos;
	86
	87	for (pos = 0; pos < count; pos++)
	88	memset(buf[pos], 0, sizeof(struct qdio_buffer));
	89	}
	90	EXPORT_SYMBOL_GPL(qdio_reset_buffers);
	91
2a7cf35c JW	92	static void __qdio_free_queues(struct qdio_q **queues, unsigned int count)
	93	{
	94	struct qdio_q *q;
	95	unsigned int i;
	96
	97	for (i = 0; i < count; i++) {
	98	q = queues[i];
	99	free_page((unsigned long) q->slib);
	100	kmem_cache_free(qdio_q_cache, q);
	101	}
	102	}
	103
d188cac3 JW	104	void qdio_free_queues(struct qdio_irq *irq_ptr)
	105	{
	106	__qdio_free_queues(irq_ptr->input_qs, irq_ptr->max_input_qs);
	107	irq_ptr->max_input_qs = 0;
	108
	109	__qdio_free_queues(irq_ptr->output_qs, irq_ptr->max_output_qs);
	110	irq_ptr->max_output_qs = 0;
	111	}
	112
779e6e1c JG	113	static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
	114	{
	115	struct qdio_q *q;
	116	int i;
	117
	118	for (i = 0; i < nr_queues; i++) {
e5218134	119	q = kmem_cache_zalloc(qdio_q_cache, GFP_KERNEL);
2a7cf35c JW	120	if (!q) {
2a7cf35c JW	121	__qdio_free_queues(irq_ptr_qs, i);
779e6e1c	122	return -ENOMEM;
2a7cf35c	123	}
779e6e1c JG	124
	125	q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
	126	if (!q->slib) {
	127	kmem_cache_free(qdio_q_cache, q);
2a7cf35c	128	__qdio_free_queues(irq_ptr_qs, i);
779e6e1c JG	129	return -ENOMEM;
779e6e1c JG	130	}
779e6e1c JG	131	irq_ptr_qs[i] = q;
	132	}
	133	return 0;
	134	}
	135
	136	int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
	137	{
	138	int rc;
	139
	140	rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
	141	if (rc)
	142	return rc;
2a7cf35c	143
779e6e1c	144	rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
d188cac3	145	if (rc) {
2a7cf35c	146	__qdio_free_queues(irq_ptr->input_qs, nr_input_qs);
d188cac3 JW	147	return rc;
d188cac3 JW	148	}
2a7cf35c	149
d188cac3 JW	150	irq_ptr->max_input_qs = nr_input_qs;
	151	irq_ptr->max_output_qs = nr_output_qs;
	152	return 0;
779e6e1c JG	153	}
	154
	155	static void setup_queues_misc(struct qdio_q q, struct qdio_irq irq_ptr,
	156	qdio_handler_t *handler, int i)
	157	{
5382fe11	158	struct slib *slib = q->slib;
779e6e1c	159
5382fe11 JG	160	/* queue must be cleared for qdio_establish */
	161	memset(q, 0, sizeof(*q));
	162	memset(slib, 0, PAGE_SIZE);
	163	q->slib = slib;
779e6e1c JG	164	q->irq_ptr = irq_ptr;
	165	q->mask = 1 << (31 - i);
	166	q->nr = i;
	167	q->handler = handler;
	168	}
	169
	170	static void setup_storage_lists(struct qdio_q q, struct qdio_irq irq_ptr,
bdf11767	171	struct qdio_buffer **sbals_array, int i)
779e6e1c JG	172	{
	173	struct qdio_q *prev;
	174	int j;
	175
22f99347	176	DBF_HEX(&q, sizeof(void *));
779e6e1c JG	177	q->sl = (struct sl )((char )q->slib + PAGE_SIZE / 2);
	178
	179	/* fill in sbal */
ce1d8014	180	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
779e6e1c	181	q->sbal[j] = *sbals_array++;
779e6e1c JG	182
	183	/* fill in slib */
	184	if (i > 0) {
	185	prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
	186	: irq_ptr->output_qs[i - 1];
	187	prev->slib->nsliba = (unsigned long)q->slib;
	188	}
	189
	190	q->slib->sla = (unsigned long)q->sl;
	191	q->slib->slsba = (unsigned long)&q->slsb.val[0];
	192
	193	/* fill in sl */
	194	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
e9091ffd	195	q->sl->element[j].sbal = virt_to_phys(q->sbal[j]);
779e6e1c JG	196	}
	197
	198	static void setup_queues(struct qdio_irq *irq_ptr,
	199	struct qdio_initialize *qdio_init)
	200	{
779e6e1c	201	struct qdio_q *q;
779e6e1c JG	202	int i;
779e6e1c JG	203
779e6e1c	204	for_each_input_queue(irq_ptr, q, i) {
104ea556	205	DBF_EVENT("inq:%1d", i);
779e6e1c JG	206	setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
	207
	208	q->is_input_q = 1;
104ea556	209
d8564e19 JW	210	setup_storage_lists(q, irq_ptr,
d8564e19 JW	211	qdio_init->input_sbal_addr_array[i], i);
779e6e1c JG	212	}
	213
	214	for_each_output_queue(irq_ptr, q, i) {
22f99347	215	DBF_EVENT("outq:%1d", i);
779e6e1c JG	216	setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
	217
	218	q->is_input_q = 0;
d8564e19 JW	219	setup_storage_lists(q, irq_ptr,
d8564e19 JW	220	qdio_init->output_sbal_addr_array[i], i);
779e6e1c JG	221	}
	222	}
	223
779e6e1c JG	224	static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
	225	unsigned char qdioac, unsigned long token)
	226	{
779e6e1c JG	227	if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
	228	goto no_qebsm;
	229	if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) \|\|
	230	(!(qdioac & AC1_SC_QEBSM_ENABLED)))
	231	goto no_qebsm;
	232
	233	irq_ptr->sch_token = token;
	234
22f99347 JG	235	DBF_EVENT("V=V:1");
22f99347 JG	236	DBF_EVENT("%8lx", irq_ptr->sch_token);
779e6e1c JG	237	return;
	238
	239	no_qebsm:
	240	irq_ptr->sch_token = 0;
	241	irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
22f99347	242	DBF_EVENT("noV=V");
779e6e1c JG	243	}
779e6e1c JG	244
bbd50e17 JG	245	/*
	246	* If there is a qdio_irq we use the chsc_page and store the information
	247	* in the qdio_irq, otherwise we copy it to the specified structure.
	248	*/
	249	int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
	250	struct subchannel_id *schid,
	251	struct qdio_ssqd_desc *data)
779e6e1c JG	252	{
	253	struct chsc_ssqd_area *ssqd;
	254	int rc;
	255
22f99347	256	DBF_EVENT("getssqd:%4x", schid->sch_no);
da5b6cb1	257	if (!irq_ptr) {
bbd50e17	258	ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
da5b6cb1 SO	259	if (!ssqd)
	260	return -ENOMEM;
	261	} else {
	262	ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
	263	}
	264
	265	rc = chsc_ssqd(*schid, ssqd);
779e6e1c	266	if (rc)
da5b6cb1	267	goto out;
779e6e1c JG	268
	269	if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) \|\|
	270	!(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) \|\|
bbd50e17	271	(ssqd->qdio_ssqd.sch != schid->sch_no))
da5b6cb1 SO	272	rc = -EINVAL;
	273
	274	if (!rc)
	275	memcpy(data, &ssqd->qdio_ssqd, sizeof(*data));
	276
	277	out:
	278	if (!irq_ptr)
bbd50e17	279	free_page((unsigned long)ssqd);
da5b6cb1 SO	280
da5b6cb1 SO	281	return rc;
779e6e1c JG	282	}
	283
	284	void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
	285	{
	286	unsigned char qdioac;
779e6e1c JG	287	int rc;
779e6e1c JG	288
da5b6cb1	289	rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, &irq_ptr->ssqd_desc);
779e6e1c	290	if (rc) {
22f99347 JG	291	DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
22f99347 JG	292	DBF_ERROR("rc:%x", rc);
779e6e1c JG	293	/* all flags set, worst case */
	294	qdioac = AC1_SIGA_INPUT_NEEDED \| AC1_SIGA_OUTPUT_NEEDED \|
	295	AC1_SIGA_SYNC_NEEDED;
	296	} else
	297	qdioac = irq_ptr->ssqd_desc.qdioac1;
	298
	299	check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
10376b53	300	irq_ptr->qdioac1 = qdioac;
61d84979 JG	301	DBF_EVENT("ac 1:%2x 2:%4x", qdioac, irq_ptr->ssqd_desc.qdioac2);
61d84979 JG	302	DBF_EVENT("3:%4x qib:%4x", irq_ptr->ssqd_desc.qdioac3, irq_ptr->qib.ac);
779e6e1c JG	303	}
779e6e1c JG	304
4d4a3caa	305	static void qdio_fill_qdr_desc(struct qdesfmt0 desc, struct qdio_q queue)
779e6e1c	306	{
4d4a3caa JW	307	desc->sliba = virt_to_phys(queue->slib);
	308	desc->sla = virt_to_phys(queue->sl);
	309	desc->slsba = virt_to_phys(&queue->slsb);
	310
	311	desc->akey = PAGE_DEFAULT_KEY >> 4;
	312	desc->bkey = PAGE_DEFAULT_KEY >> 4;
	313	desc->ckey = PAGE_DEFAULT_KEY >> 4;
	314	desc->dkey = PAGE_DEFAULT_KEY >> 4;
779e6e1c JG	315	}
	316
	317	static void setup_qdr(struct qdio_irq *irq_ptr,
	318	struct qdio_initialize *qdio_init)
	319	{
4d4a3caa	320	struct qdesfmt0 *desc = &irq_ptr->qdr->qdf0[0];
779e6e1c JG	321	int i;
779e6e1c JG	322
44d9a21a JW	323	memset(irq_ptr->qdr, 0, sizeof(struct qdr));
44d9a21a JW	324
779e6e1c	325	irq_ptr->qdr->qfmt = qdio_init->q_format;
dfe5bb50	326	irq_ptr->qdr->ac = qdio_init->qdr_ac;
779e6e1c JG	327	irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
	328	irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
	329	irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
	330	irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
4d4a3caa	331	irq_ptr->qdr->qiba = virt_to_phys(&irq_ptr->qib);
d1bf8590	332	irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
779e6e1c JG	333
779e6e1c JG	334	for (i = 0; i < qdio_init->no_input_qs; i++)
4d4a3caa	335	qdio_fill_qdr_desc(desc++, irq_ptr->input_qs[i]);
779e6e1c JG	336
779e6e1c JG	337	for (i = 0; i < qdio_init->no_output_qs; i++)
4d4a3caa	338	qdio_fill_qdr_desc(desc++, irq_ptr->output_qs[i]);
779e6e1c JG	339	}
	340
	341	static void setup_qib(struct qdio_irq *irq_ptr,
	342	struct qdio_initialize *init_data)
	343	{
44d9a21a	344	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
dcc18f48	345
779e6e1c	346	irq_ptr->qib.qfmt = init_data->q_format;
44d9a21a JW	347	irq_ptr->qib.pfmt = init_data->qib_param_field_format;
	348
	349	irq_ptr->qib.rflags = init_data->qib_rflags;
	350	if (css_general_characteristics.qebsm)
	351	irq_ptr->qib.rflags \|= QIB_RFLAGS_ENABLE_QEBSM;
	352
779e6e1c JG	353	if (init_data->no_input_qs)
	354	irq_ptr->qib.isliba =
	355	(unsigned long)(irq_ptr->input_qs[0]->slib);
	356	if (init_data->no_output_qs)
	357	irq_ptr->qib.osliba =
	358	(unsigned long)(irq_ptr->output_qs[0]->slib);
180a4c42 JW	359	memcpy(irq_ptr->qib.ebcnam, dev_name(&irq_ptr->cdev->dev), 8);
180a4c42 JW	360	ASCEBC(irq_ptr->qib.ebcnam, 8);
44d9a21a JW	361
	362	if (init_data->qib_param_field)
	363	memcpy(irq_ptr->qib.parm, init_data->qib_param_field,
	364	sizeof(irq_ptr->qib.parm));
779e6e1c JG	365	}
779e6e1c JG	366
014816b6	367	int qdio_setup_irq(struct qdio_irq irq_ptr, struct qdio_initialize init_data)
779e6e1c	368	{
b2745655	369	struct ccw_device *cdev = irq_ptr->cdev;
779e6e1c	370	struct ciw *ciw;
779e6e1c	371
10376b53	372	irq_ptr->qdioac1 = 0;
432ac5e0 JG	373	memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
	374	memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
	375	memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
	376
d5d006fa	377	irq_ptr->debugfs_dev = NULL;
6e2a7b51 JW	378	irq_ptr->sch_token = irq_ptr->perf_stat_enabled = 0;
6e2a7b51 JW	379	irq_ptr->state = QDIO_IRQ_STATE_INACTIVE;
432ac5e0	380
779e6e1c JG	381	irq_ptr->int_parm = init_data->int_parm;
	382	irq_ptr->nr_input_qs = init_data->no_input_qs;
	383	irq_ptr->nr_output_qs = init_data->no_output_qs;
dd62abd2	384	ccw_device_get_schid(cdev, &irq_ptr->schid);
779e6e1c JG	385	setup_queues(irq_ptr, init_data);
779e6e1c JG	386
1ecbcfd5 JW	387	irq_ptr->irq_poll = init_data->irq_poll;
1ecbcfd5 JW	388	set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state);
0a6e6345	389
779e6e1c	390	setup_qib(irq_ptr, init_data);
779e6e1c JG	391
	392	/* fill input and output descriptors */
	393	setup_qdr(irq_ptr, init_data);
	394
	395	/* qdr, qib, sls, slsbs, slibs, sbales are filled now */
	396
7b942b4b JW	397	/* set our IRQ handler */
	398	spin_lock_irq(get_ccwdev_lock(cdev));
	399	irq_ptr->orig_handler = cdev->handler;
	400	cdev->handler = qdio_int_handler;
	401	spin_unlock_irq(get_ccwdev_lock(cdev));
	402
779e6e1c	403	/* get qdio commands */
dd62abd2	404	ciw = ccw_device_get_ciw(cdev, CIW_TYPE_EQUEUE);
779e6e1c	405	if (!ciw) {
22f99347	406	DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
2e68adcd	407	return -EINVAL;
779e6e1c JG	408	}
	409	irq_ptr->equeue = *ciw;
	410
dd62abd2	411	ciw = ccw_device_get_ciw(cdev, CIW_TYPE_AQUEUE);
779e6e1c	412	if (!ciw) {
22f99347	413	DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
2e68adcd	414	return -EINVAL;
779e6e1c JG	415	}
	416	irq_ptr->aqueue = *ciw;
	417
7b942b4b JW	418	return 0;
	419	}
	420
	421	void qdio_shutdown_irq(struct qdio_irq *irq)
	422	{
	423	struct ccw_device *cdev = irq->cdev;
	424
	425	/* restore IRQ handler */
dd62abd2	426	spin_lock_irq(get_ccwdev_lock(cdev));
7b942b4b JW	427	cdev->handler = irq->orig_handler;
7b942b4b JW	428	cdev->private->intparm = 0;
dd62abd2	429	spin_unlock_irq(get_ccwdev_lock(cdev));
779e6e1c JG	430	}
779e6e1c JG	431
b2745655	432	void qdio_print_subchannel_info(struct qdio_irq *irq_ptr)
779e6e1c	433	{
f86991b3 JW	434	dev_info(&irq_ptr->cdev->dev,
f86991b3 JW	435	"qdio: %s on SC %x using AI:%d QEBSM:%d PRI:%d TDD:%d SIGA:%s%s%s\n",
22f99347 JG	436	(irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
	437	((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
	438	irq_ptr->schid.sch_no,
	439	is_thinint_irq(irq_ptr),
	440	(irq_ptr->sch_token) ? 1 : 0,
f85b2b29	441	pci_out_supported(irq_ptr) ? 1 : 0,
22f99347	442	css_general_characteristics.aif_tdd,
10376b53 JW	443	qdio_need_siga_in(irq_ptr) ? "R" : " ",
	444	qdio_need_siga_out(irq_ptr) ? "W" : " ",
	445	qdio_need_siga_sync(irq_ptr) ? "S" : " ");
779e6e1c JG	446	}
	447
	448	int __init qdio_setup_init(void)
	449	{
104ea556	450	int rc;
104ea556	451
779e6e1c JG	452	qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
	453	256, 0, NULL);
	454	if (!qdio_q_cache)
	455	return -ENOMEM;
	456
104ea556	457	qdio_aob_cache = kmem_cache_create("qdio_aob",
	458	sizeof(struct qaob),
	459	sizeof(struct qaob),
	460	0,
	461	NULL);
	462	if (!qdio_aob_cache) {
	463	rc = -ENOMEM;
	464	goto free_qdio_q_cache;
	465	}
	466
779e6e1c	467	/* Check for OSA/FCP thin interrupts (bit 67). */
22f99347 JG	468	DBF_EVENT("thinint:%1d",
22f99347 JG	469	(css_general_characteristics.aif_osa) ? 1 : 0);
779e6e1c JG	470
779e6e1c JG	471	/* Check for QEBSM support in general (bit 58). */
44d9a21a	472	DBF_EVENT("cssQEBSM:%1d", css_general_characteristics.qebsm);
104ea556	473	rc = 0;
	474	out:
	475	return rc;
	476	free_qdio_q_cache:
	477	kmem_cache_destroy(qdio_q_cache);
	478	goto out;
779e6e1c JG	479	}
779e6e1c JG	480
3f1934bc	481	void qdio_setup_exit(void)
779e6e1c	482	{
104ea556	483	kmem_cache_destroy(qdio_aob_cache);
779e6e1c JG	484	kmem_cache_destroy(qdio_q_cache);
779e6e1c JG	485	}