]> git.ipfire.org Git - thirdparty/kernel/stable.git/blame - drivers/s390/net/qeth_core_main.c
projects / thirdparty / kernel / stable.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
s390/diag: add diag26c support
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
4a71df50
FB		 58static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
59static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
60static void qeth_free_buffer_pool(struct qeth_card *);
61static int qeth_qdio_establish(struct qeth_card *);
0da9581d 62static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 63static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
64 struct qeth_qdio_out_buffer *buf,
65 enum iucv_tx_notify notification);
66static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 67static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
68 struct qeth_qdio_out_buffer *buf,
69 enum qeth_qdio_buffer_states newbufstate);
72861ae7 70static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 71
b4d72c08 72struct workqueue_struct *qeth_wq;
c044dc21 73EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 74
511c2445
EC		 75int qeth_card_hw_is_reachable(struct qeth_card *card)
76{
77 return (card->state == CARD_STATE_SOFTSETUP) ||
78 (card->state == CARD_STATE_UP);
79}
80EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
81
0f54761d
SR		 82static void qeth_close_dev_handler(struct work_struct *work)
83{
84 struct qeth_card *card;
85
86 card = container_of(work, struct qeth_card, close_dev_work);
87 QETH_CARD_TEXT(card, 2, "cldevhdl");
88 rtnl_lock();
89 dev_close(card->dev);
90 rtnl_unlock();
91 ccwgroup_set_offline(card->gdev);
92}
93
94void qeth_close_dev(struct qeth_card *card)
95{
96 QETH_CARD_TEXT(card, 2, "cldevsubm");
97 queue_work(qeth_wq, &card->close_dev_work);
98}
99EXPORT_SYMBOL_GPL(qeth_close_dev);
100
4a71df50
FB		 101static inline const char *qeth_get_cardname(struct qeth_card *card)
102{
103 if (card->info.guestlan) {
104 switch (card->info.type) {
5113fec0 105 case QETH_CARD_TYPE_OSD:
7096b187 106 return " Virtual NIC QDIO";
4a71df50 107 case QETH_CARD_TYPE_IQD:
7096b187 108 return " Virtual NIC Hiper";
5113fec0 109 case QETH_CARD_TYPE_OSM:
7096b187 110 return " Virtual NIC QDIO - OSM";
5113fec0 111 case QETH_CARD_TYPE_OSX:
7096b187 112 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 113 default:
114 return " unknown";
115 }
116 } else {
117 switch (card->info.type) {
5113fec0 118 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 119 return " OSD Express";
120 case QETH_CARD_TYPE_IQD:
121 return " HiperSockets";
122 case QETH_CARD_TYPE_OSN:
123 return " OSN QDIO";
5113fec0
UB		 124 case QETH_CARD_TYPE_OSM:
125 return " OSM QDIO";
126 case QETH_CARD_TYPE_OSX:
127 return " OSX QDIO";
4a71df50
FB		 128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133}
134
135/* max length to be returned: 14 */
136const char *qeth_get_cardname_short(struct qeth_card *card)
137{
138 if (card->info.guestlan) {
139 switch (card->info.type) {
5113fec0 140 case QETH_CARD_TYPE_OSD:
7096b187 141 return "Virt.NIC QDIO";
4a71df50 142 case QETH_CARD_TYPE_IQD:
7096b187 143 return "Virt.NIC Hiper";
5113fec0 144 case QETH_CARD_TYPE_OSM:
7096b187 145 return "Virt.NIC OSM";
5113fec0 146 case QETH_CARD_TYPE_OSX:
7096b187 147 return "Virt.NIC OSX";
4a71df50
FB		 148 default:
149 return "unknown";
150 }
151 } else {
152 switch (card->info.type) {
5113fec0 153 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 154 switch (card->info.link_type) {
155 case QETH_LINK_TYPE_FAST_ETH:
156 return "OSD_100";
157 case QETH_LINK_TYPE_HSTR:
158 return "HSTR";
159 case QETH_LINK_TYPE_GBIT_ETH:
160 return "OSD_1000";
161 case QETH_LINK_TYPE_10GBIT_ETH:
162 return "OSD_10GIG";
163 case QETH_LINK_TYPE_LANE_ETH100:
164 return "OSD_FE_LANE";
165 case QETH_LINK_TYPE_LANE_TR:
166 return "OSD_TR_LANE";
167 case QETH_LINK_TYPE_LANE_ETH1000:
168 return "OSD_GbE_LANE";
169 case QETH_LINK_TYPE_LANE:
170 return "OSD_ATM_LANE";
171 default:
172 return "OSD_Express";
173 }
174 case QETH_CARD_TYPE_IQD:
175 return "HiperSockets";
176 case QETH_CARD_TYPE_OSN:
177 return "OSN";
5113fec0
UB		 178 case QETH_CARD_TYPE_OSM:
179 return "OSM_1000";
180 case QETH_CARD_TYPE_OSX:
181 return "OSX_10GIG";
4a71df50
FB		 182 default:
183 return "unknown";
184 }
185 }
186 return "n/a";
187}
188
65d8013c
SR		 189void qeth_set_recovery_task(struct qeth_card *card)
190{
191 card->recovery_task = current;
192}
193EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
194
195void qeth_clear_recovery_task(struct qeth_card *card)
196{
197 card->recovery_task = NULL;
198}
199EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
200
201static bool qeth_is_recovery_task(const struct qeth_card *card)
202{
203 return card->recovery_task == current;
204}
205
4a71df50
FB		 206void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
207 int clear_start_mask)
208{
209 unsigned long flags;
210
211 spin_lock_irqsave(&card->thread_mask_lock, flags);
212 card->thread_allowed_mask = threads;
213 if (clear_start_mask)
214 card->thread_start_mask &= threads;
215 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
216 wake_up(&card->wait_q);
217}
218EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
219
220int qeth_threads_running(struct qeth_card *card, unsigned long threads)
221{
222 unsigned long flags;
223 int rc = 0;
224
225 spin_lock_irqsave(&card->thread_mask_lock, flags);
226 rc = (card->thread_running_mask & threads);
227 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
228 return rc;
229}
230EXPORT_SYMBOL_GPL(qeth_threads_running);
231
232int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
233{
65d8013c
SR		 234 if (qeth_is_recovery_task(card))
235 return 0;
4a71df50
FB		 236 return wait_event_interruptible(card->wait_q,
237 qeth_threads_running(card, threads) == 0);
238}
239EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
240
241void qeth_clear_working_pool_list(struct qeth_card *card)
242{
243 struct qeth_buffer_pool_entry *pool_entry, *tmp;
244
847a50fd 245 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 246 list_for_each_entry_safe(pool_entry, tmp,
247 &card->qdio.in_buf_pool.entry_list, list){
248 list_del(&pool_entry->list);
249 }
250}
251EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
252
253static int qeth_alloc_buffer_pool(struct qeth_card *card)
254{
255 struct qeth_buffer_pool_entry *pool_entry;
256 void *ptr;
257 int i, j;
258
847a50fd 259 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 260 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 261 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 262 if (!pool_entry) {
263 qeth_free_buffer_pool(card);
264 return -ENOMEM;
265 }
266 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 267 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 268 if (!ptr) {
269 while (j > 0)
270 free_page((unsigned long)
271 pool_entry->elements[--j]);
272 kfree(pool_entry);
273 qeth_free_buffer_pool(card);
274 return -ENOMEM;
275 }
276 pool_entry->elements[j] = ptr;
277 }
278 list_add(&pool_entry->init_list,
279 &card->qdio.init_pool.entry_list);
280 }
281 return 0;
282}
283
284int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
285{
847a50fd 286 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 287
288 if ((card->state != CARD_STATE_DOWN) &&
289 (card->state != CARD_STATE_RECOVER))
290 return -EPERM;
291
292 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
293 qeth_clear_working_pool_list(card);
294 qeth_free_buffer_pool(card);
295 card->qdio.in_buf_pool.buf_count = bufcnt;
296 card->qdio.init_pool.buf_count = bufcnt;
297 return qeth_alloc_buffer_pool(card);
298}
76b11f8e 299EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 300
4601ba6c
SO		 301static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
302{
6d284bde
SO		 303 if (!q)
304 return;
305
306 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 307 kfree(q);
308}
309
310static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
311{
312 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
313 int i;
314
315 if (!q)
316 return NULL;
317
6d284bde
SO		 318 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
319 kfree(q);
320 return NULL;
321 }
322
4601ba6c 323 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 324 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 325
326 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
327 return q;
328}
329
0da9581d
EL		 330static inline int qeth_cq_init(struct qeth_card *card)
331{
332 int rc;
333
334 if (card->options.cq == QETH_CQ_ENABLED) {
335 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 336 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
337 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 338 card->qdio.c_q->next_buf_to_init = 127;
339 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
340 card->qdio.no_in_queues - 1, 0,
341 127);
342 if (rc) {
343 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
344 goto out;
345 }
346 }
347 rc = 0;
348out:
349 return rc;
350}
351
352static inline int qeth_alloc_cq(struct qeth_card *card)
353{
354 int rc;
355
356 if (card->options.cq == QETH_CQ_ENABLED) {
357 int i;
358 struct qdio_outbuf_state *outbuf_states;
359
360 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 361 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 362 if (!card->qdio.c_q) {
363 rc = -1;
364 goto kmsg_out;
365 }
0da9581d 366 card->qdio.no_in_queues = 2;
4a912f98 367 card->qdio.out_bufstates =
0da9581d
EL		 368 kzalloc(card->qdio.no_out_queues *
369 QDIO_MAX_BUFFERS_PER_Q *
370 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
371 outbuf_states = card->qdio.out_bufstates;
372 if (outbuf_states == NULL) {
373 rc = -1;
374 goto free_cq_out;
375 }
376 for (i = 0; i < card->qdio.no_out_queues; ++i) {
377 card->qdio.out_qs[i]->bufstates = outbuf_states;
378 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
379 }
380 } else {
381 QETH_DBF_TEXT(SETUP, 2, "nocq");
382 card->qdio.c_q = NULL;
383 card->qdio.no_in_queues = 1;
384 }
385 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
386 rc = 0;
387out:
388 return rc;
389free_cq_out:
4601ba6c 390 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 391 card->qdio.c_q = NULL;
392kmsg_out:
393 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
394 goto out;
395}
396
397static inline void qeth_free_cq(struct qeth_card *card)
398{
399 if (card->qdio.c_q) {
400 --card->qdio.no_in_queues;
4601ba6c 401 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 402 card->qdio.c_q = NULL;
403 }
404 kfree(card->qdio.out_bufstates);
405 card->qdio.out_bufstates = NULL;
406}
407
b3332930
FB		 408static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
409 int delayed) {
410 enum iucv_tx_notify n;
411
412 switch (sbalf15) {
413 case 0:
414 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
415 break;
416 case 4:
417 case 16:
418 case 17:
419 case 18:
420 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
421 TX_NOTIFY_UNREACHABLE;
422 break;
423 default:
424 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
425 TX_NOTIFY_GENERALERROR;
426 break;
427 }
428
429 return n;
430}
431
0da9581d
EL		 432static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
433 int bidx, int forced_cleanup)
434{
72861ae7
EL		 435 if (q->card->options.cq != QETH_CQ_ENABLED)
436 return;
437
0da9581d
EL		 438 if (q->bufs[bidx]->next_pending != NULL) {
439 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
440 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
441
442 while (c) {
443 if (forced_cleanup ||
444 atomic_read(&c->state) ==
445 QETH_QDIO_BUF_HANDLED_DELAYED) {
446 struct qeth_qdio_out_buffer *f = c;
447 QETH_CARD_TEXT(f->q->card, 5, "fp");
448 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 449 /* release here to avoid interleaving between
450 outbound tasklet and inbound tasklet
451 regarding notifications and lifecycle */
452 qeth_release_skbs(c);
453
0da9581d 454 c = f->next_pending;
18af5c17 455 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 456 head->next_pending = c;
457 kmem_cache_free(qeth_qdio_outbuf_cache, f);
458 } else {
459 head = c;
460 c = c->next_pending;
461 }
462
463 }
464 }
72861ae7
EL		 465 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
466 QETH_QDIO_BUF_HANDLED_DELAYED)) {
467 /* for recovery situations */
468 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
469 qeth_init_qdio_out_buf(q, bidx);
470 QETH_CARD_TEXT(q->card, 2, "clprecov");
471 }
0da9581d
EL		 472}
473
474
475static inline void qeth_qdio_handle_aob(struct qeth_card *card,
476 unsigned long phys_aob_addr) {
477 struct qaob *aob;
478 struct qeth_qdio_out_buffer *buffer;
b3332930 479 enum iucv_tx_notify notification;
0da9581d
EL		 480
481 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
482 QETH_CARD_TEXT(card, 5, "haob");
483 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
484 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
485 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
486
b3332930
FB		 487 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
488 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
489 notification = TX_NOTIFY_OK;
490 } else {
18af5c17
SR		 491 WARN_ON_ONCE(atomic_read(&buffer->state) !=
492 QETH_QDIO_BUF_PENDING);
b3332930
FB		 493 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
494 notification = TX_NOTIFY_DELAYED_OK;
495 }
496
497 if (aob->aorc != 0) {
498 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
499 notification = qeth_compute_cq_notification(aob->aorc, 1);
500 }
501 qeth_notify_skbs(buffer->q, buffer, notification);
502
0da9581d
EL		 503 buffer->aob = NULL;
504 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 505 QETH_QDIO_BUF_HANDLED_DELAYED);
506
0da9581d
EL		 507 /* from here on: do not touch buffer anymore */
508 qdio_release_aob(aob);
509}
510
511static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
512{
513 return card->options.cq == QETH_CQ_ENABLED &&
514 card->qdio.c_q != NULL &&
515 queue != 0 &&
516 queue == card->qdio.no_in_queues - 1;
517}
518
519
4a71df50
FB		 520static int qeth_issue_next_read(struct qeth_card *card)
521{
522 int rc;
523 struct qeth_cmd_buffer *iob;
524
847a50fd 525 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 526 if (card->read.state != CH_STATE_UP)
527 return -EIO;
528 iob = qeth_get_buffer(&card->read);
529 if (!iob) {
74eacdb9
FB		 530 dev_warn(&card->gdev->dev, "The qeth device driver "
531 "failed to recover an error on the device\n");
532 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
533 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 534 return -ENOMEM;
535 }
536 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 537 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 538 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
539 (addr_t) iob, 0, 0);
540 if (rc) {
74eacdb9
FB		 541 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
542 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 543 atomic_set(&card->read.irq_pending, 0);
908abbb5 544 card->read_or_write_problem = 1;
4a71df50
FB		 545 qeth_schedule_recovery(card);
546 wake_up(&card->wait_q);
547 }
548 return rc;
549}
550
551static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
552{
553 struct qeth_reply *reply;
554
555 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
556 if (reply) {
557 atomic_set(&reply->refcnt, 1);
558 atomic_set(&reply->received, 0);
559 reply->card = card;
6531084c 560 }
4a71df50
FB		 561 return reply;
562}
563
564static void qeth_get_reply(struct qeth_reply *reply)
565{
566 WARN_ON(atomic_read(&reply->refcnt) <= 0);
567 atomic_inc(&reply->refcnt);
568}
569
570static void qeth_put_reply(struct qeth_reply *reply)
571{
572 WARN_ON(atomic_read(&reply->refcnt) <= 0);
573 if (atomic_dec_and_test(&reply->refcnt))
574 kfree(reply);
575}
576
d11ba0c4 577static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 578 struct qeth_card *card)
579{
4a71df50 580 char *ipa_name;
d11ba0c4 581 int com = cmd->hdr.command;
4a71df50 582 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 583 if (rc)
70919e23
UB		 584 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
585 "x%X \"%s\"\n",
586 ipa_name, com, dev_name(&card->gdev->dev),
587 QETH_CARD_IFNAME(card), rc,
588 qeth_get_ipa_msg(rc));
d11ba0c4 589 else
70919e23
UB		 590 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
591 ipa_name, com, dev_name(&card->gdev->dev),
592 QETH_CARD_IFNAME(card));
4a71df50
FB		 593}
594
595static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
596 struct qeth_cmd_buffer *iob)
597{
598 struct qeth_ipa_cmd *cmd = NULL;
599
847a50fd 600 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 601 if (IS_IPA(iob->data)) {
602 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
603 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 604 if (cmd->hdr.command != IPA_CMD_SETCCID &&
605 cmd->hdr.command != IPA_CMD_DELCCID &&
606 cmd->hdr.command != IPA_CMD_MODCCID &&
607 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 608 qeth_issue_ipa_msg(cmd,
609 cmd->hdr.return_code, card);
4a71df50
FB		 610 return cmd;
611 } else {
612 switch (cmd->hdr.command) {
613 case IPA_CMD_STOPLAN:
0f54761d
SR		 614 if (cmd->hdr.return_code ==
615 IPA_RC_VEPA_TO_VEB_TRANSITION) {
616 dev_err(&card->gdev->dev,
617 "Interface %s is down because the "
618 "adjacent port is no longer in "
619 "reflective relay mode\n",
620 QETH_CARD_IFNAME(card));
621 qeth_close_dev(card);
622 } else {
623 dev_warn(&card->gdev->dev,
74eacdb9
FB		 624 "The link for interface %s on CHPID"
625 " 0x%X failed\n",
4a71df50
FB		 626 QETH_CARD_IFNAME(card),
627 card->info.chpid);
0f54761d
SR		 628 qeth_issue_ipa_msg(cmd,
629 cmd->hdr.return_code, card);
630 }
4a71df50
FB		 631 card->lan_online = 0;
632 if (card->dev && netif_carrier_ok(card->dev))
633 netif_carrier_off(card->dev);
634 return NULL;
635 case IPA_CMD_STARTLAN:
74eacdb9
FB		 636 dev_info(&card->gdev->dev,
637 "The link for %s on CHPID 0x%X has"
638 " been restored\n",
4a71df50
FB		 639 QETH_CARD_IFNAME(card),
640 card->info.chpid);
641 netif_carrier_on(card->dev);
922dc062 642 card->lan_online = 1;
1da74b1c
FB		 643 if (card->info.hwtrap)
644 card->info.hwtrap = 2;
4a71df50
FB		 645 qeth_schedule_recovery(card);
646 return NULL;
9c23f4da
EC		 647 case IPA_CMD_SETBRIDGEPORT_IQD:
648 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 649 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 650 if (card->discipline->control_event_handler
651 (card, cmd))
652 return cmd;
653 else
654 return NULL;
4a71df50
FB		 655 case IPA_CMD_MODCCID:
656 return cmd;
657 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 658 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 659 break;
660 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 661 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 662 break;
663 default:
c4cef07c 664 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 665 "but not a reply!\n");
666 break;
667 }
668 }
669 }
670 return cmd;
671}
672
673void qeth_clear_ipacmd_list(struct qeth_card *card)
674{
675 struct qeth_reply *reply, *r;
676 unsigned long flags;
677
847a50fd 678 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 679
680 spin_lock_irqsave(&card->lock, flags);
681 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
682 qeth_get_reply(reply);
683 reply->rc = -EIO;
684 atomic_inc(&reply->received);
685 list_del_init(&reply->list);
686 wake_up(&reply->wait_q);
687 qeth_put_reply(reply);
688 }
689 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 690 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 691}
692EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
693
5113fec0
UB		 694static int qeth_check_idx_response(struct qeth_card *card,
695 unsigned char *buffer)
4a71df50
FB		 696{
697 if (!buffer)
698 return 0;
699
d11ba0c4 700 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 701 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 702 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 703 "with cause code 0x%02x%s\n",
704 buffer[4],
705 ((buffer[4] == 0x22) ?
706 " -- try another portname" : ""));
847a50fd
CO		 707 QETH_CARD_TEXT(card, 2, "ckidxres");
708 QETH_CARD_TEXT(card, 2, " idxterm");
709 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 710 if (buffer[4] == 0xf6) {
711 dev_err(&card->gdev->dev,
712 "The qeth device is not configured "
713 "for the OSI layer required by z/VM\n");
714 return -EPERM;
715 }
4a71df50
FB		 716 return -EIO;
717 }
718 return 0;
719}
720
bca51650
TR		 721static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
722{
723 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
724 dev_get_drvdata(&cdev->dev))->dev);
725 return card;
726}
727
4a71df50
FB		 728static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
729 __u32 len)
730{
731 struct qeth_card *card;
732
4a71df50 733 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 734 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 735 if (channel == &card->read)
736 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
737 else
738 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
739 channel->ccw.count = len;
740 channel->ccw.cda = (__u32) __pa(iob);
741}
742
743static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
744{
745 __u8 index;
746
847a50fd 747 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 748 index = channel->io_buf_no;
749 do {
750 if (channel->iob[index].state == BUF_STATE_FREE) {
751 channel->iob[index].state = BUF_STATE_LOCKED;
752 channel->io_buf_no = (channel->io_buf_no + 1) %
753 QETH_CMD_BUFFER_NO;
754 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
755 return channel->iob + index;
756 }
757 index = (index + 1) % QETH_CMD_BUFFER_NO;
758 } while (index != channel->io_buf_no);
759
760 return NULL;
761}
762
763void qeth_release_buffer(struct qeth_channel *channel,
764 struct qeth_cmd_buffer *iob)
765{
766 unsigned long flags;
767
847a50fd 768 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 769 spin_lock_irqsave(&channel->iob_lock, flags);
770 memset(iob->data, 0, QETH_BUFSIZE);
771 iob->state = BUF_STATE_FREE;
772 iob->callback = qeth_send_control_data_cb;
773 iob->rc = 0;
774 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 775 wake_up(&channel->wait_q);
4a71df50
FB		 776}
777EXPORT_SYMBOL_GPL(qeth_release_buffer);
778
779static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
780{
781 struct qeth_cmd_buffer *buffer = NULL;
782 unsigned long flags;
783
784 spin_lock_irqsave(&channel->iob_lock, flags);
785 buffer = __qeth_get_buffer(channel);
786 spin_unlock_irqrestore(&channel->iob_lock, flags);
787 return buffer;
788}
789
790struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
791{
792 struct qeth_cmd_buffer *buffer;
793 wait_event(channel->wait_q,
794 ((buffer = qeth_get_buffer(channel)) != NULL));
795 return buffer;
796}
797EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
798
799void qeth_clear_cmd_buffers(struct qeth_channel *channel)
800{
801 int cnt;
802
803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
804 qeth_release_buffer(channel, &channel->iob[cnt]);
805 channel->buf_no = 0;
806 channel->io_buf_no = 0;
807}
808EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
809
810static void qeth_send_control_data_cb(struct qeth_channel *channel,
811 struct qeth_cmd_buffer *iob)
812{
813 struct qeth_card *card;
814 struct qeth_reply *reply, *r;
815 struct qeth_ipa_cmd *cmd;
816 unsigned long flags;
817 int keep_reply;
5113fec0 818 int rc = 0;
4a71df50 819
4a71df50 820 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 821 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 822 rc = qeth_check_idx_response(card, iob->data);
823 switch (rc) {
824 case 0:
825 break;
826 case -EIO:
4a71df50 827 qeth_clear_ipacmd_list(card);
5113fec0 828 qeth_schedule_recovery(card);
01fc3e86 829 /* fall through */
5113fec0 830 default:
4a71df50
FB		 831 goto out;
832 }
833
834 cmd = qeth_check_ipa_data(card, iob);
835 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
836 goto out;
837 /*in case of OSN : check if cmd is set */
838 if (card->info.type == QETH_CARD_TYPE_OSN &&
839 cmd &&
840 cmd->hdr.command != IPA_CMD_STARTLAN &&
841 card->osn_info.assist_cb != NULL) {
842 card->osn_info.assist_cb(card->dev, cmd);
843 goto out;
844 }
845
846 spin_lock_irqsave(&card->lock, flags);
847 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
848 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
849 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
850 qeth_get_reply(reply);
851 list_del_init(&reply->list);
852 spin_unlock_irqrestore(&card->lock, flags);
853 keep_reply = 0;
854 if (reply->callback != NULL) {
855 if (cmd) {
856 reply->offset = (__u16)((char *)cmd -
857 (char *)iob->data);
858 keep_reply = reply->callback(card,
859 reply,
860 (unsigned long)cmd);
861 } else
862 keep_reply = reply->callback(card,
863 reply,
864 (unsigned long)iob);
865 }
866 if (cmd)
867 reply->rc = (u16) cmd->hdr.return_code;
868 else if (iob->rc)
869 reply->rc = iob->rc;
870 if (keep_reply) {
871 spin_lock_irqsave(&card->lock, flags);
872 list_add_tail(&reply->list,
873 &card->cmd_waiter_list);
874 spin_unlock_irqrestore(&card->lock, flags);
875 } else {
876 atomic_inc(&reply->received);
877 wake_up(&reply->wait_q);
878 }
879 qeth_put_reply(reply);
880 goto out;
881 }
882 }
883 spin_unlock_irqrestore(&card->lock, flags);
884out:
885 memcpy(&card->seqno.pdu_hdr_ack,
886 QETH_PDU_HEADER_SEQ_NO(iob->data),
887 QETH_SEQ_NO_LENGTH);
888 qeth_release_buffer(channel, iob);
889}
890
891static int qeth_setup_channel(struct qeth_channel *channel)
892{
893 int cnt;
894
d11ba0c4 895 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 896 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 897 channel->iob[cnt].data =
b3332930 898 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 899 if (channel->iob[cnt].data == NULL)
900 break;
901 channel->iob[cnt].state = BUF_STATE_FREE;
902 channel->iob[cnt].channel = channel;
903 channel->iob[cnt].callback = qeth_send_control_data_cb;
904 channel->iob[cnt].rc = 0;
905 }
906 if (cnt < QETH_CMD_BUFFER_NO) {
907 while (cnt-- > 0)
908 kfree(channel->iob[cnt].data);
909 return -ENOMEM;
910 }
911 channel->buf_no = 0;
912 channel->io_buf_no = 0;
913 atomic_set(&channel->irq_pending, 0);
914 spin_lock_init(&channel->iob_lock);
915
916 init_waitqueue_head(&channel->wait_q);
917 return 0;
918}
919
920static int qeth_set_thread_start_bit(struct qeth_card *card,
921 unsigned long thread)
922{
923 unsigned long flags;
924
925 spin_lock_irqsave(&card->thread_mask_lock, flags);
926 if (!(card->thread_allowed_mask & thread) ||
927 (card->thread_start_mask & thread)) {
928 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
929 return -EPERM;
930 }
931 card->thread_start_mask |= thread;
932 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
933 return 0;
934}
935
936void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
937{
938 unsigned long flags;
939
940 spin_lock_irqsave(&card->thread_mask_lock, flags);
941 card->thread_start_mask &= ~thread;
942 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
943 wake_up(&card->wait_q);
944}
945EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
946
947void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
948{
949 unsigned long flags;
950
951 spin_lock_irqsave(&card->thread_mask_lock, flags);
952 card->thread_running_mask &= ~thread;
953 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
954 wake_up(&card->wait_q);
955}
956EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
957
958static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
959{
960 unsigned long flags;
961 int rc = 0;
962
963 spin_lock_irqsave(&card->thread_mask_lock, flags);
964 if (card->thread_start_mask & thread) {
965 if ((card->thread_allowed_mask & thread) &&
966 !(card->thread_running_mask & thread)) {
967 rc = 1;
968 card->thread_start_mask &= ~thread;
969 card->thread_running_mask |= thread;
970 } else
971 rc = -EPERM;
972 }
973 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
974 return rc;
975}
976
977int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
978{
979 int rc = 0;
980
981 wait_event(card->wait_q,
982 (rc = __qeth_do_run_thread(card, thread)) >= 0);
983 return rc;
984}
985EXPORT_SYMBOL_GPL(qeth_do_run_thread);
986
987void qeth_schedule_recovery(struct qeth_card *card)
988{
847a50fd 989 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 990 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
991 schedule_work(&card->kernel_thread_starter);
992}
993EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
994
995static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
996{
997 int dstat, cstat;
998 char *sense;
847a50fd 999 struct qeth_card *card;
4a71df50
FB		 1000
1001 sense = (char *) irb->ecw;
23d805b6
PO		 1002 cstat = irb->scsw.cmd.cstat;
1003 dstat = irb->scsw.cmd.dstat;
847a50fd 1004 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1005
1006 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1007 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1008 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1009 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1010 dev_warn(&cdev->dev, "The qeth device driver "
1011 "failed to recover an error on the device\n");
5113fec0 1012 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1013 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1014 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1015 16, 1, irb, 64, 1);
1016 return 1;
1017 }
1018
1019 if (dstat & DEV_STAT_UNIT_CHECK) {
1020 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1021 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1022 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1023 return 1;
1024 }
1025 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1026 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1027 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1028 return 1;
4a71df50
FB		 1029 }
1030 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1031 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1032 return 1;
1033 }
1034 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1035 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1036 return 0;
1037 }
847a50fd 1038 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1039 return 1;
1040 }
1041 return 0;
1042}
1043
1044static long __qeth_check_irb_error(struct ccw_device *cdev,
1045 unsigned long intparm, struct irb *irb)
1046{
847a50fd
CO		 1047 struct qeth_card *card;
1048
1049 card = CARD_FROM_CDEV(cdev);
1050
e95051ff 1051 if (!card || !IS_ERR(irb))
4a71df50
FB		 1052 return 0;
1053
1054 switch (PTR_ERR(irb)) {
1055 case -EIO:
74eacdb9
FB		 1056 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1057 dev_name(&cdev->dev));
847a50fd
CO		 1058 QETH_CARD_TEXT(card, 2, "ckirberr");
1059 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1060 break;
1061 case -ETIMEDOUT:
74eacdb9
FB		 1062 dev_warn(&cdev->dev, "A hardware operation timed out"
1063 " on the device\n");
847a50fd
CO		 1064 QETH_CARD_TEXT(card, 2, "ckirberr");
1065 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1066 if (intparm == QETH_RCD_PARM) {
e95051ff 1067 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1068 card->data.state = CH_STATE_DOWN;
1069 wake_up(&card->wait_q);
1070 }
1071 }
1072 break;
1073 default:
74eacdb9
FB		 1074 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1075 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1076 QETH_CARD_TEXT(card, 2, "ckirberr");
1077 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1078 }
1079 return PTR_ERR(irb);
1080}
1081
1082static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1083 struct irb *irb)
1084{
1085 int rc;
1086 int cstat, dstat;
1087 struct qeth_cmd_buffer *buffer;
1088 struct qeth_channel *channel;
1089 struct qeth_card *card;
1090 struct qeth_cmd_buffer *iob;
1091 __u8 index;
1092
4a71df50
FB		 1093 if (__qeth_check_irb_error(cdev, intparm, irb))
1094 return;
23d805b6
PO		 1095 cstat = irb->scsw.cmd.cstat;
1096 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1097
1098 card = CARD_FROM_CDEV(cdev);
1099 if (!card)
1100 return;
1101
847a50fd
CO		 1102 QETH_CARD_TEXT(card, 5, "irq");
1103
4a71df50
FB		 1104 if (card->read.ccwdev == cdev) {
1105 channel = &card->read;
847a50fd 1106 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1107 } else if (card->write.ccwdev == cdev) {
1108 channel = &card->write;
847a50fd 1109 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1110 } else {
1111 channel = &card->data;
847a50fd 1112 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1113 }
1114 atomic_set(&channel->irq_pending, 0);
1115
23d805b6 1116 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1117 channel->state = CH_STATE_STOPPED;
1118
23d805b6 1119 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1120 channel->state = CH_STATE_HALTED;
1121
1122 /*let's wake up immediately on data channel*/
1123 if ((channel == &card->data) && (intparm != 0) &&
1124 (intparm != QETH_RCD_PARM))
1125 goto out;
1126
1127 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1128 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1129 /* we don't have to handle this further */
1130 intparm = 0;
1131 }
1132 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1133 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1134 /* we don't have to handle this further */
1135 intparm = 0;
1136 }
1137 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1138 (dstat & DEV_STAT_UNIT_CHECK) ||
1139 (cstat)) {
1140 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1141 dev_warn(&channel->ccwdev->dev,
1142 "The qeth device driver failed to recover "
1143 "an error on the device\n");
1144 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1145 "0x%X dstat 0x%X\n",
1146 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1147 print_hex_dump(KERN_WARNING, "qeth: irb ",
1148 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1149 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1150 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1151 }
1152 if (intparm == QETH_RCD_PARM) {
1153 channel->state = CH_STATE_DOWN;
1154 goto out;
1155 }
1156 rc = qeth_get_problem(cdev, irb);
1157 if (rc) {
28a7e4c9 1158 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1159 qeth_schedule_recovery(card);
1160 goto out;
1161 }
1162 }
1163
1164 if (intparm == QETH_RCD_PARM) {
1165 channel->state = CH_STATE_RCD_DONE;
1166 goto out;
1167 }
1168 if (intparm) {
1169 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1170 buffer->state = BUF_STATE_PROCESSED;
1171 }
1172 if (channel == &card->data)
1173 return;
1174 if (channel == &card->read &&
1175 channel->state == CH_STATE_UP)
1176 qeth_issue_next_read(card);
1177
1178 iob = channel->iob;
1179 index = channel->buf_no;
1180 while (iob[index].state == BUF_STATE_PROCESSED) {
1181 if (iob[index].callback != NULL)
1182 iob[index].callback(channel, iob + index);
1183
1184 index = (index + 1) % QETH_CMD_BUFFER_NO;
1185 }
1186 channel->buf_no = index;
1187out:
1188 wake_up(&card->wait_q);
1189 return;
1190}
1191
b3332930 1192static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1193 struct qeth_qdio_out_buffer *buf,
b3332930 1194 enum iucv_tx_notify notification)
4a71df50 1195{
4a71df50
FB		 1196 struct sk_buff *skb;
1197
b3332930
FB		 1198 if (skb_queue_empty(&buf->skb_list))
1199 goto out;
1200 skb = skb_peek(&buf->skb_list);
1201 while (skb) {
1202 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1203 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1204 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1205 if (skb->sk) {
1206 struct iucv_sock *iucv = iucv_sk(skb->sk);
1207 iucv->sk_txnotify(skb, notification);
1208 }
1209 }
1210 if (skb_queue_is_last(&buf->skb_list, skb))
1211 skb = NULL;
1212 else
1213 skb = skb_queue_next(&buf->skb_list, skb);
1214 }
1215out:
1216 return;
1217}
1218
1219static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1220{
1221 struct sk_buff *skb;
72861ae7
EL		 1222 struct iucv_sock *iucv;
1223 int notify_general_error = 0;
1224
1225 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1226 notify_general_error = 1;
1227
1228 /* release may never happen from within CQ tasklet scope */
18af5c17 1229 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1230
b67d801f
UB		 1231 skb = skb_dequeue(&buf->skb_list);
1232 while (skb) {
b3332930
FB		 1233 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1234 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1235 if (notify_general_error &&
1236 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1237 if (skb->sk) {
1238 iucv = iucv_sk(skb->sk);
1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1240 }
1241 }
b67d801f
UB		 1242 atomic_dec(&skb->users);
1243 dev_kfree_skb_any(skb);
4a71df50
FB		 1244 skb = skb_dequeue(&buf->skb_list);
1245 }
b3332930
FB		 1246}
1247
1248static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1249 struct qeth_qdio_out_buffer *buf,
1250 enum qeth_qdio_buffer_states newbufstate)
1251{
1252 int i;
1253
1254 /* is PCI flag set on buffer? */
1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1256 atomic_dec(&queue->set_pci_flags_count);
1257
1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1259 qeth_release_skbs(buf);
1260 }
4a71df50 1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1262 if (buf->buffer->element[i].addr && buf->is_header[i])
1263 kmem_cache_free(qeth_core_header_cache,
1264 buf->buffer->element[i].addr);
1265 buf->is_header[i] = 0;
4a71df50
FB		 1266 buf->buffer->element[i].length = 0;
1267 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1268 buf->buffer->element[i].eflags = 0;
1269 buf->buffer->element[i].sflags = 0;
4a71df50 1270 }
3ec90878
JG		 1271 buf->buffer->element[15].eflags = 0;
1272 buf->buffer->element[15].sflags = 0;
4a71df50 1273 buf->next_element_to_fill = 0;
0da9581d
EL		 1274 atomic_set(&buf->state, newbufstate);
1275}
1276
1277static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1278{
1279 int j;
1280
1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1282 if (!q->bufs[j])
1283 continue;
72861ae7 1284 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1286 if (free) {
1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1288 q->bufs[j] = NULL;
1289 }
1290 }
4a71df50
FB		 1291}
1292
1293void qeth_clear_qdio_buffers(struct qeth_card *card)
1294{
0da9581d 1295 int i;
4a71df50 1296
847a50fd 1297 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1298 /* clear outbound buffers to free skbs */
0da9581d 1299 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1300 if (card->qdio.out_qs[i]) {
0da9581d 1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1302 }
0da9581d 1303 }
4a71df50
FB		 1304}
1305EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1306
1307static void qeth_free_buffer_pool(struct qeth_card *card)
1308{
1309 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1310 int i = 0;
4a71df50
FB		 1311 list_for_each_entry_safe(pool_entry, tmp,
1312 &card->qdio.init_pool.entry_list, init_list){
1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1314 free_page((unsigned long)pool_entry->elements[i]);
1315 list_del(&pool_entry->init_list);
1316 kfree(pool_entry);
1317 }
1318}
1319
4a71df50
FB		 1320static void qeth_clean_channel(struct qeth_channel *channel)
1321{
1322 int cnt;
1323
d11ba0c4 1324 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1326 kfree(channel->iob[cnt].data);
1327}
1328
725b9c04
SO		 1329static void qeth_set_single_write_queues(struct qeth_card *card)
1330{
1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1332 (card->qdio.no_out_queues == 4))
1333 qeth_free_qdio_buffers(card);
1334
1335 card->qdio.no_out_queues = 1;
1336 if (card->qdio.default_out_queue != 0)
1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1338
1339 card->qdio.default_out_queue = 0;
1340}
1341
1342static void qeth_set_multiple_write_queues(struct qeth_card *card)
1343{
1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1345 (card->qdio.no_out_queues == 1)) {
1346 qeth_free_qdio_buffers(card);
1347 card->qdio.default_out_queue = 2;
1348 }
1349 card->qdio.no_out_queues = 4;
1350}
1351
1352static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1353{
4a71df50 1354 struct ccw_device *ccwdev;
2bf29df7 1355 struct channel_path_desc *chp_dsc;
4a71df50 1356
5113fec0 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1358
1359 ccwdev = card->data.ccwdev;
725b9c04
SO		 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368 /* CHPP field bit 6 == 1 -> single queue */
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
5113fec0
UB		 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
d11ba0c4 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383 /* inbound */
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
4a71df50 1398 card->options.fake_broadcast = 0;
4a71df50
FB		 1399 card->options.performance_stats = 0;
1400 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1401 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1402 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1403}
1404
1405static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1406{
1407 unsigned long flags;
1408 int rc = 0;
1409
1410 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1411 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1412 (u8) card->thread_start_mask,
1413 (u8) card->thread_allowed_mask,
1414 (u8) card->thread_running_mask);
1415 rc = (card->thread_start_mask & thread);
1416 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1417 return rc;
1418}
1419
1420static void qeth_start_kernel_thread(struct work_struct *work)
1421{
3f36b890 1422 struct task_struct *ts;
4a71df50
FB		 1423 struct qeth_card *card = container_of(work, struct qeth_card,
1424 kernel_thread_starter);
847a50fd 1425 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1426
1427 if (card->read.state != CH_STATE_UP &&
1428 card->write.state != CH_STATE_UP)
1429 return;
3f36b890 1430 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1431 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1432 "qeth_recover");
3f36b890
FB		 1433 if (IS_ERR(ts)) {
1434 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1435 qeth_clear_thread_running_bit(card,
1436 QETH_RECOVER_THREAD);
1437 }
1438 }
4a71df50
FB		 1439}
1440
bca51650 1441static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1442static int qeth_setup_card(struct qeth_card *card)
1443{
1444
d11ba0c4
PT		 1445 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1446 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1447
1448 card->read.state = CH_STATE_DOWN;
1449 card->write.state = CH_STATE_DOWN;
1450 card->data.state = CH_STATE_DOWN;
1451 card->state = CARD_STATE_DOWN;
1452 card->lan_online = 0;
908abbb5 1453 card->read_or_write_problem = 0;
4a71df50
FB		 1454 card->dev = NULL;
1455 spin_lock_init(&card->vlanlock);
1456 spin_lock_init(&card->mclock);
4a71df50
FB		 1457 spin_lock_init(&card->lock);
1458 spin_lock_init(&card->ip_lock);
1459 spin_lock_init(&card->thread_mask_lock);
c4949f07 1460 mutex_init(&card->conf_mutex);
9dc48ccc 1461 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1462 card->thread_start_mask = 0;
1463 card->thread_allowed_mask = 0;
1464 card->thread_running_mask = 0;
1465 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1466 INIT_LIST_HEAD(&card->cmd_waiter_list);
1467 init_waitqueue_head(&card->wait_q);
25985edc 1468 /* initial options */
4a71df50
FB		 1469 qeth_set_intial_options(card);
1470 /* IP address takeover */
1471 INIT_LIST_HEAD(&card->ipato.entries);
1472 card->ipato.enabled = 0;
1473 card->ipato.invert4 = 0;
1474 card->ipato.invert6 = 0;
1475 /* init QDIO stuff */
1476 qeth_init_qdio_info(card);
b3332930 1477 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1478 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1479 return 0;
1480}
1481
6bcac508
MS		 1482static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1483{
1484 struct qeth_card *card = container_of(slr, struct qeth_card,
1485 qeth_service_level);
0d788c7d
KDW		 1486 if (card->info.mcl_level[0])
1487 seq_printf(m, "qeth: %s firmware level %s\n",
1488 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1489}
1490
4a71df50
FB		 1491static struct qeth_card *qeth_alloc_card(void)
1492{
1493 struct qeth_card *card;
1494
d11ba0c4 1495 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1496 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1497 if (!card)
76b11f8e 1498 goto out;
d11ba0c4 1499 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1500 if (qeth_setup_channel(&card->read))
1501 goto out_ip;
1502 if (qeth_setup_channel(&card->write))
1503 goto out_channel;
4a71df50 1504 card->options.layer2 = -1;
6bcac508
MS		 1505 card->qeth_service_level.seq_print = qeth_core_sl_print;
1506 register_service_level(&card->qeth_service_level);
4a71df50 1507 return card;
76b11f8e
UB		 1508
1509out_channel:
1510 qeth_clean_channel(&card->read);
1511out_ip:
76b11f8e
UB		 1512 kfree(card);
1513out:
1514 return NULL;
4a71df50
FB		 1515}
1516
1517static int qeth_determine_card_type(struct qeth_card *card)
1518{
1519 int i = 0;
1520
d11ba0c4 1521 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1522
1523 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1524 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1525 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1526 if ((CARD_RDEV(card)->id.dev_type ==
1527 known_devices[i][QETH_DEV_TYPE_IND]) &&
1528 (CARD_RDEV(card)->id.dev_model ==
1529 known_devices[i][QETH_DEV_MODEL_IND])) {
1530 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1531 card->qdio.no_out_queues =
1532 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1533 card->qdio.no_in_queues = 1;
5113fec0
UB		 1534 card->info.is_multicast_different =
1535 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1536 qeth_update_from_chp_desc(card);
4a71df50
FB		 1537 return 0;
1538 }
1539 i++;
1540 }
1541 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1542 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1543 "unknown type\n");
4a71df50
FB		 1544 return -ENOENT;
1545}
1546
1547static int qeth_clear_channel(struct qeth_channel *channel)
1548{
1549 unsigned long flags;
1550 struct qeth_card *card;
1551 int rc;
1552
4a71df50 1553 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1554 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1555 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1556 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1557 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1558
1559 if (rc)
1560 return rc;
1561 rc = wait_event_interruptible_timeout(card->wait_q,
1562 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1563 if (rc == -ERESTARTSYS)
1564 return rc;
1565 if (channel->state != CH_STATE_STOPPED)
1566 return -ETIME;
1567 channel->state = CH_STATE_DOWN;
1568 return 0;
1569}
1570
1571static int qeth_halt_channel(struct qeth_channel *channel)
1572{
1573 unsigned long flags;
1574 struct qeth_card *card;
1575 int rc;
1576
4a71df50 1577 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1578 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1579 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1580 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1581 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1582
1583 if (rc)
1584 return rc;
1585 rc = wait_event_interruptible_timeout(card->wait_q,
1586 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1587 if (rc == -ERESTARTSYS)
1588 return rc;
1589 if (channel->state != CH_STATE_HALTED)
1590 return -ETIME;
1591 return 0;
1592}
1593
1594static int qeth_halt_channels(struct qeth_card *card)
1595{
1596 int rc1 = 0, rc2 = 0, rc3 = 0;
1597
847a50fd 1598 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1599 rc1 = qeth_halt_channel(&card->read);
1600 rc2 = qeth_halt_channel(&card->write);
1601 rc3 = qeth_halt_channel(&card->data);
1602 if (rc1)
1603 return rc1;
1604 if (rc2)
1605 return rc2;
1606 return rc3;
1607}
1608
1609static int qeth_clear_channels(struct qeth_card *card)
1610{
1611 int rc1 = 0, rc2 = 0, rc3 = 0;
1612
847a50fd 1613 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1614 rc1 = qeth_clear_channel(&card->read);
1615 rc2 = qeth_clear_channel(&card->write);
1616 rc3 = qeth_clear_channel(&card->data);
1617 if (rc1)
1618 return rc1;
1619 if (rc2)
1620 return rc2;
1621 return rc3;
1622}
1623
1624static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1625{
1626 int rc = 0;
1627
847a50fd 1628 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1629
1630 if (halt)
1631 rc = qeth_halt_channels(card);
1632 if (rc)
1633 return rc;
1634 return qeth_clear_channels(card);
1635}
1636
1637int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1638{
1639 int rc = 0;
1640
847a50fd 1641 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1642 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1643 QETH_QDIO_CLEANING)) {
1644 case QETH_QDIO_ESTABLISHED:
1645 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1646 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1647 QDIO_FLAG_CLEANUP_USING_HALT);
1648 else
cc961d40 1649 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1650 QDIO_FLAG_CLEANUP_USING_CLEAR);
1651 if (rc)
847a50fd 1652 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1653 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1654 break;
1655 case QETH_QDIO_CLEANING:
1656 return rc;
1657 default:
1658 break;
1659 }
1660 rc = qeth_clear_halt_card(card, use_halt);
1661 if (rc)
847a50fd 1662 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1663 card->state = CARD_STATE_DOWN;
1664 return rc;
1665}
1666EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1667
1668static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1669 int *length)
1670{
1671 struct ciw *ciw;
1672 char *rcd_buf;
1673 int ret;
1674 struct qeth_channel *channel = &card->data;
1675 unsigned long flags;
1676
1677 /*
1678 * scan for RCD command in extended SenseID data
1679 */
1680 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1681 if (!ciw || ciw->cmd == 0)
1682 return -EOPNOTSUPP;
1683 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1684 if (!rcd_buf)
1685 return -ENOMEM;
1686
1687 channel->ccw.cmd_code = ciw->cmd;
1688 channel->ccw.cda = (__u32) __pa(rcd_buf);
1689 channel->ccw.count = ciw->count;
1690 channel->ccw.flags = CCW_FLAG_SLI;
1691 channel->state = CH_STATE_RCD;
1692 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1693 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1694 QETH_RCD_PARM, LPM_ANYPATH, 0,
1695 QETH_RCD_TIMEOUT);
1696 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1697 if (!ret)
1698 wait_event(card->wait_q,
1699 (channel->state == CH_STATE_RCD_DONE ||
1700 channel->state == CH_STATE_DOWN));
1701 if (channel->state == CH_STATE_DOWN)
1702 ret = -EIO;
1703 else
1704 channel->state = CH_STATE_DOWN;
1705 if (ret) {
1706 kfree(rcd_buf);
1707 *buffer = NULL;
1708 *length = 0;
1709 } else {
1710 *length = ciw->count;
1711 *buffer = rcd_buf;
1712 }
1713 return ret;
1714}
1715
a60389ab 1716static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1717{
a60389ab 1718 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1719 card->info.chpid = prcd[30];
1720 card->info.unit_addr2 = prcd[31];
1721 card->info.cula = prcd[63];
1722 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1723 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1724}
1725
c70eb09d
JW		 1726/* Determine whether the device requires a specific layer discipline */
1727static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1728{
1729 if (card->info.type == QETH_CARD_TYPE_OSM ||
1730 card->info.type == QETH_CARD_TYPE_OSN) {
1731 QETH_DBF_TEXT(SETUP, 3, "force l2");
1732 return QETH_DISCIPLINE_LAYER2;
1733 }
1734
1735 /* virtual HiperSocket is L3 only: */
1736 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
1737 QETH_DBF_TEXT(SETUP, 3, "force l3");
1738 return QETH_DISCIPLINE_LAYER3;
1739 }
1740
1741 QETH_DBF_TEXT(SETUP, 3, "force no");
1742 return QETH_DISCIPLINE_UNDETERMINED;
1743}
1744
a60389ab
EL		 1745static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1746{
1747 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1748
e6e056ba 1749 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1750 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1751 card->info.blkt.time_total = 0;
1752 card->info.blkt.inter_packet = 0;
1753 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1754 } else {
1755 card->info.blkt.time_total = 250;
1756 card->info.blkt.inter_packet = 5;
1757 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1758 }
4a71df50
FB		 1759}
1760
1761static void qeth_init_tokens(struct qeth_card *card)
1762{
1763 card->token.issuer_rm_w = 0x00010103UL;
1764 card->token.cm_filter_w = 0x00010108UL;
1765 card->token.cm_connection_w = 0x0001010aUL;
1766 card->token.ulp_filter_w = 0x0001010bUL;
1767 card->token.ulp_connection_w = 0x0001010dUL;
1768}
1769
1770static void qeth_init_func_level(struct qeth_card *card)
1771{
5113fec0
UB		 1772 switch (card->info.type) {
1773 case QETH_CARD_TYPE_IQD:
6298263a 1774 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1775 break;
1776 case QETH_CARD_TYPE_OSD:
0132951e 1777 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1778 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1779 break;
1780 default:
1781 break;
4a71df50
FB		 1782 }
1783}
1784
4a71df50
FB		 1785static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1786 void (*idx_reply_cb)(struct qeth_channel *,
1787 struct qeth_cmd_buffer *))
1788{
1789 struct qeth_cmd_buffer *iob;
1790 unsigned long flags;
1791 int rc;
1792 struct qeth_card *card;
1793
d11ba0c4 1794 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1795 card = CARD_FROM_CDEV(channel->ccwdev);
1796 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1797 if (!iob)
1798 return -ENOMEM;
4a71df50
FB		 1799 iob->callback = idx_reply_cb;
1800 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1801 channel->ccw.count = QETH_BUFSIZE;
1802 channel->ccw.cda = (__u32) __pa(iob->data);
1803
1804 wait_event(card->wait_q,
1805 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1806 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1807 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1808 rc = ccw_device_start(channel->ccwdev,
1809 &channel->ccw, (addr_t) iob, 0, 0);
1810 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1811
1812 if (rc) {
14cc21b6 1813 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1814 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1815 atomic_set(&channel->irq_pending, 0);
1816 wake_up(&card->wait_q);
1817 return rc;
1818 }
1819 rc = wait_event_interruptible_timeout(card->wait_q,
1820 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1821 if (rc == -ERESTARTSYS)
1822 return rc;
1823 if (channel->state != CH_STATE_UP) {
1824 rc = -ETIME;
d11ba0c4 1825 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1826 qeth_clear_cmd_buffers(channel);
1827 } else
1828 rc = 0;
1829 return rc;
1830}
1831
1832static int qeth_idx_activate_channel(struct qeth_channel *channel,
1833 void (*idx_reply_cb)(struct qeth_channel *,
1834 struct qeth_cmd_buffer *))
1835{
1836 struct qeth_card *card;
1837 struct qeth_cmd_buffer *iob;
1838 unsigned long flags;
1839 __u16 temp;
1840 __u8 tmp;
1841 int rc;
f06f6f32 1842 struct ccw_dev_id temp_devid;
4a71df50
FB		 1843
1844 card = CARD_FROM_CDEV(channel->ccwdev);
1845
d11ba0c4 1846 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1847
1848 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1849 if (!iob)
1850 return -ENOMEM;
4a71df50
FB		 1851 iob->callback = idx_reply_cb;
1852 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1853 channel->ccw.count = IDX_ACTIVATE_SIZE;
1854 channel->ccw.cda = (__u32) __pa(iob->data);
1855 if (channel == &card->write) {
1856 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1857 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1858 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1859 card->seqno.trans_hdr++;
1860 } else {
1861 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1862 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1863 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1864 }
1865 tmp = ((__u8)card->info.portno) | 0x80;
1866 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1867 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1868 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1869 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1870 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1871 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1872 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1873 temp = (card->info.cula << 8) + card->info.unit_addr2;
1874 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1875
1876 wait_event(card->wait_q,
1877 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1878 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1879 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1880 rc = ccw_device_start(channel->ccwdev,
1881 &channel->ccw, (addr_t) iob, 0, 0);
1882 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1883
1884 if (rc) {
14cc21b6
FB		 1885 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1886 rc);
d11ba0c4 1887 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1888 atomic_set(&channel->irq_pending, 0);
1889 wake_up(&card->wait_q);
1890 return rc;
1891 }
1892 rc = wait_event_interruptible_timeout(card->wait_q,
1893 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1894 if (rc == -ERESTARTSYS)
1895 return rc;
1896 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1897 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1898 " failed to recover an error on the device\n");
1899 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1900 dev_name(&channel->ccwdev->dev));
d11ba0c4 1901 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1902 qeth_clear_cmd_buffers(channel);
1903 return -ETIME;
1904 }
1905 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1906}
1907
1908static int qeth_peer_func_level(int level)
1909{
1910 if ((level & 0xff) == 8)
1911 return (level & 0xff) + 0x400;
1912 if (((level >> 8) & 3) == 1)
1913 return (level & 0xff) + 0x200;
1914 return level;
1915}
1916
1917static void qeth_idx_write_cb(struct qeth_channel *channel,
1918 struct qeth_cmd_buffer *iob)
1919{
1920 struct qeth_card *card;
1921 __u16 temp;
1922
d11ba0c4 1923 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1924
1925 if (channel->state == CH_STATE_DOWN) {
1926 channel->state = CH_STATE_ACTIVATING;
1927 goto out;
1928 }
1929 card = CARD_FROM_CDEV(channel->ccwdev);
1930
1931 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1932 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1933 dev_err(&card->write.ccwdev->dev,
1934 "The adapter is used exclusively by another "
1935 "host\n");
4a71df50 1936 else
74eacdb9
FB		 1937 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1938 " negative reply\n",
1939 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1940 goto out;
1941 }
1942 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1943 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1944 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1945 "function level mismatch (sent: 0x%x, received: "
1946 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1947 card->info.func_level, temp);
4a71df50
FB		 1948 goto out;
1949 }
1950 channel->state = CH_STATE_UP;
1951out:
1952 qeth_release_buffer(channel, iob);
1953}
1954
1955static void qeth_idx_read_cb(struct qeth_channel *channel,
1956 struct qeth_cmd_buffer *iob)
1957{
1958 struct qeth_card *card;
1959 __u16 temp;
1960
d11ba0c4 1961 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1962 if (channel->state == CH_STATE_DOWN) {
1963 channel->state = CH_STATE_ACTIVATING;
1964 goto out;
1965 }
1966
1967 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1968 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1969 goto out;
1970
1971 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1972 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1973 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1974 dev_err(&card->write.ccwdev->dev,
1975 "The adapter is used exclusively by another "
1976 "host\n");
5113fec0
UB		 1977 break;
1978 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1979 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1980 dev_err(&card->read.ccwdev->dev,
1981 "Setting the device online failed because of "
01fc3e86 1982 "insufficient authorization\n");
5113fec0
UB		 1983 break;
1984 default:
74eacdb9
FB		 1985 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1986 " negative reply\n",
1987 dev_name(&card->read.ccwdev->dev));
5113fec0 1988 }
01fc3e86
UB		 1989 QETH_CARD_TEXT_(card, 2, "idxread%c",
1990 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1991 goto out;
1992 }
1993
4a71df50
FB		 1994 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1995 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1996 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1997 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1998 dev_name(&card->read.ccwdev->dev),
1999 card->info.func_level, temp);
4a71df50
FB		 2000 goto out;
2001 }
2002 memcpy(&card->token.issuer_rm_r,
2003 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2004 QETH_MPC_TOKEN_LENGTH);
2005 memcpy(&card->info.mcl_level[0],
2006 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2007 channel->state = CH_STATE_UP;
2008out:
2009 qeth_release_buffer(channel, iob);
2010}
2011
2012void qeth_prepare_control_data(struct qeth_card *card, int len,
2013 struct qeth_cmd_buffer *iob)
2014{
2015 qeth_setup_ccw(&card->write, iob->data, len);
2016 iob->callback = qeth_release_buffer;
2017
2018 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2019 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2020 card->seqno.trans_hdr++;
2021 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2022 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2023 card->seqno.pdu_hdr++;
2024 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2025 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2026 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2027}
2028EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2029
efbbc1d5
EC		 2030/**
2031 * qeth_send_control_data() - send control command to the card
2032 * @card: qeth_card structure pointer
2033 * @len: size of the command buffer
2034 * @iob: qeth_cmd_buffer pointer
2035 * @reply_cb: callback function pointer
2036 * @cb_card: pointer to the qeth_card structure
2037 * @cb_reply: pointer to the qeth_reply structure
2038 * @cb_cmd: pointer to the original iob for non-IPA
2039 * commands, or to the qeth_ipa_cmd structure
2040 * for the IPA commands.
2041 * @reply_param: private pointer passed to the callback
2042 *
2043 * Returns the value of the `return_code' field of the response
2044 * block returned from the hardware, or other error indication.
2045 * Value of zero indicates successful execution of the command.
2046 *
2047 * Callback function gets called one or more times, with cb_cmd
2048 * pointing to the response returned by the hardware. Callback
2049 * function must return non-zero if more reply blocks are expected,
2050 * and zero if the last or only reply block is received. Callback
2051 * function can get the value of the reply_param pointer from the
2052 * field 'param' of the structure qeth_reply.
2053 */
2054
4a71df50
FB		 2055int qeth_send_control_data(struct qeth_card *card, int len,
2056 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2057 int (*reply_cb)(struct qeth_card *cb_card,
2058 struct qeth_reply *cb_reply,
2059 unsigned long cb_cmd),
4a71df50
FB		 2060 void *reply_param)
2061{
2062 int rc;
2063 unsigned long flags;
2064 struct qeth_reply *reply = NULL;
7834cd5a 2065 unsigned long timeout, event_timeout;
5b54e16f 2066 struct qeth_ipa_cmd *cmd;
4a71df50 2067
847a50fd 2068 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2069
908abbb5
UB		 2070 if (card->read_or_write_problem) {
2071 qeth_release_buffer(iob->channel, iob);
2072 return -EIO;
2073 }
4a71df50
FB		 2074 reply = qeth_alloc_reply(card);
2075 if (!reply) {
4a71df50
FB		 2076 return -ENOMEM;
2077 }
2078 reply->callback = reply_cb;
2079 reply->param = reply_param;
2080 if (card->state == CARD_STATE_DOWN)
2081 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2082 else
2083 reply->seqno = card->seqno.ipa++;
2084 init_waitqueue_head(&reply->wait_q);
2085 spin_lock_irqsave(&card->lock, flags);
2086 list_add_tail(&reply->list, &card->cmd_waiter_list);
2087 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2088 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2089
2090 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2091 qeth_prepare_control_data(card, len, iob);
2092
2093 if (IS_IPA(iob->data))
7834cd5a 2094 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2095 else
7834cd5a
HC		 2096 event_timeout = QETH_TIMEOUT;
2097 timeout = jiffies + event_timeout;
4a71df50 2098
847a50fd 2099 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2100 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2101 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2102 (addr_t) iob, 0, 0);
2103 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2104 if (rc) {
74eacdb9
FB		 2105 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2106 "ccw_device_start rc = %i\n",
2107 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2108 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2109 spin_lock_irqsave(&card->lock, flags);
2110 list_del_init(&reply->list);
2111 qeth_put_reply(reply);
2112 spin_unlock_irqrestore(&card->lock, flags);
2113 qeth_release_buffer(iob->channel, iob);
2114 atomic_set(&card->write.irq_pending, 0);
2115 wake_up(&card->wait_q);
2116 return rc;
2117 }
5b54e16f
FB		 2118
2119 /* we have only one long running ipassist, since we can ensure
2120 process context of this command we can sleep */
2121 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2122 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2123 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2124 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2125 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2126 goto time_err;
2127 } else {
2128 while (!atomic_read(&reply->received)) {
2129 if (time_after(jiffies, timeout))
2130 goto time_err;
2131 cpu_relax();
6531084c 2132 }
5b54e16f
FB		 2133 }
2134
70919e23
UB		 2135 if (reply->rc == -EIO)
2136 goto error;
5b54e16f
FB		 2137 rc = reply->rc;
2138 qeth_put_reply(reply);
2139 return rc;
2140
2141time_err:
70919e23 2142 reply->rc = -ETIME;
5b54e16f
FB		 2143 spin_lock_irqsave(&reply->card->lock, flags);
2144 list_del_init(&reply->list);
2145 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2146 atomic_inc(&reply->received);
70919e23 2147error:
908abbb5
UB		 2148 atomic_set(&card->write.irq_pending, 0);
2149 qeth_release_buffer(iob->channel, iob);
2150 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2151 rc = reply->rc;
2152 qeth_put_reply(reply);
2153 return rc;
2154}
2155EXPORT_SYMBOL_GPL(qeth_send_control_data);
2156
2157static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2158 unsigned long data)
2159{
2160 struct qeth_cmd_buffer *iob;
2161
d11ba0c4 2162 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2163
2164 iob = (struct qeth_cmd_buffer *) data;
2165 memcpy(&card->token.cm_filter_r,
2166 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2167 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2168 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2169 return 0;
2170}
2171
2172static int qeth_cm_enable(struct qeth_card *card)
2173{
2174 int rc;
2175 struct qeth_cmd_buffer *iob;
2176
d11ba0c4 2177 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2178
2179 iob = qeth_wait_for_buffer(&card->write);
2180 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2181 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2182 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2183 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2184 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2185
2186 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2187 qeth_cm_enable_cb, NULL);
2188 return rc;
2189}
2190
2191static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2192 unsigned long data)
2193{
2194
2195 struct qeth_cmd_buffer *iob;
2196
d11ba0c4 2197 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2198
2199 iob = (struct qeth_cmd_buffer *) data;
2200 memcpy(&card->token.cm_connection_r,
2201 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2202 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2203 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2204 return 0;
2205}
2206
2207static int qeth_cm_setup(struct qeth_card *card)
2208{
2209 int rc;
2210 struct qeth_cmd_buffer *iob;
2211
d11ba0c4 2212 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2213
2214 iob = qeth_wait_for_buffer(&card->write);
2215 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2216 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2217 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2218 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2219 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2220 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2221 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2222 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2223 qeth_cm_setup_cb, NULL);
2224 return rc;
2225
2226}
2227
2228static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2229{
2230 switch (card->info.type) {
2231 case QETH_CARD_TYPE_UNKNOWN:
2232 return 1500;
2233 case QETH_CARD_TYPE_IQD:
2234 return card->info.max_mtu;
5113fec0 2235 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2236 switch (card->info.link_type) {
2237 case QETH_LINK_TYPE_HSTR:
2238 case QETH_LINK_TYPE_LANE_TR:
2239 return 2000;
2240 default:
fe44014a 2241 return card->options.layer2 ? 1500 : 1492;
4a71df50 2242 }
5113fec0
UB		 2243 case QETH_CARD_TYPE_OSM:
2244 case QETH_CARD_TYPE_OSX:
fe44014a 2245 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2246 default:
2247 return 1500;
2248 }
2249}
2250
4a71df50
FB		 2251static inline int qeth_get_mtu_outof_framesize(int framesize)
2252{
2253 switch (framesize) {
2254 case 0x4000:
2255 return 8192;
2256 case 0x6000:
2257 return 16384;
2258 case 0xa000:
2259 return 32768;
2260 case 0xffff:
2261 return 57344;
2262 default:
2263 return 0;
2264 }
2265}
2266
2267static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2268{
2269 switch (card->info.type) {
5113fec0
UB		 2270 case QETH_CARD_TYPE_OSD:
2271 case QETH_CARD_TYPE_OSM:
2272 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2273 case QETH_CARD_TYPE_IQD:
2274 return ((mtu >= 576) &&
9853b97b 2275 (mtu <= card->info.max_mtu));
4a71df50
FB		 2276 case QETH_CARD_TYPE_OSN:
2277 case QETH_CARD_TYPE_UNKNOWN:
2278 default:
2279 return 1;
2280 }
2281}
2282
2283static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2284 unsigned long data)
2285{
2286
2287 __u16 mtu, framesize;
2288 __u16 len;
2289 __u8 link_type;
2290 struct qeth_cmd_buffer *iob;
2291
d11ba0c4 2292 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2293
2294 iob = (struct qeth_cmd_buffer *) data;
2295 memcpy(&card->token.ulp_filter_r,
2296 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2297 QETH_MPC_TOKEN_LENGTH);
9853b97b 2298 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2299 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2300 mtu = qeth_get_mtu_outof_framesize(framesize);
2301 if (!mtu) {
2302 iob->rc = -EINVAL;
d11ba0c4 2303 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2304 return 0;
2305 }
8b2e18f6
UB		 2306 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2307 /* frame size has changed */
2308 if (card->dev &&
2309 ((card->dev->mtu == card->info.initial_mtu) ||
2310 (card->dev->mtu > mtu)))
2311 card->dev->mtu = mtu;
2312 qeth_free_qdio_buffers(card);
2313 }
4a71df50 2314 card->info.initial_mtu = mtu;
8b2e18f6 2315 card->info.max_mtu = mtu;
4a71df50
FB		 2316 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2317 } else {
9853b97b
FB		 2318 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2319 iob->data);
fe44014a
SR		 2320 card->info.initial_mtu = min(card->info.max_mtu,
2321 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2322 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2323 }
2324
2325 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2326 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2327 memcpy(&link_type,
2328 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2329 card->info.link_type = link_type;
2330 } else
2331 card->info.link_type = 0;
01fc3e86 2332 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2333 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2334 return 0;
2335}
2336
2337static int qeth_ulp_enable(struct qeth_card *card)
2338{
2339 int rc;
2340 char prot_type;
2341 struct qeth_cmd_buffer *iob;
2342
2343 /*FIXME: trace view callbacks*/
d11ba0c4 2344 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2345
2346 iob = qeth_wait_for_buffer(&card->write);
2347 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2348
2349 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2350 (__u8) card->info.portno;
2351 if (card->options.layer2)
2352 if (card->info.type == QETH_CARD_TYPE_OSN)
2353 prot_type = QETH_PROT_OSN2;
2354 else
2355 prot_type = QETH_PROT_LAYER2;
2356 else
2357 prot_type = QETH_PROT_TCPIP;
2358
2359 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2360 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2361 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2362 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2363 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2364 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2365 qeth_ulp_enable_cb, NULL);
2366 return rc;
2367
2368}
2369
2370static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2371 unsigned long data)
2372{
2373 struct qeth_cmd_buffer *iob;
2374
d11ba0c4 2375 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2376
2377 iob = (struct qeth_cmd_buffer *) data;
2378 memcpy(&card->token.ulp_connection_r,
2379 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2380 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2381 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2382 3)) {
2383 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2384 dev_err(&card->gdev->dev, "A connection could not be "
2385 "established because of an OLM limit\n");
bbb822a8 2386 iob->rc = -EMLINK;
65a1f898 2387 }
d11ba0c4 2388 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2389 return 0;
4a71df50
FB		 2390}
2391
2392static int qeth_ulp_setup(struct qeth_card *card)
2393{
2394 int rc;
2395 __u16 temp;
2396 struct qeth_cmd_buffer *iob;
2397 struct ccw_dev_id dev_id;
2398
d11ba0c4 2399 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2400
2401 iob = qeth_wait_for_buffer(&card->write);
2402 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2403
2404 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2405 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2406 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2407 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2408 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2409 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2410
2411 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2412 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2413 temp = (card->info.cula << 8) + card->info.unit_addr2;
2414 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2415 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2416 qeth_ulp_setup_cb, NULL);
2417 return rc;
2418}
2419
0da9581d
EL		 2420static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2421{
2422 int rc;
2423 struct qeth_qdio_out_buffer *newbuf;
2424
2425 rc = 0;
2426 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2427 if (!newbuf) {
2428 rc = -ENOMEM;
2429 goto out;
2430 }
d445a4e2 2431 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2432 skb_queue_head_init(&newbuf->skb_list);
2433 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2434 newbuf->q = q;
2435 newbuf->aob = NULL;
2436 newbuf->next_pending = q->bufs[bidx];
2437 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2438 q->bufs[bidx] = newbuf;
2439 if (q->bufstates) {
2440 q->bufstates[bidx].user = newbuf;
2441 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2442 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2443 QETH_CARD_TEXT_(q->card, 2, "%lx",
2444 (long) newbuf->next_pending);
2445 }
2446out:
2447 return rc;
2448}
2449
d445a4e2
SO		 2450static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2451{
2452 if (!q)
2453 return;
2454
2455 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2456 kfree(q);
2457}
2458
2459static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2460{
2461 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2462
2463 if (!q)
2464 return NULL;
2465
2466 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2467 kfree(q);
2468 return NULL;
2469 }
2470 return q;
2471}
0da9581d 2472
4a71df50
FB		 2473static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2474{
2475 int i, j;
2476
d11ba0c4 2477 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2478
2479 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2480 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2481 return 0;
2482
4601ba6c
SO		 2483 QETH_DBF_TEXT(SETUP, 2, "inq");
2484 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2485 if (!card->qdio.in_q)
2486 goto out_nomem;
4601ba6c 2487
4a71df50
FB		 2488 /* inbound buffer pool */
2489 if (qeth_alloc_buffer_pool(card))
2490 goto out_freeinq;
0da9581d 2491
4a71df50
FB		 2492 /* outbound */
2493 card->qdio.out_qs =
b3332930 2494 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2495 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2496 if (!card->qdio.out_qs)
2497 goto out_freepool;
2498 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2499 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2500 if (!card->qdio.out_qs[i])
2501 goto out_freeoutq;
d11ba0c4
PT		 2502 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2503 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2504 card->qdio.out_qs[i]->queue_no = i;
2505 /* give outbound qeth_qdio_buffers their qdio_buffers */
2506 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2507 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2508 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2509 goto out_freeoutqbufs;
4a71df50
FB		 2510 }
2511 }
0da9581d
EL		 2512
2513 /* completion */
2514 if (qeth_alloc_cq(card))
2515 goto out_freeoutq;
2516
4a71df50
FB		 2517 return 0;
2518
0da9581d
EL		 2519out_freeoutqbufs:
2520 while (j > 0) {
2521 --j;
2522 kmem_cache_free(qeth_qdio_outbuf_cache,
2523 card->qdio.out_qs[i]->bufs[j]);
2524 card->qdio.out_qs[i]->bufs[j] = NULL;
2525 }
4a71df50 2526out_freeoutq:
0da9581d 2527 while (i > 0) {
d445a4e2 2528 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2529 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2530 }
4a71df50
FB		 2531 kfree(card->qdio.out_qs);
2532 card->qdio.out_qs = NULL;
2533out_freepool:
2534 qeth_free_buffer_pool(card);
2535out_freeinq:
4601ba6c 2536 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2537 card->qdio.in_q = NULL;
2538out_nomem:
2539 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2540 return -ENOMEM;
2541}
2542
d445a4e2
SO		 2543static void qeth_free_qdio_buffers(struct qeth_card *card)
2544{
2545 int i, j;
2546
2547 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2548 QETH_QDIO_UNINITIALIZED)
2549 return;
2550
2551 qeth_free_cq(card);
2552 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2553 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2554 if (card->qdio.in_q->bufs[j].rx_skb)
2555 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2556 }
2557 qeth_free_qdio_queue(card->qdio.in_q);
2558 card->qdio.in_q = NULL;
2559 /* inbound buffer pool */
2560 qeth_free_buffer_pool(card);
2561 /* free outbound qdio_qs */
2562 if (card->qdio.out_qs) {
2563 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2564 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2565 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2566 }
2567 kfree(card->qdio.out_qs);
2568 card->qdio.out_qs = NULL;
2569 }
2570}
2571
4a71df50
FB		 2572static void qeth_create_qib_param_field(struct qeth_card *card,
2573 char *param_field)
2574{
2575
2576 param_field[0] = _ascebc['P'];
2577 param_field[1] = _ascebc['C'];
2578 param_field[2] = _ascebc['I'];
2579 param_field[3] = _ascebc['T'];
2580 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2581 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2582 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2583}
2584
2585static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2586 char *param_field)
2587{
2588 param_field[16] = _ascebc['B'];
2589 param_field[17] = _ascebc['L'];
2590 param_field[18] = _ascebc['K'];
2591 param_field[19] = _ascebc['T'];
2592 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2593 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2594 *((unsigned int *) (&param_field[28])) =
2595 card->info.blkt.inter_packet_jumbo;
2596}
2597
2598static int qeth_qdio_activate(struct qeth_card *card)
2599{
d11ba0c4 2600 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2601 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2602}
2603
2604static int qeth_dm_act(struct qeth_card *card)
2605{
2606 int rc;
2607 struct qeth_cmd_buffer *iob;
2608
d11ba0c4 2609 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2610
2611 iob = qeth_wait_for_buffer(&card->write);
2612 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2613
2614 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2615 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2616 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2617 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2618 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2619 return rc;
2620}
2621
2622static int qeth_mpc_initialize(struct qeth_card *card)
2623{
2624 int rc;
2625
d11ba0c4 2626 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2627
2628 rc = qeth_issue_next_read(card);
2629 if (rc) {
d11ba0c4 2630 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2631 return rc;
2632 }
2633 rc = qeth_cm_enable(card);
2634 if (rc) {
d11ba0c4 2635 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2636 goto out_qdio;
2637 }
2638 rc = qeth_cm_setup(card);
2639 if (rc) {
d11ba0c4 2640 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2641 goto out_qdio;
2642 }
2643 rc = qeth_ulp_enable(card);
2644 if (rc) {
d11ba0c4 2645 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2646 goto out_qdio;
2647 }
2648 rc = qeth_ulp_setup(card);
2649 if (rc) {
d11ba0c4 2650 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2651 goto out_qdio;
2652 }
2653 rc = qeth_alloc_qdio_buffers(card);
2654 if (rc) {
d11ba0c4 2655 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2656 goto out_qdio;
2657 }
2658 rc = qeth_qdio_establish(card);
2659 if (rc) {
d11ba0c4 2660 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2661 qeth_free_qdio_buffers(card);
2662 goto out_qdio;
2663 }
2664 rc = qeth_qdio_activate(card);
2665 if (rc) {
d11ba0c4 2666 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2667 goto out_qdio;
2668 }
2669 rc = qeth_dm_act(card);
2670 if (rc) {
d11ba0c4 2671 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2672 goto out_qdio;
2673 }
2674
2675 return 0;
2676out_qdio:
2677 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2678 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2679 return rc;
2680}
2681
4a71df50
FB		 2682void qeth_print_status_message(struct qeth_card *card)
2683{
2684 switch (card->info.type) {
5113fec0
UB		 2685 case QETH_CARD_TYPE_OSD:
2686 case QETH_CARD_TYPE_OSM:
2687 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2688 /* VM will use a non-zero first character
2689 * to indicate a HiperSockets like reporting
2690 * of the level OSA sets the first character to zero
2691 * */
2692 if (!card->info.mcl_level[0]) {
2693 sprintf(card->info.mcl_level, "%02x%02x",
2694 card->info.mcl_level[2],
2695 card->info.mcl_level[3]);
4a71df50
FB		 2696 break;
2697 }
2698 /* fallthrough */
2699 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2700 if ((card->info.guestlan) ||
2701 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2702 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2703 card->info.mcl_level[0]];
2704 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2705 card->info.mcl_level[1]];
2706 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2707 card->info.mcl_level[2]];
2708 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2709 card->info.mcl_level[3]];
2710 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2711 }
2712 break;
2713 default:
2714 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2715 }
239ff408
UB		 2716 dev_info(&card->gdev->dev,
2717 "Device is a%s card%s%s%s\nwith link type %s.\n",
2718 qeth_get_cardname(card),
2719 (card->info.mcl_level[0]) ? " (level: " : "",
2720 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2721 (card->info.mcl_level[0]) ? ")" : "",
2722 qeth_get_cardname_short(card));
4a71df50
FB		 2723}
2724EXPORT_SYMBOL_GPL(qeth_print_status_message);
2725
4a71df50
FB		 2726static void qeth_initialize_working_pool_list(struct qeth_card *card)
2727{
2728 struct qeth_buffer_pool_entry *entry;
2729
847a50fd 2730 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2731
2732 list_for_each_entry(entry,
2733 &card->qdio.init_pool.entry_list, init_list) {
2734 qeth_put_buffer_pool_entry(card, entry);
2735 }
2736}
2737
2738static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2739 struct qeth_card *card)
2740{
2741 struct list_head *plh;
2742 struct qeth_buffer_pool_entry *entry;
2743 int i, free;
2744 struct page *page;
2745
2746 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2747 return NULL;
2748
2749 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2750 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2751 free = 1;
2752 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2753 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2754 free = 0;
2755 break;
2756 }
2757 }
2758 if (free) {
2759 list_del_init(&entry->list);
2760 return entry;
2761 }
2762 }
2763
2764 /* no free buffer in pool so take first one and swap pages */
2765 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2766 struct qeth_buffer_pool_entry, list);
2767 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2768 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2769 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2770 if (!page) {
2771 return NULL;
2772 } else {
2773 free_page((unsigned long)entry->elements[i]);
2774 entry->elements[i] = page_address(page);
2775 if (card->options.performance_stats)
2776 card->perf_stats.sg_alloc_page_rx++;
2777 }
2778 }
2779 }
2780 list_del_init(&entry->list);
2781 return entry;
2782}
2783
2784static int qeth_init_input_buffer(struct qeth_card *card,
2785 struct qeth_qdio_buffer *buf)
2786{
2787 struct qeth_buffer_pool_entry *pool_entry;
2788 int i;
2789
b3332930
FB		 2790 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2791 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2792 if (!buf->rx_skb)
2793 return 1;
2794 }
2795
4a71df50
FB		 2796 pool_entry = qeth_find_free_buffer_pool_entry(card);
2797 if (!pool_entry)
2798 return 1;
2799
2800 /*
2801 * since the buffer is accessed only from the input_tasklet
2802 * there shouldn't be a need to synchronize; also, since we use
2803 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2804 * buffers
2805 */
4a71df50
FB		 2806
2807 buf->pool_entry = pool_entry;
2808 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2809 buf->buffer->element[i].length = PAGE_SIZE;
2810 buf->buffer->element[i].addr = pool_entry->elements[i];
2811 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2812 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2813 else
3ec90878
JG		 2814 buf->buffer->element[i].eflags = 0;
2815 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2816 }
2817 return 0;
2818}
2819
2820int qeth_init_qdio_queues(struct qeth_card *card)
2821{
2822 int i, j;
2823 int rc;
2824
d11ba0c4 2825 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2826
2827 /* inbound queue */
6d284bde
SO		 2828 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2829 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2830 qeth_initialize_working_pool_list(card);
2831 /*give only as many buffers to hardware as we have buffer pool entries*/
2832 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2833 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2834 card->qdio.in_q->next_buf_to_init =
2835 card->qdio.in_buf_pool.buf_count - 1;
2836 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2837 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2838 if (rc) {
d11ba0c4 2839 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2840 return rc;
2841 }
0da9581d
EL		 2842
2843 /* completion */
2844 rc = qeth_cq_init(card);
2845 if (rc) {
2846 return rc;
2847 }
2848
4a71df50
FB		 2849 /* outbound queue */
2850 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2851 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2852 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2853 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2854 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2855 card->qdio.out_qs[i]->bufs[j],
2856 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2857 }
2858 card->qdio.out_qs[i]->card = card;
2859 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2860 card->qdio.out_qs[i]->do_pack = 0;
2861 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2862 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2863 atomic_set(&card->qdio.out_qs[i]->state,
2864 QETH_OUT_Q_UNLOCKED);
2865 }
2866 return 0;
2867}
2868EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2869
2870static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2871{
2872 switch (link_type) {
2873 case QETH_LINK_TYPE_HSTR:
2874 return 2;
2875 default:
2876 return 1;
2877 }
2878}
2879
2880static void qeth_fill_ipacmd_header(struct qeth_card *card,
2881 struct qeth_ipa_cmd *cmd, __u8 command,
2882 enum qeth_prot_versions prot)
2883{
2884 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2885 cmd->hdr.command = command;
2886 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2887 cmd->hdr.seqno = card->seqno.ipa;
2888 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2889 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2890 if (card->options.layer2)
2891 cmd->hdr.prim_version_no = 2;
2892 else
2893 cmd->hdr.prim_version_no = 1;
2894 cmd->hdr.param_count = 1;
2895 cmd->hdr.prot_version = prot;
2896 cmd->hdr.ipa_supported = 0;
2897 cmd->hdr.ipa_enabled = 0;
2898}
2899
2900struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2901 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2902{
2903 struct qeth_cmd_buffer *iob;
2904 struct qeth_ipa_cmd *cmd;
2905
1aec42bc
TR		 2906 iob = qeth_get_buffer(&card->write);
2907 if (iob) {
2908 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2909 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2910 } else {
2911 dev_warn(&card->gdev->dev,
2912 "The qeth driver ran out of channel command buffers\n");
2913 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2914 dev_name(&card->gdev->dev));
2915 }
4a71df50
FB		 2916
2917 return iob;
2918}
2919EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2920
2921void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2922 char prot_type)
2923{
2924 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2925 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2926 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2927 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2928}
2929EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2930
efbbc1d5
EC		 2931/**
2932 * qeth_send_ipa_cmd() - send an IPA command
2933 *
2934 * See qeth_send_control_data() for explanation of the arguments.
2935 */
2936
4a71df50
FB		 2937int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2938 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2939 unsigned long),
2940 void *reply_param)
2941{
2942 int rc;
2943 char prot_type;
4a71df50 2944
847a50fd 2945 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2946
2947 if (card->options.layer2)
2948 if (card->info.type == QETH_CARD_TYPE_OSN)
2949 prot_type = QETH_PROT_OSN2;
2950 else
2951 prot_type = QETH_PROT_LAYER2;
2952 else
2953 prot_type = QETH_PROT_TCPIP;
2954 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2955 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2956 iob, reply_cb, reply_param);
908abbb5
UB		 2957 if (rc == -ETIME) {
2958 qeth_clear_ipacmd_list(card);
2959 qeth_schedule_recovery(card);
2960 }
4a71df50
FB		 2961 return rc;
2962}
2963EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2964
10340510 2965static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2966{
2967 int rc;
70919e23 2968 struct qeth_cmd_buffer *iob;
4a71df50 2969
d11ba0c4 2970 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2971
70919e23 2972 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2973 if (!iob)
2974 return -ENOMEM;
70919e23 2975 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2976 return rc;
2977}
4a71df50 2978
eb3fb0ba 2979static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2980 struct qeth_reply *reply, unsigned long data)
2981{
2982 struct qeth_ipa_cmd *cmd;
2983
847a50fd 2984 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2985
2986 cmd = (struct qeth_ipa_cmd *) data;
2987 if (cmd->hdr.return_code == 0)
2988 cmd->hdr.return_code =
2989 cmd->data.setadapterparms.hdr.return_code;
2990 return 0;
2991}
4a71df50
FB		 2992
2993static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2994 struct qeth_reply *reply, unsigned long data)
2995{
2996 struct qeth_ipa_cmd *cmd;
2997
847a50fd 2998 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2999
3000 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 3001 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 3002 card->info.link_type =
3003 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 3004 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
3005 }
4a71df50
FB		 3006 card->options.adp.supported_funcs =
3007 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
3008 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3009}
3010
eb3fb0ba 3011static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 3012 __u32 command, __u32 cmdlen)
3013{
3014 struct qeth_cmd_buffer *iob;
3015 struct qeth_ipa_cmd *cmd;
3016
3017 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3018 QETH_PROT_IPV4);
1aec42bc
TR		 3019 if (iob) {
3020 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3021 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3022 cmd->data.setadapterparms.hdr.command_code = command;
3023 cmd->data.setadapterparms.hdr.used_total = 1;
3024 cmd->data.setadapterparms.hdr.seq_no = 1;
3025 }
4a71df50
FB		 3026
3027 return iob;
3028}
4a71df50
FB		 3029
3030int qeth_query_setadapterparms(struct qeth_card *card)
3031{
3032 int rc;
3033 struct qeth_cmd_buffer *iob;
3034
847a50fd 3035 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3036 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3037 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3038 if (!iob)
3039 return -ENOMEM;
4a71df50
FB		 3040 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3041 return rc;
3042}
3043EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3044
1da74b1c
FB		 3045static int qeth_query_ipassists_cb(struct qeth_card *card,
3046 struct qeth_reply *reply, unsigned long data)
3047{
3048 struct qeth_ipa_cmd *cmd;
3049
3050 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3051
3052 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3053
3054 switch (cmd->hdr.return_code) {
3055 case IPA_RC_NOTSUPP:
3056 case IPA_RC_L2_UNSUPPORTED_CMD:
3057 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3058 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3059 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3060 return -0;
3061 default:
3062 if (cmd->hdr.return_code) {
3063 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3064 "rc=%d\n",
3065 dev_name(&card->gdev->dev),
3066 cmd->hdr.return_code);
3067 return 0;
3068 }
3069 }
3070
1da74b1c
FB		 3071 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3072 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3073 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3074 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3075 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3076 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3077 } else
3078 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3079 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3080 return 0;
3081}
3082
3083int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3084{
3085 int rc;
3086 struct qeth_cmd_buffer *iob;
3087
3088 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3089 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3090 if (!iob)
3091 return -ENOMEM;
1da74b1c
FB		 3092 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3093 return rc;
3094}
3095EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3096
45cbb2e4
SR		 3097static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3098 struct qeth_reply *reply, unsigned long data)
3099{
3100 struct qeth_ipa_cmd *cmd;
3101 struct qeth_switch_info *sw_info;
3102 struct qeth_query_switch_attributes *attrs;
3103
3104 QETH_CARD_TEXT(card, 2, "qswiatcb");
3105 cmd = (struct qeth_ipa_cmd *) data;
3106 sw_info = (struct qeth_switch_info *)reply->param;
3107 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3108 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3109 sw_info->capabilities = attrs->capabilities;
3110 sw_info->settings = attrs->settings;
3111 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3112 sw_info->settings);
3113 }
3114 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3115
3116 return 0;
3117}
3118
3119int qeth_query_switch_attributes(struct qeth_card *card,
3120 struct qeth_switch_info *sw_info)
3121{
3122 struct qeth_cmd_buffer *iob;
3123
3124 QETH_CARD_TEXT(card, 2, "qswiattr");
3125 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3126 return -EOPNOTSUPP;
3127 if (!netif_carrier_ok(card->dev))
3128 return -ENOMEDIUM;
3129 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3130 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3131 if (!iob)
3132 return -ENOMEM;
45cbb2e4
SR		 3133 return qeth_send_ipa_cmd(card, iob,
3134 qeth_query_switch_attributes_cb, sw_info);
3135}
3136EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3137
1da74b1c
FB		 3138static int qeth_query_setdiagass_cb(struct qeth_card *card,
3139 struct qeth_reply *reply, unsigned long data)
3140{
3141 struct qeth_ipa_cmd *cmd;
3142 __u16 rc;
3143
3144 cmd = (struct qeth_ipa_cmd *)data;
3145 rc = cmd->hdr.return_code;
3146 if (rc)
3147 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3148 else
3149 card->info.diagass_support = cmd->data.diagass.ext;
3150 return 0;
3151}
3152
3153static int qeth_query_setdiagass(struct qeth_card *card)
3154{
3155 struct qeth_cmd_buffer *iob;
3156 struct qeth_ipa_cmd *cmd;
3157
3158 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3159 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3160 if (!iob)
3161 return -ENOMEM;
1da74b1c
FB		 3162 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3163 cmd->data.diagass.subcmd_len = 16;
3164 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3165 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3166}
3167
3168static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3169{
3170 unsigned long info = get_zeroed_page(GFP_KERNEL);
3171 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3172 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3173 struct ccw_dev_id ccwid;
caf757c6 3174 int level;
1da74b1c
FB		 3175
3176 tid->chpid = card->info.chpid;
3177 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3178 tid->ssid = ccwid.ssid;
3179 tid->devno = ccwid.devno;
3180 if (!info)
3181 return;
caf757c6
HC		 3182 level = stsi(NULL, 0, 0, 0);
3183 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3184 tid->lparnr = info222->lpar_number;
caf757c6 3185 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3186 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3187 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3188 }
3189 free_page(info);
3190 return;
3191}
3192
3193static int qeth_hw_trap_cb(struct qeth_card *card,
3194 struct qeth_reply *reply, unsigned long data)
3195{
3196 struct qeth_ipa_cmd *cmd;
3197 __u16 rc;
3198
3199 cmd = (struct qeth_ipa_cmd *)data;
3200 rc = cmd->hdr.return_code;
3201 if (rc)
3202 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3203 return 0;
3204}
3205
3206int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3207{
3208 struct qeth_cmd_buffer *iob;
3209 struct qeth_ipa_cmd *cmd;
3210
3211 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3212 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3213 if (!iob)
3214 return -ENOMEM;
1da74b1c
FB		 3215 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3216 cmd->data.diagass.subcmd_len = 80;
3217 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3218 cmd->data.diagass.type = 1;
3219 cmd->data.diagass.action = action;
3220 switch (action) {
3221 case QETH_DIAGS_TRAP_ARM:
3222 cmd->data.diagass.options = 0x0003;
3223 cmd->data.diagass.ext = 0x00010000 +
3224 sizeof(struct qeth_trap_id);
3225 qeth_get_trap_id(card,
3226 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3227 break;
3228 case QETH_DIAGS_TRAP_DISARM:
3229 cmd->data.diagass.options = 0x0001;
3230 break;
3231 case QETH_DIAGS_TRAP_CAPTURE:
3232 break;
3233 }
3234 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3235}
3236EXPORT_SYMBOL_GPL(qeth_hw_trap);
3237
d73ef324
JW		 3238static int qeth_check_qdio_errors(struct qeth_card *card,
3239 struct qdio_buffer *buf,
3240 unsigned int qdio_error,
3241 const char *dbftext)
4a71df50 3242{
779e6e1c 3243 if (qdio_error) {
847a50fd 3244 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3245 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3246 buf->element[15].sflags);
38593d01 3247 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3248 buf->element[14].sflags);
38593d01 3249 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3250 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3251 card->stats.rx_dropped++;
3252 return 0;
3253 } else
3254 return 1;
4a71df50
FB		 3255 }
3256 return 0;
3257}
4a71df50 3258
d73ef324 3259static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3260{
3261 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3262 struct list_head *lh;
4a71df50
FB		 3263 int count;
3264 int i;
3265 int rc;
3266 int newcount = 0;
3267
4a71df50
FB		 3268 count = (index < queue->next_buf_to_init)?
3269 card->qdio.in_buf_pool.buf_count -
3270 (queue->next_buf_to_init - index) :
3271 card->qdio.in_buf_pool.buf_count -
3272 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3273 /* only requeue at a certain threshold to avoid SIGAs */
3274 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3275 for (i = queue->next_buf_to_init;
3276 i < queue->next_buf_to_init + count; ++i) {
3277 if (qeth_init_input_buffer(card,
3278 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3279 break;
3280 } else {
3281 newcount++;
3282 }
3283 }
3284
3285 if (newcount < count) {
3286 /* we are in memory shortage so we switch back to
3287 traditional skb allocation and drop packages */
4a71df50
FB		 3288 atomic_set(&card->force_alloc_skb, 3);
3289 count = newcount;
3290 } else {
4a71df50
FB		 3291 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3292 }
3293
b3332930
FB		 3294 if (!count) {
3295 i = 0;
3296 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3297 i++;
3298 if (i == card->qdio.in_buf_pool.buf_count) {
3299 QETH_CARD_TEXT(card, 2, "qsarbw");
3300 card->reclaim_index = index;
3301 schedule_delayed_work(
3302 &card->buffer_reclaim_work,
3303 QETH_RECLAIM_WORK_TIME);
3304 }
3305 return;
3306 }
3307
4a71df50
FB		 3308 /*
3309 * according to old code it should be avoided to requeue all
3310 * 128 buffers in order to benefit from PCI avoidance.
3311 * this function keeps at least one buffer (the buffer at
3312 * 'index') un-requeued -> this buffer is the first buffer that
3313 * will be requeued the next time
3314 */
3315 if (card->options.performance_stats) {
3316 card->perf_stats.inbound_do_qdio_cnt++;
3317 card->perf_stats.inbound_do_qdio_start_time =
3318 qeth_get_micros();
3319 }
779e6e1c
JG		 3320 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3321 queue->next_buf_to_init, count);
4a71df50
FB		 3322 if (card->options.performance_stats)
3323 card->perf_stats.inbound_do_qdio_time +=
3324 qeth_get_micros() -
3325 card->perf_stats.inbound_do_qdio_start_time;
3326 if (rc) {
847a50fd 3327 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3328 }
3329 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3330 QDIO_MAX_BUFFERS_PER_Q;
3331 }
3332}
d73ef324
JW		 3333
3334static void qeth_buffer_reclaim_work(struct work_struct *work)
3335{
3336 struct qeth_card *card = container_of(work, struct qeth_card,
3337 buffer_reclaim_work.work);
3338
3339 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3340 qeth_queue_input_buffer(card, card->reclaim_index);
3341}
4a71df50 3342
d7a39937 3343static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3344 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3345{
3ec90878 3346 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3347
847a50fd 3348 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3349 if (card->info.type == QETH_CARD_TYPE_IQD) {
3350 if (sbalf15 == 0) {
3351 qdio_err = 0;
3352 } else {
3353 qdio_err = 1;
3354 }
3355 }
76b11f8e 3356 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3357
3358 if (!qdio_err)
d7a39937 3359 return;
d303b6fd
JG		 3360
3361 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3362 return;
d303b6fd 3363
847a50fd
CO		 3364 QETH_CARD_TEXT(card, 1, "lnkfail");
3365 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3366 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3367}
3368
664e42ac
JW		 3369/**
3370 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3371 * @queue: queue to check for packing buffer
3372 *
3373 * Returns number of buffers that were prepared for flush.
3374 */
3375static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3376{
3377 struct qeth_qdio_out_buffer *buffer;
3378
3379 buffer = queue->bufs[queue->next_buf_to_fill];
3380 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3381 (buffer->next_element_to_fill > 0)) {
3382 /* it's a packing buffer */
3383 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3384 queue->next_buf_to_fill =
3385 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3386 return 1;
3387 }
3388 return 0;
3389}
3390
4a71df50
FB		 3391/*
3392 * Switched to packing state if the number of used buffers on a queue
3393 * reaches a certain limit.
3394 */
3395static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3396{
3397 if (!queue->do_pack) {
3398 if (atomic_read(&queue->used_buffers)
3399 >= QETH_HIGH_WATERMARK_PACK){
3400 /* switch non-PACKING -> PACKING */
847a50fd 3401 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3402 if (queue->card->options.performance_stats)
3403 queue->card->perf_stats.sc_dp_p++;
3404 queue->do_pack = 1;
3405 }
3406 }
3407}
3408
3409/*
3410 * Switches from packing to non-packing mode. If there is a packing
3411 * buffer on the queue this buffer will be prepared to be flushed.
3412 * In that case 1 is returned to inform the caller. If no buffer
3413 * has to be flushed, zero is returned.
3414 */
3415static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3416{
4a71df50
FB		 3417 if (queue->do_pack) {
3418 if (atomic_read(&queue->used_buffers)
3419 <= QETH_LOW_WATERMARK_PACK) {
3420 /* switch PACKING -> non-PACKING */
847a50fd 3421 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3422 if (queue->card->options.performance_stats)
3423 queue->card->perf_stats.sc_p_dp++;
3424 queue->do_pack = 0;
664e42ac 3425 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3426 }
3427 }
4a71df50
FB		 3428 return 0;
3429}
3430
779e6e1c
JG		 3431static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3432 int count)
4a71df50
FB		 3433{
3434 struct qeth_qdio_out_buffer *buf;
3435 int rc;
3436 int i;
3437 unsigned int qdio_flags;
3438
4a71df50 3439 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3440 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3441 buf = queue->bufs[bidx];
3ec90878
JG		 3442 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3443 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3444
0da9581d
EL		 3445 if (queue->bufstates)
3446 queue->bufstates[bidx].user = buf;
3447
4a71df50
FB		 3448 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3449 continue;
3450
3451 if (!queue->do_pack) {
3452 if ((atomic_read(&queue->used_buffers) >=
3453 (QETH_HIGH_WATERMARK_PACK -
3454 QETH_WATERMARK_PACK_FUZZ)) &&
3455 !atomic_read(&queue->set_pci_flags_count)) {
3456 /* it's likely that we'll go to packing
3457 * mode soon */
3458 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3459 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3460 }
3461 } else {
3462 if (!atomic_read(&queue->set_pci_flags_count)) {
3463 /*
3464 * there's no outstanding PCI any more, so we
3465 * have to request a PCI to be sure the the PCI
3466 * will wake at some time in the future then we
3467 * can flush packed buffers that might still be
3468 * hanging around, which can happen if no
3469 * further send was requested by the stack
3470 */
3471 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3472 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3473 }
3474 }
3475 }
3476
3e66bab3 3477 netif_trans_update(queue->card->dev);
4a71df50
FB		 3478 if (queue->card->options.performance_stats) {
3479 queue->card->perf_stats.outbound_do_qdio_cnt++;
3480 queue->card->perf_stats.outbound_do_qdio_start_time =
3481 qeth_get_micros();
3482 }
3483 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3484 if (atomic_read(&queue->set_pci_flags_count))
3485 qdio_flags |= QDIO_FLAG_PCI_OUT;
3486 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3487 queue->queue_no, index, count);
4a71df50
FB		 3488 if (queue->card->options.performance_stats)
3489 queue->card->perf_stats.outbound_do_qdio_time +=
3490 qeth_get_micros() -
3491 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3492 atomic_add(count, &queue->used_buffers);
4a71df50 3493 if (rc) {
d303b6fd
JG		 3494 queue->card->stats.tx_errors += count;
3495 /* ignore temporary SIGA errors without busy condition */
1549d13f 3496 if (rc == -ENOBUFS)
d303b6fd 3497 return;
847a50fd 3498 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3499 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3500 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3501 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3502 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3503
4a71df50
FB		 3504 /* this must not happen under normal circumstances. if it
3505 * happens something is really wrong -> recover */
3506 qeth_schedule_recovery(queue->card);
3507 return;
3508 }
4a71df50
FB		 3509 if (queue->card->options.performance_stats)
3510 queue->card->perf_stats.bufs_sent += count;
3511}
3512
3513static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3514{
3515 int index;
3516 int flush_cnt = 0;
3517 int q_was_packing = 0;
3518
3519 /*
3520 * check if weed have to switch to non-packing mode or if
3521 * we have to get a pci flag out on the queue
3522 */
3523 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3524 !atomic_read(&queue->set_pci_flags_count)) {
3525 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3526 QETH_OUT_Q_UNLOCKED) {
3527 /*
3528 * If we get in here, there was no action in
3529 * do_send_packet. So, we check if there is a
3530 * packing buffer to be flushed here.
3531 */
3532 netif_stop_queue(queue->card->dev);
3533 index = queue->next_buf_to_fill;
3534 q_was_packing = queue->do_pack;
3535 /* queue->do_pack may change */
3536 barrier();
3537 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3538 if (!flush_cnt &&
3539 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3540 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3541 if (queue->card->options.performance_stats &&
3542 q_was_packing)
3543 queue->card->perf_stats.bufs_sent_pack +=
3544 flush_cnt;
3545 if (flush_cnt)
779e6e1c 3546 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3547 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3548 }
3549 }
3550}
3551
a1c3ed4c
FB		 3552void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3553 unsigned long card_ptr)
3554{
3555 struct qeth_card *card = (struct qeth_card *)card_ptr;
3556
0cffef48 3557 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3558 napi_schedule(&card->napi);
3559}
3560EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3561
0da9581d
EL		 3562int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3563{
3564 int rc;
3565
3566 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3567 rc = -1;
3568 goto out;
3569 } else {
3570 if (card->options.cq == cq) {
3571 rc = 0;
3572 goto out;
3573 }
3574
3575 if (card->state != CARD_STATE_DOWN &&
3576 card->state != CARD_STATE_RECOVER) {
3577 rc = -1;
3578 goto out;
3579 }
3580
3581 qeth_free_qdio_buffers(card);
3582 card->options.cq = cq;
3583 rc = 0;
3584 }
3585out:
3586 return rc;
3587
3588}
3589EXPORT_SYMBOL_GPL(qeth_configure_cq);
3590
3591
3592static void qeth_qdio_cq_handler(struct qeth_card *card,
3593 unsigned int qdio_err,
3594 unsigned int queue, int first_element, int count) {
3595 struct qeth_qdio_q *cq = card->qdio.c_q;
3596 int i;
3597 int rc;
3598
3599 if (!qeth_is_cq(card, queue))
3600 goto out;
3601
3602 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3603 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3604 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3605
3606 if (qdio_err) {
3607 netif_stop_queue(card->dev);
3608 qeth_schedule_recovery(card);
3609 goto out;
3610 }
3611
3612 if (card->options.performance_stats) {
3613 card->perf_stats.cq_cnt++;
3614 card->perf_stats.cq_start_time = qeth_get_micros();
3615 }
3616
3617 for (i = first_element; i < first_element + count; ++i) {
3618 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3619 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3620 int e;
3621
3622 e = 0;
903e4853
UB		 3623 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3624 buffer->element[e].addr) {
0da9581d
EL		 3625 unsigned long phys_aob_addr;
3626
3627 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3628 qeth_qdio_handle_aob(card, phys_aob_addr);
3629 buffer->element[e].addr = NULL;
3630 buffer->element[e].eflags = 0;
3631 buffer->element[e].sflags = 0;
3632 buffer->element[e].length = 0;
3633
3634 ++e;
3635 }
3636
3637 buffer->element[15].eflags = 0;
3638 buffer->element[15].sflags = 0;
3639 }
3640 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3641 card->qdio.c_q->next_buf_to_init,
3642 count);
3643 if (rc) {
3644 dev_warn(&card->gdev->dev,
3645 "QDIO reported an error, rc=%i\n", rc);
3646 QETH_CARD_TEXT(card, 2, "qcqherr");
3647 }
3648 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3649 + count) % QDIO_MAX_BUFFERS_PER_Q;
3650
3651 netif_wake_queue(card->dev);
3652
3653 if (card->options.performance_stats) {
3654 int delta_t = qeth_get_micros();
3655 delta_t -= card->perf_stats.cq_start_time;
3656 card->perf_stats.cq_time += delta_t;
3657 }
3658out:
3659 return;
3660}
3661
a1c3ed4c 3662void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3663 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3664 unsigned long card_ptr)
3665{
3666 struct qeth_card *card = (struct qeth_card *)card_ptr;
3667
0da9581d
EL		 3668 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3669 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3670
3671 if (qeth_is_cq(card, queue))
3672 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3673 else if (qdio_err)
a1c3ed4c 3674 qeth_schedule_recovery(card);
0da9581d
EL		 3675
3676
a1c3ed4c
FB		 3677}
3678EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3679
779e6e1c
JG		 3680void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3681 unsigned int qdio_error, int __queue, int first_element,
3682 int count, unsigned long card_ptr)
4a71df50
FB		 3683{
3684 struct qeth_card *card = (struct qeth_card *) card_ptr;
3685 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3686 struct qeth_qdio_out_buffer *buffer;
3687 int i;
3688
847a50fd 3689 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3690 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3691 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3692 netif_stop_queue(card->dev);
3693 qeth_schedule_recovery(card);
3694 return;
4a71df50
FB		 3695 }
3696 if (card->options.performance_stats) {
3697 card->perf_stats.outbound_handler_cnt++;
3698 card->perf_stats.outbound_handler_start_time =
3699 qeth_get_micros();
3700 }
3701 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3702 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3703 buffer = queue->bufs[bidx];
b67d801f 3704 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3705
3706 if (queue->bufstates &&
3707 (queue->bufstates[bidx].flags &
3708 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3709 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3710
3711 if (atomic_cmpxchg(&buffer->state,
3712 QETH_QDIO_BUF_PRIMED,
3713 QETH_QDIO_BUF_PENDING) ==
3714 QETH_QDIO_BUF_PRIMED) {
3715 qeth_notify_skbs(queue, buffer,
3716 TX_NOTIFY_PENDING);
3717 }
0da9581d
EL		 3718 buffer->aob = queue->bufstates[bidx].aob;
3719 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3720 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3721 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3722 virt_to_phys(buffer->aob));
b3332930
FB		 3723 if (qeth_init_qdio_out_buf(queue, bidx)) {
3724 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3725 qeth_schedule_recovery(card);
b3332930 3726 }
0da9581d 3727 } else {
b3332930
FB		 3728 if (card->options.cq == QETH_CQ_ENABLED) {
3729 enum iucv_tx_notify n;
3730
3731 n = qeth_compute_cq_notification(
3732 buffer->buffer->element[15].sflags, 0);
3733 qeth_notify_skbs(queue, buffer, n);
3734 }
3735
0da9581d
EL		 3736 qeth_clear_output_buffer(queue, buffer,
3737 QETH_QDIO_BUF_EMPTY);
3738 }
3739 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3740 }
3741 atomic_sub(count, &queue->used_buffers);
3742 /* check if we need to do something on this outbound queue */
3743 if (card->info.type != QETH_CARD_TYPE_IQD)
3744 qeth_check_outbound_queue(queue);
3745
3746 netif_wake_queue(queue->card->dev);
3747 if (card->options.performance_stats)
3748 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3749 card->perf_stats.outbound_handler_start_time;
3750}
3751EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3752
70deb016
HW		 3753/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3754static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3755{
3756 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3757 return 2;
3758 return queue_num;
3759}
3760
290b8348
SR		 3761/**
3762 * Note: Function assumes that we have 4 outbound queues.
3763 */
4a71df50
FB		 3764int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3765 int ipv, int cast_type)
3766{
d66cb37e 3767 __be16 *tci;
290b8348
SR		 3768 u8 tos;
3769
290b8348
SR		 3770 if (cast_type && card->info.is_multicast_different)
3771 return card->info.is_multicast_different &
3772 (card->qdio.no_out_queues - 1);
3773
3774 switch (card->qdio.do_prio_queueing) {
3775 case QETH_PRIO_Q_ING_TOS:
3776 case QETH_PRIO_Q_ING_PREC:
3777 switch (ipv) {
3778 case 4:
3779 tos = ipv4_get_dsfield(ip_hdr(skb));
3780 break;
3781 case 6:
3782 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3783 break;
3784 default:
3785 return card->qdio.default_out_queue;
4a71df50 3786 }
290b8348 3787 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3788 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3789 if (tos & IPTOS_MINCOST)
70deb016 3790 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3791 if (tos & IPTOS_RELIABILITY)
3792 return 2;
3793 if (tos & IPTOS_THROUGHPUT)
3794 return 1;
3795 if (tos & IPTOS_LOWDELAY)
3796 return 0;
d66cb37e
SR		 3797 break;
3798 case QETH_PRIO_Q_ING_SKB:
3799 if (skb->priority > 5)
3800 return 0;
70deb016 3801 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3802 case QETH_PRIO_Q_ING_VLAN:
3803 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3804 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3805 return qeth_cut_iqd_prio(card,
3806 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3807 break;
4a71df50 3808 default:
290b8348 3809 break;
4a71df50 3810 }
290b8348 3811 return card->qdio.default_out_queue;
4a71df50
FB		 3812}
3813EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3814
2863c613
EC		 3815/**
3816 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3817 * @skb: SKB address
3818 *
3819 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3820 * fragmented part of the SKB. Returns zero for linear SKB.
3821 */
271648b4
FB		 3822int qeth_get_elements_for_frags(struct sk_buff *skb)
3823{
2863c613 3824 int cnt, elements = 0;
271648b4
FB		 3825
3826 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3827 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3828
3829 elements += qeth_get_elements_for_range(
3830 (addr_t)skb_frag_address(frag),
3831 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3832 }
3833 return elements;
3834}
3835EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3836
2863c613
EC		 3837/**
3838 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3839 * @card: qeth card structure, to check max. elems.
3840 * @skb: SKB address
3841 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3842 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3843 *
3844 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3845 * skb data, including linear part and fragments. Checks if the result plus
3846 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3847 * Note: extra_elems is not included in the returned result.
3848 */
065cc782 3849int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3850 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3851{
2863c613 3852 int elements = qeth_get_elements_for_range(
7d969d2e 3853 (addr_t)skb->data + data_offset,
2863c613
EC		 3854 (addr_t)skb->data + skb_headlen(skb)) +
3855 qeth_get_elements_for_frags(skb);
4a71df50 3856
2863c613 3857 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3858 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3859 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3860 elements + extra_elems, skb->len);
4a71df50
FB		 3861 return 0;
3862 }
2863c613 3863 return elements;
4a71df50
FB		 3864}
3865EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3866
d4ae1f5e 3867int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3868{
3869 int hroom, inpage, rest;
3870
3871 if (((unsigned long)skb->data & PAGE_MASK) !=
3872 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3873 hroom = skb_headroom(skb);
3874 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3875 rest = len - inpage;
3876 if (rest > hroom)
3877 return 1;
2863c613 3878 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3879 skb->data -= rest;
d4ae1f5e
SR		 3880 skb->tail -= rest;
3881 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3882 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3883 }
3884 return 0;
3885}
3886EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3887
f90b744e 3888static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3889 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3890 int offset)
4a71df50 3891{
2863c613 3892 int length = skb_headlen(skb);
4a71df50
FB		 3893 int length_here;
3894 int element;
3895 char *data;
51aa165c
FB		 3896 int first_lap, cnt;
3897 struct skb_frag_struct *frag;
4a71df50
FB		 3898
3899 element = *next_element_to_fill;
3900 data = skb->data;
3901 first_lap = (is_tso == 0 ? 1 : 0);
3902
683d718a
FB		 3903 if (offset >= 0) {
3904 data = skb->data + offset;
e1f03ae8 3905 length -= offset;
683d718a
FB		 3906 first_lap = 0;
3907 }
3908
4a71df50
FB		 3909 while (length > 0) {
3910 /* length_here is the remaining amount of data in this page */
3911 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3912 if (length < length_here)
3913 length_here = length;
3914
3915 buffer->element[element].addr = data;
3916 buffer->element[element].length = length_here;
3917 length -= length_here;
3918 if (!length) {
3919 if (first_lap)
51aa165c 3920 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3921 buffer->element[element].eflags =
3922 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3923 else
3ec90878 3924 buffer->element[element].eflags = 0;
4a71df50 3925 else
3ec90878
JG		 3926 buffer->element[element].eflags =
3927 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3928 } else {
3929 if (first_lap)
3ec90878
JG		 3930 buffer->element[element].eflags =
3931 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3932 else
3ec90878
JG		 3933 buffer->element[element].eflags =
3934 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3935 }
3936 data += length_here;
3937 element++;
3938 first_lap = 0;
3939 }
51aa165c
FB		 3940
3941 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3942 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3943 data = (char *)page_to_phys(skb_frag_page(frag)) +
3944 frag->page_offset;
3945 length = frag->size;
3946 while (length > 0) {
3947 length_here = PAGE_SIZE -
3948 ((unsigned long) data % PAGE_SIZE);
3949 if (length < length_here)
3950 length_here = length;
3951
3952 buffer->element[element].addr = data;
3953 buffer->element[element].length = length_here;
3954 buffer->element[element].eflags =
3955 SBAL_EFLAGS_MIDDLE_FRAG;
3956 length -= length_here;
3957 data += length_here;
3958 element++;
3959 }
51aa165c
FB		 3960 }
3961
3ec90878
JG		 3962 if (buffer->element[element - 1].eflags)
3963 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3964 *next_element_to_fill = element;
3965}
3966
f90b744e 3967static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3968 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3969 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3970{
3971 struct qdio_buffer *buffer;
4a71df50
FB		 3972 int flush_cnt = 0, hdr_len, large_send = 0;
3973
4a71df50
FB		 3974 buffer = buf->buffer;
3975 atomic_inc(&skb->users);
3976 skb_queue_tail(&buf->skb_list, skb);
3977
4a71df50 3978 /*check first on TSO ....*/
683d718a 3979 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3980 int element = buf->next_element_to_fill;
3981
683d718a
FB		 3982 hdr_len = sizeof(struct qeth_hdr_tso) +
3983 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3984 /*fill first buffer entry only with header information */
3985 buffer->element[element].addr = skb->data;
3986 buffer->element[element].length = hdr_len;
3ec90878 3987 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3988 buf->next_element_to_fill++;
3989 skb->data += hdr_len;
3990 skb->len -= hdr_len;
3991 large_send = 1;
3992 }
683d718a
FB		 3993
3994 if (offset >= 0) {
3995 int element = buf->next_element_to_fill;
3996 buffer->element[element].addr = hdr;
3997 buffer->element[element].length = sizeof(struct qeth_hdr) +
3998 hd_len;
3ec90878 3999 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 4000 buf->is_header[element] = 1;
4001 buf->next_element_to_fill++;
4002 }
4003
51aa165c
FB		 4004 __qeth_fill_buffer(skb, buffer, large_send,
4005 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 4006
4007 if (!queue->do_pack) {
847a50fd 4008 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4009 /* set state to PRIMED -> will be flushed */
4010 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4011 flush_cnt = 1;
4012 } else {
847a50fd 4013 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4014 if (queue->card->options.performance_stats)
4015 queue->card->perf_stats.skbs_sent_pack++;
4016 if (buf->next_element_to_fill >=
4017 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4018 /*
4019 * packed buffer if full -> set state PRIMED
4020 * -> will be flushed
4021 */
4022 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4023 flush_cnt = 1;
4024 }
4025 }
4026 return flush_cnt;
4027}
4028
4029int qeth_do_send_packet_fast(struct qeth_card *card,
4030 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4e8d7e62 4031 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 4032{
4033 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 4034 int index;
4035
4a71df50
FB		 4036 /* spin until we get the queue ... */
4037 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4038 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4039 /* ... now we've got the queue */
4040 index = queue->next_buf_to_fill;
0da9581d 4041 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4042 /*
4043 * check if buffer is empty to make sure that we do not 'overtake'
4044 * ourselves and try to fill a buffer that is already primed
4045 */
4046 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4047 goto out;
64ef8957 4048 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4049 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4050 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4051 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4052 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4053 return 0;
4054out:
4055 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4056 return -EBUSY;
4057}
4058EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4059
4060int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4061 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 4062 int elements_needed)
4a71df50
FB		 4063{
4064 struct qeth_qdio_out_buffer *buffer;
4065 int start_index;
4066 int flush_count = 0;
4067 int do_pack = 0;
4068 int tmp;
4069 int rc = 0;
4070
4a71df50
FB		 4071 /* spin until we get the queue ... */
4072 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4073 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4074 start_index = queue->next_buf_to_fill;
0da9581d 4075 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4076 /*
4077 * check if buffer is empty to make sure that we do not 'overtake'
4078 * ourselves and try to fill a buffer that is already primed
4079 */
4080 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4081 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4082 return -EBUSY;
4083 }
4084 /* check if we need to switch packing state of this queue */
4085 qeth_switch_to_packing_if_needed(queue);
4086 if (queue->do_pack) {
4087 do_pack = 1;
64ef8957
FB		 4088 /* does packet fit in current buffer? */
4089 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4090 buffer->next_element_to_fill) < elements_needed) {
4091 /* ... no -> set state PRIMED */
4092 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4093 flush_count++;
4094 queue->next_buf_to_fill =
4095 (queue->next_buf_to_fill + 1) %
4096 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4097 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4098 /* we did a step forward, so check buffer state
4099 * again */
4100 if (atomic_read(&buffer->state) !=
4101 QETH_QDIO_BUF_EMPTY) {
4102 qeth_flush_buffers(queue, start_index,
779e6e1c 4103 flush_count);
64ef8957 4104 atomic_set(&queue->state,
4a71df50 4105 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4106 rc = -EBUSY;
4107 goto out;
4a71df50
FB		 4108 }
4109 }
4110 }
64ef8957 4111 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4112 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4113 QDIO_MAX_BUFFERS_PER_Q;
4114 flush_count += tmp;
4a71df50 4115 if (flush_count)
779e6e1c 4116 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4117 else if (!atomic_read(&queue->set_pci_flags_count))
4118 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4119 /*
4120 * queue->state will go from LOCKED -> UNLOCKED or from
4121 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4122 * (switch packing state or flush buffer to get another pci flag out).
4123 * In that case we will enter this loop
4124 */
4125 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4126 start_index = queue->next_buf_to_fill;
4127 /* check if we can go back to non-packing state */
3cdc8a25 4128 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4129 /*
4130 * check if we need to flush a packing buffer to get a pci
4131 * flag out on the queue
4132 */
3cdc8a25
JW		 4133 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4134 tmp = qeth_prep_flush_pack_buffer(queue);
4135 if (tmp) {
4136 qeth_flush_buffers(queue, start_index, tmp);
4137 flush_count += tmp;
4138 }
4a71df50 4139 }
3cdc8a25 4140out:
4a71df50
FB		 4141 /* at this point the queue is UNLOCKED again */
4142 if (queue->card->options.performance_stats && do_pack)
4143 queue->card->perf_stats.bufs_sent_pack += flush_count;
4144
4145 return rc;
4146}
4147EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4148
4149static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4150 struct qeth_reply *reply, unsigned long data)
4151{
4152 struct qeth_ipa_cmd *cmd;
4153 struct qeth_ipacmd_setadpparms *setparms;
4154
847a50fd 4155 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4156
4157 cmd = (struct qeth_ipa_cmd *) data;
4158 setparms = &(cmd->data.setadapterparms);
4159
4160 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4161 if (cmd->hdr.return_code) {
8a593148 4162 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4163 setparms->data.mode = SET_PROMISC_MODE_OFF;
4164 }
4165 card->info.promisc_mode = setparms->data.mode;
4166 return 0;
4167}
4168
4169void qeth_setadp_promisc_mode(struct qeth_card *card)
4170{
4171 enum qeth_ipa_promisc_modes mode;
4172 struct net_device *dev = card->dev;
4173 struct qeth_cmd_buffer *iob;
4174 struct qeth_ipa_cmd *cmd;
4175
847a50fd 4176 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4177
4178 if (((dev->flags & IFF_PROMISC) &&
4179 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4180 (!(dev->flags & IFF_PROMISC) &&
4181 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4182 return;
4183 mode = SET_PROMISC_MODE_OFF;
4184 if (dev->flags & IFF_PROMISC)
4185 mode = SET_PROMISC_MODE_ON;
847a50fd 4186 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4187
4188 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4189 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4190 if (!iob)
4191 return;
4a71df50
FB		 4192 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4193 cmd->data.setadapterparms.data.mode = mode;
4194 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4195}
4196EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4197
4198int qeth_change_mtu(struct net_device *dev, int new_mtu)
4199{
4200 struct qeth_card *card;
4201 char dbf_text[15];
4202
509e2562 4203 card = dev->ml_priv;
4a71df50 4204
847a50fd 4205 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4206 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4207 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4208
4845b93f 4209 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4210 return -EINVAL;
4211 dev->mtu = new_mtu;
4212 return 0;
4213}
4214EXPORT_SYMBOL_GPL(qeth_change_mtu);
4215
4216struct net_device_stats *qeth_get_stats(struct net_device *dev)
4217{
4218 struct qeth_card *card;
4219
509e2562 4220 card = dev->ml_priv;
4a71df50 4221
847a50fd 4222 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4223
4224 return &card->stats;
4225}
4226EXPORT_SYMBOL_GPL(qeth_get_stats);
4227
4228static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4229 struct qeth_reply *reply, unsigned long data)
4230{
4231 struct qeth_ipa_cmd *cmd;
4232
847a50fd 4233 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4234
4235 cmd = (struct qeth_ipa_cmd *) data;
4236 if (!card->options.layer2 ||
4237 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4238 memcpy(card->dev->dev_addr,
4239 &cmd->data.setadapterparms.data.change_addr.addr,
4240 OSA_ADDR_LEN);
4241 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4242 }
4243 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4244 return 0;
4245}
4246
4247int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4248{
4249 int rc;
4250 struct qeth_cmd_buffer *iob;
4251 struct qeth_ipa_cmd *cmd;
4252
847a50fd 4253 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4254
4255 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4256 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4257 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4258 if (!iob)
4259 return -ENOMEM;
4a71df50
FB		 4260 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4261 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4262 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4263 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4264 card->dev->dev_addr, OSA_ADDR_LEN);
4265 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4266 NULL);
4267 return rc;
4268}
4269EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4270
d64ecc22
EL		 4271static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4272 struct qeth_reply *reply, unsigned long data)
4273{
4274 struct qeth_ipa_cmd *cmd;
4275 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4276 int fallback = *(int *)reply->param;
d64ecc22 4277
847a50fd 4278 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4279
4280 cmd = (struct qeth_ipa_cmd *) data;
4281 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4282 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4283 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4284 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4285 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4286 if (cmd->data.setadapterparms.hdr.return_code !=
4287 SET_ACCESS_CTRL_RC_SUCCESS)
4288 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4289 card->gdev->dev.kobj.name,
4290 access_ctrl_req->subcmd_code,
4291 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4292 switch (cmd->data.setadapterparms.hdr.return_code) {
4293 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4294 if (card->options.isolation == ISOLATION_MODE_NONE) {
4295 dev_info(&card->gdev->dev,
4296 "QDIO data connection isolation is deactivated\n");
4297 } else {
4298 dev_info(&card->gdev->dev,
4299 "QDIO data connection isolation is activated\n");
4300 }
d64ecc22 4301 break;
0f54761d
SR		 4302 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4303 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4304 "deactivated\n", dev_name(&card->gdev->dev));
4305 if (fallback)
4306 card->options.isolation = card->options.prev_isolation;
4307 break;
4308 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4309 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4310 " activated\n", dev_name(&card->gdev->dev));
4311 if (fallback)
4312 card->options.isolation = card->options.prev_isolation;
4313 break;
d64ecc22 4314 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4315 dev_err(&card->gdev->dev, "Adapter does not "
4316 "support QDIO data connection isolation\n");
d64ecc22 4317 break;
d64ecc22 4318 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4319 dev_err(&card->gdev->dev,
4320 "Adapter is dedicated. "
4321 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4322 if (fallback)
4323 card->options.isolation = card->options.prev_isolation;
d64ecc22 4324 break;
d64ecc22 4325 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4326 dev_err(&card->gdev->dev,
4327 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4328 if (fallback)
4329 card->options.isolation = card->options.prev_isolation;
4330 break;
4331 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4332 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4333 "support reflective relay mode\n");
4334 if (fallback)
4335 card->options.isolation = card->options.prev_isolation;
4336 break;
4337 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4338 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4339 "enabled at the adjacent switch port");
4340 if (fallback)
4341 card->options.isolation = card->options.prev_isolation;
4342 break;
4343 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4344 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4345 "at the adjacent switch failed\n");
d64ecc22 4346 break;
d64ecc22 4347 default:
d64ecc22 4348 /* this should never happen */
0f54761d
SR		 4349 if (fallback)
4350 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4351 break;
4352 }
d64ecc22 4353 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4354 return 0;
d64ecc22
EL		 4355}
4356
4357static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4358 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4359{
4360 int rc;
4361 struct qeth_cmd_buffer *iob;
4362 struct qeth_ipa_cmd *cmd;
4363 struct qeth_set_access_ctrl *access_ctrl_req;
4364
847a50fd 4365 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4366
4367 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4368 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4369
4370 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4371 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4372 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4373 if (!iob)
4374 return -ENOMEM;
d64ecc22
EL		 4375 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4376 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4377 access_ctrl_req->subcmd_code = isolation;
4378
4379 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4380 &fallback);
d64ecc22
EL		 4381 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4382 return rc;
4383}
4384
0f54761d 4385int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4386{
4387 int rc = 0;
4388
847a50fd 4389 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4390
5113fec0
UB		 4391 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4392 card->info.type == QETH_CARD_TYPE_OSX) &&
4393 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4394 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4395 card->options.isolation, fallback);
d64ecc22
EL		 4396 if (rc) {
4397 QETH_DBF_MESSAGE(3,
5113fec0 4398 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4399 card->gdev->dev.kobj.name,
4400 rc);
0f54761d 4401 rc = -EOPNOTSUPP;
d64ecc22
EL		 4402 }
4403 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4404 card->options.isolation = ISOLATION_MODE_NONE;
4405
4406 dev_err(&card->gdev->dev, "Adapter does not "
4407 "support QDIO data connection isolation\n");
4408 rc = -EOPNOTSUPP;
4409 }
4410 return rc;
4411}
4412EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4413
4a71df50
FB		 4414void qeth_tx_timeout(struct net_device *dev)
4415{
4416 struct qeth_card *card;
4417
509e2562 4418 card = dev->ml_priv;
847a50fd 4419 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4420 card->stats.tx_errors++;
4421 qeth_schedule_recovery(card);
4422}
4423EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4424
942d6984 4425static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4426{
509e2562 4427 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4428 int rc = 0;
4429
4430 switch (regnum) {
4431 case MII_BMCR: /* Basic mode control register */
4432 rc = BMCR_FULLDPLX;
4433 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4434 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4435 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4436 rc |= BMCR_SPEED100;
4437 break;
4438 case MII_BMSR: /* Basic mode status register */
4439 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4440 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4441 BMSR_100BASE4;
4442 break;
4443 case MII_PHYSID1: /* PHYS ID 1 */
4444 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4445 dev->dev_addr[2];
4446 rc = (rc >> 5) & 0xFFFF;
4447 break;
4448 case MII_PHYSID2: /* PHYS ID 2 */
4449 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4450 break;
4451 case MII_ADVERTISE: /* Advertisement control reg */
4452 rc = ADVERTISE_ALL;
4453 break;
4454 case MII_LPA: /* Link partner ability reg */
4455 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4456 LPA_100BASE4 | LPA_LPACK;
4457 break;
4458 case MII_EXPANSION: /* Expansion register */
4459 break;
4460 case MII_DCOUNTER: /* disconnect counter */
4461 break;
4462 case MII_FCSCOUNTER: /* false carrier counter */
4463 break;
4464 case MII_NWAYTEST: /* N-way auto-neg test register */
4465 break;
4466 case MII_RERRCOUNTER: /* rx error counter */
4467 rc = card->stats.rx_errors;
4468 break;
4469 case MII_SREVISION: /* silicon revision */
4470 break;
4471 case MII_RESV1: /* reserved 1 */
4472 break;
4473 case MII_LBRERROR: /* loopback, rx, bypass error */
4474 break;
4475 case MII_PHYADDR: /* physical address */
4476 break;
4477 case MII_RESV2: /* reserved 2 */
4478 break;
4479 case MII_TPISTATUS: /* TPI status for 10mbps */
4480 break;
4481 case MII_NCONFIG: /* network interface config */
4482 break;
4483 default:
4484 break;
4485 }
4486 return rc;
4487}
4a71df50
FB		 4488
4489static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4490 struct qeth_cmd_buffer *iob, int len,
4491 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4492 unsigned long),
4493 void *reply_param)
4494{
4495 u16 s1, s2;
4496
847a50fd 4497 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4498
4499 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4500 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4501 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4502 /* adjust PDU length fields in IPA_PDU_HEADER */
4503 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4504 s2 = (u32) len;
4505 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4506 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4507 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4508 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4509 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4510 reply_cb, reply_param);
4511}
4512
4513static int qeth_snmp_command_cb(struct qeth_card *card,
4514 struct qeth_reply *reply, unsigned long sdata)
4515{
4516 struct qeth_ipa_cmd *cmd;
4517 struct qeth_arp_query_info *qinfo;
4518 struct qeth_snmp_cmd *snmp;
4519 unsigned char *data;
4520 __u16 data_len;
4521
847a50fd 4522 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4523
4524 cmd = (struct qeth_ipa_cmd *) sdata;
4525 data = (unsigned char *)((char *)cmd - reply->offset);
4526 qinfo = (struct qeth_arp_query_info *) reply->param;
4527 snmp = &cmd->data.setadapterparms.data.snmp;
4528
4529 if (cmd->hdr.return_code) {
8a593148 4530 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4531 return 0;
4532 }
4533 if (cmd->data.setadapterparms.hdr.return_code) {
4534 cmd->hdr.return_code =
4535 cmd->data.setadapterparms.hdr.return_code;
8a593148 4536 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4537 return 0;
4538 }
4539 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4540 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4541 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4542 else
4543 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4544
4545 /* check if there is enough room in userspace */
4546 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4547 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4548 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4549 return 0;
4550 }
847a50fd 4551 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4552 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4553 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4554 cmd->data.setadapterparms.hdr.seq_no);
4555 /*copy entries to user buffer*/
4556 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4557 memcpy(qinfo->udata + qinfo->udata_offset,
4558 (char *)snmp,
4559 data_len + offsetof(struct qeth_snmp_cmd, data));
4560 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4561 } else {
4562 memcpy(qinfo->udata + qinfo->udata_offset,
4563 (char *)&snmp->request, data_len);
4564 }
4565 qinfo->udata_offset += data_len;
4566 /* check if all replies received ... */
847a50fd 4567 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4568 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4569 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4570 cmd->data.setadapterparms.hdr.seq_no);
4571 if (cmd->data.setadapterparms.hdr.seq_no <
4572 cmd->data.setadapterparms.hdr.used_total)
4573 return 1;
4574 return 0;
4575}
4576
942d6984 4577static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4578{
4579 struct qeth_cmd_buffer *iob;
4580 struct qeth_ipa_cmd *cmd;
4581 struct qeth_snmp_ureq *ureq;
6fb392b1 4582 unsigned int req_len;
4a71df50
FB		 4583 struct qeth_arp_query_info qinfo = {0, };
4584 int rc = 0;
4585
847a50fd 4586 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4587
4588 if (card->info.guestlan)
4589 return -EOPNOTSUPP;
4590
4591 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4592 (!card->options.layer2)) {
4a71df50
FB		 4593 return -EOPNOTSUPP;
4594 }
4595 /* skip 4 bytes (data_len struct member) to get req_len */
4596 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4597 return -EFAULT;
6fb392b1
UB		 4598 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4599 sizeof(struct qeth_ipacmd_hdr) -
4600 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4601 return -EINVAL;
4986f3f0
JL		 4602 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4603 if (IS_ERR(ureq)) {
847a50fd 4604 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4605 return PTR_ERR(ureq);
4a71df50
FB		 4606 }
4607 qinfo.udata_len = ureq->hdr.data_len;
4608 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4609 if (!qinfo.udata) {
4610 kfree(ureq);
4611 return -ENOMEM;
4612 }
4613 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4614
4615 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4616 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4617 if (!iob) {
4618 rc = -ENOMEM;
4619 goto out;
4620 }
4a71df50
FB		 4621 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4622 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4623 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4624 qeth_snmp_command_cb, (void *)&qinfo);
4625 if (rc)
14cc21b6 4626 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4627 QETH_CARD_IFNAME(card), rc);
4628 else {
4629 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4630 rc = -EFAULT;
4631 }
1aec42bc 4632out:
4a71df50
FB		 4633 kfree(ureq);
4634 kfree(qinfo.udata);
4635 return rc;
4636}
4a71df50 4637
c3ab96f3
FB		 4638static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4639 struct qeth_reply *reply, unsigned long data)
4640{
4641 struct qeth_ipa_cmd *cmd;
4642 struct qeth_qoat_priv *priv;
4643 char *resdata;
4644 int resdatalen;
4645
4646 QETH_CARD_TEXT(card, 3, "qoatcb");
4647
4648 cmd = (struct qeth_ipa_cmd *)data;
4649 priv = (struct qeth_qoat_priv *)reply->param;
4650 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4651 resdata = (char *)data + 28;
4652
4653 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4654 cmd->hdr.return_code = IPA_RC_FFFF;
4655 return 0;
4656 }
4657
4658 memcpy((priv->buffer + priv->response_len), resdata,
4659 resdatalen);
4660 priv->response_len += resdatalen;
4661
4662 if (cmd->data.setadapterparms.hdr.seq_no <
4663 cmd->data.setadapterparms.hdr.used_total)
4664 return 1;
4665 return 0;
4666}
4667
942d6984 4668static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4669{
4670 int rc = 0;
4671 struct qeth_cmd_buffer *iob;
4672 struct qeth_ipa_cmd *cmd;
4673 struct qeth_query_oat *oat_req;
4674 struct qeth_query_oat_data oat_data;
4675 struct qeth_qoat_priv priv;
4676 void __user *tmp;
4677
4678 QETH_CARD_TEXT(card, 3, "qoatcmd");
4679
4680 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4681 rc = -EOPNOTSUPP;
4682 goto out;
4683 }
4684
4685 if (copy_from_user(&oat_data, udata,
4686 sizeof(struct qeth_query_oat_data))) {
4687 rc = -EFAULT;
4688 goto out;
4689 }
4690
4691 priv.buffer_len = oat_data.buffer_len;
4692 priv.response_len = 0;
4693 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4694 if (!priv.buffer) {
4695 rc = -ENOMEM;
4696 goto out;
4697 }
4698
4699 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4700 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4701 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4702 if (!iob) {
4703 rc = -ENOMEM;
4704 goto out_free;
4705 }
c3ab96f3
FB		 4706 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4707 oat_req = &cmd->data.setadapterparms.data.query_oat;
4708 oat_req->subcmd_code = oat_data.command;
4709
4710 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4711 &priv);
4712 if (!rc) {
4713 if (is_compat_task())
4714 tmp = compat_ptr(oat_data.ptr);
4715 else
4716 tmp = (void __user *)(unsigned long)oat_data.ptr;
4717
4718 if (copy_to_user(tmp, priv.buffer,
4719 priv.response_len)) {
4720 rc = -EFAULT;
4721 goto out_free;
4722 }
4723
4724 oat_data.response_len = priv.response_len;
4725
4726 if (copy_to_user(udata, &oat_data,
4727 sizeof(struct qeth_query_oat_data)))
4728 rc = -EFAULT;
4729 } else
4730 if (rc == IPA_RC_FFFF)
4731 rc = -EFAULT;
4732
4733out_free:
4734 kfree(priv.buffer);
4735out:
4736 return rc;
4737}
c3ab96f3 4738
e71e4072
HC		 4739static int qeth_query_card_info_cb(struct qeth_card *card,
4740 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4741{
4742 struct qeth_ipa_cmd *cmd;
4743 struct qeth_query_card_info *card_info;
4744 struct carrier_info *carrier_info;
4745
4746 QETH_CARD_TEXT(card, 2, "qcrdincb");
4747 carrier_info = (struct carrier_info *)reply->param;
4748 cmd = (struct qeth_ipa_cmd *)data;
4749 card_info = &cmd->data.setadapterparms.data.card_info;
4750 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4751 carrier_info->card_type = card_info->card_type;
4752 carrier_info->port_mode = card_info->port_mode;
4753 carrier_info->port_speed = card_info->port_speed;
4754 }
4755
4756 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4757 return 0;
4758}
4759
bca51650 4760static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4761 struct carrier_info *carrier_info)
4762{
4763 struct qeth_cmd_buffer *iob;
4764
4765 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4766 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4767 return -EOPNOTSUPP;
4768 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4769 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4770 if (!iob)
4771 return -ENOMEM;
02d5cb5b
EC		 4772 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4773 (void *)carrier_info);
4774}
02d5cb5b 4775
4a71df50
FB		 4776static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4777{
aa59004b
JW		 4778 if (card->info.type == QETH_CARD_TYPE_IQD)
4779 return QDIO_IQDIO_QFMT;
4780 else
4781 return QDIO_QETH_QFMT;
4a71df50
FB		 4782}
4783
d0ff1f52
UB		 4784static void qeth_determine_capabilities(struct qeth_card *card)
4785{
4786 int rc;
4787 int length;
4788 char *prcd;
4789 struct ccw_device *ddev;
4790 int ddev_offline = 0;
4791
4792 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4793 ddev = CARD_DDEV(card);
4794 if (!ddev->online) {
4795 ddev_offline = 1;
4796 rc = ccw_device_set_online(ddev);
4797 if (rc) {
4798 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4799 goto out;
4800 }
4801 }
4802
4803 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4804 if (rc) {
4805 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4806 dev_name(&card->gdev->dev), rc);
4807 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4808 goto out_offline;
4809 }
4810 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4811 if (ddev_offline)
4812 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4813 kfree(prcd);
4814
4815 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4816 if (rc)
4817 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4818
0da9581d 4819 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4820 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4821 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4822 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4823 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4824 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4825 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4826 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4827 dev_info(&card->gdev->dev,
4828 "Completion Queueing supported\n");
4829 } else {
4830 card->options.cq = QETH_CQ_NOTAVAILABLE;
4831 }
4832
4833
d0ff1f52
UB		 4834out_offline:
4835 if (ddev_offline == 1)
4836 ccw_device_set_offline(ddev);
4837out:
4838 return;
4839}
4840
0da9581d
EL		 4841static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4842 struct qdio_buffer **in_sbal_ptrs,
4843 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4844 int i;
4845
4846 if (card->options.cq == QETH_CQ_ENABLED) {
4847 int offset = QDIO_MAX_BUFFERS_PER_Q *
4848 (card->qdio.no_in_queues - 1);
4849 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4850 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4851 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4852 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4853 }
4854
4855 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4856 }
4857}
4858
4a71df50
FB		 4859static int qeth_qdio_establish(struct qeth_card *card)
4860{
4861 struct qdio_initialize init_data;
4862 char *qib_param_field;
4863 struct qdio_buffer **in_sbal_ptrs;
104ea556 4864 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4865 struct qdio_buffer **out_sbal_ptrs;
4866 int i, j, k;
4867 int rc = 0;
4868
d11ba0c4 4869 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4870
4871 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4872 GFP_KERNEL);
104ea556 4873 if (!qib_param_field) {
4874 rc = -ENOMEM;
4875 goto out_free_nothing;
4876 }
4a71df50
FB		 4877
4878 qeth_create_qib_param_field(card, qib_param_field);
4879 qeth_create_qib_param_field_blkt(card, qib_param_field);
4880
b3332930 4881 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4882 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4883 GFP_KERNEL);
4884 if (!in_sbal_ptrs) {
104ea556 4885 rc = -ENOMEM;
4886 goto out_free_qib_param;
4a71df50 4887 }
0da9581d 4888 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4889 in_sbal_ptrs[i] = (struct qdio_buffer *)
4890 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4891 }
4a71df50 4892
0da9581d
EL		 4893 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4894 GFP_KERNEL);
104ea556 4895 if (!queue_start_poll) {
4896 rc = -ENOMEM;
4897 goto out_free_in_sbals;
4898 }
0da9581d 4899 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4900 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4901
4902 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4903
4a71df50 4904 out_sbal_ptrs =
b3332930 4905 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4906 sizeof(void *), GFP_KERNEL);
4907 if (!out_sbal_ptrs) {
104ea556 4908 rc = -ENOMEM;
4909 goto out_free_queue_start_poll;
4a71df50
FB		 4910 }
4911 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4912 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4913 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4914 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4915 }
4916
4917 memset(&init_data, 0, sizeof(struct qdio_initialize));
4918 init_data.cdev = CARD_DDEV(card);
4919 init_data.q_format = qeth_get_qdio_q_format(card);
4920 init_data.qib_param_field_format = 0;
4921 init_data.qib_param_field = qib_param_field;
0da9581d 4922 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4923 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4924 init_data.input_handler = card->discipline->input_handler;
4925 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4926 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4927 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4928 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4929 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4930 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4931 init_data.scan_threshold =
0fa81cd4 4932 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4933
4934 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4935 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4936 rc = qdio_allocate(&init_data);
4937 if (rc) {
4938 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4939 goto out;
4940 }
4941 rc = qdio_establish(&init_data);
4942 if (rc) {
4a71df50 4943 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4944 qdio_free(CARD_DDEV(card));
4945 }
4a71df50 4946 }
0da9581d
EL		 4947
4948 switch (card->options.cq) {
4949 case QETH_CQ_ENABLED:
4950 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4951 break;
4952 case QETH_CQ_DISABLED:
4953 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4954 break;
4955 default:
4956 break;
4957 }
cc961d40 4958out:
4a71df50 4959 kfree(out_sbal_ptrs);
104ea556 4960out_free_queue_start_poll:
4961 kfree(queue_start_poll);
4962out_free_in_sbals:
4a71df50 4963 kfree(in_sbal_ptrs);
104ea556 4964out_free_qib_param:
4a71df50 4965 kfree(qib_param_field);
104ea556 4966out_free_nothing:
4a71df50
FB		 4967 return rc;
4968}
4969
4970static void qeth_core_free_card(struct qeth_card *card)
4971{
4972
d11ba0c4
PT		 4973 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4974 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4975 qeth_clean_channel(&card->read);
4976 qeth_clean_channel(&card->write);
4977 if (card->dev)
4978 free_netdev(card->dev);
4a71df50 4979 qeth_free_qdio_buffers(card);
6bcac508 4980 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4981 kfree(card);
4982}
4983
395672e0
SR		 4984void qeth_trace_features(struct qeth_card *card)
4985{
4986 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4987 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4988 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4989 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4990 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4991 sizeof(card->info.diagass_support));
395672e0
SR		 4992}
4993EXPORT_SYMBOL_GPL(qeth_trace_features);
4994
4a71df50 4995static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4996 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4997 .driver_info = QETH_CARD_TYPE_OSD},
4998 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4999 .driver_info = QETH_CARD_TYPE_IQD},
5000 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5001 .driver_info = QETH_CARD_TYPE_OSN},
5002 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5003 .driver_info = QETH_CARD_TYPE_OSM},
5004 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5005 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5006 {},
5007};
5008MODULE_DEVICE_TABLE(ccw, qeth_ids);
5009
5010static struct ccw_driver qeth_ccw_driver = {
3bda058b 5011 .driver = {
3e70b3b8 5012 .owner = THIS_MODULE,
3bda058b
SO		 5013 .name = "qeth",
5014 },
4a71df50
FB		 5015 .ids = qeth_ids,
5016 .probe = ccwgroup_probe_ccwdev,
5017 .remove = ccwgroup_remove_ccwdev,
5018};
5019
4a71df50
FB		 5020int qeth_core_hardsetup_card(struct qeth_card *card)
5021{
6ebb7f8d 5022 int retries = 3;
4a71df50
FB		 5023 int rc;
5024
d11ba0c4 5025 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5026 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5027 qeth_update_from_chp_desc(card);
4a71df50 5028retry:
6ebb7f8d 5029 if (retries < 3)
74eacdb9
FB		 5030 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5031 dev_name(&card->gdev->dev));
22ae2790 5032 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5033 ccw_device_set_offline(CARD_DDEV(card));
5034 ccw_device_set_offline(CARD_WDEV(card));
5035 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5036 qdio_free(CARD_DDEV(card));
aa909224
UB		 5037 rc = ccw_device_set_online(CARD_RDEV(card));
5038 if (rc)
5039 goto retriable;
5040 rc = ccw_device_set_online(CARD_WDEV(card));
5041 if (rc)
5042 goto retriable;
5043 rc = ccw_device_set_online(CARD_DDEV(card));
5044 if (rc)
5045 goto retriable;
aa909224 5046retriable:
4a71df50 5047 if (rc == -ERESTARTSYS) {
d11ba0c4 5048 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5049 return rc;
5050 } else if (rc) {
d11ba0c4 5051 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5052 if (--retries < 0)
4a71df50
FB		 5053 goto out;
5054 else
5055 goto retry;
5056 }
d0ff1f52 5057 qeth_determine_capabilities(card);
4a71df50
FB		 5058 qeth_init_tokens(card);
5059 qeth_init_func_level(card);
5060 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5061 if (rc == -ERESTARTSYS) {
d11ba0c4 5062 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5063 return rc;
5064 } else if (rc) {
d11ba0c4 5065 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5066 if (--retries < 0)
5067 goto out;
5068 else
5069 goto retry;
5070 }
5071 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5072 if (rc == -ERESTARTSYS) {
d11ba0c4 5073 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5074 return rc;
5075 } else if (rc) {
d11ba0c4 5076 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5077 if (--retries < 0)
5078 goto out;
5079 else
5080 goto retry;
5081 }
908abbb5 5082 card->read_or_write_problem = 0;
4a71df50
FB		 5083 rc = qeth_mpc_initialize(card);
5084 if (rc) {
d11ba0c4 5085 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5086 goto out;
5087 }
1da74b1c 5088
10340510
JW		 5089 rc = qeth_send_startlan(card);
5090 if (rc) {
5091 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5092 if (rc == IPA_RC_LAN_OFFLINE) {
5093 dev_warn(&card->gdev->dev,
5094 "The LAN is offline\n");
5095 card->lan_online = 0;
5096 } else {
5097 rc = -ENODEV;
5098 goto out;
5099 }
5100 } else
5101 card->lan_online = 1;
5102
1da74b1c 5103 card->options.ipa4.supported_funcs = 0;
4d7def2a 5104 card->options.ipa6.supported_funcs = 0;
1da74b1c 5105 card->options.adp.supported_funcs = 0;
b4d72c08 5106 card->options.sbp.supported_funcs = 0;
1da74b1c 5107 card->info.diagass_support = 0;
1aec42bc
TR		 5108 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5109 if (rc == -ENOMEM)
5110 goto out;
5111 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5112 rc = qeth_query_setadapterparms(card);
5113 if (rc < 0) {
10340510 5114 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5115 goto out;
5116 }
5117 }
5118 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5119 rc = qeth_query_setdiagass(card);
5120 if (rc < 0) {
10340510 5121 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5122 goto out;
5123 }
5124 }
4a71df50
FB		 5125 return 0;
5126out:
74eacdb9
FB		 5127 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5128 "an error on the device\n");
5129 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5130 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5131 return rc;
5132}
5133EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5134
b3332930
FB		 5135static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5136 struct qdio_buffer_element *element,
4a71df50
FB		 5137 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5138{
5139 struct page *page = virt_to_page(element->addr);
5140 if (*pskb == NULL) {
b3332930
FB		 5141 if (qethbuffer->rx_skb) {
5142 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5143 *pskb = qethbuffer->rx_skb;
5144 qethbuffer->rx_skb = NULL;
5145 } else {
5146 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5147 if (!(*pskb))
5148 return -ENOMEM;
5149 }
5150
4a71df50 5151 skb_reserve(*pskb, ETH_HLEN);
b3332930 5152 if (data_len <= QETH_RX_PULL_LEN) {
59ae1d12 5153 skb_put_data(*pskb, element->addr + offset, data_len);
4a71df50
FB		 5154 } else {
5155 get_page(page);
59ae1d12
JB		 5156 skb_put_data(*pskb, element->addr + offset,
5157 QETH_RX_PULL_LEN);
b3332930
FB		 5158 skb_fill_page_desc(*pskb, *pfrag, page,
5159 offset + QETH_RX_PULL_LEN,
5160 data_len - QETH_RX_PULL_LEN);
5161 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5162 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5163 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5164 (*pfrag)++;
5165 }
5166 } else {
5167 get_page(page);
5168 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5169 (*pskb)->data_len += data_len;
5170 (*pskb)->len += data_len;
5171 (*pskb)->truesize += data_len;
5172 (*pfrag)++;
5173 }
0da9581d
EL		 5174
5175
4a71df50
FB		 5176 return 0;
5177}
5178
bca51650
TR		 5179static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5180{
5181 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5182}
5183
4a71df50 5184struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5185 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5186 struct qdio_buffer_element **__element, int *__offset,
5187 struct qeth_hdr **hdr)
5188{
5189 struct qdio_buffer_element *element = *__element;
b3332930 5190 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5191 int offset = *__offset;
5192 struct sk_buff *skb = NULL;
76b11f8e 5193 int skb_len = 0;
4a71df50
FB		 5194 void *data_ptr;
5195 int data_len;
5196 int headroom = 0;
5197 int use_rx_sg = 0;
5198 int frag = 0;
5199
4a71df50
FB		 5200 /* qeth_hdr must not cross element boundaries */
5201 if (element->length < offset + sizeof(struct qeth_hdr)) {
5202 if (qeth_is_last_sbale(element))
5203 return NULL;
5204 element++;
5205 offset = 0;
5206 if (element->length < sizeof(struct qeth_hdr))
5207 return NULL;
5208 }
5209 *hdr = element->addr + offset;
5210
5211 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5212 switch ((*hdr)->hdr.l2.id) {
5213 case QETH_HEADER_TYPE_LAYER2:
5214 skb_len = (*hdr)->hdr.l2.pkt_length;
5215 break;
5216 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5217 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5218 headroom = ETH_HLEN;
76b11f8e
UB		 5219 break;
5220 case QETH_HEADER_TYPE_OSN:
5221 skb_len = (*hdr)->hdr.osn.pdu_length;
5222 headroom = sizeof(struct qeth_hdr);
5223 break;
5224 default:
5225 break;
4a71df50
FB		 5226 }
5227
5228 if (!skb_len)
5229 return NULL;
5230
b3332930
FB		 5231 if (((skb_len >= card->options.rx_sg_cb) &&
5232 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5233 (!atomic_read(&card->force_alloc_skb))) ||
5234 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5235 use_rx_sg = 1;
5236 } else {
5237 skb = dev_alloc_skb(skb_len + headroom);
5238 if (!skb)
5239 goto no_mem;
5240 if (headroom)
5241 skb_reserve(skb, headroom);
5242 }
5243
5244 data_ptr = element->addr + offset;
5245 while (skb_len) {
5246 data_len = min(skb_len, (int)(element->length - offset));
5247 if (data_len) {
5248 if (use_rx_sg) {
b3332930
FB		 5249 if (qeth_create_skb_frag(qethbuffer, element,
5250 &skb, offset, &frag, data_len))
4a71df50
FB		 5251 goto no_mem;
5252 } else {
59ae1d12 5253 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5254 }
5255 }
5256 skb_len -= data_len;
5257 if (skb_len) {
5258 if (qeth_is_last_sbale(element)) {
847a50fd 5259 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5260 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5261 dev_kfree_skb_any(skb);
5262 card->stats.rx_errors++;
5263 return NULL;
5264 }
5265 element++;
5266 offset = 0;
5267 data_ptr = element->addr;
5268 } else {
5269 offset += data_len;
5270 }
5271 }
5272 *__element = element;
5273 *__offset = offset;
5274 if (use_rx_sg && card->options.performance_stats) {
5275 card->perf_stats.sg_skbs_rx++;
5276 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5277 }
5278 return skb;
5279no_mem:
5280 if (net_ratelimit()) {
847a50fd 5281 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5282 }
5283 card->stats.rx_dropped++;
5284 return NULL;
5285}
5286EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5287
d73ef324
JW		 5288int qeth_poll(struct napi_struct *napi, int budget)
5289{
5290 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5291 int work_done = 0;
5292 struct qeth_qdio_buffer *buffer;
5293 int done;
5294 int new_budget = budget;
5295
5296 if (card->options.performance_stats) {
5297 card->perf_stats.inbound_cnt++;
5298 card->perf_stats.inbound_start_time = qeth_get_micros();
5299 }
5300
5301 while (1) {
5302 if (!card->rx.b_count) {
5303 card->rx.qdio_err = 0;
5304 card->rx.b_count = qdio_get_next_buffers(
5305 card->data.ccwdev, 0, &card->rx.b_index,
5306 &card->rx.qdio_err);
5307 if (card->rx.b_count <= 0) {
5308 card->rx.b_count = 0;
5309 break;
5310 }
5311 card->rx.b_element =
5312 &card->qdio.in_q->bufs[card->rx.b_index]
5313 .buffer->element[0];
5314 card->rx.e_offset = 0;
5315 }
5316
5317 while (card->rx.b_count) {
5318 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5319 if (!(card->rx.qdio_err &&
5320 qeth_check_qdio_errors(card, buffer->buffer,
5321 card->rx.qdio_err, "qinerr")))
5322 work_done +=
5323 card->discipline->process_rx_buffer(
5324 card, new_budget, &done);
5325 else
5326 done = 1;
5327
5328 if (done) {
5329 if (card->options.performance_stats)
5330 card->perf_stats.bufs_rec++;
5331 qeth_put_buffer_pool_entry(card,
5332 buffer->pool_entry);
5333 qeth_queue_input_buffer(card, card->rx.b_index);
5334 card->rx.b_count--;
5335 if (card->rx.b_count) {
5336 card->rx.b_index =
5337 (card->rx.b_index + 1) %
5338 QDIO_MAX_BUFFERS_PER_Q;
5339 card->rx.b_element =
5340 &card->qdio.in_q
5341 ->bufs[card->rx.b_index]
5342 .buffer->element[0];
5343 card->rx.e_offset = 0;
5344 }
5345 }
5346
5347 if (work_done >= budget)
5348 goto out;
5349 else
5350 new_budget = budget - work_done;
5351 }
5352 }
5353
5354 napi_complete(napi);
5355 if (qdio_start_irq(card->data.ccwdev, 0))
5356 napi_schedule(&card->napi);
5357out:
5358 if (card->options.performance_stats)
5359 card->perf_stats.inbound_time += qeth_get_micros() -
5360 card->perf_stats.inbound_start_time;
5361 return work_done;
5362}
5363EXPORT_SYMBOL_GPL(qeth_poll);
5364
8f43fb00
TR		 5365int qeth_setassparms_cb(struct qeth_card *card,
5366 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5367{
5368 struct qeth_ipa_cmd *cmd;
5369
5370 QETH_CARD_TEXT(card, 4, "defadpcb");
5371
5372 cmd = (struct qeth_ipa_cmd *) data;
5373 if (cmd->hdr.return_code == 0) {
5374 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5375 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5376 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5377 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5378 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5379 }
4d7def2a
TR		 5380 return 0;
5381}
8f43fb00 5382EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5383
b475e316
TR		 5384struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5385 enum qeth_ipa_funcs ipa_func,
5386 __u16 cmd_code, __u16 len,
5387 enum qeth_prot_versions prot)
4d7def2a
TR		 5388{
5389 struct qeth_cmd_buffer *iob;
5390 struct qeth_ipa_cmd *cmd;
5391
5392 QETH_CARD_TEXT(card, 4, "getasscm");
5393 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5394
5395 if (iob) {
5396 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5397 cmd->data.setassparms.hdr.assist_no = ipa_func;
5398 cmd->data.setassparms.hdr.length = 8 + len;
5399 cmd->data.setassparms.hdr.command_code = cmd_code;
5400 cmd->data.setassparms.hdr.return_code = 0;
5401 cmd->data.setassparms.hdr.seq_no = 0;
5402 }
5403
5404 return iob;
5405}
b475e316 5406EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5407
5408int qeth_send_setassparms(struct qeth_card *card,
5409 struct qeth_cmd_buffer *iob, __u16 len, long data,
5410 int (*reply_cb)(struct qeth_card *,
5411 struct qeth_reply *, unsigned long),
5412 void *reply_param)
5413{
5414 int rc;
5415 struct qeth_ipa_cmd *cmd;
5416
5417 QETH_CARD_TEXT(card, 4, "sendassp");
5418
5419 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5420 if (len <= sizeof(__u32))
5421 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5422 else /* (len > sizeof(__u32)) */
5423 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5424
5425 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5426 return rc;
5427}
5428EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5429
5430int qeth_send_simple_setassparms(struct qeth_card *card,
5431 enum qeth_ipa_funcs ipa_func,
5432 __u16 cmd_code, long data)
5433{
5434 int rc;
5435 int length = 0;
5436 struct qeth_cmd_buffer *iob;
5437
5438 QETH_CARD_TEXT(card, 4, "simassp4");
5439 if (data)
5440 length = sizeof(__u32);
5441 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5442 length, QETH_PROT_IPV4);
5443 if (!iob)
5444 return -ENOMEM;
5445 rc = qeth_send_setassparms(card, iob, length, data,
5446 qeth_setassparms_cb, NULL);
5447 return rc;
5448}
5449EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5450
4a71df50
FB		 5451static void qeth_unregister_dbf_views(void)
5452{
d11ba0c4
PT		 5453 int x;
5454 for (x = 0; x < QETH_DBF_INFOS; x++) {
5455 debug_unregister(qeth_dbf[x].id);
5456 qeth_dbf[x].id = NULL;
5457 }
4a71df50
FB		 5458}
5459
8e96c51c 5460void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5461{
5462 char dbf_txt_buf[32];
345aa66e 5463 va_list args;
cd023216 5464
8e6a8285 5465 if (!debug_level_enabled(id, level))
cd023216 5466 return;
345aa66e
PT		 5467 va_start(args, fmt);
5468 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5469 va_end(args);
8e96c51c 5470 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5471}
5472EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5473
4a71df50
FB		 5474static int qeth_register_dbf_views(void)
5475{
d11ba0c4
PT		 5476 int ret;
5477 int x;
5478
5479 for (x = 0; x < QETH_DBF_INFOS; x++) {
5480 /* register the areas */
5481 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5482 qeth_dbf[x].pages,
5483 qeth_dbf[x].areas,
5484 qeth_dbf[x].len);
5485 if (qeth_dbf[x].id == NULL) {
5486 qeth_unregister_dbf_views();
5487 return -ENOMEM;
5488 }
4a71df50 5489
d11ba0c4
PT		 5490 /* register a view */
5491 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5492 if (ret) {
5493 qeth_unregister_dbf_views();
5494 return ret;
5495 }
4a71df50 5496
d11ba0c4
PT		 5497 /* set a passing level */
5498 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5499 }
4a71df50
FB		 5500
5501 return 0;
5502}
5503
5504int qeth_core_load_discipline(struct qeth_card *card,
5505 enum qeth_discipline_id discipline)
5506{
5507 int rc = 0;
c70eb09d 5508
2022e00c 5509 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5510 switch (discipline) {
5511 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5512 card->discipline = try_then_request_module(
5513 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5514 break;
5515 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5516 card->discipline = try_then_request_module(
5517 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5518 break;
c70eb09d
JW		 5519 default:
5520 break;
4a71df50 5521 }
c70eb09d 5522
c041f2d4 5523 if (!card->discipline) {
74eacdb9
FB		 5524 dev_err(&card->gdev->dev, "There is no kernel module to "
5525 "support discipline %d\n", discipline);
4a71df50
FB		 5526 rc = -EINVAL;
5527 }
2022e00c 5528 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5529 return rc;
5530}
5531
5532void qeth_core_free_discipline(struct qeth_card *card)
5533{
5534 if (card->options.layer2)
c041f2d4 5535 symbol_put(qeth_l2_discipline);
4a71df50 5536 else
c041f2d4
SO		 5537 symbol_put(qeth_l3_discipline);
5538 card->discipline = NULL;
4a71df50
FB		 5539}
5540
2d2ebb3e 5541const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5542 .name = "qeth_generic",
5543 .groups = qeth_generic_attr_groups,
5544};
2d2ebb3e
JW		 5545EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5546
b7169c51
SO		 5547static const struct device_type qeth_osn_devtype = {
5548 .name = "qeth_osn",
5549 .groups = qeth_osn_attr_groups,
5550};
5551
819dc537
SR		 5552#define DBF_NAME_LEN 20
5553
5554struct qeth_dbf_entry {
5555 char dbf_name[DBF_NAME_LEN];
5556 debug_info_t *dbf_info;
5557 struct list_head dbf_list;
5558};
5559
5560static LIST_HEAD(qeth_dbf_list);
5561static DEFINE_MUTEX(qeth_dbf_list_mutex);
5562
5563static debug_info_t *qeth_get_dbf_entry(char *name)
5564{
5565 struct qeth_dbf_entry *entry;
5566 debug_info_t *rc = NULL;
5567
5568 mutex_lock(&qeth_dbf_list_mutex);
5569 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5570 if (strcmp(entry->dbf_name, name) == 0) {
5571 rc = entry->dbf_info;
5572 break;
5573 }
5574 }
5575 mutex_unlock(&qeth_dbf_list_mutex);
5576 return rc;
5577}
5578
5579static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5580{
5581 struct qeth_dbf_entry *new_entry;
5582
5583 card->debug = debug_register(name, 2, 1, 8);
5584 if (!card->debug) {
5585 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5586 goto err;
5587 }
5588 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5589 goto err_dbg;
5590 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5591 if (!new_entry)
5592 goto err_dbg;
5593 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5594 new_entry->dbf_info = card->debug;
5595 mutex_lock(&qeth_dbf_list_mutex);
5596 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5597 mutex_unlock(&qeth_dbf_list_mutex);
5598
5599 return 0;
5600
5601err_dbg:
5602 debug_unregister(card->debug);
5603err:
5604 return -ENOMEM;
5605}
5606
5607static void qeth_clear_dbf_list(void)
5608{
5609 struct qeth_dbf_entry *entry, *tmp;
5610
5611 mutex_lock(&qeth_dbf_list_mutex);
5612 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5613 list_del(&entry->dbf_list);
5614 debug_unregister(entry->dbf_info);
5615 kfree(entry);
5616 }
5617 mutex_unlock(&qeth_dbf_list_mutex);
5618}
5619
4a71df50
FB		 5620static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5621{
5622 struct qeth_card *card;
5623 struct device *dev;
5624 int rc;
c70eb09d 5625 enum qeth_discipline_id enforced_disc;
4a71df50 5626 unsigned long flags;
819dc537 5627 char dbf_name[DBF_NAME_LEN];
4a71df50 5628
d11ba0c4 5629 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5630
5631 dev = &gdev->dev;
5632 if (!get_device(dev))
5633 return -ENODEV;
5634
2a0217d5 5635 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5636
5637 card = qeth_alloc_card();
5638 if (!card) {
d11ba0c4 5639 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5640 rc = -ENOMEM;
5641 goto err_dev;
5642 }
af039068
CO		 5643
5644 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5645 dev_name(&gdev->dev));
819dc537 5646 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5647 if (!card->debug) {
819dc537
SR		 5648 rc = qeth_add_dbf_entry(card, dbf_name);
5649 if (rc)
5650 goto err_card;
af039068 5651 }
af039068 5652
4a71df50
FB		 5653 card->read.ccwdev = gdev->cdev[0];
5654 card->write.ccwdev = gdev->cdev[1];
5655 card->data.ccwdev = gdev->cdev[2];
5656 dev_set_drvdata(&gdev->dev, card);
5657 card->gdev = gdev;
5658 gdev->cdev[0]->handler = qeth_irq;
5659 gdev->cdev[1]->handler = qeth_irq;
5660 gdev->cdev[2]->handler = qeth_irq;
5661
5662 rc = qeth_determine_card_type(card);
5663 if (rc) {
d11ba0c4 5664 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5665 goto err_card;
4a71df50
FB		 5666 }
5667 rc = qeth_setup_card(card);
5668 if (rc) {
d11ba0c4 5669 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5670 goto err_card;
4a71df50
FB		 5671 }
5672
c70eb09d
JW		 5673 qeth_determine_capabilities(card);
5674 enforced_disc = qeth_enforce_discipline(card);
5675 switch (enforced_disc) {
5676 case QETH_DISCIPLINE_UNDETERMINED:
5677 gdev->dev.type = &qeth_generic_devtype;
5678 break;
5679 default:
5680 card->info.layer_enforced = true;
5681 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5682 if (rc)
819dc537 5683 goto err_card;
2d2ebb3e
JW		 5684
5685 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5686 ? card->discipline->devtype
5687 : &qeth_osn_devtype;
c041f2d4 5688 rc = card->discipline->setup(card->gdev);
4a71df50 5689 if (rc)
5113fec0 5690 goto err_disc;
2d2ebb3e 5691 break;
4a71df50
FB		 5692 }
5693
5694 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5695 list_add_tail(&card->list, &qeth_core_card_list.list);
5696 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5697 return 0;
5698
5113fec0
UB		 5699err_disc:
5700 qeth_core_free_discipline(card);
4a71df50
FB		 5701err_card:
5702 qeth_core_free_card(card);
5703err_dev:
5704 put_device(dev);
5705 return rc;
5706}
5707
5708static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5709{
5710 unsigned long flags;
5711 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5712
28a7e4c9 5713 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5714
c041f2d4
SO		 5715 if (card->discipline) {
5716 card->discipline->remove(gdev);
9dc48ccc
UB		 5717 qeth_core_free_discipline(card);
5718 }
5719
4a71df50
FB		 5720 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5721 list_del(&card->list);
5722 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5723 qeth_core_free_card(card);
5724 dev_set_drvdata(&gdev->dev, NULL);
5725 put_device(&gdev->dev);
5726 return;
5727}
5728
5729static int qeth_core_set_online(struct ccwgroup_device *gdev)
5730{
5731 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5732 int rc = 0;
c70eb09d 5733 enum qeth_discipline_id def_discipline;
4a71df50 5734
c041f2d4 5735 if (!card->discipline) {
4a71df50
FB		 5736 if (card->info.type == QETH_CARD_TYPE_IQD)
5737 def_discipline = QETH_DISCIPLINE_LAYER3;
5738 else
5739 def_discipline = QETH_DISCIPLINE_LAYER2;
5740 rc = qeth_core_load_discipline(card, def_discipline);
5741 if (rc)
5742 goto err;
c041f2d4 5743 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5744 if (rc) {
5745 qeth_core_free_discipline(card);
4a71df50 5746 goto err;
9111e788 5747 }
4a71df50 5748 }
c041f2d4 5749 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5750err:
5751 return rc;
5752}
5753
5754static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5755{
5756 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5757 return card->discipline->set_offline(gdev);
4a71df50
FB		 5758}
5759
5760static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5761{
5762 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5763 qeth_set_allowed_threads(card, 0, 1);
5764 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5765 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5766 qeth_qdio_clear_card(card, 0);
5767 qeth_clear_qdio_buffers(card);
5768 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5769}
5770
bbcfcdc8
FB		 5771static int qeth_core_freeze(struct ccwgroup_device *gdev)
5772{
5773 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5774 if (card->discipline && card->discipline->freeze)
5775 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5776 return 0;
5777}
5778
5779static int qeth_core_thaw(struct ccwgroup_device *gdev)
5780{
5781 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5782 if (card->discipline && card->discipline->thaw)
5783 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5784 return 0;
5785}
5786
5787static int qeth_core_restore(struct ccwgroup_device *gdev)
5788{
5789 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5790 if (card->discipline && card->discipline->restore)
5791 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5792 return 0;
5793}
5794
4a71df50 5795static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5796 .driver = {
5797 .owner = THIS_MODULE,
5798 .name = "qeth",
5799 },
b7169c51 5800 .setup = qeth_core_probe_device,
4a71df50
FB		 5801 .remove = qeth_core_remove_device,
5802 .set_online = qeth_core_set_online,
5803 .set_offline = qeth_core_set_offline,
5804 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5805 .prepare = NULL,
5806 .complete = NULL,
bbcfcdc8
FB		 5807 .freeze = qeth_core_freeze,
5808 .thaw = qeth_core_thaw,
5809 .restore = qeth_core_restore,
4a71df50
FB		 5810};
5811
b7169c51
SO		 5812static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5813 const char *buf, size_t count)
4a71df50
FB		 5814{
5815 int err;
4a71df50 5816
b7169c51 5817 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5818 &qeth_core_ccwgroup_driver, 3, buf);
5819
5820 return err ? err : count;
5821}
4a71df50
FB		 5822static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5823
f47e2256
SO		 5824static struct attribute *qeth_drv_attrs[] = {
5825 &driver_attr_group.attr,
5826 NULL,
5827};
5828static struct attribute_group qeth_drv_attr_group = {
5829 .attrs = qeth_drv_attrs,
5830};
5831static const struct attribute_group *qeth_drv_attr_groups[] = {
5832 &qeth_drv_attr_group,
5833 NULL,
5834};
5835
942d6984
JW		 5836int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5837{
5838 struct qeth_card *card = dev->ml_priv;
5839 struct mii_ioctl_data *mii_data;
5840 int rc = 0;
5841
5842 if (!card)
5843 return -ENODEV;
5844
5845 if (!qeth_card_hw_is_reachable(card))
5846 return -ENODEV;
5847
5848 if (card->info.type == QETH_CARD_TYPE_OSN)
5849 return -EPERM;
5850
5851 switch (cmd) {
5852 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5853 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5854 break;
5855 case SIOC_QETH_GET_CARD_TYPE:
5856 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5857 card->info.type == QETH_CARD_TYPE_OSM ||
5858 card->info.type == QETH_CARD_TYPE_OSX) &&
5859 !card->info.guestlan)
5860 return 1;
5861 else
5862 return 0;
5863 case SIOCGMIIPHY:
5864 mii_data = if_mii(rq);
5865 mii_data->phy_id = 0;
5866 break;
5867 case SIOCGMIIREG:
5868 mii_data = if_mii(rq);
5869 if (mii_data->phy_id != 0)
5870 rc = -EINVAL;
5871 else
5872 mii_data->val_out = qeth_mdio_read(dev,
5873 mii_data->phy_id, mii_data->reg_num);
5874 break;
5875 case SIOC_QETH_QUERY_OAT:
5876 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5877 break;
5878 default:
5879 if (card->discipline->do_ioctl)
5880 rc = card->discipline->do_ioctl(dev, rq, cmd);
5881 else
5882 rc = -EOPNOTSUPP;
5883 }
5884 if (rc)
5885 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5886 return rc;
5887}
5888EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5889
4a71df50
FB		 5890static struct {
5891 const char str[ETH_GSTRING_LEN];
5892} qeth_ethtool_stats_keys[] = {
5893/* 0 */{"rx skbs"},
5894 {"rx buffers"},
5895 {"tx skbs"},
5896 {"tx buffers"},
5897 {"tx skbs no packing"},
5898 {"tx buffers no packing"},
5899 {"tx skbs packing"},
5900 {"tx buffers packing"},
5901 {"tx sg skbs"},
5902 {"tx sg frags"},
5903/* 10 */{"rx sg skbs"},
5904 {"rx sg frags"},
5905 {"rx sg page allocs"},
5906 {"tx large kbytes"},
5907 {"tx large count"},
5908 {"tx pk state ch n->p"},
5909 {"tx pk state ch p->n"},
5910 {"tx pk watermark low"},
5911 {"tx pk watermark high"},
5912 {"queue 0 buffer usage"},
5913/* 20 */{"queue 1 buffer usage"},
5914 {"queue 2 buffer usage"},
5915 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5916 {"rx poll time"},
5917 {"rx poll count"},
4a71df50
FB		 5918 {"rx do_QDIO time"},
5919 {"rx do_QDIO count"},
5920 {"tx handler time"},
5921 {"tx handler count"},
5922 {"tx time"},
5923/* 30 */{"tx count"},
5924 {"tx do_QDIO time"},
5925 {"tx do_QDIO count"},
f61a0d05 5926 {"tx csum"},
c3b4a740 5927 {"tx lin"},
6059c905 5928 {"tx linfail"},
0da9581d
EL		 5929 {"cq handler count"},
5930 {"cq handler time"}
4a71df50
FB		 5931};
5932
df8b4ec8 5933int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5934{
df8b4ec8
BH		 5935 switch (stringset) {
5936 case ETH_SS_STATS:
5937 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5938 default:
5939 return -EINVAL;
5940 }
4a71df50 5941}
df8b4ec8 5942EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5943
5944void qeth_core_get_ethtool_stats(struct net_device *dev,
5945 struct ethtool_stats *stats, u64 *data)
5946{
509e2562 5947 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5948 data[0] = card->stats.rx_packets -
5949 card->perf_stats.initial_rx_packets;
5950 data[1] = card->perf_stats.bufs_rec;
5951 data[2] = card->stats.tx_packets -
5952 card->perf_stats.initial_tx_packets;
5953 data[3] = card->perf_stats.bufs_sent;
5954 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5955 - card->perf_stats.skbs_sent_pack;
5956 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5957 data[6] = card->perf_stats.skbs_sent_pack;
5958 data[7] = card->perf_stats.bufs_sent_pack;
5959 data[8] = card->perf_stats.sg_skbs_sent;
5960 data[9] = card->perf_stats.sg_frags_sent;
5961 data[10] = card->perf_stats.sg_skbs_rx;
5962 data[11] = card->perf_stats.sg_frags_rx;
5963 data[12] = card->perf_stats.sg_alloc_page_rx;
5964 data[13] = (card->perf_stats.large_send_bytes >> 10);
5965 data[14] = card->perf_stats.large_send_cnt;
5966 data[15] = card->perf_stats.sc_dp_p;
5967 data[16] = card->perf_stats.sc_p_dp;
5968 data[17] = QETH_LOW_WATERMARK_PACK;
5969 data[18] = QETH_HIGH_WATERMARK_PACK;
5970 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5971 data[20] = (card->qdio.no_out_queues > 1) ?
5972 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5973 data[21] = (card->qdio.no_out_queues > 2) ?
5974 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5975 data[22] = (card->qdio.no_out_queues > 3) ?
5976 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5977 data[23] = card->perf_stats.inbound_time;
5978 data[24] = card->perf_stats.inbound_cnt;
5979 data[25] = card->perf_stats.inbound_do_qdio_time;
5980 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5981 data[27] = card->perf_stats.outbound_handler_time;
5982 data[28] = card->perf_stats.outbound_handler_cnt;
5983 data[29] = card->perf_stats.outbound_time;
5984 data[30] = card->perf_stats.outbound_cnt;
5985 data[31] = card->perf_stats.outbound_do_qdio_time;
5986 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5987 data[33] = card->perf_stats.tx_csum;
c3b4a740 5988 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 5989 data[35] = card->perf_stats.tx_linfail;
5990 data[36] = card->perf_stats.cq_cnt;
5991 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 5992}
5993EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5994
5995void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5996{
5997 switch (stringset) {
5998 case ETH_SS_STATS:
5999 memcpy(data, &qeth_ethtool_stats_keys,
6000 sizeof(qeth_ethtool_stats_keys));
6001 break;
6002 default:
6003 WARN_ON(1);
6004 break;
6005 }
6006}
6007EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6008
6009void qeth_core_get_drvinfo(struct net_device *dev,
6010 struct ethtool_drvinfo *info)
6011{
509e2562 6012 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6013
6014 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6015 sizeof(info->driver));
6016 strlcpy(info->version, "1.0", sizeof(info->version));
6017 strlcpy(info->fw_version, card->info.mcl_level,
6018 sizeof(info->fw_version));
6019 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6020 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6021}
6022EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6023
774afb8e
JW		 6024/* Helper function to fill 'advertising' and 'supported' which are the same. */
6025/* Autoneg and full-duplex are supported and advertised unconditionally. */
6026/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6027/* specified port type. */
993e19c0 6028static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6029 int maxspeed, int porttype)
6030{
41fc3b65
JW		 6031 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6032 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6033 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6034
41fc3b65
JW		 6035 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6036 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6037
6038 switch (porttype) {
6039 case PORT_TP:
41fc3b65
JW		 6040 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6041 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6042 break;
6043 case PORT_FIBRE:
41fc3b65
JW		 6044 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6045 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6046 break;
6047 default:
41fc3b65
JW		 6048 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6049 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6050 WARN_ON_ONCE(1);
6051 }
6052
774afb8e 6053 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6054 switch (maxspeed) {
6055 case SPEED_10000:
41fc3b65
JW		 6056 ethtool_link_ksettings_add_link_mode(cmd, supported,
6057 10000baseT_Full);
6058 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6059 10000baseT_Full);
02d5cb5b 6060 case SPEED_1000:
41fc3b65
JW		 6061 ethtool_link_ksettings_add_link_mode(cmd, supported,
6062 1000baseT_Full);
6063 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6064 1000baseT_Full);
6065 ethtool_link_ksettings_add_link_mode(cmd, supported,
6066 1000baseT_Half);
6067 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6068 1000baseT_Half);
02d5cb5b 6069 case SPEED_100:
41fc3b65
JW		 6070 ethtool_link_ksettings_add_link_mode(cmd, supported,
6071 100baseT_Full);
6072 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6073 100baseT_Full);
6074 ethtool_link_ksettings_add_link_mode(cmd, supported,
6075 100baseT_Half);
6076 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6077 100baseT_Half);
02d5cb5b 6078 case SPEED_10:
41fc3b65
JW		 6079 ethtool_link_ksettings_add_link_mode(cmd, supported,
6080 10baseT_Full);
6081 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6082 10baseT_Full);
6083 ethtool_link_ksettings_add_link_mode(cmd, supported,
6084 10baseT_Half);
6085 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6086 10baseT_Half);
774afb8e
JW		 6087 /* end fallthrough */
6088 break;
02d5cb5b 6089 default:
41fc3b65
JW		 6090 ethtool_link_ksettings_add_link_mode(cmd, supported,
6091 10baseT_Full);
6092 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6093 10baseT_Full);
6094 ethtool_link_ksettings_add_link_mode(cmd, supported,
6095 10baseT_Half);
6096 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6097 10baseT_Half);
02d5cb5b
EC		 6098 WARN_ON_ONCE(1);
6099 }
02d5cb5b
EC		 6100}
6101
993e19c0
JW		 6102int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6103 struct ethtool_link_ksettings *cmd)
3f9975aa 6104{
509e2562 6105 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6106 enum qeth_link_types link_type;
02d5cb5b 6107 struct carrier_info carrier_info;
511c2445 6108 int rc;
3f9975aa
FB		 6109
6110 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6111 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6112 else
6113 link_type = card->info.link_type;
6114
993e19c0
JW		 6115 cmd->base.duplex = DUPLEX_FULL;
6116 cmd->base.autoneg = AUTONEG_ENABLE;
6117 cmd->base.phy_address = 0;
6118 cmd->base.mdio_support = 0;
6119 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6120 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6121
6122 switch (link_type) {
6123 case QETH_LINK_TYPE_FAST_ETH:
6124 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6125 cmd->base.speed = SPEED_100;
6126 cmd->base.port = PORT_TP;
3f9975aa 6127 break;
3f9975aa
FB		 6128 case QETH_LINK_TYPE_GBIT_ETH:
6129 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6130 cmd->base.speed = SPEED_1000;
6131 cmd->base.port = PORT_FIBRE;
3f9975aa 6132 break;
3f9975aa 6133 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6134 cmd->base.speed = SPEED_10000;
6135 cmd->base.port = PORT_FIBRE;
3f9975aa 6136 break;
3f9975aa 6137 default:
993e19c0
JW		 6138 cmd->base.speed = SPEED_10;
6139 cmd->base.port = PORT_TP;
3f9975aa 6140 }
993e19c0 6141 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6142
02d5cb5b
EC		 6143 /* Check if we can obtain more accurate information. */
6144 /* If QUERY_CARD_INFO command is not supported or fails, */
6145 /* just return the heuristics that was filled above. */
511c2445
EC		 6146 if (!qeth_card_hw_is_reachable(card))
6147 return -ENODEV;
6148 rc = qeth_query_card_info(card, &carrier_info);
6149 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6150 return 0;
511c2445
EC		 6151 if (rc) /* report error from the hardware operation */
6152 return rc;
6153 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6154
6155 netdev_dbg(netdev,
6156 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6157 carrier_info.card_type,
6158 carrier_info.port_mode,
6159 carrier_info.port_speed);
6160
6161 /* Update attributes for which we've obtained more authoritative */
6162 /* information, leave the rest the way they where filled above. */
6163 switch (carrier_info.card_type) {
6164 case CARD_INFO_TYPE_1G_COPPER_A:
6165 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6166 cmd->base.port = PORT_TP;
6167 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6168 break;
6169 case CARD_INFO_TYPE_1G_FIBRE_A:
6170 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6171 cmd->base.port = PORT_FIBRE;
6172 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6173 break;
6174 case CARD_INFO_TYPE_10G_FIBRE_A:
6175 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6176 cmd->base.port = PORT_FIBRE;
6177 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6178 break;
6179 }
6180
6181 switch (carrier_info.port_mode) {
6182 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6183 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6184 break;
6185 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6186 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6187 break;
6188 }
6189
6190 switch (carrier_info.port_speed) {
6191 case CARD_INFO_PORTS_10M:
993e19c0 6192 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6193 break;
6194 case CARD_INFO_PORTS_100M:
993e19c0 6195 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6196 break;
6197 case CARD_INFO_PORTS_1G:
993e19c0 6198 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6199 break;
6200 case CARD_INFO_PORTS_10G:
993e19c0 6201 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6202 break;
6203 }
6204
3f9975aa
FB		 6205 return 0;
6206}
993e19c0 6207EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6208
c9475369
TR		 6209/* Callback to handle checksum offload command reply from OSA card.
6210 * Verify that required features have been enabled on the card.
6211 * Return error in hdr->return_code as this value is checked by caller.
6212 *
6213 * Always returns zero to indicate no further messages from the OSA card.
6214 */
6215static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6216 struct qeth_reply *reply,
6217 unsigned long data)
6218{
6219 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6220 struct qeth_checksum_cmd *chksum_cb =
6221 (struct qeth_checksum_cmd *)reply->param;
6222
6223 QETH_CARD_TEXT(card, 4, "chkdoccb");
6224 if (cmd->hdr.return_code)
6225 return 0;
6226
6227 memset(chksum_cb, 0, sizeof(*chksum_cb));
6228 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6229 chksum_cb->supported =
6230 cmd->data.setassparms.data.chksum.supported;
6231 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6232 }
6233 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6234 chksum_cb->supported =
6235 cmd->data.setassparms.data.chksum.supported;
6236 chksum_cb->enabled =
6237 cmd->data.setassparms.data.chksum.enabled;
6238 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6239 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6240 }
6241 return 0;
6242}
6243
6244/* Send command to OSA card and check results. */
6245static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6246 enum qeth_ipa_funcs ipa_func,
6247 __u16 cmd_code, long data,
6248 struct qeth_checksum_cmd *chksum_cb)
6249{
6250 struct qeth_cmd_buffer *iob;
6251 int rc = -ENOMEM;
6252
6253 QETH_CARD_TEXT(card, 4, "chkdocmd");
6254 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6255 sizeof(__u32), QETH_PROT_IPV4);
6256 if (iob)
6257 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6258 qeth_ipa_checksum_run_cmd_cb,
6259 chksum_cb);
6260 return rc;
6261}
6262
8f43fb00 6263static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6264{
f9d8e6dc
TR		 6265 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6266 QETH_IPA_CHECKSUM_UDP |
6267 QETH_IPA_CHECKSUM_TCP;
c9475369 6268 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6269 int rc;
6270
c9475369
TR		 6271 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6272 &chksum_cb);
f9d8e6dc
TR		 6273 if (!rc) {
6274 if ((required_features & chksum_cb.supported) !=
6275 required_features)
6276 rc = -EIO;
dae84c8e
TR		 6277 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6278 cstype == IPA_INBOUND_CHECKSUM)
6279 dev_warn(&card->gdev->dev,
6280 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6281 QETH_CARD_IFNAME(card));
f9d8e6dc 6282 }
4d7def2a 6283 if (rc) {
c9475369 6284 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6285 dev_warn(&card->gdev->dev,
6286 "Starting HW checksumming for %s failed, using SW checksumming\n",
6287 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6288 return rc;
6289 }
c9475369
TR		 6290 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6291 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6292 if (!rc) {
6293 if ((required_features & chksum_cb.enabled) !=
6294 required_features)
6295 rc = -EIO;
6296 }
4d7def2a 6297 if (rc) {
c9475369 6298 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6299 dev_warn(&card->gdev->dev,
6300 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6301 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6302 return rc;
6303 }
8f43fb00
TR		 6304
6305 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6306 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6307 return 0;
6308}
6309
8f43fb00 6310static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6311{
c9475369
TR		 6312 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6313 : qeth_send_simple_setassparms(card, cstype,
6314 IPA_CMD_ASS_STOP, 0);
6315 return rc ? -EIO : 0;
4d7def2a 6316}
4d7def2a 6317
8f43fb00 6318static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6319{
8f43fb00 6320 int rc;
4d7def2a 6321
8f43fb00 6322 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6323
8f43fb00
TR		 6324 if (on) {
6325 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6326 IPA_CMD_ASS_START, 0);
6327 if (rc) {
6328 dev_warn(&card->gdev->dev,
6329 "Starting outbound TCP segmentation offload for %s failed\n",
6330 QETH_CARD_IFNAME(card));
6331 return -EIO;
6332 }
6333 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6334 } else {
6335 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6336 IPA_CMD_ASS_STOP, 0);
6337 }
4d7def2a
TR		 6338 return rc;
6339}
8f43fb00 6340
e830baa9
HW		 6341/* try to restore device features on a device after recovery */
6342int qeth_recover_features(struct net_device *dev)
6343{
6344 struct qeth_card *card = dev->ml_priv;
6345 netdev_features_t recover = dev->features;
6346
6347 if (recover & NETIF_F_IP_CSUM) {
6348 if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
6349 recover ^= NETIF_F_IP_CSUM;
6350 }
6351 if (recover & NETIF_F_RXCSUM) {
6352 if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
6353 recover ^= NETIF_F_RXCSUM;
6354 }
6355 if (recover & NETIF_F_TSO) {
6356 if (qeth_set_ipa_tso(card, 1))
6357 recover ^= NETIF_F_TSO;
6358 }
6359
6360 if (recover == dev->features)
6361 return 0;
6362
6363 dev_warn(&card->gdev->dev,
6364 "Device recovery failed to restore all offload features\n");
6365 dev->features = recover;
6366 return -EIO;
6367}
6368EXPORT_SYMBOL_GPL(qeth_recover_features);
6369
8f43fb00
TR		 6370int qeth_set_features(struct net_device *dev, netdev_features_t features)
6371{
6372 struct qeth_card *card = dev->ml_priv;
6c7cd712 6373 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6374 int rc = 0;
6375
6376 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6377 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6378
6c7cd712 6379 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6380 rc = qeth_set_ipa_csum(card,
6381 features & NETIF_F_IP_CSUM ? 1 : 0,
6382 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6383 if (rc)
6384 changed ^= NETIF_F_IP_CSUM;
6385 }
6386 if ((changed & NETIF_F_RXCSUM)) {
6387 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6388 features & NETIF_F_RXCSUM ? 1 : 0,
6389 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6390 if (rc)
6391 changed ^= NETIF_F_RXCSUM;
6392 }
6393 if ((changed & NETIF_F_TSO)) {
6394 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6395 if (rc)
6396 changed ^= NETIF_F_TSO;
6397 }
6398
6399 /* everything changed successfully? */
6400 if ((dev->features ^ features) == changed)
6401 return 0;
6402 /* something went wrong. save changed features and return error */
6403 dev->features ^= changed;
6404 return -EIO;
8f43fb00
TR		 6405}
6406EXPORT_SYMBOL_GPL(qeth_set_features);
6407
6408netdev_features_t qeth_fix_features(struct net_device *dev,
6409 netdev_features_t features)
6410{
6411 struct qeth_card *card = dev->ml_priv;
6412
6413 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6414 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6415 features &= ~NETIF_F_IP_CSUM;
6416 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6417 features &= ~NETIF_F_RXCSUM;
cf536ffe 6418 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6419 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6420 /* if the card isn't up, remove features that require hw changes */
6421 if (card->state == CARD_STATE_DOWN ||
6422 card->state == CARD_STATE_RECOVER)
6423 features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
6424 NETIF_F_TSO);
8f43fb00
TR		 6425 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6426 return features;
6427}
6428EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6429
4a71df50
FB		 6430static int __init qeth_core_init(void)
6431{
6432 int rc;
6433
74eacdb9 6434 pr_info("loading core functions\n");
4a71df50 6435 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6436 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6437 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6438 mutex_init(&qeth_mod_mutex);
4a71df50 6439
0f54761d
SR		 6440 qeth_wq = create_singlethread_workqueue("qeth_wq");
6441
4a71df50
FB		 6442 rc = qeth_register_dbf_views();
6443 if (rc)
6444 goto out_err;
035da16f 6445 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6446 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6447 if (rc)
6448 goto register_err;
683d718a
FB		 6449 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6450 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6451 if (!qeth_core_header_cache) {
6452 rc = -ENOMEM;
6453 goto slab_err;
6454 }
0da9581d
EL		 6455 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6456 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6457 if (!qeth_qdio_outbuf_cache) {
6458 rc = -ENOMEM;
6459 goto cqslab_err;
6460 }
afb6ac59
SO		 6461 rc = ccw_driver_register(&qeth_ccw_driver);
6462 if (rc)
6463 goto ccw_err;
6464 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6465 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6466 if (rc)
6467 goto ccwgroup_err;
0da9581d 6468
683d718a 6469 return 0;
afb6ac59
SO		 6470
6471ccwgroup_err:
6472 ccw_driver_unregister(&qeth_ccw_driver);
6473ccw_err:
6474 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6475cqslab_err:
6476 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6477slab_err:
035da16f 6478 root_device_unregister(qeth_core_root_dev);
4a71df50 6479register_err:
4a71df50
FB		 6480 qeth_unregister_dbf_views();
6481out_err:
74eacdb9 6482 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6483 return rc;
6484}
6485
6486static void __exit qeth_core_exit(void)
6487{
819dc537 6488 qeth_clear_dbf_list();
0f54761d 6489 destroy_workqueue(qeth_wq);
4a71df50
FB		 6490 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6491 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6492 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6493 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6494 root_device_unregister(qeth_core_root_dev);
4a71df50 6495 qeth_unregister_dbf_views();
74eacdb9 6496 pr_info("core functions removed\n");
4a71df50
FB		 6497}
6498
6499module_init(qeth_core_init);
6500module_exit(qeth_core_exit);
6501MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6502MODULE_DESCRIPTION("qeth core functions");
6503MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git