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s390/qeth: add TX multiqueue support for IQD devices
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
0d55303c 13#include <linux/compat.h>
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
55494264 19#include <linux/log2.h>
4a71df50 20#include <linux/ip.h>
4a71df50
FB		 21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
5a0e3ad6 24#include <linux/slab.h>
6d69b1f1
JW		 25#include <linux/if_vlan.h>
26#include <linux/netdevice.h>
27#include <linux/netdev_features.h>
28#include <linux/skbuff.h>
aec45e85 29#include <linux/vmalloc.h>
6d69b1f1 30
b3332930 31#include <net/iucv/af_iucv.h>
290b8348 32#include <net/dsfield.h>
4a71df50 33
ab4227cb 34#include <asm/ebcdic.h>
2bf29df7 35#include <asm/chpid.h>
ab4227cb 36#include <asm/io.h>
1da74b1c 37#include <asm/sysinfo.h>
ec61bd2f
JW		 38#include <asm/diag.h>
39#include <asm/cio.h>
40#include <asm/ccwdev.h>
615dff22 41#include <asm/cpcmd.h>
4a71df50
FB		 42
43#include "qeth_core.h"
4a71df50 44
d11ba0c4
PT		 45struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
46 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
47 /* N P A M L V H */
48 [QETH_DBF_SETUP] = {"qeth_setup",
49 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 50 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
51 &debug_sprintf_view, NULL},
d11ba0c4
PT		 52 [QETH_DBF_CTRL] = {"qeth_control",
53 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
54};
55EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50 56
683d718a
FB		 57struct kmem_cache *qeth_core_header_cache;
58EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 59static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 60
61static struct device *qeth_core_root_dev;
4a71df50 62static struct lock_class_key qdio_out_skb_queue_key;
4a71df50 63
988a747d
JW		 64static void qeth_issue_next_read_cb(struct qeth_card *card,
65 struct qeth_channel *channel,
66 struct qeth_cmd_buffer *iob);
4a71df50 67static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
4a71df50
FB		 68static void qeth_free_buffer_pool(struct qeth_card *);
69static int qeth_qdio_establish(struct qeth_card *);
41c47da3 70static void qeth_free_qdio_queues(struct qeth_card *card);
b3332930
FB		 71static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
72 struct qeth_qdio_out_buffer *buf,
73 enum iucv_tx_notify notification);
74static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
72861ae7 75static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 76
0f54761d
SR		 77static void qeth_close_dev_handler(struct work_struct *work)
78{
79 struct qeth_card *card;
80
81 card = container_of(work, struct qeth_card, close_dev_work);
82 QETH_CARD_TEXT(card, 2, "cldevhdl");
0f54761d
SR		 83 ccwgroup_set_offline(card->gdev);
84}
85
cef6ff22 86static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 87{
88 if (card->info.guestlan) {
89 switch (card->info.type) {
5113fec0 90 case QETH_CARD_TYPE_OSD:
7096b187 91 return " Virtual NIC QDIO";
4a71df50 92 case QETH_CARD_TYPE_IQD:
7096b187 93 return " Virtual NIC Hiper";
5113fec0 94 case QETH_CARD_TYPE_OSM:
7096b187 95 return " Virtual NIC QDIO - OSM";
5113fec0 96 case QETH_CARD_TYPE_OSX:
7096b187 97 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 98 default:
99 return " unknown";
100 }
101 } else {
102 switch (card->info.type) {
5113fec0 103 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 104 return " OSD Express";
105 case QETH_CARD_TYPE_IQD:
106 return " HiperSockets";
107 case QETH_CARD_TYPE_OSN:
108 return " OSN QDIO";
5113fec0
UB		 109 case QETH_CARD_TYPE_OSM:
110 return " OSM QDIO";
111 case QETH_CARD_TYPE_OSX:
112 return " OSX QDIO";
4a71df50
FB		 113 default:
114 return " unknown";
115 }
116 }
117 return " n/a";
118}
119
120/* max length to be returned: 14 */
121const char *qeth_get_cardname_short(struct qeth_card *card)
122{
123 if (card->info.guestlan) {
124 switch (card->info.type) {
5113fec0 125 case QETH_CARD_TYPE_OSD:
7096b187 126 return "Virt.NIC QDIO";
4a71df50 127 case QETH_CARD_TYPE_IQD:
7096b187 128 return "Virt.NIC Hiper";
5113fec0 129 case QETH_CARD_TYPE_OSM:
7096b187 130 return "Virt.NIC OSM";
5113fec0 131 case QETH_CARD_TYPE_OSX:
7096b187 132 return "Virt.NIC OSX";
4a71df50
FB		 133 default:
134 return "unknown";
135 }
136 } else {
137 switch (card->info.type) {
5113fec0 138 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 139 switch (card->info.link_type) {
140 case QETH_LINK_TYPE_FAST_ETH:
141 return "OSD_100";
142 case QETH_LINK_TYPE_HSTR:
143 return "HSTR";
144 case QETH_LINK_TYPE_GBIT_ETH:
145 return "OSD_1000";
146 case QETH_LINK_TYPE_10GBIT_ETH:
147 return "OSD_10GIG";
54e049c2
JW		 148 case QETH_LINK_TYPE_25GBIT_ETH:
149 return "OSD_25GIG";
4a71df50
FB		 150 case QETH_LINK_TYPE_LANE_ETH100:
151 return "OSD_FE_LANE";
152 case QETH_LINK_TYPE_LANE_TR:
153 return "OSD_TR_LANE";
154 case QETH_LINK_TYPE_LANE_ETH1000:
155 return "OSD_GbE_LANE";
156 case QETH_LINK_TYPE_LANE:
157 return "OSD_ATM_LANE";
158 default:
159 return "OSD_Express";
160 }
161 case QETH_CARD_TYPE_IQD:
162 return "HiperSockets";
163 case QETH_CARD_TYPE_OSN:
164 return "OSN";
5113fec0
UB		 165 case QETH_CARD_TYPE_OSM:
166 return "OSM_1000";
167 case QETH_CARD_TYPE_OSX:
168 return "OSX_10GIG";
4a71df50
FB		 169 default:
170 return "unknown";
171 }
172 }
173 return "n/a";
174}
175
176void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
177 int clear_start_mask)
178{
179 unsigned long flags;
180
181 spin_lock_irqsave(&card->thread_mask_lock, flags);
182 card->thread_allowed_mask = threads;
183 if (clear_start_mask)
184 card->thread_start_mask &= threads;
185 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
186 wake_up(&card->wait_q);
187}
188EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
189
190int qeth_threads_running(struct qeth_card *card, unsigned long threads)
191{
192 unsigned long flags;
193 int rc = 0;
194
195 spin_lock_irqsave(&card->thread_mask_lock, flags);
196 rc = (card->thread_running_mask & threads);
197 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
198 return rc;
199}
200EXPORT_SYMBOL_GPL(qeth_threads_running);
201
4a71df50
FB		 202void qeth_clear_working_pool_list(struct qeth_card *card)
203{
204 struct qeth_buffer_pool_entry *pool_entry, *tmp;
205
847a50fd 206 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 207 list_for_each_entry_safe(pool_entry, tmp,
208 &card->qdio.in_buf_pool.entry_list, list){
209 list_del(&pool_entry->list);
210 }
211}
212EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
213
214static int qeth_alloc_buffer_pool(struct qeth_card *card)
215{
216 struct qeth_buffer_pool_entry *pool_entry;
217 void *ptr;
218 int i, j;
219
847a50fd 220 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 221 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 222 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 223 if (!pool_entry) {
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 228 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 229 if (!ptr) {
230 while (j > 0)
231 free_page((unsigned long)
232 pool_entry->elements[--j]);
233 kfree(pool_entry);
234 qeth_free_buffer_pool(card);
235 return -ENOMEM;
236 }
237 pool_entry->elements[j] = ptr;
238 }
239 list_add(&pool_entry->init_list,
240 &card->qdio.init_pool.entry_list);
241 }
242 return 0;
243}
244
245int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
246{
847a50fd 247 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50 248
d7d543f2 249 if (card->state != CARD_STATE_DOWN)
4a71df50
FB		 250 return -EPERM;
251
252 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
253 qeth_clear_working_pool_list(card);
254 qeth_free_buffer_pool(card);
255 card->qdio.in_buf_pool.buf_count = bufcnt;
256 card->qdio.init_pool.buf_count = bufcnt;
257 return qeth_alloc_buffer_pool(card);
258}
76b11f8e 259EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 260
4601ba6c
SO		 261static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
262{
6d284bde
SO		 263 if (!q)
264 return;
265
266 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 267 kfree(q);
268}
269
270static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
271{
272 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
273 int i;
274
275 if (!q)
276 return NULL;
277
6d284bde
SO		 278 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
279 kfree(q);
280 return NULL;
281 }
282
4601ba6c 283 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 284 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 285
286 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
287 return q;
288}
289
cef6ff22 290static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 291{
292 int rc;
293
294 if (card->options.cq == QETH_CQ_ENABLED) {
295 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 296 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
297 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 298 card->qdio.c_q->next_buf_to_init = 127;
299 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
300 card->qdio.no_in_queues - 1, 0,
301 127);
302 if (rc) {
303 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
304 goto out;
305 }
306 }
307 rc = 0;
308out:
309 return rc;
310}
311
cef6ff22 312static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 313{
314 int rc;
315
316 if (card->options.cq == QETH_CQ_ENABLED) {
317 int i;
318 struct qdio_outbuf_state *outbuf_states;
319
320 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 321 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 322 if (!card->qdio.c_q) {
323 rc = -1;
324 goto kmsg_out;
325 }
0da9581d 326 card->qdio.no_in_queues = 2;
4a912f98 327 card->qdio.out_bufstates =
6396bb22
KC		 328 kcalloc(card->qdio.no_out_queues *
329 QDIO_MAX_BUFFERS_PER_Q,
330 sizeof(struct qdio_outbuf_state),
331 GFP_KERNEL);
0da9581d
EL		 332 outbuf_states = card->qdio.out_bufstates;
333 if (outbuf_states == NULL) {
334 rc = -1;
335 goto free_cq_out;
336 }
337 for (i = 0; i < card->qdio.no_out_queues; ++i) {
338 card->qdio.out_qs[i]->bufstates = outbuf_states;
339 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
340 }
341 } else {
342 QETH_DBF_TEXT(SETUP, 2, "nocq");
343 card->qdio.c_q = NULL;
344 card->qdio.no_in_queues = 1;
345 }
346 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
347 rc = 0;
348out:
349 return rc;
350free_cq_out:
4601ba6c 351 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 352 card->qdio.c_q = NULL;
353kmsg_out:
354 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
355 goto out;
356}
357
cef6ff22 358static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 359{
360 if (card->qdio.c_q) {
361 --card->qdio.no_in_queues;
4601ba6c 362 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 363 card->qdio.c_q = NULL;
364 }
365 kfree(card->qdio.out_bufstates);
366 card->qdio.out_bufstates = NULL;
367}
368
cef6ff22
JW		 369static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
370 int delayed)
371{
b3332930
FB		 372 enum iucv_tx_notify n;
373
374 switch (sbalf15) {
375 case 0:
376 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
377 break;
378 case 4:
379 case 16:
380 case 17:
381 case 18:
382 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
383 TX_NOTIFY_UNREACHABLE;
384 break;
385 default:
386 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
387 TX_NOTIFY_GENERALERROR;
388 break;
389 }
390
391 return n;
392}
393
cef6ff22
JW		 394static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
395 int forced_cleanup)
0da9581d 396{
72861ae7
EL		 397 if (q->card->options.cq != QETH_CQ_ENABLED)
398 return;
399
0da9581d
EL		 400 if (q->bufs[bidx]->next_pending != NULL) {
401 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
402 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
403
404 while (c) {
405 if (forced_cleanup ||
406 atomic_read(&c->state) ==
407 QETH_QDIO_BUF_HANDLED_DELAYED) {
408 struct qeth_qdio_out_buffer *f = c;
409 QETH_CARD_TEXT(f->q->card, 5, "fp");
410 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 411 /* release here to avoid interleaving between
412 outbound tasklet and inbound tasklet
413 regarding notifications and lifecycle */
414 qeth_release_skbs(c);
415
0da9581d 416 c = f->next_pending;
18af5c17 417 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 418 head->next_pending = c;
419 kmem_cache_free(qeth_qdio_outbuf_cache, f);
420 } else {
421 head = c;
422 c = c->next_pending;
423 }
424
425 }
426 }
72861ae7
EL		 427 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
428 QETH_QDIO_BUF_HANDLED_DELAYED)) {
429 /* for recovery situations */
72861ae7
EL		 430 qeth_init_qdio_out_buf(q, bidx);
431 QETH_CARD_TEXT(q->card, 2, "clprecov");
432 }
0da9581d
EL		 433}
434
435
cef6ff22
JW		 436static void qeth_qdio_handle_aob(struct qeth_card *card,
437 unsigned long phys_aob_addr)
438{
0da9581d
EL		 439 struct qaob *aob;
440 struct qeth_qdio_out_buffer *buffer;
b3332930 441 enum iucv_tx_notify notification;
ce28867f 442 unsigned int i;
0da9581d
EL		 443
444 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
445 QETH_CARD_TEXT(card, 5, "haob");
446 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
447 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
448 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
449
b3332930
FB		 450 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
451 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
452 notification = TX_NOTIFY_OK;
453 } else {
18af5c17
SR		 454 WARN_ON_ONCE(atomic_read(&buffer->state) !=
455 QETH_QDIO_BUF_PENDING);
b3332930
FB		 456 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
457 notification = TX_NOTIFY_DELAYED_OK;
458 }
459
460 if (aob->aorc != 0) {
461 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
462 notification = qeth_compute_cq_notification(aob->aorc, 1);
463 }
464 qeth_notify_skbs(buffer->q, buffer, notification);
465
ce28867f
JW		 466 /* Free dangling allocations. The attached skbs are handled by
467 * qeth_cleanup_handled_pending().
468 */
469 for (i = 0;
470 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
471 i++) {
472 if (aob->sba[i] && buffer->is_header[i])
473 kmem_cache_free(qeth_core_header_cache,
474 (void *) aob->sba[i]);
475 }
476 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
72861ae7 477
0da9581d
EL		 478 qdio_release_aob(aob);
479}
480
481static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
482{
483 return card->options.cq == QETH_CQ_ENABLED &&
484 card->qdio.c_q != NULL &&
485 queue != 0 &&
486 queue == card->qdio.no_in_queues - 1;
487}
488
45ca2fd6
JW		 489static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
490{
491 ccw->cmd_code = cmd_code;
492 ccw->flags = CCW_FLAG_SLI;
493 ccw->count = len;
494 ccw->cda = (__u32) __pa(data);
495}
496
17bf8c9b 497static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50 498{
750b1625 499 struct qeth_channel *channel = &card->read;
4a71df50 500 struct qeth_cmd_buffer *iob;
750b1625 501 int rc;
4a71df50 502
847a50fd 503 QETH_CARD_TEXT(card, 5, "issnxrd");
750b1625 504 if (channel->state != CH_STATE_UP)
4a71df50 505 return -EIO;
750b1625 506 iob = qeth_get_buffer(channel);
4a71df50 507 if (!iob) {
74eacdb9
FB		 508 dev_warn(&card->gdev->dev, "The qeth device driver "
509 "failed to recover an error on the device\n");
e19e5be8
JW		 510 QETH_DBF_MESSAGE(2, "issue_next_read on device %x failed: no iob available\n",
511 CARD_DEVID(card));
4a71df50
FB		 512 return -ENOMEM;
513 }
988a747d 514
f15cdaf2 515 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
988a747d 516 iob->callback = qeth_issue_next_read_cb;
847a50fd 517 QETH_CARD_TEXT(card, 6, "noirqpnd");
f15cdaf2 518 rc = ccw_device_start(channel->ccwdev, channel->ccw,
4a71df50
FB		 519 (addr_t) iob, 0, 0);
520 if (rc) {
e19e5be8
JW		 521 QETH_DBF_MESSAGE(2, "error %i on device %x when starting next read ccw!\n",
522 rc, CARD_DEVID(card));
750b1625 523 atomic_set(&channel->irq_pending, 0);
5065b2dd 524 qeth_release_buffer(channel, iob);
908abbb5 525 card->read_or_write_problem = 1;
4a71df50
FB		 526 qeth_schedule_recovery(card);
527 wake_up(&card->wait_q);
528 }
529 return rc;
530}
531
17bf8c9b
JW		 532static int qeth_issue_next_read(struct qeth_card *card)
533{
534 int ret;
535
536 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
537 ret = __qeth_issue_next_read(card);
538 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
539
540 return ret;
541}
542
4a71df50
FB		 543static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
544{
545 struct qeth_reply *reply;
546
782e4a79 547 reply = kzalloc(sizeof(*reply), GFP_KERNEL);
4a71df50 548 if (reply) {
ae695927 549 refcount_set(&reply->refcnt, 1);
782e4a79 550 init_completion(&reply->received);
6531084c 551 }
4a71df50
FB		 552 return reply;
553}
554
555static void qeth_get_reply(struct qeth_reply *reply)
556{
ae695927 557 refcount_inc(&reply->refcnt);
4a71df50
FB		 558}
559
560static void qeth_put_reply(struct qeth_reply *reply)
561{
ae695927 562 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 563 kfree(reply);
564}
565
0951c6ba
JW		 566static void qeth_enqueue_reply(struct qeth_card *card, struct qeth_reply *reply)
567{
568 spin_lock_irq(&card->lock);
569 list_add_tail(&reply->list, &card->cmd_waiter_list);
570 spin_unlock_irq(&card->lock);
571}
572
573static void qeth_dequeue_reply(struct qeth_card *card, struct qeth_reply *reply)
574{
575 spin_lock_irq(&card->lock);
576 list_del(&reply->list);
577 spin_unlock_irq(&card->lock);
578}
579
61e04465 580static void qeth_notify_reply(struct qeth_reply *reply, int reason)
0951c6ba 581{
61e04465 582 reply->rc = reason;
782e4a79 583 complete(&reply->received);
0951c6ba
JW		 584}
585
d11ba0c4 586static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 587 struct qeth_card *card)
588{
048a7f8b 589 const char *ipa_name;
d11ba0c4 590 int com = cmd->hdr.command;
4a71df50 591 ipa_name = qeth_get_ipa_cmd_name(com);
e19e5be8 592
d11ba0c4 593 if (rc)
e19e5be8
JW		 594 QETH_DBF_MESSAGE(2, "IPA: %s(%#x) for device %x returned %#x \"%s\"\n",
595 ipa_name, com, CARD_DEVID(card), rc,
596 qeth_get_ipa_msg(rc));
d11ba0c4 597 else
e19e5be8
JW		 598 QETH_DBF_MESSAGE(5, "IPA: %s(%#x) for device %x succeeded\n",
599 ipa_name, com, CARD_DEVID(card));
4a71df50
FB		 600}
601
602static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
d19b93f4 603 struct qeth_ipa_cmd *cmd)
4a71df50 604{
847a50fd 605 QETH_CARD_TEXT(card, 5, "chkipad");
d19b93f4
JW		 606
607 if (IS_IPA_REPLY(cmd)) {
608 if (cmd->hdr.command != IPA_CMD_SETCCID &&
609 cmd->hdr.command != IPA_CMD_DELCCID &&
610 cmd->hdr.command != IPA_CMD_MODCCID &&
611 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
612 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
613 return cmd;
614 }
615
616 /* handle unsolicited event: */
617 switch (cmd->hdr.command) {
618 case IPA_CMD_STOPLAN:
619 if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
620 dev_err(&card->gdev->dev,
621 "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
622 QETH_CARD_IFNAME(card));
dcef5cad 623 schedule_work(&card->close_dev_work);
4a71df50 624 } else {
d19b93f4
JW		 625 dev_warn(&card->gdev->dev,
626 "The link for interface %s on CHPID 0x%X failed\n",
627 QETH_CARD_IFNAME(card), card->info.chpid);
628 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
91cc98f5 629 netif_carrier_off(card->dev);
4a71df50 630 }
d19b93f4
JW		 631 return NULL;
632 case IPA_CMD_STARTLAN:
633 dev_info(&card->gdev->dev,
634 "The link for %s on CHPID 0x%X has been restored\n",
635 QETH_CARD_IFNAME(card), card->info.chpid);
d19b93f4
JW		 636 if (card->info.hwtrap)
637 card->info.hwtrap = 2;
638 qeth_schedule_recovery(card);
639 return NULL;
640 case IPA_CMD_SETBRIDGEPORT_IQD:
641 case IPA_CMD_SETBRIDGEPORT_OSA:
642 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
643 if (card->discipline->control_event_handler(card, cmd))
644 return cmd;
645 return NULL;
646 case IPA_CMD_MODCCID:
647 return cmd;
648 case IPA_CMD_REGISTER_LOCAL_ADDR:
649 QETH_CARD_TEXT(card, 3, "irla");
650 return NULL;
651 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
652 QETH_CARD_TEXT(card, 3, "urla");
653 return NULL;
654 default:
655 QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
656 return cmd;
4a71df50 657 }
4a71df50
FB		 658}
659
660void qeth_clear_ipacmd_list(struct qeth_card *card)
661{
0951c6ba 662 struct qeth_reply *reply;
4a71df50
FB		 663 unsigned long flags;
664
847a50fd 665 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 666
667 spin_lock_irqsave(&card->lock, flags);
61e04465
JW		 668 list_for_each_entry(reply, &card->cmd_waiter_list, list)
669 qeth_notify_reply(reply, -EIO);
4a71df50
FB		 670 spin_unlock_irqrestore(&card->lock, flags);
671}
672EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
673
5113fec0
UB		 674static int qeth_check_idx_response(struct qeth_card *card,
675 unsigned char *buffer)
4a71df50 676{
d11ba0c4 677 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 678 if ((buffer[2] & 0xc0) == 0xc0) {
e19e5be8 679 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#04x\n",
d857e111 680 buffer[4]);
847a50fd
CO		 681 QETH_CARD_TEXT(card, 2, "ckidxres");
682 QETH_CARD_TEXT(card, 2, " idxterm");
683 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 684 if (buffer[4] == 0xf6) {
685 dev_err(&card->gdev->dev,
686 "The qeth device is not configured "
687 "for the OSI layer required by z/VM\n");
688 return -EPERM;
689 }
4a71df50
FB		 690 return -EIO;
691 }
692 return 0;
693}
694
4a71df50
FB		 695static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
696{
697 __u8 index;
698
4a71df50
FB		 699 index = channel->io_buf_no;
700 do {
701 if (channel->iob[index].state == BUF_STATE_FREE) {
702 channel->iob[index].state = BUF_STATE_LOCKED;
782e4a79 703 channel->iob[index].timeout = QETH_TIMEOUT;
4a71df50
FB		 704 channel->io_buf_no = (channel->io_buf_no + 1) %
705 QETH_CMD_BUFFER_NO;
706 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
707 return channel->iob + index;
708 }
709 index = (index + 1) % QETH_CMD_BUFFER_NO;
710 } while (index != channel->io_buf_no);
711
712 return NULL;
713}
714
715void qeth_release_buffer(struct qeth_channel *channel,
716 struct qeth_cmd_buffer *iob)
717{
718 unsigned long flags;
719
4a71df50 720 spin_lock_irqsave(&channel->iob_lock, flags);
4a71df50 721 iob->state = BUF_STATE_FREE;
988a747d 722 iob->callback = NULL;
54daaca7
JW		 723 if (iob->reply) {
724 qeth_put_reply(iob->reply);
725 iob->reply = NULL;
726 }
4a71df50 727 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 728 wake_up(&channel->wait_q);
4a71df50
FB		 729}
730EXPORT_SYMBOL_GPL(qeth_release_buffer);
731
8f6637b8
JW		 732static void qeth_release_buffer_cb(struct qeth_card *card,
733 struct qeth_channel *channel,
734 struct qeth_cmd_buffer *iob)
735{
736 qeth_release_buffer(channel, iob);
737}
738
54daaca7
JW		 739static void qeth_cancel_cmd(struct qeth_cmd_buffer *iob, int rc)
740{
741 struct qeth_reply *reply = iob->reply;
742
61e04465
JW		 743 if (reply)
744 qeth_notify_reply(reply, rc);
54daaca7
JW		 745 qeth_release_buffer(iob->channel, iob);
746}
747
4a71df50
FB		 748static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
749{
750 struct qeth_cmd_buffer *buffer = NULL;
751 unsigned long flags;
752
753 spin_lock_irqsave(&channel->iob_lock, flags);
754 buffer = __qeth_get_buffer(channel);
755 spin_unlock_irqrestore(&channel->iob_lock, flags);
756 return buffer;
757}
758
759struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
760{
761 struct qeth_cmd_buffer *buffer;
762 wait_event(channel->wait_q,
763 ((buffer = qeth_get_buffer(channel)) != NULL));
764 return buffer;
765}
766EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
767
768void qeth_clear_cmd_buffers(struct qeth_channel *channel)
769{
770 int cnt;
771
772 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
773 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 774 channel->io_buf_no = 0;
775}
776EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
777
988a747d
JW		 778static void qeth_issue_next_read_cb(struct qeth_card *card,
779 struct qeth_channel *channel,
780 struct qeth_cmd_buffer *iob)
4a71df50 781{
d19b93f4 782 struct qeth_ipa_cmd *cmd = NULL;
0951c6ba
JW		 783 struct qeth_reply *reply = NULL;
784 struct qeth_reply *r;
4a71df50 785 unsigned long flags;
5113fec0 786 int rc = 0;
4a71df50 787
847a50fd 788 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 789 rc = qeth_check_idx_response(card, iob->data);
790 switch (rc) {
791 case 0:
792 break;
793 case -EIO:
4a71df50 794 qeth_clear_ipacmd_list(card);
5113fec0 795 qeth_schedule_recovery(card);
01fc3e86 796 /* fall through */
5113fec0 797 default:
4a71df50
FB		 798 goto out;
799 }
800
d19b93f4
JW		 801 if (IS_IPA(iob->data)) {
802 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
803 cmd = qeth_check_ipa_data(card, cmd);
d782d80f
JW		 804 if (!cmd)
805 goto out;
806 if (IS_OSN(card) && card->osn_info.assist_cb &&
807 cmd->hdr.command != IPA_CMD_STARTLAN) {
808 card->osn_info.assist_cb(card->dev, cmd);
809 goto out;
810 }
811 } else {
812 /* non-IPA commands should only flow during initialization */
813 if (card->state != CARD_STATE_DOWN)
814 goto out;
4a71df50
FB		 815 }
816
0951c6ba 817 /* match against pending cmd requests */
4a71df50 818 spin_lock_irqsave(&card->lock, flags);
0951c6ba
JW		 819 list_for_each_entry(r, &card->cmd_waiter_list, list) {
820 if ((r->seqno == QETH_IDX_COMMAND_SEQNO) ||
821 (cmd && (r->seqno == cmd->hdr.seqno))) {
822 reply = r;
823 /* take the object outside the lock */
4a71df50 824 qeth_get_reply(reply);
0951c6ba 825 break;
4a71df50
FB		 826 }
827 }
828 spin_unlock_irqrestore(&card->lock, flags);
0951c6ba
JW		 829
830 if (!reply)
831 goto out;
832
4b7ae122
JW		 833 if (!reply->callback) {
834 rc = 0;
835 } else {
0951c6ba
JW		 836 if (cmd) {
837 reply->offset = (u16)((char *)cmd - (char *)iob->data);
4b7ae122
JW		 838 rc = reply->callback(card, reply, (unsigned long)cmd);
839 } else {
840 rc = reply->callback(card, reply, (unsigned long)iob);
841 }
0951c6ba 842 }
0951c6ba 843
61e04465
JW		 844 if (rc <= 0)
845 qeth_notify_reply(reply, rc);
0951c6ba
JW		 846 qeth_put_reply(reply);
847
4a71df50
FB		 848out:
849 memcpy(&card->seqno.pdu_hdr_ack,
850 QETH_PDU_HEADER_SEQ_NO(iob->data),
851 QETH_SEQ_NO_LENGTH);
852 qeth_release_buffer(channel, iob);
853}
854
4a71df50
FB		 855static int qeth_set_thread_start_bit(struct qeth_card *card,
856 unsigned long thread)
857{
858 unsigned long flags;
859
860 spin_lock_irqsave(&card->thread_mask_lock, flags);
861 if (!(card->thread_allowed_mask & thread) ||
862 (card->thread_start_mask & thread)) {
863 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
864 return -EPERM;
865 }
866 card->thread_start_mask |= thread;
867 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
868 return 0;
869}
870
871void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
872{
873 unsigned long flags;
874
875 spin_lock_irqsave(&card->thread_mask_lock, flags);
876 card->thread_start_mask &= ~thread;
877 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
878 wake_up(&card->wait_q);
879}
880EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
881
882void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
883{
884 unsigned long flags;
885
886 spin_lock_irqsave(&card->thread_mask_lock, flags);
887 card->thread_running_mask &= ~thread;
888 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 889 wake_up_all(&card->wait_q);
4a71df50
FB		 890}
891EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
892
893static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
894{
895 unsigned long flags;
896 int rc = 0;
897
898 spin_lock_irqsave(&card->thread_mask_lock, flags);
899 if (card->thread_start_mask & thread) {
900 if ((card->thread_allowed_mask & thread) &&
901 !(card->thread_running_mask & thread)) {
902 rc = 1;
903 card->thread_start_mask &= ~thread;
904 card->thread_running_mask |= thread;
905 } else
906 rc = -EPERM;
907 }
908 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
909 return rc;
910}
911
912int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
913{
914 int rc = 0;
915
916 wait_event(card->wait_q,
917 (rc = __qeth_do_run_thread(card, thread)) >= 0);
918 return rc;
919}
920EXPORT_SYMBOL_GPL(qeth_do_run_thread);
921
922void qeth_schedule_recovery(struct qeth_card *card)
923{
847a50fd 924 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 925 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
926 schedule_work(&card->kernel_thread_starter);
927}
928EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
929
8d908eb0
JW		 930static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
931 struct irb *irb)
4a71df50
FB		 932{
933 int dstat, cstat;
934 char *sense;
935
936 sense = (char *) irb->ecw;
23d805b6
PO		 937 cstat = irb->scsw.cmd.cstat;
938 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 939
940 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
941 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
942 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 943 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 944 dev_warn(&cdev->dev, "The qeth device driver "
945 "failed to recover an error on the device\n");
e19e5be8
JW		 946 QETH_DBF_MESSAGE(2, "check on channel %x with dstat=%#x, cstat=%#x\n",
947 CCW_DEVID(cdev), dstat, cstat);
4a71df50
FB		 948 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
949 16, 1, irb, 64, 1);
950 return 1;
951 }
952
953 if (dstat & DEV_STAT_UNIT_CHECK) {
954 if (sense[SENSE_RESETTING_EVENT_BYTE] &
955 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 956 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 957 return 1;
958 }
959 if (sense[SENSE_COMMAND_REJECT_BYTE] &
960 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 961 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 962 return 1;
4a71df50
FB		 963 }
964 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 965 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 966 return 1;
967 }
968 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 969 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 970 return 0;
971 }
847a50fd 972 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 973 return 1;
974 }
975 return 0;
976}
977
54daaca7
JW		 978static int qeth_check_irb_error(struct qeth_card *card, struct ccw_device *cdev,
979 unsigned long intparm, struct irb *irb)
4a71df50 980{
8d908eb0 981 if (!IS_ERR(irb))
4a71df50
FB		 982 return 0;
983
984 switch (PTR_ERR(irb)) {
985 case -EIO:
e19e5be8
JW		 986 QETH_DBF_MESSAGE(2, "i/o-error on channel %x\n",
987 CCW_DEVID(cdev));
847a50fd
CO		 988 QETH_CARD_TEXT(card, 2, "ckirberr");
989 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
54daaca7 990 return -EIO;
4a71df50 991 case -ETIMEDOUT:
74eacdb9
FB		 992 dev_warn(&cdev->dev, "A hardware operation timed out"
993 " on the device\n");
847a50fd
CO		 994 QETH_CARD_TEXT(card, 2, "ckirberr");
995 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 996 if (intparm == QETH_RCD_PARM) {
e95051ff 997 if (card->data.ccwdev == cdev) {
4a71df50
FB		 998 card->data.state = CH_STATE_DOWN;
999 wake_up(&card->wait_q);
1000 }
1001 }
54daaca7 1002 return -ETIMEDOUT;
4a71df50 1003 default:
e19e5be8
JW		 1004 QETH_DBF_MESSAGE(2, "unknown error %ld on channel %x\n",
1005 PTR_ERR(irb), CCW_DEVID(cdev));
847a50fd
CO		 1006 QETH_CARD_TEXT(card, 2, "ckirberr");
1007 QETH_CARD_TEXT(card, 2, " rc???");
54daaca7 1008 return PTR_ERR(irb);
4a71df50 1009 }
4a71df50
FB		 1010}
1011
1012static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1013 struct irb *irb)
1014{
1015 int rc;
1016 int cstat, dstat;
db71bbbd 1017 struct qeth_cmd_buffer *iob = NULL;
8d908eb0 1018 struct ccwgroup_device *gdev;
4a71df50
FB		 1019 struct qeth_channel *channel;
1020 struct qeth_card *card;
4a71df50 1021
8d908eb0
JW		 1022 /* while we hold the ccwdev lock, this stays valid: */
1023 gdev = dev_get_drvdata(&cdev->dev);
1024 card = dev_get_drvdata(&gdev->dev);
4a71df50
FB		 1025 if (!card)
1026 return;
1027
847a50fd
CO		 1028 QETH_CARD_TEXT(card, 5, "irq");
1029
4a71df50
FB		 1030 if (card->read.ccwdev == cdev) {
1031 channel = &card->read;
847a50fd 1032 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1033 } else if (card->write.ccwdev == cdev) {
1034 channel = &card->write;
847a50fd 1035 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1036 } else {
1037 channel = &card->data;
847a50fd 1038 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1039 }
db71bbbd
JW		 1040
1041 if (qeth_intparm_is_iob(intparm))
1042 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1043
54daaca7
JW		 1044 rc = qeth_check_irb_error(card, cdev, intparm, irb);
1045 if (rc) {
db71bbbd
JW		 1046 /* IO was terminated, free its resources. */
1047 if (iob)
54daaca7 1048 qeth_cancel_cmd(iob, rc);
db71bbbd
JW		 1049 atomic_set(&channel->irq_pending, 0);
1050 wake_up(&card->wait_q);
1051 return;
1052 }
1053
4a71df50
FB		 1054 atomic_set(&channel->irq_pending, 0);
1055
23d805b6 1056 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1057 channel->state = CH_STATE_STOPPED;
1058
23d805b6 1059 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1060 channel->state = CH_STATE_HALTED;
1061
1062 /*let's wake up immediately on data channel*/
1063 if ((channel == &card->data) && (intparm != 0) &&
1064 (intparm != QETH_RCD_PARM))
1065 goto out;
1066
1067 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1068 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1069 /* we don't have to handle this further */
1070 intparm = 0;
1071 }
1072 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1073 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1074 /* we don't have to handle this further */
1075 intparm = 0;
1076 }
db71bbbd
JW		 1077
1078 cstat = irb->scsw.cmd.cstat;
1079 dstat = irb->scsw.cmd.dstat;
1080
4a71df50
FB		 1081 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1082 (dstat & DEV_STAT_UNIT_CHECK) ||
1083 (cstat)) {
1084 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1085 dev_warn(&channel->ccwdev->dev,
1086 "The qeth device driver failed to recover "
1087 "an error on the device\n");
e19e5be8
JW		 1088 QETH_DBF_MESSAGE(2, "sense data available on channel %x: cstat %#X dstat %#X\n",
1089 CCW_DEVID(channel->ccwdev), cstat,
1090 dstat);
4a71df50
FB		 1091 print_hex_dump(KERN_WARNING, "qeth: irb ",
1092 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1093 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1094 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1095 }
1096 if (intparm == QETH_RCD_PARM) {
1097 channel->state = CH_STATE_DOWN;
1098 goto out;
1099 }
8d908eb0 1100 rc = qeth_get_problem(card, cdev, irb);
4a71df50 1101 if (rc) {
a6c3d939 1102 card->read_or_write_problem = 1;
5065b2dd 1103 if (iob)
54daaca7 1104 qeth_cancel_cmd(iob, rc);
28a7e4c9 1105 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1106 qeth_schedule_recovery(card);
1107 goto out;
1108 }
1109 }
1110
1111 if (intparm == QETH_RCD_PARM) {
1112 channel->state = CH_STATE_RCD_DONE;
1113 goto out;
1114 }
4a71df50
FB		 1115 if (channel == &card->data)
1116 return;
1117 if (channel == &card->read &&
1118 channel->state == CH_STATE_UP)
17bf8c9b 1119 __qeth_issue_next_read(card);
4a71df50 1120
db71bbbd 1121 if (iob && iob->callback)
8f6637b8 1122 iob->callback(card, iob->channel, iob);
4a71df50 1123
4a71df50
FB		 1124out:
1125 wake_up(&card->wait_q);
1126 return;
1127}
1128
b3332930 1129static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1130 struct qeth_qdio_out_buffer *buf,
b3332930 1131 enum iucv_tx_notify notification)
4a71df50 1132{
4a71df50
FB		 1133 struct sk_buff *skb;
1134
dc149e37 1135 skb_queue_walk(&buf->skb_list, skb) {
b3332930
FB		 1136 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1137 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6a3123d0
JW		 1138 if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
1139 iucv_sk(skb->sk)->sk_txnotify(skb, notification);
b3332930 1140 }
b3332930
FB		 1141}
1142
1143static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1144{
104b4859
JW		 1145 struct sk_buff *skb;
1146
72861ae7 1147 /* release may never happen from within CQ tasklet scope */
18af5c17 1148 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1149
6a3123d0
JW		 1150 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1151 qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
1152
104b4859
JW		 1153 while ((skb = __skb_dequeue(&buf->skb_list)) != NULL)
1154 consume_skb(skb);
b3332930
FB		 1155}
1156
1157static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
3b346c18 1158 struct qeth_qdio_out_buffer *buf)
b3332930
FB		 1159{
1160 int i;
1161
1162 /* is PCI flag set on buffer? */
1163 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1164 atomic_dec(&queue->set_pci_flags_count);
1165
3b346c18
JW		 1166 qeth_release_skbs(buf);
1167
4a71df50 1168 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1169 if (buf->buffer->element[i].addr && buf->is_header[i])
1170 kmem_cache_free(qeth_core_header_cache,
1171 buf->buffer->element[i].addr);
1172 buf->is_header[i] = 0;
4a71df50 1173 }
3b346c18
JW		 1174
1175 qeth_scrub_qdio_buffer(buf->buffer,
1176 QETH_MAX_BUFFER_ELEMENTS(queue->card));
4a71df50 1177 buf->next_element_to_fill = 0;
3b346c18 1178 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
0da9581d
EL		 1179}
1180
41c47da3 1181static void qeth_drain_output_queue(struct qeth_qdio_out_q *q, bool free)
0da9581d
EL		 1182{
1183 int j;
1184
1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186 if (!q->bufs[j])
1187 continue;
72861ae7 1188 qeth_cleanup_handled_pending(q, j, 1);
3b346c18 1189 qeth_clear_output_buffer(q, q->bufs[j]);
0da9581d
EL		 1190 if (free) {
1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192 q->bufs[j] = NULL;
1193 }
1194 }
4a71df50
FB		 1195}
1196
41c47da3 1197void qeth_drain_output_queues(struct qeth_card *card)
4a71df50 1198{
0da9581d 1199 int i;
4a71df50 1200
847a50fd 1201 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1202 /* clear outbound buffers to free skbs */
0da9581d 1203 for (i = 0; i < card->qdio.no_out_queues; ++i) {
41c47da3
JW		 1204 if (card->qdio.out_qs[i])
1205 qeth_drain_output_queue(card->qdio.out_qs[i], false);
0da9581d 1206 }
4a71df50 1207}
41c47da3 1208EXPORT_SYMBOL_GPL(qeth_drain_output_queues);
4a71df50
FB		 1209
1210static void qeth_free_buffer_pool(struct qeth_card *card)
1211{
1212 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1213 int i = 0;
4a71df50
FB		 1214 list_for_each_entry_safe(pool_entry, tmp,
1215 &card->qdio.init_pool.entry_list, init_list){
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1217 free_page((unsigned long)pool_entry->elements[i]);
1218 list_del(&pool_entry->init_list);
1219 kfree(pool_entry);
1220 }
1221}
1222
4a71df50
FB		 1223static void qeth_clean_channel(struct qeth_channel *channel)
1224{
121ca39a 1225 struct ccw_device *cdev = channel->ccwdev;
4a71df50
FB		 1226 int cnt;
1227
d11ba0c4 1228 QETH_DBF_TEXT(SETUP, 2, "freech");
121ca39a
JW		 1229
1230 spin_lock_irq(get_ccwdev_lock(cdev));
1231 cdev->handler = NULL;
1232 spin_unlock_irq(get_ccwdev_lock(cdev));
1233
4a71df50
FB		 1234 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1235 kfree(channel->iob[cnt].data);
f15cdaf2 1236 kfree(channel->ccw);
4a71df50
FB		 1237}
1238
121ca39a
JW		 1239static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
1240{
1241 struct ccw_device *cdev = channel->ccwdev;
1242 int cnt;
1243
1244 QETH_DBF_TEXT(SETUP, 2, "setupch");
1245
1246 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
1247 if (!channel->ccw)
1248 return -ENOMEM;
1249 channel->state = CH_STATE_DOWN;
1250 atomic_set(&channel->irq_pending, 0);
1251 init_waitqueue_head(&channel->wait_q);
1252
1253 spin_lock_irq(get_ccwdev_lock(cdev));
1254 cdev->handler = qeth_irq;
1255 spin_unlock_irq(get_ccwdev_lock(cdev));
1256
1257 if (!alloc_buffers)
1258 return 0;
1259
1260 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
500abbf0
JW		 1261 channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
1262 GFP_KERNEL | GFP_DMA);
121ca39a
JW		 1263 if (channel->iob[cnt].data == NULL)
1264 break;
1265 channel->iob[cnt].state = BUF_STATE_FREE;
1266 channel->iob[cnt].channel = channel;
121ca39a
JW		 1267 }
1268 if (cnt < QETH_CMD_BUFFER_NO) {
1269 qeth_clean_channel(channel);
1270 return -ENOMEM;
1271 }
1272 channel->io_buf_no = 0;
1273 spin_lock_init(&channel->iob_lock);
1274
1275 return 0;
1276}
1277
725b9c04
SO		 1278static void qeth_set_single_write_queues(struct qeth_card *card)
1279{
1280 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1281 (card->qdio.no_out_queues == 4))
41c47da3 1282 qeth_free_qdio_queues(card);
725b9c04
SO		 1283
1284 card->qdio.no_out_queues = 1;
1285 if (card->qdio.default_out_queue != 0)
1286 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1287
1288 card->qdio.default_out_queue = 0;
1289}
1290
1291static void qeth_set_multiple_write_queues(struct qeth_card *card)
1292{
1293 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1294 (card->qdio.no_out_queues == 1)) {
41c47da3 1295 qeth_free_qdio_queues(card);
725b9c04
SO		 1296 card->qdio.default_out_queue = 2;
1297 }
1298 card->qdio.no_out_queues = 4;
1299}
1300
a4cdc9ba 1301static int qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1302{
4a71df50 1303 struct ccw_device *ccwdev;
ded27d8d 1304 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1305
5113fec0 1306 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1307
1308 ccwdev = card->data.ccwdev;
725b9c04
SO		 1309 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1310 if (!chp_dsc)
a4cdc9ba 1311 return -ENOMEM;
725b9c04
SO		 1312
1313 card->info.func_level = 0x4100 + chp_dsc->desc;
1314 if (card->info.type == QETH_CARD_TYPE_IQD)
1315 goto out;
1316
1317 /* CHPP field bit 6 == 1 -> single queue */
1318 if ((chp_dsc->chpp & 0x02) == 0x02)
1319 qeth_set_single_write_queues(card);
1320 else
1321 qeth_set_multiple_write_queues(card);
1322out:
1323 kfree(chp_dsc);
5113fec0
UB		 1324 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1325 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
a4cdc9ba 1326 return 0;
4a71df50
FB		 1327}
1328
1329static void qeth_init_qdio_info(struct qeth_card *card)
1330{
d11ba0c4 1331 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50 1332 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
95f4d8b7
JW		 1333 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1334 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1335 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1336
4a71df50 1337 /* inbound */
ed2e93ef 1338 card->qdio.no_in_queues = 1;
4a71df50 1339 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1340 if (card->info.type == QETH_CARD_TYPE_IQD)
1341 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1342 else
1343 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1344 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1345 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1346 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1347}
1348
95f4d8b7 1349static void qeth_set_initial_options(struct qeth_card *card)
4a71df50
FB		 1350{
1351 card->options.route4.type = NO_ROUTER;
1352 card->options.route6.type = NO_ROUTER;
4a71df50 1353 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1354 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1355 card->options.cq = QETH_CQ_DISABLED;
4fda3354 1356 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
4a71df50
FB		 1357}
1358
1359static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1360{
1361 unsigned long flags;
1362 int rc = 0;
1363
1364 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1365 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1366 (u8) card->thread_start_mask,
1367 (u8) card->thread_allowed_mask,
1368 (u8) card->thread_running_mask);
1369 rc = (card->thread_start_mask & thread);
1370 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1371 return rc;
1372}
1373
1374static void qeth_start_kernel_thread(struct work_struct *work)
1375{
3f36b890 1376 struct task_struct *ts;
4a71df50
FB		 1377 struct qeth_card *card = container_of(work, struct qeth_card,
1378 kernel_thread_starter);
847a50fd 1379 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1380
1381 if (card->read.state != CH_STATE_UP &&
1382 card->write.state != CH_STATE_UP)
1383 return;
3f36b890 1384 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1385 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1386 "qeth_recover");
3f36b890
FB		 1387 if (IS_ERR(ts)) {
1388 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1389 qeth_clear_thread_running_bit(card,
1390 QETH_RECOVER_THREAD);
1391 }
1392 }
4a71df50
FB		 1393}
1394
bca51650 1395static void qeth_buffer_reclaim_work(struct work_struct *);
95f4d8b7 1396static void qeth_setup_card(struct qeth_card *card)
4a71df50 1397{
d11ba0c4
PT		 1398 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1399 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50 1400
95f4d8b7 1401 card->info.type = CARD_RDEV(card)->id.driver_info;
4a71df50 1402 card->state = CARD_STATE_DOWN;
4a71df50 1403 spin_lock_init(&card->lock);
4a71df50 1404 spin_lock_init(&card->thread_mask_lock);
c4949f07 1405 mutex_init(&card->conf_mutex);
9dc48ccc 1406 mutex_init(&card->discipline_mutex);
4a71df50 1407 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1408 INIT_LIST_HEAD(&card->cmd_waiter_list);
1409 init_waitqueue_head(&card->wait_q);
95f4d8b7 1410 qeth_set_initial_options(card);
4a71df50
FB		 1411 /* IP address takeover */
1412 INIT_LIST_HEAD(&card->ipato.entries);
4a71df50 1413 qeth_init_qdio_info(card);
b3332930 1414 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1415 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1416}
1417
6bcac508
MS		 1418static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1419{
1420 struct qeth_card *card = container_of(slr, struct qeth_card,
1421 qeth_service_level);
0d788c7d
KDW		 1422 if (card->info.mcl_level[0])
1423 seq_printf(m, "qeth: %s firmware level %s\n",
1424 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1425}
1426
121ca39a 1427static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
4a71df50
FB		 1428{
1429 struct qeth_card *card;
1430
d11ba0c4 1431 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
f15cdaf2 1432 card = kzalloc(sizeof(*card), GFP_KERNEL);
4a71df50 1433 if (!card)
76b11f8e 1434 goto out;
d11ba0c4 1435 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
121ca39a
JW		 1436
1437 card->gdev = gdev;
a2eb0ad5 1438 dev_set_drvdata(&gdev->dev, card);
121ca39a
JW		 1439 CARD_RDEV(card) = gdev->cdev[0];
1440 CARD_WDEV(card) = gdev->cdev[1];
1441 CARD_DDEV(card) = gdev->cdev[2];
c0a2e4d1 1442
7686e4b6
JW		 1443 card->event_wq = alloc_ordered_workqueue("%s_event", 0,
1444 dev_name(&gdev->dev));
c0a2e4d1
JW		 1445 if (!card->event_wq)
1446 goto out_wq;
24142fd8 1447 if (qeth_setup_channel(&card->read, true))
76b11f8e 1448 goto out_ip;
24142fd8 1449 if (qeth_setup_channel(&card->write, true))
76b11f8e 1450 goto out_channel;
24142fd8
JW		 1451 if (qeth_setup_channel(&card->data, false))
1452 goto out_data;
6bcac508
MS		 1453 card->qeth_service_level.seq_print = qeth_core_sl_print;
1454 register_service_level(&card->qeth_service_level);
4a71df50 1455 return card;
76b11f8e 1456
24142fd8
JW		 1457out_data:
1458 qeth_clean_channel(&card->write);
76b11f8e
UB		 1459out_channel:
1460 qeth_clean_channel(&card->read);
1461out_ip:
c0a2e4d1
JW		 1462 destroy_workqueue(card->event_wq);
1463out_wq:
a2eb0ad5 1464 dev_set_drvdata(&gdev->dev, NULL);
76b11f8e
UB		 1465 kfree(card);
1466out:
1467 return NULL;
4a71df50
FB		 1468}
1469
8d908eb0
JW		 1470static int qeth_clear_channel(struct qeth_card *card,
1471 struct qeth_channel *channel)
4a71df50 1472{
4a71df50
FB		 1473 int rc;
1474
847a50fd 1475 QETH_CARD_TEXT(card, 3, "clearch");
ed47155b 1476 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1477 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
ed47155b 1478 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1479
1480 if (rc)
1481 return rc;
1482 rc = wait_event_interruptible_timeout(card->wait_q,
1483 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1484 if (rc == -ERESTARTSYS)
1485 return rc;
1486 if (channel->state != CH_STATE_STOPPED)
1487 return -ETIME;
1488 channel->state = CH_STATE_DOWN;
1489 return 0;
1490}
1491
8d908eb0
JW		 1492static int qeth_halt_channel(struct qeth_card *card,
1493 struct qeth_channel *channel)
4a71df50 1494{
4a71df50
FB		 1495 int rc;
1496
847a50fd 1497 QETH_CARD_TEXT(card, 3, "haltch");
ed47155b 1498 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1499 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
ed47155b 1500 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1501
1502 if (rc)
1503 return rc;
1504 rc = wait_event_interruptible_timeout(card->wait_q,
1505 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1506 if (rc == -ERESTARTSYS)
1507 return rc;
1508 if (channel->state != CH_STATE_HALTED)
1509 return -ETIME;
1510 return 0;
1511}
1512
1513static int qeth_halt_channels(struct qeth_card *card)
1514{
1515 int rc1 = 0, rc2 = 0, rc3 = 0;
1516
847a50fd 1517 QETH_CARD_TEXT(card, 3, "haltchs");
8d908eb0
JW		 1518 rc1 = qeth_halt_channel(card, &card->read);
1519 rc2 = qeth_halt_channel(card, &card->write);
1520 rc3 = qeth_halt_channel(card, &card->data);
4a71df50
FB		 1521 if (rc1)
1522 return rc1;
1523 if (rc2)
1524 return rc2;
1525 return rc3;
1526}
1527
1528static int qeth_clear_channels(struct qeth_card *card)
1529{
1530 int rc1 = 0, rc2 = 0, rc3 = 0;
1531
847a50fd 1532 QETH_CARD_TEXT(card, 3, "clearchs");
8d908eb0
JW		 1533 rc1 = qeth_clear_channel(card, &card->read);
1534 rc2 = qeth_clear_channel(card, &card->write);
1535 rc3 = qeth_clear_channel(card, &card->data);
4a71df50
FB		 1536 if (rc1)
1537 return rc1;
1538 if (rc2)
1539 return rc2;
1540 return rc3;
1541}
1542
1543static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1544{
1545 int rc = 0;
1546
847a50fd 1547 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1548
1549 if (halt)
1550 rc = qeth_halt_channels(card);
1551 if (rc)
1552 return rc;
1553 return qeth_clear_channels(card);
1554}
1555
1556int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1557{
1558 int rc = 0;
1559
847a50fd 1560 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1561 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1562 QETH_QDIO_CLEANING)) {
1563 case QETH_QDIO_ESTABLISHED:
1564 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1565 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1566 QDIO_FLAG_CLEANUP_USING_HALT);
1567 else
cc961d40 1568 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1569 QDIO_FLAG_CLEANUP_USING_CLEAR);
1570 if (rc)
847a50fd 1571 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1572 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1573 break;
1574 case QETH_QDIO_CLEANING:
1575 return rc;
1576 default:
1577 break;
1578 }
1579 rc = qeth_clear_halt_card(card, use_halt);
1580 if (rc)
847a50fd 1581 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1582 card->state = CARD_STATE_DOWN;
1583 return rc;
1584}
1585EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1586
1587static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1588 int *length)
1589{
1590 struct ciw *ciw;
1591 char *rcd_buf;
1592 int ret;
1593 struct qeth_channel *channel = &card->data;
4a71df50
FB		 1594
1595 /*
1596 * scan for RCD command in extended SenseID data
1597 */
1598 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1599 if (!ciw || ciw->cmd == 0)
1600 return -EOPNOTSUPP;
1601 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1602 if (!rcd_buf)
1603 return -ENOMEM;
1604
f15cdaf2 1605 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
4a71df50 1606 channel->state = CH_STATE_RCD;
ed47155b 1607 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1608 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
4a71df50
FB		 1609 QETH_RCD_PARM, LPM_ANYPATH, 0,
1610 QETH_RCD_TIMEOUT);
ed47155b 1611 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1612 if (!ret)
1613 wait_event(card->wait_q,
1614 (channel->state == CH_STATE_RCD_DONE ||
1615 channel->state == CH_STATE_DOWN));
1616 if (channel->state == CH_STATE_DOWN)
1617 ret = -EIO;
1618 else
1619 channel->state = CH_STATE_DOWN;
1620 if (ret) {
1621 kfree(rcd_buf);
1622 *buffer = NULL;
1623 *length = 0;
1624 } else {
1625 *length = ciw->count;
1626 *buffer = rcd_buf;
1627 }
1628 return ret;
1629}
1630
a60389ab 1631static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1632{
a60389ab 1633 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1634 card->info.chpid = prcd[30];
1635 card->info.unit_addr2 = prcd[31];
1636 card->info.cula = prcd[63];
1637 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1638 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1639}
1640
615dff22
JW		 1641static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1642{
1643 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1644 struct diag26c_vnic_resp *response = NULL;
1645 struct diag26c_vnic_req *request = NULL;
1646 struct ccw_dev_id id;
1647 char userid[80];
1648 int rc = 0;
1649
1650 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1651
1652 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1653 if (rc)
1654 goto out;
1655
1656 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1657 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1658 if (!request || !response) {
1659 rc = -ENOMEM;
1660 goto out;
1661 }
1662
1663 ccw_device_get_id(CARD_RDEV(card), &id);
1664 request->resp_buf_len = sizeof(*response);
1665 request->resp_version = DIAG26C_VERSION6_VM65918;
1666 request->req_format = DIAG26C_VNIC_INFO;
1667 ASCEBC(userid, 8);
1668 memcpy(&request->sys_name, userid, 8);
1669 request->devno = id.devno;
1670
1671 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1672 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1673 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1674 if (rc)
1675 goto out;
1676 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1677
1678 if (request->resp_buf_len < sizeof(*response) ||
1679 response->version != request->resp_version) {
1680 rc = -EIO;
1681 goto out;
1682 }
1683
1684 if (response->protocol == VNIC_INFO_PROT_L2)
1685 disc = QETH_DISCIPLINE_LAYER2;
1686 else if (response->protocol == VNIC_INFO_PROT_L3)
1687 disc = QETH_DISCIPLINE_LAYER3;
1688
1689out:
1690 kfree(response);
1691 kfree(request);
1692 if (rc)
1693 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1694 return disc;
1695}
1696
c70eb09d
JW		 1697/* Determine whether the device requires a specific layer discipline */
1698static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1699{
615dff22
JW		 1700 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1701
c70eb09d 1702 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1703 card->info.type == QETH_CARD_TYPE_OSN)
1704 disc = QETH_DISCIPLINE_LAYER2;
1705 else if (card->info.guestlan)
1706 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1707 QETH_DISCIPLINE_LAYER3 :
1708 qeth_vm_detect_layer(card);
1709
1710 switch (disc) {
1711 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1712 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1713 break;
1714 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1715 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1716 break;
1717 default:
1718 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1719 }
1720
615dff22 1721 return disc;
c70eb09d
JW		 1722}
1723
a60389ab
EL		 1724static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1725{
1726 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1727
e6e056ba 1728 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1729 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1730 card->info.blkt.time_total = 0;
1731 card->info.blkt.inter_packet = 0;
1732 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1733 } else {
1734 card->info.blkt.time_total = 250;
1735 card->info.blkt.inter_packet = 5;
1736 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1737 }
4a71df50
FB		 1738}
1739
1740static void qeth_init_tokens(struct qeth_card *card)
1741{
1742 card->token.issuer_rm_w = 0x00010103UL;
1743 card->token.cm_filter_w = 0x00010108UL;
1744 card->token.cm_connection_w = 0x0001010aUL;
1745 card->token.ulp_filter_w = 0x0001010bUL;
1746 card->token.ulp_connection_w = 0x0001010dUL;
1747}
1748
1749static void qeth_init_func_level(struct qeth_card *card)
1750{
5113fec0
UB		 1751 switch (card->info.type) {
1752 case QETH_CARD_TYPE_IQD:
6298263a 1753 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1754 break;
1755 case QETH_CARD_TYPE_OSD:
0132951e 1756 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1757 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1758 break;
1759 default:
1760 break;
4a71df50
FB		 1761 }
1762}
1763
48ce6f89
JW		 1764static void qeth_idx_finalize_cmd(struct qeth_card *card,
1765 struct qeth_cmd_buffer *iob,
1766 unsigned int length)
1767{
1768 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, length, iob->data);
1769
1770 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), &card->seqno.trans_hdr,
1771 QETH_SEQ_NO_LENGTH);
1772 if (iob->channel == &card->write)
1773 card->seqno.trans_hdr++;
1774}
1775
4a71df50
FB		 1776static int qeth_peer_func_level(int level)
1777{
1778 if ((level & 0xff) == 8)
1779 return (level & 0xff) + 0x400;
1780 if (((level >> 8) & 3) == 1)
1781 return (level & 0xff) + 0x200;
1782 return level;
1783}
1784
48ce6f89
JW		 1785static void qeth_mpc_finalize_cmd(struct qeth_card *card,
1786 struct qeth_cmd_buffer *iob,
1787 unsigned int length)
4a71df50 1788{
48ce6f89 1789 qeth_idx_finalize_cmd(card, iob, length);
4a71df50 1790
4a71df50
FB		 1791 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1792 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1793 card->seqno.pdu_hdr++;
1794 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1795 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
48ce6f89
JW		 1796
1797 iob->reply->seqno = QETH_IDX_COMMAND_SEQNO;
1798 iob->callback = qeth_release_buffer_cb;
4a71df50 1799}
4a71df50 1800
efbbc1d5
EC		 1801/**
1802 * qeth_send_control_data() - send control command to the card
1803 * @card: qeth_card structure pointer
1804 * @len: size of the command buffer
1805 * @iob: qeth_cmd_buffer pointer
1806 * @reply_cb: callback function pointer
1807 * @cb_card: pointer to the qeth_card structure
1808 * @cb_reply: pointer to the qeth_reply structure
1809 * @cb_cmd: pointer to the original iob for non-IPA
1810 * commands, or to the qeth_ipa_cmd structure
1811 * for the IPA commands.
1812 * @reply_param: private pointer passed to the callback
1813 *
efbbc1d5
EC		 1814 * Callback function gets called one or more times, with cb_cmd
1815 * pointing to the response returned by the hardware. Callback
742d4d40
JW		 1816 * function must return
1817 * > 0 if more reply blocks are expected,
1818 * 0 if the last or only reply block is received, and
1819 * < 0 on error.
1820 * Callback function can get the value of the reply_param pointer from the
efbbc1d5
EC		 1821 * field 'param' of the structure qeth_reply.
1822 */
1823
84dbea46
JW		 1824static int qeth_send_control_data(struct qeth_card *card, int len,
1825 struct qeth_cmd_buffer *iob,
1826 int (*reply_cb)(struct qeth_card *cb_card,
1827 struct qeth_reply *cb_reply,
1828 unsigned long cb_cmd),
1829 void *reply_param)
4a71df50 1830{
750b1625 1831 struct qeth_channel *channel = iob->channel;
782e4a79 1832 long timeout = iob->timeout;
4a71df50 1833 int rc;
4a71df50 1834 struct qeth_reply *reply = NULL;
4a71df50 1835
847a50fd 1836 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50
FB		 1837
1838 reply = qeth_alloc_reply(card);
1839 if (!reply) {
5065b2dd 1840 qeth_release_buffer(channel, iob);
4a71df50
FB		 1841 return -ENOMEM;
1842 }
1843 reply->callback = reply_cb;
1844 reply->param = reply_param;
d22ffb5a 1845
54daaca7
JW		 1846 /* pairs with qeth_release_buffer(): */
1847 qeth_get_reply(reply);
1848 iob->reply = reply;
1849
782e4a79
JW		 1850 timeout = wait_event_interruptible_timeout(card->wait_q,
1851 qeth_trylock_channel(channel),
1852 timeout);
1853 if (timeout <= 0) {
1854 qeth_put_reply(reply);
1855 qeth_release_buffer(channel, iob);
1856 return (timeout == -ERESTARTSYS) ? -EINTR : -ETIME;
1857 }
4a71df50 1858
48ce6f89
JW		 1859 iob->finalize(card, iob, len);
1860 QETH_DBF_HEX(CTRL, 2, iob->data, min(len, QETH_DBF_CTRL_LEN));
d22ffb5a 1861
0951c6ba 1862 qeth_enqueue_reply(card, reply);
1c5b2216 1863
847a50fd 1864 QETH_CARD_TEXT(card, 6, "noirqpnd");
ed47155b 1865 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1866 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
782e4a79 1867 (addr_t) iob, 0, 0, timeout);
ed47155b 1868 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1869 if (rc) {
e19e5be8
JW		 1870 QETH_DBF_MESSAGE(2, "qeth_send_control_data on device %x: ccw_device_start rc = %i\n",
1871 CARD_DEVID(card), rc);
847a50fd 1872 QETH_CARD_TEXT_(card, 2, " err%d", rc);
0951c6ba 1873 qeth_dequeue_reply(card, reply);
4a71df50 1874 qeth_put_reply(reply);
750b1625
JW		 1875 qeth_release_buffer(channel, iob);
1876 atomic_set(&channel->irq_pending, 0);
4a71df50
FB		 1877 wake_up(&card->wait_q);
1878 return rc;
1879 }
5b54e16f 1880
782e4a79
JW		 1881 timeout = wait_for_completion_interruptible_timeout(&reply->received,
1882 timeout);
1883 if (timeout <= 0)
1884 rc = (timeout == -ERESTARTSYS) ? -EINTR : -ETIME;
5b54e16f 1885
0951c6ba 1886 qeth_dequeue_reply(card, reply);
782e4a79
JW		 1887 if (!rc)
1888 rc = reply->rc;
5b54e16f
FB		 1889 qeth_put_reply(reply);
1890 return rc;
4a71df50 1891}
4a71df50 1892
2e873d10
JW		 1893static int qeth_idx_check_activate_response(struct qeth_card *card,
1894 struct qeth_channel *channel,
1895 struct qeth_cmd_buffer *iob)
1896{
1897 int rc;
1898
1899 rc = qeth_check_idx_response(card, iob->data);
1900 if (rc)
1901 return rc;
1902
1903 if (QETH_IS_IDX_ACT_POS_REPLY(iob->data))
1904 return 0;
1905
1906 /* negative reply: */
1907 QETH_DBF_TEXT_(SETUP, 2, "idxneg%c",
1908 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1909
1910 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1911 case QETH_IDX_ACT_ERR_EXCL:
1912 dev_err(&channel->ccwdev->dev,
1913 "The adapter is used exclusively by another host\n");
1914 return -EBUSY;
1915 case QETH_IDX_ACT_ERR_AUTH:
1916 case QETH_IDX_ACT_ERR_AUTH_USER:
1917 dev_err(&channel->ccwdev->dev,
1918 "Setting the device online failed because of insufficient authorization\n");
1919 return -EPERM;
1920 default:
1921 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
1922 CCW_DEVID(channel->ccwdev));
1923 return -EIO;
1924 }
1925}
1926
1927static void qeth_idx_query_read_cb(struct qeth_card *card,
1928 struct qeth_channel *channel,
1929 struct qeth_cmd_buffer *iob)
1930{
1931 u16 peer_level;
1932 int rc;
1933
1934 QETH_DBF_TEXT(SETUP, 2, "idxrdcb");
1935
1936 rc = qeth_idx_check_activate_response(card, channel, iob);
1937 if (rc)
1938 goto out;
1939
1940 memcpy(&peer_level, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1941 if (peer_level != qeth_peer_func_level(card->info.func_level)) {
1942 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1943 CCW_DEVID(channel->ccwdev),
1944 card->info.func_level, peer_level);
1945 rc = -EINVAL;
1946 goto out;
1947 }
1948
1949 memcpy(&card->token.issuer_rm_r,
1950 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1951 QETH_MPC_TOKEN_LENGTH);
1952 memcpy(&card->info.mcl_level[0],
1953 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1954
1955out:
1956 qeth_notify_reply(iob->reply, rc);
1957 qeth_release_buffer(channel, iob);
1958}
1959
1960static void qeth_idx_query_write_cb(struct qeth_card *card,
1961 struct qeth_channel *channel,
1962 struct qeth_cmd_buffer *iob)
1963{
1964 u16 peer_level;
1965 int rc;
1966
1967 QETH_DBF_TEXT(SETUP, 2, "idxwrcb");
1968
1969 rc = qeth_idx_check_activate_response(card, channel, iob);
1970 if (rc)
1971 goto out;
1972
1973 memcpy(&peer_level, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1974 if ((peer_level & ~0x0100) !=
1975 qeth_peer_func_level(card->info.func_level)) {
1976 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1977 CCW_DEVID(channel->ccwdev),
1978 card->info.func_level, peer_level);
1979 rc = -EINVAL;
1980 }
1981
1982out:
1983 qeth_notify_reply(iob->reply, rc);
1984 qeth_release_buffer(channel, iob);
1985}
1986
1987static void qeth_idx_finalize_query_cmd(struct qeth_card *card,
1988 struct qeth_cmd_buffer *iob,
1989 unsigned int length)
1990{
1991 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_READ, length, iob->data);
1992}
1993
1994static void qeth_idx_activate_cb(struct qeth_card *card,
1995 struct qeth_channel *channel,
1996 struct qeth_cmd_buffer *iob)
1997{
1998 qeth_notify_reply(iob->reply, 0);
1999 qeth_release_buffer(channel, iob);
2000}
2001
2002static void qeth_idx_setup_activate_cmd(struct qeth_card *card,
2003 struct qeth_cmd_buffer *iob)
2004{
2005 u16 addr = (card->info.cula << 8) + card->info.unit_addr2;
2006 u8 port = ((u8)card->dev->dev_port) | 0x80;
2007 struct ccw_dev_id dev_id;
2008
2009 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2010 iob->finalize = qeth_idx_finalize_cmd;
2011 iob->callback = qeth_idx_activate_cb;
2012
2013 memcpy(QETH_IDX_ACT_PNO(iob->data), &port, 1);
2014 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2015 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
2016 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
2017 &card->info.func_level, 2);
2018 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &dev_id.devno, 2);
2019 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &addr, 2);
2020}
2021
2022static int qeth_idx_activate_read_channel(struct qeth_card *card)
2023{
2024 struct qeth_channel *channel = &card->read;
2025 struct qeth_cmd_buffer *iob;
2026 int rc;
2027
2028 QETH_DBF_TEXT(SETUP, 2, "idxread");
2029
2030 iob = qeth_get_buffer(channel);
2031 if (!iob)
2032 return -ENOMEM;
2033
2034 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
2035 qeth_idx_setup_activate_cmd(card, iob);
2036
2037 rc = qeth_send_control_data(card, IDX_ACTIVATE_SIZE, iob, NULL, NULL);
2038 if (rc)
2039 return rc;
2040
2041 iob = qeth_get_buffer(channel);
2042 if (!iob)
2043 return -ENOMEM;
2044
2045 iob->finalize = qeth_idx_finalize_query_cmd;
2046 iob->callback = qeth_idx_query_read_cb;
2047 rc = qeth_send_control_data(card, QETH_BUFSIZE, iob, NULL, NULL);
2048 if (rc)
2049 return rc;
2050
2051 channel->state = CH_STATE_UP;
2052 return 0;
2053}
2054
2055static int qeth_idx_activate_write_channel(struct qeth_card *card)
2056{
2057 struct qeth_channel *channel = &card->write;
2058 struct qeth_cmd_buffer *iob;
2059 int rc;
2060
2061 QETH_DBF_TEXT(SETUP, 2, "idxwrite");
2062
2063 iob = qeth_get_buffer(channel);
2064 if (!iob)
2065 return -ENOMEM;
2066
2067 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
2068 qeth_idx_setup_activate_cmd(card, iob);
2069
2070 rc = qeth_send_control_data(card, IDX_ACTIVATE_SIZE, iob, NULL, NULL);
2071 if (rc)
2072 return rc;
2073
2074 iob = qeth_get_buffer(channel);
2075 if (!iob)
2076 return -ENOMEM;
2077
2078 iob->finalize = qeth_idx_finalize_query_cmd;
2079 iob->callback = qeth_idx_query_write_cb;
2080 rc = qeth_send_control_data(card, QETH_BUFSIZE, iob, NULL, NULL);
2081 if (rc)
2082 return rc;
2083
2084 channel->state = CH_STATE_UP;
2085 return 0;
2086}
2087
4a71df50
FB		 2088static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2089 unsigned long data)
2090{
2091 struct qeth_cmd_buffer *iob;
2092
d11ba0c4 2093 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2094
2095 iob = (struct qeth_cmd_buffer *) data;
2096 memcpy(&card->token.cm_filter_r,
2097 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2098 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2099 return 0;
2100}
2101
2102static int qeth_cm_enable(struct qeth_card *card)
2103{
2104 int rc;
2105 struct qeth_cmd_buffer *iob;
2106
d11ba0c4 2107 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2108
2109 iob = qeth_wait_for_buffer(&card->write);
48ce6f89 2110 iob->finalize = qeth_mpc_finalize_cmd;
4a71df50 2111 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
48ce6f89 2112
4a71df50
FB		 2113 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2114 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2115 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2116 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2117
2118 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2119 qeth_cm_enable_cb, NULL);
2120 return rc;
2121}
2122
2123static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2124 unsigned long data)
2125{
4a71df50
FB		 2126 struct qeth_cmd_buffer *iob;
2127
d11ba0c4 2128 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2129
2130 iob = (struct qeth_cmd_buffer *) data;
2131 memcpy(&card->token.cm_connection_r,
2132 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2133 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2134 return 0;
2135}
2136
2137static int qeth_cm_setup(struct qeth_card *card)
2138{
2139 int rc;
2140 struct qeth_cmd_buffer *iob;
2141
d11ba0c4 2142 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2143
2144 iob = qeth_wait_for_buffer(&card->write);
48ce6f89 2145 iob->finalize = qeth_mpc_finalize_cmd;
4a71df50 2146 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
48ce6f89 2147
4a71df50
FB		 2148 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2149 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2150 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2151 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2152 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2153 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2154 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2155 qeth_cm_setup_cb, NULL);
2156 return rc;
4a71df50
FB		 2157}
2158
8ce7a9e0 2159static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
4a71df50 2160{
8ce7a9e0
JW		 2161 struct net_device *dev = card->dev;
2162 unsigned int new_mtu;
2163
2164 if (!max_mtu) {
2165 /* IQD needs accurate max MTU to set up its RX buffers: */
2166 if (IS_IQD(card))
2167 return -EINVAL;
2168 /* tolerate quirky HW: */
2169 max_mtu = ETH_MAX_MTU;
2170 }
2171
2172 rtnl_lock();
2173 if (IS_IQD(card)) {
2174 /* move any device with default MTU to new max MTU: */
2175 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2176
2177 /* adjust RX buffer size to new max MTU: */
2178 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2179 if (dev->max_mtu && dev->max_mtu != max_mtu)
41c47da3 2180 qeth_free_qdio_queues(card);
8ce7a9e0
JW		 2181 } else {
2182 if (dev->mtu)
2183 new_mtu = dev->mtu;
2184 /* default MTUs for first setup: */
4fda3354 2185 else if (IS_LAYER2(card))
8ce7a9e0
JW		 2186 new_mtu = ETH_DATA_LEN;
2187 else
2188 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
4a71df50 2189 }
8ce7a9e0
JW		 2190
2191 dev->max_mtu = max_mtu;
2192 dev->mtu = min(new_mtu, max_mtu);
2193 rtnl_unlock();
2194 return 0;
4a71df50
FB		 2195}
2196
cef6ff22 2197static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2198{
2199 switch (framesize) {
2200 case 0x4000:
2201 return 8192;
2202 case 0x6000:
2203 return 16384;
2204 case 0xa000:
2205 return 32768;
2206 case 0xffff:
2207 return 57344;
2208 default:
2209 return 0;
2210 }
2211}
2212
4a71df50
FB		 2213static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2214 unsigned long data)
2215{
4a71df50
FB		 2216 __u16 mtu, framesize;
2217 __u16 len;
2218 __u8 link_type;
2219 struct qeth_cmd_buffer *iob;
2220
d11ba0c4 2221 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2222
2223 iob = (struct qeth_cmd_buffer *) data;
2224 memcpy(&card->token.ulp_filter_r,
2225 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2226 QETH_MPC_TOKEN_LENGTH);
9853b97b 2227 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2228 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2229 mtu = qeth_get_mtu_outof_framesize(framesize);
4a71df50 2230 } else {
8ce7a9e0 2231 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
4a71df50 2232 }
8ce7a9e0 2233 *(u16 *)reply->param = mtu;
4a71df50
FB		 2234
2235 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2236 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2237 memcpy(&link_type,
2238 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2239 card->info.link_type = link_type;
2240 } else
2241 card->info.link_type = 0;
01fc3e86 2242 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
4a71df50
FB		 2243 return 0;
2244}
2245
73657a3e
JW		 2246static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2247{
2248 if (IS_OSN(card))
2249 return QETH_PROT_OSN2;
4fda3354 2250 return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
73657a3e
JW		 2251}
2252
4a71df50
FB		 2253static int qeth_ulp_enable(struct qeth_card *card)
2254{
73657a3e 2255 u8 prot_type = qeth_mpc_select_prot_type(card);
4a71df50 2256 struct qeth_cmd_buffer *iob;
8ce7a9e0 2257 u16 max_mtu;
73657a3e 2258 int rc;
4a71df50
FB		 2259
2260 /*FIXME: trace view callbacks*/
d11ba0c4 2261 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2262
2263 iob = qeth_wait_for_buffer(&card->write);
48ce6f89 2264 iob->finalize = qeth_mpc_finalize_cmd;
4a71df50
FB		 2265 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2266
92d27209 2267 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
4a71df50
FB		 2268 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2269 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2270 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2271 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2272 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50 2273 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
8ce7a9e0
JW		 2274 qeth_ulp_enable_cb, &max_mtu);
2275 if (rc)
2276 return rc;
2277 return qeth_update_max_mtu(card, max_mtu);
4a71df50
FB		 2278}
2279
2280static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2281 unsigned long data)
2282{
2283 struct qeth_cmd_buffer *iob;
2284
d11ba0c4 2285 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2286
2287 iob = (struct qeth_cmd_buffer *) data;
2288 memcpy(&card->token.ulp_connection_r,
2289 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2290 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2291 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2292 3)) {
2293 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2294 dev_err(&card->gdev->dev, "A connection could not be "
2295 "established because of an OLM limit\n");
4b7ae122 2296 return -EMLINK;
65a1f898 2297 }
7bf9bcff 2298 return 0;
4a71df50
FB		 2299}
2300
2301static int qeth_ulp_setup(struct qeth_card *card)
2302{
2303 int rc;
2304 __u16 temp;
2305 struct qeth_cmd_buffer *iob;
2306 struct ccw_dev_id dev_id;
2307
d11ba0c4 2308 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2309
2310 iob = qeth_wait_for_buffer(&card->write);
48ce6f89 2311 iob->finalize = qeth_mpc_finalize_cmd;
4a71df50
FB		 2312 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2313
2314 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2315 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2316 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2317 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2318 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2319 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2320
2321 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2322 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2323 temp = (card->info.cula << 8) + card->info.unit_addr2;
2324 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2325 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2326 qeth_ulp_setup_cb, NULL);
2327 return rc;
2328}
2329
0da9581d
EL		 2330static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2331{
0da9581d
EL		 2332 struct qeth_qdio_out_buffer *newbuf;
2333
0da9581d 2334 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
3b346c18
JW		 2335 if (!newbuf)
2336 return -ENOMEM;
2337
d445a4e2 2338 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2339 skb_queue_head_init(&newbuf->skb_list);
2340 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2341 newbuf->q = q;
0da9581d
EL		 2342 newbuf->next_pending = q->bufs[bidx];
2343 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2344 q->bufs[bidx] = newbuf;
3b346c18 2345 return 0;
0da9581d
EL		 2346}
2347
afa0c590 2348static void qeth_free_output_queue(struct qeth_qdio_out_q *q)
d445a4e2
SO		 2349{
2350 if (!q)
2351 return;
2352
41c47da3 2353 qeth_drain_output_queue(q, true);
d445a4e2
SO		 2354 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2355 kfree(q);
2356}
2357
41c47da3 2358static struct qeth_qdio_out_q *qeth_alloc_output_queue(void)
d445a4e2
SO		 2359{
2360 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2361
2362 if (!q)
2363 return NULL;
2364
2365 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2366 kfree(q);
2367 return NULL;
2368 }
2369 return q;
2370}
0da9581d 2371
41c47da3 2372static int qeth_alloc_qdio_queues(struct qeth_card *card)
4a71df50
FB		 2373{
2374 int i, j;
2375
d11ba0c4 2376 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2377
2378 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2379 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2380 return 0;
2381
4601ba6c
SO		 2382 QETH_DBF_TEXT(SETUP, 2, "inq");
2383 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2384 if (!card->qdio.in_q)
2385 goto out_nomem;
4601ba6c 2386
4a71df50
FB		 2387 /* inbound buffer pool */
2388 if (qeth_alloc_buffer_pool(card))
2389 goto out_freeinq;
0da9581d 2390
4a71df50 2391 /* outbound */
4a71df50 2392 for (i = 0; i < card->qdio.no_out_queues; ++i) {
41c47da3 2393 card->qdio.out_qs[i] = qeth_alloc_output_queue();
4a71df50
FB		 2394 if (!card->qdio.out_qs[i])
2395 goto out_freeoutq;
d11ba0c4
PT		 2396 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2397 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2398 card->qdio.out_qs[i]->queue_no = i;
2399 /* give outbound qeth_qdio_buffers their qdio_buffers */
2400 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2401 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2402 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2403 goto out_freeoutqbufs;
4a71df50
FB		 2404 }
2405 }
0da9581d
EL		 2406
2407 /* completion */
2408 if (qeth_alloc_cq(card))
2409 goto out_freeoutq;
2410
4a71df50
FB		 2411 return 0;
2412
0da9581d
EL		 2413out_freeoutqbufs:
2414 while (j > 0) {
2415 --j;
2416 kmem_cache_free(qeth_qdio_outbuf_cache,
2417 card->qdio.out_qs[i]->bufs[j]);
2418 card->qdio.out_qs[i]->bufs[j] = NULL;
2419 }
4a71df50 2420out_freeoutq:
bb92d3f8 2421 while (i > 0) {
afa0c590 2422 qeth_free_output_queue(card->qdio.out_qs[--i]);
bb92d3f8
JW		 2423 card->qdio.out_qs[i] = NULL;
2424 }
4a71df50
FB		 2425 qeth_free_buffer_pool(card);
2426out_freeinq:
4601ba6c 2427 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2428 card->qdio.in_q = NULL;
2429out_nomem:
2430 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2431 return -ENOMEM;
2432}
2433
41c47da3 2434static void qeth_free_qdio_queues(struct qeth_card *card)
d445a4e2
SO		 2435{
2436 int i, j;
2437
2438 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2439 QETH_QDIO_UNINITIALIZED)
2440 return;
2441
2442 qeth_free_cq(card);
2443 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2444 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2445 if (card->qdio.in_q->bufs[j].rx_skb)
2446 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2447 }
2448 qeth_free_qdio_queue(card->qdio.in_q);
2449 card->qdio.in_q = NULL;
2450 /* inbound buffer pool */
2451 qeth_free_buffer_pool(card);
2452 /* free outbound qdio_qs */
bb92d3f8
JW		 2453 for (i = 0; i < card->qdio.no_out_queues; i++) {
2454 qeth_free_output_queue(card->qdio.out_qs[i]);
2455 card->qdio.out_qs[i] = NULL;
d445a4e2
SO		 2456 }
2457}
2458
4a71df50
FB		 2459static void qeth_create_qib_param_field(struct qeth_card *card,
2460 char *param_field)
2461{
2462
2463 param_field[0] = _ascebc['P'];
2464 param_field[1] = _ascebc['C'];
2465 param_field[2] = _ascebc['I'];
2466 param_field[3] = _ascebc['T'];
2467 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2468 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2469 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2470}
2471
2472static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2473 char *param_field)
2474{
2475 param_field[16] = _ascebc['B'];
2476 param_field[17] = _ascebc['L'];
2477 param_field[18] = _ascebc['K'];
2478 param_field[19] = _ascebc['T'];
2479 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2480 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2481 *((unsigned int *) (&param_field[28])) =
2482 card->info.blkt.inter_packet_jumbo;
2483}
2484
2485static int qeth_qdio_activate(struct qeth_card *card)
2486{
d11ba0c4 2487 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2488 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2489}
2490
2491static int qeth_dm_act(struct qeth_card *card)
2492{
2493 int rc;
2494 struct qeth_cmd_buffer *iob;
2495
d11ba0c4 2496 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2497
2498 iob = qeth_wait_for_buffer(&card->write);
48ce6f89 2499 iob->finalize = qeth_mpc_finalize_cmd;
4a71df50
FB		 2500 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2501
2502 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2503 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2504 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2505 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2506 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2507 return rc;
2508}
2509
2510static int qeth_mpc_initialize(struct qeth_card *card)
2511{
2512 int rc;
2513
d11ba0c4 2514 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2515
2516 rc = qeth_issue_next_read(card);
2517 if (rc) {
d11ba0c4 2518 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2519 return rc;
2520 }
2521 rc = qeth_cm_enable(card);
2522 if (rc) {
d11ba0c4 2523 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2524 goto out_qdio;
2525 }
2526 rc = qeth_cm_setup(card);
2527 if (rc) {
d11ba0c4 2528 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2529 goto out_qdio;
2530 }
2531 rc = qeth_ulp_enable(card);
2532 if (rc) {
d11ba0c4 2533 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2534 goto out_qdio;
2535 }
2536 rc = qeth_ulp_setup(card);
2537 if (rc) {
d11ba0c4 2538 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2539 goto out_qdio;
2540 }
41c47da3 2541 rc = qeth_alloc_qdio_queues(card);
4a71df50 2542 if (rc) {
d11ba0c4 2543 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2544 goto out_qdio;
2545 }
2546 rc = qeth_qdio_establish(card);
2547 if (rc) {
d11ba0c4 2548 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
41c47da3 2549 qeth_free_qdio_queues(card);
4a71df50
FB		 2550 goto out_qdio;
2551 }
2552 rc = qeth_qdio_activate(card);
2553 if (rc) {
d11ba0c4 2554 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2555 goto out_qdio;
2556 }
2557 rc = qeth_dm_act(card);
2558 if (rc) {
d11ba0c4 2559 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2560 goto out_qdio;
2561 }
2562
2563 return 0;
2564out_qdio:
2565 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2566 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2567 return rc;
2568}
2569
4a71df50
FB		 2570void qeth_print_status_message(struct qeth_card *card)
2571{
2572 switch (card->info.type) {
5113fec0
UB		 2573 case QETH_CARD_TYPE_OSD:
2574 case QETH_CARD_TYPE_OSM:
2575 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2576 /* VM will use a non-zero first character
2577 * to indicate a HiperSockets like reporting
2578 * of the level OSA sets the first character to zero
2579 * */
2580 if (!card->info.mcl_level[0]) {
2581 sprintf(card->info.mcl_level, "%02x%02x",
2582 card->info.mcl_level[2],
2583 card->info.mcl_level[3]);
4a71df50
FB		 2584 break;
2585 }
2586 /* fallthrough */
2587 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2588 if ((card->info.guestlan) ||
2589 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2590 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2591 card->info.mcl_level[0]];
2592 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2593 card->info.mcl_level[1]];
2594 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2595 card->info.mcl_level[2]];
2596 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2597 card->info.mcl_level[3]];
2598 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2599 }
2600 break;
2601 default:
2602 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2603 }
239ff408
UB		 2604 dev_info(&card->gdev->dev,
2605 "Device is a%s card%s%s%s\nwith link type %s.\n",
2606 qeth_get_cardname(card),
2607 (card->info.mcl_level[0]) ? " (level: " : "",
2608 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2609 (card->info.mcl_level[0]) ? ")" : "",
2610 qeth_get_cardname_short(card));
4a71df50
FB		 2611}
2612EXPORT_SYMBOL_GPL(qeth_print_status_message);
2613
4a71df50
FB		 2614static void qeth_initialize_working_pool_list(struct qeth_card *card)
2615{
2616 struct qeth_buffer_pool_entry *entry;
2617
847a50fd 2618 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2619
2620 list_for_each_entry(entry,
2621 &card->qdio.init_pool.entry_list, init_list) {
2622 qeth_put_buffer_pool_entry(card, entry);
2623 }
2624}
2625
cef6ff22
JW		 2626static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2627 struct qeth_card *card)
4a71df50
FB		 2628{
2629 struct list_head *plh;
2630 struct qeth_buffer_pool_entry *entry;
2631 int i, free;
2632 struct page *page;
2633
2634 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2635 return NULL;
2636
2637 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2638 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2639 free = 1;
2640 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2641 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2642 free = 0;
2643 break;
2644 }
2645 }
2646 if (free) {
2647 list_del_init(&entry->list);
2648 return entry;
2649 }
2650 }
2651
2652 /* no free buffer in pool so take first one and swap pages */
2653 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2654 struct qeth_buffer_pool_entry, list);
2655 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2656 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2657 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2658 if (!page) {
2659 return NULL;
2660 } else {
2661 free_page((unsigned long)entry->elements[i]);
2662 entry->elements[i] = page_address(page);
b0abc4f5 2663 QETH_CARD_STAT_INC(card, rx_sg_alloc_page);
4a71df50
FB		 2664 }
2665 }
2666 }
2667 list_del_init(&entry->list);
2668 return entry;
2669}
2670
2671static int qeth_init_input_buffer(struct qeth_card *card,
2672 struct qeth_qdio_buffer *buf)
2673{
2674 struct qeth_buffer_pool_entry *pool_entry;
2675 int i;
2676
b3332930 2677 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2678 buf->rx_skb = netdev_alloc_skb(card->dev,
2679 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2680 if (!buf->rx_skb)
2681 return 1;
2682 }
2683
4a71df50
FB		 2684 pool_entry = qeth_find_free_buffer_pool_entry(card);
2685 if (!pool_entry)
2686 return 1;
2687
2688 /*
2689 * since the buffer is accessed only from the input_tasklet
2690 * there shouldn't be a need to synchronize; also, since we use
2691 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2692 * buffers
2693 */
4a71df50
FB		 2694
2695 buf->pool_entry = pool_entry;
2696 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2697 buf->buffer->element[i].length = PAGE_SIZE;
2698 buf->buffer->element[i].addr = pool_entry->elements[i];
2699 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2700 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2701 else
3ec90878
JG		 2702 buf->buffer->element[i].eflags = 0;
2703 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2704 }
2705 return 0;
2706}
2707
2708int qeth_init_qdio_queues(struct qeth_card *card)
2709{
2710 int i, j;
2711 int rc;
2712
d11ba0c4 2713 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2714
2715 /* inbound queue */
1b45c80b
JW		 2716 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2717 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2718 qeth_initialize_working_pool_list(card);
2719 /*give only as many buffers to hardware as we have buffer pool entries*/
2720 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2721 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2722 card->qdio.in_q->next_buf_to_init =
2723 card->qdio.in_buf_pool.buf_count - 1;
2724 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2725 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2726 if (rc) {
d11ba0c4 2727 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2728 return rc;
2729 }
0da9581d
EL		 2730
2731 /* completion */
2732 rc = qeth_cq_init(card);
2733 if (rc) {
2734 return rc;
2735 }
2736
4a71df50
FB		 2737 /* outbound queue */
2738 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2739 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2740 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2741 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2742 qeth_clear_output_buffer(card->qdio.out_qs[i],
3b346c18 2743 card->qdio.out_qs[i]->bufs[j]);
4a71df50
FB		 2744 }
2745 card->qdio.out_qs[i]->card = card;
2746 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2747 card->qdio.out_qs[i]->do_pack = 0;
2748 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2749 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2750 atomic_set(&card->qdio.out_qs[i]->state,
2751 QETH_OUT_Q_UNLOCKED);
2752 }
2753 return 0;
2754}
2755EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2756
cef6ff22 2757static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2758{
2759 switch (link_type) {
2760 case QETH_LINK_TYPE_HSTR:
2761 return 2;
2762 default:
2763 return 1;
2764 }
2765}
2766
2767static void qeth_fill_ipacmd_header(struct qeth_card *card,
500abbf0
JW		 2768 struct qeth_ipa_cmd *cmd,
2769 enum qeth_ipa_cmds command,
2770 enum qeth_prot_versions prot)
4a71df50 2771{
4a71df50
FB		 2772 cmd->hdr.command = command;
2773 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2774 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50 2775 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
92d27209 2776 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
4fda3354 2777 cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
4a71df50
FB		 2778 cmd->hdr.param_count = 1;
2779 cmd->hdr.prot_version = prot;
4a71df50
FB		 2780}
2781
48ce6f89
JW		 2782static void qeth_ipa_finalize_cmd(struct qeth_card *card,
2783 struct qeth_cmd_buffer *iob,
2784 unsigned int length)
2785{
2786 qeth_mpc_finalize_cmd(card, iob, length);
2787
2788 /* override with IPA-specific values: */
2789 __ipa_cmd(iob)->hdr.seqno = card->seqno.ipa;
2790 iob->reply->seqno = card->seqno.ipa++;
2791}
2792
c2153277
JW		 2793void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2794 u16 cmd_length)
605c9d5f 2795{
c2153277 2796 u16 total_length = IPA_PDU_HEADER_SIZE + cmd_length;
605c9d5f
JW		 2797 u8 prot_type = qeth_mpc_select_prot_type(card);
2798
48ce6f89 2799 iob->finalize = qeth_ipa_finalize_cmd;
782e4a79
JW		 2800 iob->timeout = QETH_IPA_TIMEOUT;
2801
605c9d5f 2802 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
c2153277 2803 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &total_length, 2);
605c9d5f 2804 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
c2153277
JW		 2805 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &cmd_length, 2);
2806 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &cmd_length, 2);
605c9d5f
JW		 2807 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2808 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
c2153277 2809 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &cmd_length, 2);
605c9d5f
JW		 2810}
2811EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2812
4a71df50
FB		 2813struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2814 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2815{
2816 struct qeth_cmd_buffer *iob;
4a71df50 2817
1aec42bc
TR		 2818 iob = qeth_get_buffer(&card->write);
2819 if (iob) {
c2153277 2820 qeth_prepare_ipa_cmd(card, iob, sizeof(struct qeth_ipa_cmd));
ff5caa7a 2821 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2822 } else {
2823 dev_warn(&card->gdev->dev,
2824 "The qeth driver ran out of channel command buffers\n");
e19e5be8
JW		 2825 QETH_DBF_MESSAGE(1, "device %x ran out of channel command buffers",
2826 CARD_DEVID(card));
1aec42bc 2827 }
4a71df50
FB		 2828
2829 return iob;
2830}
2831EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2832
742d4d40
JW		 2833static int qeth_send_ipa_cmd_cb(struct qeth_card *card,
2834 struct qeth_reply *reply, unsigned long data)
2835{
2836 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
2837
2838 return (cmd->hdr.return_code) ? -EIO : 0;
2839}
2840
efbbc1d5
EC		 2841/**
2842 * qeth_send_ipa_cmd() - send an IPA command
2843 *
2844 * See qeth_send_control_data() for explanation of the arguments.
2845 */
2846
4a71df50
FB		 2847int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2848 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2849 unsigned long),
2850 void *reply_param)
2851{
c2153277 2852 u16 length;
4a71df50 2853 int rc;
4a71df50 2854
847a50fd 2855 QETH_CARD_TEXT(card, 4, "sendipa");
742d4d40 2856
2e873d10
JW		 2857 if (card->read_or_write_problem) {
2858 qeth_release_buffer(iob->channel, iob);
2859 return -EIO;
2860 }
2861
742d4d40
JW		 2862 if (reply_cb == NULL)
2863 reply_cb = qeth_send_ipa_cmd_cb;
c2153277
JW		 2864 memcpy(&length, QETH_IPA_PDU_LEN_TOTAL(iob->data), 2);
2865 rc = qeth_send_control_data(card, length, iob, reply_cb, reply_param);
908abbb5
UB		 2866 if (rc == -ETIME) {
2867 qeth_clear_ipacmd_list(card);
2868 qeth_schedule_recovery(card);
2869 }
4a71df50
FB		 2870 return rc;
2871}
2872EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2873
4b7ae122
JW		 2874static int qeth_send_startlan_cb(struct qeth_card *card,
2875 struct qeth_reply *reply, unsigned long data)
2876{
2877 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
2878
2879 if (cmd->hdr.return_code == IPA_RC_LAN_OFFLINE)
2880 return -ENETDOWN;
2881
2882 return (cmd->hdr.return_code) ? -EIO : 0;
2883}
2884
10340510 2885static int qeth_send_startlan(struct qeth_card *card)
4a71df50 2886{
70919e23 2887 struct qeth_cmd_buffer *iob;
4a71df50 2888
d11ba0c4 2889 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2890
70919e23 2891 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2892 if (!iob)
2893 return -ENOMEM;
4b7ae122 2894 return qeth_send_ipa_cmd(card, iob, qeth_send_startlan_cb, NULL);
4a71df50 2895}
4a71df50 2896
686c97ee 2897static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 2898{
686c97ee 2899 if (!cmd->hdr.return_code)
4a71df50
FB		 2900 cmd->hdr.return_code =
2901 cmd->data.setadapterparms.hdr.return_code;
686c97ee 2902 return cmd->hdr.return_code;
4a71df50 2903}
4a71df50
FB		 2904
2905static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2906 struct qeth_reply *reply, unsigned long data)
2907{
686c97ee 2908 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 2909
847a50fd 2910 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee 2911 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 2912 return -EIO;
4a71df50 2913
5113fec0 2914 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2915 card->info.link_type =
2916 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2917 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2918 }
4a71df50
FB		 2919 card->options.adp.supported_funcs =
2920 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 2921 return 0;
4a71df50
FB		 2922}
2923
eb3fb0ba 2924static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2925 __u32 command, __u32 cmdlen)
2926{
2927 struct qeth_cmd_buffer *iob;
2928 struct qeth_ipa_cmd *cmd;
2929
2930 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2931 QETH_PROT_IPV4);
1aec42bc 2932 if (iob) {
ff5caa7a 2933 cmd = __ipa_cmd(iob);
1aec42bc
TR		 2934 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2935 cmd->data.setadapterparms.hdr.command_code = command;
2936 cmd->data.setadapterparms.hdr.used_total = 1;
2937 cmd->data.setadapterparms.hdr.seq_no = 1;
2938 }
4a71df50
FB		 2939
2940 return iob;
2941}
4a71df50 2942
09960b3a 2943static int qeth_query_setadapterparms(struct qeth_card *card)
4a71df50
FB		 2944{
2945 int rc;
2946 struct qeth_cmd_buffer *iob;
2947
847a50fd 2948 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2949 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2950 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 2951 if (!iob)
2952 return -ENOMEM;
4a71df50
FB		 2953 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2954 return rc;
2955}
4a71df50 2956
1da74b1c
FB		 2957static int qeth_query_ipassists_cb(struct qeth_card *card,
2958 struct qeth_reply *reply, unsigned long data)
2959{
2960 struct qeth_ipa_cmd *cmd;
2961
2962 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2963
2964 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2965
2966 switch (cmd->hdr.return_code) {
742d4d40
JW		 2967 case IPA_RC_SUCCESS:
2968 break;
a134884a
SR		 2969 case IPA_RC_NOTSUPP:
2970 case IPA_RC_L2_UNSUPPORTED_CMD:
2971 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2972 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2973 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
742d4d40 2974 return -EOPNOTSUPP;
a134884a 2975 default:
742d4d40
JW		 2976 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Unhandled rc=%#x\n",
2977 CARD_DEVID(card), cmd->hdr.return_code);
2978 return -EIO;
a134884a
SR		 2979 }
2980
1da74b1c
FB		 2981 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2982 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2983 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2984 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 2985 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2986 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2987 } else
e19e5be8
JW		 2988 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Flawed LIC detected\n",
2989 CARD_DEVID(card));
1da74b1c
FB		 2990 return 0;
2991}
2992
09960b3a
JW		 2993static int qeth_query_ipassists(struct qeth_card *card,
2994 enum qeth_prot_versions prot)
1da74b1c
FB		 2995{
2996 int rc;
2997 struct qeth_cmd_buffer *iob;
2998
2999 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3000 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3001 if (!iob)
3002 return -ENOMEM;
1da74b1c
FB		 3003 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3004 return rc;
3005}
1da74b1c 3006
45cbb2e4
SR		 3007static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3008 struct qeth_reply *reply, unsigned long data)
3009{
686c97ee 3010 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3011 struct qeth_query_switch_attributes *attrs;
686c97ee 3012 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3013
3014 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee 3015 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 3016 return -EIO;
45cbb2e4 3017
686c97ee
JW		 3018 sw_info = (struct qeth_switch_info *)reply->param;
3019 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3020 sw_info->capabilities = attrs->capabilities;
3021 sw_info->settings = attrs->settings;
3022 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3023 sw_info->settings);
45cbb2e4
SR		 3024 return 0;
3025}
3026
3027int qeth_query_switch_attributes(struct qeth_card *card,
3028 struct qeth_switch_info *sw_info)
3029{
3030 struct qeth_cmd_buffer *iob;
3031
3032 QETH_CARD_TEXT(card, 2, "qswiattr");
3033 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3034 return -EOPNOTSUPP;
3035 if (!netif_carrier_ok(card->dev))
3036 return -ENOMEDIUM;
3037 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3038 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3039 if (!iob)
3040 return -ENOMEM;
45cbb2e4
SR		 3041 return qeth_send_ipa_cmd(card, iob,
3042 qeth_query_switch_attributes_cb, sw_info);
3043}
45cbb2e4 3044
1da74b1c
FB		 3045static int qeth_query_setdiagass_cb(struct qeth_card *card,
3046 struct qeth_reply *reply, unsigned long data)
3047{
742d4d40
JW		 3048 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
3049 u16 rc = cmd->hdr.return_code;
1da74b1c 3050
742d4d40 3051 if (rc) {
1da74b1c 3052 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
742d4d40
JW		 3053 return -EIO;
3054 }
3055
3056 card->info.diagass_support = cmd->data.diagass.ext;
1da74b1c
FB		 3057 return 0;
3058}
3059
3060static int qeth_query_setdiagass(struct qeth_card *card)
3061{
3062 struct qeth_cmd_buffer *iob;
3063 struct qeth_ipa_cmd *cmd;
3064
3065 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3066 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3067 if (!iob)
3068 return -ENOMEM;
ff5caa7a 3069 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3070 cmd->data.diagass.subcmd_len = 16;
3071 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3072 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3073}
3074
3075static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3076{
3077 unsigned long info = get_zeroed_page(GFP_KERNEL);
3078 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3079 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3080 struct ccw_dev_id ccwid;
caf757c6 3081 int level;
1da74b1c
FB		 3082
3083 tid->chpid = card->info.chpid;
3084 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3085 tid->ssid = ccwid.ssid;
3086 tid->devno = ccwid.devno;
3087 if (!info)
3088 return;
caf757c6
HC		 3089 level = stsi(NULL, 0, 0, 0);
3090 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3091 tid->lparnr = info222->lpar_number;
caf757c6 3092 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3093 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3094 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3095 }
3096 free_page(info);
3097 return;
3098}
3099
3100static int qeth_hw_trap_cb(struct qeth_card *card,
3101 struct qeth_reply *reply, unsigned long data)
3102{
742d4d40
JW		 3103 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
3104 u16 rc = cmd->hdr.return_code;
1da74b1c 3105
742d4d40 3106 if (rc) {
1da74b1c 3107 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
742d4d40
JW		 3108 return -EIO;
3109 }
1da74b1c
FB		 3110 return 0;
3111}
3112
3113int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3114{
3115 struct qeth_cmd_buffer *iob;
3116 struct qeth_ipa_cmd *cmd;
3117
3118 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3119 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3120 if (!iob)
3121 return -ENOMEM;
ff5caa7a 3122 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3123 cmd->data.diagass.subcmd_len = 80;
3124 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3125 cmd->data.diagass.type = 1;
3126 cmd->data.diagass.action = action;
3127 switch (action) {
3128 case QETH_DIAGS_TRAP_ARM:
3129 cmd->data.diagass.options = 0x0003;
3130 cmd->data.diagass.ext = 0x00010000 +
3131 sizeof(struct qeth_trap_id);
3132 qeth_get_trap_id(card,
3133 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3134 break;
3135 case QETH_DIAGS_TRAP_DISARM:
3136 cmd->data.diagass.options = 0x0001;
3137 break;
3138 case QETH_DIAGS_TRAP_CAPTURE:
3139 break;
3140 }
3141 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3142}
3143EXPORT_SYMBOL_GPL(qeth_hw_trap);
3144
d73ef324
JW		 3145static int qeth_check_qdio_errors(struct qeth_card *card,
3146 struct qdio_buffer *buf,
3147 unsigned int qdio_error,
3148 const char *dbftext)
4a71df50 3149{
779e6e1c 3150 if (qdio_error) {
847a50fd 3151 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3152 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3153 buf->element[15].sflags);
38593d01 3154 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3155 buf->element[14].sflags);
38593d01 3156 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3157 if ((buf->element[15].sflags) == 0x12) {
b0abc4f5 3158 QETH_CARD_STAT_INC(card, rx_dropped);
76b11f8e
UB		 3159 return 0;
3160 } else
3161 return 1;
4a71df50
FB		 3162 }
3163 return 0;
3164}
4a71df50 3165
d73ef324 3166static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3167{
3168 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3169 struct list_head *lh;
4a71df50
FB		 3170 int count;
3171 int i;
3172 int rc;
3173 int newcount = 0;
3174
4a71df50
FB		 3175 count = (index < queue->next_buf_to_init)?
3176 card->qdio.in_buf_pool.buf_count -
3177 (queue->next_buf_to_init - index) :
3178 card->qdio.in_buf_pool.buf_count -
3179 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3180 /* only requeue at a certain threshold to avoid SIGAs */
3181 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3182 for (i = queue->next_buf_to_init;
3183 i < queue->next_buf_to_init + count; ++i) {
3184 if (qeth_init_input_buffer(card,
3185 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3186 break;
3187 } else {
3188 newcount++;
3189 }
3190 }
3191
3192 if (newcount < count) {
3193 /* we are in memory shortage so we switch back to
3194 traditional skb allocation and drop packages */
4a71df50
FB		 3195 atomic_set(&card->force_alloc_skb, 3);
3196 count = newcount;
3197 } else {
4a71df50
FB		 3198 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3199 }
3200
b3332930
FB		 3201 if (!count) {
3202 i = 0;
3203 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3204 i++;
3205 if (i == card->qdio.in_buf_pool.buf_count) {
3206 QETH_CARD_TEXT(card, 2, "qsarbw");
3207 card->reclaim_index = index;
3208 schedule_delayed_work(
3209 &card->buffer_reclaim_work,
3210 QETH_RECLAIM_WORK_TIME);
3211 }
3212 return;
3213 }
3214
4a71df50
FB		 3215 /*
3216 * according to old code it should be avoided to requeue all
3217 * 128 buffers in order to benefit from PCI avoidance.
3218 * this function keeps at least one buffer (the buffer at
3219 * 'index') un-requeued -> this buffer is the first buffer that
3220 * will be requeued the next time
3221 */
779e6e1c
JG		 3222 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3223 queue->next_buf_to_init, count);
4a71df50 3224 if (rc) {
847a50fd 3225 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3226 }
3227 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3228 QDIO_MAX_BUFFERS_PER_Q;
3229 }
3230}
d73ef324
JW		 3231
3232static void qeth_buffer_reclaim_work(struct work_struct *work)
3233{
3234 struct qeth_card *card = container_of(work, struct qeth_card,
3235 buffer_reclaim_work.work);
3236
3237 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3238 qeth_queue_input_buffer(card, card->reclaim_index);
3239}
4a71df50 3240
d7a39937 3241static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3242 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3243{
3ec90878 3244 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3245
847a50fd 3246 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3247 if (card->info.type == QETH_CARD_TYPE_IQD) {
3248 if (sbalf15 == 0) {
3249 qdio_err = 0;
3250 } else {
3251 qdio_err = 1;
3252 }
3253 }
76b11f8e 3254 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3255
3256 if (!qdio_err)
d7a39937 3257 return;
d303b6fd
JG		 3258
3259 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3260 return;
d303b6fd 3261
847a50fd
CO		 3262 QETH_CARD_TEXT(card, 1, "lnkfail");
3263 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3264 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3265}
3266
664e42ac
JW		 3267/**
3268 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3269 * @queue: queue to check for packing buffer
3270 *
3271 * Returns number of buffers that were prepared for flush.
3272 */
3273static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3274{
3275 struct qeth_qdio_out_buffer *buffer;
3276
3277 buffer = queue->bufs[queue->next_buf_to_fill];
3278 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3279 (buffer->next_element_to_fill > 0)) {
3280 /* it's a packing buffer */
3281 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3282 queue->next_buf_to_fill =
3283 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3284 return 1;
3285 }
3286 return 0;
3287}
3288
4a71df50
FB		 3289/*
3290 * Switched to packing state if the number of used buffers on a queue
3291 * reaches a certain limit.
3292 */
3293static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3294{
3295 if (!queue->do_pack) {
3296 if (atomic_read(&queue->used_buffers)
3297 >= QETH_HIGH_WATERMARK_PACK){
3298 /* switch non-PACKING -> PACKING */
847a50fd 3299 QETH_CARD_TEXT(queue->card, 6, "np->pack");
b0abc4f5 3300 QETH_TXQ_STAT_INC(queue, packing_mode_switch);
4a71df50
FB		 3301 queue->do_pack = 1;
3302 }
3303 }
3304}
3305
3306/*
3307 * Switches from packing to non-packing mode. If there is a packing
3308 * buffer on the queue this buffer will be prepared to be flushed.
3309 * In that case 1 is returned to inform the caller. If no buffer
3310 * has to be flushed, zero is returned.
3311 */
3312static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3313{
4a71df50
FB		 3314 if (queue->do_pack) {
3315 if (atomic_read(&queue->used_buffers)
3316 <= QETH_LOW_WATERMARK_PACK) {
3317 /* switch PACKING -> non-PACKING */
847a50fd 3318 QETH_CARD_TEXT(queue->card, 6, "pack->np");
b0abc4f5 3319 QETH_TXQ_STAT_INC(queue, packing_mode_switch);
4a71df50 3320 queue->do_pack = 0;
664e42ac 3321 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3322 }
3323 }
4a71df50
FB		 3324 return 0;
3325}
3326
779e6e1c
JG		 3327static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3328 int count)
4a71df50
FB		 3329{
3330 struct qeth_qdio_out_buffer *buf;
3331 int rc;
3332 int i;
3333 unsigned int qdio_flags;
3334
4a71df50 3335 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3336 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3337 buf = queue->bufs[bidx];
3ec90878
JG		 3338 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3339 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3340
0da9581d
EL		 3341 if (queue->bufstates)
3342 queue->bufstates[bidx].user = buf;
3343
4a71df50
FB		 3344 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3345 continue;
3346
3347 if (!queue->do_pack) {
3348 if ((atomic_read(&queue->used_buffers) >=
3349 (QETH_HIGH_WATERMARK_PACK -
3350 QETH_WATERMARK_PACK_FUZZ)) &&
3351 !atomic_read(&queue->set_pci_flags_count)) {
3352 /* it's likely that we'll go to packing
3353 * mode soon */
3354 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3355 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3356 }
3357 } else {
3358 if (!atomic_read(&queue->set_pci_flags_count)) {
3359 /*
3360 * there's no outstanding PCI any more, so we
3361 * have to request a PCI to be sure the the PCI
3362 * will wake at some time in the future then we
3363 * can flush packed buffers that might still be
3364 * hanging around, which can happen if no
3365 * further send was requested by the stack
3366 */
3367 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3368 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3369 }
3370 }
3371 }
3372
b0abc4f5 3373 QETH_TXQ_STAT_ADD(queue, bufs, count);
4a71df50 3374 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3375 if (atomic_read(&queue->set_pci_flags_count))
3376 qdio_flags |= QDIO_FLAG_PCI_OUT;
a702349a 3377 atomic_add(count, &queue->used_buffers);
4a71df50 3378 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3379 queue->queue_no, index, count);
4a71df50 3380 if (rc) {
b0abc4f5 3381 QETH_TXQ_STAT_ADD(queue, tx_errors, count);
d303b6fd 3382 /* ignore temporary SIGA errors without busy condition */
1549d13f 3383 if (rc == -ENOBUFS)
d303b6fd 3384 return;
847a50fd 3385 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3386 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3387 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3388 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3389 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3390
4a71df50
FB		 3391 /* this must not happen under normal circumstances. if it
3392 * happens something is really wrong -> recover */
3393 qeth_schedule_recovery(queue->card);
3394 return;
3395 }
4a71df50
FB		 3396}
3397
3398static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3399{
3400 int index;
3401 int flush_cnt = 0;
3402 int q_was_packing = 0;
3403
3404 /*
3405 * check if weed have to switch to non-packing mode or if
3406 * we have to get a pci flag out on the queue
3407 */
3408 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3409 !atomic_read(&queue->set_pci_flags_count)) {
3410 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3411 QETH_OUT_Q_UNLOCKED) {
3412 /*
3413 * If we get in here, there was no action in
3414 * do_send_packet. So, we check if there is a
3415 * packing buffer to be flushed here.
3416 */
3417 netif_stop_queue(queue->card->dev);
3418 index = queue->next_buf_to_fill;
3419 q_was_packing = queue->do_pack;
3420 /* queue->do_pack may change */
3421 barrier();
3422 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3423 if (!flush_cnt &&
3424 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3425 flush_cnt += qeth_prep_flush_pack_buffer(queue);
b0abc4f5
JW		 3426 if (q_was_packing)
3427 QETH_TXQ_STAT_ADD(queue, bufs_pack, flush_cnt);
4a71df50 3428 if (flush_cnt)
779e6e1c 3429 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3430 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3431 }
3432 }
3433}
3434
7bcd64eb
JW		 3435static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3436 unsigned long card_ptr)
a1c3ed4c
FB		 3437{
3438 struct qeth_card *card = (struct qeth_card *)card_ptr;
3439
d3d1b205 3440 if (card->dev->flags & IFF_UP)
a1c3ed4c
FB		 3441 napi_schedule(&card->napi);
3442}
a1c3ed4c 3443
0da9581d
EL		 3444int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3445{
3446 int rc;
3447
3448 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3449 rc = -1;
3450 goto out;
3451 } else {
3452 if (card->options.cq == cq) {
3453 rc = 0;
3454 goto out;
3455 }
3456
d7d543f2 3457 if (card->state != CARD_STATE_DOWN) {
0da9581d
EL		 3458 rc = -1;
3459 goto out;
3460 }
3461
41c47da3 3462 qeth_free_qdio_queues(card);
0da9581d
EL		 3463 card->options.cq = cq;
3464 rc = 0;
3465 }
3466out:
3467 return rc;
3468
3469}
3470EXPORT_SYMBOL_GPL(qeth_configure_cq);
3471
3b346c18
JW		 3472static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
3473 unsigned int queue, int first_element,
3474 int count)
3475{
0da9581d
EL		 3476 struct qeth_qdio_q *cq = card->qdio.c_q;
3477 int i;
3478 int rc;
3479
3480 if (!qeth_is_cq(card, queue))
4326b5b4 3481 return;
0da9581d
EL		 3482
3483 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3484 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3485 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3486
3487 if (qdio_err) {
3a18d754 3488 netif_tx_stop_all_queues(card->dev);
0da9581d 3489 qeth_schedule_recovery(card);
4326b5b4 3490 return;
0da9581d
EL		 3491 }
3492
3493 for (i = first_element; i < first_element + count; ++i) {
3494 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3495 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3b346c18 3496 int e = 0;
0da9581d 3497
903e4853
UB		 3498 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3499 buffer->element[e].addr) {
0da9581d
EL		 3500 unsigned long phys_aob_addr;
3501
3502 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3503 qeth_qdio_handle_aob(card, phys_aob_addr);
0da9581d
EL		 3504 ++e;
3505 }
3b346c18 3506 qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
0da9581d
EL		 3507 }
3508 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3509 card->qdio.c_q->next_buf_to_init,
3510 count);
3511 if (rc) {
3512 dev_warn(&card->gdev->dev,
3513 "QDIO reported an error, rc=%i\n", rc);
3514 QETH_CARD_TEXT(card, 2, "qcqherr");
3515 }
3516 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3517 + count) % QDIO_MAX_BUFFERS_PER_Q;
0da9581d
EL		 3518}
3519
7bcd64eb
JW		 3520static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3521 unsigned int qdio_err, int queue,
3522 int first_elem, int count,
3523 unsigned long card_ptr)
a1c3ed4c
FB		 3524{
3525 struct qeth_card *card = (struct qeth_card *)card_ptr;
3526
0da9581d
EL		 3527 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3528 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3529
3530 if (qeth_is_cq(card, queue))
3531 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3532 else if (qdio_err)
a1c3ed4c
FB		 3533 qeth_schedule_recovery(card);
3534}
a1c3ed4c 3535
7bcd64eb
JW		 3536static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3537 unsigned int qdio_error, int __queue,
3538 int first_element, int count,
3539 unsigned long card_ptr)
4a71df50
FB		 3540{
3541 struct qeth_card *card = (struct qeth_card *) card_ptr;
3542 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3543 struct qeth_qdio_out_buffer *buffer;
3a18d754
JW		 3544 struct net_device *dev = card->dev;
3545 u16 txq;
4a71df50
FB		 3546 int i;
3547
847a50fd 3548 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3549 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3550 QETH_CARD_TEXT(card, 2, "achkcond");
3a18d754 3551 netif_tx_stop_all_queues(dev);
779e6e1c
JG		 3552 qeth_schedule_recovery(card);
3553 return;
4a71df50 3554 }
4326b5b4 3555
4a71df50 3556 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3557 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3558 buffer = queue->bufs[bidx];
b67d801f 3559 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3560
3561 if (queue->bufstates &&
3562 (queue->bufstates[bidx].flags &
3563 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3564 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3565
3566 if (atomic_cmpxchg(&buffer->state,
3567 QETH_QDIO_BUF_PRIMED,
3568 QETH_QDIO_BUF_PENDING) ==
3569 QETH_QDIO_BUF_PRIMED) {
3570 qeth_notify_skbs(queue, buffer,
3571 TX_NOTIFY_PENDING);
3572 }
0da9581d 3573 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
ce28867f
JW		 3574
3575 /* prepare the queue slot for re-use: */
3576 qeth_scrub_qdio_buffer(buffer->buffer,
3577 QETH_MAX_BUFFER_ELEMENTS(card));
b3332930
FB		 3578 if (qeth_init_qdio_out_buf(queue, bidx)) {
3579 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3580 qeth_schedule_recovery(card);
b3332930 3581 }
0da9581d 3582 } else {
b3332930
FB		 3583 if (card->options.cq == QETH_CQ_ENABLED) {
3584 enum iucv_tx_notify n;
3585
3586 n = qeth_compute_cq_notification(
3587 buffer->buffer->element[15].sflags, 0);
3588 qeth_notify_skbs(queue, buffer, n);
3589 }
3590
3b346c18 3591 qeth_clear_output_buffer(queue, buffer);
0da9581d
EL		 3592 }
3593 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3594 }
3595 atomic_sub(count, &queue->used_buffers);
3596 /* check if we need to do something on this outbound queue */
3597 if (card->info.type != QETH_CARD_TYPE_IQD)
3598 qeth_check_outbound_queue(queue);
3599
3a18d754
JW		 3600 txq = IS_IQD(card) ? qeth_iqd_translate_txq(dev, __queue) : 0;
3601 netif_wake_subqueue(dev, txq);
4a71df50 3602}
4a71df50 3603
70deb016
HW		 3604/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3605static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3606{
3607 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3608 return 2;
3609 return queue_num;
3610}
3611
290b8348
SR		 3612/**
3613 * Note: Function assumes that we have 4 outbound queues.
3614 */
4a71df50 3615int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
86c0cdb9 3616 int ipv)
4a71df50 3617{
d66cb37e 3618 __be16 *tci;
290b8348
SR		 3619 u8 tos;
3620
290b8348
SR		 3621 switch (card->qdio.do_prio_queueing) {
3622 case QETH_PRIO_Q_ING_TOS:
3623 case QETH_PRIO_Q_ING_PREC:
3624 switch (ipv) {
3625 case 4:
3626 tos = ipv4_get_dsfield(ip_hdr(skb));
3627 break;
3628 case 6:
3629 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3630 break;
3631 default:
3632 return card->qdio.default_out_queue;
4a71df50 3633 }
290b8348 3634 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3635 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3636 if (tos & IPTOS_MINCOST)
70deb016 3637 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3638 if (tos & IPTOS_RELIABILITY)
3639 return 2;
3640 if (tos & IPTOS_THROUGHPUT)
3641 return 1;
3642 if (tos & IPTOS_LOWDELAY)
3643 return 0;
d66cb37e
SR		 3644 break;
3645 case QETH_PRIO_Q_ING_SKB:
3646 if (skb->priority > 5)
3647 return 0;
70deb016 3648 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3649 case QETH_PRIO_Q_ING_VLAN:
3650 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3651 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3652 return qeth_cut_iqd_prio(card,
3653 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3654 break;
4a71df50 3655 default:
290b8348 3656 break;
4a71df50 3657 }
290b8348 3658 return card->qdio.default_out_queue;
4a71df50
FB		 3659}
3660EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3661
2863c613
EC		 3662/**
3663 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3664 * @skb: SKB address
3665 *
3666 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3667 * fragmented part of the SKB. Returns zero for linear SKB.
3668 */
356156b6 3669static int qeth_get_elements_for_frags(struct sk_buff *skb)
271648b4 3670{
2863c613 3671 int cnt, elements = 0;
271648b4
FB		 3672
3673 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3674 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3675
3676 elements += qeth_get_elements_for_range(
3677 (addr_t)skb_frag_address(frag),
3678 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3679 }
3680 return elements;
3681}
271648b4 3682
40e6a225
JW		 3683/**
3684 * qeth_count_elements() - Counts the number of QDIO buffer elements needed
3685 * to transmit an skb.
3686 * @skb: the skb to operate on.
3687 * @data_offset: skip this part of the skb's linear data
3688 *
3689 * Returns the number of pages, and thus QDIO buffer elements, needed to map the
3690 * skb's data (both its linear part and paged fragments).
3691 */
3692unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset)
ba86ceee
JW		 3693{
3694 unsigned int elements = qeth_get_elements_for_frags(skb);
3695 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3696 addr_t start = (addr_t)skb->data + data_offset;
3697
3698 if (start != end)
3699 elements += qeth_get_elements_for_range(start, end);
3700 return elements;
3701}
40e6a225 3702EXPORT_SYMBOL_GPL(qeth_count_elements);
4a71df50 3703
e517b649
JW		 3704#define QETH_HDR_CACHE_OBJ_SIZE (sizeof(struct qeth_hdr_tso) + \
3705 MAX_TCP_HEADER)
55494264 3706
0d6f02d3 3707/**
ba86ceee
JW		 3708 * qeth_add_hw_header() - add a HW header to an skb.
3709 * @skb: skb that the HW header should be added to.
0d6f02d3
JW		 3710 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3711 * it contains a valid pointer to a qeth_hdr.
a7c2f4a3
JW		 3712 * @hdr_len: length of the HW header.
3713 * @proto_len: length of protocol headers that need to be in same page as the
3714 * HW header.
0d6f02d3
JW		 3715 *
3716 * Returns the pushed length. If the header can't be pushed on
3717 * (eg. because it would cross a page boundary), it is allocated from
3718 * the cache instead and 0 is returned.
ba86ceee 3719 * The number of needed buffer elements is returned in @elements.
0d6f02d3
JW		 3720 * Error to create the hdr is indicated by returning with < 0.
3721 */
b0abc4f5
JW		 3722static int qeth_add_hw_header(struct qeth_qdio_out_q *queue,
3723 struct sk_buff *skb, struct qeth_hdr **hdr,
3724 unsigned int hdr_len, unsigned int proto_len,
3725 unsigned int *elements)
ba86ceee 3726{
b0abc4f5 3727 const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(queue->card);
a7c2f4a3 3728 const unsigned int contiguous = proto_len ? proto_len : 1;
ba86ceee
JW		 3729 unsigned int __elements;
3730 addr_t start, end;
3731 bool push_ok;
3732 int rc;
3733
3734check_layout:
a7c2f4a3 3735 start = (addr_t)skb->data - hdr_len;
ba86ceee
JW		 3736 end = (addr_t)skb->data;
3737
a7c2f4a3 3738 if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
ba86ceee
JW		 3739 /* Push HW header into same page as first protocol header. */
3740 push_ok = true;
e517b649
JW		 3741 /* ... but TSO always needs a separate element for headers: */
3742 if (skb_is_gso(skb))
3743 __elements = 1 + qeth_count_elements(skb, proto_len);
3744 else
3745 __elements = qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3746 } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
3747 /* Push HW header into a new page. */
3748 push_ok = true;
ba86ceee 3749 __elements = 1 + qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3750 } else {
3751 /* Use header cache, copy protocol headers up. */
3752 push_ok = false;
3753 __elements = 1 + qeth_count_elements(skb, proto_len);
ba86ceee
JW		 3754 }
3755
3756 /* Compress skb to fit into one IO buffer: */
3757 if (__elements > max_elements) {
3758 if (!skb_is_nonlinear(skb)) {
3759 /* Drop it, no easy way of shrinking it further. */
3760 QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
3761 max_elements, __elements, skb->len);
3762 return -E2BIG;
3763 }
3764
3765 rc = skb_linearize(skb);
b0abc4f5
JW		 3766 if (rc) {
3767 QETH_TXQ_STAT_INC(queue, skbs_linearized_fail);
ba86ceee 3768 return rc;
b0abc4f5 3769 }
ba86ceee 3770
b0abc4f5 3771 QETH_TXQ_STAT_INC(queue, skbs_linearized);
ba86ceee
JW		 3772 /* Linearization changed the layout, re-evaluate: */
3773 goto check_layout;
3774 }
3775
3776 *elements = __elements;
3777 /* Add the header: */
3778 if (push_ok) {
a7c2f4a3
JW		 3779 *hdr = skb_push(skb, hdr_len);
3780 return hdr_len;
0d6f02d3
JW		 3781 }
3782 /* fall back */
55494264
JW		 3783 if (hdr_len + proto_len > QETH_HDR_CACHE_OBJ_SIZE)
3784 return -E2BIG;
0d6f02d3
JW		 3785 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3786 if (!*hdr)
3787 return -ENOMEM;
a7c2f4a3
JW		 3788 /* Copy protocol headers behind HW header: */
3789 skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
0d6f02d3
JW		 3790 return 0;
3791}
0d6f02d3 3792
cef6ff22
JW		 3793static void __qeth_fill_buffer(struct sk_buff *skb,
3794 struct qeth_qdio_out_buffer *buf,
3795 bool is_first_elem, unsigned int offset)
4a71df50 3796{
384d2ef1
JW		 3797 struct qdio_buffer *buffer = buf->buffer;
3798 int element = buf->next_element_to_fill;
cc309f83
JW		 3799 int length = skb_headlen(skb) - offset;
3800 char *data = skb->data + offset;
384d2ef1 3801 int length_here, cnt;
4a71df50 3802
cc309f83 3803 /* map linear part into buffer element(s) */
4a71df50
FB		 3804 while (length > 0) {
3805 /* length_here is the remaining amount of data in this page */
3806 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3807 if (length < length_here)
3808 length_here = length;
3809
3810 buffer->element[element].addr = data;
3811 buffer->element[element].length = length_here;
3812 length -= length_here;
384d2ef1
JW		 3813 if (is_first_elem) {
3814 is_first_elem = false;
5258830b
JW		 3815 if (length || skb_is_nonlinear(skb))
3816 /* skb needs additional elements */
3ec90878 3817 buffer->element[element].eflags =
5258830b 3818 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3819 else
5258830b
JW		 3820 buffer->element[element].eflags = 0;
3821 } else {
3822 buffer->element[element].eflags =
3823 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3824 }
3825 data += length_here;
3826 element++;
4a71df50 3827 }
51aa165c 3828
cc309f83 3829 /* map page frags into buffer element(s) */
51aa165c 3830 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3831 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3832
3833 data = skb_frag_address(frag);
3834 length = skb_frag_size(frag);
271648b4
FB		 3835 while (length > 0) {
3836 length_here = PAGE_SIZE -
3837 ((unsigned long) data % PAGE_SIZE);
3838 if (length < length_here)
3839 length_here = length;
3840
3841 buffer->element[element].addr = data;
3842 buffer->element[element].length = length_here;
3843 buffer->element[element].eflags =
3844 SBAL_EFLAGS_MIDDLE_FRAG;
3845 length -= length_here;
3846 data += length_here;
3847 element++;
3848 }
51aa165c
FB		 3849 }
3850
3ec90878
JG		 3851 if (buffer->element[element - 1].eflags)
3852 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3853 buf->next_element_to_fill = element;
4a71df50
FB		 3854}
3855
eaf3cc08
JW		 3856/**
3857 * qeth_fill_buffer() - map skb into an output buffer
3858 * @queue: QDIO queue to submit the buffer on
3859 * @buf: buffer to transport the skb
3860 * @skb: skb to map into the buffer
3861 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3862 * from qeth_core_header_cache.
3863 * @offset: when mapping the skb, start at skb->data + offset
3864 * @hd_len: if > 0, build a dedicated header element of this size
3865 */
cef6ff22
JW		 3866static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3867 struct qeth_qdio_out_buffer *buf,
3868 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3869 unsigned int offset, unsigned int hd_len)
4a71df50 3870{
eaf3cc08 3871 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3872 bool is_first_elem = true;
4a71df50 3873
dc149e37 3874 __skb_queue_tail(&buf->skb_list, skb);
4a71df50 3875
eaf3cc08
JW		 3876 /* build dedicated header element */
3877 if (hd_len) {
683d718a 3878 int element = buf->next_element_to_fill;
384d2ef1
JW		 3879 is_first_elem = false;
3880
683d718a 3881 buffer->element[element].addr = hdr;
f1588177 3882 buffer->element[element].length = hd_len;
3ec90878 3883 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3884 /* remember to free cache-allocated qeth_hdr: */
3885 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3886 buf->next_element_to_fill++;
3887 }
3888
384d2ef1 3889 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3890
3891 if (!queue->do_pack) {
847a50fd 3892 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50 3893 } else {
847a50fd 3894 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
f72b4644 3895
b0abc4f5 3896 QETH_TXQ_STAT_INC(queue, skbs_pack);
f72b4644
JW		 3897 /* If the buffer still has free elements, keep using it. */
3898 if (buf->next_element_to_fill <
3899 QETH_MAX_BUFFER_ELEMENTS(queue->card))
3900 return 0;
4a71df50 3901 }
f72b4644
JW		 3902
3903 /* flush out the buffer */
3904 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3905 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3906 QDIO_MAX_BUFFERS_PER_Q;
3907 return 1;
4a71df50
FB		 3908}
3909
81ec5439
JW		 3910static int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue,
3911 struct sk_buff *skb, struct qeth_hdr *hdr,
3912 unsigned int offset, unsigned int hd_len)
4a71df50 3913{
7c2e9ba3
JW		 3914 int index = queue->next_buf_to_fill;
3915 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 3916
4a71df50
FB		 3917 /*
3918 * check if buffer is empty to make sure that we do not 'overtake'
3919 * ourselves and try to fill a buffer that is already primed
3920 */
3921 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3 3922 return -EBUSY;
64ef8957
FB		 3923 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3924 qeth_flush_buffers(queue, index, 1);
4a71df50 3925 return 0;
4a71df50 3926}
4a71df50
FB		 3927
3928int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 3929 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 3930 unsigned int offset, unsigned int hd_len,
3931 int elements_needed)
4a71df50
FB		 3932{
3933 struct qeth_qdio_out_buffer *buffer;
3934 int start_index;
3935 int flush_count = 0;
3936 int do_pack = 0;
3937 int tmp;
3938 int rc = 0;
3939
4a71df50
FB		 3940 /* spin until we get the queue ... */
3941 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3942 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3943 start_index = queue->next_buf_to_fill;
0da9581d 3944 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3945 /*
3946 * check if buffer is empty to make sure that we do not 'overtake'
3947 * ourselves and try to fill a buffer that is already primed
3948 */
3949 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3950 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3951 return -EBUSY;
3952 }
3953 /* check if we need to switch packing state of this queue */
3954 qeth_switch_to_packing_if_needed(queue);
3955 if (queue->do_pack) {
3956 do_pack = 1;
64ef8957
FB		 3957 /* does packet fit in current buffer? */
3958 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3959 buffer->next_element_to_fill) < elements_needed) {
3960 /* ... no -> set state PRIMED */
3961 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3962 flush_count++;
3963 queue->next_buf_to_fill =
3964 (queue->next_buf_to_fill + 1) %
3965 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3966 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3967 /* we did a step forward, so check buffer state
3968 * again */
3969 if (atomic_read(&buffer->state) !=
3970 QETH_QDIO_BUF_EMPTY) {
3971 qeth_flush_buffers(queue, start_index,
779e6e1c 3972 flush_count);
64ef8957 3973 atomic_set(&queue->state,
4a71df50 3974 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 3975 rc = -EBUSY;
3976 goto out;
4a71df50
FB		 3977 }
3978 }
3979 }
f72b4644
JW		 3980
3981 flush_count += qeth_fill_buffer(queue, buffer, skb, hdr, offset,
3982 hd_len);
4a71df50 3983 if (flush_count)
779e6e1c 3984 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3985 else if (!atomic_read(&queue->set_pci_flags_count))
3986 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3987 /*
3988 * queue->state will go from LOCKED -> UNLOCKED or from
3989 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3990 * (switch packing state or flush buffer to get another pci flag out).
3991 * In that case we will enter this loop
3992 */
3993 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 3994 start_index = queue->next_buf_to_fill;
3995 /* check if we can go back to non-packing state */
3cdc8a25 3996 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 3997 /*
3998 * check if we need to flush a packing buffer to get a pci
3999 * flag out on the queue
4000 */
3cdc8a25
JW		 4001 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4002 tmp = qeth_prep_flush_pack_buffer(queue);
4003 if (tmp) {
4004 qeth_flush_buffers(queue, start_index, tmp);
4005 flush_count += tmp;
4006 }
4a71df50 4007 }
3cdc8a25 4008out:
4a71df50 4009 /* at this point the queue is UNLOCKED again */
b0abc4f5
JW		 4010 if (do_pack)
4011 QETH_TXQ_STAT_ADD(queue, bufs_pack, flush_count);
4a71df50
FB		 4012
4013 return rc;
4014}
4015EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4016
81ec5439
JW		 4017static void qeth_fill_tso_ext(struct qeth_hdr_tso *hdr,
4018 unsigned int payload_len, struct sk_buff *skb,
4019 unsigned int proto_len)
82bf5c08
JW		 4020{
4021 struct qeth_hdr_ext_tso *ext = &hdr->ext;
4022
4023 ext->hdr_tot_len = sizeof(*ext);
4024 ext->imb_hdr_no = 1;
4025 ext->hdr_type = 1;
4026 ext->hdr_version = 1;
4027 ext->hdr_len = 28;
4028 ext->payload_len = payload_len;
4029 ext->mss = skb_shinfo(skb)->gso_size;
4030 ext->dg_hdr_len = proto_len;
4031}
82bf5c08 4032
fc69660b
JW		 4033int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
4034 struct qeth_qdio_out_q *queue, int ipv, int cast_type,
b0abc4f5
JW		 4035 void (*fill_header)(struct qeth_qdio_out_q *queue,
4036 struct qeth_hdr *hdr, struct sk_buff *skb,
4037 int ipv, int cast_type,
fc69660b
JW		 4038 unsigned int data_len))
4039{
82bf5c08 4040 unsigned int proto_len, hw_hdr_len;
fc69660b 4041 unsigned int frame_len = skb->len;
82bf5c08 4042 bool is_tso = skb_is_gso(skb);
fc69660b
JW		 4043 unsigned int data_offset = 0;
4044 struct qeth_hdr *hdr = NULL;
4045 unsigned int hd_len = 0;
4046 unsigned int elements;
4047 int push_len, rc;
4048 bool is_sg;
4049
82bf5c08
JW		 4050 if (is_tso) {
4051 hw_hdr_len = sizeof(struct qeth_hdr_tso);
4052 proto_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4053 } else {
4054 hw_hdr_len = sizeof(struct qeth_hdr);
81ec5439 4055 proto_len = (IS_IQD(card) && IS_LAYER2(card)) ? ETH_HLEN : 0;
82bf5c08
JW		 4056 }
4057
fc69660b
JW		 4058 rc = skb_cow_head(skb, hw_hdr_len);
4059 if (rc)
4060 return rc;
4061
b0abc4f5 4062 push_len = qeth_add_hw_header(queue, skb, &hdr, hw_hdr_len, proto_len,
fc69660b
JW		 4063 &elements);
4064 if (push_len < 0)
4065 return push_len;
82bf5c08 4066 if (is_tso || !push_len) {
fc69660b
JW		 4067 /* HW header needs its own buffer element. */
4068 hd_len = hw_hdr_len + proto_len;
82bf5c08 4069 data_offset = push_len + proto_len;
fc69660b 4070 }
e517b649 4071 memset(hdr, 0, hw_hdr_len);
b0abc4f5 4072 fill_header(queue, hdr, skb, ipv, cast_type, frame_len);
82bf5c08
JW		 4073 if (is_tso)
4074 qeth_fill_tso_ext((struct qeth_hdr_tso *) hdr,
4075 frame_len - proto_len, skb, proto_len);
fc69660b
JW		 4076
4077 is_sg = skb_is_nonlinear(skb);
4078 if (IS_IQD(card)) {
4079 rc = qeth_do_send_packet_fast(queue, skb, hdr, data_offset,
4080 hd_len);
4081 } else {
4082 /* TODO: drop skb_orphan() once TX completion is fast enough */
4083 skb_orphan(skb);
4084 rc = qeth_do_send_packet(card, queue, skb, hdr, data_offset,
4085 hd_len, elements);
4086 }
4087
4088 if (!rc) {
b0abc4f5
JW		 4089 QETH_TXQ_STAT_ADD(queue, buf_elements, elements);
4090 if (is_sg)
4091 QETH_TXQ_STAT_INC(queue, skbs_sg);
4092 if (is_tso) {
4093 QETH_TXQ_STAT_INC(queue, skbs_tso);
4094 QETH_TXQ_STAT_ADD(queue, tso_bytes, frame_len);
fc69660b
JW		 4095 }
4096 } else {
4097 if (!push_len)
4098 kmem_cache_free(qeth_core_header_cache, hdr);
4099 if (rc == -EBUSY)
4100 /* roll back to ETH header */
4101 skb_pull(skb, push_len);
4102 }
4103 return rc;
4104}
4105EXPORT_SYMBOL_GPL(qeth_xmit);
4106
4a71df50
FB		 4107static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4108 struct qeth_reply *reply, unsigned long data)
4109{
686c97ee 4110 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4111 struct qeth_ipacmd_setadpparms *setparms;
4112
847a50fd 4113 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4114
4a71df50 4115 setparms = &(cmd->data.setadapterparms);
686c97ee 4116 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4117 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4118 setparms->data.mode = SET_PROMISC_MODE_OFF;
4119 }
4120 card->info.promisc_mode = setparms->data.mode;
742d4d40 4121 return (cmd->hdr.return_code) ? -EIO : 0;
4a71df50
FB		 4122}
4123
4124void qeth_setadp_promisc_mode(struct qeth_card *card)
4125{
4126 enum qeth_ipa_promisc_modes mode;
4127 struct net_device *dev = card->dev;
4128 struct qeth_cmd_buffer *iob;
4129 struct qeth_ipa_cmd *cmd;
4130
847a50fd 4131 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4132
4133 if (((dev->flags & IFF_PROMISC) &&
4134 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4135 (!(dev->flags & IFF_PROMISC) &&
4136 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4137 return;
4138 mode = SET_PROMISC_MODE_OFF;
4139 if (dev->flags & IFF_PROMISC)
4140 mode = SET_PROMISC_MODE_ON;
847a50fd 4141 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4142
4143 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4144 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4145 if (!iob)
4146 return;
ff5caa7a 4147 cmd = __ipa_cmd(iob);
4a71df50
FB		 4148 cmd->data.setadapterparms.data.mode = mode;
4149 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4150}
4151EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4152
4a71df50
FB		 4153static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4154 struct qeth_reply *reply, unsigned long data)
4155{
686c97ee 4156 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
b144b99f 4157 struct qeth_ipacmd_setadpparms *adp_cmd;
4a71df50 4158
847a50fd 4159 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee 4160 if (qeth_setadpparms_inspect_rc(cmd))
4b7ae122 4161 return -EIO;
4a71df50 4162
b144b99f 4163 adp_cmd = &cmd->data.setadapterparms;
4b7ae122
JW		 4164 if (!is_valid_ether_addr(adp_cmd->data.change_addr.addr))
4165 return -EADDRNOTAVAIL;
4166
b144b99f
JW		 4167 if (IS_LAYER2(card) && IS_OSD(card) && !IS_VM_NIC(card) &&
4168 !(adp_cmd->hdr.flags & QETH_SETADP_FLAGS_VIRTUAL_MAC))
4b7ae122 4169 return -EADDRNOTAVAIL;
b144b99f
JW		 4170
4171 ether_addr_copy(card->dev->dev_addr, adp_cmd->data.change_addr.addr);
4a71df50
FB		 4172 return 0;
4173}
4174
4175int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4176{
4177 int rc;
4178 struct qeth_cmd_buffer *iob;
4179 struct qeth_ipa_cmd *cmd;
4180
847a50fd 4181 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4182
4183 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4184 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4185 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4186 if (!iob)
4187 return -ENOMEM;
ff5caa7a 4188 cmd = __ipa_cmd(iob);
4a71df50 4189 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4190 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4191 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4192 card->dev->dev_addr);
4a71df50
FB		 4193 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4194 NULL);
4195 return rc;
4196}
4197EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4198
d64ecc22
EL		 4199static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4200 struct qeth_reply *reply, unsigned long data)
4201{
686c97ee 4202 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4203 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4204 int fallback = *(int *)reply->param;
d64ecc22 4205
847a50fd 4206 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee 4207 if (cmd->hdr.return_code)
742d4d40 4208 return -EIO;
686c97ee 4209 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4210
d64ecc22
EL		 4211 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4212 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4213 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4214 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4215 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4216 if (cmd->data.setadapterparms.hdr.return_code !=
4217 SET_ACCESS_CTRL_RC_SUCCESS)
e19e5be8
JW		 4218 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%#x) on device %x: %#x\n",
4219 access_ctrl_req->subcmd_code, CARD_DEVID(card),
4220 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4221 switch (cmd->data.setadapterparms.hdr.return_code) {
4222 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4223 if (card->options.isolation == ISOLATION_MODE_NONE) {
4224 dev_info(&card->gdev->dev,
4225 "QDIO data connection isolation is deactivated\n");
4226 } else {
4227 dev_info(&card->gdev->dev,
4228 "QDIO data connection isolation is activated\n");
4229 }
d64ecc22 4230 break;
0f54761d 4231 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
e19e5be8
JW		 4232 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already deactivated\n",
4233 CARD_DEVID(card));
0f54761d
SR		 4234 if (fallback)
4235 card->options.isolation = card->options.prev_isolation;
4236 break;
4237 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
e19e5be8
JW		 4238 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already activated\n",
4239 CARD_DEVID(card));
0f54761d
SR		 4240 if (fallback)
4241 card->options.isolation = card->options.prev_isolation;
4242 break;
d64ecc22 4243 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4244 dev_err(&card->gdev->dev, "Adapter does not "
4245 "support QDIO data connection isolation\n");
d64ecc22 4246 break;
d64ecc22 4247 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4248 dev_err(&card->gdev->dev,
4249 "Adapter is dedicated. "
4250 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4251 if (fallback)
4252 card->options.isolation = card->options.prev_isolation;
d64ecc22 4253 break;
d64ecc22 4254 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4255 dev_err(&card->gdev->dev,
4256 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4257 if (fallback)
4258 card->options.isolation = card->options.prev_isolation;
4259 break;
4260 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4261 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4262 "support reflective relay mode\n");
4263 if (fallback)
4264 card->options.isolation = card->options.prev_isolation;
4265 break;
4266 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4267 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4268 "enabled at the adjacent switch port");
4269 if (fallback)
4270 card->options.isolation = card->options.prev_isolation;
4271 break;
4272 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4273 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4274 "at the adjacent switch failed\n");
d64ecc22 4275 break;
d64ecc22 4276 default:
d64ecc22 4277 /* this should never happen */
0f54761d
SR		 4278 if (fallback)
4279 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4280 break;
4281 }
742d4d40 4282 return (cmd->hdr.return_code) ? -EIO : 0;
d64ecc22
EL		 4283}
4284
4285static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4286 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4287{
4288 int rc;
4289 struct qeth_cmd_buffer *iob;
4290 struct qeth_ipa_cmd *cmd;
4291 struct qeth_set_access_ctrl *access_ctrl_req;
4292
847a50fd 4293 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4294
4295 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4296 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4297
4298 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4299 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4300 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4301 if (!iob)
4302 return -ENOMEM;
ff5caa7a 4303 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4304 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4305 access_ctrl_req->subcmd_code = isolation;
4306
4307 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4308 &fallback);
d64ecc22
EL		 4309 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4310 return rc;
4311}
4312
0f54761d 4313int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4314{
4315 int rc = 0;
4316
847a50fd 4317 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4318
5113fec0
UB		 4319 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4320 card->info.type == QETH_CARD_TYPE_OSX) &&
4321 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4322 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4323 card->options.isolation, fallback);
d64ecc22 4324 if (rc) {
e19e5be8
JW		 4325 QETH_DBF_MESSAGE(3, "IPA(SET_ACCESS_CTRL(%d) on device %x: sent failed\n",
4326 rc, CARD_DEVID(card));
0f54761d 4327 rc = -EOPNOTSUPP;
d64ecc22
EL		 4328 }
4329 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4330 card->options.isolation = ISOLATION_MODE_NONE;
4331
4332 dev_err(&card->gdev->dev, "Adapter does not "
4333 "support QDIO data connection isolation\n");
4334 rc = -EOPNOTSUPP;
4335 }
4336 return rc;
4337}
4338EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4339
4a71df50
FB		 4340void qeth_tx_timeout(struct net_device *dev)
4341{
4342 struct qeth_card *card;
4343
509e2562 4344 card = dev->ml_priv;
847a50fd 4345 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4346 qeth_schedule_recovery(card);
4347}
4348EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4349
942d6984 4350static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4351{
509e2562 4352 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4353 int rc = 0;
4354
4355 switch (regnum) {
4356 case MII_BMCR: /* Basic mode control register */
4357 rc = BMCR_FULLDPLX;
4358 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4359 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
54e049c2
JW		 4360 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH) &&
4361 (card->info.link_type != QETH_LINK_TYPE_25GBIT_ETH))
4a71df50
FB		 4362 rc |= BMCR_SPEED100;
4363 break;
4364 case MII_BMSR: /* Basic mode status register */
4365 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4366 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4367 BMSR_100BASE4;
4368 break;
4369 case MII_PHYSID1: /* PHYS ID 1 */
4370 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4371 dev->dev_addr[2];
4372 rc = (rc >> 5) & 0xFFFF;
4373 break;
4374 case MII_PHYSID2: /* PHYS ID 2 */
4375 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4376 break;
4377 case MII_ADVERTISE: /* Advertisement control reg */
4378 rc = ADVERTISE_ALL;
4379 break;
4380 case MII_LPA: /* Link partner ability reg */
4381 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4382 LPA_100BASE4 | LPA_LPACK;
4383 break;
4384 case MII_EXPANSION: /* Expansion register */
4385 break;
4386 case MII_DCOUNTER: /* disconnect counter */
4387 break;
4388 case MII_FCSCOUNTER: /* false carrier counter */
4389 break;
4390 case MII_NWAYTEST: /* N-way auto-neg test register */
4391 break;
4392 case MII_RERRCOUNTER: /* rx error counter */
4393 rc = card->stats.rx_errors;
4394 break;
4395 case MII_SREVISION: /* silicon revision */
4396 break;
4397 case MII_RESV1: /* reserved 1 */
4398 break;
4399 case MII_LBRERROR: /* loopback, rx, bypass error */
4400 break;
4401 case MII_PHYADDR: /* physical address */
4402 break;
4403 case MII_RESV2: /* reserved 2 */
4404 break;
4405 case MII_TPISTATUS: /* TPI status for 10mbps */
4406 break;
4407 case MII_NCONFIG: /* network interface config */
4408 break;
4409 default:
4410 break;
4411 }
4412 return rc;
4413}
4a71df50 4414
4a71df50
FB		 4415static int qeth_snmp_command_cb(struct qeth_card *card,
4416 struct qeth_reply *reply, unsigned long sdata)
4417{
4418 struct qeth_ipa_cmd *cmd;
4419 struct qeth_arp_query_info *qinfo;
4a71df50 4420 unsigned char *data;
9a764c1e 4421 void *snmp_data;
4a71df50
FB		 4422 __u16 data_len;
4423
847a50fd 4424 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4425
4426 cmd = (struct qeth_ipa_cmd *) sdata;
4427 data = (unsigned char *)((char *)cmd - reply->offset);
4428 qinfo = (struct qeth_arp_query_info *) reply->param;
4a71df50
FB		 4429
4430 if (cmd->hdr.return_code) {
8a593148 4431 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4b7ae122 4432 return -EIO;
4a71df50
FB		 4433 }
4434 if (cmd->data.setadapterparms.hdr.return_code) {
4435 cmd->hdr.return_code =
4436 cmd->data.setadapterparms.hdr.return_code;
8a593148 4437 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4b7ae122 4438 return -EIO;
4a71df50
FB		 4439 }
4440 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
9a764c1e
JW		 4441 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4442 snmp_data = &cmd->data.setadapterparms.data.snmp;
4443 data_len -= offsetof(struct qeth_ipa_cmd,
4444 data.setadapterparms.data.snmp);
4445 } else {
4446 snmp_data = &cmd->data.setadapterparms.data.snmp.request;
4447 data_len -= offsetof(struct qeth_ipa_cmd,
4448 data.setadapterparms.data.snmp.request);
4449 }
4a71df50
FB		 4450
4451 /* check if there is enough room in userspace */
4452 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4b7ae122
JW		 4453 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOSPC);
4454 return -ENOSPC;
4a71df50 4455 }
847a50fd 4456 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4457 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4458 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4459 cmd->data.setadapterparms.hdr.seq_no);
4460 /*copy entries to user buffer*/
9a764c1e 4461 memcpy(qinfo->udata + qinfo->udata_offset, snmp_data, data_len);
4a71df50 4462 qinfo->udata_offset += data_len;
9a764c1e 4463
4a71df50 4464 /* check if all replies received ... */
847a50fd 4465 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4466 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4467 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4468 cmd->data.setadapterparms.hdr.seq_no);
4469 if (cmd->data.setadapterparms.hdr.seq_no <
4470 cmd->data.setadapterparms.hdr.used_total)
4471 return 1;
4472 return 0;
4473}
4474
942d6984 4475static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4476{
4477 struct qeth_cmd_buffer *iob;
4478 struct qeth_ipa_cmd *cmd;
4479 struct qeth_snmp_ureq *ureq;
6fb392b1 4480 unsigned int req_len;
4a71df50
FB		 4481 struct qeth_arp_query_info qinfo = {0, };
4482 int rc = 0;
4483
847a50fd 4484 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4485
4486 if (card->info.guestlan)
4487 return -EOPNOTSUPP;
4488
4489 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4fda3354 4490 IS_LAYER3(card))
4a71df50 4491 return -EOPNOTSUPP;
4fda3354 4492
4a71df50
FB		 4493 /* skip 4 bytes (data_len struct member) to get req_len */
4494 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4495 return -EFAULT;
6fb392b1
UB		 4496 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4497 sizeof(struct qeth_ipacmd_hdr) -
4498 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4499 return -EINVAL;
4986f3f0
JL		 4500 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4501 if (IS_ERR(ureq)) {
847a50fd 4502 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4503 return PTR_ERR(ureq);
4a71df50
FB		 4504 }
4505 qinfo.udata_len = ureq->hdr.data_len;
4506 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4507 if (!qinfo.udata) {
4508 kfree(ureq);
4509 return -ENOMEM;
4510 }
4511 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4512
4513 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4514 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4515 if (!iob) {
4516 rc = -ENOMEM;
4517 goto out;
4518 }
c2153277
JW		 4519
4520 /* for large requests, fix-up the length fields: */
4521 qeth_prepare_ipa_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len);
4522
ff5caa7a 4523 cmd = __ipa_cmd(iob);
4a71df50 4524 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
c2153277 4525 rc = qeth_send_ipa_cmd(card, iob, qeth_snmp_command_cb, &qinfo);
4a71df50 4526 if (rc)
e19e5be8
JW		 4527 QETH_DBF_MESSAGE(2, "SNMP command failed on device %x: (%#x)\n",
4528 CARD_DEVID(card), rc);
4a71df50
FB		 4529 else {
4530 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4531 rc = -EFAULT;
4532 }
1aec42bc 4533out:
4a71df50
FB		 4534 kfree(ureq);
4535 kfree(qinfo.udata);
4536 return rc;
4537}
4a71df50 4538
c3ab96f3
FB		 4539static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4540 struct qeth_reply *reply, unsigned long data)
4541{
686c97ee 4542 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4543 struct qeth_qoat_priv *priv;
4544 char *resdata;
4545 int resdatalen;
4546
4547 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee 4548 if (qeth_setadpparms_inspect_rc(cmd))
4b7ae122 4549 return -EIO;
c3ab96f3 4550
c3ab96f3
FB		 4551 priv = (struct qeth_qoat_priv *)reply->param;
4552 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4553 resdata = (char *)data + 28;
4554
4b7ae122
JW		 4555 if (resdatalen > (priv->buffer_len - priv->response_len))
4556 return -ENOSPC;
c3ab96f3
FB		 4557
4558 memcpy((priv->buffer + priv->response_len), resdata,
4559 resdatalen);
4560 priv->response_len += resdatalen;
4561
4562 if (cmd->data.setadapterparms.hdr.seq_no <
4563 cmd->data.setadapterparms.hdr.used_total)
4564 return 1;
4565 return 0;
4566}
4567
942d6984 4568static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4569{
4570 int rc = 0;
4571 struct qeth_cmd_buffer *iob;
4572 struct qeth_ipa_cmd *cmd;
4573 struct qeth_query_oat *oat_req;
4574 struct qeth_query_oat_data oat_data;
4575 struct qeth_qoat_priv priv;
4576 void __user *tmp;
4577
4578 QETH_CARD_TEXT(card, 3, "qoatcmd");
4579
4580 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4581 rc = -EOPNOTSUPP;
4582 goto out;
4583 }
4584
4585 if (copy_from_user(&oat_data, udata,
4586 sizeof(struct qeth_query_oat_data))) {
4587 rc = -EFAULT;
4588 goto out;
4589 }
4590
4591 priv.buffer_len = oat_data.buffer_len;
4592 priv.response_len = 0;
aec45e85 4593 priv.buffer = vzalloc(oat_data.buffer_len);
c3ab96f3
FB		 4594 if (!priv.buffer) {
4595 rc = -ENOMEM;
4596 goto out;
4597 }
4598
4599 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4600 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4601 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4602 if (!iob) {
4603 rc = -ENOMEM;
4604 goto out_free;
4605 }
ff5caa7a 4606 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4607 oat_req = &cmd->data.setadapterparms.data.query_oat;
4608 oat_req->subcmd_code = oat_data.command;
4609
4610 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4611 &priv);
4612 if (!rc) {
4613 if (is_compat_task())
4614 tmp = compat_ptr(oat_data.ptr);
4615 else
4616 tmp = (void __user *)(unsigned long)oat_data.ptr;
4617
4618 if (copy_to_user(tmp, priv.buffer,
4619 priv.response_len)) {
4620 rc = -EFAULT;
4621 goto out_free;
4622 }
4623
4624 oat_data.response_len = priv.response_len;
4625
4626 if (copy_to_user(udata, &oat_data,
4627 sizeof(struct qeth_query_oat_data)))
4628 rc = -EFAULT;
4b7ae122 4629 }
c3ab96f3
FB		 4630
4631out_free:
aec45e85 4632 vfree(priv.buffer);
c3ab96f3
FB		 4633out:
4634 return rc;
4635}
c3ab96f3 4636
e71e4072
HC		 4637static int qeth_query_card_info_cb(struct qeth_card *card,
4638 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4639{
686c97ee
JW		 4640 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4641 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4642 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4643
4644 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee 4645 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 4646 return -EIO;
02d5cb5b 4647
686c97ee
JW		 4648 card_info = &cmd->data.setadapterparms.data.card_info;
4649 carrier_info->card_type = card_info->card_type;
4650 carrier_info->port_mode = card_info->port_mode;
4651 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4652 return 0;
4653}
4654
d896ac62
JW		 4655int qeth_query_card_info(struct qeth_card *card,
4656 struct carrier_info *carrier_info)
02d5cb5b
EC		 4657{
4658 struct qeth_cmd_buffer *iob;
4659
4660 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4661 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4662 return -EOPNOTSUPP;
4663 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4664 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4665 if (!iob)
4666 return -ENOMEM;
02d5cb5b
EC		 4667 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4668 (void *)carrier_info);
4669}
02d5cb5b 4670
ec61bd2f
JW		 4671/**
4672 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4673 * @card: pointer to a qeth_card
4674 *
4675 * Returns
4676 * 0, if a MAC address has been set for the card's netdevice
4677 * a return code, for various error conditions
4678 */
4679int qeth_vm_request_mac(struct qeth_card *card)
4680{
4681 struct diag26c_mac_resp *response;
4682 struct diag26c_mac_req *request;
4683 struct ccw_dev_id id;
4684 int rc;
4685
4686 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4687
ec61bd2f
JW		 4688 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4689 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4690 if (!request || !response) {
4691 rc = -ENOMEM;
4692 goto out;
4693 }
4694
46646105 4695 ccw_device_get_id(CARD_DDEV(card), &id);
ec61bd2f
JW		 4696 request->resp_buf_len = sizeof(*response);
4697 request->resp_version = DIAG26C_VERSION2;
4698 request->op_code = DIAG26C_GET_MAC;
4699 request->devno = id.devno;
4700
615dff22 4701 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4702 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4703 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4704 if (rc)
4705 goto out;
615dff22 4706 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4707
4708 if (request->resp_buf_len < sizeof(*response) ||
4709 response->version != request->resp_version) {
4710 rc = -EIO;
4711 QETH_DBF_TEXT(SETUP, 2, "badresp");
4712 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4713 sizeof(request->resp_buf_len));
4714 } else if (!is_valid_ether_addr(response->mac)) {
4715 rc = -EINVAL;
4716 QETH_DBF_TEXT(SETUP, 2, "badmac");
4717 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4718 } else {
4719 ether_addr_copy(card->dev->dev_addr, response->mac);
4720 }
4721
4722out:
4723 kfree(response);
4724 kfree(request);
4725 return rc;
4726}
4727EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4728
cef6ff22 4729static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4730{
aa59004b
JW		 4731 if (card->info.type == QETH_CARD_TYPE_IQD)
4732 return QDIO_IQDIO_QFMT;
4733 else
4734 return QDIO_QETH_QFMT;
4a71df50
FB		 4735}
4736
d0ff1f52
UB		 4737static void qeth_determine_capabilities(struct qeth_card *card)
4738{
4739 int rc;
4740 int length;
4741 char *prcd;
4742 struct ccw_device *ddev;
4743 int ddev_offline = 0;
4744
4745 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4746 ddev = CARD_DDEV(card);
4747 if (!ddev->online) {
4748 ddev_offline = 1;
4749 rc = ccw_device_set_online(ddev);
4750 if (rc) {
4751 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4752 goto out;
4753 }
4754 }
4755
4756 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4757 if (rc) {
e19e5be8
JW		 4758 QETH_DBF_MESSAGE(2, "qeth_read_conf_data on device %x returned %i\n",
4759 CARD_DEVID(card), rc);
d0ff1f52
UB		 4760 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4761 goto out_offline;
4762 }
4763 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4764 if (ddev_offline)
4765 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4766 kfree(prcd);
4767
4768 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4769 if (rc)
4770 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4771
0da9581d 4772 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4773 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4774 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4775 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4776 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4777 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4778 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4779 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4780 dev_info(&card->gdev->dev,
4781 "Completion Queueing supported\n");
4782 } else {
4783 card->options.cq = QETH_CQ_NOTAVAILABLE;
4784 }
4785
4786
d0ff1f52
UB		 4787out_offline:
4788 if (ddev_offline == 1)
4789 ccw_device_set_offline(ddev);
4790out:
4791 return;
4792}
4793
cef6ff22
JW		 4794static void qeth_qdio_establish_cq(struct qeth_card *card,
4795 struct qdio_buffer **in_sbal_ptrs,
4796 void (**queue_start_poll)
4797 (struct ccw_device *, int,
4798 unsigned long))
4799{
0da9581d
EL		 4800 int i;
4801
4802 if (card->options.cq == QETH_CQ_ENABLED) {
4803 int offset = QDIO_MAX_BUFFERS_PER_Q *
4804 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4805 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4806 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4807 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4808 }
4809
4810 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4811 }
4812}
4813
4a71df50
FB		 4814static int qeth_qdio_establish(struct qeth_card *card)
4815{
4816 struct qdio_initialize init_data;
4817 char *qib_param_field;
4818 struct qdio_buffer **in_sbal_ptrs;
104ea556 4819 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4820 struct qdio_buffer **out_sbal_ptrs;
4821 int i, j, k;
4822 int rc = 0;
4823
d11ba0c4 4824 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50 4825
6396bb22
KC		 4826 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
4827 GFP_KERNEL);
104ea556 4828 if (!qib_param_field) {
4829 rc = -ENOMEM;
4830 goto out_free_nothing;
4831 }
4a71df50
FB		 4832
4833 qeth_create_qib_param_field(card, qib_param_field);
4834 qeth_create_qib_param_field_blkt(card, qib_param_field);
4835
6396bb22
KC		 4836 in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
4837 sizeof(void *),
4a71df50
FB		 4838 GFP_KERNEL);
4839 if (!in_sbal_ptrs) {
104ea556 4840 rc = -ENOMEM;
4841 goto out_free_qib_param;
4a71df50 4842 }
0da9581d 4843 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4844 in_sbal_ptrs[i] = (struct qdio_buffer *)
4845 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4846 }
4a71df50 4847
6396bb22 4848 queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
0da9581d 4849 GFP_KERNEL);
104ea556 4850 if (!queue_start_poll) {
4851 rc = -ENOMEM;
4852 goto out_free_in_sbals;
4853 }
0da9581d 4854 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4855 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4856
4857 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4858
4a71df50 4859 out_sbal_ptrs =
6396bb22
KC		 4860 kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
4861 sizeof(void *),
4862 GFP_KERNEL);
4a71df50 4863 if (!out_sbal_ptrs) {
104ea556 4864 rc = -ENOMEM;
4865 goto out_free_queue_start_poll;
4a71df50
FB		 4866 }
4867 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4868 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4869 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4870 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4871 }
4872
4873 memset(&init_data, 0, sizeof(struct qdio_initialize));
4874 init_data.cdev = CARD_DDEV(card);
4875 init_data.q_format = qeth_get_qdio_q_format(card);
4876 init_data.qib_param_field_format = 0;
4877 init_data.qib_param_field = qib_param_field;
0da9581d 4878 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4879 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 4880 init_data.input_handler = qeth_qdio_input_handler;
4881 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 4882 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4883 init_data.int_parm = (unsigned long) card;
bdf11767
JW		 4884 init_data.input_sbal_addr_array = in_sbal_ptrs;
4885 init_data.output_sbal_addr_array = out_sbal_ptrs;
0da9581d 4886 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4887 init_data.scan_threshold =
0fa81cd4 4888 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4889
4890 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4891 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4892 rc = qdio_allocate(&init_data);
4893 if (rc) {
4894 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4895 goto out;
4896 }
4897 rc = qdio_establish(&init_data);
4898 if (rc) {
4a71df50 4899 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4900 qdio_free(CARD_DDEV(card));
4901 }
4a71df50 4902 }
0da9581d
EL		 4903
4904 switch (card->options.cq) {
4905 case QETH_CQ_ENABLED:
4906 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4907 break;
4908 case QETH_CQ_DISABLED:
4909 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4910 break;
4911 default:
4912 break;
4913 }
cc961d40 4914out:
4a71df50 4915 kfree(out_sbal_ptrs);
104ea556 4916out_free_queue_start_poll:
4917 kfree(queue_start_poll);
4918out_free_in_sbals:
4a71df50 4919 kfree(in_sbal_ptrs);
104ea556 4920out_free_qib_param:
4a71df50 4921 kfree(qib_param_field);
104ea556 4922out_free_nothing:
4a71df50
FB		 4923 return rc;
4924}
4925
4926static void qeth_core_free_card(struct qeth_card *card)
4927{
d11ba0c4
PT		 4928 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4929 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4930 qeth_clean_channel(&card->read);
4931 qeth_clean_channel(&card->write);
f15cdaf2 4932 qeth_clean_channel(&card->data);
c0a2e4d1 4933 destroy_workqueue(card->event_wq);
41c47da3 4934 qeth_free_qdio_queues(card);
6bcac508 4935 unregister_service_level(&card->qeth_service_level);
a2eb0ad5 4936 dev_set_drvdata(&card->gdev->dev, NULL);
4a71df50
FB		 4937 kfree(card);
4938}
4939
395672e0
SR		 4940void qeth_trace_features(struct qeth_card *card)
4941{
4942 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4943 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4944 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4945 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4946 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4947 sizeof(card->info.diagass_support));
395672e0
SR		 4948}
4949EXPORT_SYMBOL_GPL(qeth_trace_features);
4950
4a71df50 4951static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4952 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4953 .driver_info = QETH_CARD_TYPE_OSD},
4954 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4955 .driver_info = QETH_CARD_TYPE_IQD},
4956 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4957 .driver_info = QETH_CARD_TYPE_OSN},
4958 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4959 .driver_info = QETH_CARD_TYPE_OSM},
4960 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4961 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4962 {},
4963};
4964MODULE_DEVICE_TABLE(ccw, qeth_ids);
4965
4966static struct ccw_driver qeth_ccw_driver = {
3bda058b 4967 .driver = {
3e70b3b8 4968 .owner = THIS_MODULE,
3bda058b
SO		 4969 .name = "qeth",
4970 },
4a71df50
FB		 4971 .ids = qeth_ids,
4972 .probe = ccwgroup_probe_ccwdev,
4973 .remove = ccwgroup_remove_ccwdev,
4974};
4975
9fae5c3b 4976int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok)
4a71df50 4977{
6ebb7f8d 4978 int retries = 3;
4a71df50
FB		 4979 int rc;
4980
d11ba0c4 4981 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4982 atomic_set(&card->force_alloc_skb, 0);
a4cdc9ba
JW		 4983 rc = qeth_update_from_chp_desc(card);
4984 if (rc)
4985 return rc;
4a71df50 4986retry:
6ebb7f8d 4987 if (retries < 3)
e19e5be8
JW		 4988 QETH_DBF_MESSAGE(2, "Retrying to do IDX activates on device %x.\n",
4989 CARD_DEVID(card));
22ae2790 4990 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 4991 ccw_device_set_offline(CARD_DDEV(card));
4992 ccw_device_set_offline(CARD_WDEV(card));
4993 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 4994 qdio_free(CARD_DDEV(card));
aa909224
UB		 4995 rc = ccw_device_set_online(CARD_RDEV(card));
4996 if (rc)
4997 goto retriable;
4998 rc = ccw_device_set_online(CARD_WDEV(card));
4999 if (rc)
5000 goto retriable;
5001 rc = ccw_device_set_online(CARD_DDEV(card));
5002 if (rc)
5003 goto retriable;
aa909224 5004retriable:
4a71df50 5005 if (rc == -ERESTARTSYS) {
d11ba0c4 5006 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5007 return rc;
5008 } else if (rc) {
d11ba0c4 5009 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5010 if (--retries < 0)
4a71df50
FB		 5011 goto out;
5012 else
5013 goto retry;
5014 }
d0ff1f52 5015 qeth_determine_capabilities(card);
4a71df50
FB		 5016 qeth_init_tokens(card);
5017 qeth_init_func_level(card);
2e873d10
JW		 5018
5019 rc = qeth_idx_activate_read_channel(card);
5020 if (rc == -EINTR) {
d11ba0c4 5021 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5022 return rc;
5023 } else if (rc) {
d11ba0c4 5024 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5025 if (--retries < 0)
5026 goto out;
5027 else
5028 goto retry;
5029 }
2e873d10
JW		 5030
5031 rc = qeth_idx_activate_write_channel(card);
5032 if (rc == -EINTR) {
d11ba0c4 5033 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5034 return rc;
5035 } else if (rc) {
d11ba0c4 5036 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5037 if (--retries < 0)
5038 goto out;
5039 else
5040 goto retry;
5041 }
908abbb5 5042 card->read_or_write_problem = 0;
4a71df50
FB		 5043 rc = qeth_mpc_initialize(card);
5044 if (rc) {
d11ba0c4 5045 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5046 goto out;
5047 }
1da74b1c 5048
10340510
JW		 5049 rc = qeth_send_startlan(card);
5050 if (rc) {
5051 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4b7ae122
JW		 5052 if (rc == -ENETDOWN) {
5053 dev_warn(&card->gdev->dev, "The LAN is offline\n");
9fae5c3b 5054 *carrier_ok = false;
10340510 5055 } else {
10340510
JW		 5056 goto out;
5057 }
91cc98f5 5058 } else {
9fae5c3b
JW		 5059 *carrier_ok = true;
5060 }
5061
1da74b1c 5062 card->options.ipa4.supported_funcs = 0;
4d7def2a 5063 card->options.ipa6.supported_funcs = 0;
1da74b1c 5064 card->options.adp.supported_funcs = 0;
b4d72c08 5065 card->options.sbp.supported_funcs = 0;
1da74b1c 5066 card->info.diagass_support = 0;
1aec42bc
TR		 5067 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5068 if (rc == -ENOMEM)
5069 goto out;
ee75fb86
KM		 5070 if (qeth_is_supported(card, IPA_IPV6)) {
5071 rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
5072 if (rc == -ENOMEM)
5073 goto out;
5074 }
1aec42bc
TR		 5075 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5076 rc = qeth_query_setadapterparms(card);
5077 if (rc < 0) {
10340510 5078 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5079 goto out;
5080 }
5081 }
5082 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5083 rc = qeth_query_setdiagass(card);
5084 if (rc < 0) {
10340510 5085 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5086 goto out;
5087 }
5088 }
4a71df50
FB		 5089 return 0;
5090out:
74eacdb9
FB		 5091 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5092 "an error on the device\n");
e19e5be8
JW		 5093 QETH_DBF_MESSAGE(2, "Initialization for device %x failed in hardsetup! rc=%d\n",
5094 CARD_DEVID(card), rc);
4a71df50
FB		 5095 return rc;
5096}
5097EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5098
8d68af6a
JW		 5099static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5100 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5101{
5102 struct page *page = virt_to_page(element->addr);
b6f72f96 5103 unsigned int next_frag;
b3332930 5104
8d68af6a
JW		 5105 /* first fill the linear space */
5106 if (!skb->len) {
5107 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5108
8d68af6a
JW		 5109 skb_put_data(skb, element->addr + offset, linear);
5110 data_len -= linear;
5111 if (!data_len)
5112 return;
5113 offset += linear;
5114 /* fall through to add page frag for remaining data */
4a71df50 5115 }
0da9581d 5116
8d68af6a 5117 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5118 get_page(page);
8d68af6a 5119 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5120}
5121
bca51650
TR		 5122static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5123{
5124 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5125}
5126
4a71df50 5127struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5128 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5129 struct qdio_buffer_element **__element, int *__offset,
5130 struct qeth_hdr **hdr)
5131{
5132 struct qdio_buffer_element *element = *__element;
b3332930 5133 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5134 int offset = *__offset;
8d68af6a 5135 struct sk_buff *skb;
76b11f8e 5136 int skb_len = 0;
4a71df50
FB		 5137 void *data_ptr;
5138 int data_len;
5139 int headroom = 0;
5140 int use_rx_sg = 0;
4a71df50 5141
4a71df50 5142 /* qeth_hdr must not cross element boundaries */
864c17c3 5143 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5144 if (qeth_is_last_sbale(element))
5145 return NULL;
5146 element++;
5147 offset = 0;
4a71df50
FB		 5148 }
5149 *hdr = element->addr + offset;
5150
5151 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5152 switch ((*hdr)->hdr.l2.id) {
5153 case QETH_HEADER_TYPE_LAYER2:
5154 skb_len = (*hdr)->hdr.l2.pkt_length;
5155 break;
5156 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5157 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5158 headroom = ETH_HLEN;
76b11f8e
UB		 5159 break;
5160 case QETH_HEADER_TYPE_OSN:
5161 skb_len = (*hdr)->hdr.osn.pdu_length;
5162 headroom = sizeof(struct qeth_hdr);
5163 break;
5164 default:
5165 break;
4a71df50
FB		 5166 }
5167
5168 if (!skb_len)
5169 return NULL;
5170
b3332930
FB		 5171 if (((skb_len >= card->options.rx_sg_cb) &&
5172 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5173 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5174 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5175 use_rx_sg = 1;
8d68af6a
JW		 5176
5177 if (use_rx_sg && qethbuffer->rx_skb) {
5178 /* QETH_CQ_ENABLED only: */
5179 skb = qethbuffer->rx_skb;
5180 qethbuffer->rx_skb = NULL;
4a71df50 5181 } else {
8d68af6a
JW		 5182 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5183
37cf05d2 5184 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5185 }
8d68af6a
JW		 5186 if (!skb)
5187 goto no_mem;
5188 if (headroom)
5189 skb_reserve(skb, headroom);
4a71df50
FB		 5190
5191 data_ptr = element->addr + offset;
5192 while (skb_len) {
5193 data_len = min(skb_len, (int)(element->length - offset));
5194 if (data_len) {
8d68af6a
JW		 5195 if (use_rx_sg)
5196 qeth_create_skb_frag(element, skb, offset,
5197 data_len);
5198 else
59ae1d12 5199 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5200 }
5201 skb_len -= data_len;
5202 if (skb_len) {
5203 if (qeth_is_last_sbale(element)) {
847a50fd 5204 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5205 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50 5206 dev_kfree_skb_any(skb);
b0abc4f5 5207 QETH_CARD_STAT_INC(card, rx_errors);
4a71df50
FB		 5208 return NULL;
5209 }
5210 element++;
5211 offset = 0;
5212 data_ptr = element->addr;
5213 } else {
5214 offset += data_len;
5215 }
5216 }
5217 *__element = element;
5218 *__offset = offset;
b0abc4f5
JW		 5219 if (use_rx_sg) {
5220 QETH_CARD_STAT_INC(card, rx_sg_skbs);
5221 QETH_CARD_STAT_ADD(card, rx_sg_frags,
5222 skb_shinfo(skb)->nr_frags);
4a71df50
FB		 5223 }
5224 return skb;
5225no_mem:
5226 if (net_ratelimit()) {
847a50fd 5227 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50 5228 }
b0abc4f5 5229 QETH_CARD_STAT_INC(card, rx_dropped);
4a71df50
FB		 5230 return NULL;
5231}
5232EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5233
d73ef324
JW		 5234int qeth_poll(struct napi_struct *napi, int budget)
5235{
5236 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5237 int work_done = 0;
5238 struct qeth_qdio_buffer *buffer;
5239 int done;
5240 int new_budget = budget;
5241
d73ef324
JW		 5242 while (1) {
5243 if (!card->rx.b_count) {
5244 card->rx.qdio_err = 0;
5245 card->rx.b_count = qdio_get_next_buffers(
5246 card->data.ccwdev, 0, &card->rx.b_index,
5247 &card->rx.qdio_err);
5248 if (card->rx.b_count <= 0) {
5249 card->rx.b_count = 0;
5250 break;
5251 }
5252 card->rx.b_element =
5253 &card->qdio.in_q->bufs[card->rx.b_index]
5254 .buffer->element[0];
5255 card->rx.e_offset = 0;
5256 }
5257
5258 while (card->rx.b_count) {
5259 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5260 if (!(card->rx.qdio_err &&
5261 qeth_check_qdio_errors(card, buffer->buffer,
5262 card->rx.qdio_err, "qinerr")))
5263 work_done +=
5264 card->discipline->process_rx_buffer(
5265 card, new_budget, &done);
5266 else
5267 done = 1;
5268
5269 if (done) {
b0abc4f5 5270 QETH_CARD_STAT_INC(card, rx_bufs);
d73ef324
JW		 5271 qeth_put_buffer_pool_entry(card,
5272 buffer->pool_entry);
5273 qeth_queue_input_buffer(card, card->rx.b_index);
5274 card->rx.b_count--;
5275 if (card->rx.b_count) {
5276 card->rx.b_index =
5277 (card->rx.b_index + 1) %
5278 QDIO_MAX_BUFFERS_PER_Q;
5279 card->rx.b_element =
5280 &card->qdio.in_q
5281 ->bufs[card->rx.b_index]
5282 .buffer->element[0];
5283 card->rx.e_offset = 0;
5284 }
5285 }
5286
5287 if (work_done >= budget)
5288 goto out;
5289 else
5290 new_budget = budget - work_done;
5291 }
5292 }
5293
978759e8 5294 napi_complete_done(napi, work_done);
d73ef324
JW		 5295 if (qdio_start_irq(card->data.ccwdev, 0))
5296 napi_schedule(&card->napi);
5297out:
d73ef324
JW		 5298 return work_done;
5299}
5300EXPORT_SYMBOL_GPL(qeth_poll);
5301
ad3cbf61
JW		 5302static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5303{
5304 if (!cmd->hdr.return_code)
5305 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5306 return cmd->hdr.return_code;
5307}
5308
4666d7fb
JW		 5309static int qeth_setassparms_get_caps_cb(struct qeth_card *card,
5310 struct qeth_reply *reply,
5311 unsigned long data)
5312{
5313 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
5314 struct qeth_ipa_caps *caps = reply->param;
5315
5316 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 5317 return -EIO;
4666d7fb
JW		 5318
5319 caps->supported = cmd->data.setassparms.data.caps.supported;
5320 caps->enabled = cmd->data.setassparms.data.caps.enabled;
5321 return 0;
5322}
5323
8f43fb00
TR		 5324int qeth_setassparms_cb(struct qeth_card *card,
5325 struct qeth_reply *reply, unsigned long data)
4d7def2a 5326{
742d4d40 5327 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4d7def2a
TR		 5328
5329 QETH_CARD_TEXT(card, 4, "defadpcb");
5330
742d4d40
JW		 5331 if (cmd->hdr.return_code)
5332 return -EIO;
5333
5334 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5335 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5336 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5337 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5338 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
4d7def2a
TR		 5339 return 0;
5340}
8f43fb00 5341EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5342
b475e316
TR		 5343struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5344 enum qeth_ipa_funcs ipa_func,
5345 __u16 cmd_code, __u16 len,
5346 enum qeth_prot_versions prot)
4d7def2a
TR		 5347{
5348 struct qeth_cmd_buffer *iob;
5349 struct qeth_ipa_cmd *cmd;
5350
5351 QETH_CARD_TEXT(card, 4, "getasscm");
5352 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5353
5354 if (iob) {
ff5caa7a 5355 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5356 cmd->data.setassparms.hdr.assist_no = ipa_func;
5357 cmd->data.setassparms.hdr.length = 8 + len;
5358 cmd->data.setassparms.hdr.command_code = cmd_code;
4d7def2a
TR		 5359 }
5360
5361 return iob;
5362}
b475e316 5363EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a 5364
a8155b00
KM		 5365int qeth_send_simple_setassparms_prot(struct qeth_card *card,
5366 enum qeth_ipa_funcs ipa_func,
5367 u16 cmd_code, long data,
5368 enum qeth_prot_versions prot)
4d7def2a 5369{
4d7def2a
TR		 5370 int length = 0;
5371 struct qeth_cmd_buffer *iob;
5372
a8155b00 5373 QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
4d7def2a
TR		 5374 if (data)
5375 length = sizeof(__u32);
a8155b00 5376 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
4d7def2a
TR		 5377 if (!iob)
5378 return -ENOMEM;
4fa55fa9
JW		 5379
5380 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = (__u32) data;
5381 return qeth_send_ipa_cmd(card, iob, qeth_setassparms_cb, NULL);
4d7def2a 5382}
a8155b00 5383EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
4d7def2a 5384
4a71df50
FB		 5385static void qeth_unregister_dbf_views(void)
5386{
d11ba0c4
PT		 5387 int x;
5388 for (x = 0; x < QETH_DBF_INFOS; x++) {
5389 debug_unregister(qeth_dbf[x].id);
5390 qeth_dbf[x].id = NULL;
5391 }
4a71df50
FB		 5392}
5393
8e96c51c 5394void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5395{
5396 char dbf_txt_buf[32];
345aa66e 5397 va_list args;
cd023216 5398
8e6a8285 5399 if (!debug_level_enabled(id, level))
cd023216 5400 return;
345aa66e
PT		 5401 va_start(args, fmt);
5402 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5403 va_end(args);
8e96c51c 5404 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5405}
5406EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5407
4a71df50
FB		 5408static int qeth_register_dbf_views(void)
5409{
d11ba0c4
PT		 5410 int ret;
5411 int x;
5412
5413 for (x = 0; x < QETH_DBF_INFOS; x++) {
5414 /* register the areas */
5415 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5416 qeth_dbf[x].pages,
5417 qeth_dbf[x].areas,
5418 qeth_dbf[x].len);
5419 if (qeth_dbf[x].id == NULL) {
5420 qeth_unregister_dbf_views();
5421 return -ENOMEM;
5422 }
4a71df50 5423
d11ba0c4
PT		 5424 /* register a view */
5425 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5426 if (ret) {
5427 qeth_unregister_dbf_views();
5428 return ret;
5429 }
4a71df50 5430
d11ba0c4
PT		 5431 /* set a passing level */
5432 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5433 }
4a71df50
FB		 5434
5435 return 0;
5436}
5437
a70fee3b
JW		 5438static DEFINE_MUTEX(qeth_mod_mutex); /* for synchronized module loading */
5439
4a71df50
FB		 5440int qeth_core_load_discipline(struct qeth_card *card,
5441 enum qeth_discipline_id discipline)
5442{
2022e00c 5443 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5444 switch (discipline) {
5445 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5446 card->discipline = try_then_request_module(
5447 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5448 break;
5449 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5450 card->discipline = try_then_request_module(
5451 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5452 break;
c70eb09d
JW		 5453 default:
5454 break;
4a71df50 5455 }
a70fee3b 5456 mutex_unlock(&qeth_mod_mutex);
c70eb09d 5457
c041f2d4 5458 if (!card->discipline) {
74eacdb9
FB		 5459 dev_err(&card->gdev->dev, "There is no kernel module to "
5460 "support discipline %d\n", discipline);
a70fee3b 5461 return -EINVAL;
4a71df50 5462 }
a70fee3b 5463
c1a935f6 5464 card->options.layer = discipline;
a70fee3b 5465 return 0;
4a71df50
FB		 5466}
5467
5468void qeth_core_free_discipline(struct qeth_card *card)
5469{
4fda3354 5470 if (IS_LAYER2(card))
c041f2d4 5471 symbol_put(qeth_l2_discipline);
4a71df50 5472 else
c041f2d4 5473 symbol_put(qeth_l3_discipline);
c1a935f6 5474 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
c041f2d4 5475 card->discipline = NULL;
4a71df50
FB		 5476}
5477
2d2ebb3e 5478const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5479 .name = "qeth_generic",
5480 .groups = qeth_generic_attr_groups,
5481};
2d2ebb3e
JW		 5482EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5483
b7169c51
SO		 5484static const struct device_type qeth_osn_devtype = {
5485 .name = "qeth_osn",
5486 .groups = qeth_osn_attr_groups,
5487};
5488
819dc537
SR		 5489#define DBF_NAME_LEN 20
5490
5491struct qeth_dbf_entry {
5492 char dbf_name[DBF_NAME_LEN];
5493 debug_info_t *dbf_info;
5494 struct list_head dbf_list;
5495};
5496
5497static LIST_HEAD(qeth_dbf_list);
5498static DEFINE_MUTEX(qeth_dbf_list_mutex);
5499
5500static debug_info_t *qeth_get_dbf_entry(char *name)
5501{
5502 struct qeth_dbf_entry *entry;
5503 debug_info_t *rc = NULL;
5504
5505 mutex_lock(&qeth_dbf_list_mutex);
5506 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5507 if (strcmp(entry->dbf_name, name) == 0) {
5508 rc = entry->dbf_info;
5509 break;
5510 }
5511 }
5512 mutex_unlock(&qeth_dbf_list_mutex);
5513 return rc;
5514}
5515
5516static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5517{
5518 struct qeth_dbf_entry *new_entry;
5519
5520 card->debug = debug_register(name, 2, 1, 8);
5521 if (!card->debug) {
5522 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5523 goto err;
5524 }
5525 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5526 goto err_dbg;
5527 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5528 if (!new_entry)
5529 goto err_dbg;
5530 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5531 new_entry->dbf_info = card->debug;
5532 mutex_lock(&qeth_dbf_list_mutex);
5533 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5534 mutex_unlock(&qeth_dbf_list_mutex);
5535
5536 return 0;
5537
5538err_dbg:
5539 debug_unregister(card->debug);
5540err:
5541 return -ENOMEM;
5542}
5543
5544static void qeth_clear_dbf_list(void)
5545{
5546 struct qeth_dbf_entry *entry, *tmp;
5547
5548 mutex_lock(&qeth_dbf_list_mutex);
5549 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5550 list_del(&entry->dbf_list);
5551 debug_unregister(entry->dbf_info);
5552 kfree(entry);
5553 }
5554 mutex_unlock(&qeth_dbf_list_mutex);
5555}
5556
d3d1b205
JW		 5557static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
5558{
5559 struct net_device *dev;
5560
5561 switch (card->info.type) {
5562 case QETH_CARD_TYPE_IQD:
3a18d754
JW		 5563 dev = alloc_netdev_mqs(0, "hsi%d", NET_NAME_UNKNOWN,
5564 ether_setup, QETH_MAX_QUEUES, 1);
d3d1b205
JW		 5565 break;
5566 case QETH_CARD_TYPE_OSN:
5567 dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
5568 break;
5569 default:
5570 dev = alloc_etherdev(0);
5571 }
5572
5573 if (!dev)
5574 return NULL;
5575
5576 dev->ml_priv = card;
5577 dev->watchdog_timeo = QETH_TX_TIMEOUT;
72f219da 5578 dev->min_mtu = IS_OSN(card) ? 64 : 576;
8ce7a9e0
JW		 5579 /* initialized when device first goes online: */
5580 dev->max_mtu = 0;
5581 dev->mtu = 0;
d3d1b205
JW		 5582 SET_NETDEV_DEV(dev, &card->gdev->dev);
5583 netif_carrier_off(dev);
5f89eca5 5584
d896ac62
JW		 5585 if (IS_OSN(card)) {
5586 dev->ethtool_ops = &qeth_osn_ethtool_ops;
5587 } else {
5588 dev->ethtool_ops = &qeth_ethtool_ops;
5f89eca5
JW		 5589 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
5590 dev->hw_features |= NETIF_F_SG;
5591 dev->vlan_features |= NETIF_F_SG;
3a18d754
JW		 5592 if (IS_IQD(card)) {
5593 netif_set_real_num_tx_queues(dev, QETH_IQD_MIN_TXQ);
04db741d 5594 dev->features |= NETIF_F_SG;
3a18d754 5595 }
5f89eca5
JW		 5596 }
5597
d3d1b205
JW		 5598 return dev;
5599}
5600
5601struct net_device *qeth_clone_netdev(struct net_device *orig)
5602{
5603 struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
5604
5605 if (!clone)
5606 return NULL;
5607
5608 clone->dev_port = orig->dev_port;
5609 return clone;
5610}
5611
4a71df50
FB		 5612static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5613{
5614 struct qeth_card *card;
5615 struct device *dev;
5616 int rc;
c70eb09d 5617 enum qeth_discipline_id enforced_disc;
819dc537 5618 char dbf_name[DBF_NAME_LEN];
4a71df50 5619
d11ba0c4 5620 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5621
5622 dev = &gdev->dev;
5623 if (!get_device(dev))
5624 return -ENODEV;
5625
2a0217d5 5626 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50 5627
121ca39a 5628 card = qeth_alloc_card(gdev);
4a71df50 5629 if (!card) {
d11ba0c4 5630 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5631 rc = -ENOMEM;
5632 goto err_dev;
5633 }
af039068
CO		 5634
5635 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5636 dev_name(&gdev->dev));
819dc537 5637 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5638 if (!card->debug) {
819dc537
SR		 5639 rc = qeth_add_dbf_entry(card, dbf_name);
5640 if (rc)
5641 goto err_card;
af039068 5642 }
af039068 5643
95f4d8b7 5644 qeth_setup_card(card);
a4cdc9ba
JW		 5645 rc = qeth_update_from_chp_desc(card);
5646 if (rc)
5647 goto err_chp_desc;
4a71df50 5648
d3d1b205 5649 card->dev = qeth_alloc_netdev(card);
778b1ac7
JW		 5650 if (!card->dev) {
5651 rc = -ENOMEM;
d3d1b205 5652 goto err_card;
778b1ac7 5653 }
d3d1b205 5654
c70eb09d
JW		 5655 qeth_determine_capabilities(card);
5656 enforced_disc = qeth_enforce_discipline(card);
5657 switch (enforced_disc) {
5658 case QETH_DISCIPLINE_UNDETERMINED:
5659 gdev->dev.type = &qeth_generic_devtype;
5660 break;
5661 default:
5662 card->info.layer_enforced = true;
5663 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5664 if (rc)
d3d1b205 5665 goto err_load;
2d2ebb3e
JW		 5666
5667 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5668 ? card->discipline->devtype
5669 : &qeth_osn_devtype;
c041f2d4 5670 rc = card->discipline->setup(card->gdev);
4a71df50 5671 if (rc)
5113fec0 5672 goto err_disc;
2d2ebb3e 5673 break;
4a71df50
FB		 5674 }
5675
4a71df50
FB		 5676 return 0;
5677
5113fec0
UB		 5678err_disc:
5679 qeth_core_free_discipline(card);
d3d1b205
JW		 5680err_load:
5681 free_netdev(card->dev);
a4cdc9ba 5682err_chp_desc:
4a71df50
FB		 5683err_card:
5684 qeth_core_free_card(card);
5685err_dev:
5686 put_device(dev);
5687 return rc;
5688}
5689
5690static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5691{
4a71df50
FB		 5692 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5693
28a7e4c9 5694 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5695
c041f2d4
SO		 5696 if (card->discipline) {
5697 card->discipline->remove(gdev);
9dc48ccc
UB		 5698 qeth_core_free_discipline(card);
5699 }
5700
d3d1b205 5701 free_netdev(card->dev);
4a71df50 5702 qeth_core_free_card(card);
4a71df50 5703 put_device(&gdev->dev);
4a71df50
FB		 5704}
5705
5706static int qeth_core_set_online(struct ccwgroup_device *gdev)
5707{
5708 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5709 int rc = 0;
c70eb09d 5710 enum qeth_discipline_id def_discipline;
4a71df50 5711
c041f2d4 5712 if (!card->discipline) {
4a71df50
FB		 5713 if (card->info.type == QETH_CARD_TYPE_IQD)
5714 def_discipline = QETH_DISCIPLINE_LAYER3;
5715 else
5716 def_discipline = QETH_DISCIPLINE_LAYER2;
5717 rc = qeth_core_load_discipline(card, def_discipline);
5718 if (rc)
5719 goto err;
c041f2d4 5720 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5721 if (rc) {
5722 qeth_core_free_discipline(card);
4a71df50 5723 goto err;
9111e788 5724 }
4a71df50 5725 }
c041f2d4 5726 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5727err:
5728 return rc;
5729}
5730
5731static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5732{
5733 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5734 return card->discipline->set_offline(gdev);
4a71df50
FB		 5735}
5736
5737static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5738{
5739 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5740 qeth_set_allowed_threads(card, 0, 1);
5741 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5742 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5743 qeth_qdio_clear_card(card, 0);
41c47da3 5744 qeth_drain_output_queues(card);
96d1bb53 5745 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5746}
5747
bbcfcdc8
FB		 5748static int qeth_core_freeze(struct ccwgroup_device *gdev)
5749{
5750 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5751 if (card->discipline && card->discipline->freeze)
5752 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5753 return 0;
5754}
5755
5756static int qeth_core_thaw(struct ccwgroup_device *gdev)
5757{
5758 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5759 if (card->discipline && card->discipline->thaw)
5760 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5761 return 0;
5762}
5763
5764static int qeth_core_restore(struct ccwgroup_device *gdev)
5765{
5766 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5767 if (card->discipline && card->discipline->restore)
5768 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5769 return 0;
5770}
5771
36369569
GKH		 5772static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5773 size_t count)
4a71df50
FB		 5774{
5775 int err;
4a71df50 5776
6d8769ab
JW		 5777 err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
5778 buf);
b7169c51
SO		 5779
5780 return err ? err : count;
5781}
36369569 5782static DRIVER_ATTR_WO(group);
4a71df50 5783
f47e2256
SO		 5784static struct attribute *qeth_drv_attrs[] = {
5785 &driver_attr_group.attr,
5786 NULL,
5787};
5788static struct attribute_group qeth_drv_attr_group = {
5789 .attrs = qeth_drv_attrs,
5790};
5791static const struct attribute_group *qeth_drv_attr_groups[] = {
5792 &qeth_drv_attr_group,
5793 NULL,
5794};
5795
6d8769ab
JW		 5796static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5797 .driver = {
5798 .groups = qeth_drv_attr_groups,
5799 .owner = THIS_MODULE,
5800 .name = "qeth",
5801 },
5802 .ccw_driver = &qeth_ccw_driver,
5803 .setup = qeth_core_probe_device,
5804 .remove = qeth_core_remove_device,
5805 .set_online = qeth_core_set_online,
5806 .set_offline = qeth_core_set_offline,
5807 .shutdown = qeth_core_shutdown,
5808 .prepare = NULL,
5809 .complete = NULL,
5810 .freeze = qeth_core_freeze,
5811 .thaw = qeth_core_thaw,
5812 .restore = qeth_core_restore,
5813};
5814
d7d18da1
JW		 5815struct qeth_card *qeth_get_card_by_busid(char *bus_id)
5816{
5817 struct ccwgroup_device *gdev;
5818 struct qeth_card *card;
5819
5820 gdev = get_ccwgroupdev_by_busid(&qeth_core_ccwgroup_driver, bus_id);
5821 if (!gdev)
5822 return NULL;
5823
5824 card = dev_get_drvdata(&gdev->dev);
5825 put_device(&gdev->dev);
5826 return card;
5827}
5828EXPORT_SYMBOL_GPL(qeth_get_card_by_busid);
5829
942d6984
JW		 5830int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5831{
5832 struct qeth_card *card = dev->ml_priv;
5833 struct mii_ioctl_data *mii_data;
5834 int rc = 0;
5835
5836 if (!card)
5837 return -ENODEV;
5838
942d6984
JW		 5839 switch (cmd) {
5840 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5841 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5842 break;
5843 case SIOC_QETH_GET_CARD_TYPE:
5844 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5845 card->info.type == QETH_CARD_TYPE_OSM ||
5846 card->info.type == QETH_CARD_TYPE_OSX) &&
5847 !card->info.guestlan)
5848 return 1;
5849 else
5850 return 0;
5851 case SIOCGMIIPHY:
5852 mii_data = if_mii(rq);
5853 mii_data->phy_id = 0;
5854 break;
5855 case SIOCGMIIREG:
5856 mii_data = if_mii(rq);
5857 if (mii_data->phy_id != 0)
5858 rc = -EINVAL;
5859 else
5860 mii_data->val_out = qeth_mdio_read(dev,
5861 mii_data->phy_id, mii_data->reg_num);
5862 break;
5863 case SIOC_QETH_QUERY_OAT:
5864 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5865 break;
5866 default:
5867 if (card->discipline->do_ioctl)
5868 rc = card->discipline->do_ioctl(dev, rq, cmd);
5869 else
5870 rc = -EOPNOTSUPP;
5871 }
5872 if (rc)
5873 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5874 return rc;
5875}
5876EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5877
4386e34f
JW		 5878static int qeth_start_csum_cb(struct qeth_card *card, struct qeth_reply *reply,
5879 unsigned long data)
c9475369
TR		 5880{
5881 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4386e34f 5882 u32 *features = reply->param;
c9475369 5883
ad3cbf61 5884 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 5885 return -EIO;
c9475369 5886
4386e34f 5887 *features = cmd->data.setassparms.data.flags_32bit;
c9475369
TR		 5888 return 0;
5889}
5890
4386e34f
JW		 5891static int qeth_set_csum_off(struct qeth_card *card, enum qeth_ipa_funcs cstype,
5892 enum qeth_prot_versions prot)
c9475369 5893{
4386e34f
JW		 5894 return qeth_send_simple_setassparms_prot(card, cstype,
5895 IPA_CMD_ASS_STOP, 0, prot);
c9475369
TR		 5896}
5897
4386e34f
JW		 5898static int qeth_set_csum_on(struct qeth_card *card, enum qeth_ipa_funcs cstype,
5899 enum qeth_prot_versions prot)
4d7def2a 5900{
571f9dd8 5901 u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
4386e34f
JW		 5902 struct qeth_cmd_buffer *iob;
5903 struct qeth_ipa_caps caps;
5904 u32 features;
4d7def2a
TR		 5905 int rc;
5906
7e83747d
JW		 5907 /* some L3 HW requires combined L3+L4 csum offload: */
5908 if (IS_LAYER3(card) && prot == QETH_PROT_IPV4 &&
5909 cstype == IPA_OUTBOUND_CHECKSUM)
571f9dd8 5910 required_features |= QETH_IPA_CHECKSUM_IP_HDR;
7e83747d 5911
4386e34f
JW		 5912 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_START, 0,
5913 prot);
5914 if (!iob)
5915 return -ENOMEM;
5916
5917 rc = qeth_send_ipa_cmd(card, iob, qeth_start_csum_cb, &features);
5918 if (rc)
4d7def2a 5919 return rc;
7e83747d 5920
4386e34f
JW		 5921 if ((required_features & features) != required_features) {
5922 qeth_set_csum_off(card, cstype, prot);
5923 return -EOPNOTSUPP;
5924 }
7e83747d 5925
4386e34f 5926 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_ENABLE, 4,
a8155b00 5927 prot);
4386e34f
JW		 5928 if (!iob) {
5929 qeth_set_csum_off(card, cstype, prot);
5930 return -ENOMEM;
f9d8e6dc 5931 }
4386e34f
JW		 5932
5933 if (features & QETH_IPA_CHECKSUM_LP2LP)
5934 required_features |= QETH_IPA_CHECKSUM_LP2LP;
5935 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = required_features;
5936 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
4d7def2a 5937 if (rc) {
4386e34f 5938 qeth_set_csum_off(card, cstype, prot);
4d7def2a
TR		 5939 return rc;
5940 }
8f43fb00 5941
4386e34f
JW		 5942 if (!qeth_ipa_caps_supported(&caps, required_features) ||
5943 !qeth_ipa_caps_enabled(&caps, required_features)) {
5944 qeth_set_csum_off(card, cstype, prot);
5945 return -EOPNOTSUPP;
5946 }
5947
a8155b00
KM		 5948 dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
5949 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
4386e34f
JW		 5950 if (!qeth_ipa_caps_enabled(&caps, QETH_IPA_CHECKSUM_LP2LP) &&
5951 cstype == IPA_OUTBOUND_CHECKSUM)
5952 dev_warn(&card->gdev->dev,
5953 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
5954 QETH_CARD_IFNAME(card));
4d7def2a
TR		 5955 return 0;
5956}
5957
a8155b00
KM		 5958static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
5959 enum qeth_prot_versions prot)
4d7def2a 5960{
742d4d40
JW		 5961 return on ? qeth_set_csum_on(card, cstype, prot) :
5962 qeth_set_csum_off(card, cstype, prot);
4d7def2a 5963}
4d7def2a 5964
4666d7fb
JW		 5965static int qeth_start_tso_cb(struct qeth_card *card, struct qeth_reply *reply,
5966 unsigned long data)
5967{
5968 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
5969 struct qeth_tso_start_data *tso_data = reply->param;
5970
5971 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 5972 return -EIO;
4666d7fb
JW		 5973
5974 tso_data->mss = cmd->data.setassparms.data.tso.mss;
5975 tso_data->supported = cmd->data.setassparms.data.tso.supported;
5976 return 0;
5977}
5978
1f83b817
JW		 5979static int qeth_set_tso_off(struct qeth_card *card,
5980 enum qeth_prot_versions prot)
4d7def2a 5981{
1f83b817
JW		 5982 return qeth_send_simple_setassparms_prot(card, IPA_OUTBOUND_TSO,
5983 IPA_CMD_ASS_STOP, 0, prot);
5984}
4d7def2a 5985
1f83b817
JW		 5986static int qeth_set_tso_on(struct qeth_card *card,
5987 enum qeth_prot_versions prot)
5988{
4666d7fb
JW		 5989 struct qeth_tso_start_data tso_data;
5990 struct qeth_cmd_buffer *iob;
5991 struct qeth_ipa_caps caps;
5992 int rc;
5993
5994 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
5995 IPA_CMD_ASS_START, 0, prot);
5996 if (!iob)
5997 return -ENOMEM;
5998
4fa55fa9 5999 rc = qeth_send_ipa_cmd(card, iob, qeth_start_tso_cb, &tso_data);
4666d7fb
JW		 6000 if (rc)
6001 return rc;
6002
6003 if (!tso_data.mss || !(tso_data.supported & QETH_IPA_LARGE_SEND_TCP)) {
6004 qeth_set_tso_off(card, prot);
6005 return -EOPNOTSUPP;
6006 }
6007
6008 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6009 IPA_CMD_ASS_ENABLE, sizeof(caps), prot);
6010 if (!iob) {
6011 qeth_set_tso_off(card, prot);
6012 return -ENOMEM;
6013 }
6014
6015 /* enable TSO capability */
4fa55fa9
JW		 6016 __ipa_cmd(iob)->data.setassparms.data.caps.enabled =
6017 QETH_IPA_LARGE_SEND_TCP;
6018 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
4666d7fb
JW		 6019 if (rc) {
6020 qeth_set_tso_off(card, prot);
6021 return rc;
6022 }
6023
6024 if (!qeth_ipa_caps_supported(&caps, QETH_IPA_LARGE_SEND_TCP) ||
6025 !qeth_ipa_caps_enabled(&caps, QETH_IPA_LARGE_SEND_TCP)) {
6026 qeth_set_tso_off(card, prot);
6027 return -EOPNOTSUPP;
6028 }
6029
6030 dev_info(&card->gdev->dev, "TSOv%u enabled (MSS: %u)\n", prot,
6031 tso_data.mss);
6032 return 0;
1f83b817 6033}
4d7def2a 6034
1f83b817
JW		 6035static int qeth_set_ipa_tso(struct qeth_card *card, bool on,
6036 enum qeth_prot_versions prot)
6037{
742d4d40 6038 return on ? qeth_set_tso_on(card, prot) : qeth_set_tso_off(card, prot);
4d7def2a 6039}
8f43fb00 6040
d7e6ed97
KM		 6041static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
6042{
6043 int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
6044 int rc_ipv6;
6045
6046 if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6047 rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6048 QETH_PROT_IPV4);
6049 if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
6050 /* no/one Offload Assist available, so the rc is trivial */
6051 return rc_ipv4;
ce344356 6052
d7e6ed97
KM		 6053 rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6054 QETH_PROT_IPV6);
6055
6056 if (on)
6057 /* enable: success if any Assist is active */
6058 return (rc_ipv6) ? rc_ipv4 : 0;
6059
6060 /* disable: failure if any Assist is still active */
6061 return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
6062}
6063
ce344356 6064/**
d025da9e
JW		 6065 * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
6066 * @dev: a net_device
ce344356 6067 */
d025da9e 6068void qeth_enable_hw_features(struct net_device *dev)
e830baa9
HW		 6069{
6070 struct qeth_card *card = dev->ml_priv;
d025da9e 6071 netdev_features_t features;
e830baa9 6072
d025da9e 6073 features = dev->features;
5fc692a7 6074 /* force-off any feature that might need an IPA sequence.
ce344356
JW		 6075 * netdev_update_features() will restart them.
6076 */
5fc692a7
JW		 6077 dev->features &= ~dev->hw_features;
6078 /* toggle VLAN filter, so that VIDs are re-programmed: */
6079 if (IS_LAYER2(card) && IS_VM_NIC(card)) {
6080 dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
6081 dev->wanted_features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6082 }
ce344356 6083 netdev_update_features(dev);
d025da9e
JW		 6084 if (features != dev->features)
6085 dev_warn(&card->gdev->dev,
6086 "Device recovery failed to restore all offload features\n");
e830baa9 6087}
d025da9e 6088EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
e830baa9 6089
8f43fb00
TR		 6090int qeth_set_features(struct net_device *dev, netdev_features_t features)
6091{
6092 struct qeth_card *card = dev->ml_priv;
6c7cd712 6093 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6094 int rc = 0;
6095
6096 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6097 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6098
6c7cd712 6099 if ((changed & NETIF_F_IP_CSUM)) {
a8155b00
KM		 6100 rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
6101 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
6c7cd712
HW		 6102 if (rc)
6103 changed ^= NETIF_F_IP_CSUM;
6104 }
571f9dd8
KM		 6105 if (changed & NETIF_F_IPV6_CSUM) {
6106 rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
6107 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
6108 if (rc)
6109 changed ^= NETIF_F_IPV6_CSUM;
6110 }
d7e6ed97
KM		 6111 if (changed & NETIF_F_RXCSUM) {
6112 rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
6c7cd712
HW		 6113 if (rc)
6114 changed ^= NETIF_F_RXCSUM;
6115 }
1f83b817
JW		 6116 if (changed & NETIF_F_TSO) {
6117 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO,
6118 QETH_PROT_IPV4);
6c7cd712
HW		 6119 if (rc)
6120 changed ^= NETIF_F_TSO;
6121 }
82bf5c08
JW		 6122 if (changed & NETIF_F_TSO6) {
6123 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO6,
6124 QETH_PROT_IPV6);
6125 if (rc)
6126 changed ^= NETIF_F_TSO6;
6127 }
6c7cd712
HW		 6128
6129 /* everything changed successfully? */
6130 if ((dev->features ^ features) == changed)
6131 return 0;
6132 /* something went wrong. save changed features and return error */
6133 dev->features ^= changed;
6134 return -EIO;
8f43fb00
TR		 6135}
6136EXPORT_SYMBOL_GPL(qeth_set_features);
6137
6138netdev_features_t qeth_fix_features(struct net_device *dev,
6139 netdev_features_t features)
6140{
6141 struct qeth_card *card = dev->ml_priv;
6142
6143 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6144 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6145 features &= ~NETIF_F_IP_CSUM;
571f9dd8
KM		 6146 if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
6147 features &= ~NETIF_F_IPV6_CSUM;
d7e6ed97
KM		 6148 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
6149 !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
8f43fb00 6150 features &= ~NETIF_F_RXCSUM;
cf536ffe 6151 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6152 features &= ~NETIF_F_TSO;
82bf5c08
JW		 6153 if (!qeth_is_supported6(card, IPA_OUTBOUND_TSO))
6154 features &= ~NETIF_F_TSO6;
e6e771b3 6155
8f43fb00
TR		 6156 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6157 return features;
6158}
6159EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6160
6d69b1f1
JW		 6161netdev_features_t qeth_features_check(struct sk_buff *skb,
6162 struct net_device *dev,
6163 netdev_features_t features)
6164{
6165 /* GSO segmentation builds skbs with
6166 * a (small) linear part for the headers, and
6167 * page frags for the data.
6168 * Compared to a linear skb, the header-only part consumes an
6169 * additional buffer element. This reduces buffer utilization, and
6170 * hurts throughput. So compress small segments into one element.
6171 */
6172 if (netif_needs_gso(skb, features)) {
6173 /* match skb_segment(): */
6174 unsigned int doffset = skb->data - skb_mac_header(skb);
6175 unsigned int hsize = skb_shinfo(skb)->gso_size;
6176 unsigned int hroom = skb_headroom(skb);
6177
6178 /* linearize only if resulting skb allocations are order-0: */
6179 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6180 features &= ~NETIF_F_SG;
6181 }
6182
6183 return vlan_features_check(skb, features);
6184}
6185EXPORT_SYMBOL_GPL(qeth_features_check);
6186
b0abc4f5
JW		 6187void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
6188{
6189 struct qeth_card *card = dev->ml_priv;
6190 struct qeth_qdio_out_q *queue;
6191 unsigned int i;
6192
6193 QETH_CARD_TEXT(card, 5, "getstat");
6194
6195 stats->rx_packets = card->stats.rx_packets;
6196 stats->rx_bytes = card->stats.rx_bytes;
6197 stats->rx_errors = card->stats.rx_errors;
6198 stats->rx_dropped = card->stats.rx_dropped;
6199 stats->multicast = card->stats.rx_multicast;
b0abc4f5
JW		 6200
6201 for (i = 0; i < card->qdio.no_out_queues; i++) {
6202 queue = card->qdio.out_qs[i];
6203
6204 stats->tx_packets += queue->stats.tx_packets;
6205 stats->tx_bytes += queue->stats.tx_bytes;
6206 stats->tx_errors += queue->stats.tx_errors;
6207 stats->tx_dropped += queue->stats.tx_dropped;
b0abc4f5
JW		 6208 }
6209}
6210EXPORT_SYMBOL_GPL(qeth_get_stats64);
6211
3a18d754
JW		 6212u16 qeth_iqd_select_queue(struct net_device *dev, struct sk_buff *skb,
6213 u8 cast_type, struct net_device *sb_dev)
6214{
6215 if (cast_type != RTN_UNICAST)
6216 return QETH_IQD_MCAST_TXQ;
6217 return QETH_IQD_MIN_UCAST_TXQ;
6218}
6219EXPORT_SYMBOL_GPL(qeth_iqd_select_queue);
6220
e6e771b3 6221int qeth_open(struct net_device *dev)
e22355ea
JW		 6222{
6223 struct qeth_card *card = dev->ml_priv;
6224
6225 QETH_CARD_TEXT(card, 4, "qethopen");
e22355ea
JW		 6226
6227 if (qdio_stop_irq(CARD_DDEV(card), 0) < 0)
6228 return -EIO;
6229
6230 card->data.state = CH_STATE_UP;
3a18d754 6231 netif_tx_start_all_queues(dev);
e22355ea
JW		 6232
6233 napi_enable(&card->napi);
6234 local_bh_disable();
6235 napi_schedule(&card->napi);
6236 /* kick-start the NAPI softirq: */
6237 local_bh_enable();
6238 return 0;
6239}
e22355ea
JW		 6240EXPORT_SYMBOL_GPL(qeth_open);
6241
6242int qeth_stop(struct net_device *dev)
6243{
6244 struct qeth_card *card = dev->ml_priv;
6245
6246 QETH_CARD_TEXT(card, 4, "qethstop");
6247 netif_tx_disable(dev);
0f7aedbd 6248 napi_disable(&card->napi);
e22355ea
JW		 6249 return 0;
6250}
6251EXPORT_SYMBOL_GPL(qeth_stop);
6252
4a71df50
FB		 6253static int __init qeth_core_init(void)
6254{
6255 int rc;
6256
74eacdb9 6257 pr_info("loading core functions\n");
4a71df50
FB		 6258
6259 rc = qeth_register_dbf_views();
6260 if (rc)
a936b1ef 6261 goto dbf_err;
035da16f 6262 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6263 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6264 if (rc)
6265 goto register_err;
55494264
JW		 6266 qeth_core_header_cache =
6267 kmem_cache_create("qeth_hdr", QETH_HDR_CACHE_OBJ_SIZE,
6268 roundup_pow_of_two(QETH_HDR_CACHE_OBJ_SIZE),
6269 0, NULL);
683d718a
FB		 6270 if (!qeth_core_header_cache) {
6271 rc = -ENOMEM;
6272 goto slab_err;
6273 }
0da9581d
EL		 6274 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6275 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6276 if (!qeth_qdio_outbuf_cache) {
6277 rc = -ENOMEM;
6278 goto cqslab_err;
6279 }
afb6ac59
SO		 6280 rc = ccw_driver_register(&qeth_ccw_driver);
6281 if (rc)
6282 goto ccw_err;
afb6ac59
SO		 6283 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6284 if (rc)
6285 goto ccwgroup_err;
0da9581d 6286
683d718a 6287 return 0;
afb6ac59
SO		 6288
6289ccwgroup_err:
6290 ccw_driver_unregister(&qeth_ccw_driver);
6291ccw_err:
6292 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6293cqslab_err:
6294 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6295slab_err:
035da16f 6296 root_device_unregister(qeth_core_root_dev);
4a71df50 6297register_err:
4a71df50 6298 qeth_unregister_dbf_views();
a936b1ef 6299dbf_err:
74eacdb9 6300 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6301 return rc;
6302}
6303
6304static void __exit qeth_core_exit(void)
6305{
819dc537 6306 qeth_clear_dbf_list();
4a71df50
FB		 6307 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6308 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6309 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6310 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6311 root_device_unregister(qeth_core_root_dev);
4a71df50 6312 qeth_unregister_dbf_views();
74eacdb9 6313 pr_info("core functions removed\n");
4a71df50
FB		 6314}
6315
6316module_init(qeth_core_init);
6317module_exit(qeth_core_exit);
6318MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6319MODULE_DESCRIPTION("qeth core functions");
6320MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git