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s390/qeth: enhance TSO control sequence
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
0d55303c 13#include <linux/compat.h>
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
55494264 19#include <linux/log2.h>
4a71df50 20#include <linux/ip.h>
4a71df50
FB		 21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
5a0e3ad6 24#include <linux/slab.h>
6d69b1f1
JW		 25#include <linux/if_vlan.h>
26#include <linux/netdevice.h>
27#include <linux/netdev_features.h>
28#include <linux/skbuff.h>
aec45e85 29#include <linux/vmalloc.h>
6d69b1f1 30
b3332930 31#include <net/iucv/af_iucv.h>
290b8348 32#include <net/dsfield.h>
4a71df50 33
ab4227cb 34#include <asm/ebcdic.h>
2bf29df7 35#include <asm/chpid.h>
ab4227cb 36#include <asm/io.h>
1da74b1c 37#include <asm/sysinfo.h>
ec61bd2f
JW		 38#include <asm/diag.h>
39#include <asm/cio.h>
40#include <asm/ccwdev.h>
615dff22 41#include <asm/cpcmd.h>
4a71df50
FB		 42
43#include "qeth_core.h"
4a71df50 44
d11ba0c4
PT		 45struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
46 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
47 /* N P A M L V H */
48 [QETH_DBF_SETUP] = {"qeth_setup",
49 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 50 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
51 &debug_sprintf_view, NULL},
d11ba0c4
PT		 52 [QETH_DBF_CTRL] = {"qeth_control",
53 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
54};
55EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 56
57struct qeth_card_list_struct qeth_core_card_list;
58EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 59struct kmem_cache *qeth_core_header_cache;
60EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 61static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 62
63static struct device *qeth_core_root_dev;
4a71df50 64static struct lock_class_key qdio_out_skb_queue_key;
4a71df50 65
8f6637b8
JW		 66static void qeth_send_control_data_cb(struct qeth_card *card,
67 struct qeth_channel *channel,
68 struct qeth_cmd_buffer *iob);
4a71df50 69static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
4a71df50
FB		 70static void qeth_free_buffer_pool(struct qeth_card *);
71static int qeth_qdio_establish(struct qeth_card *);
0da9581d 72static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 73static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
74 struct qeth_qdio_out_buffer *buf,
75 enum iucv_tx_notify notification);
76static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
72861ae7 77static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 78
b4d72c08 79struct workqueue_struct *qeth_wq;
c044dc21 80EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 81
511c2445
EC		 82int qeth_card_hw_is_reachable(struct qeth_card *card)
83{
84 return (card->state == CARD_STATE_SOFTSETUP) ||
85 (card->state == CARD_STATE_UP);
86}
87EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
88
0f54761d
SR		 89static void qeth_close_dev_handler(struct work_struct *work)
90{
91 struct qeth_card *card;
92
93 card = container_of(work, struct qeth_card, close_dev_work);
94 QETH_CARD_TEXT(card, 2, "cldevhdl");
95 rtnl_lock();
96 dev_close(card->dev);
97 rtnl_unlock();
98 ccwgroup_set_offline(card->gdev);
99}
100
101void qeth_close_dev(struct qeth_card *card)
102{
103 QETH_CARD_TEXT(card, 2, "cldevsubm");
104 queue_work(qeth_wq, &card->close_dev_work);
105}
106EXPORT_SYMBOL_GPL(qeth_close_dev);
107
cef6ff22 108static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 109{
110 if (card->info.guestlan) {
111 switch (card->info.type) {
5113fec0 112 case QETH_CARD_TYPE_OSD:
7096b187 113 return " Virtual NIC QDIO";
4a71df50 114 case QETH_CARD_TYPE_IQD:
7096b187 115 return " Virtual NIC Hiper";
5113fec0 116 case QETH_CARD_TYPE_OSM:
7096b187 117 return " Virtual NIC QDIO - OSM";
5113fec0 118 case QETH_CARD_TYPE_OSX:
7096b187 119 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 120 default:
121 return " unknown";
122 }
123 } else {
124 switch (card->info.type) {
5113fec0 125 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
130 return " OSN QDIO";
5113fec0
UB		 131 case QETH_CARD_TYPE_OSM:
132 return " OSM QDIO";
133 case QETH_CARD_TYPE_OSX:
134 return " OSX QDIO";
4a71df50
FB		 135 default:
136 return " unknown";
137 }
138 }
139 return " n/a";
140}
141
142/* max length to be returned: 14 */
143const char *qeth_get_cardname_short(struct qeth_card *card)
144{
145 if (card->info.guestlan) {
146 switch (card->info.type) {
5113fec0 147 case QETH_CARD_TYPE_OSD:
7096b187 148 return "Virt.NIC QDIO";
4a71df50 149 case QETH_CARD_TYPE_IQD:
7096b187 150 return "Virt.NIC Hiper";
5113fec0 151 case QETH_CARD_TYPE_OSM:
7096b187 152 return "Virt.NIC OSM";
5113fec0 153 case QETH_CARD_TYPE_OSX:
7096b187 154 return "Virt.NIC OSX";
4a71df50
FB		 155 default:
156 return "unknown";
157 }
158 } else {
159 switch (card->info.type) {
5113fec0 160 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 161 switch (card->info.link_type) {
162 case QETH_LINK_TYPE_FAST_ETH:
163 return "OSD_100";
164 case QETH_LINK_TYPE_HSTR:
165 return "HSTR";
166 case QETH_LINK_TYPE_GBIT_ETH:
167 return "OSD_1000";
168 case QETH_LINK_TYPE_10GBIT_ETH:
169 return "OSD_10GIG";
170 case QETH_LINK_TYPE_LANE_ETH100:
171 return "OSD_FE_LANE";
172 case QETH_LINK_TYPE_LANE_TR:
173 return "OSD_TR_LANE";
174 case QETH_LINK_TYPE_LANE_ETH1000:
175 return "OSD_GbE_LANE";
176 case QETH_LINK_TYPE_LANE:
177 return "OSD_ATM_LANE";
178 default:
179 return "OSD_Express";
180 }
181 case QETH_CARD_TYPE_IQD:
182 return "HiperSockets";
183 case QETH_CARD_TYPE_OSN:
184 return "OSN";
5113fec0
UB		 185 case QETH_CARD_TYPE_OSM:
186 return "OSM_1000";
187 case QETH_CARD_TYPE_OSX:
188 return "OSX_10GIG";
4a71df50
FB		 189 default:
190 return "unknown";
191 }
192 }
193 return "n/a";
194}
195
65d8013c
SR		 196void qeth_set_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = current;
199}
200EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
201
202void qeth_clear_recovery_task(struct qeth_card *card)
203{
204 card->recovery_task = NULL;
205}
206EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
207
208static bool qeth_is_recovery_task(const struct qeth_card *card)
209{
210 return card->recovery_task == current;
211}
212
4a71df50
FB		 213void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
214 int clear_start_mask)
215{
216 unsigned long flags;
217
218 spin_lock_irqsave(&card->thread_mask_lock, flags);
219 card->thread_allowed_mask = threads;
220 if (clear_start_mask)
221 card->thread_start_mask &= threads;
222 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
223 wake_up(&card->wait_q);
224}
225EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
226
227int qeth_threads_running(struct qeth_card *card, unsigned long threads)
228{
229 unsigned long flags;
230 int rc = 0;
231
232 spin_lock_irqsave(&card->thread_mask_lock, flags);
233 rc = (card->thread_running_mask & threads);
234 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
235 return rc;
236}
237EXPORT_SYMBOL_GPL(qeth_threads_running);
238
239int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
240{
65d8013c
SR		 241 if (qeth_is_recovery_task(card))
242 return 0;
4a71df50
FB		 243 return wait_event_interruptible(card->wait_q,
244 qeth_threads_running(card, threads) == 0);
245}
246EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
247
248void qeth_clear_working_pool_list(struct qeth_card *card)
249{
250 struct qeth_buffer_pool_entry *pool_entry, *tmp;
251
847a50fd 252 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 253 list_for_each_entry_safe(pool_entry, tmp,
254 &card->qdio.in_buf_pool.entry_list, list){
255 list_del(&pool_entry->list);
256 }
257}
258EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
259
260static int qeth_alloc_buffer_pool(struct qeth_card *card)
261{
262 struct qeth_buffer_pool_entry *pool_entry;
263 void *ptr;
264 int i, j;
265
847a50fd 266 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 267 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 268 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 269 if (!pool_entry) {
270 qeth_free_buffer_pool(card);
271 return -ENOMEM;
272 }
273 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 274 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 275 if (!ptr) {
276 while (j > 0)
277 free_page((unsigned long)
278 pool_entry->elements[--j]);
279 kfree(pool_entry);
280 qeth_free_buffer_pool(card);
281 return -ENOMEM;
282 }
283 pool_entry->elements[j] = ptr;
284 }
285 list_add(&pool_entry->init_list,
286 &card->qdio.init_pool.entry_list);
287 }
288 return 0;
289}
290
291int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
292{
847a50fd 293 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 294
295 if ((card->state != CARD_STATE_DOWN) &&
296 (card->state != CARD_STATE_RECOVER))
297 return -EPERM;
298
299 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
300 qeth_clear_working_pool_list(card);
301 qeth_free_buffer_pool(card);
302 card->qdio.in_buf_pool.buf_count = bufcnt;
303 card->qdio.init_pool.buf_count = bufcnt;
304 return qeth_alloc_buffer_pool(card);
305}
76b11f8e 306EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 307
4601ba6c
SO		 308static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
309{
6d284bde
SO		 310 if (!q)
311 return;
312
313 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 314 kfree(q);
315}
316
317static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
318{
319 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
320 int i;
321
322 if (!q)
323 return NULL;
324
6d284bde
SO		 325 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
326 kfree(q);
327 return NULL;
328 }
329
4601ba6c 330 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 331 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 332
333 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
334 return q;
335}
336
cef6ff22 337static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 338{
339 int rc;
340
341 if (card->options.cq == QETH_CQ_ENABLED) {
342 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 343 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
344 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 345 card->qdio.c_q->next_buf_to_init = 127;
346 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
347 card->qdio.no_in_queues - 1, 0,
348 127);
349 if (rc) {
350 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
351 goto out;
352 }
353 }
354 rc = 0;
355out:
356 return rc;
357}
358
cef6ff22 359static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 360{
361 int rc;
362
363 if (card->options.cq == QETH_CQ_ENABLED) {
364 int i;
365 struct qdio_outbuf_state *outbuf_states;
366
367 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 368 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 369 if (!card->qdio.c_q) {
370 rc = -1;
371 goto kmsg_out;
372 }
0da9581d 373 card->qdio.no_in_queues = 2;
4a912f98 374 card->qdio.out_bufstates =
6396bb22
KC		 375 kcalloc(card->qdio.no_out_queues *
376 QDIO_MAX_BUFFERS_PER_Q,
377 sizeof(struct qdio_outbuf_state),
378 GFP_KERNEL);
0da9581d
EL		 379 outbuf_states = card->qdio.out_bufstates;
380 if (outbuf_states == NULL) {
381 rc = -1;
382 goto free_cq_out;
383 }
384 for (i = 0; i < card->qdio.no_out_queues; ++i) {
385 card->qdio.out_qs[i]->bufstates = outbuf_states;
386 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
387 }
388 } else {
389 QETH_DBF_TEXT(SETUP, 2, "nocq");
390 card->qdio.c_q = NULL;
391 card->qdio.no_in_queues = 1;
392 }
393 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
394 rc = 0;
395out:
396 return rc;
397free_cq_out:
4601ba6c 398 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 399 card->qdio.c_q = NULL;
400kmsg_out:
401 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
402 goto out;
403}
404
cef6ff22 405static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 406{
407 if (card->qdio.c_q) {
408 --card->qdio.no_in_queues;
4601ba6c 409 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 410 card->qdio.c_q = NULL;
411 }
412 kfree(card->qdio.out_bufstates);
413 card->qdio.out_bufstates = NULL;
414}
415
cef6ff22
JW		 416static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
417 int delayed)
418{
b3332930
FB		 419 enum iucv_tx_notify n;
420
421 switch (sbalf15) {
422 case 0:
423 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
424 break;
425 case 4:
426 case 16:
427 case 17:
428 case 18:
429 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
430 TX_NOTIFY_UNREACHABLE;
431 break;
432 default:
433 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
434 TX_NOTIFY_GENERALERROR;
435 break;
436 }
437
438 return n;
439}
440
cef6ff22
JW		 441static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
442 int forced_cleanup)
0da9581d 443{
72861ae7
EL		 444 if (q->card->options.cq != QETH_CQ_ENABLED)
445 return;
446
0da9581d
EL		 447 if (q->bufs[bidx]->next_pending != NULL) {
448 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
449 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
450
451 while (c) {
452 if (forced_cleanup ||
453 atomic_read(&c->state) ==
454 QETH_QDIO_BUF_HANDLED_DELAYED) {
455 struct qeth_qdio_out_buffer *f = c;
456 QETH_CARD_TEXT(f->q->card, 5, "fp");
457 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 458 /* release here to avoid interleaving between
459 outbound tasklet and inbound tasklet
460 regarding notifications and lifecycle */
461 qeth_release_skbs(c);
462
0da9581d 463 c = f->next_pending;
18af5c17 464 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 465 head->next_pending = c;
466 kmem_cache_free(qeth_qdio_outbuf_cache, f);
467 } else {
468 head = c;
469 c = c->next_pending;
470 }
471
472 }
473 }
72861ae7
EL		 474 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
475 QETH_QDIO_BUF_HANDLED_DELAYED)) {
476 /* for recovery situations */
72861ae7
EL		 477 qeth_init_qdio_out_buf(q, bidx);
478 QETH_CARD_TEXT(q->card, 2, "clprecov");
479 }
0da9581d
EL		 480}
481
482
cef6ff22
JW		 483static void qeth_qdio_handle_aob(struct qeth_card *card,
484 unsigned long phys_aob_addr)
485{
0da9581d
EL		 486 struct qaob *aob;
487 struct qeth_qdio_out_buffer *buffer;
b3332930 488 enum iucv_tx_notify notification;
ce28867f 489 unsigned int i;
0da9581d
EL		 490
491 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
492 QETH_CARD_TEXT(card, 5, "haob");
493 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
494 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
495 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
496
b3332930
FB		 497 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
498 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
499 notification = TX_NOTIFY_OK;
500 } else {
18af5c17
SR		 501 WARN_ON_ONCE(atomic_read(&buffer->state) !=
502 QETH_QDIO_BUF_PENDING);
b3332930
FB		 503 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
504 notification = TX_NOTIFY_DELAYED_OK;
505 }
506
507 if (aob->aorc != 0) {
508 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
509 notification = qeth_compute_cq_notification(aob->aorc, 1);
510 }
511 qeth_notify_skbs(buffer->q, buffer, notification);
512
ce28867f
JW		 513 /* Free dangling allocations. The attached skbs are handled by
514 * qeth_cleanup_handled_pending().
515 */
516 for (i = 0;
517 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
518 i++) {
519 if (aob->sba[i] && buffer->is_header[i])
520 kmem_cache_free(qeth_core_header_cache,
521 (void *) aob->sba[i]);
522 }
523 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
72861ae7 524
0da9581d
EL		 525 qdio_release_aob(aob);
526}
527
528static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
529{
530 return card->options.cq == QETH_CQ_ENABLED &&
531 card->qdio.c_q != NULL &&
532 queue != 0 &&
533 queue == card->qdio.no_in_queues - 1;
534}
535
45ca2fd6
JW		 536static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
537{
538 ccw->cmd_code = cmd_code;
539 ccw->flags = CCW_FLAG_SLI;
540 ccw->count = len;
541 ccw->cda = (__u32) __pa(data);
542}
543
17bf8c9b 544static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50 545{
750b1625 546 struct qeth_channel *channel = &card->read;
4a71df50 547 struct qeth_cmd_buffer *iob;
750b1625 548 int rc;
4a71df50 549
847a50fd 550 QETH_CARD_TEXT(card, 5, "issnxrd");
750b1625 551 if (channel->state != CH_STATE_UP)
4a71df50 552 return -EIO;
750b1625 553 iob = qeth_get_buffer(channel);
4a71df50 554 if (!iob) {
74eacdb9
FB		 555 dev_warn(&card->gdev->dev, "The qeth device driver "
556 "failed to recover an error on the device\n");
557 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
558 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 559 return -ENOMEM;
560 }
f15cdaf2 561 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
847a50fd 562 QETH_CARD_TEXT(card, 6, "noirqpnd");
f15cdaf2 563 rc = ccw_device_start(channel->ccwdev, channel->ccw,
4a71df50
FB		 564 (addr_t) iob, 0, 0);
565 if (rc) {
74eacdb9
FB		 566 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
567 "rc=%i\n", dev_name(&card->gdev->dev), rc);
750b1625 568 atomic_set(&channel->irq_pending, 0);
908abbb5 569 card->read_or_write_problem = 1;
4a71df50
FB		 570 qeth_schedule_recovery(card);
571 wake_up(&card->wait_q);
572 }
573 return rc;
574}
575
17bf8c9b
JW		 576static int qeth_issue_next_read(struct qeth_card *card)
577{
578 int ret;
579
580 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
581 ret = __qeth_issue_next_read(card);
582 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
583
584 return ret;
585}
586
4a71df50
FB		 587static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
588{
589 struct qeth_reply *reply;
590
591 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
592 if (reply) {
ae695927 593 refcount_set(&reply->refcnt, 1);
4a71df50 594 atomic_set(&reply->received, 0);
6531084c 595 }
4a71df50
FB		 596 return reply;
597}
598
599static void qeth_get_reply(struct qeth_reply *reply)
600{
ae695927 601 refcount_inc(&reply->refcnt);
4a71df50
FB		 602}
603
604static void qeth_put_reply(struct qeth_reply *reply)
605{
ae695927 606 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 607 kfree(reply);
608}
609
d11ba0c4 610static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 611 struct qeth_card *card)
612{
048a7f8b 613 const char *ipa_name;
d11ba0c4 614 int com = cmd->hdr.command;
4a71df50 615 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 616 if (rc)
70919e23
UB		 617 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
618 "x%X \"%s\"\n",
619 ipa_name, com, dev_name(&card->gdev->dev),
620 QETH_CARD_IFNAME(card), rc,
621 qeth_get_ipa_msg(rc));
d11ba0c4 622 else
70919e23
UB		 623 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
624 ipa_name, com, dev_name(&card->gdev->dev),
625 QETH_CARD_IFNAME(card));
4a71df50
FB		 626}
627
628static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
d19b93f4 629 struct qeth_ipa_cmd *cmd)
4a71df50 630{
847a50fd 631 QETH_CARD_TEXT(card, 5, "chkipad");
d19b93f4
JW		 632
633 if (IS_IPA_REPLY(cmd)) {
634 if (cmd->hdr.command != IPA_CMD_SETCCID &&
635 cmd->hdr.command != IPA_CMD_DELCCID &&
636 cmd->hdr.command != IPA_CMD_MODCCID &&
637 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
638 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
639 return cmd;
640 }
641
642 /* handle unsolicited event: */
643 switch (cmd->hdr.command) {
644 case IPA_CMD_STOPLAN:
645 if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
646 dev_err(&card->gdev->dev,
647 "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
648 QETH_CARD_IFNAME(card));
649 qeth_close_dev(card);
4a71df50 650 } else {
d19b93f4
JW		 651 dev_warn(&card->gdev->dev,
652 "The link for interface %s on CHPID 0x%X failed\n",
653 QETH_CARD_IFNAME(card), card->info.chpid);
654 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
91cc98f5 655 netif_carrier_off(card->dev);
4a71df50 656 }
d19b93f4
JW		 657 return NULL;
658 case IPA_CMD_STARTLAN:
659 dev_info(&card->gdev->dev,
660 "The link for %s on CHPID 0x%X has been restored\n",
661 QETH_CARD_IFNAME(card), card->info.chpid);
d19b93f4
JW		 662 if (card->info.hwtrap)
663 card->info.hwtrap = 2;
664 qeth_schedule_recovery(card);
665 return NULL;
666 case IPA_CMD_SETBRIDGEPORT_IQD:
667 case IPA_CMD_SETBRIDGEPORT_OSA:
668 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
669 if (card->discipline->control_event_handler(card, cmd))
670 return cmd;
671 return NULL;
672 case IPA_CMD_MODCCID:
673 return cmd;
674 case IPA_CMD_REGISTER_LOCAL_ADDR:
675 QETH_CARD_TEXT(card, 3, "irla");
676 return NULL;
677 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
678 QETH_CARD_TEXT(card, 3, "urla");
679 return NULL;
680 default:
681 QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
682 return cmd;
4a71df50 683 }
4a71df50
FB		 684}
685
686void qeth_clear_ipacmd_list(struct qeth_card *card)
687{
688 struct qeth_reply *reply, *r;
689 unsigned long flags;
690
847a50fd 691 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 692
693 spin_lock_irqsave(&card->lock, flags);
694 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
695 qeth_get_reply(reply);
696 reply->rc = -EIO;
697 atomic_inc(&reply->received);
698 list_del_init(&reply->list);
699 wake_up(&reply->wait_q);
700 qeth_put_reply(reply);
701 }
702 spin_unlock_irqrestore(&card->lock, flags);
703}
704EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
705
5113fec0
UB		 706static int qeth_check_idx_response(struct qeth_card *card,
707 unsigned char *buffer)
4a71df50
FB		 708{
709 if (!buffer)
710 return 0;
711
d11ba0c4 712 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 713 if ((buffer[2] & 0xc0) == 0xc0) {
d857e111
JW		 714 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
715 buffer[4]);
847a50fd
CO		 716 QETH_CARD_TEXT(card, 2, "ckidxres");
717 QETH_CARD_TEXT(card, 2, " idxterm");
718 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 719 if (buffer[4] == 0xf6) {
720 dev_err(&card->gdev->dev,
721 "The qeth device is not configured "
722 "for the OSI layer required by z/VM\n");
723 return -EPERM;
724 }
4a71df50
FB		 725 return -EIO;
726 }
727 return 0;
728}
729
4a71df50
FB		 730static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
731{
732 __u8 index;
733
4a71df50
FB		 734 index = channel->io_buf_no;
735 do {
736 if (channel->iob[index].state == BUF_STATE_FREE) {
737 channel->iob[index].state = BUF_STATE_LOCKED;
738 channel->io_buf_no = (channel->io_buf_no + 1) %
739 QETH_CMD_BUFFER_NO;
740 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
741 return channel->iob + index;
742 }
743 index = (index + 1) % QETH_CMD_BUFFER_NO;
744 } while (index != channel->io_buf_no);
745
746 return NULL;
747}
748
749void qeth_release_buffer(struct qeth_channel *channel,
750 struct qeth_cmd_buffer *iob)
751{
752 unsigned long flags;
753
4a71df50 754 spin_lock_irqsave(&channel->iob_lock, flags);
4a71df50
FB		 755 iob->state = BUF_STATE_FREE;
756 iob->callback = qeth_send_control_data_cb;
757 iob->rc = 0;
758 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 759 wake_up(&channel->wait_q);
4a71df50
FB		 760}
761EXPORT_SYMBOL_GPL(qeth_release_buffer);
762
8f6637b8
JW		 763static void qeth_release_buffer_cb(struct qeth_card *card,
764 struct qeth_channel *channel,
765 struct qeth_cmd_buffer *iob)
766{
767 qeth_release_buffer(channel, iob);
768}
769
4a71df50
FB		 770static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
771{
772 struct qeth_cmd_buffer *buffer = NULL;
773 unsigned long flags;
774
775 spin_lock_irqsave(&channel->iob_lock, flags);
776 buffer = __qeth_get_buffer(channel);
777 spin_unlock_irqrestore(&channel->iob_lock, flags);
778 return buffer;
779}
780
781struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
782{
783 struct qeth_cmd_buffer *buffer;
784 wait_event(channel->wait_q,
785 ((buffer = qeth_get_buffer(channel)) != NULL));
786 return buffer;
787}
788EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
789
790void qeth_clear_cmd_buffers(struct qeth_channel *channel)
791{
792 int cnt;
793
794 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
795 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 796 channel->io_buf_no = 0;
797}
798EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
799
8f6637b8
JW		 800static void qeth_send_control_data_cb(struct qeth_card *card,
801 struct qeth_channel *channel,
802 struct qeth_cmd_buffer *iob)
4a71df50 803{
d19b93f4 804 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 805 struct qeth_reply *reply, *r;
4a71df50
FB		 806 unsigned long flags;
807 int keep_reply;
5113fec0 808 int rc = 0;
4a71df50 809
847a50fd 810 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 811 rc = qeth_check_idx_response(card, iob->data);
812 switch (rc) {
813 case 0:
814 break;
815 case -EIO:
4a71df50 816 qeth_clear_ipacmd_list(card);
5113fec0 817 qeth_schedule_recovery(card);
01fc3e86 818 /* fall through */
5113fec0 819 default:
4a71df50
FB		 820 goto out;
821 }
822
d19b93f4
JW		 823 if (IS_IPA(iob->data)) {
824 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
825 cmd = qeth_check_ipa_data(card, cmd);
d782d80f
JW		 826 if (!cmd)
827 goto out;
828 if (IS_OSN(card) && card->osn_info.assist_cb &&
829 cmd->hdr.command != IPA_CMD_STARTLAN) {
830 card->osn_info.assist_cb(card->dev, cmd);
831 goto out;
832 }
833 } else {
834 /* non-IPA commands should only flow during initialization */
835 if (card->state != CARD_STATE_DOWN)
836 goto out;
4a71df50
FB		 837 }
838
839 spin_lock_irqsave(&card->lock, flags);
840 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
841 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
842 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
843 qeth_get_reply(reply);
844 list_del_init(&reply->list);
845 spin_unlock_irqrestore(&card->lock, flags);
846 keep_reply = 0;
847 if (reply->callback != NULL) {
848 if (cmd) {
849 reply->offset = (__u16)((char *)cmd -
850 (char *)iob->data);
851 keep_reply = reply->callback(card,
852 reply,
853 (unsigned long)cmd);
854 } else
855 keep_reply = reply->callback(card,
856 reply,
857 (unsigned long)iob);
858 }
859 if (cmd)
860 reply->rc = (u16) cmd->hdr.return_code;
861 else if (iob->rc)
862 reply->rc = iob->rc;
863 if (keep_reply) {
864 spin_lock_irqsave(&card->lock, flags);
865 list_add_tail(&reply->list,
866 &card->cmd_waiter_list);
867 spin_unlock_irqrestore(&card->lock, flags);
868 } else {
869 atomic_inc(&reply->received);
870 wake_up(&reply->wait_q);
871 }
872 qeth_put_reply(reply);
873 goto out;
874 }
875 }
876 spin_unlock_irqrestore(&card->lock, flags);
877out:
878 memcpy(&card->seqno.pdu_hdr_ack,
879 QETH_PDU_HEADER_SEQ_NO(iob->data),
880 QETH_SEQ_NO_LENGTH);
881 qeth_release_buffer(channel, iob);
882}
883
4a71df50
FB		 884static int qeth_set_thread_start_bit(struct qeth_card *card,
885 unsigned long thread)
886{
887 unsigned long flags;
888
889 spin_lock_irqsave(&card->thread_mask_lock, flags);
890 if (!(card->thread_allowed_mask & thread) ||
891 (card->thread_start_mask & thread)) {
892 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
893 return -EPERM;
894 }
895 card->thread_start_mask |= thread;
896 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
897 return 0;
898}
899
900void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
901{
902 unsigned long flags;
903
904 spin_lock_irqsave(&card->thread_mask_lock, flags);
905 card->thread_start_mask &= ~thread;
906 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
907 wake_up(&card->wait_q);
908}
909EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
910
911void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
912{
913 unsigned long flags;
914
915 spin_lock_irqsave(&card->thread_mask_lock, flags);
916 card->thread_running_mask &= ~thread;
917 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 918 wake_up_all(&card->wait_q);
4a71df50
FB		 919}
920EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
921
922static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
923{
924 unsigned long flags;
925 int rc = 0;
926
927 spin_lock_irqsave(&card->thread_mask_lock, flags);
928 if (card->thread_start_mask & thread) {
929 if ((card->thread_allowed_mask & thread) &&
930 !(card->thread_running_mask & thread)) {
931 rc = 1;
932 card->thread_start_mask &= ~thread;
933 card->thread_running_mask |= thread;
934 } else
935 rc = -EPERM;
936 }
937 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
938 return rc;
939}
940
941int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
942{
943 int rc = 0;
944
945 wait_event(card->wait_q,
946 (rc = __qeth_do_run_thread(card, thread)) >= 0);
947 return rc;
948}
949EXPORT_SYMBOL_GPL(qeth_do_run_thread);
950
951void qeth_schedule_recovery(struct qeth_card *card)
952{
847a50fd 953 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 954 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
955 schedule_work(&card->kernel_thread_starter);
956}
957EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
958
8d908eb0
JW		 959static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
960 struct irb *irb)
4a71df50
FB		 961{
962 int dstat, cstat;
963 char *sense;
964
965 sense = (char *) irb->ecw;
23d805b6
PO		 966 cstat = irb->scsw.cmd.cstat;
967 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 968
969 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
970 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
971 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 972 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 973 dev_warn(&cdev->dev, "The qeth device driver "
974 "failed to recover an error on the device\n");
5113fec0 975 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 976 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 977 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
978 16, 1, irb, 64, 1);
979 return 1;
980 }
981
982 if (dstat & DEV_STAT_UNIT_CHECK) {
983 if (sense[SENSE_RESETTING_EVENT_BYTE] &
984 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 985 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 986 return 1;
987 }
988 if (sense[SENSE_COMMAND_REJECT_BYTE] &
989 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 990 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 991 return 1;
4a71df50
FB		 992 }
993 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 994 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 995 return 1;
996 }
997 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 998 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 999 return 0;
1000 }
847a50fd 1001 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1002 return 1;
1003 }
1004 return 0;
1005}
1006
8d908eb0
JW		 1007static long qeth_check_irb_error(struct qeth_card *card,
1008 struct ccw_device *cdev, unsigned long intparm,
1009 struct irb *irb)
4a71df50 1010{
8d908eb0 1011 if (!IS_ERR(irb))
4a71df50
FB		 1012 return 0;
1013
1014 switch (PTR_ERR(irb)) {
1015 case -EIO:
74eacdb9
FB		 1016 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1017 dev_name(&cdev->dev));
847a50fd
CO		 1018 QETH_CARD_TEXT(card, 2, "ckirberr");
1019 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1020 break;
1021 case -ETIMEDOUT:
74eacdb9
FB		 1022 dev_warn(&cdev->dev, "A hardware operation timed out"
1023 " on the device\n");
847a50fd
CO		 1024 QETH_CARD_TEXT(card, 2, "ckirberr");
1025 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1026 if (intparm == QETH_RCD_PARM) {
e95051ff 1027 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1028 card->data.state = CH_STATE_DOWN;
1029 wake_up(&card->wait_q);
1030 }
1031 }
1032 break;
1033 default:
74eacdb9
FB		 1034 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1035 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1036 QETH_CARD_TEXT(card, 2, "ckirberr");
1037 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1038 }
1039 return PTR_ERR(irb);
1040}
1041
1042static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1043 struct irb *irb)
1044{
1045 int rc;
1046 int cstat, dstat;
db71bbbd 1047 struct qeth_cmd_buffer *iob = NULL;
8d908eb0 1048 struct ccwgroup_device *gdev;
4a71df50
FB		 1049 struct qeth_channel *channel;
1050 struct qeth_card *card;
4a71df50 1051
8d908eb0
JW		 1052 /* while we hold the ccwdev lock, this stays valid: */
1053 gdev = dev_get_drvdata(&cdev->dev);
1054 card = dev_get_drvdata(&gdev->dev);
4a71df50
FB		 1055 if (!card)
1056 return;
1057
847a50fd
CO		 1058 QETH_CARD_TEXT(card, 5, "irq");
1059
4a71df50
FB		 1060 if (card->read.ccwdev == cdev) {
1061 channel = &card->read;
847a50fd 1062 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1063 } else if (card->write.ccwdev == cdev) {
1064 channel = &card->write;
847a50fd 1065 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1066 } else {
1067 channel = &card->data;
847a50fd 1068 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1069 }
db71bbbd
JW		 1070
1071 if (qeth_intparm_is_iob(intparm))
1072 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1073
8d908eb0 1074 if (qeth_check_irb_error(card, cdev, intparm, irb)) {
db71bbbd
JW		 1075 /* IO was terminated, free its resources. */
1076 if (iob)
1077 qeth_release_buffer(iob->channel, iob);
1078 atomic_set(&channel->irq_pending, 0);
1079 wake_up(&card->wait_q);
1080 return;
1081 }
1082
4a71df50
FB		 1083 atomic_set(&channel->irq_pending, 0);
1084
23d805b6 1085 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1086 channel->state = CH_STATE_STOPPED;
1087
23d805b6 1088 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1089 channel->state = CH_STATE_HALTED;
1090
1091 /*let's wake up immediately on data channel*/
1092 if ((channel == &card->data) && (intparm != 0) &&
1093 (intparm != QETH_RCD_PARM))
1094 goto out;
1095
1096 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1097 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1098 /* we don't have to handle this further */
1099 intparm = 0;
1100 }
1101 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1102 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1103 /* we don't have to handle this further */
1104 intparm = 0;
1105 }
db71bbbd
JW		 1106
1107 cstat = irb->scsw.cmd.cstat;
1108 dstat = irb->scsw.cmd.dstat;
1109
4a71df50
FB		 1110 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1111 (dstat & DEV_STAT_UNIT_CHECK) ||
1112 (cstat)) {
1113 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1114 dev_warn(&channel->ccwdev->dev,
1115 "The qeth device driver failed to recover "
1116 "an error on the device\n");
1117 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1118 "0x%X dstat 0x%X\n",
1119 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1120 print_hex_dump(KERN_WARNING, "qeth: irb ",
1121 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1122 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1123 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1124 }
1125 if (intparm == QETH_RCD_PARM) {
1126 channel->state = CH_STATE_DOWN;
1127 goto out;
1128 }
8d908eb0 1129 rc = qeth_get_problem(card, cdev, irb);
4a71df50 1130 if (rc) {
a6c3d939 1131 card->read_or_write_problem = 1;
28a7e4c9 1132 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1133 qeth_schedule_recovery(card);
1134 goto out;
1135 }
1136 }
1137
1138 if (intparm == QETH_RCD_PARM) {
1139 channel->state = CH_STATE_RCD_DONE;
1140 goto out;
1141 }
4a71df50
FB		 1142 if (channel == &card->data)
1143 return;
1144 if (channel == &card->read &&
1145 channel->state == CH_STATE_UP)
17bf8c9b 1146 __qeth_issue_next_read(card);
4a71df50 1147
db71bbbd 1148 if (iob && iob->callback)
8f6637b8 1149 iob->callback(card, iob->channel, iob);
4a71df50 1150
4a71df50
FB		 1151out:
1152 wake_up(&card->wait_q);
1153 return;
1154}
1155
b3332930 1156static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1157 struct qeth_qdio_out_buffer *buf,
b3332930 1158 enum iucv_tx_notify notification)
4a71df50 1159{
4a71df50
FB		 1160 struct sk_buff *skb;
1161
dc149e37 1162 skb_queue_walk(&buf->skb_list, skb) {
b3332930
FB		 1163 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1164 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6a3123d0
JW		 1165 if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
1166 iucv_sk(skb->sk)->sk_txnotify(skb, notification);
b3332930 1167 }
b3332930
FB		 1168}
1169
1170static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1171{
72861ae7 1172 /* release may never happen from within CQ tasklet scope */
18af5c17 1173 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1174
6a3123d0
JW		 1175 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1176 qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
1177
dc149e37 1178 __skb_queue_purge(&buf->skb_list);
b3332930
FB		 1179}
1180
1181static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
3b346c18 1182 struct qeth_qdio_out_buffer *buf)
b3332930
FB		 1183{
1184 int i;
1185
1186 /* is PCI flag set on buffer? */
1187 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1188 atomic_dec(&queue->set_pci_flags_count);
1189
3b346c18
JW		 1190 qeth_release_skbs(buf);
1191
4a71df50 1192 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1193 if (buf->buffer->element[i].addr && buf->is_header[i])
1194 kmem_cache_free(qeth_core_header_cache,
1195 buf->buffer->element[i].addr);
1196 buf->is_header[i] = 0;
4a71df50 1197 }
3b346c18
JW		 1198
1199 qeth_scrub_qdio_buffer(buf->buffer,
1200 QETH_MAX_BUFFER_ELEMENTS(queue->card));
4a71df50 1201 buf->next_element_to_fill = 0;
3b346c18 1202 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
0da9581d
EL		 1203}
1204
1205static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1206{
1207 int j;
1208
1209 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1210 if (!q->bufs[j])
1211 continue;
72861ae7 1212 qeth_cleanup_handled_pending(q, j, 1);
3b346c18 1213 qeth_clear_output_buffer(q, q->bufs[j]);
0da9581d
EL		 1214 if (free) {
1215 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1216 q->bufs[j] = NULL;
1217 }
1218 }
4a71df50
FB		 1219}
1220
1221void qeth_clear_qdio_buffers(struct qeth_card *card)
1222{
0da9581d 1223 int i;
4a71df50 1224
847a50fd 1225 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1226 /* clear outbound buffers to free skbs */
0da9581d 1227 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1228 if (card->qdio.out_qs[i]) {
0da9581d 1229 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1230 }
0da9581d 1231 }
4a71df50
FB		 1232}
1233EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1234
1235static void qeth_free_buffer_pool(struct qeth_card *card)
1236{
1237 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1238 int i = 0;
4a71df50
FB		 1239 list_for_each_entry_safe(pool_entry, tmp,
1240 &card->qdio.init_pool.entry_list, init_list){
1241 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1242 free_page((unsigned long)pool_entry->elements[i]);
1243 list_del(&pool_entry->init_list);
1244 kfree(pool_entry);
1245 }
1246}
1247
4a71df50
FB		 1248static void qeth_clean_channel(struct qeth_channel *channel)
1249{
121ca39a 1250 struct ccw_device *cdev = channel->ccwdev;
4a71df50
FB		 1251 int cnt;
1252
d11ba0c4 1253 QETH_DBF_TEXT(SETUP, 2, "freech");
121ca39a
JW		 1254
1255 spin_lock_irq(get_ccwdev_lock(cdev));
1256 cdev->handler = NULL;
1257 spin_unlock_irq(get_ccwdev_lock(cdev));
1258
4a71df50
FB		 1259 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1260 kfree(channel->iob[cnt].data);
f15cdaf2 1261 kfree(channel->ccw);
4a71df50
FB		 1262}
1263
121ca39a
JW		 1264static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
1265{
1266 struct ccw_device *cdev = channel->ccwdev;
1267 int cnt;
1268
1269 QETH_DBF_TEXT(SETUP, 2, "setupch");
1270
1271 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
1272 if (!channel->ccw)
1273 return -ENOMEM;
1274 channel->state = CH_STATE_DOWN;
1275 atomic_set(&channel->irq_pending, 0);
1276 init_waitqueue_head(&channel->wait_q);
1277
1278 spin_lock_irq(get_ccwdev_lock(cdev));
1279 cdev->handler = qeth_irq;
1280 spin_unlock_irq(get_ccwdev_lock(cdev));
1281
1282 if (!alloc_buffers)
1283 return 0;
1284
1285 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
500abbf0
JW		 1286 channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
1287 GFP_KERNEL | GFP_DMA);
121ca39a
JW		 1288 if (channel->iob[cnt].data == NULL)
1289 break;
1290 channel->iob[cnt].state = BUF_STATE_FREE;
1291 channel->iob[cnt].channel = channel;
1292 channel->iob[cnt].callback = qeth_send_control_data_cb;
1293 channel->iob[cnt].rc = 0;
1294 }
1295 if (cnt < QETH_CMD_BUFFER_NO) {
1296 qeth_clean_channel(channel);
1297 return -ENOMEM;
1298 }
1299 channel->io_buf_no = 0;
1300 spin_lock_init(&channel->iob_lock);
1301
1302 return 0;
1303}
1304
725b9c04
SO		 1305static void qeth_set_single_write_queues(struct qeth_card *card)
1306{
1307 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1308 (card->qdio.no_out_queues == 4))
1309 qeth_free_qdio_buffers(card);
1310
1311 card->qdio.no_out_queues = 1;
1312 if (card->qdio.default_out_queue != 0)
1313 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1314
1315 card->qdio.default_out_queue = 0;
1316}
1317
1318static void qeth_set_multiple_write_queues(struct qeth_card *card)
1319{
1320 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1321 (card->qdio.no_out_queues == 1)) {
1322 qeth_free_qdio_buffers(card);
1323 card->qdio.default_out_queue = 2;
1324 }
1325 card->qdio.no_out_queues = 4;
1326}
1327
1328static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1329{
4a71df50 1330 struct ccw_device *ccwdev;
ded27d8d 1331 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1332
5113fec0 1333 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1334
1335 ccwdev = card->data.ccwdev;
725b9c04
SO		 1336 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1337 if (!chp_dsc)
1338 goto out;
1339
1340 card->info.func_level = 0x4100 + chp_dsc->desc;
1341 if (card->info.type == QETH_CARD_TYPE_IQD)
1342 goto out;
1343
1344 /* CHPP field bit 6 == 1 -> single queue */
1345 if ((chp_dsc->chpp & 0x02) == 0x02)
1346 qeth_set_single_write_queues(card);
1347 else
1348 qeth_set_multiple_write_queues(card);
1349out:
1350 kfree(chp_dsc);
5113fec0
UB		 1351 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1352 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1353}
1354
1355static void qeth_init_qdio_info(struct qeth_card *card)
1356{
d11ba0c4 1357 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50 1358 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
95f4d8b7
JW		 1359 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1360 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1361 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1362
4a71df50 1363 /* inbound */
ed2e93ef 1364 card->qdio.no_in_queues = 1;
4a71df50 1365 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1366 if (card->info.type == QETH_CARD_TYPE_IQD)
1367 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1368 else
1369 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1370 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1371 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1372 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1373}
1374
95f4d8b7 1375static void qeth_set_initial_options(struct qeth_card *card)
4a71df50
FB		 1376{
1377 card->options.route4.type = NO_ROUTER;
1378 card->options.route6.type = NO_ROUTER;
4a71df50 1379 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1380 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1381 card->options.cq = QETH_CQ_DISABLED;
4fda3354 1382 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
4a71df50
FB		 1383}
1384
1385static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1386{
1387 unsigned long flags;
1388 int rc = 0;
1389
1390 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1391 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1392 (u8) card->thread_start_mask,
1393 (u8) card->thread_allowed_mask,
1394 (u8) card->thread_running_mask);
1395 rc = (card->thread_start_mask & thread);
1396 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1397 return rc;
1398}
1399
1400static void qeth_start_kernel_thread(struct work_struct *work)
1401{
3f36b890 1402 struct task_struct *ts;
4a71df50
FB		 1403 struct qeth_card *card = container_of(work, struct qeth_card,
1404 kernel_thread_starter);
847a50fd 1405 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1406
1407 if (card->read.state != CH_STATE_UP &&
1408 card->write.state != CH_STATE_UP)
1409 return;
3f36b890 1410 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1411 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1412 "qeth_recover");
3f36b890
FB		 1413 if (IS_ERR(ts)) {
1414 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1415 qeth_clear_thread_running_bit(card,
1416 QETH_RECOVER_THREAD);
1417 }
1418 }
4a71df50
FB		 1419}
1420
bca51650 1421static void qeth_buffer_reclaim_work(struct work_struct *);
95f4d8b7 1422static void qeth_setup_card(struct qeth_card *card)
4a71df50 1423{
d11ba0c4
PT		 1424 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1425 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50 1426
95f4d8b7 1427 card->info.type = CARD_RDEV(card)->id.driver_info;
4a71df50 1428 card->state = CARD_STATE_DOWN;
4a71df50 1429 spin_lock_init(&card->mclock);
4a71df50
FB		 1430 spin_lock_init(&card->lock);
1431 spin_lock_init(&card->ip_lock);
1432 spin_lock_init(&card->thread_mask_lock);
c4949f07 1433 mutex_init(&card->conf_mutex);
9dc48ccc 1434 mutex_init(&card->discipline_mutex);
d4ac0246 1435 mutex_init(&card->vid_list_mutex);
4a71df50 1436 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1437 INIT_LIST_HEAD(&card->cmd_waiter_list);
1438 init_waitqueue_head(&card->wait_q);
95f4d8b7 1439 qeth_set_initial_options(card);
4a71df50
FB		 1440 /* IP address takeover */
1441 INIT_LIST_HEAD(&card->ipato.entries);
4a71df50 1442 qeth_init_qdio_info(card);
b3332930 1443 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1444 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1445}
1446
6bcac508
MS		 1447static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1448{
1449 struct qeth_card *card = container_of(slr, struct qeth_card,
1450 qeth_service_level);
0d788c7d
KDW		 1451 if (card->info.mcl_level[0])
1452 seq_printf(m, "qeth: %s firmware level %s\n",
1453 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1454}
1455
121ca39a 1456static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
4a71df50
FB		 1457{
1458 struct qeth_card *card;
1459
d11ba0c4 1460 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
f15cdaf2 1461 card = kzalloc(sizeof(*card), GFP_KERNEL);
4a71df50 1462 if (!card)
76b11f8e 1463 goto out;
d11ba0c4 1464 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
121ca39a
JW		 1465
1466 card->gdev = gdev;
a2eb0ad5 1467 dev_set_drvdata(&gdev->dev, card);
121ca39a
JW		 1468 CARD_RDEV(card) = gdev->cdev[0];
1469 CARD_WDEV(card) = gdev->cdev[1];
1470 CARD_DDEV(card) = gdev->cdev[2];
24142fd8 1471 if (qeth_setup_channel(&card->read, true))
76b11f8e 1472 goto out_ip;
24142fd8 1473 if (qeth_setup_channel(&card->write, true))
76b11f8e 1474 goto out_channel;
24142fd8
JW		 1475 if (qeth_setup_channel(&card->data, false))
1476 goto out_data;
6bcac508
MS		 1477 card->qeth_service_level.seq_print = qeth_core_sl_print;
1478 register_service_level(&card->qeth_service_level);
4a71df50 1479 return card;
76b11f8e 1480
24142fd8
JW		 1481out_data:
1482 qeth_clean_channel(&card->write);
76b11f8e
UB		 1483out_channel:
1484 qeth_clean_channel(&card->read);
1485out_ip:
a2eb0ad5 1486 dev_set_drvdata(&gdev->dev, NULL);
76b11f8e
UB		 1487 kfree(card);
1488out:
1489 return NULL;
4a71df50
FB		 1490}
1491
8d908eb0
JW		 1492static int qeth_clear_channel(struct qeth_card *card,
1493 struct qeth_channel *channel)
4a71df50 1494{
4a71df50
FB		 1495 int rc;
1496
847a50fd 1497 QETH_CARD_TEXT(card, 3, "clearch");
ed47155b 1498 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1499 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
ed47155b 1500 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1501
1502 if (rc)
1503 return rc;
1504 rc = wait_event_interruptible_timeout(card->wait_q,
1505 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1506 if (rc == -ERESTARTSYS)
1507 return rc;
1508 if (channel->state != CH_STATE_STOPPED)
1509 return -ETIME;
1510 channel->state = CH_STATE_DOWN;
1511 return 0;
1512}
1513
8d908eb0
JW		 1514static int qeth_halt_channel(struct qeth_card *card,
1515 struct qeth_channel *channel)
4a71df50 1516{
4a71df50
FB		 1517 int rc;
1518
847a50fd 1519 QETH_CARD_TEXT(card, 3, "haltch");
ed47155b 1520 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1521 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
ed47155b 1522 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1523
1524 if (rc)
1525 return rc;
1526 rc = wait_event_interruptible_timeout(card->wait_q,
1527 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1528 if (rc == -ERESTARTSYS)
1529 return rc;
1530 if (channel->state != CH_STATE_HALTED)
1531 return -ETIME;
1532 return 0;
1533}
1534
1535static int qeth_halt_channels(struct qeth_card *card)
1536{
1537 int rc1 = 0, rc2 = 0, rc3 = 0;
1538
847a50fd 1539 QETH_CARD_TEXT(card, 3, "haltchs");
8d908eb0
JW		 1540 rc1 = qeth_halt_channel(card, &card->read);
1541 rc2 = qeth_halt_channel(card, &card->write);
1542 rc3 = qeth_halt_channel(card, &card->data);
4a71df50
FB		 1543 if (rc1)
1544 return rc1;
1545 if (rc2)
1546 return rc2;
1547 return rc3;
1548}
1549
1550static int qeth_clear_channels(struct qeth_card *card)
1551{
1552 int rc1 = 0, rc2 = 0, rc3 = 0;
1553
847a50fd 1554 QETH_CARD_TEXT(card, 3, "clearchs");
8d908eb0
JW		 1555 rc1 = qeth_clear_channel(card, &card->read);
1556 rc2 = qeth_clear_channel(card, &card->write);
1557 rc3 = qeth_clear_channel(card, &card->data);
4a71df50
FB		 1558 if (rc1)
1559 return rc1;
1560 if (rc2)
1561 return rc2;
1562 return rc3;
1563}
1564
1565static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1566{
1567 int rc = 0;
1568
847a50fd 1569 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1570
1571 if (halt)
1572 rc = qeth_halt_channels(card);
1573 if (rc)
1574 return rc;
1575 return qeth_clear_channels(card);
1576}
1577
1578int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1579{
1580 int rc = 0;
1581
847a50fd 1582 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1583 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1584 QETH_QDIO_CLEANING)) {
1585 case QETH_QDIO_ESTABLISHED:
1586 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1587 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1588 QDIO_FLAG_CLEANUP_USING_HALT);
1589 else
cc961d40 1590 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1591 QDIO_FLAG_CLEANUP_USING_CLEAR);
1592 if (rc)
847a50fd 1593 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1594 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1595 break;
1596 case QETH_QDIO_CLEANING:
1597 return rc;
1598 default:
1599 break;
1600 }
1601 rc = qeth_clear_halt_card(card, use_halt);
1602 if (rc)
847a50fd 1603 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1604 card->state = CARD_STATE_DOWN;
1605 return rc;
1606}
1607EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1608
1609static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1610 int *length)
1611{
1612 struct ciw *ciw;
1613 char *rcd_buf;
1614 int ret;
1615 struct qeth_channel *channel = &card->data;
4a71df50
FB		 1616
1617 /*
1618 * scan for RCD command in extended SenseID data
1619 */
1620 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1621 if (!ciw || ciw->cmd == 0)
1622 return -EOPNOTSUPP;
1623 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1624 if (!rcd_buf)
1625 return -ENOMEM;
1626
f15cdaf2 1627 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
4a71df50 1628 channel->state = CH_STATE_RCD;
ed47155b 1629 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1630 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
4a71df50
FB		 1631 QETH_RCD_PARM, LPM_ANYPATH, 0,
1632 QETH_RCD_TIMEOUT);
ed47155b 1633 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1634 if (!ret)
1635 wait_event(card->wait_q,
1636 (channel->state == CH_STATE_RCD_DONE ||
1637 channel->state == CH_STATE_DOWN));
1638 if (channel->state == CH_STATE_DOWN)
1639 ret = -EIO;
1640 else
1641 channel->state = CH_STATE_DOWN;
1642 if (ret) {
1643 kfree(rcd_buf);
1644 *buffer = NULL;
1645 *length = 0;
1646 } else {
1647 *length = ciw->count;
1648 *buffer = rcd_buf;
1649 }
1650 return ret;
1651}
1652
a60389ab 1653static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1654{
a60389ab 1655 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1656 card->info.chpid = prcd[30];
1657 card->info.unit_addr2 = prcd[31];
1658 card->info.cula = prcd[63];
1659 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1660 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1661}
1662
615dff22
JW		 1663static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1664{
1665 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1666 struct diag26c_vnic_resp *response = NULL;
1667 struct diag26c_vnic_req *request = NULL;
1668 struct ccw_dev_id id;
1669 char userid[80];
1670 int rc = 0;
1671
1672 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1673
1674 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1675 if (rc)
1676 goto out;
1677
1678 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1679 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1680 if (!request || !response) {
1681 rc = -ENOMEM;
1682 goto out;
1683 }
1684
1685 ccw_device_get_id(CARD_RDEV(card), &id);
1686 request->resp_buf_len = sizeof(*response);
1687 request->resp_version = DIAG26C_VERSION6_VM65918;
1688 request->req_format = DIAG26C_VNIC_INFO;
1689 ASCEBC(userid, 8);
1690 memcpy(&request->sys_name, userid, 8);
1691 request->devno = id.devno;
1692
1693 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1694 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1695 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1696 if (rc)
1697 goto out;
1698 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1699
1700 if (request->resp_buf_len < sizeof(*response) ||
1701 response->version != request->resp_version) {
1702 rc = -EIO;
1703 goto out;
1704 }
1705
1706 if (response->protocol == VNIC_INFO_PROT_L2)
1707 disc = QETH_DISCIPLINE_LAYER2;
1708 else if (response->protocol == VNIC_INFO_PROT_L3)
1709 disc = QETH_DISCIPLINE_LAYER3;
1710
1711out:
1712 kfree(response);
1713 kfree(request);
1714 if (rc)
1715 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1716 return disc;
1717}
1718
c70eb09d
JW		 1719/* Determine whether the device requires a specific layer discipline */
1720static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1721{
615dff22
JW		 1722 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1723
c70eb09d 1724 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1725 card->info.type == QETH_CARD_TYPE_OSN)
1726 disc = QETH_DISCIPLINE_LAYER2;
1727 else if (card->info.guestlan)
1728 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1729 QETH_DISCIPLINE_LAYER3 :
1730 qeth_vm_detect_layer(card);
1731
1732 switch (disc) {
1733 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1734 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1735 break;
1736 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1737 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1738 break;
1739 default:
1740 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1741 }
1742
615dff22 1743 return disc;
c70eb09d
JW		 1744}
1745
a60389ab
EL		 1746static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1747{
1748 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1749
e6e056ba 1750 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1751 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1752 card->info.blkt.time_total = 0;
1753 card->info.blkt.inter_packet = 0;
1754 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1755 } else {
1756 card->info.blkt.time_total = 250;
1757 card->info.blkt.inter_packet = 5;
1758 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1759 }
4a71df50
FB		 1760}
1761
1762static void qeth_init_tokens(struct qeth_card *card)
1763{
1764 card->token.issuer_rm_w = 0x00010103UL;
1765 card->token.cm_filter_w = 0x00010108UL;
1766 card->token.cm_connection_w = 0x0001010aUL;
1767 card->token.ulp_filter_w = 0x0001010bUL;
1768 card->token.ulp_connection_w = 0x0001010dUL;
1769}
1770
1771static void qeth_init_func_level(struct qeth_card *card)
1772{
5113fec0
UB		 1773 switch (card->info.type) {
1774 case QETH_CARD_TYPE_IQD:
6298263a 1775 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1776 break;
1777 case QETH_CARD_TYPE_OSD:
0132951e 1778 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1779 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1780 break;
1781 default:
1782 break;
4a71df50
FB		 1783 }
1784}
1785
8d908eb0
JW		 1786static int qeth_idx_activate_get_answer(struct qeth_card *card,
1787 struct qeth_channel *channel,
8f6637b8
JW		 1788 void (*reply_cb)(struct qeth_card *,
1789 struct qeth_channel *,
1790 struct qeth_cmd_buffer *))
4a71df50
FB		 1791{
1792 struct qeth_cmd_buffer *iob;
4a71df50 1793 int rc;
4a71df50 1794
d11ba0c4 1795 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50 1796 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1797 if (!iob)
1798 return -ENOMEM;
8f6637b8 1799 iob->callback = reply_cb;
f15cdaf2 1800 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
4a71df50
FB		 1801
1802 wait_event(card->wait_q,
1803 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1804 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1805 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1806 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1807 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1808 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1809
1810 if (rc) {
14cc21b6 1811 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1812 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1813 atomic_set(&channel->irq_pending, 0);
1814 wake_up(&card->wait_q);
1815 return rc;
1816 }
1817 rc = wait_event_interruptible_timeout(card->wait_q,
1818 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1819 if (rc == -ERESTARTSYS)
1820 return rc;
1821 if (channel->state != CH_STATE_UP) {
1822 rc = -ETIME;
d11ba0c4 1823 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1824 } else
1825 rc = 0;
1826 return rc;
1827}
1828
8d908eb0
JW		 1829static int qeth_idx_activate_channel(struct qeth_card *card,
1830 struct qeth_channel *channel,
8f6637b8
JW		 1831 void (*reply_cb)(struct qeth_card *,
1832 struct qeth_channel *,
1833 struct qeth_cmd_buffer *))
4a71df50 1834{
4a71df50 1835 struct qeth_cmd_buffer *iob;
4a71df50
FB		 1836 __u16 temp;
1837 __u8 tmp;
1838 int rc;
f06f6f32 1839 struct ccw_dev_id temp_devid;
4a71df50 1840
d11ba0c4 1841 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1842
1843 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1844 if (!iob)
1845 return -ENOMEM;
8f6637b8 1846 iob->callback = reply_cb;
f15cdaf2 1847 qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
45ca2fd6 1848 iob->data);
4a71df50
FB		 1849 if (channel == &card->write) {
1850 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1851 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1852 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1853 card->seqno.trans_hdr++;
1854 } else {
1855 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1856 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1857 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1858 }
92d27209 1859 tmp = ((u8)card->dev->dev_port) | 0x80;
4a71df50
FB		 1860 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1861 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1862 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1863 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1864 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1865 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1866 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1867 temp = (card->info.cula << 8) + card->info.unit_addr2;
1868 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1869
1870 wait_event(card->wait_q,
1871 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1872 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1873 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1874 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1875 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1876 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1877
1878 if (rc) {
14cc21b6
FB		 1879 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1880 rc);
d11ba0c4 1881 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1882 atomic_set(&channel->irq_pending, 0);
1883 wake_up(&card->wait_q);
1884 return rc;
1885 }
1886 rc = wait_event_interruptible_timeout(card->wait_q,
1887 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1888 if (rc == -ERESTARTSYS)
1889 return rc;
1890 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1891 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1892 " failed to recover an error on the device\n");
1893 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1894 dev_name(&channel->ccwdev->dev));
d11ba0c4 1895 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1896 return -ETIME;
1897 }
8d908eb0 1898 return qeth_idx_activate_get_answer(card, channel, reply_cb);
4a71df50
FB		 1899}
1900
1901static int qeth_peer_func_level(int level)
1902{
1903 if ((level & 0xff) == 8)
1904 return (level & 0xff) + 0x400;
1905 if (((level >> 8) & 3) == 1)
1906 return (level & 0xff) + 0x200;
1907 return level;
1908}
1909
8f6637b8
JW		 1910static void qeth_idx_write_cb(struct qeth_card *card,
1911 struct qeth_channel *channel,
1912 struct qeth_cmd_buffer *iob)
4a71df50 1913{
4a71df50
FB		 1914 __u16 temp;
1915
d11ba0c4 1916 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1917
1918 if (channel->state == CH_STATE_DOWN) {
1919 channel->state = CH_STATE_ACTIVATING;
1920 goto out;
1921 }
4a71df50
FB		 1922
1923 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1924 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
750b1625 1925 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1926 "The adapter is used exclusively by another "
1927 "host\n");
4a71df50 1928 else
74eacdb9
FB		 1929 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1930 " negative reply\n",
750b1625 1931 dev_name(&channel->ccwdev->dev));
4a71df50
FB		 1932 goto out;
1933 }
1934 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1935 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1936 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1937 "function level mismatch (sent: 0x%x, received: "
750b1625 1938 "0x%x)\n", dev_name(&channel->ccwdev->dev),
74eacdb9 1939 card->info.func_level, temp);
4a71df50
FB		 1940 goto out;
1941 }
1942 channel->state = CH_STATE_UP;
1943out:
1944 qeth_release_buffer(channel, iob);
1945}
1946
8f6637b8
JW		 1947static void qeth_idx_read_cb(struct qeth_card *card,
1948 struct qeth_channel *channel,
1949 struct qeth_cmd_buffer *iob)
4a71df50 1950{
4a71df50
FB		 1951 __u16 temp;
1952
d11ba0c4 1953 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1954 if (channel->state == CH_STATE_DOWN) {
1955 channel->state = CH_STATE_ACTIVATING;
1956 goto out;
1957 }
1958
5113fec0 1959 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1960 goto out;
1961
1962 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1963 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1964 case QETH_IDX_ACT_ERR_EXCL:
750b1625 1965 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1966 "The adapter is used exclusively by another "
1967 "host\n");
5113fec0
UB		 1968 break;
1969 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1970 case QETH_IDX_ACT_ERR_AUTH_USER:
750b1625 1971 dev_err(&channel->ccwdev->dev,
5113fec0 1972 "Setting the device online failed because of "
01fc3e86 1973 "insufficient authorization\n");
5113fec0
UB		 1974 break;
1975 default:
74eacdb9
FB		 1976 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1977 " negative reply\n",
750b1625 1978 dev_name(&channel->ccwdev->dev));
5113fec0 1979 }
01fc3e86
UB		 1980 QETH_CARD_TEXT_(card, 2, "idxread%c",
1981 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1982 goto out;
1983 }
1984
4a71df50
FB		 1985 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1986 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1987 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1988 "level mismatch (sent: 0x%x, received: 0x%x)\n",
750b1625 1989 dev_name(&channel->ccwdev->dev),
74eacdb9 1990 card->info.func_level, temp);
4a71df50
FB		 1991 goto out;
1992 }
1993 memcpy(&card->token.issuer_rm_r,
1994 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1995 QETH_MPC_TOKEN_LENGTH);
1996 memcpy(&card->info.mcl_level[0],
1997 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1998 channel->state = CH_STATE_UP;
1999out:
2000 qeth_release_buffer(channel, iob);
2001}
2002
2003void qeth_prepare_control_data(struct qeth_card *card, int len,
2004 struct qeth_cmd_buffer *iob)
2005{
f15cdaf2 2006 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
8f6637b8 2007 iob->callback = qeth_release_buffer_cb;
4a71df50
FB		 2008
2009 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2010 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2011 card->seqno.trans_hdr++;
2012 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2013 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2014 card->seqno.pdu_hdr++;
2015 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2016 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2017 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2018}
2019EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2020
efbbc1d5
EC		 2021/**
2022 * qeth_send_control_data() - send control command to the card
2023 * @card: qeth_card structure pointer
2024 * @len: size of the command buffer
2025 * @iob: qeth_cmd_buffer pointer
2026 * @reply_cb: callback function pointer
2027 * @cb_card: pointer to the qeth_card structure
2028 * @cb_reply: pointer to the qeth_reply structure
2029 * @cb_cmd: pointer to the original iob for non-IPA
2030 * commands, or to the qeth_ipa_cmd structure
2031 * for the IPA commands.
2032 * @reply_param: private pointer passed to the callback
2033 *
2034 * Returns the value of the `return_code' field of the response
2035 * block returned from the hardware, or other error indication.
2036 * Value of zero indicates successful execution of the command.
2037 *
2038 * Callback function gets called one or more times, with cb_cmd
2039 * pointing to the response returned by the hardware. Callback
2040 * function must return non-zero if more reply blocks are expected,
2041 * and zero if the last or only reply block is received. Callback
2042 * function can get the value of the reply_param pointer from the
2043 * field 'param' of the structure qeth_reply.
2044 */
2045
4a71df50
FB		 2046int qeth_send_control_data(struct qeth_card *card, int len,
2047 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2048 int (*reply_cb)(struct qeth_card *cb_card,
2049 struct qeth_reply *cb_reply,
2050 unsigned long cb_cmd),
4a71df50
FB		 2051 void *reply_param)
2052{
750b1625 2053 struct qeth_channel *channel = iob->channel;
4a71df50 2054 int rc;
4a71df50 2055 struct qeth_reply *reply = NULL;
7834cd5a 2056 unsigned long timeout, event_timeout;
1c5b2216 2057 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 2058
847a50fd 2059 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2060
908abbb5 2061 if (card->read_or_write_problem) {
750b1625 2062 qeth_release_buffer(channel, iob);
908abbb5
UB		 2063 return -EIO;
2064 }
4a71df50
FB		 2065 reply = qeth_alloc_reply(card);
2066 if (!reply) {
4a71df50
FB		 2067 return -ENOMEM;
2068 }
2069 reply->callback = reply_cb;
2070 reply->param = reply_param;
d22ffb5a 2071
4a71df50 2072 init_waitqueue_head(&reply->wait_q);
4a71df50 2073
750b1625 2074 while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
4a71df50 2075
1c5b2216
JW		 2076 if (IS_IPA(iob->data)) {
2077 cmd = __ipa_cmd(iob);
d22ffb5a
JW		 2078 cmd->hdr.seqno = card->seqno.ipa++;
2079 reply->seqno = cmd->hdr.seqno;
7834cd5a 2080 event_timeout = QETH_IPA_TIMEOUT;
1c5b2216 2081 } else {
d22ffb5a 2082 reply->seqno = QETH_IDX_COMMAND_SEQNO;
7834cd5a 2083 event_timeout = QETH_TIMEOUT;
1c5b2216 2084 }
d22ffb5a
JW		 2085 qeth_prepare_control_data(card, len, iob);
2086
ed47155b 2087 spin_lock_irq(&card->lock);
d22ffb5a 2088 list_add_tail(&reply->list, &card->cmd_waiter_list);
ed47155b 2089 spin_unlock_irq(&card->lock);
1c5b2216 2090
7834cd5a 2091 timeout = jiffies + event_timeout;
4a71df50 2092
847a50fd 2093 QETH_CARD_TEXT(card, 6, "noirqpnd");
ed47155b 2094 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 2095 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 2096 (addr_t) iob, 0, 0, event_timeout);
ed47155b 2097 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 2098 if (rc) {
74eacdb9
FB		 2099 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2100 "ccw_device_start rc = %i\n",
750b1625 2101 dev_name(&channel->ccwdev->dev), rc);
847a50fd 2102 QETH_CARD_TEXT_(card, 2, " err%d", rc);
ed47155b 2103 spin_lock_irq(&card->lock);
4a71df50
FB		 2104 list_del_init(&reply->list);
2105 qeth_put_reply(reply);
ed47155b 2106 spin_unlock_irq(&card->lock);
750b1625
JW		 2107 qeth_release_buffer(channel, iob);
2108 atomic_set(&channel->irq_pending, 0);
4a71df50
FB		 2109 wake_up(&card->wait_q);
2110 return rc;
2111 }
5b54e16f
FB		 2112
2113 /* we have only one long running ipassist, since we can ensure
2114 process context of this command we can sleep */
1c5b2216
JW		 2115 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2116 cmd->hdr.prot_version == QETH_PROT_IPV4) {
5b54e16f 2117 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2118 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2119 goto time_err;
2120 } else {
2121 while (!atomic_read(&reply->received)) {
2122 if (time_after(jiffies, timeout))
2123 goto time_err;
2124 cpu_relax();
6531084c 2125 }
5b54e16f
FB		 2126 }
2127
2128 rc = reply->rc;
2129 qeth_put_reply(reply);
2130 return rc;
2131
2132time_err:
70919e23 2133 reply->rc = -ETIME;
ed47155b 2134 spin_lock_irq(&card->lock);
5b54e16f 2135 list_del_init(&reply->list);
ed47155b 2136 spin_unlock_irq(&card->lock);
5b54e16f 2137 atomic_inc(&reply->received);
4a71df50
FB		 2138 rc = reply->rc;
2139 qeth_put_reply(reply);
2140 return rc;
2141}
2142EXPORT_SYMBOL_GPL(qeth_send_control_data);
2143
2144static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2145 unsigned long data)
2146{
2147 struct qeth_cmd_buffer *iob;
2148
d11ba0c4 2149 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2150
2151 iob = (struct qeth_cmd_buffer *) data;
2152 memcpy(&card->token.cm_filter_r,
2153 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2154 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2155 return 0;
2156}
2157
2158static int qeth_cm_enable(struct qeth_card *card)
2159{
2160 int rc;
2161 struct qeth_cmd_buffer *iob;
2162
d11ba0c4 2163 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2164
2165 iob = qeth_wait_for_buffer(&card->write);
2166 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2167 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2168 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2169 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2170 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2171
2172 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2173 qeth_cm_enable_cb, NULL);
2174 return rc;
2175}
2176
2177static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2178 unsigned long data)
2179{
4a71df50
FB		 2180 struct qeth_cmd_buffer *iob;
2181
d11ba0c4 2182 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2183
2184 iob = (struct qeth_cmd_buffer *) data;
2185 memcpy(&card->token.cm_connection_r,
2186 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2187 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2188 return 0;
2189}
2190
2191static int qeth_cm_setup(struct qeth_card *card)
2192{
2193 int rc;
2194 struct qeth_cmd_buffer *iob;
2195
d11ba0c4 2196 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2197
2198 iob = qeth_wait_for_buffer(&card->write);
2199 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2200 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2201 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2202 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2203 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2204 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2205 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2206 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2207 qeth_cm_setup_cb, NULL);
2208 return rc;
4a71df50
FB		 2209}
2210
8ce7a9e0 2211static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
4a71df50 2212{
8ce7a9e0
JW		 2213 struct net_device *dev = card->dev;
2214 unsigned int new_mtu;
2215
2216 if (!max_mtu) {
2217 /* IQD needs accurate max MTU to set up its RX buffers: */
2218 if (IS_IQD(card))
2219 return -EINVAL;
2220 /* tolerate quirky HW: */
2221 max_mtu = ETH_MAX_MTU;
2222 }
2223
2224 rtnl_lock();
2225 if (IS_IQD(card)) {
2226 /* move any device with default MTU to new max MTU: */
2227 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2228
2229 /* adjust RX buffer size to new max MTU: */
2230 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2231 if (dev->max_mtu && dev->max_mtu != max_mtu)
2232 qeth_free_qdio_buffers(card);
2233 } else {
2234 if (dev->mtu)
2235 new_mtu = dev->mtu;
2236 /* default MTUs for first setup: */
4fda3354 2237 else if (IS_LAYER2(card))
8ce7a9e0
JW		 2238 new_mtu = ETH_DATA_LEN;
2239 else
2240 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
4a71df50 2241 }
8ce7a9e0
JW		 2242
2243 dev->max_mtu = max_mtu;
2244 dev->mtu = min(new_mtu, max_mtu);
2245 rtnl_unlock();
2246 return 0;
4a71df50
FB		 2247}
2248
cef6ff22 2249static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2250{
2251 switch (framesize) {
2252 case 0x4000:
2253 return 8192;
2254 case 0x6000:
2255 return 16384;
2256 case 0xa000:
2257 return 32768;
2258 case 0xffff:
2259 return 57344;
2260 default:
2261 return 0;
2262 }
2263}
2264
4a71df50
FB		 2265static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2266 unsigned long data)
2267{
4a71df50
FB		 2268 __u16 mtu, framesize;
2269 __u16 len;
2270 __u8 link_type;
2271 struct qeth_cmd_buffer *iob;
2272
d11ba0c4 2273 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2274
2275 iob = (struct qeth_cmd_buffer *) data;
2276 memcpy(&card->token.ulp_filter_r,
2277 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2278 QETH_MPC_TOKEN_LENGTH);
9853b97b 2279 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2280 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2281 mtu = qeth_get_mtu_outof_framesize(framesize);
4a71df50 2282 } else {
8ce7a9e0 2283 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
4a71df50 2284 }
8ce7a9e0 2285 *(u16 *)reply->param = mtu;
4a71df50
FB		 2286
2287 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2288 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2289 memcpy(&link_type,
2290 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2291 card->info.link_type = link_type;
2292 } else
2293 card->info.link_type = 0;
01fc3e86 2294 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
4a71df50
FB		 2295 return 0;
2296}
2297
73657a3e
JW		 2298static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2299{
2300 if (IS_OSN(card))
2301 return QETH_PROT_OSN2;
4fda3354 2302 return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
73657a3e
JW		 2303}
2304
4a71df50
FB		 2305static int qeth_ulp_enable(struct qeth_card *card)
2306{
73657a3e 2307 u8 prot_type = qeth_mpc_select_prot_type(card);
4a71df50 2308 struct qeth_cmd_buffer *iob;
8ce7a9e0 2309 u16 max_mtu;
73657a3e 2310 int rc;
4a71df50
FB		 2311
2312 /*FIXME: trace view callbacks*/
d11ba0c4 2313 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2314
2315 iob = qeth_wait_for_buffer(&card->write);
2316 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2317
92d27209 2318 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
4a71df50
FB		 2319 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2320 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2321 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2322 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2323 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50 2324 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
8ce7a9e0
JW		 2325 qeth_ulp_enable_cb, &max_mtu);
2326 if (rc)
2327 return rc;
2328 return qeth_update_max_mtu(card, max_mtu);
4a71df50
FB		 2329}
2330
2331static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2332 unsigned long data)
2333{
2334 struct qeth_cmd_buffer *iob;
2335
d11ba0c4 2336 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2337
2338 iob = (struct qeth_cmd_buffer *) data;
2339 memcpy(&card->token.ulp_connection_r,
2340 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2341 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2342 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2343 3)) {
2344 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2345 dev_err(&card->gdev->dev, "A connection could not be "
2346 "established because of an OLM limit\n");
bbb822a8 2347 iob->rc = -EMLINK;
65a1f898 2348 }
d11ba0c4 2349 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2350 return 0;
4a71df50
FB		 2351}
2352
2353static int qeth_ulp_setup(struct qeth_card *card)
2354{
2355 int rc;
2356 __u16 temp;
2357 struct qeth_cmd_buffer *iob;
2358 struct ccw_dev_id dev_id;
2359
d11ba0c4 2360 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2361
2362 iob = qeth_wait_for_buffer(&card->write);
2363 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2364
2365 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2366 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2367 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2368 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2369 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2370 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2371
2372 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2373 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2374 temp = (card->info.cula << 8) + card->info.unit_addr2;
2375 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2376 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2377 qeth_ulp_setup_cb, NULL);
2378 return rc;
2379}
2380
0da9581d
EL		 2381static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2382{
0da9581d
EL		 2383 struct qeth_qdio_out_buffer *newbuf;
2384
0da9581d 2385 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
3b346c18
JW		 2386 if (!newbuf)
2387 return -ENOMEM;
2388
d445a4e2 2389 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2390 skb_queue_head_init(&newbuf->skb_list);
2391 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2392 newbuf->q = q;
0da9581d
EL		 2393 newbuf->next_pending = q->bufs[bidx];
2394 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2395 q->bufs[bidx] = newbuf;
3b346c18 2396 return 0;
0da9581d
EL		 2397}
2398
d445a4e2
SO		 2399static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2400{
2401 if (!q)
2402 return;
2403
2404 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2405 kfree(q);
2406}
2407
2408static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2409{
2410 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2411
2412 if (!q)
2413 return NULL;
2414
2415 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2416 kfree(q);
2417 return NULL;
2418 }
2419 return q;
2420}
0da9581d 2421
4a71df50
FB		 2422static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2423{
2424 int i, j;
2425
d11ba0c4 2426 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2427
2428 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2429 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2430 return 0;
2431
4601ba6c
SO		 2432 QETH_DBF_TEXT(SETUP, 2, "inq");
2433 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2434 if (!card->qdio.in_q)
2435 goto out_nomem;
4601ba6c 2436
4a71df50
FB		 2437 /* inbound buffer pool */
2438 if (qeth_alloc_buffer_pool(card))
2439 goto out_freeinq;
0da9581d 2440
4a71df50
FB		 2441 /* outbound */
2442 card->qdio.out_qs =
6396bb22
KC		 2443 kcalloc(card->qdio.no_out_queues,
2444 sizeof(struct qeth_qdio_out_q *),
2445 GFP_KERNEL);
4a71df50
FB		 2446 if (!card->qdio.out_qs)
2447 goto out_freepool;
2448 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2449 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2450 if (!card->qdio.out_qs[i])
2451 goto out_freeoutq;
d11ba0c4
PT		 2452 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2453 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2454 card->qdio.out_qs[i]->queue_no = i;
2455 /* give outbound qeth_qdio_buffers their qdio_buffers */
2456 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2457 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2458 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2459 goto out_freeoutqbufs;
4a71df50
FB		 2460 }
2461 }
0da9581d
EL		 2462
2463 /* completion */
2464 if (qeth_alloc_cq(card))
2465 goto out_freeoutq;
2466
4a71df50
FB		 2467 return 0;
2468
0da9581d
EL		 2469out_freeoutqbufs:
2470 while (j > 0) {
2471 --j;
2472 kmem_cache_free(qeth_qdio_outbuf_cache,
2473 card->qdio.out_qs[i]->bufs[j]);
2474 card->qdio.out_qs[i]->bufs[j] = NULL;
2475 }
4a71df50 2476out_freeoutq:
0da9581d 2477 while (i > 0) {
d445a4e2 2478 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2479 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2480 }
4a71df50
FB		 2481 kfree(card->qdio.out_qs);
2482 card->qdio.out_qs = NULL;
2483out_freepool:
2484 qeth_free_buffer_pool(card);
2485out_freeinq:
4601ba6c 2486 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2487 card->qdio.in_q = NULL;
2488out_nomem:
2489 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2490 return -ENOMEM;
2491}
2492
d445a4e2
SO		 2493static void qeth_free_qdio_buffers(struct qeth_card *card)
2494{
2495 int i, j;
2496
2497 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2498 QETH_QDIO_UNINITIALIZED)
2499 return;
2500
2501 qeth_free_cq(card);
2502 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2503 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2504 if (card->qdio.in_q->bufs[j].rx_skb)
2505 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2506 }
2507 qeth_free_qdio_queue(card->qdio.in_q);
2508 card->qdio.in_q = NULL;
2509 /* inbound buffer pool */
2510 qeth_free_buffer_pool(card);
2511 /* free outbound qdio_qs */
2512 if (card->qdio.out_qs) {
2513 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2514 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2515 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2516 }
2517 kfree(card->qdio.out_qs);
2518 card->qdio.out_qs = NULL;
2519 }
2520}
2521
4a71df50
FB		 2522static void qeth_create_qib_param_field(struct qeth_card *card,
2523 char *param_field)
2524{
2525
2526 param_field[0] = _ascebc['P'];
2527 param_field[1] = _ascebc['C'];
2528 param_field[2] = _ascebc['I'];
2529 param_field[3] = _ascebc['T'];
2530 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2531 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2532 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2533}
2534
2535static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2536 char *param_field)
2537{
2538 param_field[16] = _ascebc['B'];
2539 param_field[17] = _ascebc['L'];
2540 param_field[18] = _ascebc['K'];
2541 param_field[19] = _ascebc['T'];
2542 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2543 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2544 *((unsigned int *) (&param_field[28])) =
2545 card->info.blkt.inter_packet_jumbo;
2546}
2547
2548static int qeth_qdio_activate(struct qeth_card *card)
2549{
d11ba0c4 2550 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2551 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2552}
2553
2554static int qeth_dm_act(struct qeth_card *card)
2555{
2556 int rc;
2557 struct qeth_cmd_buffer *iob;
2558
d11ba0c4 2559 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2560
2561 iob = qeth_wait_for_buffer(&card->write);
2562 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2563
2564 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2565 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2566 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2567 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2568 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2569 return rc;
2570}
2571
2572static int qeth_mpc_initialize(struct qeth_card *card)
2573{
2574 int rc;
2575
d11ba0c4 2576 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2577
2578 rc = qeth_issue_next_read(card);
2579 if (rc) {
d11ba0c4 2580 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2581 return rc;
2582 }
2583 rc = qeth_cm_enable(card);
2584 if (rc) {
d11ba0c4 2585 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2586 goto out_qdio;
2587 }
2588 rc = qeth_cm_setup(card);
2589 if (rc) {
d11ba0c4 2590 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2591 goto out_qdio;
2592 }
2593 rc = qeth_ulp_enable(card);
2594 if (rc) {
d11ba0c4 2595 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2596 goto out_qdio;
2597 }
2598 rc = qeth_ulp_setup(card);
2599 if (rc) {
d11ba0c4 2600 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2601 goto out_qdio;
2602 }
2603 rc = qeth_alloc_qdio_buffers(card);
2604 if (rc) {
d11ba0c4 2605 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2606 goto out_qdio;
2607 }
2608 rc = qeth_qdio_establish(card);
2609 if (rc) {
d11ba0c4 2610 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2611 qeth_free_qdio_buffers(card);
2612 goto out_qdio;
2613 }
2614 rc = qeth_qdio_activate(card);
2615 if (rc) {
d11ba0c4 2616 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2617 goto out_qdio;
2618 }
2619 rc = qeth_dm_act(card);
2620 if (rc) {
d11ba0c4 2621 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2622 goto out_qdio;
2623 }
2624
2625 return 0;
2626out_qdio:
2627 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2628 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2629 return rc;
2630}
2631
4a71df50
FB		 2632void qeth_print_status_message(struct qeth_card *card)
2633{
2634 switch (card->info.type) {
5113fec0
UB		 2635 case QETH_CARD_TYPE_OSD:
2636 case QETH_CARD_TYPE_OSM:
2637 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2638 /* VM will use a non-zero first character
2639 * to indicate a HiperSockets like reporting
2640 * of the level OSA sets the first character to zero
2641 * */
2642 if (!card->info.mcl_level[0]) {
2643 sprintf(card->info.mcl_level, "%02x%02x",
2644 card->info.mcl_level[2],
2645 card->info.mcl_level[3]);
4a71df50
FB		 2646 break;
2647 }
2648 /* fallthrough */
2649 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2650 if ((card->info.guestlan) ||
2651 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2652 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2653 card->info.mcl_level[0]];
2654 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2655 card->info.mcl_level[1]];
2656 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2657 card->info.mcl_level[2]];
2658 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2659 card->info.mcl_level[3]];
2660 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2661 }
2662 break;
2663 default:
2664 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2665 }
239ff408
UB		 2666 dev_info(&card->gdev->dev,
2667 "Device is a%s card%s%s%s\nwith link type %s.\n",
2668 qeth_get_cardname(card),
2669 (card->info.mcl_level[0]) ? " (level: " : "",
2670 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2671 (card->info.mcl_level[0]) ? ")" : "",
2672 qeth_get_cardname_short(card));
4a71df50
FB		 2673}
2674EXPORT_SYMBOL_GPL(qeth_print_status_message);
2675
4a71df50
FB		 2676static void qeth_initialize_working_pool_list(struct qeth_card *card)
2677{
2678 struct qeth_buffer_pool_entry *entry;
2679
847a50fd 2680 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2681
2682 list_for_each_entry(entry,
2683 &card->qdio.init_pool.entry_list, init_list) {
2684 qeth_put_buffer_pool_entry(card, entry);
2685 }
2686}
2687
cef6ff22
JW		 2688static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2689 struct qeth_card *card)
4a71df50
FB		 2690{
2691 struct list_head *plh;
2692 struct qeth_buffer_pool_entry *entry;
2693 int i, free;
2694 struct page *page;
2695
2696 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2697 return NULL;
2698
2699 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2700 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2701 free = 1;
2702 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2703 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2704 free = 0;
2705 break;
2706 }
2707 }
2708 if (free) {
2709 list_del_init(&entry->list);
2710 return entry;
2711 }
2712 }
2713
2714 /* no free buffer in pool so take first one and swap pages */
2715 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2716 struct qeth_buffer_pool_entry, list);
2717 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2718 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2719 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2720 if (!page) {
2721 return NULL;
2722 } else {
2723 free_page((unsigned long)entry->elements[i]);
2724 entry->elements[i] = page_address(page);
2725 if (card->options.performance_stats)
2726 card->perf_stats.sg_alloc_page_rx++;
2727 }
2728 }
2729 }
2730 list_del_init(&entry->list);
2731 return entry;
2732}
2733
2734static int qeth_init_input_buffer(struct qeth_card *card,
2735 struct qeth_qdio_buffer *buf)
2736{
2737 struct qeth_buffer_pool_entry *pool_entry;
2738 int i;
2739
b3332930 2740 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2741 buf->rx_skb = netdev_alloc_skb(card->dev,
2742 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2743 if (!buf->rx_skb)
2744 return 1;
2745 }
2746
4a71df50
FB		 2747 pool_entry = qeth_find_free_buffer_pool_entry(card);
2748 if (!pool_entry)
2749 return 1;
2750
2751 /*
2752 * since the buffer is accessed only from the input_tasklet
2753 * there shouldn't be a need to synchronize; also, since we use
2754 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2755 * buffers
2756 */
4a71df50
FB		 2757
2758 buf->pool_entry = pool_entry;
2759 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2760 buf->buffer->element[i].length = PAGE_SIZE;
2761 buf->buffer->element[i].addr = pool_entry->elements[i];
2762 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2763 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2764 else
3ec90878
JG		 2765 buf->buffer->element[i].eflags = 0;
2766 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2767 }
2768 return 0;
2769}
2770
2771int qeth_init_qdio_queues(struct qeth_card *card)
2772{
2773 int i, j;
2774 int rc;
2775
d11ba0c4 2776 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2777
2778 /* inbound queue */
1b45c80b
JW		 2779 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2780 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2781 qeth_initialize_working_pool_list(card);
2782 /*give only as many buffers to hardware as we have buffer pool entries*/
2783 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2784 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2785 card->qdio.in_q->next_buf_to_init =
2786 card->qdio.in_buf_pool.buf_count - 1;
2787 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2788 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2789 if (rc) {
d11ba0c4 2790 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2791 return rc;
2792 }
0da9581d
EL		 2793
2794 /* completion */
2795 rc = qeth_cq_init(card);
2796 if (rc) {
2797 return rc;
2798 }
2799
4a71df50
FB		 2800 /* outbound queue */
2801 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2802 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2803 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2804 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2805 qeth_clear_output_buffer(card->qdio.out_qs[i],
3b346c18 2806 card->qdio.out_qs[i]->bufs[j]);
4a71df50
FB		 2807 }
2808 card->qdio.out_qs[i]->card = card;
2809 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2810 card->qdio.out_qs[i]->do_pack = 0;
2811 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2812 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2813 atomic_set(&card->qdio.out_qs[i]->state,
2814 QETH_OUT_Q_UNLOCKED);
2815 }
2816 return 0;
2817}
2818EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2819
cef6ff22 2820static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2821{
2822 switch (link_type) {
2823 case QETH_LINK_TYPE_HSTR:
2824 return 2;
2825 default:
2826 return 1;
2827 }
2828}
2829
2830static void qeth_fill_ipacmd_header(struct qeth_card *card,
500abbf0
JW		 2831 struct qeth_ipa_cmd *cmd,
2832 enum qeth_ipa_cmds command,
2833 enum qeth_prot_versions prot)
4a71df50 2834{
4a71df50
FB		 2835 cmd->hdr.command = command;
2836 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2837 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50 2838 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
92d27209 2839 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
4fda3354 2840 cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
4a71df50
FB		 2841 cmd->hdr.param_count = 1;
2842 cmd->hdr.prot_version = prot;
4a71df50
FB		 2843}
2844
2845struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2846 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2847{
2848 struct qeth_cmd_buffer *iob;
4a71df50 2849
1aec42bc
TR		 2850 iob = qeth_get_buffer(&card->write);
2851 if (iob) {
ff5caa7a 2852 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2853 } else {
2854 dev_warn(&card->gdev->dev,
2855 "The qeth driver ran out of channel command buffers\n");
2856 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2857 dev_name(&card->gdev->dev));
2858 }
4a71df50
FB		 2859
2860 return iob;
2861}
2862EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2863
73657a3e 2864void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
4a71df50 2865{
73657a3e
JW		 2866 u8 prot_type = qeth_mpc_select_prot_type(card);
2867
4a71df50
FB		 2868 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2869 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2870 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2871 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2872}
2873EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2874
efbbc1d5
EC		 2875/**
2876 * qeth_send_ipa_cmd() - send an IPA command
2877 *
2878 * See qeth_send_control_data() for explanation of the arguments.
2879 */
2880
4a71df50
FB		 2881int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2882 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2883 unsigned long),
2884 void *reply_param)
2885{
2886 int rc;
4a71df50 2887
847a50fd 2888 QETH_CARD_TEXT(card, 4, "sendipa");
73657a3e 2889 qeth_prepare_ipa_cmd(card, iob);
d11ba0c4
PT		 2890 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2891 iob, reply_cb, reply_param);
908abbb5
UB		 2892 if (rc == -ETIME) {
2893 qeth_clear_ipacmd_list(card);
2894 qeth_schedule_recovery(card);
2895 }
4a71df50
FB		 2896 return rc;
2897}
2898EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2899
10340510 2900static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2901{
2902 int rc;
70919e23 2903 struct qeth_cmd_buffer *iob;
4a71df50 2904
d11ba0c4 2905 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2906
70919e23 2907 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2908 if (!iob)
2909 return -ENOMEM;
70919e23 2910 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2911 return rc;
2912}
4a71df50 2913
686c97ee 2914static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 2915{
686c97ee 2916 if (!cmd->hdr.return_code)
4a71df50
FB		 2917 cmd->hdr.return_code =
2918 cmd->data.setadapterparms.hdr.return_code;
686c97ee 2919 return cmd->hdr.return_code;
4a71df50 2920}
4a71df50
FB		 2921
2922static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2923 struct qeth_reply *reply, unsigned long data)
2924{
686c97ee 2925 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 2926
847a50fd 2927 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee
JW		 2928 if (qeth_setadpparms_inspect_rc(cmd))
2929 return 0;
4a71df50 2930
5113fec0 2931 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2932 card->info.link_type =
2933 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2934 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2935 }
4a71df50
FB		 2936 card->options.adp.supported_funcs =
2937 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 2938 return 0;
4a71df50
FB		 2939}
2940
eb3fb0ba 2941static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2942 __u32 command, __u32 cmdlen)
2943{
2944 struct qeth_cmd_buffer *iob;
2945 struct qeth_ipa_cmd *cmd;
2946
2947 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2948 QETH_PROT_IPV4);
1aec42bc 2949 if (iob) {
ff5caa7a 2950 cmd = __ipa_cmd(iob);
1aec42bc
TR		 2951 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2952 cmd->data.setadapterparms.hdr.command_code = command;
2953 cmd->data.setadapterparms.hdr.used_total = 1;
2954 cmd->data.setadapterparms.hdr.seq_no = 1;
2955 }
4a71df50
FB		 2956
2957 return iob;
2958}
4a71df50 2959
09960b3a 2960static int qeth_query_setadapterparms(struct qeth_card *card)
4a71df50
FB		 2961{
2962 int rc;
2963 struct qeth_cmd_buffer *iob;
2964
847a50fd 2965 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2966 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2967 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 2968 if (!iob)
2969 return -ENOMEM;
4a71df50
FB		 2970 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2971 return rc;
2972}
4a71df50 2973
1da74b1c
FB		 2974static int qeth_query_ipassists_cb(struct qeth_card *card,
2975 struct qeth_reply *reply, unsigned long data)
2976{
2977 struct qeth_ipa_cmd *cmd;
2978
2979 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2980
2981 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2982
2983 switch (cmd->hdr.return_code) {
2984 case IPA_RC_NOTSUPP:
2985 case IPA_RC_L2_UNSUPPORTED_CMD:
2986 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2987 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2988 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
31c92732 2989 return 0;
a134884a
SR		 2990 default:
2991 if (cmd->hdr.return_code) {
2992 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2993 "rc=%d\n",
2994 dev_name(&card->gdev->dev),
2995 cmd->hdr.return_code);
2996 return 0;
2997 }
2998 }
2999
1da74b1c
FB		 3000 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3001 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3002 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3003 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3004 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3005 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3006 } else
3007 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3008 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3009 return 0;
3010}
3011
09960b3a
JW		 3012static int qeth_query_ipassists(struct qeth_card *card,
3013 enum qeth_prot_versions prot)
1da74b1c
FB		 3014{
3015 int rc;
3016 struct qeth_cmd_buffer *iob;
3017
3018 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3019 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3020 if (!iob)
3021 return -ENOMEM;
1da74b1c
FB		 3022 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3023 return rc;
3024}
1da74b1c 3025
45cbb2e4
SR		 3026static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3027 struct qeth_reply *reply, unsigned long data)
3028{
686c97ee 3029 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3030 struct qeth_query_switch_attributes *attrs;
686c97ee 3031 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3032
3033 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee
JW		 3034 if (qeth_setadpparms_inspect_rc(cmd))
3035 return 0;
45cbb2e4 3036
686c97ee
JW		 3037 sw_info = (struct qeth_switch_info *)reply->param;
3038 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3039 sw_info->capabilities = attrs->capabilities;
3040 sw_info->settings = attrs->settings;
3041 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3042 sw_info->settings);
45cbb2e4
SR		 3043 return 0;
3044}
3045
3046int qeth_query_switch_attributes(struct qeth_card *card,
3047 struct qeth_switch_info *sw_info)
3048{
3049 struct qeth_cmd_buffer *iob;
3050
3051 QETH_CARD_TEXT(card, 2, "qswiattr");
3052 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3053 return -EOPNOTSUPP;
3054 if (!netif_carrier_ok(card->dev))
3055 return -ENOMEDIUM;
3056 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3057 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3058 if (!iob)
3059 return -ENOMEM;
45cbb2e4
SR		 3060 return qeth_send_ipa_cmd(card, iob,
3061 qeth_query_switch_attributes_cb, sw_info);
3062}
45cbb2e4 3063
1da74b1c
FB		 3064static int qeth_query_setdiagass_cb(struct qeth_card *card,
3065 struct qeth_reply *reply, unsigned long data)
3066{
3067 struct qeth_ipa_cmd *cmd;
3068 __u16 rc;
3069
3070 cmd = (struct qeth_ipa_cmd *)data;
3071 rc = cmd->hdr.return_code;
3072 if (rc)
3073 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3074 else
3075 card->info.diagass_support = cmd->data.diagass.ext;
3076 return 0;
3077}
3078
3079static int qeth_query_setdiagass(struct qeth_card *card)
3080{
3081 struct qeth_cmd_buffer *iob;
3082 struct qeth_ipa_cmd *cmd;
3083
3084 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3085 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3086 if (!iob)
3087 return -ENOMEM;
ff5caa7a 3088 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3089 cmd->data.diagass.subcmd_len = 16;
3090 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3091 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3092}
3093
3094static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3095{
3096 unsigned long info = get_zeroed_page(GFP_KERNEL);
3097 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3098 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3099 struct ccw_dev_id ccwid;
caf757c6 3100 int level;
1da74b1c
FB		 3101
3102 tid->chpid = card->info.chpid;
3103 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3104 tid->ssid = ccwid.ssid;
3105 tid->devno = ccwid.devno;
3106 if (!info)
3107 return;
caf757c6
HC		 3108 level = stsi(NULL, 0, 0, 0);
3109 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3110 tid->lparnr = info222->lpar_number;
caf757c6 3111 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3112 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3113 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3114 }
3115 free_page(info);
3116 return;
3117}
3118
3119static int qeth_hw_trap_cb(struct qeth_card *card,
3120 struct qeth_reply *reply, unsigned long data)
3121{
3122 struct qeth_ipa_cmd *cmd;
3123 __u16 rc;
3124
3125 cmd = (struct qeth_ipa_cmd *)data;
3126 rc = cmd->hdr.return_code;
3127 if (rc)
3128 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3129 return 0;
3130}
3131
3132int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3133{
3134 struct qeth_cmd_buffer *iob;
3135 struct qeth_ipa_cmd *cmd;
3136
3137 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3138 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3139 if (!iob)
3140 return -ENOMEM;
ff5caa7a 3141 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3142 cmd->data.diagass.subcmd_len = 80;
3143 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3144 cmd->data.diagass.type = 1;
3145 cmd->data.diagass.action = action;
3146 switch (action) {
3147 case QETH_DIAGS_TRAP_ARM:
3148 cmd->data.diagass.options = 0x0003;
3149 cmd->data.diagass.ext = 0x00010000 +
3150 sizeof(struct qeth_trap_id);
3151 qeth_get_trap_id(card,
3152 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3153 break;
3154 case QETH_DIAGS_TRAP_DISARM:
3155 cmd->data.diagass.options = 0x0001;
3156 break;
3157 case QETH_DIAGS_TRAP_CAPTURE:
3158 break;
3159 }
3160 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3161}
3162EXPORT_SYMBOL_GPL(qeth_hw_trap);
3163
d73ef324
JW		 3164static int qeth_check_qdio_errors(struct qeth_card *card,
3165 struct qdio_buffer *buf,
3166 unsigned int qdio_error,
3167 const char *dbftext)
4a71df50 3168{
779e6e1c 3169 if (qdio_error) {
847a50fd 3170 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3171 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3172 buf->element[15].sflags);
38593d01 3173 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3174 buf->element[14].sflags);
38593d01 3175 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3176 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3177 card->stats.rx_dropped++;
3178 return 0;
3179 } else
3180 return 1;
4a71df50
FB		 3181 }
3182 return 0;
3183}
4a71df50 3184
d73ef324 3185static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3186{
3187 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3188 struct list_head *lh;
4a71df50
FB		 3189 int count;
3190 int i;
3191 int rc;
3192 int newcount = 0;
3193
4a71df50
FB		 3194 count = (index < queue->next_buf_to_init)?
3195 card->qdio.in_buf_pool.buf_count -
3196 (queue->next_buf_to_init - index) :
3197 card->qdio.in_buf_pool.buf_count -
3198 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3199 /* only requeue at a certain threshold to avoid SIGAs */
3200 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3201 for (i = queue->next_buf_to_init;
3202 i < queue->next_buf_to_init + count; ++i) {
3203 if (qeth_init_input_buffer(card,
3204 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3205 break;
3206 } else {
3207 newcount++;
3208 }
3209 }
3210
3211 if (newcount < count) {
3212 /* we are in memory shortage so we switch back to
3213 traditional skb allocation and drop packages */
4a71df50
FB		 3214 atomic_set(&card->force_alloc_skb, 3);
3215 count = newcount;
3216 } else {
4a71df50
FB		 3217 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3218 }
3219
b3332930
FB		 3220 if (!count) {
3221 i = 0;
3222 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3223 i++;
3224 if (i == card->qdio.in_buf_pool.buf_count) {
3225 QETH_CARD_TEXT(card, 2, "qsarbw");
3226 card->reclaim_index = index;
3227 schedule_delayed_work(
3228 &card->buffer_reclaim_work,
3229 QETH_RECLAIM_WORK_TIME);
3230 }
3231 return;
3232 }
3233
4a71df50
FB		 3234 /*
3235 * according to old code it should be avoided to requeue all
3236 * 128 buffers in order to benefit from PCI avoidance.
3237 * this function keeps at least one buffer (the buffer at
3238 * 'index') un-requeued -> this buffer is the first buffer that
3239 * will be requeued the next time
3240 */
3241 if (card->options.performance_stats) {
3242 card->perf_stats.inbound_do_qdio_cnt++;
3243 card->perf_stats.inbound_do_qdio_start_time =
3244 qeth_get_micros();
3245 }
779e6e1c
JG		 3246 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3247 queue->next_buf_to_init, count);
4a71df50
FB		 3248 if (card->options.performance_stats)
3249 card->perf_stats.inbound_do_qdio_time +=
3250 qeth_get_micros() -
3251 card->perf_stats.inbound_do_qdio_start_time;
3252 if (rc) {
847a50fd 3253 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3254 }
3255 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3256 QDIO_MAX_BUFFERS_PER_Q;
3257 }
3258}
d73ef324
JW		 3259
3260static void qeth_buffer_reclaim_work(struct work_struct *work)
3261{
3262 struct qeth_card *card = container_of(work, struct qeth_card,
3263 buffer_reclaim_work.work);
3264
3265 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3266 qeth_queue_input_buffer(card, card->reclaim_index);
3267}
4a71df50 3268
d7a39937 3269static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3270 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3271{
3ec90878 3272 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3273
847a50fd 3274 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3275 if (card->info.type == QETH_CARD_TYPE_IQD) {
3276 if (sbalf15 == 0) {
3277 qdio_err = 0;
3278 } else {
3279 qdio_err = 1;
3280 }
3281 }
76b11f8e 3282 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3283
3284 if (!qdio_err)
d7a39937 3285 return;
d303b6fd
JG		 3286
3287 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3288 return;
d303b6fd 3289
847a50fd
CO		 3290 QETH_CARD_TEXT(card, 1, "lnkfail");
3291 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3292 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3293}
3294
664e42ac
JW		 3295/**
3296 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3297 * @queue: queue to check for packing buffer
3298 *
3299 * Returns number of buffers that were prepared for flush.
3300 */
3301static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3302{
3303 struct qeth_qdio_out_buffer *buffer;
3304
3305 buffer = queue->bufs[queue->next_buf_to_fill];
3306 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3307 (buffer->next_element_to_fill > 0)) {
3308 /* it's a packing buffer */
3309 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3310 queue->next_buf_to_fill =
3311 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3312 return 1;
3313 }
3314 return 0;
3315}
3316
4a71df50
FB		 3317/*
3318 * Switched to packing state if the number of used buffers on a queue
3319 * reaches a certain limit.
3320 */
3321static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3322{
3323 if (!queue->do_pack) {
3324 if (atomic_read(&queue->used_buffers)
3325 >= QETH_HIGH_WATERMARK_PACK){
3326 /* switch non-PACKING -> PACKING */
847a50fd 3327 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3328 if (queue->card->options.performance_stats)
3329 queue->card->perf_stats.sc_dp_p++;
3330 queue->do_pack = 1;
3331 }
3332 }
3333}
3334
3335/*
3336 * Switches from packing to non-packing mode. If there is a packing
3337 * buffer on the queue this buffer will be prepared to be flushed.
3338 * In that case 1 is returned to inform the caller. If no buffer
3339 * has to be flushed, zero is returned.
3340 */
3341static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3342{
4a71df50
FB		 3343 if (queue->do_pack) {
3344 if (atomic_read(&queue->used_buffers)
3345 <= QETH_LOW_WATERMARK_PACK) {
3346 /* switch PACKING -> non-PACKING */
847a50fd 3347 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3348 if (queue->card->options.performance_stats)
3349 queue->card->perf_stats.sc_p_dp++;
3350 queue->do_pack = 0;
664e42ac 3351 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3352 }
3353 }
4a71df50
FB		 3354 return 0;
3355}
3356
779e6e1c
JG		 3357static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3358 int count)
4a71df50
FB		 3359{
3360 struct qeth_qdio_out_buffer *buf;
3361 int rc;
3362 int i;
3363 unsigned int qdio_flags;
3364
4a71df50 3365 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3366 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3367 buf = queue->bufs[bidx];
3ec90878
JG		 3368 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3369 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3370
0da9581d
EL		 3371 if (queue->bufstates)
3372 queue->bufstates[bidx].user = buf;
3373
4a71df50
FB		 3374 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3375 continue;
3376
3377 if (!queue->do_pack) {
3378 if ((atomic_read(&queue->used_buffers) >=
3379 (QETH_HIGH_WATERMARK_PACK -
3380 QETH_WATERMARK_PACK_FUZZ)) &&
3381 !atomic_read(&queue->set_pci_flags_count)) {
3382 /* it's likely that we'll go to packing
3383 * mode soon */
3384 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3385 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3386 }
3387 } else {
3388 if (!atomic_read(&queue->set_pci_flags_count)) {
3389 /*
3390 * there's no outstanding PCI any more, so we
3391 * have to request a PCI to be sure the the PCI
3392 * will wake at some time in the future then we
3393 * can flush packed buffers that might still be
3394 * hanging around, which can happen if no
3395 * further send was requested by the stack
3396 */
3397 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3398 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3399 }
3400 }
3401 }
3402
3e66bab3 3403 netif_trans_update(queue->card->dev);
4a71df50
FB		 3404 if (queue->card->options.performance_stats) {
3405 queue->card->perf_stats.outbound_do_qdio_cnt++;
3406 queue->card->perf_stats.outbound_do_qdio_start_time =
3407 qeth_get_micros();
3408 }
3409 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3410 if (atomic_read(&queue->set_pci_flags_count))
3411 qdio_flags |= QDIO_FLAG_PCI_OUT;
a702349a
JW		 3412 atomic_add(count, &queue->used_buffers);
3413
4a71df50 3414 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3415 queue->queue_no, index, count);
4a71df50
FB		 3416 if (queue->card->options.performance_stats)
3417 queue->card->perf_stats.outbound_do_qdio_time +=
3418 qeth_get_micros() -
3419 queue->card->perf_stats.outbound_do_qdio_start_time;
3420 if (rc) {
d303b6fd
JG		 3421 queue->card->stats.tx_errors += count;
3422 /* ignore temporary SIGA errors without busy condition */
1549d13f 3423 if (rc == -ENOBUFS)
d303b6fd 3424 return;
847a50fd 3425 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3426 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3427 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3428 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3429 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3430
4a71df50
FB		 3431 /* this must not happen under normal circumstances. if it
3432 * happens something is really wrong -> recover */
3433 qeth_schedule_recovery(queue->card);
3434 return;
3435 }
4a71df50
FB		 3436 if (queue->card->options.performance_stats)
3437 queue->card->perf_stats.bufs_sent += count;
3438}
3439
3440static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3441{
3442 int index;
3443 int flush_cnt = 0;
3444 int q_was_packing = 0;
3445
3446 /*
3447 * check if weed have to switch to non-packing mode or if
3448 * we have to get a pci flag out on the queue
3449 */
3450 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3451 !atomic_read(&queue->set_pci_flags_count)) {
3452 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3453 QETH_OUT_Q_UNLOCKED) {
3454 /*
3455 * If we get in here, there was no action in
3456 * do_send_packet. So, we check if there is a
3457 * packing buffer to be flushed here.
3458 */
3459 netif_stop_queue(queue->card->dev);
3460 index = queue->next_buf_to_fill;
3461 q_was_packing = queue->do_pack;
3462 /* queue->do_pack may change */
3463 barrier();
3464 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3465 if (!flush_cnt &&
3466 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3467 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3468 if (queue->card->options.performance_stats &&
3469 q_was_packing)
3470 queue->card->perf_stats.bufs_sent_pack +=
3471 flush_cnt;
3472 if (flush_cnt)
779e6e1c 3473 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3474 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3475 }
3476 }
3477}
3478
7bcd64eb
JW		 3479static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3480 unsigned long card_ptr)
a1c3ed4c
FB		 3481{
3482 struct qeth_card *card = (struct qeth_card *)card_ptr;
3483
d3d1b205 3484 if (card->dev->flags & IFF_UP)
a1c3ed4c
FB		 3485 napi_schedule(&card->napi);
3486}
a1c3ed4c 3487
0da9581d
EL		 3488int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3489{
3490 int rc;
3491
3492 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3493 rc = -1;
3494 goto out;
3495 } else {
3496 if (card->options.cq == cq) {
3497 rc = 0;
3498 goto out;
3499 }
3500
3501 if (card->state != CARD_STATE_DOWN &&
3502 card->state != CARD_STATE_RECOVER) {
3503 rc = -1;
3504 goto out;
3505 }
3506
3507 qeth_free_qdio_buffers(card);
3508 card->options.cq = cq;
3509 rc = 0;
3510 }
3511out:
3512 return rc;
3513
3514}
3515EXPORT_SYMBOL_GPL(qeth_configure_cq);
3516
3b346c18
JW		 3517static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
3518 unsigned int queue, int first_element,
3519 int count)
3520{
0da9581d
EL		 3521 struct qeth_qdio_q *cq = card->qdio.c_q;
3522 int i;
3523 int rc;
3524
3525 if (!qeth_is_cq(card, queue))
3526 goto out;
3527
3528 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3529 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3530 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3531
3532 if (qdio_err) {
3533 netif_stop_queue(card->dev);
3534 qeth_schedule_recovery(card);
3535 goto out;
3536 }
3537
3538 if (card->options.performance_stats) {
3539 card->perf_stats.cq_cnt++;
3540 card->perf_stats.cq_start_time = qeth_get_micros();
3541 }
3542
3543 for (i = first_element; i < first_element + count; ++i) {
3544 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3545 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3b346c18 3546 int e = 0;
0da9581d 3547
903e4853
UB		 3548 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3549 buffer->element[e].addr) {
0da9581d
EL		 3550 unsigned long phys_aob_addr;
3551
3552 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3553 qeth_qdio_handle_aob(card, phys_aob_addr);
0da9581d
EL		 3554 ++e;
3555 }
3b346c18 3556 qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
0da9581d
EL		 3557 }
3558 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3559 card->qdio.c_q->next_buf_to_init,
3560 count);
3561 if (rc) {
3562 dev_warn(&card->gdev->dev,
3563 "QDIO reported an error, rc=%i\n", rc);
3564 QETH_CARD_TEXT(card, 2, "qcqherr");
3565 }
3566 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3567 + count) % QDIO_MAX_BUFFERS_PER_Q;
3568
3569 netif_wake_queue(card->dev);
3570
3571 if (card->options.performance_stats) {
3572 int delta_t = qeth_get_micros();
3573 delta_t -= card->perf_stats.cq_start_time;
3574 card->perf_stats.cq_time += delta_t;
3575 }
3576out:
3577 return;
3578}
3579
7bcd64eb
JW		 3580static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3581 unsigned int qdio_err, int queue,
3582 int first_elem, int count,
3583 unsigned long card_ptr)
a1c3ed4c
FB		 3584{
3585 struct qeth_card *card = (struct qeth_card *)card_ptr;
3586
0da9581d
EL		 3587 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3588 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3589
3590 if (qeth_is_cq(card, queue))
3591 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3592 else if (qdio_err)
a1c3ed4c
FB		 3593 qeth_schedule_recovery(card);
3594}
a1c3ed4c 3595
7bcd64eb
JW		 3596static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3597 unsigned int qdio_error, int __queue,
3598 int first_element, int count,
3599 unsigned long card_ptr)
4a71df50
FB		 3600{
3601 struct qeth_card *card = (struct qeth_card *) card_ptr;
3602 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3603 struct qeth_qdio_out_buffer *buffer;
3604 int i;
3605
847a50fd 3606 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3607 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3608 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3609 netif_stop_queue(card->dev);
3610 qeth_schedule_recovery(card);
3611 return;
4a71df50
FB		 3612 }
3613 if (card->options.performance_stats) {
3614 card->perf_stats.outbound_handler_cnt++;
3615 card->perf_stats.outbound_handler_start_time =
3616 qeth_get_micros();
3617 }
3618 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3619 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3620 buffer = queue->bufs[bidx];
b67d801f 3621 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3622
3623 if (queue->bufstates &&
3624 (queue->bufstates[bidx].flags &
3625 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3626 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3627
3628 if (atomic_cmpxchg(&buffer->state,
3629 QETH_QDIO_BUF_PRIMED,
3630 QETH_QDIO_BUF_PENDING) ==
3631 QETH_QDIO_BUF_PRIMED) {
3632 qeth_notify_skbs(queue, buffer,
3633 TX_NOTIFY_PENDING);
3634 }
0da9581d 3635 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
ce28867f
JW		 3636
3637 /* prepare the queue slot for re-use: */
3638 qeth_scrub_qdio_buffer(buffer->buffer,
3639 QETH_MAX_BUFFER_ELEMENTS(card));
b3332930
FB		 3640 if (qeth_init_qdio_out_buf(queue, bidx)) {
3641 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3642 qeth_schedule_recovery(card);
b3332930 3643 }
0da9581d 3644 } else {
b3332930
FB		 3645 if (card->options.cq == QETH_CQ_ENABLED) {
3646 enum iucv_tx_notify n;
3647
3648 n = qeth_compute_cq_notification(
3649 buffer->buffer->element[15].sflags, 0);
3650 qeth_notify_skbs(queue, buffer, n);
3651 }
3652
3b346c18 3653 qeth_clear_output_buffer(queue, buffer);
0da9581d
EL		 3654 }
3655 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3656 }
3657 atomic_sub(count, &queue->used_buffers);
3658 /* check if we need to do something on this outbound queue */
3659 if (card->info.type != QETH_CARD_TYPE_IQD)
3660 qeth_check_outbound_queue(queue);
3661
3662 netif_wake_queue(queue->card->dev);
3663 if (card->options.performance_stats)
3664 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3665 card->perf_stats.outbound_handler_start_time;
3666}
4a71df50 3667
70deb016
HW		 3668/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3669static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3670{
3671 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3672 return 2;
3673 return queue_num;
3674}
3675
290b8348
SR		 3676/**
3677 * Note: Function assumes that we have 4 outbound queues.
3678 */
4a71df50 3679int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
86c0cdb9 3680 int ipv)
4a71df50 3681{
d66cb37e 3682 __be16 *tci;
290b8348
SR		 3683 u8 tos;
3684
290b8348
SR		 3685 switch (card->qdio.do_prio_queueing) {
3686 case QETH_PRIO_Q_ING_TOS:
3687 case QETH_PRIO_Q_ING_PREC:
3688 switch (ipv) {
3689 case 4:
3690 tos = ipv4_get_dsfield(ip_hdr(skb));
3691 break;
3692 case 6:
3693 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3694 break;
3695 default:
3696 return card->qdio.default_out_queue;
4a71df50 3697 }
290b8348 3698 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3699 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3700 if (tos & IPTOS_MINCOST)
70deb016 3701 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3702 if (tos & IPTOS_RELIABILITY)
3703 return 2;
3704 if (tos & IPTOS_THROUGHPUT)
3705 return 1;
3706 if (tos & IPTOS_LOWDELAY)
3707 return 0;
d66cb37e
SR		 3708 break;
3709 case QETH_PRIO_Q_ING_SKB:
3710 if (skb->priority > 5)
3711 return 0;
70deb016 3712 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3713 case QETH_PRIO_Q_ING_VLAN:
3714 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3715 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3716 return qeth_cut_iqd_prio(card,
3717 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3718 break;
4a71df50 3719 default:
290b8348 3720 break;
4a71df50 3721 }
290b8348 3722 return card->qdio.default_out_queue;
4a71df50
FB		 3723}
3724EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3725
2863c613
EC		 3726/**
3727 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3728 * @skb: SKB address
3729 *
3730 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3731 * fragmented part of the SKB. Returns zero for linear SKB.
3732 */
356156b6 3733static int qeth_get_elements_for_frags(struct sk_buff *skb)
271648b4 3734{
2863c613 3735 int cnt, elements = 0;
271648b4
FB		 3736
3737 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3738 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3739
3740 elements += qeth_get_elements_for_range(
3741 (addr_t)skb_frag_address(frag),
3742 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3743 }
3744 return elements;
3745}
271648b4 3746
40e6a225
JW		 3747/**
3748 * qeth_count_elements() - Counts the number of QDIO buffer elements needed
3749 * to transmit an skb.
3750 * @skb: the skb to operate on.
3751 * @data_offset: skip this part of the skb's linear data
3752 *
3753 * Returns the number of pages, and thus QDIO buffer elements, needed to map the
3754 * skb's data (both its linear part and paged fragments).
3755 */
3756unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset)
ba86ceee
JW		 3757{
3758 unsigned int elements = qeth_get_elements_for_frags(skb);
3759 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3760 addr_t start = (addr_t)skb->data + data_offset;
3761
3762 if (start != end)
3763 elements += qeth_get_elements_for_range(start, end);
3764 return elements;
3765}
40e6a225 3766EXPORT_SYMBOL_GPL(qeth_count_elements);
4a71df50 3767
e517b649
JW		 3768#define QETH_HDR_CACHE_OBJ_SIZE (sizeof(struct qeth_hdr_tso) + \
3769 MAX_TCP_HEADER)
55494264 3770
0d6f02d3 3771/**
ba86ceee
JW		 3772 * qeth_add_hw_header() - add a HW header to an skb.
3773 * @skb: skb that the HW header should be added to.
0d6f02d3
JW		 3774 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3775 * it contains a valid pointer to a qeth_hdr.
a7c2f4a3
JW		 3776 * @hdr_len: length of the HW header.
3777 * @proto_len: length of protocol headers that need to be in same page as the
3778 * HW header.
0d6f02d3
JW		 3779 *
3780 * Returns the pushed length. If the header can't be pushed on
3781 * (eg. because it would cross a page boundary), it is allocated from
3782 * the cache instead and 0 is returned.
ba86ceee 3783 * The number of needed buffer elements is returned in @elements.
0d6f02d3
JW		 3784 * Error to create the hdr is indicated by returning with < 0.
3785 */
ba86ceee 3786int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
a7c2f4a3
JW		 3787 struct qeth_hdr **hdr, unsigned int hdr_len,
3788 unsigned int proto_len, unsigned int *elements)
ba86ceee
JW		 3789{
3790 const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
a7c2f4a3 3791 const unsigned int contiguous = proto_len ? proto_len : 1;
ba86ceee
JW		 3792 unsigned int __elements;
3793 addr_t start, end;
3794 bool push_ok;
3795 int rc;
3796
3797check_layout:
a7c2f4a3 3798 start = (addr_t)skb->data - hdr_len;
ba86ceee
JW		 3799 end = (addr_t)skb->data;
3800
a7c2f4a3 3801 if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
ba86ceee
JW		 3802 /* Push HW header into same page as first protocol header. */
3803 push_ok = true;
e517b649
JW		 3804 /* ... but TSO always needs a separate element for headers: */
3805 if (skb_is_gso(skb))
3806 __elements = 1 + qeth_count_elements(skb, proto_len);
3807 else
3808 __elements = qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3809 } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
3810 /* Push HW header into a new page. */
3811 push_ok = true;
ba86ceee 3812 __elements = 1 + qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3813 } else {
3814 /* Use header cache, copy protocol headers up. */
3815 push_ok = false;
3816 __elements = 1 + qeth_count_elements(skb, proto_len);
ba86ceee
JW		 3817 }
3818
3819 /* Compress skb to fit into one IO buffer: */
3820 if (__elements > max_elements) {
3821 if (!skb_is_nonlinear(skb)) {
3822 /* Drop it, no easy way of shrinking it further. */
3823 QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
3824 max_elements, __elements, skb->len);
3825 return -E2BIG;
3826 }
3827
3828 rc = skb_linearize(skb);
3829 if (card->options.performance_stats) {
3830 if (rc)
3831 card->perf_stats.tx_linfail++;
3832 else
3833 card->perf_stats.tx_lin++;
3834 }
3835 if (rc)
3836 return rc;
3837
3838 /* Linearization changed the layout, re-evaluate: */
3839 goto check_layout;
3840 }
3841
3842 *elements = __elements;
3843 /* Add the header: */
3844 if (push_ok) {
a7c2f4a3
JW		 3845 *hdr = skb_push(skb, hdr_len);
3846 return hdr_len;
0d6f02d3
JW		 3847 }
3848 /* fall back */
55494264
JW		 3849 if (hdr_len + proto_len > QETH_HDR_CACHE_OBJ_SIZE)
3850 return -E2BIG;
0d6f02d3
JW		 3851 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3852 if (!*hdr)
3853 return -ENOMEM;
a7c2f4a3
JW		 3854 /* Copy protocol headers behind HW header: */
3855 skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
0d6f02d3
JW		 3856 return 0;
3857}
ba86ceee 3858EXPORT_SYMBOL_GPL(qeth_add_hw_header);
0d6f02d3 3859
cef6ff22
JW		 3860static void __qeth_fill_buffer(struct sk_buff *skb,
3861 struct qeth_qdio_out_buffer *buf,
3862 bool is_first_elem, unsigned int offset)
4a71df50 3863{
384d2ef1
JW		 3864 struct qdio_buffer *buffer = buf->buffer;
3865 int element = buf->next_element_to_fill;
cc309f83
JW		 3866 int length = skb_headlen(skb) - offset;
3867 char *data = skb->data + offset;
384d2ef1 3868 int length_here, cnt;
4a71df50 3869
cc309f83 3870 /* map linear part into buffer element(s) */
4a71df50
FB		 3871 while (length > 0) {
3872 /* length_here is the remaining amount of data in this page */
3873 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3874 if (length < length_here)
3875 length_here = length;
3876
3877 buffer->element[element].addr = data;
3878 buffer->element[element].length = length_here;
3879 length -= length_here;
384d2ef1
JW		 3880 if (is_first_elem) {
3881 is_first_elem = false;
5258830b
JW		 3882 if (length || skb_is_nonlinear(skb))
3883 /* skb needs additional elements */
3ec90878 3884 buffer->element[element].eflags =
5258830b 3885 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3886 else
5258830b
JW		 3887 buffer->element[element].eflags = 0;
3888 } else {
3889 buffer->element[element].eflags =
3890 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3891 }
3892 data += length_here;
3893 element++;
4a71df50 3894 }
51aa165c 3895
cc309f83 3896 /* map page frags into buffer element(s) */
51aa165c 3897 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3898 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3899
3900 data = skb_frag_address(frag);
3901 length = skb_frag_size(frag);
271648b4
FB		 3902 while (length > 0) {
3903 length_here = PAGE_SIZE -
3904 ((unsigned long) data % PAGE_SIZE);
3905 if (length < length_here)
3906 length_here = length;
3907
3908 buffer->element[element].addr = data;
3909 buffer->element[element].length = length_here;
3910 buffer->element[element].eflags =
3911 SBAL_EFLAGS_MIDDLE_FRAG;
3912 length -= length_here;
3913 data += length_here;
3914 element++;
3915 }
51aa165c
FB		 3916 }
3917
3ec90878
JG		 3918 if (buffer->element[element - 1].eflags)
3919 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3920 buf->next_element_to_fill = element;
4a71df50
FB		 3921}
3922
eaf3cc08
JW		 3923/**
3924 * qeth_fill_buffer() - map skb into an output buffer
3925 * @queue: QDIO queue to submit the buffer on
3926 * @buf: buffer to transport the skb
3927 * @skb: skb to map into the buffer
3928 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3929 * from qeth_core_header_cache.
3930 * @offset: when mapping the skb, start at skb->data + offset
3931 * @hd_len: if > 0, build a dedicated header element of this size
3932 */
cef6ff22
JW		 3933static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3934 struct qeth_qdio_out_buffer *buf,
3935 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3936 unsigned int offset, unsigned int hd_len)
4a71df50 3937{
eaf3cc08 3938 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3939 bool is_first_elem = true;
13ddacb5 3940 int flush_cnt = 0;
4a71df50 3941
dc149e37 3942 __skb_queue_tail(&buf->skb_list, skb);
4a71df50 3943
eaf3cc08
JW		 3944 /* build dedicated header element */
3945 if (hd_len) {
683d718a 3946 int element = buf->next_element_to_fill;
384d2ef1
JW		 3947 is_first_elem = false;
3948
683d718a 3949 buffer->element[element].addr = hdr;
f1588177 3950 buffer->element[element].length = hd_len;
3ec90878 3951 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3952 /* remember to free cache-allocated qeth_hdr: */
3953 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3954 buf->next_element_to_fill++;
3955 }
3956
384d2ef1 3957 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3958
3959 if (!queue->do_pack) {
847a50fd 3960 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3961 /* set state to PRIMED -> will be flushed */
3962 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3963 flush_cnt = 1;
3964 } else {
847a50fd 3965 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3966 if (queue->card->options.performance_stats)
3967 queue->card->perf_stats.skbs_sent_pack++;
3968 if (buf->next_element_to_fill >=
3969 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3970 /*
3971 * packed buffer if full -> set state PRIMED
3972 * -> will be flushed
3973 */
3974 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3975 flush_cnt = 1;
3976 }
3977 }
3978 return flush_cnt;
3979}
3980
7c2e9ba3 3981int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 3982 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 3983 unsigned int hd_len)
4a71df50 3984{
7c2e9ba3
JW		 3985 int index = queue->next_buf_to_fill;
3986 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 3987
4a71df50
FB		 3988 /*
3989 * check if buffer is empty to make sure that we do not 'overtake'
3990 * ourselves and try to fill a buffer that is already primed
3991 */
3992 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 3993 return -EBUSY;
3994 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 3995 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3996 qeth_flush_buffers(queue, index, 1);
4a71df50 3997 return 0;
4a71df50
FB		 3998}
3999EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4000
4001int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4002 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4003 unsigned int offset, unsigned int hd_len,
4004 int elements_needed)
4a71df50
FB		 4005{
4006 struct qeth_qdio_out_buffer *buffer;
4007 int start_index;
4008 int flush_count = 0;
4009 int do_pack = 0;
4010 int tmp;
4011 int rc = 0;
4012
4a71df50
FB		 4013 /* spin until we get the queue ... */
4014 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4015 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4016 start_index = queue->next_buf_to_fill;
0da9581d 4017 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4018 /*
4019 * check if buffer is empty to make sure that we do not 'overtake'
4020 * ourselves and try to fill a buffer that is already primed
4021 */
4022 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4023 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4024 return -EBUSY;
4025 }
4026 /* check if we need to switch packing state of this queue */
4027 qeth_switch_to_packing_if_needed(queue);
4028 if (queue->do_pack) {
4029 do_pack = 1;
64ef8957
FB		 4030 /* does packet fit in current buffer? */
4031 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4032 buffer->next_element_to_fill) < elements_needed) {
4033 /* ... no -> set state PRIMED */
4034 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4035 flush_count++;
4036 queue->next_buf_to_fill =
4037 (queue->next_buf_to_fill + 1) %
4038 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4039 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4040 /* we did a step forward, so check buffer state
4041 * again */
4042 if (atomic_read(&buffer->state) !=
4043 QETH_QDIO_BUF_EMPTY) {
4044 qeth_flush_buffers(queue, start_index,
779e6e1c 4045 flush_count);
64ef8957 4046 atomic_set(&queue->state,
4a71df50 4047 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4048 rc = -EBUSY;
4049 goto out;
4a71df50
FB		 4050 }
4051 }
4052 }
9c3bfda9 4053 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4054 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4055 QDIO_MAX_BUFFERS_PER_Q;
4056 flush_count += tmp;
4a71df50 4057 if (flush_count)
779e6e1c 4058 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4059 else if (!atomic_read(&queue->set_pci_flags_count))
4060 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4061 /*
4062 * queue->state will go from LOCKED -> UNLOCKED or from
4063 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4064 * (switch packing state or flush buffer to get another pci flag out).
4065 * In that case we will enter this loop
4066 */
4067 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4068 start_index = queue->next_buf_to_fill;
4069 /* check if we can go back to non-packing state */
3cdc8a25 4070 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4071 /*
4072 * check if we need to flush a packing buffer to get a pci
4073 * flag out on the queue
4074 */
3cdc8a25
JW		 4075 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4076 tmp = qeth_prep_flush_pack_buffer(queue);
4077 if (tmp) {
4078 qeth_flush_buffers(queue, start_index, tmp);
4079 flush_count += tmp;
4080 }
4a71df50 4081 }
3cdc8a25 4082out:
4a71df50
FB		 4083 /* at this point the queue is UNLOCKED again */
4084 if (queue->card->options.performance_stats && do_pack)
4085 queue->card->perf_stats.bufs_sent_pack += flush_count;
4086
4087 return rc;
4088}
4089EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4090
fc69660b
JW		 4091int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
4092 struct qeth_qdio_out_q *queue, int ipv, int cast_type,
4093 void (*fill_header)(struct qeth_card *card, struct qeth_hdr *hdr,
4094 struct sk_buff *skb, int ipv, int cast_type,
4095 unsigned int data_len))
4096{
4097 const unsigned int proto_len = IS_IQD(card) ? ETH_HLEN : 0;
4098 const unsigned int hw_hdr_len = sizeof(struct qeth_hdr);
4099 unsigned int frame_len = skb->len;
4100 unsigned int data_offset = 0;
4101 struct qeth_hdr *hdr = NULL;
4102 unsigned int hd_len = 0;
4103 unsigned int elements;
4104 int push_len, rc;
4105 bool is_sg;
4106
4107 rc = skb_cow_head(skb, hw_hdr_len);
4108 if (rc)
4109 return rc;
4110
4111 push_len = qeth_add_hw_header(card, skb, &hdr, hw_hdr_len, proto_len,
4112 &elements);
4113 if (push_len < 0)
4114 return push_len;
4115 if (!push_len) {
4116 /* HW header needs its own buffer element. */
4117 hd_len = hw_hdr_len + proto_len;
4118 data_offset = proto_len;
4119 }
e517b649 4120 memset(hdr, 0, hw_hdr_len);
fc69660b
JW		 4121 fill_header(card, hdr, skb, ipv, cast_type, frame_len);
4122
4123 is_sg = skb_is_nonlinear(skb);
4124 if (IS_IQD(card)) {
4125 rc = qeth_do_send_packet_fast(queue, skb, hdr, data_offset,
4126 hd_len);
4127 } else {
4128 /* TODO: drop skb_orphan() once TX completion is fast enough */
4129 skb_orphan(skb);
4130 rc = qeth_do_send_packet(card, queue, skb, hdr, data_offset,
4131 hd_len, elements);
4132 }
4133
4134 if (!rc) {
4135 if (card->options.performance_stats) {
4136 card->perf_stats.buf_elements_sent += elements;
4137 if (is_sg)
4138 card->perf_stats.sg_skbs_sent++;
4139 }
4140 } else {
4141 if (!push_len)
4142 kmem_cache_free(qeth_core_header_cache, hdr);
4143 if (rc == -EBUSY)
4144 /* roll back to ETH header */
4145 skb_pull(skb, push_len);
4146 }
4147 return rc;
4148}
4149EXPORT_SYMBOL_GPL(qeth_xmit);
4150
4a71df50
FB		 4151static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4152 struct qeth_reply *reply, unsigned long data)
4153{
686c97ee 4154 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4155 struct qeth_ipacmd_setadpparms *setparms;
4156
847a50fd 4157 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4158
4a71df50 4159 setparms = &(cmd->data.setadapterparms);
686c97ee 4160 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4161 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4162 setparms->data.mode = SET_PROMISC_MODE_OFF;
4163 }
4164 card->info.promisc_mode = setparms->data.mode;
4165 return 0;
4166}
4167
4168void qeth_setadp_promisc_mode(struct qeth_card *card)
4169{
4170 enum qeth_ipa_promisc_modes mode;
4171 struct net_device *dev = card->dev;
4172 struct qeth_cmd_buffer *iob;
4173 struct qeth_ipa_cmd *cmd;
4174
847a50fd 4175 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4176
4177 if (((dev->flags & IFF_PROMISC) &&
4178 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4179 (!(dev->flags & IFF_PROMISC) &&
4180 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4181 return;
4182 mode = SET_PROMISC_MODE_OFF;
4183 if (dev->flags & IFF_PROMISC)
4184 mode = SET_PROMISC_MODE_ON;
847a50fd 4185 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4186
4187 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4188 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4189 if (!iob)
4190 return;
ff5caa7a 4191 cmd = __ipa_cmd(iob);
4a71df50
FB		 4192 cmd->data.setadapterparms.data.mode = mode;
4193 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4194}
4195EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4196
4a71df50
FB		 4197struct net_device_stats *qeth_get_stats(struct net_device *dev)
4198{
4199 struct qeth_card *card;
4200
509e2562 4201 card = dev->ml_priv;
4a71df50 4202
847a50fd 4203 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4204
4205 return &card->stats;
4206}
4207EXPORT_SYMBOL_GPL(qeth_get_stats);
4208
4209static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4210 struct qeth_reply *reply, unsigned long data)
4211{
686c97ee 4212 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 4213
847a50fd 4214 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee
JW		 4215 if (qeth_setadpparms_inspect_rc(cmd))
4216 return 0;
4a71df50 4217
4fda3354 4218 if (IS_LAYER3(card) || !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
99f0b85d
JW		 4219 ether_addr_copy(card->dev->dev_addr,
4220 cmd->data.setadapterparms.data.change_addr.addr);
4a71df50
FB		 4221 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4222 }
4a71df50
FB		 4223 return 0;
4224}
4225
4226int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4227{
4228 int rc;
4229 struct qeth_cmd_buffer *iob;
4230 struct qeth_ipa_cmd *cmd;
4231
847a50fd 4232 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4233
4234 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4235 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4236 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4237 if (!iob)
4238 return -ENOMEM;
ff5caa7a 4239 cmd = __ipa_cmd(iob);
4a71df50 4240 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4241 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4242 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4243 card->dev->dev_addr);
4a71df50
FB		 4244 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4245 NULL);
4246 return rc;
4247}
4248EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4249
d64ecc22
EL		 4250static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4251 struct qeth_reply *reply, unsigned long data)
4252{
686c97ee 4253 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4254 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4255 int fallback = *(int *)reply->param;
d64ecc22 4256
847a50fd 4257 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee
JW		 4258 if (cmd->hdr.return_code)
4259 return 0;
4260 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4261
d64ecc22
EL		 4262 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4263 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4264 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4265 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4266 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4267 if (cmd->data.setadapterparms.hdr.return_code !=
4268 SET_ACCESS_CTRL_RC_SUCCESS)
4269 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4270 card->gdev->dev.kobj.name,
4271 access_ctrl_req->subcmd_code,
4272 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4273 switch (cmd->data.setadapterparms.hdr.return_code) {
4274 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4275 if (card->options.isolation == ISOLATION_MODE_NONE) {
4276 dev_info(&card->gdev->dev,
4277 "QDIO data connection isolation is deactivated\n");
4278 } else {
4279 dev_info(&card->gdev->dev,
4280 "QDIO data connection isolation is activated\n");
4281 }
d64ecc22 4282 break;
0f54761d
SR		 4283 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4284 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4285 "deactivated\n", dev_name(&card->gdev->dev));
4286 if (fallback)
4287 card->options.isolation = card->options.prev_isolation;
4288 break;
4289 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4290 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4291 " activated\n", dev_name(&card->gdev->dev));
4292 if (fallback)
4293 card->options.isolation = card->options.prev_isolation;
4294 break;
d64ecc22 4295 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4296 dev_err(&card->gdev->dev, "Adapter does not "
4297 "support QDIO data connection isolation\n");
d64ecc22 4298 break;
d64ecc22 4299 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4300 dev_err(&card->gdev->dev,
4301 "Adapter is dedicated. "
4302 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4303 if (fallback)
4304 card->options.isolation = card->options.prev_isolation;
d64ecc22 4305 break;
d64ecc22 4306 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4307 dev_err(&card->gdev->dev,
4308 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4309 if (fallback)
4310 card->options.isolation = card->options.prev_isolation;
4311 break;
4312 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4313 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4314 "support reflective relay mode\n");
4315 if (fallback)
4316 card->options.isolation = card->options.prev_isolation;
4317 break;
4318 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4319 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4320 "enabled at the adjacent switch port");
4321 if (fallback)
4322 card->options.isolation = card->options.prev_isolation;
4323 break;
4324 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4325 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4326 "at the adjacent switch failed\n");
d64ecc22 4327 break;
d64ecc22 4328 default:
d64ecc22 4329 /* this should never happen */
0f54761d
SR		 4330 if (fallback)
4331 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4332 break;
4333 }
bbb822a8 4334 return 0;
d64ecc22
EL		 4335}
4336
4337static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4338 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4339{
4340 int rc;
4341 struct qeth_cmd_buffer *iob;
4342 struct qeth_ipa_cmd *cmd;
4343 struct qeth_set_access_ctrl *access_ctrl_req;
4344
847a50fd 4345 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4346
4347 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4348 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4349
4350 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4351 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4352 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4353 if (!iob)
4354 return -ENOMEM;
ff5caa7a 4355 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4356 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4357 access_ctrl_req->subcmd_code = isolation;
4358
4359 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4360 &fallback);
d64ecc22
EL		 4361 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4362 return rc;
4363}
4364
0f54761d 4365int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4366{
4367 int rc = 0;
4368
847a50fd 4369 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4370
5113fec0
UB		 4371 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4372 card->info.type == QETH_CARD_TYPE_OSX) &&
4373 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4374 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4375 card->options.isolation, fallback);
d64ecc22
EL		 4376 if (rc) {
4377 QETH_DBF_MESSAGE(3,
5113fec0 4378 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4379 card->gdev->dev.kobj.name,
4380 rc);
0f54761d 4381 rc = -EOPNOTSUPP;
d64ecc22
EL		 4382 }
4383 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4384 card->options.isolation = ISOLATION_MODE_NONE;
4385
4386 dev_err(&card->gdev->dev, "Adapter does not "
4387 "support QDIO data connection isolation\n");
4388 rc = -EOPNOTSUPP;
4389 }
4390 return rc;
4391}
4392EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4393
4a71df50
FB		 4394void qeth_tx_timeout(struct net_device *dev)
4395{
4396 struct qeth_card *card;
4397
509e2562 4398 card = dev->ml_priv;
847a50fd 4399 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4400 card->stats.tx_errors++;
4401 qeth_schedule_recovery(card);
4402}
4403EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4404
942d6984 4405static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4406{
509e2562 4407 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4408 int rc = 0;
4409
4410 switch (regnum) {
4411 case MII_BMCR: /* Basic mode control register */
4412 rc = BMCR_FULLDPLX;
4413 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4414 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4415 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4416 rc |= BMCR_SPEED100;
4417 break;
4418 case MII_BMSR: /* Basic mode status register */
4419 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4420 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4421 BMSR_100BASE4;
4422 break;
4423 case MII_PHYSID1: /* PHYS ID 1 */
4424 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4425 dev->dev_addr[2];
4426 rc = (rc >> 5) & 0xFFFF;
4427 break;
4428 case MII_PHYSID2: /* PHYS ID 2 */
4429 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4430 break;
4431 case MII_ADVERTISE: /* Advertisement control reg */
4432 rc = ADVERTISE_ALL;
4433 break;
4434 case MII_LPA: /* Link partner ability reg */
4435 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4436 LPA_100BASE4 | LPA_LPACK;
4437 break;
4438 case MII_EXPANSION: /* Expansion register */
4439 break;
4440 case MII_DCOUNTER: /* disconnect counter */
4441 break;
4442 case MII_FCSCOUNTER: /* false carrier counter */
4443 break;
4444 case MII_NWAYTEST: /* N-way auto-neg test register */
4445 break;
4446 case MII_RERRCOUNTER: /* rx error counter */
4447 rc = card->stats.rx_errors;
4448 break;
4449 case MII_SREVISION: /* silicon revision */
4450 break;
4451 case MII_RESV1: /* reserved 1 */
4452 break;
4453 case MII_LBRERROR: /* loopback, rx, bypass error */
4454 break;
4455 case MII_PHYADDR: /* physical address */
4456 break;
4457 case MII_RESV2: /* reserved 2 */
4458 break;
4459 case MII_TPISTATUS: /* TPI status for 10mbps */
4460 break;
4461 case MII_NCONFIG: /* network interface config */
4462 break;
4463 default:
4464 break;
4465 }
4466 return rc;
4467}
4a71df50
FB		 4468
4469static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4470 struct qeth_cmd_buffer *iob, int len,
4471 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4472 unsigned long),
4473 void *reply_param)
4474{
4475 u16 s1, s2;
4476
847a50fd 4477 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4478
4479 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4480 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4481 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4482 /* adjust PDU length fields in IPA_PDU_HEADER */
4483 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4484 s2 = (u32) len;
4485 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4486 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4487 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4488 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4489 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4490 reply_cb, reply_param);
4491}
4492
4493static int qeth_snmp_command_cb(struct qeth_card *card,
4494 struct qeth_reply *reply, unsigned long sdata)
4495{
4496 struct qeth_ipa_cmd *cmd;
4497 struct qeth_arp_query_info *qinfo;
4498 struct qeth_snmp_cmd *snmp;
4499 unsigned char *data;
4500 __u16 data_len;
4501
847a50fd 4502 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4503
4504 cmd = (struct qeth_ipa_cmd *) sdata;
4505 data = (unsigned char *)((char *)cmd - reply->offset);
4506 qinfo = (struct qeth_arp_query_info *) reply->param;
4507 snmp = &cmd->data.setadapterparms.data.snmp;
4508
4509 if (cmd->hdr.return_code) {
8a593148 4510 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4511 return 0;
4512 }
4513 if (cmd->data.setadapterparms.hdr.return_code) {
4514 cmd->hdr.return_code =
4515 cmd->data.setadapterparms.hdr.return_code;
8a593148 4516 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4517 return 0;
4518 }
4519 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4520 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4521 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4522 else
4523 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4524
4525 /* check if there is enough room in userspace */
4526 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4527 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4528 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4529 return 0;
4530 }
847a50fd 4531 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4532 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4533 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4534 cmd->data.setadapterparms.hdr.seq_no);
4535 /*copy entries to user buffer*/
4536 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4537 memcpy(qinfo->udata + qinfo->udata_offset,
4538 (char *)snmp,
4539 data_len + offsetof(struct qeth_snmp_cmd, data));
4540 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4541 } else {
4542 memcpy(qinfo->udata + qinfo->udata_offset,
4543 (char *)&snmp->request, data_len);
4544 }
4545 qinfo->udata_offset += data_len;
4546 /* check if all replies received ... */
847a50fd 4547 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4548 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4549 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4550 cmd->data.setadapterparms.hdr.seq_no);
4551 if (cmd->data.setadapterparms.hdr.seq_no <
4552 cmd->data.setadapterparms.hdr.used_total)
4553 return 1;
4554 return 0;
4555}
4556
942d6984 4557static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4558{
4559 struct qeth_cmd_buffer *iob;
4560 struct qeth_ipa_cmd *cmd;
4561 struct qeth_snmp_ureq *ureq;
6fb392b1 4562 unsigned int req_len;
4a71df50
FB		 4563 struct qeth_arp_query_info qinfo = {0, };
4564 int rc = 0;
4565
847a50fd 4566 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4567
4568 if (card->info.guestlan)
4569 return -EOPNOTSUPP;
4570
4571 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4fda3354 4572 IS_LAYER3(card))
4a71df50 4573 return -EOPNOTSUPP;
4fda3354 4574
4a71df50
FB		 4575 /* skip 4 bytes (data_len struct member) to get req_len */
4576 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4577 return -EFAULT;
6fb392b1
UB		 4578 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4579 sizeof(struct qeth_ipacmd_hdr) -
4580 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4581 return -EINVAL;
4986f3f0
JL		 4582 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4583 if (IS_ERR(ureq)) {
847a50fd 4584 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4585 return PTR_ERR(ureq);
4a71df50
FB		 4586 }
4587 qinfo.udata_len = ureq->hdr.data_len;
4588 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4589 if (!qinfo.udata) {
4590 kfree(ureq);
4591 return -ENOMEM;
4592 }
4593 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4594
4595 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4596 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4597 if (!iob) {
4598 rc = -ENOMEM;
4599 goto out;
4600 }
ff5caa7a 4601 cmd = __ipa_cmd(iob);
4a71df50
FB		 4602 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4603 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4604 qeth_snmp_command_cb, (void *)&qinfo);
4605 if (rc)
14cc21b6 4606 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4607 QETH_CARD_IFNAME(card), rc);
4608 else {
4609 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4610 rc = -EFAULT;
4611 }
1aec42bc 4612out:
4a71df50
FB		 4613 kfree(ureq);
4614 kfree(qinfo.udata);
4615 return rc;
4616}
4a71df50 4617
c3ab96f3
FB		 4618static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4619 struct qeth_reply *reply, unsigned long data)
4620{
686c97ee 4621 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4622 struct qeth_qoat_priv *priv;
4623 char *resdata;
4624 int resdatalen;
4625
4626 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee
JW		 4627 if (qeth_setadpparms_inspect_rc(cmd))
4628 return 0;
c3ab96f3 4629
c3ab96f3
FB		 4630 priv = (struct qeth_qoat_priv *)reply->param;
4631 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4632 resdata = (char *)data + 28;
4633
4634 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4635 cmd->hdr.return_code = IPA_RC_FFFF;
4636 return 0;
4637 }
4638
4639 memcpy((priv->buffer + priv->response_len), resdata,
4640 resdatalen);
4641 priv->response_len += resdatalen;
4642
4643 if (cmd->data.setadapterparms.hdr.seq_no <
4644 cmd->data.setadapterparms.hdr.used_total)
4645 return 1;
4646 return 0;
4647}
4648
942d6984 4649static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4650{
4651 int rc = 0;
4652 struct qeth_cmd_buffer *iob;
4653 struct qeth_ipa_cmd *cmd;
4654 struct qeth_query_oat *oat_req;
4655 struct qeth_query_oat_data oat_data;
4656 struct qeth_qoat_priv priv;
4657 void __user *tmp;
4658
4659 QETH_CARD_TEXT(card, 3, "qoatcmd");
4660
4661 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4662 rc = -EOPNOTSUPP;
4663 goto out;
4664 }
4665
4666 if (copy_from_user(&oat_data, udata,
4667 sizeof(struct qeth_query_oat_data))) {
4668 rc = -EFAULT;
4669 goto out;
4670 }
4671
4672 priv.buffer_len = oat_data.buffer_len;
4673 priv.response_len = 0;
aec45e85 4674 priv.buffer = vzalloc(oat_data.buffer_len);
c3ab96f3
FB		 4675 if (!priv.buffer) {
4676 rc = -ENOMEM;
4677 goto out;
4678 }
4679
4680 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4681 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4682 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4683 if (!iob) {
4684 rc = -ENOMEM;
4685 goto out_free;
4686 }
ff5caa7a 4687 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4688 oat_req = &cmd->data.setadapterparms.data.query_oat;
4689 oat_req->subcmd_code = oat_data.command;
4690
4691 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4692 &priv);
4693 if (!rc) {
4694 if (is_compat_task())
4695 tmp = compat_ptr(oat_data.ptr);
4696 else
4697 tmp = (void __user *)(unsigned long)oat_data.ptr;
4698
4699 if (copy_to_user(tmp, priv.buffer,
4700 priv.response_len)) {
4701 rc = -EFAULT;
4702 goto out_free;
4703 }
4704
4705 oat_data.response_len = priv.response_len;
4706
4707 if (copy_to_user(udata, &oat_data,
4708 sizeof(struct qeth_query_oat_data)))
4709 rc = -EFAULT;
4710 } else
4711 if (rc == IPA_RC_FFFF)
4712 rc = -EFAULT;
4713
4714out_free:
aec45e85 4715 vfree(priv.buffer);
c3ab96f3
FB		 4716out:
4717 return rc;
4718}
c3ab96f3 4719
e71e4072
HC		 4720static int qeth_query_card_info_cb(struct qeth_card *card,
4721 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4722{
686c97ee
JW		 4723 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4724 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4725 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4726
4727 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee
JW		 4728 if (qeth_setadpparms_inspect_rc(cmd))
4729 return 0;
02d5cb5b 4730
686c97ee
JW		 4731 card_info = &cmd->data.setadapterparms.data.card_info;
4732 carrier_info->card_type = card_info->card_type;
4733 carrier_info->port_mode = card_info->port_mode;
4734 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4735 return 0;
4736}
4737
bca51650 4738static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4739 struct carrier_info *carrier_info)
4740{
4741 struct qeth_cmd_buffer *iob;
4742
4743 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4744 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4745 return -EOPNOTSUPP;
4746 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4747 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4748 if (!iob)
4749 return -ENOMEM;
02d5cb5b
EC		 4750 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4751 (void *)carrier_info);
4752}
02d5cb5b 4753
ec61bd2f
JW		 4754/**
4755 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4756 * @card: pointer to a qeth_card
4757 *
4758 * Returns
4759 * 0, if a MAC address has been set for the card's netdevice
4760 * a return code, for various error conditions
4761 */
4762int qeth_vm_request_mac(struct qeth_card *card)
4763{
4764 struct diag26c_mac_resp *response;
4765 struct diag26c_mac_req *request;
4766 struct ccw_dev_id id;
4767 int rc;
4768
4769 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4770
ec61bd2f
JW		 4771 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4772 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4773 if (!request || !response) {
4774 rc = -ENOMEM;
4775 goto out;
4776 }
4777
46646105 4778 ccw_device_get_id(CARD_DDEV(card), &id);
ec61bd2f
JW		 4779 request->resp_buf_len = sizeof(*response);
4780 request->resp_version = DIAG26C_VERSION2;
4781 request->op_code = DIAG26C_GET_MAC;
4782 request->devno = id.devno;
4783
615dff22 4784 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4785 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4786 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4787 if (rc)
4788 goto out;
615dff22 4789 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4790
4791 if (request->resp_buf_len < sizeof(*response) ||
4792 response->version != request->resp_version) {
4793 rc = -EIO;
4794 QETH_DBF_TEXT(SETUP, 2, "badresp");
4795 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4796 sizeof(request->resp_buf_len));
4797 } else if (!is_valid_ether_addr(response->mac)) {
4798 rc = -EINVAL;
4799 QETH_DBF_TEXT(SETUP, 2, "badmac");
4800 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4801 } else {
4802 ether_addr_copy(card->dev->dev_addr, response->mac);
4803 }
4804
4805out:
4806 kfree(response);
4807 kfree(request);
4808 return rc;
4809}
4810EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4811
cef6ff22 4812static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4813{
aa59004b
JW		 4814 if (card->info.type == QETH_CARD_TYPE_IQD)
4815 return QDIO_IQDIO_QFMT;
4816 else
4817 return QDIO_QETH_QFMT;
4a71df50
FB		 4818}
4819
d0ff1f52
UB		 4820static void qeth_determine_capabilities(struct qeth_card *card)
4821{
4822 int rc;
4823 int length;
4824 char *prcd;
4825 struct ccw_device *ddev;
4826 int ddev_offline = 0;
4827
4828 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4829 ddev = CARD_DDEV(card);
4830 if (!ddev->online) {
4831 ddev_offline = 1;
4832 rc = ccw_device_set_online(ddev);
4833 if (rc) {
4834 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4835 goto out;
4836 }
4837 }
4838
4839 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4840 if (rc) {
4841 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4842 dev_name(&card->gdev->dev), rc);
4843 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4844 goto out_offline;
4845 }
4846 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4847 if (ddev_offline)
4848 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4849 kfree(prcd);
4850
4851 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4852 if (rc)
4853 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4854
0da9581d 4855 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4856 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4857 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4858 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4859 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4860 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4861 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4862 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4863 dev_info(&card->gdev->dev,
4864 "Completion Queueing supported\n");
4865 } else {
4866 card->options.cq = QETH_CQ_NOTAVAILABLE;
4867 }
4868
4869
d0ff1f52
UB		 4870out_offline:
4871 if (ddev_offline == 1)
4872 ccw_device_set_offline(ddev);
4873out:
4874 return;
4875}
4876
cef6ff22
JW		 4877static void qeth_qdio_establish_cq(struct qeth_card *card,
4878 struct qdio_buffer **in_sbal_ptrs,
4879 void (**queue_start_poll)
4880 (struct ccw_device *, int,
4881 unsigned long))
4882{
0da9581d
EL		 4883 int i;
4884
4885 if (card->options.cq == QETH_CQ_ENABLED) {
4886 int offset = QDIO_MAX_BUFFERS_PER_Q *
4887 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4888 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4889 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4890 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4891 }
4892
4893 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4894 }
4895}
4896
4a71df50
FB		 4897static int qeth_qdio_establish(struct qeth_card *card)
4898{
4899 struct qdio_initialize init_data;
4900 char *qib_param_field;
4901 struct qdio_buffer **in_sbal_ptrs;
104ea556 4902 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4903 struct qdio_buffer **out_sbal_ptrs;
4904 int i, j, k;
4905 int rc = 0;
4906
d11ba0c4 4907 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50 4908
6396bb22
KC		 4909 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
4910 GFP_KERNEL);
104ea556 4911 if (!qib_param_field) {
4912 rc = -ENOMEM;
4913 goto out_free_nothing;
4914 }
4a71df50
FB		 4915
4916 qeth_create_qib_param_field(card, qib_param_field);
4917 qeth_create_qib_param_field_blkt(card, qib_param_field);
4918
6396bb22
KC		 4919 in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
4920 sizeof(void *),
4a71df50
FB		 4921 GFP_KERNEL);
4922 if (!in_sbal_ptrs) {
104ea556 4923 rc = -ENOMEM;
4924 goto out_free_qib_param;
4a71df50 4925 }
0da9581d 4926 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4927 in_sbal_ptrs[i] = (struct qdio_buffer *)
4928 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4929 }
4a71df50 4930
6396bb22 4931 queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
0da9581d 4932 GFP_KERNEL);
104ea556 4933 if (!queue_start_poll) {
4934 rc = -ENOMEM;
4935 goto out_free_in_sbals;
4936 }
0da9581d 4937 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4938 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4939
4940 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4941
4a71df50 4942 out_sbal_ptrs =
6396bb22
KC		 4943 kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
4944 sizeof(void *),
4945 GFP_KERNEL);
4a71df50 4946 if (!out_sbal_ptrs) {
104ea556 4947 rc = -ENOMEM;
4948 goto out_free_queue_start_poll;
4a71df50
FB		 4949 }
4950 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4951 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4952 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4953 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4954 }
4955
4956 memset(&init_data, 0, sizeof(struct qdio_initialize));
4957 init_data.cdev = CARD_DDEV(card);
4958 init_data.q_format = qeth_get_qdio_q_format(card);
4959 init_data.qib_param_field_format = 0;
4960 init_data.qib_param_field = qib_param_field;
0da9581d 4961 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4962 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 4963 init_data.input_handler = qeth_qdio_input_handler;
4964 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 4965 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4966 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4967 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4968 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4969 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4970 init_data.scan_threshold =
0fa81cd4 4971 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4972
4973 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4974 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4975 rc = qdio_allocate(&init_data);
4976 if (rc) {
4977 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4978 goto out;
4979 }
4980 rc = qdio_establish(&init_data);
4981 if (rc) {
4a71df50 4982 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4983 qdio_free(CARD_DDEV(card));
4984 }
4a71df50 4985 }
0da9581d
EL		 4986
4987 switch (card->options.cq) {
4988 case QETH_CQ_ENABLED:
4989 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4990 break;
4991 case QETH_CQ_DISABLED:
4992 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4993 break;
4994 default:
4995 break;
4996 }
cc961d40 4997out:
4a71df50 4998 kfree(out_sbal_ptrs);
104ea556 4999out_free_queue_start_poll:
5000 kfree(queue_start_poll);
5001out_free_in_sbals:
4a71df50 5002 kfree(in_sbal_ptrs);
104ea556 5003out_free_qib_param:
4a71df50 5004 kfree(qib_param_field);
104ea556 5005out_free_nothing:
4a71df50
FB		 5006 return rc;
5007}
5008
5009static void qeth_core_free_card(struct qeth_card *card)
5010{
d11ba0c4
PT		 5011 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5012 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5013 qeth_clean_channel(&card->read);
5014 qeth_clean_channel(&card->write);
f15cdaf2 5015 qeth_clean_channel(&card->data);
4a71df50 5016 qeth_free_qdio_buffers(card);
6bcac508 5017 unregister_service_level(&card->qeth_service_level);
a2eb0ad5 5018 dev_set_drvdata(&card->gdev->dev, NULL);
4a71df50
FB		 5019 kfree(card);
5020}
5021
395672e0
SR		 5022void qeth_trace_features(struct qeth_card *card)
5023{
5024 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5025 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5026 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5027 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5028 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5029 sizeof(card->info.diagass_support));
395672e0
SR		 5030}
5031EXPORT_SYMBOL_GPL(qeth_trace_features);
5032
4a71df50 5033static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5034 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5035 .driver_info = QETH_CARD_TYPE_OSD},
5036 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5037 .driver_info = QETH_CARD_TYPE_IQD},
5038 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5039 .driver_info = QETH_CARD_TYPE_OSN},
5040 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5041 .driver_info = QETH_CARD_TYPE_OSM},
5042 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5043 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5044 {},
5045};
5046MODULE_DEVICE_TABLE(ccw, qeth_ids);
5047
5048static struct ccw_driver qeth_ccw_driver = {
3bda058b 5049 .driver = {
3e70b3b8 5050 .owner = THIS_MODULE,
3bda058b
SO		 5051 .name = "qeth",
5052 },
4a71df50
FB		 5053 .ids = qeth_ids,
5054 .probe = ccwgroup_probe_ccwdev,
5055 .remove = ccwgroup_remove_ccwdev,
5056};
5057
4a71df50
FB		 5058int qeth_core_hardsetup_card(struct qeth_card *card)
5059{
6ebb7f8d 5060 int retries = 3;
4a71df50
FB		 5061 int rc;
5062
d11ba0c4 5063 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5064 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5065 qeth_update_from_chp_desc(card);
4a71df50 5066retry:
6ebb7f8d 5067 if (retries < 3)
74eacdb9
FB		 5068 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5069 dev_name(&card->gdev->dev));
22ae2790 5070 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5071 ccw_device_set_offline(CARD_DDEV(card));
5072 ccw_device_set_offline(CARD_WDEV(card));
5073 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5074 qdio_free(CARD_DDEV(card));
aa909224
UB		 5075 rc = ccw_device_set_online(CARD_RDEV(card));
5076 if (rc)
5077 goto retriable;
5078 rc = ccw_device_set_online(CARD_WDEV(card));
5079 if (rc)
5080 goto retriable;
5081 rc = ccw_device_set_online(CARD_DDEV(card));
5082 if (rc)
5083 goto retriable;
aa909224 5084retriable:
4a71df50 5085 if (rc == -ERESTARTSYS) {
d11ba0c4 5086 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5087 return rc;
5088 } else if (rc) {
d11ba0c4 5089 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5090 if (--retries < 0)
4a71df50
FB		 5091 goto out;
5092 else
5093 goto retry;
5094 }
d0ff1f52 5095 qeth_determine_capabilities(card);
4a71df50
FB		 5096 qeth_init_tokens(card);
5097 qeth_init_func_level(card);
8d908eb0 5098 rc = qeth_idx_activate_channel(card, &card->read, qeth_idx_read_cb);
4a71df50 5099 if (rc == -ERESTARTSYS) {
d11ba0c4 5100 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5101 return rc;
5102 } else if (rc) {
d11ba0c4 5103 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5104 if (--retries < 0)
5105 goto out;
5106 else
5107 goto retry;
5108 }
8d908eb0 5109 rc = qeth_idx_activate_channel(card, &card->write, qeth_idx_write_cb);
4a71df50 5110 if (rc == -ERESTARTSYS) {
d11ba0c4 5111 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5112 return rc;
5113 } else if (rc) {
d11ba0c4 5114 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5115 if (--retries < 0)
5116 goto out;
5117 else
5118 goto retry;
5119 }
908abbb5 5120 card->read_or_write_problem = 0;
4a71df50
FB		 5121 rc = qeth_mpc_initialize(card);
5122 if (rc) {
d11ba0c4 5123 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5124 goto out;
5125 }
1da74b1c 5126
10340510
JW		 5127 rc = qeth_send_startlan(card);
5128 if (rc) {
5129 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5130 if (rc == IPA_RC_LAN_OFFLINE) {
5131 dev_warn(&card->gdev->dev,
5132 "The LAN is offline\n");
91cc98f5 5133 netif_carrier_off(card->dev);
10340510
JW		 5134 } else {
5135 rc = -ENODEV;
5136 goto out;
5137 }
91cc98f5
JW		 5138 } else {
5139 netif_carrier_on(card->dev);
5140 }
10340510 5141
1da74b1c 5142 card->options.ipa4.supported_funcs = 0;
4d7def2a 5143 card->options.ipa6.supported_funcs = 0;
1da74b1c 5144 card->options.adp.supported_funcs = 0;
b4d72c08 5145 card->options.sbp.supported_funcs = 0;
1da74b1c 5146 card->info.diagass_support = 0;
1aec42bc
TR		 5147 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5148 if (rc == -ENOMEM)
5149 goto out;
ee75fb86
KM		 5150 if (qeth_is_supported(card, IPA_IPV6)) {
5151 rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
5152 if (rc == -ENOMEM)
5153 goto out;
5154 }
1aec42bc
TR		 5155 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5156 rc = qeth_query_setadapterparms(card);
5157 if (rc < 0) {
10340510 5158 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5159 goto out;
5160 }
5161 }
5162 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5163 rc = qeth_query_setdiagass(card);
5164 if (rc < 0) {
10340510 5165 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5166 goto out;
5167 }
5168 }
4a71df50
FB		 5169 return 0;
5170out:
74eacdb9
FB		 5171 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5172 "an error on the device\n");
5173 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5174 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5175 return rc;
5176}
5177EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5178
8d68af6a
JW		 5179static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5180 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5181{
5182 struct page *page = virt_to_page(element->addr);
b6f72f96 5183 unsigned int next_frag;
b3332930 5184
8d68af6a
JW		 5185 /* first fill the linear space */
5186 if (!skb->len) {
5187 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5188
8d68af6a
JW		 5189 skb_put_data(skb, element->addr + offset, linear);
5190 data_len -= linear;
5191 if (!data_len)
5192 return;
5193 offset += linear;
5194 /* fall through to add page frag for remaining data */
4a71df50 5195 }
0da9581d 5196
8d68af6a 5197 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5198 get_page(page);
8d68af6a 5199 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5200}
5201
bca51650
TR		 5202static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5203{
5204 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5205}
5206
4a71df50 5207struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5208 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5209 struct qdio_buffer_element **__element, int *__offset,
5210 struct qeth_hdr **hdr)
5211{
5212 struct qdio_buffer_element *element = *__element;
b3332930 5213 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5214 int offset = *__offset;
8d68af6a 5215 struct sk_buff *skb;
76b11f8e 5216 int skb_len = 0;
4a71df50
FB		 5217 void *data_ptr;
5218 int data_len;
5219 int headroom = 0;
5220 int use_rx_sg = 0;
4a71df50 5221
4a71df50 5222 /* qeth_hdr must not cross element boundaries */
864c17c3 5223 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5224 if (qeth_is_last_sbale(element))
5225 return NULL;
5226 element++;
5227 offset = 0;
4a71df50
FB		 5228 }
5229 *hdr = element->addr + offset;
5230
5231 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5232 switch ((*hdr)->hdr.l2.id) {
5233 case QETH_HEADER_TYPE_LAYER2:
5234 skb_len = (*hdr)->hdr.l2.pkt_length;
5235 break;
5236 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5237 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5238 headroom = ETH_HLEN;
76b11f8e
UB		 5239 break;
5240 case QETH_HEADER_TYPE_OSN:
5241 skb_len = (*hdr)->hdr.osn.pdu_length;
5242 headroom = sizeof(struct qeth_hdr);
5243 break;
5244 default:
5245 break;
4a71df50
FB		 5246 }
5247
5248 if (!skb_len)
5249 return NULL;
5250
b3332930
FB		 5251 if (((skb_len >= card->options.rx_sg_cb) &&
5252 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5253 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5254 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5255 use_rx_sg = 1;
8d68af6a
JW		 5256
5257 if (use_rx_sg && qethbuffer->rx_skb) {
5258 /* QETH_CQ_ENABLED only: */
5259 skb = qethbuffer->rx_skb;
5260 qethbuffer->rx_skb = NULL;
4a71df50 5261 } else {
8d68af6a
JW		 5262 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5263
37cf05d2 5264 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5265 }
8d68af6a
JW		 5266 if (!skb)
5267 goto no_mem;
5268 if (headroom)
5269 skb_reserve(skb, headroom);
4a71df50
FB		 5270
5271 data_ptr = element->addr + offset;
5272 while (skb_len) {
5273 data_len = min(skb_len, (int)(element->length - offset));
5274 if (data_len) {
8d68af6a
JW		 5275 if (use_rx_sg)
5276 qeth_create_skb_frag(element, skb, offset,
5277 data_len);
5278 else
59ae1d12 5279 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5280 }
5281 skb_len -= data_len;
5282 if (skb_len) {
5283 if (qeth_is_last_sbale(element)) {
847a50fd 5284 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5285 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5286 dev_kfree_skb_any(skb);
5287 card->stats.rx_errors++;
5288 return NULL;
5289 }
5290 element++;
5291 offset = 0;
5292 data_ptr = element->addr;
5293 } else {
5294 offset += data_len;
5295 }
5296 }
5297 *__element = element;
5298 *__offset = offset;
5299 if (use_rx_sg && card->options.performance_stats) {
5300 card->perf_stats.sg_skbs_rx++;
5301 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5302 }
5303 return skb;
5304no_mem:
5305 if (net_ratelimit()) {
847a50fd 5306 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5307 }
5308 card->stats.rx_dropped++;
5309 return NULL;
5310}
5311EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5312
d73ef324
JW		 5313int qeth_poll(struct napi_struct *napi, int budget)
5314{
5315 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5316 int work_done = 0;
5317 struct qeth_qdio_buffer *buffer;
5318 int done;
5319 int new_budget = budget;
5320
5321 if (card->options.performance_stats) {
5322 card->perf_stats.inbound_cnt++;
5323 card->perf_stats.inbound_start_time = qeth_get_micros();
5324 }
5325
5326 while (1) {
5327 if (!card->rx.b_count) {
5328 card->rx.qdio_err = 0;
5329 card->rx.b_count = qdio_get_next_buffers(
5330 card->data.ccwdev, 0, &card->rx.b_index,
5331 &card->rx.qdio_err);
5332 if (card->rx.b_count <= 0) {
5333 card->rx.b_count = 0;
5334 break;
5335 }
5336 card->rx.b_element =
5337 &card->qdio.in_q->bufs[card->rx.b_index]
5338 .buffer->element[0];
5339 card->rx.e_offset = 0;
5340 }
5341
5342 while (card->rx.b_count) {
5343 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5344 if (!(card->rx.qdio_err &&
5345 qeth_check_qdio_errors(card, buffer->buffer,
5346 card->rx.qdio_err, "qinerr")))
5347 work_done +=
5348 card->discipline->process_rx_buffer(
5349 card, new_budget, &done);
5350 else
5351 done = 1;
5352
5353 if (done) {
5354 if (card->options.performance_stats)
5355 card->perf_stats.bufs_rec++;
5356 qeth_put_buffer_pool_entry(card,
5357 buffer->pool_entry);
5358 qeth_queue_input_buffer(card, card->rx.b_index);
5359 card->rx.b_count--;
5360 if (card->rx.b_count) {
5361 card->rx.b_index =
5362 (card->rx.b_index + 1) %
5363 QDIO_MAX_BUFFERS_PER_Q;
5364 card->rx.b_element =
5365 &card->qdio.in_q
5366 ->bufs[card->rx.b_index]
5367 .buffer->element[0];
5368 card->rx.e_offset = 0;
5369 }
5370 }
5371
5372 if (work_done >= budget)
5373 goto out;
5374 else
5375 new_budget = budget - work_done;
5376 }
5377 }
5378
978759e8 5379 napi_complete_done(napi, work_done);
d73ef324
JW		 5380 if (qdio_start_irq(card->data.ccwdev, 0))
5381 napi_schedule(&card->napi);
5382out:
5383 if (card->options.performance_stats)
5384 card->perf_stats.inbound_time += qeth_get_micros() -
5385 card->perf_stats.inbound_start_time;
5386 return work_done;
5387}
5388EXPORT_SYMBOL_GPL(qeth_poll);
5389
ad3cbf61
JW		 5390static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5391{
5392 if (!cmd->hdr.return_code)
5393 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5394 return cmd->hdr.return_code;
5395}
5396
4666d7fb
JW		 5397static int qeth_setassparms_get_caps_cb(struct qeth_card *card,
5398 struct qeth_reply *reply,
5399 unsigned long data)
5400{
5401 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
5402 struct qeth_ipa_caps *caps = reply->param;
5403
5404 if (qeth_setassparms_inspect_rc(cmd))
5405 return 0;
5406
5407 caps->supported = cmd->data.setassparms.data.caps.supported;
5408 caps->enabled = cmd->data.setassparms.data.caps.enabled;
5409 return 0;
5410}
5411
8f43fb00
TR		 5412int qeth_setassparms_cb(struct qeth_card *card,
5413 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5414{
5415 struct qeth_ipa_cmd *cmd;
5416
5417 QETH_CARD_TEXT(card, 4, "defadpcb");
5418
5419 cmd = (struct qeth_ipa_cmd *) data;
5420 if (cmd->hdr.return_code == 0) {
5421 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5422 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5423 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5424 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5425 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5426 }
4d7def2a
TR		 5427 return 0;
5428}
8f43fb00 5429EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5430
b475e316
TR		 5431struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5432 enum qeth_ipa_funcs ipa_func,
5433 __u16 cmd_code, __u16 len,
5434 enum qeth_prot_versions prot)
4d7def2a
TR		 5435{
5436 struct qeth_cmd_buffer *iob;
5437 struct qeth_ipa_cmd *cmd;
5438
5439 QETH_CARD_TEXT(card, 4, "getasscm");
5440 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5441
5442 if (iob) {
ff5caa7a 5443 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5444 cmd->data.setassparms.hdr.assist_no = ipa_func;
5445 cmd->data.setassparms.hdr.length = 8 + len;
5446 cmd->data.setassparms.hdr.command_code = cmd_code;
4d7def2a
TR		 5447 }
5448
5449 return iob;
5450}
b475e316 5451EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5452
5453int qeth_send_setassparms(struct qeth_card *card,
5454 struct qeth_cmd_buffer *iob, __u16 len, long data,
5455 int (*reply_cb)(struct qeth_card *,
5456 struct qeth_reply *, unsigned long),
5457 void *reply_param)
5458{
5459 int rc;
5460 struct qeth_ipa_cmd *cmd;
5461
5462 QETH_CARD_TEXT(card, 4, "sendassp");
5463
ff5caa7a 5464 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5465 if (len <= sizeof(__u32))
5466 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5467 else /* (len > sizeof(__u32)) */
5468 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5469
5470 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5471 return rc;
5472}
5473EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5474
a8155b00
KM		 5475int qeth_send_simple_setassparms_prot(struct qeth_card *card,
5476 enum qeth_ipa_funcs ipa_func,
5477 u16 cmd_code, long data,
5478 enum qeth_prot_versions prot)
4d7def2a
TR		 5479{
5480 int rc;
5481 int length = 0;
5482 struct qeth_cmd_buffer *iob;
5483
a8155b00 5484 QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
4d7def2a
TR		 5485 if (data)
5486 length = sizeof(__u32);
a8155b00 5487 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
4d7def2a
TR		 5488 if (!iob)
5489 return -ENOMEM;
5490 rc = qeth_send_setassparms(card, iob, length, data,
5491 qeth_setassparms_cb, NULL);
5492 return rc;
5493}
a8155b00 5494EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
4d7def2a 5495
4a71df50
FB		 5496static void qeth_unregister_dbf_views(void)
5497{
d11ba0c4
PT		 5498 int x;
5499 for (x = 0; x < QETH_DBF_INFOS; x++) {
5500 debug_unregister(qeth_dbf[x].id);
5501 qeth_dbf[x].id = NULL;
5502 }
4a71df50
FB		 5503}
5504
8e96c51c 5505void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5506{
5507 char dbf_txt_buf[32];
345aa66e 5508 va_list args;
cd023216 5509
8e6a8285 5510 if (!debug_level_enabled(id, level))
cd023216 5511 return;
345aa66e
PT		 5512 va_start(args, fmt);
5513 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5514 va_end(args);
8e96c51c 5515 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5516}
5517EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5518
4a71df50
FB		 5519static int qeth_register_dbf_views(void)
5520{
d11ba0c4
PT		 5521 int ret;
5522 int x;
5523
5524 for (x = 0; x < QETH_DBF_INFOS; x++) {
5525 /* register the areas */
5526 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5527 qeth_dbf[x].pages,
5528 qeth_dbf[x].areas,
5529 qeth_dbf[x].len);
5530 if (qeth_dbf[x].id == NULL) {
5531 qeth_unregister_dbf_views();
5532 return -ENOMEM;
5533 }
4a71df50 5534
d11ba0c4
PT		 5535 /* register a view */
5536 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5537 if (ret) {
5538 qeth_unregister_dbf_views();
5539 return ret;
5540 }
4a71df50 5541
d11ba0c4
PT		 5542 /* set a passing level */
5543 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5544 }
4a71df50
FB		 5545
5546 return 0;
5547}
5548
a70fee3b
JW		 5549static DEFINE_MUTEX(qeth_mod_mutex); /* for synchronized module loading */
5550
4a71df50
FB		 5551int qeth_core_load_discipline(struct qeth_card *card,
5552 enum qeth_discipline_id discipline)
5553{
2022e00c 5554 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5555 switch (discipline) {
5556 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5557 card->discipline = try_then_request_module(
5558 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5559 break;
5560 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5561 card->discipline = try_then_request_module(
5562 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5563 break;
c70eb09d
JW		 5564 default:
5565 break;
4a71df50 5566 }
a70fee3b 5567 mutex_unlock(&qeth_mod_mutex);
c70eb09d 5568
c041f2d4 5569 if (!card->discipline) {
74eacdb9
FB		 5570 dev_err(&card->gdev->dev, "There is no kernel module to "
5571 "support discipline %d\n", discipline);
a70fee3b 5572 return -EINVAL;
4a71df50 5573 }
a70fee3b 5574
c1a935f6 5575 card->options.layer = discipline;
a70fee3b 5576 return 0;
4a71df50
FB		 5577}
5578
5579void qeth_core_free_discipline(struct qeth_card *card)
5580{
4fda3354 5581 if (IS_LAYER2(card))
c041f2d4 5582 symbol_put(qeth_l2_discipline);
4a71df50 5583 else
c041f2d4 5584 symbol_put(qeth_l3_discipline);
c1a935f6 5585 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
c041f2d4 5586 card->discipline = NULL;
4a71df50
FB		 5587}
5588
2d2ebb3e 5589const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5590 .name = "qeth_generic",
5591 .groups = qeth_generic_attr_groups,
5592};
2d2ebb3e
JW		 5593EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5594
b7169c51
SO		 5595static const struct device_type qeth_osn_devtype = {
5596 .name = "qeth_osn",
5597 .groups = qeth_osn_attr_groups,
5598};
5599
819dc537
SR		 5600#define DBF_NAME_LEN 20
5601
5602struct qeth_dbf_entry {
5603 char dbf_name[DBF_NAME_LEN];
5604 debug_info_t *dbf_info;
5605 struct list_head dbf_list;
5606};
5607
5608static LIST_HEAD(qeth_dbf_list);
5609static DEFINE_MUTEX(qeth_dbf_list_mutex);
5610
5611static debug_info_t *qeth_get_dbf_entry(char *name)
5612{
5613 struct qeth_dbf_entry *entry;
5614 debug_info_t *rc = NULL;
5615
5616 mutex_lock(&qeth_dbf_list_mutex);
5617 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5618 if (strcmp(entry->dbf_name, name) == 0) {
5619 rc = entry->dbf_info;
5620 break;
5621 }
5622 }
5623 mutex_unlock(&qeth_dbf_list_mutex);
5624 return rc;
5625}
5626
5627static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5628{
5629 struct qeth_dbf_entry *new_entry;
5630
5631 card->debug = debug_register(name, 2, 1, 8);
5632 if (!card->debug) {
5633 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5634 goto err;
5635 }
5636 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5637 goto err_dbg;
5638 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5639 if (!new_entry)
5640 goto err_dbg;
5641 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5642 new_entry->dbf_info = card->debug;
5643 mutex_lock(&qeth_dbf_list_mutex);
5644 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5645 mutex_unlock(&qeth_dbf_list_mutex);
5646
5647 return 0;
5648
5649err_dbg:
5650 debug_unregister(card->debug);
5651err:
5652 return -ENOMEM;
5653}
5654
5655static void qeth_clear_dbf_list(void)
5656{
5657 struct qeth_dbf_entry *entry, *tmp;
5658
5659 mutex_lock(&qeth_dbf_list_mutex);
5660 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5661 list_del(&entry->dbf_list);
5662 debug_unregister(entry->dbf_info);
5663 kfree(entry);
5664 }
5665 mutex_unlock(&qeth_dbf_list_mutex);
5666}
5667
d3d1b205
JW		 5668static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
5669{
5670 struct net_device *dev;
5671
5672 switch (card->info.type) {
5673 case QETH_CARD_TYPE_IQD:
5674 dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
5675 break;
5676 case QETH_CARD_TYPE_OSN:
5677 dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
5678 break;
5679 default:
5680 dev = alloc_etherdev(0);
5681 }
5682
5683 if (!dev)
5684 return NULL;
5685
5686 dev->ml_priv = card;
5687 dev->watchdog_timeo = QETH_TX_TIMEOUT;
72f219da 5688 dev->min_mtu = IS_OSN(card) ? 64 : 576;
8ce7a9e0
JW		 5689 /* initialized when device first goes online: */
5690 dev->max_mtu = 0;
5691 dev->mtu = 0;
d3d1b205
JW		 5692 SET_NETDEV_DEV(dev, &card->gdev->dev);
5693 netif_carrier_off(dev);
5f89eca5
JW		 5694
5695 if (!IS_OSN(card)) {
5696 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
5697 dev->hw_features |= NETIF_F_SG;
5698 dev->vlan_features |= NETIF_F_SG;
04db741d
JW		 5699 if (IS_IQD(card))
5700 dev->features |= NETIF_F_SG;
5f89eca5
JW		 5701 }
5702
d3d1b205
JW		 5703 return dev;
5704}
5705
5706struct net_device *qeth_clone_netdev(struct net_device *orig)
5707{
5708 struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
5709
5710 if (!clone)
5711 return NULL;
5712
5713 clone->dev_port = orig->dev_port;
5714 return clone;
5715}
5716
4a71df50
FB		 5717static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5718{
5719 struct qeth_card *card;
5720 struct device *dev;
5721 int rc;
c70eb09d 5722 enum qeth_discipline_id enforced_disc;
819dc537 5723 char dbf_name[DBF_NAME_LEN];
4a71df50 5724
d11ba0c4 5725 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5726
5727 dev = &gdev->dev;
5728 if (!get_device(dev))
5729 return -ENODEV;
5730
2a0217d5 5731 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50 5732
121ca39a 5733 card = qeth_alloc_card(gdev);
4a71df50 5734 if (!card) {
d11ba0c4 5735 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5736 rc = -ENOMEM;
5737 goto err_dev;
5738 }
af039068
CO		 5739
5740 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5741 dev_name(&gdev->dev));
819dc537 5742 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5743 if (!card->debug) {
819dc537
SR		 5744 rc = qeth_add_dbf_entry(card, dbf_name);
5745 if (rc)
5746 goto err_card;
af039068 5747 }
af039068 5748
95f4d8b7
JW		 5749 qeth_setup_card(card);
5750 qeth_update_from_chp_desc(card);
4a71df50 5751
d3d1b205 5752 card->dev = qeth_alloc_netdev(card);
778b1ac7
JW		 5753 if (!card->dev) {
5754 rc = -ENOMEM;
d3d1b205 5755 goto err_card;
778b1ac7 5756 }
d3d1b205 5757
c70eb09d
JW		 5758 qeth_determine_capabilities(card);
5759 enforced_disc = qeth_enforce_discipline(card);
5760 switch (enforced_disc) {
5761 case QETH_DISCIPLINE_UNDETERMINED:
5762 gdev->dev.type = &qeth_generic_devtype;
5763 break;
5764 default:
5765 card->info.layer_enforced = true;
5766 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5767 if (rc)
d3d1b205 5768 goto err_load;
2d2ebb3e
JW		 5769
5770 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5771 ? card->discipline->devtype
5772 : &qeth_osn_devtype;
c041f2d4 5773 rc = card->discipline->setup(card->gdev);
4a71df50 5774 if (rc)
5113fec0 5775 goto err_disc;
2d2ebb3e 5776 break;
4a71df50
FB		 5777 }
5778
ed47155b 5779 write_lock_irq(&qeth_core_card_list.rwlock);
4a71df50 5780 list_add_tail(&card->list, &qeth_core_card_list.list);
ed47155b 5781 write_unlock_irq(&qeth_core_card_list.rwlock);
4a71df50
FB		 5782 return 0;
5783
5113fec0
UB		 5784err_disc:
5785 qeth_core_free_discipline(card);
d3d1b205
JW		 5786err_load:
5787 free_netdev(card->dev);
4a71df50
FB		 5788err_card:
5789 qeth_core_free_card(card);
5790err_dev:
5791 put_device(dev);
5792 return rc;
5793}
5794
5795static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5796{
4a71df50
FB		 5797 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5798
28a7e4c9 5799 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5800
c041f2d4
SO		 5801 if (card->discipline) {
5802 card->discipline->remove(gdev);
9dc48ccc
UB		 5803 qeth_core_free_discipline(card);
5804 }
5805
ed47155b 5806 write_lock_irq(&qeth_core_card_list.rwlock);
4a71df50 5807 list_del(&card->list);
ed47155b 5808 write_unlock_irq(&qeth_core_card_list.rwlock);
d3d1b205 5809 free_netdev(card->dev);
4a71df50 5810 qeth_core_free_card(card);
4a71df50 5811 put_device(&gdev->dev);
4a71df50
FB		 5812}
5813
5814static int qeth_core_set_online(struct ccwgroup_device *gdev)
5815{
5816 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5817 int rc = 0;
c70eb09d 5818 enum qeth_discipline_id def_discipline;
4a71df50 5819
c041f2d4 5820 if (!card->discipline) {
4a71df50
FB		 5821 if (card->info.type == QETH_CARD_TYPE_IQD)
5822 def_discipline = QETH_DISCIPLINE_LAYER3;
5823 else
5824 def_discipline = QETH_DISCIPLINE_LAYER2;
5825 rc = qeth_core_load_discipline(card, def_discipline);
5826 if (rc)
5827 goto err;
c041f2d4 5828 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5829 if (rc) {
5830 qeth_core_free_discipline(card);
4a71df50 5831 goto err;
9111e788 5832 }
4a71df50 5833 }
c041f2d4 5834 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5835err:
5836 return rc;
5837}
5838
5839static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5840{
5841 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5842 return card->discipline->set_offline(gdev);
4a71df50
FB		 5843}
5844
5845static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5846{
5847 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5848 qeth_set_allowed_threads(card, 0, 1);
5849 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5850 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5851 qeth_qdio_clear_card(card, 0);
5852 qeth_clear_qdio_buffers(card);
5853 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5854}
5855
bbcfcdc8
FB		 5856static int qeth_core_freeze(struct ccwgroup_device *gdev)
5857{
5858 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5859 if (card->discipline && card->discipline->freeze)
5860 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5861 return 0;
5862}
5863
5864static int qeth_core_thaw(struct ccwgroup_device *gdev)
5865{
5866 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5867 if (card->discipline && card->discipline->thaw)
5868 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5869 return 0;
5870}
5871
5872static int qeth_core_restore(struct ccwgroup_device *gdev)
5873{
5874 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5875 if (card->discipline && card->discipline->restore)
5876 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5877 return 0;
5878}
5879
36369569
GKH		 5880static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5881 size_t count)
4a71df50
FB		 5882{
5883 int err;
4a71df50 5884
6d8769ab
JW		 5885 err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
5886 buf);
b7169c51
SO		 5887
5888 return err ? err : count;
5889}
36369569 5890static DRIVER_ATTR_WO(group);
4a71df50 5891
f47e2256
SO		 5892static struct attribute *qeth_drv_attrs[] = {
5893 &driver_attr_group.attr,
5894 NULL,
5895};
5896static struct attribute_group qeth_drv_attr_group = {
5897 .attrs = qeth_drv_attrs,
5898};
5899static const struct attribute_group *qeth_drv_attr_groups[] = {
5900 &qeth_drv_attr_group,
5901 NULL,
5902};
5903
6d8769ab
JW		 5904static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5905 .driver = {
5906 .groups = qeth_drv_attr_groups,
5907 .owner = THIS_MODULE,
5908 .name = "qeth",
5909 },
5910 .ccw_driver = &qeth_ccw_driver,
5911 .setup = qeth_core_probe_device,
5912 .remove = qeth_core_remove_device,
5913 .set_online = qeth_core_set_online,
5914 .set_offline = qeth_core_set_offline,
5915 .shutdown = qeth_core_shutdown,
5916 .prepare = NULL,
5917 .complete = NULL,
5918 .freeze = qeth_core_freeze,
5919 .thaw = qeth_core_thaw,
5920 .restore = qeth_core_restore,
5921};
5922
942d6984
JW		 5923int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5924{
5925 struct qeth_card *card = dev->ml_priv;
5926 struct mii_ioctl_data *mii_data;
5927 int rc = 0;
5928
5929 if (!card)
5930 return -ENODEV;
5931
5932 if (!qeth_card_hw_is_reachable(card))
5933 return -ENODEV;
5934
5935 if (card->info.type == QETH_CARD_TYPE_OSN)
5936 return -EPERM;
5937
5938 switch (cmd) {
5939 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5940 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5941 break;
5942 case SIOC_QETH_GET_CARD_TYPE:
5943 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5944 card->info.type == QETH_CARD_TYPE_OSM ||
5945 card->info.type == QETH_CARD_TYPE_OSX) &&
5946 !card->info.guestlan)
5947 return 1;
5948 else
5949 return 0;
5950 case SIOCGMIIPHY:
5951 mii_data = if_mii(rq);
5952 mii_data->phy_id = 0;
5953 break;
5954 case SIOCGMIIREG:
5955 mii_data = if_mii(rq);
5956 if (mii_data->phy_id != 0)
5957 rc = -EINVAL;
5958 else
5959 mii_data->val_out = qeth_mdio_read(dev,
5960 mii_data->phy_id, mii_data->reg_num);
5961 break;
5962 case SIOC_QETH_QUERY_OAT:
5963 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5964 break;
5965 default:
5966 if (card->discipline->do_ioctl)
5967 rc = card->discipline->do_ioctl(dev, rq, cmd);
5968 else
5969 rc = -EOPNOTSUPP;
5970 }
5971 if (rc)
5972 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5973 return rc;
5974}
5975EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5976
4a71df50
FB		 5977static struct {
5978 const char str[ETH_GSTRING_LEN];
5979} qeth_ethtool_stats_keys[] = {
5980/* 0 */{"rx skbs"},
5981 {"rx buffers"},
5982 {"tx skbs"},
5983 {"tx buffers"},
5984 {"tx skbs no packing"},
5985 {"tx buffers no packing"},
5986 {"tx skbs packing"},
5987 {"tx buffers packing"},
5988 {"tx sg skbs"},
d2a274b2 5989 {"tx buffer elements"},
4a71df50
FB		 5990/* 10 */{"rx sg skbs"},
5991 {"rx sg frags"},
5992 {"rx sg page allocs"},
5993 {"tx large kbytes"},
5994 {"tx large count"},
5995 {"tx pk state ch n->p"},
5996 {"tx pk state ch p->n"},
5997 {"tx pk watermark low"},
5998 {"tx pk watermark high"},
5999 {"queue 0 buffer usage"},
6000/* 20 */{"queue 1 buffer usage"},
6001 {"queue 2 buffer usage"},
6002 {"queue 3 buffer usage"},
a1c3ed4c
FB		 6003 {"rx poll time"},
6004 {"rx poll count"},
4a71df50
FB		 6005 {"rx do_QDIO time"},
6006 {"rx do_QDIO count"},
6007 {"tx handler time"},
6008 {"tx handler count"},
6009 {"tx time"},
6010/* 30 */{"tx count"},
6011 {"tx do_QDIO time"},
6012 {"tx do_QDIO count"},
f61a0d05 6013 {"tx csum"},
c3b4a740 6014 {"tx lin"},
6059c905 6015 {"tx linfail"},
0da9581d 6016 {"cq handler count"},
3aade31b
KM		 6017 {"cq handler time"},
6018 {"rx csum"}
4a71df50
FB		 6019};
6020
df8b4ec8 6021int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 6022{
df8b4ec8
BH		 6023 switch (stringset) {
6024 case ETH_SS_STATS:
6025 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
6026 default:
6027 return -EINVAL;
6028 }
4a71df50 6029}
df8b4ec8 6030EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 6031
6032void qeth_core_get_ethtool_stats(struct net_device *dev,
6033 struct ethtool_stats *stats, u64 *data)
6034{
509e2562 6035 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 6036 data[0] = card->stats.rx_packets -
6037 card->perf_stats.initial_rx_packets;
6038 data[1] = card->perf_stats.bufs_rec;
6039 data[2] = card->stats.tx_packets -
6040 card->perf_stats.initial_tx_packets;
6041 data[3] = card->perf_stats.bufs_sent;
6042 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6043 - card->perf_stats.skbs_sent_pack;
6044 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6045 data[6] = card->perf_stats.skbs_sent_pack;
6046 data[7] = card->perf_stats.bufs_sent_pack;
6047 data[8] = card->perf_stats.sg_skbs_sent;
d2a274b2 6048 data[9] = card->perf_stats.buf_elements_sent;
4a71df50
FB		 6049 data[10] = card->perf_stats.sg_skbs_rx;
6050 data[11] = card->perf_stats.sg_frags_rx;
6051 data[12] = card->perf_stats.sg_alloc_page_rx;
6052 data[13] = (card->perf_stats.large_send_bytes >> 10);
6053 data[14] = card->perf_stats.large_send_cnt;
6054 data[15] = card->perf_stats.sc_dp_p;
6055 data[16] = card->perf_stats.sc_p_dp;
6056 data[17] = QETH_LOW_WATERMARK_PACK;
6057 data[18] = QETH_HIGH_WATERMARK_PACK;
6058 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6059 data[20] = (card->qdio.no_out_queues > 1) ?
6060 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6061 data[21] = (card->qdio.no_out_queues > 2) ?
6062 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6063 data[22] = (card->qdio.no_out_queues > 3) ?
6064 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6065 data[23] = card->perf_stats.inbound_time;
6066 data[24] = card->perf_stats.inbound_cnt;
6067 data[25] = card->perf_stats.inbound_do_qdio_time;
6068 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6069 data[27] = card->perf_stats.outbound_handler_time;
6070 data[28] = card->perf_stats.outbound_handler_cnt;
6071 data[29] = card->perf_stats.outbound_time;
6072 data[30] = card->perf_stats.outbound_cnt;
6073 data[31] = card->perf_stats.outbound_do_qdio_time;
6074 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6075 data[33] = card->perf_stats.tx_csum;
c3b4a740 6076 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6077 data[35] = card->perf_stats.tx_linfail;
6078 data[36] = card->perf_stats.cq_cnt;
6079 data[37] = card->perf_stats.cq_time;
3aade31b 6080 data[38] = card->perf_stats.rx_csum;
4a71df50
FB		 6081}
6082EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6083
6084void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6085{
6086 switch (stringset) {
6087 case ETH_SS_STATS:
6088 memcpy(data, &qeth_ethtool_stats_keys,
6089 sizeof(qeth_ethtool_stats_keys));
6090 break;
6091 default:
6092 WARN_ON(1);
6093 break;
6094 }
6095}
6096EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6097
6098void qeth_core_get_drvinfo(struct net_device *dev,
6099 struct ethtool_drvinfo *info)
6100{
509e2562 6101 struct qeth_card *card = dev->ml_priv;
7826d43f 6102
4fda3354 6103 strlcpy(info->driver, IS_LAYER2(card) ? "qeth_l2" : "qeth_l3",
7826d43f
JP		 6104 sizeof(info->driver));
6105 strlcpy(info->version, "1.0", sizeof(info->version));
6106 strlcpy(info->fw_version, card->info.mcl_level,
6107 sizeof(info->fw_version));
6108 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6109 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6110}
6111EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6112
774afb8e
JW		 6113/* Helper function to fill 'advertising' and 'supported' which are the same. */
6114/* Autoneg and full-duplex are supported and advertised unconditionally. */
6115/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6116/* specified port type. */
993e19c0 6117static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6118 int maxspeed, int porttype)
6119{
41fc3b65
JW		 6120 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6121 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6122 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6123
41fc3b65
JW		 6124 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6125 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6126
6127 switch (porttype) {
6128 case PORT_TP:
41fc3b65
JW		 6129 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6130 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6131 break;
6132 case PORT_FIBRE:
41fc3b65
JW		 6133 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6134 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6135 break;
6136 default:
41fc3b65
JW		 6137 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6138 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6139 WARN_ON_ONCE(1);
6140 }
6141
774afb8e 6142 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6143 switch (maxspeed) {
6144 case SPEED_10000:
41fc3b65
JW		 6145 ethtool_link_ksettings_add_link_mode(cmd, supported,
6146 10000baseT_Full);
6147 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6148 10000baseT_Full);
02d5cb5b 6149 case SPEED_1000:
41fc3b65
JW		 6150 ethtool_link_ksettings_add_link_mode(cmd, supported,
6151 1000baseT_Full);
6152 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6153 1000baseT_Full);
6154 ethtool_link_ksettings_add_link_mode(cmd, supported,
6155 1000baseT_Half);
6156 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6157 1000baseT_Half);
02d5cb5b 6158 case SPEED_100:
41fc3b65
JW		 6159 ethtool_link_ksettings_add_link_mode(cmd, supported,
6160 100baseT_Full);
6161 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6162 100baseT_Full);
6163 ethtool_link_ksettings_add_link_mode(cmd, supported,
6164 100baseT_Half);
6165 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6166 100baseT_Half);
02d5cb5b 6167 case SPEED_10:
41fc3b65
JW		 6168 ethtool_link_ksettings_add_link_mode(cmd, supported,
6169 10baseT_Full);
6170 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6171 10baseT_Full);
6172 ethtool_link_ksettings_add_link_mode(cmd, supported,
6173 10baseT_Half);
6174 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6175 10baseT_Half);
774afb8e
JW		 6176 /* end fallthrough */
6177 break;
02d5cb5b 6178 default:
41fc3b65
JW		 6179 ethtool_link_ksettings_add_link_mode(cmd, supported,
6180 10baseT_Full);
6181 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6182 10baseT_Full);
6183 ethtool_link_ksettings_add_link_mode(cmd, supported,
6184 10baseT_Half);
6185 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6186 10baseT_Half);
02d5cb5b
EC		 6187 WARN_ON_ONCE(1);
6188 }
02d5cb5b
EC		 6189}
6190
993e19c0
JW		 6191int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6192 struct ethtool_link_ksettings *cmd)
3f9975aa 6193{
509e2562 6194 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6195 enum qeth_link_types link_type;
02d5cb5b 6196 struct carrier_info carrier_info;
511c2445 6197 int rc;
3f9975aa
FB		 6198
6199 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6200 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6201 else
6202 link_type = card->info.link_type;
6203
993e19c0
JW		 6204 cmd->base.duplex = DUPLEX_FULL;
6205 cmd->base.autoneg = AUTONEG_ENABLE;
6206 cmd->base.phy_address = 0;
6207 cmd->base.mdio_support = 0;
6208 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6209 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6210
6211 switch (link_type) {
6212 case QETH_LINK_TYPE_FAST_ETH:
6213 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6214 cmd->base.speed = SPEED_100;
6215 cmd->base.port = PORT_TP;
3f9975aa 6216 break;
3f9975aa
FB		 6217 case QETH_LINK_TYPE_GBIT_ETH:
6218 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6219 cmd->base.speed = SPEED_1000;
6220 cmd->base.port = PORT_FIBRE;
3f9975aa 6221 break;
3f9975aa 6222 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6223 cmd->base.speed = SPEED_10000;
6224 cmd->base.port = PORT_FIBRE;
3f9975aa 6225 break;
3f9975aa 6226 default:
993e19c0
JW		 6227 cmd->base.speed = SPEED_10;
6228 cmd->base.port = PORT_TP;
3f9975aa 6229 }
993e19c0 6230 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6231
02d5cb5b
EC		 6232 /* Check if we can obtain more accurate information. */
6233 /* If QUERY_CARD_INFO command is not supported or fails, */
6234 /* just return the heuristics that was filled above. */
511c2445
EC		 6235 if (!qeth_card_hw_is_reachable(card))
6236 return -ENODEV;
6237 rc = qeth_query_card_info(card, &carrier_info);
6238 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6239 return 0;
511c2445
EC		 6240 if (rc) /* report error from the hardware operation */
6241 return rc;
6242 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6243
6244 netdev_dbg(netdev,
6245 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6246 carrier_info.card_type,
6247 carrier_info.port_mode,
6248 carrier_info.port_speed);
6249
6250 /* Update attributes for which we've obtained more authoritative */
6251 /* information, leave the rest the way they where filled above. */
6252 switch (carrier_info.card_type) {
6253 case CARD_INFO_TYPE_1G_COPPER_A:
6254 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6255 cmd->base.port = PORT_TP;
6256 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6257 break;
6258 case CARD_INFO_TYPE_1G_FIBRE_A:
6259 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6260 cmd->base.port = PORT_FIBRE;
6261 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6262 break;
6263 case CARD_INFO_TYPE_10G_FIBRE_A:
6264 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6265 cmd->base.port = PORT_FIBRE;
6266 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6267 break;
6268 }
6269
6270 switch (carrier_info.port_mode) {
6271 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6272 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6273 break;
6274 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6275 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6276 break;
6277 }
6278
6279 switch (carrier_info.port_speed) {
6280 case CARD_INFO_PORTS_10M:
993e19c0 6281 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6282 break;
6283 case CARD_INFO_PORTS_100M:
993e19c0 6284 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6285 break;
6286 case CARD_INFO_PORTS_1G:
993e19c0 6287 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6288 break;
6289 case CARD_INFO_PORTS_10G:
993e19c0 6290 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6291 break;
6292 }
6293
3f9975aa
FB		 6294 return 0;
6295}
993e19c0 6296EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6297
c9475369
TR		 6298/* Callback to handle checksum offload command reply from OSA card.
6299 * Verify that required features have been enabled on the card.
6300 * Return error in hdr->return_code as this value is checked by caller.
6301 *
6302 * Always returns zero to indicate no further messages from the OSA card.
6303 */
6304static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6305 struct qeth_reply *reply,
6306 unsigned long data)
6307{
6308 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6309 struct qeth_checksum_cmd *chksum_cb =
6310 (struct qeth_checksum_cmd *)reply->param;
6311
6312 QETH_CARD_TEXT(card, 4, "chkdoccb");
ad3cbf61 6313 if (qeth_setassparms_inspect_rc(cmd))
c9475369
TR		 6314 return 0;
6315
6316 memset(chksum_cb, 0, sizeof(*chksum_cb));
6317 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6318 chksum_cb->supported =
6319 cmd->data.setassparms.data.chksum.supported;
6320 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6321 }
6322 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6323 chksum_cb->supported =
6324 cmd->data.setassparms.data.chksum.supported;
6325 chksum_cb->enabled =
6326 cmd->data.setassparms.data.chksum.enabled;
6327 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6328 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6329 }
6330 return 0;
6331}
6332
6333/* Send command to OSA card and check results. */
6334static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6335 enum qeth_ipa_funcs ipa_func,
6336 __u16 cmd_code, long data,
a8155b00
KM		 6337 struct qeth_checksum_cmd *chksum_cb,
6338 enum qeth_prot_versions prot)
c9475369
TR		 6339{
6340 struct qeth_cmd_buffer *iob;
6341 int rc = -ENOMEM;
6342
6343 QETH_CARD_TEXT(card, 4, "chkdocmd");
6344 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
a8155b00 6345 sizeof(__u32), prot);
c9475369
TR		 6346 if (iob)
6347 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6348 qeth_ipa_checksum_run_cmd_cb,
6349 chksum_cb);
6350 return rc;
6351}
6352
a8155b00
KM		 6353static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
6354 enum qeth_prot_versions prot)
4d7def2a 6355{
571f9dd8 6356 u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
c9475369 6357 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6358 int rc;
6359
571f9dd8
KM		 6360 if (prot == QETH_PROT_IPV4)
6361 required_features |= QETH_IPA_CHECKSUM_IP_HDR;
c9475369 6362 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
a8155b00 6363 &chksum_cb, prot);
f9d8e6dc
TR		 6364 if (!rc) {
6365 if ((required_features & chksum_cb.supported) !=
6366 required_features)
6367 rc = -EIO;
dae84c8e
TR		 6368 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6369 cstype == IPA_INBOUND_CHECKSUM)
6370 dev_warn(&card->gdev->dev,
6371 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6372 QETH_CARD_IFNAME(card));
f9d8e6dc 6373 }
4d7def2a 6374 if (rc) {
a8155b00
KM		 6375 qeth_send_simple_setassparms_prot(card, cstype,
6376 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6377 dev_warn(&card->gdev->dev,
a8155b00
KM		 6378 "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
6379 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6380 return rc;
6381 }
c9475369 6382 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
a8155b00
KM		 6383 chksum_cb.supported, &chksum_cb,
6384 prot);
f9d8e6dc
TR		 6385 if (!rc) {
6386 if ((required_features & chksum_cb.enabled) !=
6387 required_features)
6388 rc = -EIO;
6389 }
4d7def2a 6390 if (rc) {
a8155b00
KM		 6391 qeth_send_simple_setassparms_prot(card, cstype,
6392 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6393 dev_warn(&card->gdev->dev,
a8155b00
KM		 6394 "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
6395 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6396 return rc;
6397 }
8f43fb00 6398
a8155b00
KM		 6399 dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
6400 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
4d7def2a
TR		 6401 return 0;
6402}
6403
a8155b00
KM		 6404static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
6405 enum qeth_prot_versions prot)
4d7def2a 6406{
a8155b00
KM		 6407 int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
6408 : qeth_send_simple_setassparms_prot(card, cstype,
6409 IPA_CMD_ASS_STOP, 0,
6410 prot);
c9475369 6411 return rc ? -EIO : 0;
4d7def2a 6412}
4d7def2a 6413
4666d7fb
JW		 6414static int qeth_start_tso_cb(struct qeth_card *card, struct qeth_reply *reply,
6415 unsigned long data)
6416{
6417 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6418 struct qeth_tso_start_data *tso_data = reply->param;
6419
6420 if (qeth_setassparms_inspect_rc(cmd))
6421 return 0;
6422
6423 tso_data->mss = cmd->data.setassparms.data.tso.mss;
6424 tso_data->supported = cmd->data.setassparms.data.tso.supported;
6425 return 0;
6426}
6427
1f83b817
JW		 6428static int qeth_set_tso_off(struct qeth_card *card,
6429 enum qeth_prot_versions prot)
4d7def2a 6430{
1f83b817
JW		 6431 return qeth_send_simple_setassparms_prot(card, IPA_OUTBOUND_TSO,
6432 IPA_CMD_ASS_STOP, 0, prot);
6433}
4d7def2a 6434
1f83b817
JW		 6435static int qeth_set_tso_on(struct qeth_card *card,
6436 enum qeth_prot_versions prot)
6437{
4666d7fb
JW		 6438 struct qeth_tso_start_data tso_data;
6439 struct qeth_cmd_buffer *iob;
6440 struct qeth_ipa_caps caps;
6441 int rc;
6442
6443 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6444 IPA_CMD_ASS_START, 0, prot);
6445 if (!iob)
6446 return -ENOMEM;
6447
6448 rc = qeth_send_setassparms(card, iob, 0, 0 /* unused */,
6449 qeth_start_tso_cb, &tso_data);
6450 if (rc)
6451 return rc;
6452
6453 if (!tso_data.mss || !(tso_data.supported & QETH_IPA_LARGE_SEND_TCP)) {
6454 qeth_set_tso_off(card, prot);
6455 return -EOPNOTSUPP;
6456 }
6457
6458 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6459 IPA_CMD_ASS_ENABLE, sizeof(caps), prot);
6460 if (!iob) {
6461 qeth_set_tso_off(card, prot);
6462 return -ENOMEM;
6463 }
6464
6465 /* enable TSO capability */
6466 caps.supported = 0;
6467 caps.enabled = QETH_IPA_LARGE_SEND_TCP;
6468 rc = qeth_send_setassparms(card, iob, sizeof(caps), (long) &caps,
6469 qeth_setassparms_get_caps_cb, &caps);
6470 if (rc) {
6471 qeth_set_tso_off(card, prot);
6472 return rc;
6473 }
6474
6475 if (!qeth_ipa_caps_supported(&caps, QETH_IPA_LARGE_SEND_TCP) ||
6476 !qeth_ipa_caps_enabled(&caps, QETH_IPA_LARGE_SEND_TCP)) {
6477 qeth_set_tso_off(card, prot);
6478 return -EOPNOTSUPP;
6479 }
6480
6481 dev_info(&card->gdev->dev, "TSOv%u enabled (MSS: %u)\n", prot,
6482 tso_data.mss);
6483 return 0;
1f83b817 6484}
4d7def2a 6485
1f83b817
JW		 6486static int qeth_set_ipa_tso(struct qeth_card *card, bool on,
6487 enum qeth_prot_versions prot)
6488{
6489 int rc = on ? qeth_set_tso_on(card, prot) :
6490 qeth_set_tso_off(card, prot);
6491
6492 return rc ? -EIO : 0;
4d7def2a 6493}
8f43fb00 6494
d7e6ed97
KM		 6495static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
6496{
6497 int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
6498 int rc_ipv6;
6499
6500 if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6501 rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6502 QETH_PROT_IPV4);
6503 if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
6504 /* no/one Offload Assist available, so the rc is trivial */
6505 return rc_ipv4;
ce344356 6506
d7e6ed97
KM		 6507 rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6508 QETH_PROT_IPV6);
6509
6510 if (on)
6511 /* enable: success if any Assist is active */
6512 return (rc_ipv6) ? rc_ipv4 : 0;
6513
6514 /* disable: failure if any Assist is still active */
6515 return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
6516}
6517
571f9dd8
KM		 6518#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
6519 NETIF_F_IPV6_CSUM)
ce344356 6520/**
d025da9e
JW		 6521 * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
6522 * @dev: a net_device
ce344356 6523 */
d025da9e 6524void qeth_enable_hw_features(struct net_device *dev)
e830baa9
HW		 6525{
6526 struct qeth_card *card = dev->ml_priv;
d025da9e 6527 netdev_features_t features;
e830baa9 6528
d025da9e
JW		 6529 rtnl_lock();
6530 features = dev->features;
ce344356
JW		 6531 /* force-off any feature that needs an IPA sequence.
6532 * netdev_update_features() will restart them.
6533 */
6534 dev->features &= ~QETH_HW_FEATURES;
6535 netdev_update_features(dev);
d025da9e
JW		 6536 if (features != dev->features)
6537 dev_warn(&card->gdev->dev,
6538 "Device recovery failed to restore all offload features\n");
6539 rtnl_unlock();
e830baa9 6540}
d025da9e 6541EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
e830baa9 6542
8f43fb00
TR		 6543int qeth_set_features(struct net_device *dev, netdev_features_t features)
6544{
6545 struct qeth_card *card = dev->ml_priv;
6c7cd712 6546 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6547 int rc = 0;
6548
6549 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6550 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6551
6c7cd712 6552 if ((changed & NETIF_F_IP_CSUM)) {
a8155b00
KM		 6553 rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
6554 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
6c7cd712
HW		 6555 if (rc)
6556 changed ^= NETIF_F_IP_CSUM;
6557 }
571f9dd8
KM		 6558 if (changed & NETIF_F_IPV6_CSUM) {
6559 rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
6560 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
6561 if (rc)
6562 changed ^= NETIF_F_IPV6_CSUM;
6563 }
d7e6ed97
KM		 6564 if (changed & NETIF_F_RXCSUM) {
6565 rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
6c7cd712
HW		 6566 if (rc)
6567 changed ^= NETIF_F_RXCSUM;
6568 }
1f83b817
JW		 6569 if (changed & NETIF_F_TSO) {
6570 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO,
6571 QETH_PROT_IPV4);
6c7cd712
HW		 6572 if (rc)
6573 changed ^= NETIF_F_TSO;
6574 }
6575
6576 /* everything changed successfully? */
6577 if ((dev->features ^ features) == changed)
6578 return 0;
6579 /* something went wrong. save changed features and return error */
6580 dev->features ^= changed;
6581 return -EIO;
8f43fb00
TR		 6582}
6583EXPORT_SYMBOL_GPL(qeth_set_features);
6584
6585netdev_features_t qeth_fix_features(struct net_device *dev,
6586 netdev_features_t features)
6587{
6588 struct qeth_card *card = dev->ml_priv;
6589
6590 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6591 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6592 features &= ~NETIF_F_IP_CSUM;
571f9dd8
KM		 6593 if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
6594 features &= ~NETIF_F_IPV6_CSUM;
d7e6ed97
KM		 6595 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
6596 !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
8f43fb00 6597 features &= ~NETIF_F_RXCSUM;
cf536ffe 6598 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6599 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6600 /* if the card isn't up, remove features that require hw changes */
6601 if (card->state == CARD_STATE_DOWN ||
6602 card->state == CARD_STATE_RECOVER)
ce344356 6603 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6604 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6605 return features;
6606}
6607EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6608
6d69b1f1
JW		 6609netdev_features_t qeth_features_check(struct sk_buff *skb,
6610 struct net_device *dev,
6611 netdev_features_t features)
6612{
6613 /* GSO segmentation builds skbs with
6614 * a (small) linear part for the headers, and
6615 * page frags for the data.
6616 * Compared to a linear skb, the header-only part consumes an
6617 * additional buffer element. This reduces buffer utilization, and
6618 * hurts throughput. So compress small segments into one element.
6619 */
6620 if (netif_needs_gso(skb, features)) {
6621 /* match skb_segment(): */
6622 unsigned int doffset = skb->data - skb_mac_header(skb);
6623 unsigned int hsize = skb_shinfo(skb)->gso_size;
6624 unsigned int hroom = skb_headroom(skb);
6625
6626 /* linearize only if resulting skb allocations are order-0: */
6627 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6628 features &= ~NETIF_F_SG;
6629 }
6630
6631 return vlan_features_check(skb, features);
6632}
6633EXPORT_SYMBOL_GPL(qeth_features_check);
6634
4a71df50
FB		 6635static int __init qeth_core_init(void)
6636{
6637 int rc;
6638
74eacdb9 6639 pr_info("loading core functions\n");
4a71df50
FB		 6640 INIT_LIST_HEAD(&qeth_core_card_list.list);
6641 rwlock_init(&qeth_core_card_list.rwlock);
6642
0f54761d 6643 qeth_wq = create_singlethread_workqueue("qeth_wq");
a936b1ef
JW		 6644 if (!qeth_wq) {
6645 rc = -ENOMEM;
6646 goto out_err;
6647 }
0f54761d 6648
4a71df50
FB		 6649 rc = qeth_register_dbf_views();
6650 if (rc)
a936b1ef 6651 goto dbf_err;
035da16f 6652 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6653 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6654 if (rc)
6655 goto register_err;
55494264
JW		 6656 qeth_core_header_cache =
6657 kmem_cache_create("qeth_hdr", QETH_HDR_CACHE_OBJ_SIZE,
6658 roundup_pow_of_two(QETH_HDR_CACHE_OBJ_SIZE),
6659 0, NULL);
683d718a
FB		 6660 if (!qeth_core_header_cache) {
6661 rc = -ENOMEM;
6662 goto slab_err;
6663 }
0da9581d
EL		 6664 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6665 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6666 if (!qeth_qdio_outbuf_cache) {
6667 rc = -ENOMEM;
6668 goto cqslab_err;
6669 }
afb6ac59
SO		 6670 rc = ccw_driver_register(&qeth_ccw_driver);
6671 if (rc)
6672 goto ccw_err;
afb6ac59
SO		 6673 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6674 if (rc)
6675 goto ccwgroup_err;
0da9581d 6676
683d718a 6677 return 0;
afb6ac59
SO		 6678
6679ccwgroup_err:
6680 ccw_driver_unregister(&qeth_ccw_driver);
6681ccw_err:
6682 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6683cqslab_err:
6684 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6685slab_err:
035da16f 6686 root_device_unregister(qeth_core_root_dev);
4a71df50 6687register_err:
4a71df50 6688 qeth_unregister_dbf_views();
a936b1ef
JW		 6689dbf_err:
6690 destroy_workqueue(qeth_wq);
4a71df50 6691out_err:
74eacdb9 6692 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6693 return rc;
6694}
6695
6696static void __exit qeth_core_exit(void)
6697{
819dc537 6698 qeth_clear_dbf_list();
0f54761d 6699 destroy_workqueue(qeth_wq);
4a71df50
FB		 6700 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6701 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6702 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6703 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6704 root_device_unregister(qeth_core_root_dev);
4a71df50 6705 qeth_unregister_dbf_views();
74eacdb9 6706 pr_info("core functions removed\n");
4a71df50
FB		 6707}
6708
6709module_init(qeth_core_init);
6710module_exit(qeth_core_exit);
6711MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6712MODULE_DESCRIPTION("qeth core functions");
6713MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git