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[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
b3332930 24#include <net/iucv/af_iucv.h>
4a71df50 25
ab4227cb
MS		 26#include <asm/ebcdic.h>
27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
4a71df50
FB		 29
30#include "qeth_core.h"
4a71df50 31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 37 [QETH_DBF_MSG] = {"qeth_msg",
38 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 39 [QETH_DBF_CTRL] = {"qeth_control",
40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
41};
42EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 43
44struct qeth_card_list_struct qeth_core_card_list;
45EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 46struct kmem_cache *qeth_core_header_cache;
47EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 48static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 49
50static struct device *qeth_core_root_dev;
5113fec0 51static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 52static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 53
54static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56static int qeth_issue_next_read(struct qeth_card *);
57static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59static void qeth_free_buffer_pool(struct qeth_card *);
60static int qeth_qdio_establish(struct qeth_card *);
0da9581d 61static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 62static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 66static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
72861ae7 69static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 70
4a71df50
FB		 71static inline const char *qeth_get_cardname(struct qeth_card *card)
72{
73 if (card->info.guestlan) {
74 switch (card->info.type) {
5113fec0 75 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 76 return " Guest LAN QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Guest LAN Hiper";
5113fec0
UB		 79 case QETH_CARD_TYPE_OSM:
80 return " Guest LAN QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Guest LAN QDIO - OSX";
4a71df50
FB		 83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
5113fec0 88 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
5113fec0
UB		 94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
4a71df50
FB		 98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103}
104
105/* max length to be returned: 14 */
106const char *qeth_get_cardname_short(struct qeth_card *card)
107{
108 if (card->info.guestlan) {
109 switch (card->info.type) {
5113fec0 110 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 111 return "GuestLAN QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "GuestLAN Hiper";
5113fec0
UB		 114 case QETH_CARD_TYPE_OSM:
115 return "GuestLAN OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "GuestLAN OSX";
4a71df50
FB		 118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
5113fec0 123 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
5113fec0
UB		 148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
4a71df50
FB		 152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157}
158
159void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161{
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170}
171EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174{
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182}
183EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186{
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189}
190EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192void qeth_clear_working_pool_list(struct qeth_card *card)
193{
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
847a50fd 196 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201}
202EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204static int qeth_alloc_buffer_pool(struct qeth_card *card)
205{
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
847a50fd 210 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 218 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233}
234
235int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236{
847a50fd 237 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249}
76b11f8e 250EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 251
0da9581d
EL		 252static inline int qeth_cq_init(struct qeth_card *card)
253{
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270out:
271 return rc;
272}
273
274static inline int qeth_alloc_cq(struct qeth_card *card)
275{
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318out:
319 return rc;
320free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326}
327
328static inline void qeth_free_cq(struct qeth_card *card)
329{
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337}
338
b3332930
FB		 339static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361}
362
0da9581d
EL		 363static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365{
72861ae7
EL		 366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
0da9581d
EL		 369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
0da9581d
EL		 385 c = f->next_pending;
386 BUG_ON(head->next_pending != f);
387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
72861ae7
EL		 396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
0da9581d
EL		 403}
404
405
406static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
b3332930 410 enum iucv_tx_notify notification;
0da9581d
EL		 411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
418 BUG_ON(buffer == NULL);
419
b3332930
FB		 420 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
421 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
422 notification = TX_NOTIFY_OK;
423 } else {
424 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
b3332930
FB		 425 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
426 notification = TX_NOTIFY_DELAYED_OK;
427 }
428
429 if (aob->aorc != 0) {
430 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
431 notification = qeth_compute_cq_notification(aob->aorc, 1);
432 }
433 qeth_notify_skbs(buffer->q, buffer, notification);
434
0da9581d
EL		 435 buffer->aob = NULL;
436 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 437 QETH_QDIO_BUF_HANDLED_DELAYED);
438
0da9581d
EL		 439 /* from here on: do not touch buffer anymore */
440 qdio_release_aob(aob);
441}
442
443static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
444{
445 return card->options.cq == QETH_CQ_ENABLED &&
446 card->qdio.c_q != NULL &&
447 queue != 0 &&
448 queue == card->qdio.no_in_queues - 1;
449}
450
451
4a71df50
FB		 452static int qeth_issue_next_read(struct qeth_card *card)
453{
454 int rc;
455 struct qeth_cmd_buffer *iob;
456
847a50fd 457 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 458 if (card->read.state != CH_STATE_UP)
459 return -EIO;
460 iob = qeth_get_buffer(&card->read);
461 if (!iob) {
74eacdb9
FB		 462 dev_warn(&card->gdev->dev, "The qeth device driver "
463 "failed to recover an error on the device\n");
464 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
465 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 466 return -ENOMEM;
467 }
468 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 469 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 470 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
471 (addr_t) iob, 0, 0);
472 if (rc) {
74eacdb9
FB		 473 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
474 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 475 atomic_set(&card->read.irq_pending, 0);
908abbb5 476 card->read_or_write_problem = 1;
4a71df50
FB		 477 qeth_schedule_recovery(card);
478 wake_up(&card->wait_q);
479 }
480 return rc;
481}
482
483static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
484{
485 struct qeth_reply *reply;
486
487 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
488 if (reply) {
489 atomic_set(&reply->refcnt, 1);
490 atomic_set(&reply->received, 0);
491 reply->card = card;
492 };
493 return reply;
494}
495
496static void qeth_get_reply(struct qeth_reply *reply)
497{
498 WARN_ON(atomic_read(&reply->refcnt) <= 0);
499 atomic_inc(&reply->refcnt);
500}
501
502static void qeth_put_reply(struct qeth_reply *reply)
503{
504 WARN_ON(atomic_read(&reply->refcnt) <= 0);
505 if (atomic_dec_and_test(&reply->refcnt))
506 kfree(reply);
507}
508
d11ba0c4 509static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 510 struct qeth_card *card)
511{
4a71df50 512 char *ipa_name;
d11ba0c4 513 int com = cmd->hdr.command;
4a71df50 514 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 515 if (rc)
70919e23
UB		 516 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
517 "x%X \"%s\"\n",
518 ipa_name, com, dev_name(&card->gdev->dev),
519 QETH_CARD_IFNAME(card), rc,
520 qeth_get_ipa_msg(rc));
d11ba0c4 521 else
70919e23
UB		 522 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
523 ipa_name, com, dev_name(&card->gdev->dev),
524 QETH_CARD_IFNAME(card));
4a71df50
FB		 525}
526
527static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
528 struct qeth_cmd_buffer *iob)
529{
530 struct qeth_ipa_cmd *cmd = NULL;
531
847a50fd 532 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 533 if (IS_IPA(iob->data)) {
534 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
535 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 536 if (cmd->hdr.command != IPA_CMD_SETCCID &&
537 cmd->hdr.command != IPA_CMD_DELCCID &&
538 cmd->hdr.command != IPA_CMD_MODCCID &&
539 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 540 qeth_issue_ipa_msg(cmd,
541 cmd->hdr.return_code, card);
4a71df50
FB		 542 return cmd;
543 } else {
544 switch (cmd->hdr.command) {
545 case IPA_CMD_STOPLAN:
74eacdb9
FB		 546 dev_warn(&card->gdev->dev,
547 "The link for interface %s on CHPID"
548 " 0x%X failed\n",
4a71df50
FB		 549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 card->lan_online = 0;
552 if (card->dev && netif_carrier_ok(card->dev))
553 netif_carrier_off(card->dev);
554 return NULL;
555 case IPA_CMD_STARTLAN:
74eacdb9
FB		 556 dev_info(&card->gdev->dev,
557 "The link for %s on CHPID 0x%X has"
558 " been restored\n",
4a71df50
FB		 559 QETH_CARD_IFNAME(card),
560 card->info.chpid);
561 netif_carrier_on(card->dev);
922dc062 562 card->lan_online = 1;
1da74b1c
FB		 563 if (card->info.hwtrap)
564 card->info.hwtrap = 2;
4a71df50
FB		 565 qeth_schedule_recovery(card);
566 return NULL;
567 case IPA_CMD_MODCCID:
568 return cmd;
569 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 570 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 571 break;
572 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 573 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 574 break;
575 default:
c4cef07c 576 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 577 "but not a reply!\n");
578 break;
579 }
580 }
581 }
582 return cmd;
583}
584
585void qeth_clear_ipacmd_list(struct qeth_card *card)
586{
587 struct qeth_reply *reply, *r;
588 unsigned long flags;
589
847a50fd 590 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 591
592 spin_lock_irqsave(&card->lock, flags);
593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594 qeth_get_reply(reply);
595 reply->rc = -EIO;
596 atomic_inc(&reply->received);
597 list_del_init(&reply->list);
598 wake_up(&reply->wait_q);
599 qeth_put_reply(reply);
600 }
601 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 602 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 603}
604EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
605
5113fec0
UB		 606static int qeth_check_idx_response(struct qeth_card *card,
607 unsigned char *buffer)
4a71df50
FB		 608{
609 if (!buffer)
610 return 0;
611
d11ba0c4 612 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 613 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 614 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 615 "with cause code 0x%02x%s\n",
616 buffer[4],
617 ((buffer[4] == 0x22) ?
618 " -- try another portname" : ""));
847a50fd
CO		 619 QETH_CARD_TEXT(card, 2, "ckidxres");
620 QETH_CARD_TEXT(card, 2, " idxterm");
621 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 622 if (buffer[4] == 0xf6) {
623 dev_err(&card->gdev->dev,
624 "The qeth device is not configured "
625 "for the OSI layer required by z/VM\n");
626 return -EPERM;
627 }
4a71df50
FB		 628 return -EIO;
629 }
630 return 0;
631}
632
633static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
634 __u32 len)
635{
636 struct qeth_card *card;
637
4a71df50 638 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 639 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 640 if (channel == &card->read)
641 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
642 else
643 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
644 channel->ccw.count = len;
645 channel->ccw.cda = (__u32) __pa(iob);
646}
647
648static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
649{
650 __u8 index;
651
847a50fd 652 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 653 index = channel->io_buf_no;
654 do {
655 if (channel->iob[index].state == BUF_STATE_FREE) {
656 channel->iob[index].state = BUF_STATE_LOCKED;
657 channel->io_buf_no = (channel->io_buf_no + 1) %
658 QETH_CMD_BUFFER_NO;
659 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
660 return channel->iob + index;
661 }
662 index = (index + 1) % QETH_CMD_BUFFER_NO;
663 } while (index != channel->io_buf_no);
664
665 return NULL;
666}
667
668void qeth_release_buffer(struct qeth_channel *channel,
669 struct qeth_cmd_buffer *iob)
670{
671 unsigned long flags;
672
847a50fd 673 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 674 spin_lock_irqsave(&channel->iob_lock, flags);
675 memset(iob->data, 0, QETH_BUFSIZE);
676 iob->state = BUF_STATE_FREE;
677 iob->callback = qeth_send_control_data_cb;
678 iob->rc = 0;
679 spin_unlock_irqrestore(&channel->iob_lock, flags);
680}
681EXPORT_SYMBOL_GPL(qeth_release_buffer);
682
683static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
684{
685 struct qeth_cmd_buffer *buffer = NULL;
686 unsigned long flags;
687
688 spin_lock_irqsave(&channel->iob_lock, flags);
689 buffer = __qeth_get_buffer(channel);
690 spin_unlock_irqrestore(&channel->iob_lock, flags);
691 return buffer;
692}
693
694struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
695{
696 struct qeth_cmd_buffer *buffer;
697 wait_event(channel->wait_q,
698 ((buffer = qeth_get_buffer(channel)) != NULL));
699 return buffer;
700}
701EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
702
703void qeth_clear_cmd_buffers(struct qeth_channel *channel)
704{
705 int cnt;
706
707 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
708 qeth_release_buffer(channel, &channel->iob[cnt]);
709 channel->buf_no = 0;
710 channel->io_buf_no = 0;
711}
712EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
713
714static void qeth_send_control_data_cb(struct qeth_channel *channel,
715 struct qeth_cmd_buffer *iob)
716{
717 struct qeth_card *card;
718 struct qeth_reply *reply, *r;
719 struct qeth_ipa_cmd *cmd;
720 unsigned long flags;
721 int keep_reply;
5113fec0 722 int rc = 0;
4a71df50 723
4a71df50 724 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 725 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 726 rc = qeth_check_idx_response(card, iob->data);
727 switch (rc) {
728 case 0:
729 break;
730 case -EIO:
4a71df50 731 qeth_clear_ipacmd_list(card);
5113fec0 732 qeth_schedule_recovery(card);
01fc3e86 733 /* fall through */
5113fec0 734 default:
4a71df50
FB		 735 goto out;
736 }
737
738 cmd = qeth_check_ipa_data(card, iob);
739 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
740 goto out;
741 /*in case of OSN : check if cmd is set */
742 if (card->info.type == QETH_CARD_TYPE_OSN &&
743 cmd &&
744 cmd->hdr.command != IPA_CMD_STARTLAN &&
745 card->osn_info.assist_cb != NULL) {
746 card->osn_info.assist_cb(card->dev, cmd);
747 goto out;
748 }
749
750 spin_lock_irqsave(&card->lock, flags);
751 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
752 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
753 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
754 qeth_get_reply(reply);
755 list_del_init(&reply->list);
756 spin_unlock_irqrestore(&card->lock, flags);
757 keep_reply = 0;
758 if (reply->callback != NULL) {
759 if (cmd) {
760 reply->offset = (__u16)((char *)cmd -
761 (char *)iob->data);
762 keep_reply = reply->callback(card,
763 reply,
764 (unsigned long)cmd);
765 } else
766 keep_reply = reply->callback(card,
767 reply,
768 (unsigned long)iob);
769 }
770 if (cmd)
771 reply->rc = (u16) cmd->hdr.return_code;
772 else if (iob->rc)
773 reply->rc = iob->rc;
774 if (keep_reply) {
775 spin_lock_irqsave(&card->lock, flags);
776 list_add_tail(&reply->list,
777 &card->cmd_waiter_list);
778 spin_unlock_irqrestore(&card->lock, flags);
779 } else {
780 atomic_inc(&reply->received);
781 wake_up(&reply->wait_q);
782 }
783 qeth_put_reply(reply);
784 goto out;
785 }
786 }
787 spin_unlock_irqrestore(&card->lock, flags);
788out:
789 memcpy(&card->seqno.pdu_hdr_ack,
790 QETH_PDU_HEADER_SEQ_NO(iob->data),
791 QETH_SEQ_NO_LENGTH);
792 qeth_release_buffer(channel, iob);
793}
794
795static int qeth_setup_channel(struct qeth_channel *channel)
796{
797 int cnt;
798
d11ba0c4 799 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 800 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 801 channel->iob[cnt].data =
b3332930 802 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 803 if (channel->iob[cnt].data == NULL)
804 break;
805 channel->iob[cnt].state = BUF_STATE_FREE;
806 channel->iob[cnt].channel = channel;
807 channel->iob[cnt].callback = qeth_send_control_data_cb;
808 channel->iob[cnt].rc = 0;
809 }
810 if (cnt < QETH_CMD_BUFFER_NO) {
811 while (cnt-- > 0)
812 kfree(channel->iob[cnt].data);
813 return -ENOMEM;
814 }
815 channel->buf_no = 0;
816 channel->io_buf_no = 0;
817 atomic_set(&channel->irq_pending, 0);
818 spin_lock_init(&channel->iob_lock);
819
820 init_waitqueue_head(&channel->wait_q);
821 return 0;
822}
823
824static int qeth_set_thread_start_bit(struct qeth_card *card,
825 unsigned long thread)
826{
827 unsigned long flags;
828
829 spin_lock_irqsave(&card->thread_mask_lock, flags);
830 if (!(card->thread_allowed_mask & thread) ||
831 (card->thread_start_mask & thread)) {
832 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
833 return -EPERM;
834 }
835 card->thread_start_mask |= thread;
836 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
837 return 0;
838}
839
840void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
841{
842 unsigned long flags;
843
844 spin_lock_irqsave(&card->thread_mask_lock, flags);
845 card->thread_start_mask &= ~thread;
846 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
847 wake_up(&card->wait_q);
848}
849EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
850
851void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
852{
853 unsigned long flags;
854
855 spin_lock_irqsave(&card->thread_mask_lock, flags);
856 card->thread_running_mask &= ~thread;
857 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
858 wake_up(&card->wait_q);
859}
860EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
861
862static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
863{
864 unsigned long flags;
865 int rc = 0;
866
867 spin_lock_irqsave(&card->thread_mask_lock, flags);
868 if (card->thread_start_mask & thread) {
869 if ((card->thread_allowed_mask & thread) &&
870 !(card->thread_running_mask & thread)) {
871 rc = 1;
872 card->thread_start_mask &= ~thread;
873 card->thread_running_mask |= thread;
874 } else
875 rc = -EPERM;
876 }
877 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
878 return rc;
879}
880
881int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
882{
883 int rc = 0;
884
885 wait_event(card->wait_q,
886 (rc = __qeth_do_run_thread(card, thread)) >= 0);
887 return rc;
888}
889EXPORT_SYMBOL_GPL(qeth_do_run_thread);
890
891void qeth_schedule_recovery(struct qeth_card *card)
892{
847a50fd 893 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 894 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
895 schedule_work(&card->kernel_thread_starter);
896}
897EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
898
899static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
900{
901 int dstat, cstat;
902 char *sense;
847a50fd 903 struct qeth_card *card;
4a71df50
FB		 904
905 sense = (char *) irb->ecw;
23d805b6
PO		 906 cstat = irb->scsw.cmd.cstat;
907 dstat = irb->scsw.cmd.dstat;
847a50fd 908 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 909
910 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
911 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
912 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 913 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 914 dev_warn(&cdev->dev, "The qeth device driver "
915 "failed to recover an error on the device\n");
5113fec0 916 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 917 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 918 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
919 16, 1, irb, 64, 1);
920 return 1;
921 }
922
923 if (dstat & DEV_STAT_UNIT_CHECK) {
924 if (sense[SENSE_RESETTING_EVENT_BYTE] &
925 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 926 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 927 return 1;
928 }
929 if (sense[SENSE_COMMAND_REJECT_BYTE] &
930 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 931 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 932 return 1;
4a71df50
FB		 933 }
934 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 935 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 936 return 1;
937 }
938 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 939 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 940 return 0;
941 }
847a50fd 942 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 943 return 1;
944 }
945 return 0;
946}
947
948static long __qeth_check_irb_error(struct ccw_device *cdev,
949 unsigned long intparm, struct irb *irb)
950{
847a50fd
CO		 951 struct qeth_card *card;
952
953 card = CARD_FROM_CDEV(cdev);
954
4a71df50
FB		 955 if (!IS_ERR(irb))
956 return 0;
957
958 switch (PTR_ERR(irb)) {
959 case -EIO:
74eacdb9
FB		 960 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
961 dev_name(&cdev->dev));
847a50fd
CO		 962 QETH_CARD_TEXT(card, 2, "ckirberr");
963 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 964 break;
965 case -ETIMEDOUT:
74eacdb9
FB		 966 dev_warn(&cdev->dev, "A hardware operation timed out"
967 " on the device\n");
847a50fd
CO		 968 QETH_CARD_TEXT(card, 2, "ckirberr");
969 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 970 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 971 if (card && (card->data.ccwdev == cdev)) {
972 card->data.state = CH_STATE_DOWN;
973 wake_up(&card->wait_q);
974 }
975 }
976 break;
977 default:
74eacdb9
FB		 978 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
979 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 980 QETH_CARD_TEXT(card, 2, "ckirberr");
981 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 982 }
983 return PTR_ERR(irb);
984}
985
986static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
987 struct irb *irb)
988{
989 int rc;
990 int cstat, dstat;
991 struct qeth_cmd_buffer *buffer;
992 struct qeth_channel *channel;
993 struct qeth_card *card;
994 struct qeth_cmd_buffer *iob;
995 __u8 index;
996
4a71df50
FB		 997 if (__qeth_check_irb_error(cdev, intparm, irb))
998 return;
23d805b6
PO		 999 cstat = irb->scsw.cmd.cstat;
1000 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1001
1002 card = CARD_FROM_CDEV(cdev);
1003 if (!card)
1004 return;
1005
847a50fd
CO		 1006 QETH_CARD_TEXT(card, 5, "irq");
1007
4a71df50
FB		 1008 if (card->read.ccwdev == cdev) {
1009 channel = &card->read;
847a50fd 1010 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1011 } else if (card->write.ccwdev == cdev) {
1012 channel = &card->write;
847a50fd 1013 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1014 } else {
1015 channel = &card->data;
847a50fd 1016 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1017 }
1018 atomic_set(&channel->irq_pending, 0);
1019
23d805b6 1020 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1021 channel->state = CH_STATE_STOPPED;
1022
23d805b6 1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1024 channel->state = CH_STATE_HALTED;
1025
1026 /*let's wake up immediately on data channel*/
1027 if ((channel == &card->data) && (intparm != 0) &&
1028 (intparm != QETH_RCD_PARM))
1029 goto out;
1030
1031 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1032 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1033 /* we don't have to handle this further */
1034 intparm = 0;
1035 }
1036 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1037 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1038 /* we don't have to handle this further */
1039 intparm = 0;
1040 }
1041 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1042 (dstat & DEV_STAT_UNIT_CHECK) ||
1043 (cstat)) {
1044 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1045 dev_warn(&channel->ccwdev->dev,
1046 "The qeth device driver failed to recover "
1047 "an error on the device\n");
1048 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1049 "0x%X dstat 0x%X\n",
1050 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1051 print_hex_dump(KERN_WARNING, "qeth: irb ",
1052 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1053 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1054 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1055 }
1056 if (intparm == QETH_RCD_PARM) {
1057 channel->state = CH_STATE_DOWN;
1058 goto out;
1059 }
1060 rc = qeth_get_problem(cdev, irb);
1061 if (rc) {
28a7e4c9 1062 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1063 qeth_schedule_recovery(card);
1064 goto out;
1065 }
1066 }
1067
1068 if (intparm == QETH_RCD_PARM) {
1069 channel->state = CH_STATE_RCD_DONE;
1070 goto out;
1071 }
1072 if (intparm) {
1073 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1074 buffer->state = BUF_STATE_PROCESSED;
1075 }
1076 if (channel == &card->data)
1077 return;
1078 if (channel == &card->read &&
1079 channel->state == CH_STATE_UP)
1080 qeth_issue_next_read(card);
1081
1082 iob = channel->iob;
1083 index = channel->buf_no;
1084 while (iob[index].state == BUF_STATE_PROCESSED) {
1085 if (iob[index].callback != NULL)
1086 iob[index].callback(channel, iob + index);
1087
1088 index = (index + 1) % QETH_CMD_BUFFER_NO;
1089 }
1090 channel->buf_no = index;
1091out:
1092 wake_up(&card->wait_q);
1093 return;
1094}
1095
b3332930 1096static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1097 struct qeth_qdio_out_buffer *buf,
b3332930 1098 enum iucv_tx_notify notification)
4a71df50 1099{
4a71df50
FB		 1100 struct sk_buff *skb;
1101
b3332930
FB		 1102 if (skb_queue_empty(&buf->skb_list))
1103 goto out;
1104 skb = skb_peek(&buf->skb_list);
1105 while (skb) {
1106 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1107 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1108 if (skb->protocol == ETH_P_AF_IUCV) {
1109 if (skb->sk) {
1110 struct iucv_sock *iucv = iucv_sk(skb->sk);
1111 iucv->sk_txnotify(skb, notification);
1112 }
1113 }
1114 if (skb_queue_is_last(&buf->skb_list, skb))
1115 skb = NULL;
1116 else
1117 skb = skb_queue_next(&buf->skb_list, skb);
1118 }
1119out:
1120 return;
1121}
1122
1123static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1124{
1125 struct sk_buff *skb;
72861ae7
EL		 1126 struct iucv_sock *iucv;
1127 int notify_general_error = 0;
1128
1129 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1130 notify_general_error = 1;
1131
1132 /* release may never happen from within CQ tasklet scope */
1133 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1134
b67d801f
UB		 1135 skb = skb_dequeue(&buf->skb_list);
1136 while (skb) {
b3332930
FB		 1137 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1138 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1139 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1140 if (skb->sk) {
1141 iucv = iucv_sk(skb->sk);
1142 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1143 }
1144 }
b67d801f
UB		 1145 atomic_dec(&skb->users);
1146 dev_kfree_skb_any(skb);
4a71df50
FB		 1147 skb = skb_dequeue(&buf->skb_list);
1148 }
b3332930
FB		 1149}
1150
1151static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1152 struct qeth_qdio_out_buffer *buf,
1153 enum qeth_qdio_buffer_states newbufstate)
1154{
1155 int i;
1156
1157 /* is PCI flag set on buffer? */
1158 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1159 atomic_dec(&queue->set_pci_flags_count);
1160
1161 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1162 qeth_release_skbs(buf);
1163 }
4a71df50 1164 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1165 if (buf->buffer->element[i].addr && buf->is_header[i])
1166 kmem_cache_free(qeth_core_header_cache,
1167 buf->buffer->element[i].addr);
1168 buf->is_header[i] = 0;
4a71df50
FB		 1169 buf->buffer->element[i].length = 0;
1170 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1171 buf->buffer->element[i].eflags = 0;
1172 buf->buffer->element[i].sflags = 0;
4a71df50 1173 }
3ec90878
JG		 1174 buf->buffer->element[15].eflags = 0;
1175 buf->buffer->element[15].sflags = 0;
4a71df50 1176 buf->next_element_to_fill = 0;
0da9581d
EL		 1177 atomic_set(&buf->state, newbufstate);
1178}
1179
1180static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1181{
1182 int j;
1183
1184 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1185 if (!q->bufs[j])
1186 continue;
72861ae7 1187 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1188 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1189 if (free) {
1190 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1191 q->bufs[j] = NULL;
1192 }
1193 }
4a71df50
FB		 1194}
1195
1196void qeth_clear_qdio_buffers(struct qeth_card *card)
1197{
0da9581d 1198 int i;
4a71df50 1199
847a50fd 1200 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1201 /* clear outbound buffers to free skbs */
0da9581d 1202 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1203 if (card->qdio.out_qs[i]) {
0da9581d 1204 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1205 }
0da9581d 1206 }
4a71df50
FB		 1207}
1208EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1209
1210static void qeth_free_buffer_pool(struct qeth_card *card)
1211{
1212 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1213 int i = 0;
4a71df50
FB		 1214 list_for_each_entry_safe(pool_entry, tmp,
1215 &card->qdio.init_pool.entry_list, init_list){
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1217 free_page((unsigned long)pool_entry->elements[i]);
1218 list_del(&pool_entry->init_list);
1219 kfree(pool_entry);
1220 }
1221}
1222
1223static void qeth_free_qdio_buffers(struct qeth_card *card)
1224{
b3332930 1225 int i, j;
4a71df50 1226
4a71df50
FB		 1227 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1228 QETH_QDIO_UNINITIALIZED)
1229 return;
0da9581d
EL		 1230
1231 qeth_free_cq(card);
b3332930
FB		 1232 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1233 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
72861ae7 1234 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1235 kfree(card->qdio.in_q);
1236 card->qdio.in_q = NULL;
1237 /* inbound buffer pool */
1238 qeth_free_buffer_pool(card);
1239 /* free outbound qdio_qs */
1240 if (card->qdio.out_qs) {
1241 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1242 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1243 kfree(card->qdio.out_qs[i]);
1244 }
1245 kfree(card->qdio.out_qs);
1246 card->qdio.out_qs = NULL;
1247 }
1248}
1249
1250static void qeth_clean_channel(struct qeth_channel *channel)
1251{
1252 int cnt;
1253
d11ba0c4 1254 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1255 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1256 kfree(channel->iob[cnt].data);
1257}
1258
5113fec0 1259static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 1260{
4a71df50
FB		 1261 struct ccw_device *ccwdev;
1262 struct channelPath_dsc {
1263 u8 flags;
1264 u8 lsn;
1265 u8 desc;
1266 u8 chpid;
1267 u8 swla;
1268 u8 zeroes;
1269 u8 chla;
1270 u8 chpp;
1271 } *chp_dsc;
1272
5113fec0 1273 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1274
1275 ccwdev = card->data.ccwdev;
1276 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1277 if (chp_dsc != NULL) {
99558ea9
UB		 1278 if (card->info.type != QETH_CARD_TYPE_IQD) {
1279 /* CHPP field bit 6 == 1 -> single queue */
1280 if ((chp_dsc->chpp & 0x02) == 0x02) {
1281 if ((atomic_read(&card->qdio.state) !=
1282 QETH_QDIO_UNINITIALIZED) &&
1283 (card->qdio.no_out_queues == 4))
1284 /* change from 4 to 1 outbound queues */
1285 qeth_free_qdio_buffers(card);
1286 card->qdio.no_out_queues = 1;
1287 if (card->qdio.default_out_queue != 0)
1288 dev_info(&card->gdev->dev,
d0ff1f52 1289 "Priority Queueing not supported\n");
99558ea9
UB		 1290 card->qdio.default_out_queue = 0;
1291 } else {
1292 if ((atomic_read(&card->qdio.state) !=
1293 QETH_QDIO_UNINITIALIZED) &&
1294 (card->qdio.no_out_queues == 1)) {
1295 /* change from 1 to 4 outbound queues */
1296 qeth_free_qdio_buffers(card);
1297 card->qdio.default_out_queue = 2;
1298 }
1299 card->qdio.no_out_queues = 4;
d0ff1f52 1300 }
d0ff1f52 1301 }
5113fec0 1302 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 1303 kfree(chp_dsc);
1304 }
5113fec0
UB		 1305 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1306 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1307 return;
4a71df50
FB		 1308}
1309
1310static void qeth_init_qdio_info(struct qeth_card *card)
1311{
d11ba0c4 1312 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1313 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1314 /* inbound */
1315 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1316 if (card->info.type == QETH_CARD_TYPE_IQD)
1317 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1318 else
1319 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1320 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1321 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1322 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1323}
1324
1325static void qeth_set_intial_options(struct qeth_card *card)
1326{
1327 card->options.route4.type = NO_ROUTER;
1328 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1329 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1330 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1331 card->options.fake_broadcast = 0;
1332 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1333 card->options.performance_stats = 0;
1334 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1335 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1336 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1337}
1338
1339static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1340{
1341 unsigned long flags;
1342 int rc = 0;
1343
1344 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1345 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1346 (u8) card->thread_start_mask,
1347 (u8) card->thread_allowed_mask,
1348 (u8) card->thread_running_mask);
1349 rc = (card->thread_start_mask & thread);
1350 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1351 return rc;
1352}
1353
1354static void qeth_start_kernel_thread(struct work_struct *work)
1355{
3f36b890 1356 struct task_struct *ts;
4a71df50
FB		 1357 struct qeth_card *card = container_of(work, struct qeth_card,
1358 kernel_thread_starter);
847a50fd 1359 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1360
1361 if (card->read.state != CH_STATE_UP &&
1362 card->write.state != CH_STATE_UP)
1363 return;
3f36b890
FB		 1364 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1365 ts = kthread_run(card->discipline.recover, (void *)card,
4a71df50 1366 "qeth_recover");
3f36b890
FB		 1367 if (IS_ERR(ts)) {
1368 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1369 qeth_clear_thread_running_bit(card,
1370 QETH_RECOVER_THREAD);
1371 }
1372 }
4a71df50
FB		 1373}
1374
1375static int qeth_setup_card(struct qeth_card *card)
1376{
1377
d11ba0c4
PT		 1378 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1379 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1380
1381 card->read.state = CH_STATE_DOWN;
1382 card->write.state = CH_STATE_DOWN;
1383 card->data.state = CH_STATE_DOWN;
1384 card->state = CARD_STATE_DOWN;
1385 card->lan_online = 0;
908abbb5 1386 card->read_or_write_problem = 0;
4a71df50
FB		 1387 card->dev = NULL;
1388 spin_lock_init(&card->vlanlock);
1389 spin_lock_init(&card->mclock);
4a71df50
FB		 1390 spin_lock_init(&card->lock);
1391 spin_lock_init(&card->ip_lock);
1392 spin_lock_init(&card->thread_mask_lock);
c4949f07 1393 mutex_init(&card->conf_mutex);
9dc48ccc 1394 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1395 card->thread_start_mask = 0;
1396 card->thread_allowed_mask = 0;
1397 card->thread_running_mask = 0;
1398 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1399 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1400 INIT_LIST_HEAD(card->ip_tbd_list);
1401 INIT_LIST_HEAD(&card->cmd_waiter_list);
1402 init_waitqueue_head(&card->wait_q);
25985edc 1403 /* initial options */
4a71df50
FB		 1404 qeth_set_intial_options(card);
1405 /* IP address takeover */
1406 INIT_LIST_HEAD(&card->ipato.entries);
1407 card->ipato.enabled = 0;
1408 card->ipato.invert4 = 0;
1409 card->ipato.invert6 = 0;
1410 /* init QDIO stuff */
1411 qeth_init_qdio_info(card);
b3332930 1412 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1413 return 0;
1414}
1415
6bcac508
MS		 1416static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1417{
1418 struct qeth_card *card = container_of(slr, struct qeth_card,
1419 qeth_service_level);
0d788c7d
KDW		 1420 if (card->info.mcl_level[0])
1421 seq_printf(m, "qeth: %s firmware level %s\n",
1422 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1423}
1424
4a71df50
FB		 1425static struct qeth_card *qeth_alloc_card(void)
1426{
1427 struct qeth_card *card;
1428
d11ba0c4 1429 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1430 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1431 if (!card)
76b11f8e 1432 goto out;
d11ba0c4 1433 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1434 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1435 if (!card->ip_tbd_list) {
1436 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1437 goto out_card;
4a71df50 1438 }
76b11f8e
UB		 1439 if (qeth_setup_channel(&card->read))
1440 goto out_ip;
1441 if (qeth_setup_channel(&card->write))
1442 goto out_channel;
4a71df50 1443 card->options.layer2 = -1;
6bcac508
MS		 1444 card->qeth_service_level.seq_print = qeth_core_sl_print;
1445 register_service_level(&card->qeth_service_level);
4a71df50 1446 return card;
76b11f8e
UB		 1447
1448out_channel:
1449 qeth_clean_channel(&card->read);
1450out_ip:
1451 kfree(card->ip_tbd_list);
1452out_card:
1453 kfree(card);
1454out:
1455 return NULL;
4a71df50
FB		 1456}
1457
1458static int qeth_determine_card_type(struct qeth_card *card)
1459{
1460 int i = 0;
1461
d11ba0c4 1462 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1463
1464 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1465 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1466 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1467 if ((CARD_RDEV(card)->id.dev_type ==
1468 known_devices[i][QETH_DEV_TYPE_IND]) &&
1469 (CARD_RDEV(card)->id.dev_model ==
1470 known_devices[i][QETH_DEV_MODEL_IND])) {
1471 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1472 card->qdio.no_out_queues =
1473 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1474 card->qdio.no_in_queues = 1;
5113fec0
UB		 1475 card->info.is_multicast_different =
1476 known_devices[i][QETH_MULTICAST_IND];
1477 qeth_get_channel_path_desc(card);
4a71df50
FB		 1478 return 0;
1479 }
1480 i++;
1481 }
1482 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1483 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1484 "unknown type\n");
4a71df50
FB		 1485 return -ENOENT;
1486}
1487
1488static int qeth_clear_channel(struct qeth_channel *channel)
1489{
1490 unsigned long flags;
1491 struct qeth_card *card;
1492 int rc;
1493
4a71df50 1494 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1495 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1496 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1497 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1498 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1499
1500 if (rc)
1501 return rc;
1502 rc = wait_event_interruptible_timeout(card->wait_q,
1503 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1504 if (rc == -ERESTARTSYS)
1505 return rc;
1506 if (channel->state != CH_STATE_STOPPED)
1507 return -ETIME;
1508 channel->state = CH_STATE_DOWN;
1509 return 0;
1510}
1511
1512static int qeth_halt_channel(struct qeth_channel *channel)
1513{
1514 unsigned long flags;
1515 struct qeth_card *card;
1516 int rc;
1517
4a71df50 1518 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1519 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1520 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1521 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1522 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1523
1524 if (rc)
1525 return rc;
1526 rc = wait_event_interruptible_timeout(card->wait_q,
1527 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1528 if (rc == -ERESTARTSYS)
1529 return rc;
1530 if (channel->state != CH_STATE_HALTED)
1531 return -ETIME;
1532 return 0;
1533}
1534
1535static int qeth_halt_channels(struct qeth_card *card)
1536{
1537 int rc1 = 0, rc2 = 0, rc3 = 0;
1538
847a50fd 1539 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1540 rc1 = qeth_halt_channel(&card->read);
1541 rc2 = qeth_halt_channel(&card->write);
1542 rc3 = qeth_halt_channel(&card->data);
1543 if (rc1)
1544 return rc1;
1545 if (rc2)
1546 return rc2;
1547 return rc3;
1548}
1549
1550static int qeth_clear_channels(struct qeth_card *card)
1551{
1552 int rc1 = 0, rc2 = 0, rc3 = 0;
1553
847a50fd 1554 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1555 rc1 = qeth_clear_channel(&card->read);
1556 rc2 = qeth_clear_channel(&card->write);
1557 rc3 = qeth_clear_channel(&card->data);
1558 if (rc1)
1559 return rc1;
1560 if (rc2)
1561 return rc2;
1562 return rc3;
1563}
1564
1565static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1566{
1567 int rc = 0;
1568
847a50fd 1569 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1570
1571 if (halt)
1572 rc = qeth_halt_channels(card);
1573 if (rc)
1574 return rc;
1575 return qeth_clear_channels(card);
1576}
1577
1578int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1579{
1580 int rc = 0;
1581
847a50fd 1582 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1583 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1584 QETH_QDIO_CLEANING)) {
1585 case QETH_QDIO_ESTABLISHED:
1586 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1587 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1588 QDIO_FLAG_CLEANUP_USING_HALT);
1589 else
cc961d40 1590 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1591 QDIO_FLAG_CLEANUP_USING_CLEAR);
1592 if (rc)
847a50fd 1593 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1594 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1595 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1596 break;
1597 case QETH_QDIO_CLEANING:
1598 return rc;
1599 default:
1600 break;
1601 }
1602 rc = qeth_clear_halt_card(card, use_halt);
1603 if (rc)
847a50fd 1604 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1605 card->state = CARD_STATE_DOWN;
1606 return rc;
1607}
1608EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1609
1610static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1611 int *length)
1612{
1613 struct ciw *ciw;
1614 char *rcd_buf;
1615 int ret;
1616 struct qeth_channel *channel = &card->data;
1617 unsigned long flags;
1618
1619 /*
1620 * scan for RCD command in extended SenseID data
1621 */
1622 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1623 if (!ciw || ciw->cmd == 0)
1624 return -EOPNOTSUPP;
1625 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1626 if (!rcd_buf)
1627 return -ENOMEM;
1628
1629 channel->ccw.cmd_code = ciw->cmd;
1630 channel->ccw.cda = (__u32) __pa(rcd_buf);
1631 channel->ccw.count = ciw->count;
1632 channel->ccw.flags = CCW_FLAG_SLI;
1633 channel->state = CH_STATE_RCD;
1634 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1635 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1636 QETH_RCD_PARM, LPM_ANYPATH, 0,
1637 QETH_RCD_TIMEOUT);
1638 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1639 if (!ret)
1640 wait_event(card->wait_q,
1641 (channel->state == CH_STATE_RCD_DONE ||
1642 channel->state == CH_STATE_DOWN));
1643 if (channel->state == CH_STATE_DOWN)
1644 ret = -EIO;
1645 else
1646 channel->state = CH_STATE_DOWN;
1647 if (ret) {
1648 kfree(rcd_buf);
1649 *buffer = NULL;
1650 *length = 0;
1651 } else {
1652 *length = ciw->count;
1653 *buffer = rcd_buf;
1654 }
1655 return ret;
1656}
1657
a60389ab 1658static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1659{
a60389ab 1660 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1661 card->info.chpid = prcd[30];
1662 card->info.unit_addr2 = prcd[31];
1663 card->info.cula = prcd[63];
1664 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1665 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1666}
1667
1668static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1669{
1670 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1671
1672 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1673 card->info.blkt.time_total = 250;
1674 card->info.blkt.inter_packet = 5;
1675 card->info.blkt.inter_packet_jumbo = 15;
1676 } else {
1677 card->info.blkt.time_total = 0;
1678 card->info.blkt.inter_packet = 0;
1679 card->info.blkt.inter_packet_jumbo = 0;
1680 }
4a71df50
FB		 1681}
1682
1683static void qeth_init_tokens(struct qeth_card *card)
1684{
1685 card->token.issuer_rm_w = 0x00010103UL;
1686 card->token.cm_filter_w = 0x00010108UL;
1687 card->token.cm_connection_w = 0x0001010aUL;
1688 card->token.ulp_filter_w = 0x0001010bUL;
1689 card->token.ulp_connection_w = 0x0001010dUL;
1690}
1691
1692static void qeth_init_func_level(struct qeth_card *card)
1693{
5113fec0
UB		 1694 switch (card->info.type) {
1695 case QETH_CARD_TYPE_IQD:
6298263a 1696 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1697 break;
1698 case QETH_CARD_TYPE_OSD:
0132951e 1699 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1700 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1701 break;
1702 default:
1703 break;
4a71df50
FB		 1704 }
1705}
1706
4a71df50
FB		 1707static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1708 void (*idx_reply_cb)(struct qeth_channel *,
1709 struct qeth_cmd_buffer *))
1710{
1711 struct qeth_cmd_buffer *iob;
1712 unsigned long flags;
1713 int rc;
1714 struct qeth_card *card;
1715
d11ba0c4 1716 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1717 card = CARD_FROM_CDEV(channel->ccwdev);
1718 iob = qeth_get_buffer(channel);
1719 iob->callback = idx_reply_cb;
1720 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1721 channel->ccw.count = QETH_BUFSIZE;
1722 channel->ccw.cda = (__u32) __pa(iob->data);
1723
1724 wait_event(card->wait_q,
1725 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1726 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1727 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1728 rc = ccw_device_start(channel->ccwdev,
1729 &channel->ccw, (addr_t) iob, 0, 0);
1730 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1731
1732 if (rc) {
14cc21b6 1733 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1734 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1735 atomic_set(&channel->irq_pending, 0);
1736 wake_up(&card->wait_q);
1737 return rc;
1738 }
1739 rc = wait_event_interruptible_timeout(card->wait_q,
1740 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1741 if (rc == -ERESTARTSYS)
1742 return rc;
1743 if (channel->state != CH_STATE_UP) {
1744 rc = -ETIME;
d11ba0c4 1745 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1746 qeth_clear_cmd_buffers(channel);
1747 } else
1748 rc = 0;
1749 return rc;
1750}
1751
1752static int qeth_idx_activate_channel(struct qeth_channel *channel,
1753 void (*idx_reply_cb)(struct qeth_channel *,
1754 struct qeth_cmd_buffer *))
1755{
1756 struct qeth_card *card;
1757 struct qeth_cmd_buffer *iob;
1758 unsigned long flags;
1759 __u16 temp;
1760 __u8 tmp;
1761 int rc;
f06f6f32 1762 struct ccw_dev_id temp_devid;
4a71df50
FB		 1763
1764 card = CARD_FROM_CDEV(channel->ccwdev);
1765
d11ba0c4 1766 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1767
1768 iob = qeth_get_buffer(channel);
1769 iob->callback = idx_reply_cb;
1770 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1771 channel->ccw.count = IDX_ACTIVATE_SIZE;
1772 channel->ccw.cda = (__u32) __pa(iob->data);
1773 if (channel == &card->write) {
1774 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1775 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1776 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1777 card->seqno.trans_hdr++;
1778 } else {
1779 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1780 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1781 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1782 }
1783 tmp = ((__u8)card->info.portno) | 0x80;
1784 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1785 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1786 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1787 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1788 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1789 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1790 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1791 temp = (card->info.cula << 8) + card->info.unit_addr2;
1792 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1793
1794 wait_event(card->wait_q,
1795 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1796 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1797 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1798 rc = ccw_device_start(channel->ccwdev,
1799 &channel->ccw, (addr_t) iob, 0, 0);
1800 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1801
1802 if (rc) {
14cc21b6
FB		 1803 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1804 rc);
d11ba0c4 1805 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1806 atomic_set(&channel->irq_pending, 0);
1807 wake_up(&card->wait_q);
1808 return rc;
1809 }
1810 rc = wait_event_interruptible_timeout(card->wait_q,
1811 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1812 if (rc == -ERESTARTSYS)
1813 return rc;
1814 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1815 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1816 " failed to recover an error on the device\n");
1817 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1818 dev_name(&channel->ccwdev->dev));
d11ba0c4 1819 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1820 qeth_clear_cmd_buffers(channel);
1821 return -ETIME;
1822 }
1823 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1824}
1825
1826static int qeth_peer_func_level(int level)
1827{
1828 if ((level & 0xff) == 8)
1829 return (level & 0xff) + 0x400;
1830 if (((level >> 8) & 3) == 1)
1831 return (level & 0xff) + 0x200;
1832 return level;
1833}
1834
1835static void qeth_idx_write_cb(struct qeth_channel *channel,
1836 struct qeth_cmd_buffer *iob)
1837{
1838 struct qeth_card *card;
1839 __u16 temp;
1840
d11ba0c4 1841 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1842
1843 if (channel->state == CH_STATE_DOWN) {
1844 channel->state = CH_STATE_ACTIVATING;
1845 goto out;
1846 }
1847 card = CARD_FROM_CDEV(channel->ccwdev);
1848
1849 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1850 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1851 dev_err(&card->write.ccwdev->dev,
1852 "The adapter is used exclusively by another "
1853 "host\n");
4a71df50 1854 else
74eacdb9
FB		 1855 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1856 " negative reply\n",
1857 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1858 goto out;
1859 }
1860 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1861 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1862 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1863 "function level mismatch (sent: 0x%x, received: "
1864 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1865 card->info.func_level, temp);
4a71df50
FB		 1866 goto out;
1867 }
1868 channel->state = CH_STATE_UP;
1869out:
1870 qeth_release_buffer(channel, iob);
1871}
1872
1873static void qeth_idx_read_cb(struct qeth_channel *channel,
1874 struct qeth_cmd_buffer *iob)
1875{
1876 struct qeth_card *card;
1877 __u16 temp;
1878
d11ba0c4 1879 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1880 if (channel->state == CH_STATE_DOWN) {
1881 channel->state = CH_STATE_ACTIVATING;
1882 goto out;
1883 }
1884
1885 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1886 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1887 goto out;
1888
1889 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1890 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1891 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1892 dev_err(&card->write.ccwdev->dev,
1893 "The adapter is used exclusively by another "
1894 "host\n");
5113fec0
UB		 1895 break;
1896 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1897 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1898 dev_err(&card->read.ccwdev->dev,
1899 "Setting the device online failed because of "
01fc3e86 1900 "insufficient authorization\n");
5113fec0
UB		 1901 break;
1902 default:
74eacdb9
FB		 1903 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1904 " negative reply\n",
1905 dev_name(&card->read.ccwdev->dev));
5113fec0 1906 }
01fc3e86
UB		 1907 QETH_CARD_TEXT_(card, 2, "idxread%c",
1908 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1909 goto out;
1910 }
1911
1912/**
5113fec0
UB		 1913 * * temporary fix for microcode bug
1914 * * to revert it,replace OR by AND
1915 * */
4a71df50 1916 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1917 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1918 card->info.portname_required = 1;
1919
1920 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1921 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1922 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1923 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1924 dev_name(&card->read.ccwdev->dev),
1925 card->info.func_level, temp);
4a71df50
FB		 1926 goto out;
1927 }
1928 memcpy(&card->token.issuer_rm_r,
1929 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1930 QETH_MPC_TOKEN_LENGTH);
1931 memcpy(&card->info.mcl_level[0],
1932 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1933 channel->state = CH_STATE_UP;
1934out:
1935 qeth_release_buffer(channel, iob);
1936}
1937
1938void qeth_prepare_control_data(struct qeth_card *card, int len,
1939 struct qeth_cmd_buffer *iob)
1940{
1941 qeth_setup_ccw(&card->write, iob->data, len);
1942 iob->callback = qeth_release_buffer;
1943
1944 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1945 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1946 card->seqno.trans_hdr++;
1947 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1948 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1949 card->seqno.pdu_hdr++;
1950 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1951 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1952 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1953}
1954EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1955
1956int qeth_send_control_data(struct qeth_card *card, int len,
1957 struct qeth_cmd_buffer *iob,
1958 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1959 unsigned long),
1960 void *reply_param)
1961{
1962 int rc;
1963 unsigned long flags;
1964 struct qeth_reply *reply = NULL;
7834cd5a 1965 unsigned long timeout, event_timeout;
5b54e16f 1966 struct qeth_ipa_cmd *cmd;
4a71df50 1967
847a50fd 1968 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1969
908abbb5
UB		 1970 if (card->read_or_write_problem) {
1971 qeth_release_buffer(iob->channel, iob);
1972 return -EIO;
1973 }
4a71df50
FB		 1974 reply = qeth_alloc_reply(card);
1975 if (!reply) {
4a71df50
FB		 1976 return -ENOMEM;
1977 }
1978 reply->callback = reply_cb;
1979 reply->param = reply_param;
1980 if (card->state == CARD_STATE_DOWN)
1981 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1982 else
1983 reply->seqno = card->seqno.ipa++;
1984 init_waitqueue_head(&reply->wait_q);
1985 spin_lock_irqsave(&card->lock, flags);
1986 list_add_tail(&reply->list, &card->cmd_waiter_list);
1987 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1988 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1989
1990 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1991 qeth_prepare_control_data(card, len, iob);
1992
1993 if (IS_IPA(iob->data))
7834cd5a 1994 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1995 else
7834cd5a
HC		 1996 event_timeout = QETH_TIMEOUT;
1997 timeout = jiffies + event_timeout;
4a71df50 1998
847a50fd 1999 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2000 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2001 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2002 (addr_t) iob, 0, 0);
2003 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2004 if (rc) {
74eacdb9
FB		 2005 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2006 "ccw_device_start rc = %i\n",
2007 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2008 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2009 spin_lock_irqsave(&card->lock, flags);
2010 list_del_init(&reply->list);
2011 qeth_put_reply(reply);
2012 spin_unlock_irqrestore(&card->lock, flags);
2013 qeth_release_buffer(iob->channel, iob);
2014 atomic_set(&card->write.irq_pending, 0);
2015 wake_up(&card->wait_q);
2016 return rc;
2017 }
5b54e16f
FB		 2018
2019 /* we have only one long running ipassist, since we can ensure
2020 process context of this command we can sleep */
2021 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2022 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2023 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2024 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2025 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2026 goto time_err;
2027 } else {
2028 while (!atomic_read(&reply->received)) {
2029 if (time_after(jiffies, timeout))
2030 goto time_err;
2031 cpu_relax();
2032 };
2033 }
2034
70919e23
UB		 2035 if (reply->rc == -EIO)
2036 goto error;
5b54e16f
FB		 2037 rc = reply->rc;
2038 qeth_put_reply(reply);
2039 return rc;
2040
2041time_err:
70919e23 2042 reply->rc = -ETIME;
5b54e16f
FB		 2043 spin_lock_irqsave(&reply->card->lock, flags);
2044 list_del_init(&reply->list);
2045 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2046 atomic_inc(&reply->received);
70919e23 2047error:
908abbb5
UB		 2048 atomic_set(&card->write.irq_pending, 0);
2049 qeth_release_buffer(iob->channel, iob);
2050 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2051 rc = reply->rc;
2052 qeth_put_reply(reply);
2053 return rc;
2054}
2055EXPORT_SYMBOL_GPL(qeth_send_control_data);
2056
2057static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2058 unsigned long data)
2059{
2060 struct qeth_cmd_buffer *iob;
2061
d11ba0c4 2062 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2063
2064 iob = (struct qeth_cmd_buffer *) data;
2065 memcpy(&card->token.cm_filter_r,
2066 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2067 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2068 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2069 return 0;
2070}
2071
2072static int qeth_cm_enable(struct qeth_card *card)
2073{
2074 int rc;
2075 struct qeth_cmd_buffer *iob;
2076
d11ba0c4 2077 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2078
2079 iob = qeth_wait_for_buffer(&card->write);
2080 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2081 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2082 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2083 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2084 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2085
2086 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2087 qeth_cm_enable_cb, NULL);
2088 return rc;
2089}
2090
2091static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2092 unsigned long data)
2093{
2094
2095 struct qeth_cmd_buffer *iob;
2096
d11ba0c4 2097 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2098
2099 iob = (struct qeth_cmd_buffer *) data;
2100 memcpy(&card->token.cm_connection_r,
2101 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2102 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2103 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2104 return 0;
2105}
2106
2107static int qeth_cm_setup(struct qeth_card *card)
2108{
2109 int rc;
2110 struct qeth_cmd_buffer *iob;
2111
d11ba0c4 2112 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2113
2114 iob = qeth_wait_for_buffer(&card->write);
2115 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2116 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2117 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2118 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2119 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2120 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2121 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2122 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2123 qeth_cm_setup_cb, NULL);
2124 return rc;
2125
2126}
2127
2128static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2129{
2130 switch (card->info.type) {
2131 case QETH_CARD_TYPE_UNKNOWN:
2132 return 1500;
2133 case QETH_CARD_TYPE_IQD:
2134 return card->info.max_mtu;
5113fec0 2135 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2136 switch (card->info.link_type) {
2137 case QETH_LINK_TYPE_HSTR:
2138 case QETH_LINK_TYPE_LANE_TR:
2139 return 2000;
2140 default:
2141 return 1492;
2142 }
5113fec0
UB		 2143 case QETH_CARD_TYPE_OSM:
2144 case QETH_CARD_TYPE_OSX:
2145 return 1492;
4a71df50
FB		 2146 default:
2147 return 1500;
2148 }
2149}
2150
4a71df50
FB		 2151static inline int qeth_get_mtu_outof_framesize(int framesize)
2152{
2153 switch (framesize) {
2154 case 0x4000:
2155 return 8192;
2156 case 0x6000:
2157 return 16384;
2158 case 0xa000:
2159 return 32768;
2160 case 0xffff:
2161 return 57344;
2162 default:
2163 return 0;
2164 }
2165}
2166
2167static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2168{
2169 switch (card->info.type) {
5113fec0
UB		 2170 case QETH_CARD_TYPE_OSD:
2171 case QETH_CARD_TYPE_OSM:
2172 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2173 case QETH_CARD_TYPE_IQD:
2174 return ((mtu >= 576) &&
9853b97b 2175 (mtu <= card->info.max_mtu));
4a71df50
FB		 2176 case QETH_CARD_TYPE_OSN:
2177 case QETH_CARD_TYPE_UNKNOWN:
2178 default:
2179 return 1;
2180 }
2181}
2182
2183static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2184 unsigned long data)
2185{
2186
2187 __u16 mtu, framesize;
2188 __u16 len;
2189 __u8 link_type;
2190 struct qeth_cmd_buffer *iob;
2191
d11ba0c4 2192 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2193
2194 iob = (struct qeth_cmd_buffer *) data;
2195 memcpy(&card->token.ulp_filter_r,
2196 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2197 QETH_MPC_TOKEN_LENGTH);
9853b97b 2198 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2199 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2200 mtu = qeth_get_mtu_outof_framesize(framesize);
2201 if (!mtu) {
2202 iob->rc = -EINVAL;
d11ba0c4 2203 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2204 return 0;
2205 }
8b2e18f6
UB		 2206 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2207 /* frame size has changed */
2208 if (card->dev &&
2209 ((card->dev->mtu == card->info.initial_mtu) ||
2210 (card->dev->mtu > mtu)))
2211 card->dev->mtu = mtu;
2212 qeth_free_qdio_buffers(card);
2213 }
4a71df50 2214 card->info.initial_mtu = mtu;
8b2e18f6 2215 card->info.max_mtu = mtu;
4a71df50
FB		 2216 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2217 } else {
2218 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2219 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2220 iob->data);
4a71df50
FB		 2221 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2222 }
2223
2224 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2225 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2226 memcpy(&link_type,
2227 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2228 card->info.link_type = link_type;
2229 } else
2230 card->info.link_type = 0;
01fc3e86 2231 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2232 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2233 return 0;
2234}
2235
2236static int qeth_ulp_enable(struct qeth_card *card)
2237{
2238 int rc;
2239 char prot_type;
2240 struct qeth_cmd_buffer *iob;
2241
2242 /*FIXME: trace view callbacks*/
d11ba0c4 2243 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2244
2245 iob = qeth_wait_for_buffer(&card->write);
2246 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2247
2248 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2249 (__u8) card->info.portno;
2250 if (card->options.layer2)
2251 if (card->info.type == QETH_CARD_TYPE_OSN)
2252 prot_type = QETH_PROT_OSN2;
2253 else
2254 prot_type = QETH_PROT_LAYER2;
2255 else
2256 prot_type = QETH_PROT_TCPIP;
2257
2258 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2259 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2260 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2261 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2262 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2263 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2264 card->info.portname, 9);
2265 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2266 qeth_ulp_enable_cb, NULL);
2267 return rc;
2268
2269}
2270
2271static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2272 unsigned long data)
2273{
2274 struct qeth_cmd_buffer *iob;
65a1f898 2275 int rc = 0;
4a71df50 2276
d11ba0c4 2277 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2278
2279 iob = (struct qeth_cmd_buffer *) data;
2280 memcpy(&card->token.ulp_connection_r,
2281 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2282 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2283 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2284 3)) {
2285 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2286 dev_err(&card->gdev->dev, "A connection could not be "
2287 "established because of an OLM limit\n");
bbb822a8 2288 iob->rc = -EMLINK;
65a1f898 2289 }
d11ba0c4 2290 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 2291 return rc;
4a71df50
FB		 2292}
2293
2294static int qeth_ulp_setup(struct qeth_card *card)
2295{
2296 int rc;
2297 __u16 temp;
2298 struct qeth_cmd_buffer *iob;
2299 struct ccw_dev_id dev_id;
2300
d11ba0c4 2301 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2302
2303 iob = qeth_wait_for_buffer(&card->write);
2304 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2305
2306 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2307 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2308 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2309 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2310 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2311 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2312
2313 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2314 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2315 temp = (card->info.cula << 8) + card->info.unit_addr2;
2316 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2317 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2318 qeth_ulp_setup_cb, NULL);
2319 return rc;
2320}
2321
0da9581d
EL		 2322static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2323{
2324 int rc;
2325 struct qeth_qdio_out_buffer *newbuf;
2326
2327 rc = 0;
2328 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2329 if (!newbuf) {
2330 rc = -ENOMEM;
2331 goto out;
2332 }
2333 newbuf->buffer = &q->qdio_bufs[bidx];
2334 skb_queue_head_init(&newbuf->skb_list);
2335 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2336 newbuf->q = q;
2337 newbuf->aob = NULL;
2338 newbuf->next_pending = q->bufs[bidx];
2339 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2340 q->bufs[bidx] = newbuf;
2341 if (q->bufstates) {
2342 q->bufstates[bidx].user = newbuf;
2343 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2344 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2345 QETH_CARD_TEXT_(q->card, 2, "%lx",
2346 (long) newbuf->next_pending);
2347 }
2348out:
2349 return rc;
2350}
2351
2352
4a71df50
FB		 2353static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2354{
2355 int i, j;
2356
d11ba0c4 2357 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2358
2359 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2360 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2361 return 0;
2362
b3332930 2363 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2364 GFP_KERNEL);
4a71df50
FB		 2365 if (!card->qdio.in_q)
2366 goto out_nomem;
d11ba0c4
PT		 2367 QETH_DBF_TEXT(SETUP, 2, "inq");
2368 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2369 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2370 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2371 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2372 card->qdio.in_q->bufs[i].buffer =
2373 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2374 card->qdio.in_q->bufs[i].rx_skb = NULL;
2375 }
4a71df50
FB		 2376 /* inbound buffer pool */
2377 if (qeth_alloc_buffer_pool(card))
2378 goto out_freeinq;
0da9581d 2379
4a71df50
FB		 2380 /* outbound */
2381 card->qdio.out_qs =
b3332930 2382 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2383 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2384 if (!card->qdio.out_qs)
2385 goto out_freepool;
2386 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2387 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2388 GFP_KERNEL);
4a71df50
FB		 2389 if (!card->qdio.out_qs[i])
2390 goto out_freeoutq;
d11ba0c4
PT		 2391 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2392 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2393 card->qdio.out_qs[i]->queue_no = i;
2394 /* give outbound qeth_qdio_buffers their qdio_buffers */
2395 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2396 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2397 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2398 goto out_freeoutqbufs;
4a71df50
FB		 2399 }
2400 }
0da9581d
EL		 2401
2402 /* completion */
2403 if (qeth_alloc_cq(card))
2404 goto out_freeoutq;
2405
4a71df50
FB		 2406 return 0;
2407
0da9581d
EL		 2408out_freeoutqbufs:
2409 while (j > 0) {
2410 --j;
2411 kmem_cache_free(qeth_qdio_outbuf_cache,
2412 card->qdio.out_qs[i]->bufs[j]);
2413 card->qdio.out_qs[i]->bufs[j] = NULL;
2414 }
4a71df50 2415out_freeoutq:
0da9581d 2416 while (i > 0) {
4a71df50 2417 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2418 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2419 }
4a71df50
FB		 2420 kfree(card->qdio.out_qs);
2421 card->qdio.out_qs = NULL;
2422out_freepool:
2423 qeth_free_buffer_pool(card);
2424out_freeinq:
2425 kfree(card->qdio.in_q);
2426 card->qdio.in_q = NULL;
2427out_nomem:
2428 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2429 return -ENOMEM;
2430}
2431
2432static void qeth_create_qib_param_field(struct qeth_card *card,
2433 char *param_field)
2434{
2435
2436 param_field[0] = _ascebc['P'];
2437 param_field[1] = _ascebc['C'];
2438 param_field[2] = _ascebc['I'];
2439 param_field[3] = _ascebc['T'];
2440 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2441 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2442 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2443}
2444
2445static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2446 char *param_field)
2447{
2448 param_field[16] = _ascebc['B'];
2449 param_field[17] = _ascebc['L'];
2450 param_field[18] = _ascebc['K'];
2451 param_field[19] = _ascebc['T'];
2452 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2453 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2454 *((unsigned int *) (&param_field[28])) =
2455 card->info.blkt.inter_packet_jumbo;
2456}
2457
2458static int qeth_qdio_activate(struct qeth_card *card)
2459{
d11ba0c4 2460 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2461 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2462}
2463
2464static int qeth_dm_act(struct qeth_card *card)
2465{
2466 int rc;
2467 struct qeth_cmd_buffer *iob;
2468
d11ba0c4 2469 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2470
2471 iob = qeth_wait_for_buffer(&card->write);
2472 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2473
2474 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2475 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2476 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2477 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2478 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2479 return rc;
2480}
2481
2482static int qeth_mpc_initialize(struct qeth_card *card)
2483{
2484 int rc;
2485
d11ba0c4 2486 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2487
2488 rc = qeth_issue_next_read(card);
2489 if (rc) {
d11ba0c4 2490 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2491 return rc;
2492 }
2493 rc = qeth_cm_enable(card);
2494 if (rc) {
d11ba0c4 2495 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2496 goto out_qdio;
2497 }
2498 rc = qeth_cm_setup(card);
2499 if (rc) {
d11ba0c4 2500 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2501 goto out_qdio;
2502 }
2503 rc = qeth_ulp_enable(card);
2504 if (rc) {
d11ba0c4 2505 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2506 goto out_qdio;
2507 }
2508 rc = qeth_ulp_setup(card);
2509 if (rc) {
d11ba0c4 2510 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2511 goto out_qdio;
2512 }
2513 rc = qeth_alloc_qdio_buffers(card);
2514 if (rc) {
d11ba0c4 2515 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2516 goto out_qdio;
2517 }
2518 rc = qeth_qdio_establish(card);
2519 if (rc) {
d11ba0c4 2520 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2521 qeth_free_qdio_buffers(card);
2522 goto out_qdio;
2523 }
2524 rc = qeth_qdio_activate(card);
2525 if (rc) {
d11ba0c4 2526 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2527 goto out_qdio;
2528 }
2529 rc = qeth_dm_act(card);
2530 if (rc) {
d11ba0c4 2531 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2532 goto out_qdio;
2533 }
2534
2535 return 0;
2536out_qdio:
2537 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2538 return rc;
2539}
2540
2541static void qeth_print_status_with_portname(struct qeth_card *card)
2542{
2543 char dbf_text[15];
2544 int i;
2545
2546 sprintf(dbf_text, "%s", card->info.portname + 1);
2547 for (i = 0; i < 8; i++)
2548 dbf_text[i] =
2549 (char) _ebcasc[(__u8) dbf_text[i]];
2550 dbf_text[8] = 0;
74eacdb9 2551 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2552 "with link type %s (portname: %s)\n",
4a71df50
FB		 2553 qeth_get_cardname(card),
2554 (card->info.mcl_level[0]) ? " (level: " : "",
2555 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2556 (card->info.mcl_level[0]) ? ")" : "",
2557 qeth_get_cardname_short(card),
2558 dbf_text);
2559
2560}
2561
2562static void qeth_print_status_no_portname(struct qeth_card *card)
2563{
2564 if (card->info.portname[0])
74eacdb9 2565 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2566 "card%s%s%s\nwith link type %s "
2567 "(no portname needed by interface).\n",
4a71df50
FB		 2568 qeth_get_cardname(card),
2569 (card->info.mcl_level[0]) ? " (level: " : "",
2570 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2571 (card->info.mcl_level[0]) ? ")" : "",
2572 qeth_get_cardname_short(card));
2573 else
74eacdb9 2574 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2575 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2576 qeth_get_cardname(card),
2577 (card->info.mcl_level[0]) ? " (level: " : "",
2578 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2579 (card->info.mcl_level[0]) ? ")" : "",
2580 qeth_get_cardname_short(card));
2581}
2582
2583void qeth_print_status_message(struct qeth_card *card)
2584{
2585 switch (card->info.type) {
5113fec0
UB		 2586 case QETH_CARD_TYPE_OSD:
2587 case QETH_CARD_TYPE_OSM:
2588 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2589 /* VM will use a non-zero first character
2590 * to indicate a HiperSockets like reporting
2591 * of the level OSA sets the first character to zero
2592 * */
2593 if (!card->info.mcl_level[0]) {
2594 sprintf(card->info.mcl_level, "%02x%02x",
2595 card->info.mcl_level[2],
2596 card->info.mcl_level[3]);
2597
2598 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2599 break;
2600 }
2601 /* fallthrough */
2602 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2603 if ((card->info.guestlan) ||
2604 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2605 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2606 card->info.mcl_level[0]];
2607 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2608 card->info.mcl_level[1]];
2609 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2610 card->info.mcl_level[2]];
2611 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2612 card->info.mcl_level[3]];
2613 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2614 }
2615 break;
2616 default:
2617 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2618 }
2619 if (card->info.portname_required)
2620 qeth_print_status_with_portname(card);
2621 else
2622 qeth_print_status_no_portname(card);
2623}
2624EXPORT_SYMBOL_GPL(qeth_print_status_message);
2625
4a71df50
FB		 2626static void qeth_initialize_working_pool_list(struct qeth_card *card)
2627{
2628 struct qeth_buffer_pool_entry *entry;
2629
847a50fd 2630 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2631
2632 list_for_each_entry(entry,
2633 &card->qdio.init_pool.entry_list, init_list) {
2634 qeth_put_buffer_pool_entry(card, entry);
2635 }
2636}
2637
2638static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2639 struct qeth_card *card)
2640{
2641 struct list_head *plh;
2642 struct qeth_buffer_pool_entry *entry;
2643 int i, free;
2644 struct page *page;
2645
2646 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2647 return NULL;
2648
2649 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2650 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2651 free = 1;
2652 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2653 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2654 free = 0;
2655 break;
2656 }
2657 }
2658 if (free) {
2659 list_del_init(&entry->list);
2660 return entry;
2661 }
2662 }
2663
2664 /* no free buffer in pool so take first one and swap pages */
2665 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2666 struct qeth_buffer_pool_entry, list);
2667 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2668 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2669 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2670 if (!page) {
2671 return NULL;
2672 } else {
2673 free_page((unsigned long)entry->elements[i]);
2674 entry->elements[i] = page_address(page);
2675 if (card->options.performance_stats)
2676 card->perf_stats.sg_alloc_page_rx++;
2677 }
2678 }
2679 }
2680 list_del_init(&entry->list);
2681 return entry;
2682}
2683
2684static int qeth_init_input_buffer(struct qeth_card *card,
2685 struct qeth_qdio_buffer *buf)
2686{
2687 struct qeth_buffer_pool_entry *pool_entry;
2688 int i;
2689
b3332930
FB		 2690 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2691 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2692 if (!buf->rx_skb)
2693 return 1;
2694 }
2695
4a71df50
FB		 2696 pool_entry = qeth_find_free_buffer_pool_entry(card);
2697 if (!pool_entry)
2698 return 1;
2699
2700 /*
2701 * since the buffer is accessed only from the input_tasklet
2702 * there shouldn't be a need to synchronize; also, since we use
2703 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2704 * buffers
2705 */
4a71df50
FB		 2706
2707 buf->pool_entry = pool_entry;
2708 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2709 buf->buffer->element[i].length = PAGE_SIZE;
2710 buf->buffer->element[i].addr = pool_entry->elements[i];
2711 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2712 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2713 else
3ec90878
JG		 2714 buf->buffer->element[i].eflags = 0;
2715 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2716 }
2717 return 0;
2718}
2719
2720int qeth_init_qdio_queues(struct qeth_card *card)
2721{
2722 int i, j;
2723 int rc;
2724
d11ba0c4 2725 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2726
2727 /* inbound queue */
2728 memset(card->qdio.in_q->qdio_bufs, 0,
2729 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2730 qeth_initialize_working_pool_list(card);
2731 /*give only as many buffers to hardware as we have buffer pool entries*/
2732 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2733 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2734 card->qdio.in_q->next_buf_to_init =
2735 card->qdio.in_buf_pool.buf_count - 1;
2736 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2737 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2738 if (rc) {
d11ba0c4 2739 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2740 return rc;
2741 }
0da9581d
EL		 2742
2743 /* completion */
2744 rc = qeth_cq_init(card);
2745 if (rc) {
2746 return rc;
2747 }
2748
4a71df50
FB		 2749 /* outbound queue */
2750 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2751 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2752 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2753 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2754 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2755 card->qdio.out_qs[i]->bufs[j],
2756 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2757 }
2758 card->qdio.out_qs[i]->card = card;
2759 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2760 card->qdio.out_qs[i]->do_pack = 0;
2761 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2762 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2763 atomic_set(&card->qdio.out_qs[i]->state,
2764 QETH_OUT_Q_UNLOCKED);
2765 }
2766 return 0;
2767}
2768EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2769
2770static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2771{
2772 switch (link_type) {
2773 case QETH_LINK_TYPE_HSTR:
2774 return 2;
2775 default:
2776 return 1;
2777 }
2778}
2779
2780static void qeth_fill_ipacmd_header(struct qeth_card *card,
2781 struct qeth_ipa_cmd *cmd, __u8 command,
2782 enum qeth_prot_versions prot)
2783{
2784 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2785 cmd->hdr.command = command;
2786 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2787 cmd->hdr.seqno = card->seqno.ipa;
2788 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2789 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2790 if (card->options.layer2)
2791 cmd->hdr.prim_version_no = 2;
2792 else
2793 cmd->hdr.prim_version_no = 1;
2794 cmd->hdr.param_count = 1;
2795 cmd->hdr.prot_version = prot;
2796 cmd->hdr.ipa_supported = 0;
2797 cmd->hdr.ipa_enabled = 0;
2798}
2799
2800struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2801 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2802{
2803 struct qeth_cmd_buffer *iob;
2804 struct qeth_ipa_cmd *cmd;
2805
2806 iob = qeth_wait_for_buffer(&card->write);
2807 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2808 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2809
2810 return iob;
2811}
2812EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2813
2814void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2815 char prot_type)
2816{
2817 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2818 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2819 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2820 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2821}
2822EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2823
2824int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2825 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2826 unsigned long),
2827 void *reply_param)
2828{
2829 int rc;
2830 char prot_type;
4a71df50 2831
847a50fd 2832 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2833
2834 if (card->options.layer2)
2835 if (card->info.type == QETH_CARD_TYPE_OSN)
2836 prot_type = QETH_PROT_OSN2;
2837 else
2838 prot_type = QETH_PROT_LAYER2;
2839 else
2840 prot_type = QETH_PROT_TCPIP;
2841 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2842 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2843 iob, reply_cb, reply_param);
908abbb5
UB		 2844 if (rc == -ETIME) {
2845 qeth_clear_ipacmd_list(card);
2846 qeth_schedule_recovery(card);
2847 }
4a71df50
FB		 2848 return rc;
2849}
2850EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2851
4a71df50
FB		 2852int qeth_send_startlan(struct qeth_card *card)
2853{
2854 int rc;
70919e23 2855 struct qeth_cmd_buffer *iob;
4a71df50 2856
d11ba0c4 2857 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2858
70919e23
UB		 2859 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2860 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2861 return rc;
2862}
2863EXPORT_SYMBOL_GPL(qeth_send_startlan);
2864
4a71df50
FB		 2865int qeth_default_setadapterparms_cb(struct qeth_card *card,
2866 struct qeth_reply *reply, unsigned long data)
2867{
2868 struct qeth_ipa_cmd *cmd;
2869
847a50fd 2870 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2871
2872 cmd = (struct qeth_ipa_cmd *) data;
2873 if (cmd->hdr.return_code == 0)
2874 cmd->hdr.return_code =
2875 cmd->data.setadapterparms.hdr.return_code;
2876 return 0;
2877}
2878EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2879
2880static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2881 struct qeth_reply *reply, unsigned long data)
2882{
2883 struct qeth_ipa_cmd *cmd;
2884
847a50fd 2885 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2886
2887 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2888 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2889 card->info.link_type =
2890 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2891 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2892 }
4a71df50
FB		 2893 card->options.adp.supported_funcs =
2894 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2895 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2896}
2897
2898struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2899 __u32 command, __u32 cmdlen)
2900{
2901 struct qeth_cmd_buffer *iob;
2902 struct qeth_ipa_cmd *cmd;
2903
2904 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2905 QETH_PROT_IPV4);
2906 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2907 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2908 cmd->data.setadapterparms.hdr.command_code = command;
2909 cmd->data.setadapterparms.hdr.used_total = 1;
2910 cmd->data.setadapterparms.hdr.seq_no = 1;
2911
2912 return iob;
2913}
2914EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2915
2916int qeth_query_setadapterparms(struct qeth_card *card)
2917{
2918 int rc;
2919 struct qeth_cmd_buffer *iob;
2920
847a50fd 2921 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2922 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2923 sizeof(struct qeth_ipacmd_setadpparms));
2924 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2925 return rc;
2926}
2927EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2928
1da74b1c
FB		 2929static int qeth_query_ipassists_cb(struct qeth_card *card,
2930 struct qeth_reply *reply, unsigned long data)
2931{
2932 struct qeth_ipa_cmd *cmd;
2933
2934 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2935
2936 cmd = (struct qeth_ipa_cmd *) data;
2937 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2938 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2939 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2940 } else {
2941 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2942 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2943 }
2944 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2945 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2946 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2947 return 0;
2948}
2949
2950int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2951{
2952 int rc;
2953 struct qeth_cmd_buffer *iob;
2954
2955 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2956 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2957 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2958 return rc;
2959}
2960EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2961
2962static int qeth_query_setdiagass_cb(struct qeth_card *card,
2963 struct qeth_reply *reply, unsigned long data)
2964{
2965 struct qeth_ipa_cmd *cmd;
2966 __u16 rc;
2967
2968 cmd = (struct qeth_ipa_cmd *)data;
2969 rc = cmd->hdr.return_code;
2970 if (rc)
2971 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2972 else
2973 card->info.diagass_support = cmd->data.diagass.ext;
2974 return 0;
2975}
2976
2977static int qeth_query_setdiagass(struct qeth_card *card)
2978{
2979 struct qeth_cmd_buffer *iob;
2980 struct qeth_ipa_cmd *cmd;
2981
2982 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2983 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2984 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2985 cmd->data.diagass.subcmd_len = 16;
2986 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2987 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2988}
2989
2990static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2991{
2992 unsigned long info = get_zeroed_page(GFP_KERNEL);
2993 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2994 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2995 struct ccw_dev_id ccwid;
2996 int level, rc;
2997
2998 tid->chpid = card->info.chpid;
2999 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3000 tid->ssid = ccwid.ssid;
3001 tid->devno = ccwid.devno;
3002 if (!info)
3003 return;
3004
3005 rc = stsi(NULL, 0, 0, 0);
3006 if (rc == -ENOSYS)
3007 level = rc;
3008 else
3009 level = (((unsigned int) rc) >> 28);
3010
3011 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
3012 tid->lparnr = info222->lpar_number;
3013
3014 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
3015 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3016 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3017 }
3018 free_page(info);
3019 return;
3020}
3021
3022static int qeth_hw_trap_cb(struct qeth_card *card,
3023 struct qeth_reply *reply, unsigned long data)
3024{
3025 struct qeth_ipa_cmd *cmd;
3026 __u16 rc;
3027
3028 cmd = (struct qeth_ipa_cmd *)data;
3029 rc = cmd->hdr.return_code;
3030 if (rc)
3031 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3032 return 0;
3033}
3034
3035int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3036{
3037 struct qeth_cmd_buffer *iob;
3038 struct qeth_ipa_cmd *cmd;
3039
3040 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3041 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3042 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3043 cmd->data.diagass.subcmd_len = 80;
3044 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3045 cmd->data.diagass.type = 1;
3046 cmd->data.diagass.action = action;
3047 switch (action) {
3048 case QETH_DIAGS_TRAP_ARM:
3049 cmd->data.diagass.options = 0x0003;
3050 cmd->data.diagass.ext = 0x00010000 +
3051 sizeof(struct qeth_trap_id);
3052 qeth_get_trap_id(card,
3053 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3054 break;
3055 case QETH_DIAGS_TRAP_DISARM:
3056 cmd->data.diagass.options = 0x0001;
3057 break;
3058 case QETH_DIAGS_TRAP_CAPTURE:
3059 break;
3060 }
3061 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3062}
3063EXPORT_SYMBOL_GPL(qeth_hw_trap);
3064
76b11f8e
UB		 3065int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3066 unsigned int qdio_error, const char *dbftext)
4a71df50 3067{
779e6e1c 3068 if (qdio_error) {
847a50fd 3069 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3070 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3071 buf->element[15].sflags);
38593d01 3072 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3073 buf->element[14].sflags);
38593d01 3074 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3075 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3076 card->stats.rx_dropped++;
3077 return 0;
3078 } else
3079 return 1;
4a71df50
FB		 3080 }
3081 return 0;
3082}
3083EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3084
b3332930
FB		 3085void qeth_buffer_reclaim_work(struct work_struct *work)
3086{
3087 struct qeth_card *card = container_of(work, struct qeth_card,
3088 buffer_reclaim_work.work);
3089
3090 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3091 qeth_queue_input_buffer(card, card->reclaim_index);
3092}
3093
4a71df50
FB		 3094void qeth_queue_input_buffer(struct qeth_card *card, int index)
3095{
3096 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3097 struct list_head *lh;
4a71df50
FB		 3098 int count;
3099 int i;
3100 int rc;
3101 int newcount = 0;
3102
4a71df50
FB		 3103 count = (index < queue->next_buf_to_init)?
3104 card->qdio.in_buf_pool.buf_count -
3105 (queue->next_buf_to_init - index) :
3106 card->qdio.in_buf_pool.buf_count -
3107 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3108 /* only requeue at a certain threshold to avoid SIGAs */
3109 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3110 for (i = queue->next_buf_to_init;
3111 i < queue->next_buf_to_init + count; ++i) {
3112 if (qeth_init_input_buffer(card,
3113 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3114 break;
3115 } else {
3116 newcount++;
3117 }
3118 }
3119
3120 if (newcount < count) {
3121 /* we are in memory shortage so we switch back to
3122 traditional skb allocation and drop packages */
4a71df50
FB		 3123 atomic_set(&card->force_alloc_skb, 3);
3124 count = newcount;
3125 } else {
4a71df50
FB		 3126 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3127 }
3128
b3332930
FB		 3129 if (!count) {
3130 i = 0;
3131 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3132 i++;
3133 if (i == card->qdio.in_buf_pool.buf_count) {
3134 QETH_CARD_TEXT(card, 2, "qsarbw");
3135 card->reclaim_index = index;
3136 schedule_delayed_work(
3137 &card->buffer_reclaim_work,
3138 QETH_RECLAIM_WORK_TIME);
3139 }
3140 return;
3141 }
3142
4a71df50
FB		 3143 /*
3144 * according to old code it should be avoided to requeue all
3145 * 128 buffers in order to benefit from PCI avoidance.
3146 * this function keeps at least one buffer (the buffer at
3147 * 'index') un-requeued -> this buffer is the first buffer that
3148 * will be requeued the next time
3149 */
3150 if (card->options.performance_stats) {
3151 card->perf_stats.inbound_do_qdio_cnt++;
3152 card->perf_stats.inbound_do_qdio_start_time =
3153 qeth_get_micros();
3154 }
779e6e1c
JG		 3155 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3156 queue->next_buf_to_init, count);
4a71df50
FB		 3157 if (card->options.performance_stats)
3158 card->perf_stats.inbound_do_qdio_time +=
3159 qeth_get_micros() -
3160 card->perf_stats.inbound_do_qdio_start_time;
3161 if (rc) {
847a50fd 3162 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3163 }
3164 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3165 QDIO_MAX_BUFFERS_PER_Q;
3166 }
3167}
3168EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3169
3170static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3171 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3172{
3ec90878 3173 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3174
847a50fd 3175 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3176 if (card->info.type == QETH_CARD_TYPE_IQD) {
3177 if (sbalf15 == 0) {
3178 qdio_err = 0;
3179 } else {
3180 qdio_err = 1;
3181 }
3182 }
76b11f8e 3183 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3184
3185 if (!qdio_err)
4a71df50 3186 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3187
3188 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3189 return QETH_SEND_ERROR_RETRY;
3190
847a50fd
CO		 3191 QETH_CARD_TEXT(card, 1, "lnkfail");
3192 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3193 (u16)qdio_err, (u8)sbalf15);
3194 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3195}
3196
3197/*
3198 * Switched to packing state if the number of used buffers on a queue
3199 * reaches a certain limit.
3200 */
3201static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3202{
3203 if (!queue->do_pack) {
3204 if (atomic_read(&queue->used_buffers)
3205 >= QETH_HIGH_WATERMARK_PACK){
3206 /* switch non-PACKING -> PACKING */
847a50fd 3207 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3208 if (queue->card->options.performance_stats)
3209 queue->card->perf_stats.sc_dp_p++;
3210 queue->do_pack = 1;
3211 }
3212 }
3213}
3214
3215/*
3216 * Switches from packing to non-packing mode. If there is a packing
3217 * buffer on the queue this buffer will be prepared to be flushed.
3218 * In that case 1 is returned to inform the caller. If no buffer
3219 * has to be flushed, zero is returned.
3220 */
3221static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3222{
3223 struct qeth_qdio_out_buffer *buffer;
3224 int flush_count = 0;
3225
3226 if (queue->do_pack) {
3227 if (atomic_read(&queue->used_buffers)
3228 <= QETH_LOW_WATERMARK_PACK) {
3229 /* switch PACKING -> non-PACKING */
847a50fd 3230 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3231 if (queue->card->options.performance_stats)
3232 queue->card->perf_stats.sc_p_dp++;
3233 queue->do_pack = 0;
3234 /* flush packing buffers */
0da9581d 3235 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3236 if ((atomic_read(&buffer->state) ==
3237 QETH_QDIO_BUF_EMPTY) &&
3238 (buffer->next_element_to_fill > 0)) {
3239 atomic_set(&buffer->state,
0da9581d 3240 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3241 flush_count++;
3242 queue->next_buf_to_fill =
3243 (queue->next_buf_to_fill + 1) %
3244 QDIO_MAX_BUFFERS_PER_Q;
3245 }
3246 }
3247 }
3248 return flush_count;
3249}
3250
0da9581d 3251
4a71df50
FB		 3252/*
3253 * Called to flush a packing buffer if no more pci flags are on the queue.
3254 * Checks if there is a packing buffer and prepares it to be flushed.
3255 * In that case returns 1, otherwise zero.
3256 */
3257static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3258{
3259 struct qeth_qdio_out_buffer *buffer;
3260
0da9581d 3261 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3262 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3263 (buffer->next_element_to_fill > 0)) {
3264 /* it's a packing buffer */
3265 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3266 queue->next_buf_to_fill =
3267 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3268 return 1;
3269 }
3270 return 0;
3271}
3272
779e6e1c
JG		 3273static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3274 int count)
4a71df50
FB		 3275{
3276 struct qeth_qdio_out_buffer *buf;
3277 int rc;
3278 int i;
3279 unsigned int qdio_flags;
3280
4a71df50 3281 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3282 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3283 buf = queue->bufs[bidx];
3ec90878
JG		 3284 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3285 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3286
0da9581d
EL		 3287 if (queue->bufstates)
3288 queue->bufstates[bidx].user = buf;
3289
4a71df50
FB		 3290 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3291 continue;
3292
3293 if (!queue->do_pack) {
3294 if ((atomic_read(&queue->used_buffers) >=
3295 (QETH_HIGH_WATERMARK_PACK -
3296 QETH_WATERMARK_PACK_FUZZ)) &&
3297 !atomic_read(&queue->set_pci_flags_count)) {
3298 /* it's likely that we'll go to packing
3299 * mode soon */
3300 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3301 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3302 }
3303 } else {
3304 if (!atomic_read(&queue->set_pci_flags_count)) {
3305 /*
3306 * there's no outstanding PCI any more, so we
3307 * have to request a PCI to be sure the the PCI
3308 * will wake at some time in the future then we
3309 * can flush packed buffers that might still be
3310 * hanging around, which can happen if no
3311 * further send was requested by the stack
3312 */
3313 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3314 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3315 }
3316 }
3317 }
3318
3319 queue->card->dev->trans_start = jiffies;
3320 if (queue->card->options.performance_stats) {
3321 queue->card->perf_stats.outbound_do_qdio_cnt++;
3322 queue->card->perf_stats.outbound_do_qdio_start_time =
3323 qeth_get_micros();
3324 }
3325 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3326 if (atomic_read(&queue->set_pci_flags_count))
3327 qdio_flags |= QDIO_FLAG_PCI_OUT;
3328 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3329 queue->queue_no, index, count);
4a71df50
FB		 3330 if (queue->card->options.performance_stats)
3331 queue->card->perf_stats.outbound_do_qdio_time +=
3332 qeth_get_micros() -
3333 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3334 atomic_add(count, &queue->used_buffers);
4a71df50 3335 if (rc) {
d303b6fd
JG		 3336 queue->card->stats.tx_errors += count;
3337 /* ignore temporary SIGA errors without busy condition */
3338 if (rc == QDIO_ERROR_SIGA_TARGET)
3339 return;
847a50fd 3340 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3341 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3342 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3343 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3344 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3345
4a71df50
FB		 3346 /* this must not happen under normal circumstances. if it
3347 * happens something is really wrong -> recover */
3348 qeth_schedule_recovery(queue->card);
3349 return;
3350 }
4a71df50
FB		 3351 if (queue->card->options.performance_stats)
3352 queue->card->perf_stats.bufs_sent += count;
3353}
3354
3355static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3356{
3357 int index;
3358 int flush_cnt = 0;
3359 int q_was_packing = 0;
3360
3361 /*
3362 * check if weed have to switch to non-packing mode or if
3363 * we have to get a pci flag out on the queue
3364 */
3365 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3366 !atomic_read(&queue->set_pci_flags_count)) {
3367 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3368 QETH_OUT_Q_UNLOCKED) {
3369 /*
3370 * If we get in here, there was no action in
3371 * do_send_packet. So, we check if there is a
3372 * packing buffer to be flushed here.
3373 */
3374 netif_stop_queue(queue->card->dev);
3375 index = queue->next_buf_to_fill;
3376 q_was_packing = queue->do_pack;
3377 /* queue->do_pack may change */
3378 barrier();
3379 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3380 if (!flush_cnt &&
3381 !atomic_read(&queue->set_pci_flags_count))
3382 flush_cnt +=
3383 qeth_flush_buffers_on_no_pci(queue);
3384 if (queue->card->options.performance_stats &&
3385 q_was_packing)
3386 queue->card->perf_stats.bufs_sent_pack +=
3387 flush_cnt;
3388 if (flush_cnt)
779e6e1c 3389 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3390 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3391 }
3392 }
3393}
3394
a1c3ed4c
FB		 3395void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3396 unsigned long card_ptr)
3397{
3398 struct qeth_card *card = (struct qeth_card *)card_ptr;
3399
0cffef48 3400 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3401 napi_schedule(&card->napi);
3402}
3403EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3404
0da9581d
EL		 3405int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3406{
3407 int rc;
3408
3409 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3410 rc = -1;
3411 goto out;
3412 } else {
3413 if (card->options.cq == cq) {
3414 rc = 0;
3415 goto out;
3416 }
3417
3418 if (card->state != CARD_STATE_DOWN &&
3419 card->state != CARD_STATE_RECOVER) {
3420 rc = -1;
3421 goto out;
3422 }
3423
3424 qeth_free_qdio_buffers(card);
3425 card->options.cq = cq;
3426 rc = 0;
3427 }
3428out:
3429 return rc;
3430
3431}
3432EXPORT_SYMBOL_GPL(qeth_configure_cq);
3433
3434
3435static void qeth_qdio_cq_handler(struct qeth_card *card,
3436 unsigned int qdio_err,
3437 unsigned int queue, int first_element, int count) {
3438 struct qeth_qdio_q *cq = card->qdio.c_q;
3439 int i;
3440 int rc;
3441
3442 if (!qeth_is_cq(card, queue))
3443 goto out;
3444
3445 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3446 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3447 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3448
3449 if (qdio_err) {
3450 netif_stop_queue(card->dev);
3451 qeth_schedule_recovery(card);
3452 goto out;
3453 }
3454
3455 if (card->options.performance_stats) {
3456 card->perf_stats.cq_cnt++;
3457 card->perf_stats.cq_start_time = qeth_get_micros();
3458 }
3459
3460 for (i = first_element; i < first_element + count; ++i) {
3461 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3462 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3463 int e;
3464
3465 e = 0;
3466 while (buffer->element[e].addr) {
3467 unsigned long phys_aob_addr;
3468
3469 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3470 qeth_qdio_handle_aob(card, phys_aob_addr);
3471 buffer->element[e].addr = NULL;
3472 buffer->element[e].eflags = 0;
3473 buffer->element[e].sflags = 0;
3474 buffer->element[e].length = 0;
3475
3476 ++e;
3477 }
3478
3479 buffer->element[15].eflags = 0;
3480 buffer->element[15].sflags = 0;
3481 }
3482 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3483 card->qdio.c_q->next_buf_to_init,
3484 count);
3485 if (rc) {
3486 dev_warn(&card->gdev->dev,
3487 "QDIO reported an error, rc=%i\n", rc);
3488 QETH_CARD_TEXT(card, 2, "qcqherr");
3489 }
3490 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3491 + count) % QDIO_MAX_BUFFERS_PER_Q;
3492
3493 netif_wake_queue(card->dev);
3494
3495 if (card->options.performance_stats) {
3496 int delta_t = qeth_get_micros();
3497 delta_t -= card->perf_stats.cq_start_time;
3498 card->perf_stats.cq_time += delta_t;
3499 }
3500out:
3501 return;
3502}
3503
a1c3ed4c 3504void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3505 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3506 unsigned long card_ptr)
3507{
3508 struct qeth_card *card = (struct qeth_card *)card_ptr;
3509
0da9581d
EL		 3510 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3511 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3512
3513 if (qeth_is_cq(card, queue))
3514 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3515 else if (qdio_err)
a1c3ed4c 3516 qeth_schedule_recovery(card);
0da9581d
EL		 3517
3518
a1c3ed4c
FB		 3519}
3520EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3521
779e6e1c
JG		 3522void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3523 unsigned int qdio_error, int __queue, int first_element,
3524 int count, unsigned long card_ptr)
4a71df50
FB		 3525{
3526 struct qeth_card *card = (struct qeth_card *) card_ptr;
3527 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3528 struct qeth_qdio_out_buffer *buffer;
3529 int i;
3530
847a50fd 3531 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 3532 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 3533 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3534 netif_stop_queue(card->dev);
3535 qeth_schedule_recovery(card);
3536 return;
4a71df50
FB		 3537 }
3538 if (card->options.performance_stats) {
3539 card->perf_stats.outbound_handler_cnt++;
3540 card->perf_stats.outbound_handler_start_time =
3541 qeth_get_micros();
3542 }
3543 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3544 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3545 buffer = queue->bufs[bidx];
b67d801f 3546 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3547
3548 if (queue->bufstates &&
3549 (queue->bufstates[bidx].flags &
3550 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
b3332930
FB		 3551 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3552
3553 if (atomic_cmpxchg(&buffer->state,
3554 QETH_QDIO_BUF_PRIMED,
3555 QETH_QDIO_BUF_PENDING) ==
3556 QETH_QDIO_BUF_PRIMED) {
3557 qeth_notify_skbs(queue, buffer,
3558 TX_NOTIFY_PENDING);
3559 }
0da9581d
EL		 3560 buffer->aob = queue->bufstates[bidx].aob;
3561 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3562 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3563 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3564 virt_to_phys(buffer->aob));
3565 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
b3332930
FB		 3566 if (qeth_init_qdio_out_buf(queue, bidx)) {
3567 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3568 qeth_schedule_recovery(card);
b3332930 3569 }
0da9581d 3570 } else {
b3332930
FB		 3571 if (card->options.cq == QETH_CQ_ENABLED) {
3572 enum iucv_tx_notify n;
3573
3574 n = qeth_compute_cq_notification(
3575 buffer->buffer->element[15].sflags, 0);
3576 qeth_notify_skbs(queue, buffer, n);
3577 }
3578
0da9581d
EL		 3579 qeth_clear_output_buffer(queue, buffer,
3580 QETH_QDIO_BUF_EMPTY);
3581 }
3582 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3583 }
3584 atomic_sub(count, &queue->used_buffers);
3585 /* check if we need to do something on this outbound queue */
3586 if (card->info.type != QETH_CARD_TYPE_IQD)
3587 qeth_check_outbound_queue(queue);
3588
3589 netif_wake_queue(queue->card->dev);
3590 if (card->options.performance_stats)
3591 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3592 card->perf_stats.outbound_handler_start_time;
3593}
3594EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3595
4a71df50
FB		 3596int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3597 int ipv, int cast_type)
3598{
5113fec0
UB		 3599 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3600 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3601 return card->qdio.default_out_queue;
3602 switch (card->qdio.no_out_queues) {
3603 case 4:
3604 if (cast_type && card->info.is_multicast_different)
3605 return card->info.is_multicast_different &
3606 (card->qdio.no_out_queues - 1);
3607 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3608 const u8 tos = ip_hdr(skb)->tos;
3609
3610 if (card->qdio.do_prio_queueing ==
3611 QETH_PRIO_Q_ING_TOS) {
3612 if (tos & IP_TOS_NOTIMPORTANT)
3613 return 3;
3614 if (tos & IP_TOS_HIGHRELIABILITY)
3615 return 2;
3616 if (tos & IP_TOS_HIGHTHROUGHPUT)
3617 return 1;
3618 if (tos & IP_TOS_LOWDELAY)
3619 return 0;
3620 }
3621 if (card->qdio.do_prio_queueing ==
3622 QETH_PRIO_Q_ING_PREC)
3623 return 3 - (tos >> 6);
3624 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3625 /* TODO: IPv6!!! */
3626 }
3627 return card->qdio.default_out_queue;
3628 case 1: /* fallthrough for single-out-queue 1920-device */
3629 default:
3630 return card->qdio.default_out_queue;
3631 }
3632}
3633EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3634
4a71df50
FB		 3635int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3636 struct sk_buff *skb, int elems)
3637{
51aa165c
FB		 3638 int dlen = skb->len - skb->data_len;
3639 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3640 PFN_DOWN((unsigned long)skb->data);
4a71df50 3641
51aa165c 3642 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3643 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3644 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3645 "(Number=%d / Length=%d). Discarded.\n",
3646 (elements_needed+elems), skb->len);
3647 return 0;
3648 }
3649 return elements_needed;
3650}
3651EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3652
51aa165c
FB		 3653int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3654{
3655 int hroom, inpage, rest;
3656
3657 if (((unsigned long)skb->data & PAGE_MASK) !=
3658 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3659 hroom = skb_headroom(skb);
3660 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3661 rest = len - inpage;
3662 if (rest > hroom)
3663 return 1;
3664 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3665 skb->data -= rest;
3666 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3667 }
3668 return 0;
3669}
3670EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3671
f90b744e 3672static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3673 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3674 int offset)
4a71df50 3675{
51aa165c 3676 int length = skb->len - skb->data_len;
4a71df50
FB		 3677 int length_here;
3678 int element;
3679 char *data;
51aa165c
FB		 3680 int first_lap, cnt;
3681 struct skb_frag_struct *frag;
4a71df50
FB		 3682
3683 element = *next_element_to_fill;
3684 data = skb->data;
3685 first_lap = (is_tso == 0 ? 1 : 0);
3686
683d718a
FB		 3687 if (offset >= 0) {
3688 data = skb->data + offset;
e1f03ae8 3689 length -= offset;
683d718a
FB		 3690 first_lap = 0;
3691 }
3692
4a71df50
FB		 3693 while (length > 0) {
3694 /* length_here is the remaining amount of data in this page */
3695 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3696 if (length < length_here)
3697 length_here = length;
3698
3699 buffer->element[element].addr = data;
3700 buffer->element[element].length = length_here;
3701 length -= length_here;
3702 if (!length) {
3703 if (first_lap)
51aa165c 3704 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3705 buffer->element[element].eflags =
3706 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3707 else
3ec90878 3708 buffer->element[element].eflags = 0;
4a71df50 3709 else
3ec90878
JG		 3710 buffer->element[element].eflags =
3711 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3712 } else {
3713 if (first_lap)
3ec90878
JG		 3714 buffer->element[element].eflags =
3715 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3716 else
3ec90878
JG		 3717 buffer->element[element].eflags =
3718 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3719 }
3720 data += length_here;
3721 element++;
3722 first_lap = 0;
3723 }
51aa165c
FB		 3724
3725 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3726 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3727 buffer->element[element].addr = (char *)
3728 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3729 + frag->page_offset;
3730 buffer->element[element].length = frag->size;
3ec90878 3731 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3732 element++;
3733 }
3734
3ec90878
JG		 3735 if (buffer->element[element - 1].eflags)
3736 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3737 *next_element_to_fill = element;
3738}
3739
f90b744e 3740static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3741 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3742 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3743{
3744 struct qdio_buffer *buffer;
4a71df50
FB		 3745 int flush_cnt = 0, hdr_len, large_send = 0;
3746
4a71df50
FB		 3747 buffer = buf->buffer;
3748 atomic_inc(&skb->users);
3749 skb_queue_tail(&buf->skb_list, skb);
3750
4a71df50 3751 /*check first on TSO ....*/
683d718a 3752 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3753 int element = buf->next_element_to_fill;
3754
683d718a
FB		 3755 hdr_len = sizeof(struct qeth_hdr_tso) +
3756 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3757 /*fill first buffer entry only with header information */
3758 buffer->element[element].addr = skb->data;
3759 buffer->element[element].length = hdr_len;
3ec90878 3760 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3761 buf->next_element_to_fill++;
3762 skb->data += hdr_len;
3763 skb->len -= hdr_len;
3764 large_send = 1;
3765 }
683d718a
FB		 3766
3767 if (offset >= 0) {
3768 int element = buf->next_element_to_fill;
3769 buffer->element[element].addr = hdr;
3770 buffer->element[element].length = sizeof(struct qeth_hdr) +
3771 hd_len;
3ec90878 3772 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3773 buf->is_header[element] = 1;
3774 buf->next_element_to_fill++;
3775 }
3776
51aa165c
FB		 3777 __qeth_fill_buffer(skb, buffer, large_send,
3778 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3779
3780 if (!queue->do_pack) {
847a50fd 3781 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3782 /* set state to PRIMED -> will be flushed */
3783 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3784 flush_cnt = 1;
3785 } else {
847a50fd 3786 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3787 if (queue->card->options.performance_stats)
3788 queue->card->perf_stats.skbs_sent_pack++;
3789 if (buf->next_element_to_fill >=
3790 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3791 /*
3792 * packed buffer if full -> set state PRIMED
3793 * -> will be flushed
3794 */
3795 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3796 flush_cnt = 1;
3797 }
3798 }
3799 return flush_cnt;
3800}
3801
3802int qeth_do_send_packet_fast(struct qeth_card *card,
3803 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3804 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3805 int offset, int hd_len)
4a71df50
FB		 3806{
3807 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3808 int index;
3809
4a71df50
FB		 3810 /* spin until we get the queue ... */
3811 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3812 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3813 /* ... now we've got the queue */
3814 index = queue->next_buf_to_fill;
0da9581d 3815 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3816 /*
3817 * check if buffer is empty to make sure that we do not 'overtake'
3818 * ourselves and try to fill a buffer that is already primed
3819 */
3820 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3821 goto out;
64ef8957 3822 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3823 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3824 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3825 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3826 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3827 return 0;
3828out:
3829 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3830 return -EBUSY;
3831}
3832EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3833
3834int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3835 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3836 int elements_needed)
4a71df50
FB		 3837{
3838 struct qeth_qdio_out_buffer *buffer;
3839 int start_index;
3840 int flush_count = 0;
3841 int do_pack = 0;
3842 int tmp;
3843 int rc = 0;
3844
4a71df50
FB		 3845 /* spin until we get the queue ... */
3846 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3847 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3848 start_index = queue->next_buf_to_fill;
0da9581d 3849 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3850 /*
3851 * check if buffer is empty to make sure that we do not 'overtake'
3852 * ourselves and try to fill a buffer that is already primed
3853 */
3854 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3855 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3856 return -EBUSY;
3857 }
3858 /* check if we need to switch packing state of this queue */
3859 qeth_switch_to_packing_if_needed(queue);
3860 if (queue->do_pack) {
3861 do_pack = 1;
64ef8957
FB		 3862 /* does packet fit in current buffer? */
3863 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3864 buffer->next_element_to_fill) < elements_needed) {
3865 /* ... no -> set state PRIMED */
3866 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3867 flush_count++;
3868 queue->next_buf_to_fill =
3869 (queue->next_buf_to_fill + 1) %
3870 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3871 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3872 /* we did a step forward, so check buffer state
3873 * again */
3874 if (atomic_read(&buffer->state) !=
3875 QETH_QDIO_BUF_EMPTY) {
3876 qeth_flush_buffers(queue, start_index,
779e6e1c 3877 flush_count);
64ef8957 3878 atomic_set(&queue->state,
4a71df50 3879 QETH_OUT_Q_UNLOCKED);
64ef8957 3880 return -EBUSY;
4a71df50
FB		 3881 }
3882 }
3883 }
64ef8957 3884 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3885 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3886 QDIO_MAX_BUFFERS_PER_Q;
3887 flush_count += tmp;
4a71df50 3888 if (flush_count)
779e6e1c 3889 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3890 else if (!atomic_read(&queue->set_pci_flags_count))
3891 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3892 /*
3893 * queue->state will go from LOCKED -> UNLOCKED or from
3894 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3895 * (switch packing state or flush buffer to get another pci flag out).
3896 * In that case we will enter this loop
3897 */
3898 while (atomic_dec_return(&queue->state)) {
3899 flush_count = 0;
3900 start_index = queue->next_buf_to_fill;
3901 /* check if we can go back to non-packing state */
3902 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3903 /*
3904 * check if we need to flush a packing buffer to get a pci
3905 * flag out on the queue
3906 */
3907 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3908 flush_count += qeth_flush_buffers_on_no_pci(queue);
3909 if (flush_count)
779e6e1c 3910 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3911 }
3912 /* at this point the queue is UNLOCKED again */
3913 if (queue->card->options.performance_stats && do_pack)
3914 queue->card->perf_stats.bufs_sent_pack += flush_count;
3915
3916 return rc;
3917}
3918EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3919
3920static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3921 struct qeth_reply *reply, unsigned long data)
3922{
3923 struct qeth_ipa_cmd *cmd;
3924 struct qeth_ipacmd_setadpparms *setparms;
3925
847a50fd 3926 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3927
3928 cmd = (struct qeth_ipa_cmd *) data;
3929 setparms = &(cmd->data.setadapterparms);
3930
3931 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3932 if (cmd->hdr.return_code) {
847a50fd 3933 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3934 setparms->data.mode = SET_PROMISC_MODE_OFF;
3935 }
3936 card->info.promisc_mode = setparms->data.mode;
3937 return 0;
3938}
3939
3940void qeth_setadp_promisc_mode(struct qeth_card *card)
3941{
3942 enum qeth_ipa_promisc_modes mode;
3943 struct net_device *dev = card->dev;
3944 struct qeth_cmd_buffer *iob;
3945 struct qeth_ipa_cmd *cmd;
3946
847a50fd 3947 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3948
3949 if (((dev->flags & IFF_PROMISC) &&
3950 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3951 (!(dev->flags & IFF_PROMISC) &&
3952 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3953 return;
3954 mode = SET_PROMISC_MODE_OFF;
3955 if (dev->flags & IFF_PROMISC)
3956 mode = SET_PROMISC_MODE_ON;
847a50fd 3957 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3958
3959 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3960 sizeof(struct qeth_ipacmd_setadpparms));
3961 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3962 cmd->data.setadapterparms.data.mode = mode;
3963 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3964}
3965EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3966
3967int qeth_change_mtu(struct net_device *dev, int new_mtu)
3968{
3969 struct qeth_card *card;
3970 char dbf_text[15];
3971
509e2562 3972 card = dev->ml_priv;
4a71df50 3973
847a50fd 3974 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3975 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3976 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3977
3978 if (new_mtu < 64)
3979 return -EINVAL;
3980 if (new_mtu > 65535)
3981 return -EINVAL;
3982 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3983 (!qeth_mtu_is_valid(card, new_mtu)))
3984 return -EINVAL;
3985 dev->mtu = new_mtu;
3986 return 0;
3987}
3988EXPORT_SYMBOL_GPL(qeth_change_mtu);
3989
3990struct net_device_stats *qeth_get_stats(struct net_device *dev)
3991{
3992 struct qeth_card *card;
3993
509e2562 3994 card = dev->ml_priv;
4a71df50 3995
847a50fd 3996 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 3997
3998 return &card->stats;
3999}
4000EXPORT_SYMBOL_GPL(qeth_get_stats);
4001
4002static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4003 struct qeth_reply *reply, unsigned long data)
4004{
4005 struct qeth_ipa_cmd *cmd;
4006
847a50fd 4007 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4008
4009 cmd = (struct qeth_ipa_cmd *) data;
4010 if (!card->options.layer2 ||
4011 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4012 memcpy(card->dev->dev_addr,
4013 &cmd->data.setadapterparms.data.change_addr.addr,
4014 OSA_ADDR_LEN);
4015 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4016 }
4017 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4018 return 0;
4019}
4020
4021int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4022{
4023 int rc;
4024 struct qeth_cmd_buffer *iob;
4025 struct qeth_ipa_cmd *cmd;
4026
847a50fd 4027 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4028
4029 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4030 sizeof(struct qeth_ipacmd_setadpparms));
4031 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4032 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4033 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4034 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4035 card->dev->dev_addr, OSA_ADDR_LEN);
4036 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4037 NULL);
4038 return rc;
4039}
4040EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4041
d64ecc22
EL		 4042static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4043 struct qeth_reply *reply, unsigned long data)
4044{
4045 struct qeth_ipa_cmd *cmd;
4046 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4047
847a50fd 4048 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4049
4050 cmd = (struct qeth_ipa_cmd *) data;
4051 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4052 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4053 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4054 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4055 cmd->data.setadapterparms.hdr.return_code);
4056 switch (cmd->data.setadapterparms.hdr.return_code) {
4057 case SET_ACCESS_CTRL_RC_SUCCESS:
4058 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4059 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4060 {
4061 card->options.isolation = access_ctrl_req->subcmd_code;
4062 if (card->options.isolation == ISOLATION_MODE_NONE) {
4063 dev_info(&card->gdev->dev,
4064 "QDIO data connection isolation is deactivated\n");
4065 } else {
4066 dev_info(&card->gdev->dev,
4067 "QDIO data connection isolation is activated\n");
4068 }
4069 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4070 card->gdev->dev.kobj.name,
4071 access_ctrl_req->subcmd_code,
4072 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4073 break;
4074 }
4075 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4076 {
4077 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4078 card->gdev->dev.kobj.name,
4079 access_ctrl_req->subcmd_code,
4080 cmd->data.setadapterparms.hdr.return_code);
4081 dev_err(&card->gdev->dev, "Adapter does not "
4082 "support QDIO data connection isolation\n");
4083
4084 /* ensure isolation mode is "none" */
4085 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4086 break;
4087 }
4088 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4089 {
4090 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4091 card->gdev->dev.kobj.name,
4092 access_ctrl_req->subcmd_code,
4093 cmd->data.setadapterparms.hdr.return_code);
4094 dev_err(&card->gdev->dev,
4095 "Adapter is dedicated. "
4096 "QDIO data connection isolation not supported\n");
4097
4098 /* ensure isolation mode is "none" */
4099 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4100 break;
4101 }
4102 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4103 {
4104 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4105 card->gdev->dev.kobj.name,
4106 access_ctrl_req->subcmd_code,
4107 cmd->data.setadapterparms.hdr.return_code);
4108 dev_err(&card->gdev->dev,
4109 "TSO does not permit QDIO data connection isolation\n");
4110
4111 /* ensure isolation mode is "none" */
4112 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4113 break;
4114 }
4115 default:
4116 {
4117 /* this should never happen */
4118 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4119 "==UNKNOWN\n",
4120 card->gdev->dev.kobj.name,
4121 access_ctrl_req->subcmd_code,
4122 cmd->data.setadapterparms.hdr.return_code);
4123
4124 /* ensure isolation mode is "none" */
4125 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4126 break;
4127 }
4128 }
4129 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4130 return 0;
d64ecc22
EL		 4131}
4132
4133static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4134 enum qeth_ipa_isolation_modes isolation)
4135{
4136 int rc;
4137 struct qeth_cmd_buffer *iob;
4138 struct qeth_ipa_cmd *cmd;
4139 struct qeth_set_access_ctrl *access_ctrl_req;
4140
847a50fd 4141 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4142
4143 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4144 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4145
4146 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4147 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4148 sizeof(struct qeth_set_access_ctrl));
4149 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4150 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4151 access_ctrl_req->subcmd_code = isolation;
4152
4153 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4154 NULL);
4155 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4156 return rc;
4157}
4158
4159int qeth_set_access_ctrl_online(struct qeth_card *card)
4160{
4161 int rc = 0;
4162
847a50fd 4163 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4164
5113fec0
UB		 4165 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4166 card->info.type == QETH_CARD_TYPE_OSX) &&
4167 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4168 rc = qeth_setadpparms_set_access_ctrl(card,
4169 card->options.isolation);
4170 if (rc) {
4171 QETH_DBF_MESSAGE(3,
5113fec0 4172 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4173 card->gdev->dev.kobj.name,
4174 rc);
4175 }
4176 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4177 card->options.isolation = ISOLATION_MODE_NONE;
4178
4179 dev_err(&card->gdev->dev, "Adapter does not "
4180 "support QDIO data connection isolation\n");
4181 rc = -EOPNOTSUPP;
4182 }
4183 return rc;
4184}
4185EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4186
4a71df50
FB		 4187void qeth_tx_timeout(struct net_device *dev)
4188{
4189 struct qeth_card *card;
4190
509e2562 4191 card = dev->ml_priv;
847a50fd 4192 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4193 card->stats.tx_errors++;
4194 qeth_schedule_recovery(card);
4195}
4196EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4197
4198int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4199{
509e2562 4200 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4201 int rc = 0;
4202
4203 switch (regnum) {
4204 case MII_BMCR: /* Basic mode control register */
4205 rc = BMCR_FULLDPLX;
4206 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4207 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4208 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4209 rc |= BMCR_SPEED100;
4210 break;
4211 case MII_BMSR: /* Basic mode status register */
4212 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4213 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4214 BMSR_100BASE4;
4215 break;
4216 case MII_PHYSID1: /* PHYS ID 1 */
4217 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4218 dev->dev_addr[2];
4219 rc = (rc >> 5) & 0xFFFF;
4220 break;
4221 case MII_PHYSID2: /* PHYS ID 2 */
4222 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4223 break;
4224 case MII_ADVERTISE: /* Advertisement control reg */
4225 rc = ADVERTISE_ALL;
4226 break;
4227 case MII_LPA: /* Link partner ability reg */
4228 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4229 LPA_100BASE4 | LPA_LPACK;
4230 break;
4231 case MII_EXPANSION: /* Expansion register */
4232 break;
4233 case MII_DCOUNTER: /* disconnect counter */
4234 break;
4235 case MII_FCSCOUNTER: /* false carrier counter */
4236 break;
4237 case MII_NWAYTEST: /* N-way auto-neg test register */
4238 break;
4239 case MII_RERRCOUNTER: /* rx error counter */
4240 rc = card->stats.rx_errors;
4241 break;
4242 case MII_SREVISION: /* silicon revision */
4243 break;
4244 case MII_RESV1: /* reserved 1 */
4245 break;
4246 case MII_LBRERROR: /* loopback, rx, bypass error */
4247 break;
4248 case MII_PHYADDR: /* physical address */
4249 break;
4250 case MII_RESV2: /* reserved 2 */
4251 break;
4252 case MII_TPISTATUS: /* TPI status for 10mbps */
4253 break;
4254 case MII_NCONFIG: /* network interface config */
4255 break;
4256 default:
4257 break;
4258 }
4259 return rc;
4260}
4261EXPORT_SYMBOL_GPL(qeth_mdio_read);
4262
4263static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4264 struct qeth_cmd_buffer *iob, int len,
4265 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4266 unsigned long),
4267 void *reply_param)
4268{
4269 u16 s1, s2;
4270
847a50fd 4271 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4272
4273 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4274 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4275 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4276 /* adjust PDU length fields in IPA_PDU_HEADER */
4277 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4278 s2 = (u32) len;
4279 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4280 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4281 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4282 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4283 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4284 reply_cb, reply_param);
4285}
4286
4287static int qeth_snmp_command_cb(struct qeth_card *card,
4288 struct qeth_reply *reply, unsigned long sdata)
4289{
4290 struct qeth_ipa_cmd *cmd;
4291 struct qeth_arp_query_info *qinfo;
4292 struct qeth_snmp_cmd *snmp;
4293 unsigned char *data;
4294 __u16 data_len;
4295
847a50fd 4296 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4297
4298 cmd = (struct qeth_ipa_cmd *) sdata;
4299 data = (unsigned char *)((char *)cmd - reply->offset);
4300 qinfo = (struct qeth_arp_query_info *) reply->param;
4301 snmp = &cmd->data.setadapterparms.data.snmp;
4302
4303 if (cmd->hdr.return_code) {
847a50fd 4304 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4305 return 0;
4306 }
4307 if (cmd->data.setadapterparms.hdr.return_code) {
4308 cmd->hdr.return_code =
4309 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4310 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4311 return 0;
4312 }
4313 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4314 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4315 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4316 else
4317 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4318
4319 /* check if there is enough room in userspace */
4320 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4321 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 4322 cmd->hdr.return_code = -ENOMEM;
4323 return 0;
4324 }
847a50fd 4325 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4326 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4327 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4328 cmd->data.setadapterparms.hdr.seq_no);
4329 /*copy entries to user buffer*/
4330 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4331 memcpy(qinfo->udata + qinfo->udata_offset,
4332 (char *)snmp,
4333 data_len + offsetof(struct qeth_snmp_cmd, data));
4334 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4335 } else {
4336 memcpy(qinfo->udata + qinfo->udata_offset,
4337 (char *)&snmp->request, data_len);
4338 }
4339 qinfo->udata_offset += data_len;
4340 /* check if all replies received ... */
847a50fd 4341 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4342 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4343 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4344 cmd->data.setadapterparms.hdr.seq_no);
4345 if (cmd->data.setadapterparms.hdr.seq_no <
4346 cmd->data.setadapterparms.hdr.used_total)
4347 return 1;
4348 return 0;
4349}
4350
4351int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4352{
4353 struct qeth_cmd_buffer *iob;
4354 struct qeth_ipa_cmd *cmd;
4355 struct qeth_snmp_ureq *ureq;
4356 int req_len;
4357 struct qeth_arp_query_info qinfo = {0, };
4358 int rc = 0;
4359
847a50fd 4360 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4361
4362 if (card->info.guestlan)
4363 return -EOPNOTSUPP;
4364
4365 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4366 (!card->options.layer2)) {
4a71df50
FB		 4367 return -EOPNOTSUPP;
4368 }
4369 /* skip 4 bytes (data_len struct member) to get req_len */
4370 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4371 return -EFAULT;
4986f3f0
JL		 4372 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4373 if (IS_ERR(ureq)) {
847a50fd 4374 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4375 return PTR_ERR(ureq);
4a71df50
FB		 4376 }
4377 qinfo.udata_len = ureq->hdr.data_len;
4378 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4379 if (!qinfo.udata) {
4380 kfree(ureq);
4381 return -ENOMEM;
4382 }
4383 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4384
4385 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4386 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4387 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4388 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4389 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4390 qeth_snmp_command_cb, (void *)&qinfo);
4391 if (rc)
14cc21b6 4392 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4393 QETH_CARD_IFNAME(card), rc);
4394 else {
4395 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4396 rc = -EFAULT;
4397 }
4398
4399 kfree(ureq);
4400 kfree(qinfo.udata);
4401 return rc;
4402}
4403EXPORT_SYMBOL_GPL(qeth_snmp_command);
4404
4405static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4406{
4407 switch (card->info.type) {
4408 case QETH_CARD_TYPE_IQD:
4409 return 2;
4410 default:
4411 return 0;
4412 }
4413}
4414
d0ff1f52
UB		 4415static void qeth_determine_capabilities(struct qeth_card *card)
4416{
4417 int rc;
4418 int length;
4419 char *prcd;
4420 struct ccw_device *ddev;
4421 int ddev_offline = 0;
4422
4423 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4424 ddev = CARD_DDEV(card);
4425 if (!ddev->online) {
4426 ddev_offline = 1;
4427 rc = ccw_device_set_online(ddev);
4428 if (rc) {
4429 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4430 goto out;
4431 }
4432 }
4433
4434 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4435 if (rc) {
4436 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4437 dev_name(&card->gdev->dev), rc);
4438 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4439 goto out_offline;
4440 }
4441 qeth_configure_unitaddr(card, prcd);
4442 qeth_configure_blkt_default(card, prcd);
4443 kfree(prcd);
4444
4445 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4446 if (rc)
4447 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4448
0da9581d
EL		 4449 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4450 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4451 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4452 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4453 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4454 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4455 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4456 dev_info(&card->gdev->dev,
4457 "Completion Queueing supported\n");
4458 } else {
4459 card->options.cq = QETH_CQ_NOTAVAILABLE;
4460 }
4461
4462
d0ff1f52
UB		 4463out_offline:
4464 if (ddev_offline == 1)
4465 ccw_device_set_offline(ddev);
4466out:
4467 return;
4468}
4469
0da9581d
EL		 4470static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4471 struct qdio_buffer **in_sbal_ptrs,
4472 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4473 int i;
4474
4475 if (card->options.cq == QETH_CQ_ENABLED) {
4476 int offset = QDIO_MAX_BUFFERS_PER_Q *
4477 (card->qdio.no_in_queues - 1);
4478 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4479 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4480 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4481 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4482 }
4483
4484 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4485 }
4486}
4487
4a71df50
FB		 4488static int qeth_qdio_establish(struct qeth_card *card)
4489{
4490 struct qdio_initialize init_data;
4491 char *qib_param_field;
4492 struct qdio_buffer **in_sbal_ptrs;
104ea556 4493 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4494 struct qdio_buffer **out_sbal_ptrs;
4495 int i, j, k;
4496 int rc = 0;
4497
d11ba0c4 4498 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4499
4500 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4501 GFP_KERNEL);
104ea556 4502 if (!qib_param_field) {
4503 rc = -ENOMEM;
4504 goto out_free_nothing;
4505 }
4a71df50
FB		 4506
4507 qeth_create_qib_param_field(card, qib_param_field);
4508 qeth_create_qib_param_field_blkt(card, qib_param_field);
4509
b3332930 4510 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4511 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4512 GFP_KERNEL);
4513 if (!in_sbal_ptrs) {
104ea556 4514 rc = -ENOMEM;
4515 goto out_free_qib_param;
4a71df50 4516 }
0da9581d 4517 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4518 in_sbal_ptrs[i] = (struct qdio_buffer *)
4519 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4520 }
4a71df50 4521
0da9581d
EL		 4522 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4523 GFP_KERNEL);
104ea556 4524 if (!queue_start_poll) {
4525 rc = -ENOMEM;
4526 goto out_free_in_sbals;
4527 }
0da9581d
EL		 4528 for (i = 0; i < card->qdio.no_in_queues; ++i)
4529 queue_start_poll[i] = card->discipline.start_poll;
4530
4531 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4532
4a71df50 4533 out_sbal_ptrs =
b3332930 4534 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4535 sizeof(void *), GFP_KERNEL);
4536 if (!out_sbal_ptrs) {
104ea556 4537 rc = -ENOMEM;
4538 goto out_free_queue_start_poll;
4a71df50
FB		 4539 }
4540 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4541 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4542 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4543 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4544 }
4545
4546 memset(&init_data, 0, sizeof(struct qdio_initialize));
4547 init_data.cdev = CARD_DDEV(card);
4548 init_data.q_format = qeth_get_qdio_q_format(card);
4549 init_data.qib_param_field_format = 0;
4550 init_data.qib_param_field = qib_param_field;
0da9581d 4551 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50
FB		 4552 init_data.no_output_qs = card->qdio.no_out_queues;
4553 init_data.input_handler = card->discipline.input_handler;
4554 init_data.output_handler = card->discipline.output_handler;
e58b0d90 4555 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4556 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4557 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4558 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4559 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4560 init_data.scan_threshold =
4561 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4562
4563 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4564 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4565 rc = qdio_allocate(&init_data);
4566 if (rc) {
4567 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4568 goto out;
4569 }
4570 rc = qdio_establish(&init_data);
4571 if (rc) {
4a71df50 4572 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4573 qdio_free(CARD_DDEV(card));
4574 }
4a71df50 4575 }
0da9581d
EL		 4576
4577 switch (card->options.cq) {
4578 case QETH_CQ_ENABLED:
4579 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4580 break;
4581 case QETH_CQ_DISABLED:
4582 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4583 break;
4584 default:
4585 break;
4586 }
cc961d40 4587out:
4a71df50 4588 kfree(out_sbal_ptrs);
104ea556 4589out_free_queue_start_poll:
4590 kfree(queue_start_poll);
4591out_free_in_sbals:
4a71df50 4592 kfree(in_sbal_ptrs);
104ea556 4593out_free_qib_param:
4a71df50 4594 kfree(qib_param_field);
104ea556 4595out_free_nothing:
4a71df50
FB		 4596 return rc;
4597}
4598
4599static void qeth_core_free_card(struct qeth_card *card)
4600{
4601
d11ba0c4
PT		 4602 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4603 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4604 qeth_clean_channel(&card->read);
4605 qeth_clean_channel(&card->write);
4606 if (card->dev)
4607 free_netdev(card->dev);
4608 kfree(card->ip_tbd_list);
4609 qeth_free_qdio_buffers(card);
6bcac508 4610 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4611 kfree(card);
4612}
4613
4614static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4615 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4616 .driver_info = QETH_CARD_TYPE_OSD},
4617 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4618 .driver_info = QETH_CARD_TYPE_IQD},
4619 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4620 .driver_info = QETH_CARD_TYPE_OSN},
4621 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4622 .driver_info = QETH_CARD_TYPE_OSM},
4623 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4624 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4625 {},
4626};
4627MODULE_DEVICE_TABLE(ccw, qeth_ids);
4628
4629static struct ccw_driver qeth_ccw_driver = {
3bda058b 4630 .driver = {
3e70b3b8 4631 .owner = THIS_MODULE,
3bda058b
SO		 4632 .name = "qeth",
4633 },
4a71df50
FB		 4634 .ids = qeth_ids,
4635 .probe = ccwgroup_probe_ccwdev,
4636 .remove = ccwgroup_remove_ccwdev,
4637};
4638
4639static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4640 unsigned long driver_id)
4641{
022b660a
UB		 4642 return ccwgroup_create_from_string(root_dev, driver_id,
4643 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 4644}
4645
4646int qeth_core_hardsetup_card(struct qeth_card *card)
4647{
aa909224 4648 int retries = 0;
4a71df50
FB		 4649 int rc;
4650
d11ba0c4 4651 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4652 atomic_set(&card->force_alloc_skb, 0);
d0ff1f52 4653 qeth_get_channel_path_desc(card);
4a71df50 4654retry:
aa909224 4655 if (retries)
74eacdb9
FB		 4656 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4657 dev_name(&card->gdev->dev));
aa909224
UB		 4658 ccw_device_set_offline(CARD_DDEV(card));
4659 ccw_device_set_offline(CARD_WDEV(card));
4660 ccw_device_set_offline(CARD_RDEV(card));
4661 rc = ccw_device_set_online(CARD_RDEV(card));
4662 if (rc)
4663 goto retriable;
4664 rc = ccw_device_set_online(CARD_WDEV(card));
4665 if (rc)
4666 goto retriable;
4667 rc = ccw_device_set_online(CARD_DDEV(card));
4668 if (rc)
4669 goto retriable;
4a71df50 4670 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4671retriable:
4a71df50 4672 if (rc == -ERESTARTSYS) {
d11ba0c4 4673 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4674 return rc;
4675 } else if (rc) {
d11ba0c4 4676 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4677 if (++retries > 3)
4a71df50
FB		 4678 goto out;
4679 else
4680 goto retry;
4681 }
d0ff1f52 4682 qeth_determine_capabilities(card);
4a71df50
FB		 4683 qeth_init_tokens(card);
4684 qeth_init_func_level(card);
4685 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4686 if (rc == -ERESTARTSYS) {
d11ba0c4 4687 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4688 return rc;
4689 } else if (rc) {
d11ba0c4 4690 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4691 if (--retries < 0)
4692 goto out;
4693 else
4694 goto retry;
4695 }
4696 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4697 if (rc == -ERESTARTSYS) {
d11ba0c4 4698 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4699 return rc;
4700 } else if (rc) {
d11ba0c4 4701 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4702 if (--retries < 0)
4703 goto out;
4704 else
4705 goto retry;
4706 }
908abbb5 4707 card->read_or_write_problem = 0;
4a71df50
FB		 4708 rc = qeth_mpc_initialize(card);
4709 if (rc) {
d11ba0c4 4710 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4711 goto out;
4712 }
1da74b1c
FB		 4713
4714 card->options.ipa4.supported_funcs = 0;
4715 card->options.adp.supported_funcs = 0;
4716 card->info.diagass_support = 0;
4717 qeth_query_ipassists(card, QETH_PROT_IPV4);
4718 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4719 qeth_query_setadapterparms(card);
4720 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4721 qeth_query_setdiagass(card);
4a71df50
FB		 4722 return 0;
4723out:
74eacdb9
FB		 4724 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4725 "an error on the device\n");
4726 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4727 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4728 return rc;
4729}
4730EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4731
b3332930
FB		 4732static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4733 struct qdio_buffer_element *element,
4a71df50
FB		 4734 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4735{
4736 struct page *page = virt_to_page(element->addr);
4737 if (*pskb == NULL) {
b3332930
FB		 4738 if (qethbuffer->rx_skb) {
4739 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4740 *pskb = qethbuffer->rx_skb;
4741 qethbuffer->rx_skb = NULL;
4742 } else {
4743 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4744 if (!(*pskb))
4745 return -ENOMEM;
4746 }
4747
4a71df50 4748 skb_reserve(*pskb, ETH_HLEN);
b3332930 4749 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4750 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4751 data_len);
4752 } else {
4753 get_page(page);
b3332930
FB		 4754 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4755 element->addr + offset, QETH_RX_PULL_LEN);
4756 skb_fill_page_desc(*pskb, *pfrag, page,
4757 offset + QETH_RX_PULL_LEN,
4758 data_len - QETH_RX_PULL_LEN);
4759 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4760 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4761 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4762 (*pfrag)++;
4763 }
4764 } else {
4765 get_page(page);
4766 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4767 (*pskb)->data_len += data_len;
4768 (*pskb)->len += data_len;
4769 (*pskb)->truesize += data_len;
4770 (*pfrag)++;
4771 }
0da9581d
EL		 4772
4773
4a71df50
FB		 4774 return 0;
4775}
4776
4777struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4778 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4779 struct qdio_buffer_element **__element, int *__offset,
4780 struct qeth_hdr **hdr)
4781{
4782 struct qdio_buffer_element *element = *__element;
b3332930 4783 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4784 int offset = *__offset;
4785 struct sk_buff *skb = NULL;
76b11f8e 4786 int skb_len = 0;
4a71df50
FB		 4787 void *data_ptr;
4788 int data_len;
4789 int headroom = 0;
4790 int use_rx_sg = 0;
4791 int frag = 0;
4792
4a71df50
FB		 4793 /* qeth_hdr must not cross element boundaries */
4794 if (element->length < offset + sizeof(struct qeth_hdr)) {
4795 if (qeth_is_last_sbale(element))
4796 return NULL;
4797 element++;
4798 offset = 0;
4799 if (element->length < sizeof(struct qeth_hdr))
4800 return NULL;
4801 }
4802 *hdr = element->addr + offset;
4803
4804 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4805 switch ((*hdr)->hdr.l2.id) {
4806 case QETH_HEADER_TYPE_LAYER2:
4807 skb_len = (*hdr)->hdr.l2.pkt_length;
4808 break;
4809 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4810 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4811 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4812 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4813 headroom = TR_HLEN;
4814 else
4815 headroom = ETH_HLEN;
76b11f8e
UB		 4816 break;
4817 case QETH_HEADER_TYPE_OSN:
4818 skb_len = (*hdr)->hdr.osn.pdu_length;
4819 headroom = sizeof(struct qeth_hdr);
4820 break;
4821 default:
4822 break;
4a71df50
FB		 4823 }
4824
4825 if (!skb_len)
4826 return NULL;
4827
b3332930
FB		 4828 if (((skb_len >= card->options.rx_sg_cb) &&
4829 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4830 (!atomic_read(&card->force_alloc_skb))) ||
4831 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4832 use_rx_sg = 1;
4833 } else {
4834 skb = dev_alloc_skb(skb_len + headroom);
4835 if (!skb)
4836 goto no_mem;
4837 if (headroom)
4838 skb_reserve(skb, headroom);
4839 }
4840
4841 data_ptr = element->addr + offset;
4842 while (skb_len) {
4843 data_len = min(skb_len, (int)(element->length - offset));
4844 if (data_len) {
4845 if (use_rx_sg) {
b3332930
FB		 4846 if (qeth_create_skb_frag(qethbuffer, element,
4847 &skb, offset, &frag, data_len))
4a71df50
FB		 4848 goto no_mem;
4849 } else {
4850 memcpy(skb_put(skb, data_len), data_ptr,
4851 data_len);
4852 }
4853 }
4854 skb_len -= data_len;
4855 if (skb_len) {
4856 if (qeth_is_last_sbale(element)) {
847a50fd 4857 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4858 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4859 dev_kfree_skb_any(skb);
4860 card->stats.rx_errors++;
4861 return NULL;
4862 }
4863 element++;
4864 offset = 0;
4865 data_ptr = element->addr;
4866 } else {
4867 offset += data_len;
4868 }
4869 }
4870 *__element = element;
4871 *__offset = offset;
4872 if (use_rx_sg && card->options.performance_stats) {
4873 card->perf_stats.sg_skbs_rx++;
4874 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4875 }
4876 return skb;
4877no_mem:
4878 if (net_ratelimit()) {
847a50fd 4879 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4880 }
4881 card->stats.rx_dropped++;
4882 return NULL;
4883}
4884EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4885
4886static void qeth_unregister_dbf_views(void)
4887{
d11ba0c4
PT		 4888 int x;
4889 for (x = 0; x < QETH_DBF_INFOS; x++) {
4890 debug_unregister(qeth_dbf[x].id);
4891 qeth_dbf[x].id = NULL;
4892 }
4a71df50
FB		 4893}
4894
8e96c51c 4895void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4896{
4897 char dbf_txt_buf[32];
345aa66e 4898 va_list args;
cd023216 4899
8e96c51c 4900 if (level > id->level)
cd023216 4901 return;
345aa66e
PT		 4902 va_start(args, fmt);
4903 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4904 va_end(args);
8e96c51c 4905 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 4906}
4907EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4908
4a71df50
FB		 4909static int qeth_register_dbf_views(void)
4910{
d11ba0c4
PT		 4911 int ret;
4912 int x;
4913
4914 for (x = 0; x < QETH_DBF_INFOS; x++) {
4915 /* register the areas */
4916 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4917 qeth_dbf[x].pages,
4918 qeth_dbf[x].areas,
4919 qeth_dbf[x].len);
4920 if (qeth_dbf[x].id == NULL) {
4921 qeth_unregister_dbf_views();
4922 return -ENOMEM;
4923 }
4a71df50 4924
d11ba0c4
PT		 4925 /* register a view */
4926 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4927 if (ret) {
4928 qeth_unregister_dbf_views();
4929 return ret;
4930 }
4a71df50 4931
d11ba0c4
PT		 4932 /* set a passing level */
4933 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4934 }
4a71df50
FB		 4935
4936 return 0;
4937}
4938
4939int qeth_core_load_discipline(struct qeth_card *card,
4940 enum qeth_discipline_id discipline)
4941{
4942 int rc = 0;
4943 switch (discipline) {
4944 case QETH_DISCIPLINE_LAYER3:
4945 card->discipline.ccwgdriver = try_then_request_module(
4946 symbol_get(qeth_l3_ccwgroup_driver),
4947 "qeth_l3");
4948 break;
4949 case QETH_DISCIPLINE_LAYER2:
4950 card->discipline.ccwgdriver = try_then_request_module(
4951 symbol_get(qeth_l2_ccwgroup_driver),
4952 "qeth_l2");
4953 break;
4954 }
4955 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4956 dev_err(&card->gdev->dev, "There is no kernel module to "
4957 "support discipline %d\n", discipline);
4a71df50
FB		 4958 rc = -EINVAL;
4959 }
4960 return rc;
4961}
4962
4963void qeth_core_free_discipline(struct qeth_card *card)
4964{
4965 if (card->options.layer2)
4966 symbol_put(qeth_l2_ccwgroup_driver);
4967 else
4968 symbol_put(qeth_l3_ccwgroup_driver);
4969 card->discipline.ccwgdriver = NULL;
4970}
4971
4972static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4973{
4974 struct qeth_card *card;
4975 struct device *dev;
4976 int rc;
4977 unsigned long flags;
af039068 4978 char dbf_name[20];
4a71df50 4979
d11ba0c4 4980 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4981
4982 dev = &gdev->dev;
4983 if (!get_device(dev))
4984 return -ENODEV;
4985
2a0217d5 4986 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4987
4988 card = qeth_alloc_card();
4989 if (!card) {
d11ba0c4 4990 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4991 rc = -ENOMEM;
4992 goto err_dev;
4993 }
af039068
CO		 4994
4995 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4996 dev_name(&gdev->dev));
4997 card->debug = debug_register(dbf_name, 2, 1, 8);
4998 if (!card->debug) {
4999 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5000 rc = -ENOMEM;
5001 goto err_card;
5002 }
5003 debug_register_view(card->debug, &debug_hex_ascii_view);
5004
4a71df50
FB		 5005 card->read.ccwdev = gdev->cdev[0];
5006 card->write.ccwdev = gdev->cdev[1];
5007 card->data.ccwdev = gdev->cdev[2];
5008 dev_set_drvdata(&gdev->dev, card);
5009 card->gdev = gdev;
5010 gdev->cdev[0]->handler = qeth_irq;
5011 gdev->cdev[1]->handler = qeth_irq;
5012 gdev->cdev[2]->handler = qeth_irq;
5013
5014 rc = qeth_determine_card_type(card);
5015 if (rc) {
d11ba0c4 5016 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 5017 goto err_dbf;
4a71df50
FB		 5018 }
5019 rc = qeth_setup_card(card);
5020 if (rc) {
d11ba0c4 5021 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 5022 goto err_dbf;
4a71df50
FB		 5023 }
5024
5113fec0 5025 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 5026 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 5027 else
5028 rc = qeth_core_create_device_attributes(dev);
5029 if (rc)
af039068 5030 goto err_dbf;
5113fec0
UB		 5031 switch (card->info.type) {
5032 case QETH_CARD_TYPE_OSN:
5033 case QETH_CARD_TYPE_OSM:
4a71df50 5034 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 5035 if (rc)
5036 goto err_attr;
4a71df50 5037 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 5038 if (rc)
5113fec0
UB		 5039 goto err_disc;
5040 case QETH_CARD_TYPE_OSD:
5041 case QETH_CARD_TYPE_OSX:
5042 default:
5043 break;
4a71df50
FB		 5044 }
5045
5046 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5047 list_add_tail(&card->list, &qeth_core_card_list.list);
5048 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5049
5050 qeth_determine_capabilities(card);
4a71df50
FB		 5051 return 0;
5052
5113fec0
UB		 5053err_disc:
5054 qeth_core_free_discipline(card);
5055err_attr:
5056 if (card->info.type == QETH_CARD_TYPE_OSN)
5057 qeth_core_remove_osn_attributes(dev);
5058 else
5059 qeth_core_remove_device_attributes(dev);
af039068
CO		 5060err_dbf:
5061 debug_unregister(card->debug);
4a71df50
FB		 5062err_card:
5063 qeth_core_free_card(card);
5064err_dev:
5065 put_device(dev);
5066 return rc;
5067}
5068
5069static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5070{
5071 unsigned long flags;
5072 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5073
28a7e4c9 5074 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 5075
5076 if (card->info.type == QETH_CARD_TYPE_OSN) {
5077 qeth_core_remove_osn_attributes(&gdev->dev);
5078 } else {
5079 qeth_core_remove_device_attributes(&gdev->dev);
5080 }
9dc48ccc
UB		 5081
5082 if (card->discipline.ccwgdriver) {
5083 card->discipline.ccwgdriver->remove(gdev);
5084 qeth_core_free_discipline(card);
5085 }
5086
af039068 5087 debug_unregister(card->debug);
4a71df50
FB		 5088 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5089 list_del(&card->list);
5090 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5091 qeth_core_free_card(card);
5092 dev_set_drvdata(&gdev->dev, NULL);
5093 put_device(&gdev->dev);
5094 return;
5095}
5096
5097static int qeth_core_set_online(struct ccwgroup_device *gdev)
5098{
5099 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5100 int rc = 0;
5101 int def_discipline;
5102
5103 if (!card->discipline.ccwgdriver) {
5104 if (card->info.type == QETH_CARD_TYPE_IQD)
5105 def_discipline = QETH_DISCIPLINE_LAYER3;
5106 else
5107 def_discipline = QETH_DISCIPLINE_LAYER2;
5108 rc = qeth_core_load_discipline(card, def_discipline);
5109 if (rc)
5110 goto err;
5111 rc = card->discipline.ccwgdriver->probe(card->gdev);
5112 if (rc)
5113 goto err;
5114 }
5115 rc = card->discipline.ccwgdriver->set_online(gdev);
5116err:
5117 return rc;
5118}
5119
5120static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5121{
5122 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5123 return card->discipline.ccwgdriver->set_offline(gdev);
5124}
5125
5126static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5127{
5128 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5129 if (card->discipline.ccwgdriver &&
5130 card->discipline.ccwgdriver->shutdown)
5131 card->discipline.ccwgdriver->shutdown(gdev);
5132}
5133
bbcfcdc8
FB		 5134static int qeth_core_prepare(struct ccwgroup_device *gdev)
5135{
5136 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5137 if (card->discipline.ccwgdriver &&
5138 card->discipline.ccwgdriver->prepare)
5139 return card->discipline.ccwgdriver->prepare(gdev);
5140 return 0;
5141}
5142
5143static void qeth_core_complete(struct ccwgroup_device *gdev)
5144{
5145 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5146 if (card->discipline.ccwgdriver &&
5147 card->discipline.ccwgdriver->complete)
5148 card->discipline.ccwgdriver->complete(gdev);
5149}
5150
5151static int qeth_core_freeze(struct ccwgroup_device *gdev)
5152{
5153 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5154 if (card->discipline.ccwgdriver &&
5155 card->discipline.ccwgdriver->freeze)
5156 return card->discipline.ccwgdriver->freeze(gdev);
5157 return 0;
5158}
5159
5160static int qeth_core_thaw(struct ccwgroup_device *gdev)
5161{
5162 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5163 if (card->discipline.ccwgdriver &&
5164 card->discipline.ccwgdriver->thaw)
5165 return card->discipline.ccwgdriver->thaw(gdev);
5166 return 0;
5167}
5168
5169static int qeth_core_restore(struct ccwgroup_device *gdev)
5170{
5171 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5172 if (card->discipline.ccwgdriver &&
5173 card->discipline.ccwgdriver->restore)
5174 return card->discipline.ccwgdriver->restore(gdev);
5175 return 0;
5176}
5177
4a71df50 5178static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5179 .driver = {
5180 .owner = THIS_MODULE,
5181 .name = "qeth",
5182 },
4a71df50
FB		 5183 .driver_id = 0xD8C5E3C8,
5184 .probe = qeth_core_probe_device,
5185 .remove = qeth_core_remove_device,
5186 .set_online = qeth_core_set_online,
5187 .set_offline = qeth_core_set_offline,
5188 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5189 .prepare = qeth_core_prepare,
5190 .complete = qeth_core_complete,
5191 .freeze = qeth_core_freeze,
5192 .thaw = qeth_core_thaw,
5193 .restore = qeth_core_restore,
4a71df50
FB		 5194};
5195
5196static ssize_t
5197qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5198 size_t count)
5199{
5200 int err;
5201 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5202 qeth_core_ccwgroup_driver.driver_id);
5203 if (err)
5204 return err;
5205 else
5206 return count;
5207}
5208
5209static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5210
5211static struct {
5212 const char str[ETH_GSTRING_LEN];
5213} qeth_ethtool_stats_keys[] = {
5214/* 0 */{"rx skbs"},
5215 {"rx buffers"},
5216 {"tx skbs"},
5217 {"tx buffers"},
5218 {"tx skbs no packing"},
5219 {"tx buffers no packing"},
5220 {"tx skbs packing"},
5221 {"tx buffers packing"},
5222 {"tx sg skbs"},
5223 {"tx sg frags"},
5224/* 10 */{"rx sg skbs"},
5225 {"rx sg frags"},
5226 {"rx sg page allocs"},
5227 {"tx large kbytes"},
5228 {"tx large count"},
5229 {"tx pk state ch n->p"},
5230 {"tx pk state ch p->n"},
5231 {"tx pk watermark low"},
5232 {"tx pk watermark high"},
5233 {"queue 0 buffer usage"},
5234/* 20 */{"queue 1 buffer usage"},
5235 {"queue 2 buffer usage"},
5236 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5237 {"rx poll time"},
5238 {"rx poll count"},
4a71df50
FB		 5239 {"rx do_QDIO time"},
5240 {"rx do_QDIO count"},
5241 {"tx handler time"},
5242 {"tx handler count"},
5243 {"tx time"},
5244/* 30 */{"tx count"},
5245 {"tx do_QDIO time"},
5246 {"tx do_QDIO count"},
f61a0d05 5247 {"tx csum"},
c3b4a740 5248 {"tx lin"},
0da9581d
EL		 5249 {"cq handler count"},
5250 {"cq handler time"}
4a71df50
FB		 5251};
5252
df8b4ec8 5253int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5254{
df8b4ec8
BH		 5255 switch (stringset) {
5256 case ETH_SS_STATS:
5257 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5258 default:
5259 return -EINVAL;
5260 }
4a71df50 5261}
df8b4ec8 5262EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5263
5264void qeth_core_get_ethtool_stats(struct net_device *dev,
5265 struct ethtool_stats *stats, u64 *data)
5266{
509e2562 5267 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5268 data[0] = card->stats.rx_packets -
5269 card->perf_stats.initial_rx_packets;
5270 data[1] = card->perf_stats.bufs_rec;
5271 data[2] = card->stats.tx_packets -
5272 card->perf_stats.initial_tx_packets;
5273 data[3] = card->perf_stats.bufs_sent;
5274 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5275 - card->perf_stats.skbs_sent_pack;
5276 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5277 data[6] = card->perf_stats.skbs_sent_pack;
5278 data[7] = card->perf_stats.bufs_sent_pack;
5279 data[8] = card->perf_stats.sg_skbs_sent;
5280 data[9] = card->perf_stats.sg_frags_sent;
5281 data[10] = card->perf_stats.sg_skbs_rx;
5282 data[11] = card->perf_stats.sg_frags_rx;
5283 data[12] = card->perf_stats.sg_alloc_page_rx;
5284 data[13] = (card->perf_stats.large_send_bytes >> 10);
5285 data[14] = card->perf_stats.large_send_cnt;
5286 data[15] = card->perf_stats.sc_dp_p;
5287 data[16] = card->perf_stats.sc_p_dp;
5288 data[17] = QETH_LOW_WATERMARK_PACK;
5289 data[18] = QETH_HIGH_WATERMARK_PACK;
5290 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5291 data[20] = (card->qdio.no_out_queues > 1) ?
5292 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5293 data[21] = (card->qdio.no_out_queues > 2) ?
5294 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5295 data[22] = (card->qdio.no_out_queues > 3) ?
5296 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5297 data[23] = card->perf_stats.inbound_time;
5298 data[24] = card->perf_stats.inbound_cnt;
5299 data[25] = card->perf_stats.inbound_do_qdio_time;
5300 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5301 data[27] = card->perf_stats.outbound_handler_time;
5302 data[28] = card->perf_stats.outbound_handler_cnt;
5303 data[29] = card->perf_stats.outbound_time;
5304 data[30] = card->perf_stats.outbound_cnt;
5305 data[31] = card->perf_stats.outbound_do_qdio_time;
5306 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5307 data[33] = card->perf_stats.tx_csum;
c3b4a740 5308 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5309 data[35] = card->perf_stats.cq_cnt;
5310 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5311}
5312EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5313
5314void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5315{
5316 switch (stringset) {
5317 case ETH_SS_STATS:
5318 memcpy(data, &qeth_ethtool_stats_keys,
5319 sizeof(qeth_ethtool_stats_keys));
5320 break;
5321 default:
5322 WARN_ON(1);
5323 break;
5324 }
5325}
5326EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5327
5328void qeth_core_get_drvinfo(struct net_device *dev,
5329 struct ethtool_drvinfo *info)
5330{
509e2562 5331 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5332 if (card->options.layer2)
5333 strcpy(info->driver, "qeth_l2");
5334 else
5335 strcpy(info->driver, "qeth_l3");
5336
5337 strcpy(info->version, "1.0");
5338 strcpy(info->fw_version, card->info.mcl_level);
5339 sprintf(info->bus_info, "%s/%s/%s",
5340 CARD_RDEV_ID(card),
5341 CARD_WDEV_ID(card),
5342 CARD_DDEV_ID(card));
5343}
5344EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5345
3f9975aa
FB		 5346int qeth_core_ethtool_get_settings(struct net_device *netdev,
5347 struct ethtool_cmd *ecmd)
5348{
509e2562 5349 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5350 enum qeth_link_types link_type;
5351
5352 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5353 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5354 else
5355 link_type = card->info.link_type;
5356
5357 ecmd->transceiver = XCVR_INTERNAL;
5358 ecmd->supported = SUPPORTED_Autoneg;
5359 ecmd->advertising = ADVERTISED_Autoneg;
5360 ecmd->duplex = DUPLEX_FULL;
5361 ecmd->autoneg = AUTONEG_ENABLE;
5362
5363 switch (link_type) {
5364 case QETH_LINK_TYPE_FAST_ETH:
5365 case QETH_LINK_TYPE_LANE_ETH100:
5366 ecmd->supported |= SUPPORTED_10baseT_Half |
5367 SUPPORTED_10baseT_Full |
5368 SUPPORTED_100baseT_Half |
5369 SUPPORTED_100baseT_Full |
5370 SUPPORTED_TP;
5371 ecmd->advertising |= ADVERTISED_10baseT_Half |
5372 ADVERTISED_10baseT_Full |
5373 ADVERTISED_100baseT_Half |
5374 ADVERTISED_100baseT_Full |
5375 ADVERTISED_TP;
5376 ecmd->speed = SPEED_100;
5377 ecmd->port = PORT_TP;
5378 break;
5379
5380 case QETH_LINK_TYPE_GBIT_ETH:
5381 case QETH_LINK_TYPE_LANE_ETH1000:
5382 ecmd->supported |= SUPPORTED_10baseT_Half |
5383 SUPPORTED_10baseT_Full |
5384 SUPPORTED_100baseT_Half |
5385 SUPPORTED_100baseT_Full |
5386 SUPPORTED_1000baseT_Half |
5387 SUPPORTED_1000baseT_Full |
5388 SUPPORTED_FIBRE;
5389 ecmd->advertising |= ADVERTISED_10baseT_Half |
5390 ADVERTISED_10baseT_Full |
5391 ADVERTISED_100baseT_Half |
5392 ADVERTISED_100baseT_Full |
5393 ADVERTISED_1000baseT_Half |
5394 ADVERTISED_1000baseT_Full |
5395 ADVERTISED_FIBRE;
5396 ecmd->speed = SPEED_1000;
5397 ecmd->port = PORT_FIBRE;
5398 break;
5399
5400 case QETH_LINK_TYPE_10GBIT_ETH:
5401 ecmd->supported |= SUPPORTED_10baseT_Half |
5402 SUPPORTED_10baseT_Full |
5403 SUPPORTED_100baseT_Half |
5404 SUPPORTED_100baseT_Full |
5405 SUPPORTED_1000baseT_Half |
5406 SUPPORTED_1000baseT_Full |
5407 SUPPORTED_10000baseT_Full |
5408 SUPPORTED_FIBRE;
5409 ecmd->advertising |= ADVERTISED_10baseT_Half |
5410 ADVERTISED_10baseT_Full |
5411 ADVERTISED_100baseT_Half |
5412 ADVERTISED_100baseT_Full |
5413 ADVERTISED_1000baseT_Half |
5414 ADVERTISED_1000baseT_Full |
5415 ADVERTISED_10000baseT_Full |
5416 ADVERTISED_FIBRE;
5417 ecmd->speed = SPEED_10000;
5418 ecmd->port = PORT_FIBRE;
5419 break;
5420
5421 default:
5422 ecmd->supported |= SUPPORTED_10baseT_Half |
5423 SUPPORTED_10baseT_Full |
5424 SUPPORTED_TP;
5425 ecmd->advertising |= ADVERTISED_10baseT_Half |
5426 ADVERTISED_10baseT_Full |
5427 ADVERTISED_TP;
5428 ecmd->speed = SPEED_10;
5429 ecmd->port = PORT_TP;
5430 }
5431
5432 return 0;
5433}
5434EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5435
4a71df50
FB		 5436static int __init qeth_core_init(void)
5437{
5438 int rc;
5439
74eacdb9 5440 pr_info("loading core functions\n");
4a71df50
FB		 5441 INIT_LIST_HEAD(&qeth_core_card_list.list);
5442 rwlock_init(&qeth_core_card_list.rwlock);
5443
5444 rc = qeth_register_dbf_views();
5445 if (rc)
5446 goto out_err;
5447 rc = ccw_driver_register(&qeth_ccw_driver);
5448 if (rc)
5449 goto ccw_err;
5450 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5451 if (rc)
5452 goto ccwgroup_err;
5453 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5454 &driver_attr_group);
5455 if (rc)
5456 goto driver_err;
035da16f 5457 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5458 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5459 if (rc)
5460 goto register_err;
4a71df50 5461
683d718a
FB		 5462 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5463 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5464 if (!qeth_core_header_cache) {
5465 rc = -ENOMEM;
5466 goto slab_err;
5467 }
5468
0da9581d
EL		 5469 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5470 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5471 if (!qeth_qdio_outbuf_cache) {
5472 rc = -ENOMEM;
5473 goto cqslab_err;
5474 }
5475
683d718a 5476 return 0;
0da9581d
EL		 5477cqslab_err:
5478 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5479slab_err:
035da16f 5480 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5481register_err:
5482 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5483 &driver_attr_group);
5484driver_err:
5485 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5486ccwgroup_err:
5487 ccw_driver_unregister(&qeth_ccw_driver);
5488ccw_err:
74eacdb9 5489 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 5490 qeth_unregister_dbf_views();
5491out_err:
74eacdb9 5492 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5493 return rc;
5494}
5495
5496static void __exit qeth_core_exit(void)
5497{
035da16f 5498 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5499 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5500 &driver_attr_group);
5501 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5502 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5503 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5504 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 5505 qeth_unregister_dbf_views();
74eacdb9 5506 pr_info("core functions removed\n");
4a71df50
FB		 5507}
5508
5509module_init(qeth_core_init);
5510module_exit(qeth_core_exit);
5511MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5512MODULE_DESCRIPTION("qeth core functions");
5513MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git