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qeth: allow HiperSockets framesize change in suspend
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
4a71df50 24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
4a71df50
FB		 27
28#include "qeth_core.h"
4a71df50 29
d11ba0c4
PT		 30struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 35 [QETH_DBF_MSG] = {"qeth_msg",
36 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 37 [QETH_DBF_CTRL] = {"qeth_control",
38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
39};
40EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 41
42struct qeth_card_list_struct qeth_core_card_list;
43EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 44struct kmem_cache *qeth_core_header_cache;
45EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 46
47static struct device *qeth_core_root_dev;
5113fec0 48static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 49static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 50
51static void qeth_send_control_data_cb(struct qeth_channel *,
52 struct qeth_cmd_buffer *);
53static int qeth_issue_next_read(struct qeth_card *);
54static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
55static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
56static void qeth_free_buffer_pool(struct qeth_card *);
57static int qeth_qdio_establish(struct qeth_card *);
58
59
4a71df50
FB		 60static inline const char *qeth_get_cardname(struct qeth_card *card)
61{
62 if (card->info.guestlan) {
63 switch (card->info.type) {
5113fec0 64 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 65 return " Guest LAN QDIO";
66 case QETH_CARD_TYPE_IQD:
67 return " Guest LAN Hiper";
5113fec0
UB		 68 case QETH_CARD_TYPE_OSM:
69 return " Guest LAN QDIO - OSM";
70 case QETH_CARD_TYPE_OSX:
71 return " Guest LAN QDIO - OSX";
4a71df50
FB		 72 default:
73 return " unknown";
74 }
75 } else {
76 switch (card->info.type) {
5113fec0 77 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 78 return " OSD Express";
79 case QETH_CARD_TYPE_IQD:
80 return " HiperSockets";
81 case QETH_CARD_TYPE_OSN:
82 return " OSN QDIO";
5113fec0
UB		 83 case QETH_CARD_TYPE_OSM:
84 return " OSM QDIO";
85 case QETH_CARD_TYPE_OSX:
86 return " OSX QDIO";
4a71df50
FB		 87 default:
88 return " unknown";
89 }
90 }
91 return " n/a";
92}
93
94/* max length to be returned: 14 */
95const char *qeth_get_cardname_short(struct qeth_card *card)
96{
97 if (card->info.guestlan) {
98 switch (card->info.type) {
5113fec0 99 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 100 return "GuestLAN QDIO";
101 case QETH_CARD_TYPE_IQD:
102 return "GuestLAN Hiper";
5113fec0
UB		 103 case QETH_CARD_TYPE_OSM:
104 return "GuestLAN OSM";
105 case QETH_CARD_TYPE_OSX:
106 return "GuestLAN OSX";
4a71df50
FB		 107 default:
108 return "unknown";
109 }
110 } else {
111 switch (card->info.type) {
5113fec0 112 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 113 switch (card->info.link_type) {
114 case QETH_LINK_TYPE_FAST_ETH:
115 return "OSD_100";
116 case QETH_LINK_TYPE_HSTR:
117 return "HSTR";
118 case QETH_LINK_TYPE_GBIT_ETH:
119 return "OSD_1000";
120 case QETH_LINK_TYPE_10GBIT_ETH:
121 return "OSD_10GIG";
122 case QETH_LINK_TYPE_LANE_ETH100:
123 return "OSD_FE_LANE";
124 case QETH_LINK_TYPE_LANE_TR:
125 return "OSD_TR_LANE";
126 case QETH_LINK_TYPE_LANE_ETH1000:
127 return "OSD_GbE_LANE";
128 case QETH_LINK_TYPE_LANE:
129 return "OSD_ATM_LANE";
130 default:
131 return "OSD_Express";
132 }
133 case QETH_CARD_TYPE_IQD:
134 return "HiperSockets";
135 case QETH_CARD_TYPE_OSN:
136 return "OSN";
5113fec0
UB		 137 case QETH_CARD_TYPE_OSM:
138 return "OSM_1000";
139 case QETH_CARD_TYPE_OSX:
140 return "OSX_10GIG";
4a71df50
FB		 141 default:
142 return "unknown";
143 }
144 }
145 return "n/a";
146}
147
148void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
149 int clear_start_mask)
150{
151 unsigned long flags;
152
153 spin_lock_irqsave(&card->thread_mask_lock, flags);
154 card->thread_allowed_mask = threads;
155 if (clear_start_mask)
156 card->thread_start_mask &= threads;
157 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
158 wake_up(&card->wait_q);
159}
160EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
161
162int qeth_threads_running(struct qeth_card *card, unsigned long threads)
163{
164 unsigned long flags;
165 int rc = 0;
166
167 spin_lock_irqsave(&card->thread_mask_lock, flags);
168 rc = (card->thread_running_mask & threads);
169 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
170 return rc;
171}
172EXPORT_SYMBOL_GPL(qeth_threads_running);
173
174int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
175{
176 return wait_event_interruptible(card->wait_q,
177 qeth_threads_running(card, threads) == 0);
178}
179EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
180
181void qeth_clear_working_pool_list(struct qeth_card *card)
182{
183 struct qeth_buffer_pool_entry *pool_entry, *tmp;
184
847a50fd 185 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 186 list_for_each_entry_safe(pool_entry, tmp,
187 &card->qdio.in_buf_pool.entry_list, list){
188 list_del(&pool_entry->list);
189 }
190}
191EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
192
193static int qeth_alloc_buffer_pool(struct qeth_card *card)
194{
195 struct qeth_buffer_pool_entry *pool_entry;
196 void *ptr;
197 int i, j;
198
847a50fd 199 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50
FB		 200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
202 if (!pool_entry) {
203 qeth_free_buffer_pool(card);
204 return -ENOMEM;
205 }
206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 207 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 208 if (!ptr) {
209 while (j > 0)
210 free_page((unsigned long)
211 pool_entry->elements[--j]);
212 kfree(pool_entry);
213 qeth_free_buffer_pool(card);
214 return -ENOMEM;
215 }
216 pool_entry->elements[j] = ptr;
217 }
218 list_add(&pool_entry->init_list,
219 &card->qdio.init_pool.entry_list);
220 }
221 return 0;
222}
223
224int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
225{
847a50fd 226 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 227
228 if ((card->state != CARD_STATE_DOWN) &&
229 (card->state != CARD_STATE_RECOVER))
230 return -EPERM;
231
232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
233 qeth_clear_working_pool_list(card);
234 qeth_free_buffer_pool(card);
235 card->qdio.in_buf_pool.buf_count = bufcnt;
236 card->qdio.init_pool.buf_count = bufcnt;
237 return qeth_alloc_buffer_pool(card);
238}
76b11f8e 239EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 240
4a71df50
FB		 241static int qeth_issue_next_read(struct qeth_card *card)
242{
243 int rc;
244 struct qeth_cmd_buffer *iob;
245
847a50fd 246 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 247 if (card->read.state != CH_STATE_UP)
248 return -EIO;
249 iob = qeth_get_buffer(&card->read);
250 if (!iob) {
74eacdb9
FB		 251 dev_warn(&card->gdev->dev, "The qeth device driver "
252 "failed to recover an error on the device\n");
253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
254 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 255 return -ENOMEM;
256 }
257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 258 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
260 (addr_t) iob, 0, 0);
261 if (rc) {
74eacdb9
FB		 262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
263 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 264 atomic_set(&card->read.irq_pending, 0);
908abbb5 265 card->read_or_write_problem = 1;
4a71df50
FB		 266 qeth_schedule_recovery(card);
267 wake_up(&card->wait_q);
268 }
269 return rc;
270}
271
272static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
273{
274 struct qeth_reply *reply;
275
276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
277 if (reply) {
278 atomic_set(&reply->refcnt, 1);
279 atomic_set(&reply->received, 0);
280 reply->card = card;
281 };
282 return reply;
283}
284
285static void qeth_get_reply(struct qeth_reply *reply)
286{
287 WARN_ON(atomic_read(&reply->refcnt) <= 0);
288 atomic_inc(&reply->refcnt);
289}
290
291static void qeth_put_reply(struct qeth_reply *reply)
292{
293 WARN_ON(atomic_read(&reply->refcnt) <= 0);
294 if (atomic_dec_and_test(&reply->refcnt))
295 kfree(reply);
296}
297
d11ba0c4 298static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 299 struct qeth_card *card)
300{
4a71df50 301 char *ipa_name;
d11ba0c4 302 int com = cmd->hdr.command;
4a71df50 303 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 304 if (rc)
305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
306 ipa_name, com, QETH_CARD_IFNAME(card),
307 rc, qeth_get_ipa_msg(rc));
308 else
309 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
310 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 311}
312
313static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
314 struct qeth_cmd_buffer *iob)
315{
316 struct qeth_ipa_cmd *cmd = NULL;
317
847a50fd 318 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 319 if (IS_IPA(iob->data)) {
320 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
321 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 322 if (cmd->hdr.command != IPA_CMD_SETCCID &&
323 cmd->hdr.command != IPA_CMD_DELCCID &&
324 cmd->hdr.command != IPA_CMD_MODCCID &&
325 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 326 qeth_issue_ipa_msg(cmd,
327 cmd->hdr.return_code, card);
4a71df50
FB		 328 return cmd;
329 } else {
330 switch (cmd->hdr.command) {
331 case IPA_CMD_STOPLAN:
74eacdb9
FB		 332 dev_warn(&card->gdev->dev,
333 "The link for interface %s on CHPID"
334 " 0x%X failed\n",
4a71df50
FB		 335 QETH_CARD_IFNAME(card),
336 card->info.chpid);
337 card->lan_online = 0;
338 if (card->dev && netif_carrier_ok(card->dev))
339 netif_carrier_off(card->dev);
340 return NULL;
341 case IPA_CMD_STARTLAN:
74eacdb9
FB		 342 dev_info(&card->gdev->dev,
343 "The link for %s on CHPID 0x%X has"
344 " been restored\n",
4a71df50
FB		 345 QETH_CARD_IFNAME(card),
346 card->info.chpid);
347 netif_carrier_on(card->dev);
922dc062 348 card->lan_online = 1;
4a71df50
FB		 349 qeth_schedule_recovery(card);
350 return NULL;
351 case IPA_CMD_MODCCID:
352 return cmd;
353 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 354 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 355 break;
356 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 357 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 358 break;
359 default:
c4cef07c 360 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 361 "but not a reply!\n");
362 break;
363 }
364 }
365 }
366 return cmd;
367}
368
369void qeth_clear_ipacmd_list(struct qeth_card *card)
370{
371 struct qeth_reply *reply, *r;
372 unsigned long flags;
373
847a50fd 374 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 375
376 spin_lock_irqsave(&card->lock, flags);
377 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
378 qeth_get_reply(reply);
379 reply->rc = -EIO;
380 atomic_inc(&reply->received);
381 list_del_init(&reply->list);
382 wake_up(&reply->wait_q);
383 qeth_put_reply(reply);
384 }
385 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 386 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 387}
388EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
389
5113fec0
UB		 390static int qeth_check_idx_response(struct qeth_card *card,
391 unsigned char *buffer)
4a71df50
FB		 392{
393 if (!buffer)
394 return 0;
395
d11ba0c4 396 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 397 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 398 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 399 "with cause code 0x%02x%s\n",
400 buffer[4],
401 ((buffer[4] == 0x22) ?
402 " -- try another portname" : ""));
847a50fd
CO		 403 QETH_CARD_TEXT(card, 2, "ckidxres");
404 QETH_CARD_TEXT(card, 2, " idxterm");
405 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 406 if (buffer[4] == 0xf6) {
407 dev_err(&card->gdev->dev,
408 "The qeth device is not configured "
409 "for the OSI layer required by z/VM\n");
410 return -EPERM;
411 }
4a71df50
FB		 412 return -EIO;
413 }
414 return 0;
415}
416
417static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
418 __u32 len)
419{
420 struct qeth_card *card;
421
4a71df50 422 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 423 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 424 if (channel == &card->read)
425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
426 else
427 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
428 channel->ccw.count = len;
429 channel->ccw.cda = (__u32) __pa(iob);
430}
431
432static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
433{
434 __u8 index;
435
847a50fd 436 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 437 index = channel->io_buf_no;
438 do {
439 if (channel->iob[index].state == BUF_STATE_FREE) {
440 channel->iob[index].state = BUF_STATE_LOCKED;
441 channel->io_buf_no = (channel->io_buf_no + 1) %
442 QETH_CMD_BUFFER_NO;
443 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
444 return channel->iob + index;
445 }
446 index = (index + 1) % QETH_CMD_BUFFER_NO;
447 } while (index != channel->io_buf_no);
448
449 return NULL;
450}
451
452void qeth_release_buffer(struct qeth_channel *channel,
453 struct qeth_cmd_buffer *iob)
454{
455 unsigned long flags;
456
847a50fd 457 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 458 spin_lock_irqsave(&channel->iob_lock, flags);
459 memset(iob->data, 0, QETH_BUFSIZE);
460 iob->state = BUF_STATE_FREE;
461 iob->callback = qeth_send_control_data_cb;
462 iob->rc = 0;
463 spin_unlock_irqrestore(&channel->iob_lock, flags);
464}
465EXPORT_SYMBOL_GPL(qeth_release_buffer);
466
467static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
468{
469 struct qeth_cmd_buffer *buffer = NULL;
470 unsigned long flags;
471
472 spin_lock_irqsave(&channel->iob_lock, flags);
473 buffer = __qeth_get_buffer(channel);
474 spin_unlock_irqrestore(&channel->iob_lock, flags);
475 return buffer;
476}
477
478struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
479{
480 struct qeth_cmd_buffer *buffer;
481 wait_event(channel->wait_q,
482 ((buffer = qeth_get_buffer(channel)) != NULL));
483 return buffer;
484}
485EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
486
487void qeth_clear_cmd_buffers(struct qeth_channel *channel)
488{
489 int cnt;
490
491 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
492 qeth_release_buffer(channel, &channel->iob[cnt]);
493 channel->buf_no = 0;
494 channel->io_buf_no = 0;
495}
496EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
497
498static void qeth_send_control_data_cb(struct qeth_channel *channel,
499 struct qeth_cmd_buffer *iob)
500{
501 struct qeth_card *card;
502 struct qeth_reply *reply, *r;
503 struct qeth_ipa_cmd *cmd;
504 unsigned long flags;
505 int keep_reply;
5113fec0 506 int rc = 0;
4a71df50 507
4a71df50 508 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 509 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 510 rc = qeth_check_idx_response(card, iob->data);
511 switch (rc) {
512 case 0:
513 break;
514 case -EIO:
4a71df50 515 qeth_clear_ipacmd_list(card);
5113fec0 516 qeth_schedule_recovery(card);
01fc3e86 517 /* fall through */
5113fec0 518 default:
4a71df50
FB		 519 goto out;
520 }
521
522 cmd = qeth_check_ipa_data(card, iob);
523 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
524 goto out;
525 /*in case of OSN : check if cmd is set */
526 if (card->info.type == QETH_CARD_TYPE_OSN &&
527 cmd &&
528 cmd->hdr.command != IPA_CMD_STARTLAN &&
529 card->osn_info.assist_cb != NULL) {
530 card->osn_info.assist_cb(card->dev, cmd);
531 goto out;
532 }
533
534 spin_lock_irqsave(&card->lock, flags);
535 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
536 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
537 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
538 qeth_get_reply(reply);
539 list_del_init(&reply->list);
540 spin_unlock_irqrestore(&card->lock, flags);
541 keep_reply = 0;
542 if (reply->callback != NULL) {
543 if (cmd) {
544 reply->offset = (__u16)((char *)cmd -
545 (char *)iob->data);
546 keep_reply = reply->callback(card,
547 reply,
548 (unsigned long)cmd);
549 } else
550 keep_reply = reply->callback(card,
551 reply,
552 (unsigned long)iob);
553 }
554 if (cmd)
555 reply->rc = (u16) cmd->hdr.return_code;
556 else if (iob->rc)
557 reply->rc = iob->rc;
558 if (keep_reply) {
559 spin_lock_irqsave(&card->lock, flags);
560 list_add_tail(&reply->list,
561 &card->cmd_waiter_list);
562 spin_unlock_irqrestore(&card->lock, flags);
563 } else {
564 atomic_inc(&reply->received);
565 wake_up(&reply->wait_q);
566 }
567 qeth_put_reply(reply);
568 goto out;
569 }
570 }
571 spin_unlock_irqrestore(&card->lock, flags);
572out:
573 memcpy(&card->seqno.pdu_hdr_ack,
574 QETH_PDU_HEADER_SEQ_NO(iob->data),
575 QETH_SEQ_NO_LENGTH);
576 qeth_release_buffer(channel, iob);
577}
578
579static int qeth_setup_channel(struct qeth_channel *channel)
580{
581 int cnt;
582
d11ba0c4 583 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 584 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 585 channel->iob[cnt].data =
4a71df50
FB		 586 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
587 if (channel->iob[cnt].data == NULL)
588 break;
589 channel->iob[cnt].state = BUF_STATE_FREE;
590 channel->iob[cnt].channel = channel;
591 channel->iob[cnt].callback = qeth_send_control_data_cb;
592 channel->iob[cnt].rc = 0;
593 }
594 if (cnt < QETH_CMD_BUFFER_NO) {
595 while (cnt-- > 0)
596 kfree(channel->iob[cnt].data);
597 return -ENOMEM;
598 }
599 channel->buf_no = 0;
600 channel->io_buf_no = 0;
601 atomic_set(&channel->irq_pending, 0);
602 spin_lock_init(&channel->iob_lock);
603
604 init_waitqueue_head(&channel->wait_q);
605 return 0;
606}
607
608static int qeth_set_thread_start_bit(struct qeth_card *card,
609 unsigned long thread)
610{
611 unsigned long flags;
612
613 spin_lock_irqsave(&card->thread_mask_lock, flags);
614 if (!(card->thread_allowed_mask & thread) ||
615 (card->thread_start_mask & thread)) {
616 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
617 return -EPERM;
618 }
619 card->thread_start_mask |= thread;
620 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
621 return 0;
622}
623
624void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
625{
626 unsigned long flags;
627
628 spin_lock_irqsave(&card->thread_mask_lock, flags);
629 card->thread_start_mask &= ~thread;
630 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
631 wake_up(&card->wait_q);
632}
633EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
634
635void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
636{
637 unsigned long flags;
638
639 spin_lock_irqsave(&card->thread_mask_lock, flags);
640 card->thread_running_mask &= ~thread;
641 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
642 wake_up(&card->wait_q);
643}
644EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
645
646static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
647{
648 unsigned long flags;
649 int rc = 0;
650
651 spin_lock_irqsave(&card->thread_mask_lock, flags);
652 if (card->thread_start_mask & thread) {
653 if ((card->thread_allowed_mask & thread) &&
654 !(card->thread_running_mask & thread)) {
655 rc = 1;
656 card->thread_start_mask &= ~thread;
657 card->thread_running_mask |= thread;
658 } else
659 rc = -EPERM;
660 }
661 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
662 return rc;
663}
664
665int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
666{
667 int rc = 0;
668
669 wait_event(card->wait_q,
670 (rc = __qeth_do_run_thread(card, thread)) >= 0);
671 return rc;
672}
673EXPORT_SYMBOL_GPL(qeth_do_run_thread);
674
675void qeth_schedule_recovery(struct qeth_card *card)
676{
847a50fd 677 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 678 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
679 schedule_work(&card->kernel_thread_starter);
680}
681EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
682
683static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
684{
685 int dstat, cstat;
686 char *sense;
847a50fd 687 struct qeth_card *card;
4a71df50
FB		 688
689 sense = (char *) irb->ecw;
23d805b6
PO		 690 cstat = irb->scsw.cmd.cstat;
691 dstat = irb->scsw.cmd.dstat;
847a50fd 692 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 693
694 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
695 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
696 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 697 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 698 dev_warn(&cdev->dev, "The qeth device driver "
699 "failed to recover an error on the device\n");
5113fec0 700 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 701 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 702 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
703 16, 1, irb, 64, 1);
704 return 1;
705 }
706
707 if (dstat & DEV_STAT_UNIT_CHECK) {
708 if (sense[SENSE_RESETTING_EVENT_BYTE] &
709 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 710 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 711 return 1;
712 }
713 if (sense[SENSE_COMMAND_REJECT_BYTE] &
714 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 715 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 716 return 1;
4a71df50
FB		 717 }
718 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 719 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 720 return 1;
721 }
722 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 723 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 724 return 0;
725 }
847a50fd 726 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 727 return 1;
728 }
729 return 0;
730}
731
732static long __qeth_check_irb_error(struct ccw_device *cdev,
733 unsigned long intparm, struct irb *irb)
734{
847a50fd
CO		 735 struct qeth_card *card;
736
737 card = CARD_FROM_CDEV(cdev);
738
4a71df50
FB		 739 if (!IS_ERR(irb))
740 return 0;
741
742 switch (PTR_ERR(irb)) {
743 case -EIO:
74eacdb9
FB		 744 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
745 dev_name(&cdev->dev));
847a50fd
CO		 746 QETH_CARD_TEXT(card, 2, "ckirberr");
747 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 748 break;
749 case -ETIMEDOUT:
74eacdb9
FB		 750 dev_warn(&cdev->dev, "A hardware operation timed out"
751 " on the device\n");
847a50fd
CO		 752 QETH_CARD_TEXT(card, 2, "ckirberr");
753 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 754 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 755 if (card && (card->data.ccwdev == cdev)) {
756 card->data.state = CH_STATE_DOWN;
757 wake_up(&card->wait_q);
758 }
759 }
760 break;
761 default:
74eacdb9
FB		 762 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
763 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 764 QETH_CARD_TEXT(card, 2, "ckirberr");
765 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 766 }
767 return PTR_ERR(irb);
768}
769
770static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
771 struct irb *irb)
772{
773 int rc;
774 int cstat, dstat;
775 struct qeth_cmd_buffer *buffer;
776 struct qeth_channel *channel;
777 struct qeth_card *card;
778 struct qeth_cmd_buffer *iob;
779 __u8 index;
780
4a71df50
FB		 781 if (__qeth_check_irb_error(cdev, intparm, irb))
782 return;
23d805b6
PO		 783 cstat = irb->scsw.cmd.cstat;
784 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 785
786 card = CARD_FROM_CDEV(cdev);
787 if (!card)
788 return;
789
847a50fd
CO		 790 QETH_CARD_TEXT(card, 5, "irq");
791
4a71df50
FB		 792 if (card->read.ccwdev == cdev) {
793 channel = &card->read;
847a50fd 794 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 795 } else if (card->write.ccwdev == cdev) {
796 channel = &card->write;
847a50fd 797 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 798 } else {
799 channel = &card->data;
847a50fd 800 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 801 }
802 atomic_set(&channel->irq_pending, 0);
803
23d805b6 804 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 805 channel->state = CH_STATE_STOPPED;
806
23d805b6 807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 808 channel->state = CH_STATE_HALTED;
809
810 /*let's wake up immediately on data channel*/
811 if ((channel == &card->data) && (intparm != 0) &&
812 (intparm != QETH_RCD_PARM))
813 goto out;
814
815 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 816 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 817 /* we don't have to handle this further */
818 intparm = 0;
819 }
820 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 821 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 822 /* we don't have to handle this further */
823 intparm = 0;
824 }
825 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
826 (dstat & DEV_STAT_UNIT_CHECK) ||
827 (cstat)) {
828 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 829 dev_warn(&channel->ccwdev->dev,
830 "The qeth device driver failed to recover "
831 "an error on the device\n");
832 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
833 "0x%X dstat 0x%X\n",
834 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 835 print_hex_dump(KERN_WARNING, "qeth: irb ",
836 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
837 print_hex_dump(KERN_WARNING, "qeth: sense data ",
838 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
839 }
840 if (intparm == QETH_RCD_PARM) {
841 channel->state = CH_STATE_DOWN;
842 goto out;
843 }
844 rc = qeth_get_problem(cdev, irb);
845 if (rc) {
28a7e4c9 846 qeth_clear_ipacmd_list(card);
4a71df50
FB		 847 qeth_schedule_recovery(card);
848 goto out;
849 }
850 }
851
852 if (intparm == QETH_RCD_PARM) {
853 channel->state = CH_STATE_RCD_DONE;
854 goto out;
855 }
856 if (intparm) {
857 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
858 buffer->state = BUF_STATE_PROCESSED;
859 }
860 if (channel == &card->data)
861 return;
862 if (channel == &card->read &&
863 channel->state == CH_STATE_UP)
864 qeth_issue_next_read(card);
865
866 iob = channel->iob;
867 index = channel->buf_no;
868 while (iob[index].state == BUF_STATE_PROCESSED) {
869 if (iob[index].callback != NULL)
870 iob[index].callback(channel, iob + index);
871
872 index = (index + 1) % QETH_CMD_BUFFER_NO;
873 }
874 channel->buf_no = index;
875out:
876 wake_up(&card->wait_q);
877 return;
878}
879
b67d801f
UB		 880static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
881 struct qeth_qdio_out_buffer *buf)
4a71df50
FB		 882{
883 int i;
884 struct sk_buff *skb;
885
886 /* is PCI flag set on buffer? */
887 if (buf->buffer->element[0].flags & 0x40)
888 atomic_dec(&queue->set_pci_flags_count);
889
b67d801f
UB		 890 skb = skb_dequeue(&buf->skb_list);
891 while (skb) {
892 atomic_dec(&skb->users);
893 dev_kfree_skb_any(skb);
4a71df50
FB		 894 skb = skb_dequeue(&buf->skb_list);
895 }
4a71df50 896 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 897 if (buf->buffer->element[i].addr && buf->is_header[i])
898 kmem_cache_free(qeth_core_header_cache,
899 buf->buffer->element[i].addr);
900 buf->is_header[i] = 0;
4a71df50
FB		 901 buf->buffer->element[i].length = 0;
902 buf->buffer->element[i].addr = NULL;
903 buf->buffer->element[i].flags = 0;
904 }
9f29f6de 905 buf->buffer->element[15].flags = 0;
4a71df50
FB		 906 buf->next_element_to_fill = 0;
907 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
908}
909
910void qeth_clear_qdio_buffers(struct qeth_card *card)
911{
912 int i, j;
913
847a50fd 914 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50
FB		 915 /* clear outbound buffers to free skbs */
916 for (i = 0; i < card->qdio.no_out_queues; ++i)
917 if (card->qdio.out_qs[i]) {
918 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
919 qeth_clear_output_buffer(card->qdio.out_qs[i],
920 &card->qdio.out_qs[i]->bufs[j]);
921 }
922}
923EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
924
925static void qeth_free_buffer_pool(struct qeth_card *card)
926{
927 struct qeth_buffer_pool_entry *pool_entry, *tmp;
928 int i = 0;
4a71df50
FB		 929 list_for_each_entry_safe(pool_entry, tmp,
930 &card->qdio.init_pool.entry_list, init_list){
931 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
932 free_page((unsigned long)pool_entry->elements[i]);
933 list_del(&pool_entry->init_list);
934 kfree(pool_entry);
935 }
936}
937
938static void qeth_free_qdio_buffers(struct qeth_card *card)
939{
940 int i, j;
941
4a71df50
FB		 942 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
943 QETH_QDIO_UNINITIALIZED)
944 return;
945 kfree(card->qdio.in_q);
946 card->qdio.in_q = NULL;
947 /* inbound buffer pool */
948 qeth_free_buffer_pool(card);
949 /* free outbound qdio_qs */
950 if (card->qdio.out_qs) {
951 for (i = 0; i < card->qdio.no_out_queues; ++i) {
952 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
953 qeth_clear_output_buffer(card->qdio.out_qs[i],
954 &card->qdio.out_qs[i]->bufs[j]);
955 kfree(card->qdio.out_qs[i]);
956 }
957 kfree(card->qdio.out_qs);
958 card->qdio.out_qs = NULL;
959 }
960}
961
962static void qeth_clean_channel(struct qeth_channel *channel)
963{
964 int cnt;
965
d11ba0c4 966 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 967 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
968 kfree(channel->iob[cnt].data);
969}
970
5113fec0 971static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 972{
4a71df50
FB		 973 struct ccw_device *ccwdev;
974 struct channelPath_dsc {
975 u8 flags;
976 u8 lsn;
977 u8 desc;
978 u8 chpid;
979 u8 swla;
980 u8 zeroes;
981 u8 chla;
982 u8 chpp;
983 } *chp_dsc;
984
5113fec0 985 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 986
987 ccwdev = card->data.ccwdev;
988 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
989 if (chp_dsc != NULL) {
990 /* CHPP field bit 6 == 1 -> single queue */
5113fec0
UB		 991 if ((chp_dsc->chpp & 0x02) == 0x02)
992 card->qdio.no_out_queues = 1;
993 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 994 kfree(chp_dsc);
995 }
5113fec0
UB		 996 if (card->qdio.no_out_queues == 1) {
997 card->qdio.default_out_queue = 0;
998 dev_info(&card->gdev->dev,
999 "Priority Queueing not supported\n");
1000 }
1001 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1002 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1003 return;
4a71df50
FB		 1004}
1005
1006static void qeth_init_qdio_info(struct qeth_card *card)
1007{
d11ba0c4 1008 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1009 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1010 /* inbound */
1011 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1012 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1013 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1014 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1015 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1016}
1017
1018static void qeth_set_intial_options(struct qeth_card *card)
1019{
1020 card->options.route4.type = NO_ROUTER;
1021 card->options.route6.type = NO_ROUTER;
1022 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1023 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1024 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1025 card->options.fake_broadcast = 0;
1026 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1027 card->options.performance_stats = 0;
1028 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1029 card->options.isolation = ISOLATION_MODE_NONE;
4a71df50
FB		 1030}
1031
1032static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1033{
1034 unsigned long flags;
1035 int rc = 0;
1036
1037 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1038 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1039 (u8) card->thread_start_mask,
1040 (u8) card->thread_allowed_mask,
1041 (u8) card->thread_running_mask);
1042 rc = (card->thread_start_mask & thread);
1043 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1044 return rc;
1045}
1046
1047static void qeth_start_kernel_thread(struct work_struct *work)
1048{
1049 struct qeth_card *card = container_of(work, struct qeth_card,
1050 kernel_thread_starter);
847a50fd 1051 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1052
1053 if (card->read.state != CH_STATE_UP &&
1054 card->write.state != CH_STATE_UP)
1055 return;
1056 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1057 kthread_run(card->discipline.recover, (void *) card,
1058 "qeth_recover");
1059}
1060
1061static int qeth_setup_card(struct qeth_card *card)
1062{
1063
d11ba0c4
PT		 1064 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1065 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1066
1067 card->read.state = CH_STATE_DOWN;
1068 card->write.state = CH_STATE_DOWN;
1069 card->data.state = CH_STATE_DOWN;
1070 card->state = CARD_STATE_DOWN;
1071 card->lan_online = 0;
1072 card->use_hard_stop = 0;
908abbb5 1073 card->read_or_write_problem = 0;
4a71df50
FB		 1074 card->dev = NULL;
1075 spin_lock_init(&card->vlanlock);
1076 spin_lock_init(&card->mclock);
1077 card->vlangrp = NULL;
1078 spin_lock_init(&card->lock);
1079 spin_lock_init(&card->ip_lock);
1080 spin_lock_init(&card->thread_mask_lock);
c4949f07 1081 mutex_init(&card->conf_mutex);
9dc48ccc 1082 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1083 card->thread_start_mask = 0;
1084 card->thread_allowed_mask = 0;
1085 card->thread_running_mask = 0;
1086 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1087 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1088 INIT_LIST_HEAD(card->ip_tbd_list);
1089 INIT_LIST_HEAD(&card->cmd_waiter_list);
1090 init_waitqueue_head(&card->wait_q);
1091 /* intial options */
1092 qeth_set_intial_options(card);
1093 /* IP address takeover */
1094 INIT_LIST_HEAD(&card->ipato.entries);
1095 card->ipato.enabled = 0;
1096 card->ipato.invert4 = 0;
1097 card->ipato.invert6 = 0;
1098 /* init QDIO stuff */
1099 qeth_init_qdio_info(card);
1100 return 0;
1101}
1102
6bcac508
MS		 1103static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1104{
1105 struct qeth_card *card = container_of(slr, struct qeth_card,
1106 qeth_service_level);
0d788c7d
KDW		 1107 if (card->info.mcl_level[0])
1108 seq_printf(m, "qeth: %s firmware level %s\n",
1109 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1110}
1111
4a71df50
FB		 1112static struct qeth_card *qeth_alloc_card(void)
1113{
1114 struct qeth_card *card;
1115
d11ba0c4 1116 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1117 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1118 if (!card)
76b11f8e 1119 goto out;
d11ba0c4 1120 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1121 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1122 if (!card->ip_tbd_list) {
1123 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1124 goto out_card;
4a71df50 1125 }
76b11f8e
UB		 1126 if (qeth_setup_channel(&card->read))
1127 goto out_ip;
1128 if (qeth_setup_channel(&card->write))
1129 goto out_channel;
4a71df50 1130 card->options.layer2 = -1;
6bcac508
MS		 1131 card->qeth_service_level.seq_print = qeth_core_sl_print;
1132 register_service_level(&card->qeth_service_level);
4a71df50 1133 return card;
76b11f8e
UB		 1134
1135out_channel:
1136 qeth_clean_channel(&card->read);
1137out_ip:
1138 kfree(card->ip_tbd_list);
1139out_card:
1140 kfree(card);
1141out:
1142 return NULL;
4a71df50
FB		 1143}
1144
1145static int qeth_determine_card_type(struct qeth_card *card)
1146{
1147 int i = 0;
1148
d11ba0c4 1149 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1150
1151 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1152 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1153 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1154 if ((CARD_RDEV(card)->id.dev_type ==
1155 known_devices[i][QETH_DEV_TYPE_IND]) &&
1156 (CARD_RDEV(card)->id.dev_model ==
1157 known_devices[i][QETH_DEV_MODEL_IND])) {
1158 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1159 card->qdio.no_out_queues =
1160 known_devices[i][QETH_QUEUE_NO_IND];
1161 card->info.is_multicast_different =
1162 known_devices[i][QETH_MULTICAST_IND];
1163 qeth_get_channel_path_desc(card);
4a71df50
FB		 1164 return 0;
1165 }
1166 i++;
1167 }
1168 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1169 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1170 "unknown type\n");
4a71df50
FB		 1171 return -ENOENT;
1172}
1173
1174static int qeth_clear_channel(struct qeth_channel *channel)
1175{
1176 unsigned long flags;
1177 struct qeth_card *card;
1178 int rc;
1179
4a71df50 1180 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1181 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1182 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1183 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1184 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1185
1186 if (rc)
1187 return rc;
1188 rc = wait_event_interruptible_timeout(card->wait_q,
1189 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1190 if (rc == -ERESTARTSYS)
1191 return rc;
1192 if (channel->state != CH_STATE_STOPPED)
1193 return -ETIME;
1194 channel->state = CH_STATE_DOWN;
1195 return 0;
1196}
1197
1198static int qeth_halt_channel(struct qeth_channel *channel)
1199{
1200 unsigned long flags;
1201 struct qeth_card *card;
1202 int rc;
1203
4a71df50 1204 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1205 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1206 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1207 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1208 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1209
1210 if (rc)
1211 return rc;
1212 rc = wait_event_interruptible_timeout(card->wait_q,
1213 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1214 if (rc == -ERESTARTSYS)
1215 return rc;
1216 if (channel->state != CH_STATE_HALTED)
1217 return -ETIME;
1218 return 0;
1219}
1220
1221static int qeth_halt_channels(struct qeth_card *card)
1222{
1223 int rc1 = 0, rc2 = 0, rc3 = 0;
1224
847a50fd 1225 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1226 rc1 = qeth_halt_channel(&card->read);
1227 rc2 = qeth_halt_channel(&card->write);
1228 rc3 = qeth_halt_channel(&card->data);
1229 if (rc1)
1230 return rc1;
1231 if (rc2)
1232 return rc2;
1233 return rc3;
1234}
1235
1236static int qeth_clear_channels(struct qeth_card *card)
1237{
1238 int rc1 = 0, rc2 = 0, rc3 = 0;
1239
847a50fd 1240 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1241 rc1 = qeth_clear_channel(&card->read);
1242 rc2 = qeth_clear_channel(&card->write);
1243 rc3 = qeth_clear_channel(&card->data);
1244 if (rc1)
1245 return rc1;
1246 if (rc2)
1247 return rc2;
1248 return rc3;
1249}
1250
1251static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1252{
1253 int rc = 0;
1254
847a50fd 1255 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1256
1257 if (halt)
1258 rc = qeth_halt_channels(card);
1259 if (rc)
1260 return rc;
1261 return qeth_clear_channels(card);
1262}
1263
1264int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1265{
1266 int rc = 0;
1267
847a50fd 1268 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1269 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1270 QETH_QDIO_CLEANING)) {
1271 case QETH_QDIO_ESTABLISHED:
1272 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1273 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1274 QDIO_FLAG_CLEANUP_USING_HALT);
1275 else
cc961d40 1276 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1277 QDIO_FLAG_CLEANUP_USING_CLEAR);
1278 if (rc)
847a50fd 1279 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1280 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1281 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1282 break;
1283 case QETH_QDIO_CLEANING:
1284 return rc;
1285 default:
1286 break;
1287 }
1288 rc = qeth_clear_halt_card(card, use_halt);
1289 if (rc)
847a50fd 1290 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1291 card->state = CARD_STATE_DOWN;
1292 return rc;
1293}
1294EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1295
1296static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1297 int *length)
1298{
1299 struct ciw *ciw;
1300 char *rcd_buf;
1301 int ret;
1302 struct qeth_channel *channel = &card->data;
1303 unsigned long flags;
1304
1305 /*
1306 * scan for RCD command in extended SenseID data
1307 */
1308 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1309 if (!ciw || ciw->cmd == 0)
1310 return -EOPNOTSUPP;
1311 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1312 if (!rcd_buf)
1313 return -ENOMEM;
1314
1315 channel->ccw.cmd_code = ciw->cmd;
1316 channel->ccw.cda = (__u32) __pa(rcd_buf);
1317 channel->ccw.count = ciw->count;
1318 channel->ccw.flags = CCW_FLAG_SLI;
1319 channel->state = CH_STATE_RCD;
1320 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1321 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1322 QETH_RCD_PARM, LPM_ANYPATH, 0,
1323 QETH_RCD_TIMEOUT);
1324 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1325 if (!ret)
1326 wait_event(card->wait_q,
1327 (channel->state == CH_STATE_RCD_DONE ||
1328 channel->state == CH_STATE_DOWN));
1329 if (channel->state == CH_STATE_DOWN)
1330 ret = -EIO;
1331 else
1332 channel->state = CH_STATE_DOWN;
1333 if (ret) {
1334 kfree(rcd_buf);
1335 *buffer = NULL;
1336 *length = 0;
1337 } else {
1338 *length = ciw->count;
1339 *buffer = rcd_buf;
1340 }
1341 return ret;
1342}
1343
a60389ab 1344static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1345{
a60389ab 1346 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1347 card->info.chpid = prcd[30];
1348 card->info.unit_addr2 = prcd[31];
1349 card->info.cula = prcd[63];
1350 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1351 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1352}
1353
1354static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1355{
1356 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1357
1358 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1359 card->info.blkt.time_total = 250;
1360 card->info.blkt.inter_packet = 5;
1361 card->info.blkt.inter_packet_jumbo = 15;
1362 } else {
1363 card->info.blkt.time_total = 0;
1364 card->info.blkt.inter_packet = 0;
1365 card->info.blkt.inter_packet_jumbo = 0;
1366 }
4a71df50
FB		 1367}
1368
1369static void qeth_init_tokens(struct qeth_card *card)
1370{
1371 card->token.issuer_rm_w = 0x00010103UL;
1372 card->token.cm_filter_w = 0x00010108UL;
1373 card->token.cm_connection_w = 0x0001010aUL;
1374 card->token.ulp_filter_w = 0x0001010bUL;
1375 card->token.ulp_connection_w = 0x0001010dUL;
1376}
1377
1378static void qeth_init_func_level(struct qeth_card *card)
1379{
5113fec0
UB		 1380 switch (card->info.type) {
1381 case QETH_CARD_TYPE_IQD:
6298263a 1382 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1383 break;
1384 case QETH_CARD_TYPE_OSD:
0132951e 1385 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1386 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1387 break;
1388 default:
1389 break;
4a71df50
FB		 1390 }
1391}
1392
4a71df50
FB		 1393static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1394 void (*idx_reply_cb)(struct qeth_channel *,
1395 struct qeth_cmd_buffer *))
1396{
1397 struct qeth_cmd_buffer *iob;
1398 unsigned long flags;
1399 int rc;
1400 struct qeth_card *card;
1401
d11ba0c4 1402 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1403 card = CARD_FROM_CDEV(channel->ccwdev);
1404 iob = qeth_get_buffer(channel);
1405 iob->callback = idx_reply_cb;
1406 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1407 channel->ccw.count = QETH_BUFSIZE;
1408 channel->ccw.cda = (__u32) __pa(iob->data);
1409
1410 wait_event(card->wait_q,
1411 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1412 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1413 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1414 rc = ccw_device_start(channel->ccwdev,
1415 &channel->ccw, (addr_t) iob, 0, 0);
1416 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1417
1418 if (rc) {
14cc21b6 1419 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1420 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1421 atomic_set(&channel->irq_pending, 0);
1422 wake_up(&card->wait_q);
1423 return rc;
1424 }
1425 rc = wait_event_interruptible_timeout(card->wait_q,
1426 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1427 if (rc == -ERESTARTSYS)
1428 return rc;
1429 if (channel->state != CH_STATE_UP) {
1430 rc = -ETIME;
d11ba0c4 1431 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1432 qeth_clear_cmd_buffers(channel);
1433 } else
1434 rc = 0;
1435 return rc;
1436}
1437
1438static int qeth_idx_activate_channel(struct qeth_channel *channel,
1439 void (*idx_reply_cb)(struct qeth_channel *,
1440 struct qeth_cmd_buffer *))
1441{
1442 struct qeth_card *card;
1443 struct qeth_cmd_buffer *iob;
1444 unsigned long flags;
1445 __u16 temp;
1446 __u8 tmp;
1447 int rc;
f06f6f32 1448 struct ccw_dev_id temp_devid;
4a71df50
FB		 1449
1450 card = CARD_FROM_CDEV(channel->ccwdev);
1451
d11ba0c4 1452 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1453
1454 iob = qeth_get_buffer(channel);
1455 iob->callback = idx_reply_cb;
1456 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1457 channel->ccw.count = IDX_ACTIVATE_SIZE;
1458 channel->ccw.cda = (__u32) __pa(iob->data);
1459 if (channel == &card->write) {
1460 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1461 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1462 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1463 card->seqno.trans_hdr++;
1464 } else {
1465 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1466 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1467 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1468 }
1469 tmp = ((__u8)card->info.portno) | 0x80;
1470 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1471 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1472 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1473 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1474 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1475 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1476 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1477 temp = (card->info.cula << 8) + card->info.unit_addr2;
1478 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1479
1480 wait_event(card->wait_q,
1481 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1482 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1483 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1484 rc = ccw_device_start(channel->ccwdev,
1485 &channel->ccw, (addr_t) iob, 0, 0);
1486 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1487
1488 if (rc) {
14cc21b6
FB		 1489 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1490 rc);
d11ba0c4 1491 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1492 atomic_set(&channel->irq_pending, 0);
1493 wake_up(&card->wait_q);
1494 return rc;
1495 }
1496 rc = wait_event_interruptible_timeout(card->wait_q,
1497 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1498 if (rc == -ERESTARTSYS)
1499 return rc;
1500 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1501 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1502 " failed to recover an error on the device\n");
1503 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1504 dev_name(&channel->ccwdev->dev));
d11ba0c4 1505 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1506 qeth_clear_cmd_buffers(channel);
1507 return -ETIME;
1508 }
1509 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1510}
1511
1512static int qeth_peer_func_level(int level)
1513{
1514 if ((level & 0xff) == 8)
1515 return (level & 0xff) + 0x400;
1516 if (((level >> 8) & 3) == 1)
1517 return (level & 0xff) + 0x200;
1518 return level;
1519}
1520
1521static void qeth_idx_write_cb(struct qeth_channel *channel,
1522 struct qeth_cmd_buffer *iob)
1523{
1524 struct qeth_card *card;
1525 __u16 temp;
1526
d11ba0c4 1527 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1528
1529 if (channel->state == CH_STATE_DOWN) {
1530 channel->state = CH_STATE_ACTIVATING;
1531 goto out;
1532 }
1533 card = CARD_FROM_CDEV(channel->ccwdev);
1534
1535 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1536 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1537 dev_err(&card->write.ccwdev->dev,
1538 "The adapter is used exclusively by another "
1539 "host\n");
4a71df50 1540 else
74eacdb9
FB		 1541 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1542 " negative reply\n",
1543 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1544 goto out;
1545 }
1546 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1547 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1548 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1549 "function level mismatch (sent: 0x%x, received: "
1550 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1551 card->info.func_level, temp);
4a71df50
FB		 1552 goto out;
1553 }
1554 channel->state = CH_STATE_UP;
1555out:
1556 qeth_release_buffer(channel, iob);
1557}
1558
1559static void qeth_idx_read_cb(struct qeth_channel *channel,
1560 struct qeth_cmd_buffer *iob)
1561{
1562 struct qeth_card *card;
1563 __u16 temp;
1564
d11ba0c4 1565 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1566 if (channel->state == CH_STATE_DOWN) {
1567 channel->state = CH_STATE_ACTIVATING;
1568 goto out;
1569 }
1570
1571 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1572 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1573 goto out;
1574
1575 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1576 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1577 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1578 dev_err(&card->write.ccwdev->dev,
1579 "The adapter is used exclusively by another "
1580 "host\n");
5113fec0
UB		 1581 break;
1582 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1583 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1584 dev_err(&card->read.ccwdev->dev,
1585 "Setting the device online failed because of "
01fc3e86 1586 "insufficient authorization\n");
5113fec0
UB		 1587 break;
1588 default:
74eacdb9
FB		 1589 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1590 " negative reply\n",
1591 dev_name(&card->read.ccwdev->dev));
5113fec0 1592 }
01fc3e86
UB		 1593 QETH_CARD_TEXT_(card, 2, "idxread%c",
1594 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1595 goto out;
1596 }
1597
1598/**
5113fec0
UB		 1599 * * temporary fix for microcode bug
1600 * * to revert it,replace OR by AND
1601 * */
4a71df50 1602 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1603 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1604 card->info.portname_required = 1;
1605
1606 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1607 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1608 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1609 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1610 dev_name(&card->read.ccwdev->dev),
1611 card->info.func_level, temp);
4a71df50
FB		 1612 goto out;
1613 }
1614 memcpy(&card->token.issuer_rm_r,
1615 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1616 QETH_MPC_TOKEN_LENGTH);
1617 memcpy(&card->info.mcl_level[0],
1618 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1619 channel->state = CH_STATE_UP;
1620out:
1621 qeth_release_buffer(channel, iob);
1622}
1623
1624void qeth_prepare_control_data(struct qeth_card *card, int len,
1625 struct qeth_cmd_buffer *iob)
1626{
1627 qeth_setup_ccw(&card->write, iob->data, len);
1628 iob->callback = qeth_release_buffer;
1629
1630 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1631 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1632 card->seqno.trans_hdr++;
1633 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1634 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1635 card->seqno.pdu_hdr++;
1636 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1637 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1638 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1639}
1640EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1641
1642int qeth_send_control_data(struct qeth_card *card, int len,
1643 struct qeth_cmd_buffer *iob,
1644 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1645 unsigned long),
1646 void *reply_param)
1647{
1648 int rc;
1649 unsigned long flags;
1650 struct qeth_reply *reply = NULL;
7834cd5a 1651 unsigned long timeout, event_timeout;
5b54e16f 1652 struct qeth_ipa_cmd *cmd;
4a71df50 1653
847a50fd 1654 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1655
908abbb5
UB		 1656 if (card->read_or_write_problem) {
1657 qeth_release_buffer(iob->channel, iob);
1658 return -EIO;
1659 }
4a71df50
FB		 1660 reply = qeth_alloc_reply(card);
1661 if (!reply) {
4a71df50
FB		 1662 return -ENOMEM;
1663 }
1664 reply->callback = reply_cb;
1665 reply->param = reply_param;
1666 if (card->state == CARD_STATE_DOWN)
1667 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1668 else
1669 reply->seqno = card->seqno.ipa++;
1670 init_waitqueue_head(&reply->wait_q);
1671 spin_lock_irqsave(&card->lock, flags);
1672 list_add_tail(&reply->list, &card->cmd_waiter_list);
1673 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1674 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1675
1676 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1677 qeth_prepare_control_data(card, len, iob);
1678
1679 if (IS_IPA(iob->data))
7834cd5a 1680 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1681 else
7834cd5a
HC		 1682 event_timeout = QETH_TIMEOUT;
1683 timeout = jiffies + event_timeout;
4a71df50 1684
847a50fd 1685 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 1686 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1687 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1688 (addr_t) iob, 0, 0);
1689 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1690 if (rc) {
74eacdb9
FB		 1691 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1692 "ccw_device_start rc = %i\n",
1693 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 1694 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 1695 spin_lock_irqsave(&card->lock, flags);
1696 list_del_init(&reply->list);
1697 qeth_put_reply(reply);
1698 spin_unlock_irqrestore(&card->lock, flags);
1699 qeth_release_buffer(iob->channel, iob);
1700 atomic_set(&card->write.irq_pending, 0);
1701 wake_up(&card->wait_q);
1702 return rc;
1703 }
5b54e16f
FB		 1704
1705 /* we have only one long running ipassist, since we can ensure
1706 process context of this command we can sleep */
1707 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1708 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1709 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1710 if (!wait_event_timeout(reply->wait_q,
7834cd5a 1711 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 1712 goto time_err;
1713 } else {
1714 while (!atomic_read(&reply->received)) {
1715 if (time_after(jiffies, timeout))
1716 goto time_err;
1717 cpu_relax();
1718 };
1719 }
1720
1721 rc = reply->rc;
1722 qeth_put_reply(reply);
1723 return rc;
1724
1725time_err:
1726 spin_lock_irqsave(&reply->card->lock, flags);
1727 list_del_init(&reply->list);
1728 spin_unlock_irqrestore(&reply->card->lock, flags);
1729 reply->rc = -ETIME;
1730 atomic_inc(&reply->received);
908abbb5
UB		 1731 atomic_set(&card->write.irq_pending, 0);
1732 qeth_release_buffer(iob->channel, iob);
1733 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
5b54e16f 1734 wake_up(&reply->wait_q);
4a71df50
FB		 1735 rc = reply->rc;
1736 qeth_put_reply(reply);
1737 return rc;
1738}
1739EXPORT_SYMBOL_GPL(qeth_send_control_data);
1740
1741static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1742 unsigned long data)
1743{
1744 struct qeth_cmd_buffer *iob;
1745
d11ba0c4 1746 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1747
1748 iob = (struct qeth_cmd_buffer *) data;
1749 memcpy(&card->token.cm_filter_r,
1750 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1751 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1752 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1753 return 0;
1754}
1755
1756static int qeth_cm_enable(struct qeth_card *card)
1757{
1758 int rc;
1759 struct qeth_cmd_buffer *iob;
1760
d11ba0c4 1761 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1762
1763 iob = qeth_wait_for_buffer(&card->write);
1764 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1765 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1766 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1767 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1768 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1769
1770 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1771 qeth_cm_enable_cb, NULL);
1772 return rc;
1773}
1774
1775static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1776 unsigned long data)
1777{
1778
1779 struct qeth_cmd_buffer *iob;
1780
d11ba0c4 1781 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1782
1783 iob = (struct qeth_cmd_buffer *) data;
1784 memcpy(&card->token.cm_connection_r,
1785 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1786 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1787 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1788 return 0;
1789}
1790
1791static int qeth_cm_setup(struct qeth_card *card)
1792{
1793 int rc;
1794 struct qeth_cmd_buffer *iob;
1795
d11ba0c4 1796 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1797
1798 iob = qeth_wait_for_buffer(&card->write);
1799 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1800 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1801 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1802 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1803 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1804 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1805 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1806 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1807 qeth_cm_setup_cb, NULL);
1808 return rc;
1809
1810}
1811
1812static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1813{
1814 switch (card->info.type) {
1815 case QETH_CARD_TYPE_UNKNOWN:
1816 return 1500;
1817 case QETH_CARD_TYPE_IQD:
1818 return card->info.max_mtu;
5113fec0 1819 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 1820 switch (card->info.link_type) {
1821 case QETH_LINK_TYPE_HSTR:
1822 case QETH_LINK_TYPE_LANE_TR:
1823 return 2000;
1824 default:
1825 return 1492;
1826 }
5113fec0
UB		 1827 case QETH_CARD_TYPE_OSM:
1828 case QETH_CARD_TYPE_OSX:
1829 return 1492;
4a71df50
FB		 1830 default:
1831 return 1500;
1832 }
1833}
1834
4a71df50
FB		 1835static inline int qeth_get_mtu_outof_framesize(int framesize)
1836{
1837 switch (framesize) {
1838 case 0x4000:
1839 return 8192;
1840 case 0x6000:
1841 return 16384;
1842 case 0xa000:
1843 return 32768;
1844 case 0xffff:
1845 return 57344;
1846 default:
1847 return 0;
1848 }
1849}
1850
1851static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1852{
1853 switch (card->info.type) {
5113fec0
UB		 1854 case QETH_CARD_TYPE_OSD:
1855 case QETH_CARD_TYPE_OSM:
1856 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 1857 case QETH_CARD_TYPE_IQD:
1858 return ((mtu >= 576) &&
9853b97b 1859 (mtu <= card->info.max_mtu));
4a71df50
FB		 1860 case QETH_CARD_TYPE_OSN:
1861 case QETH_CARD_TYPE_UNKNOWN:
1862 default:
1863 return 1;
1864 }
1865}
1866
1867static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1868 unsigned long data)
1869{
1870
1871 __u16 mtu, framesize;
1872 __u16 len;
1873 __u8 link_type;
1874 struct qeth_cmd_buffer *iob;
1875
d11ba0c4 1876 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1877
1878 iob = (struct qeth_cmd_buffer *) data;
1879 memcpy(&card->token.ulp_filter_r,
1880 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1881 QETH_MPC_TOKEN_LENGTH);
9853b97b 1882 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 1883 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1884 mtu = qeth_get_mtu_outof_framesize(framesize);
1885 if (!mtu) {
1886 iob->rc = -EINVAL;
d11ba0c4 1887 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1888 return 0;
1889 }
8b2e18f6
UB		 1890 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
1891 /* frame size has changed */
1892 if (card->dev &&
1893 ((card->dev->mtu == card->info.initial_mtu) ||
1894 (card->dev->mtu > mtu)))
1895 card->dev->mtu = mtu;
1896 qeth_free_qdio_buffers(card);
1897 }
4a71df50 1898 card->info.initial_mtu = mtu;
8b2e18f6 1899 card->info.max_mtu = mtu;
4a71df50
FB		 1900 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1901 } else {
1902 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 1903 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
1904 iob->data);
4a71df50
FB		 1905 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1906 }
1907
1908 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1909 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1910 memcpy(&link_type,
1911 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1912 card->info.link_type = link_type;
1913 } else
1914 card->info.link_type = 0;
01fc3e86 1915 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 1916 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1917 return 0;
1918}
1919
1920static int qeth_ulp_enable(struct qeth_card *card)
1921{
1922 int rc;
1923 char prot_type;
1924 struct qeth_cmd_buffer *iob;
1925
1926 /*FIXME: trace view callbacks*/
d11ba0c4 1927 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1928
1929 iob = qeth_wait_for_buffer(&card->write);
1930 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1931
1932 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1933 (__u8) card->info.portno;
1934 if (card->options.layer2)
1935 if (card->info.type == QETH_CARD_TYPE_OSN)
1936 prot_type = QETH_PROT_OSN2;
1937 else
1938 prot_type = QETH_PROT_LAYER2;
1939 else
1940 prot_type = QETH_PROT_TCPIP;
1941
1942 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1943 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1944 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1945 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1946 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1947 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1948 card->info.portname, 9);
1949 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1950 qeth_ulp_enable_cb, NULL);
1951 return rc;
1952
1953}
1954
1955static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1956 unsigned long data)
1957{
1958 struct qeth_cmd_buffer *iob;
65a1f898 1959 int rc = 0;
4a71df50 1960
d11ba0c4 1961 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1962
1963 iob = (struct qeth_cmd_buffer *) data;
1964 memcpy(&card->token.ulp_connection_r,
1965 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1966 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 1967 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1968 3)) {
1969 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1970 dev_err(&card->gdev->dev, "A connection could not be "
1971 "established because of an OLM limit\n");
bbb822a8 1972 iob->rc = -EMLINK;
65a1f898 1973 }
d11ba0c4 1974 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 1975 return rc;
4a71df50
FB		 1976}
1977
1978static int qeth_ulp_setup(struct qeth_card *card)
1979{
1980 int rc;
1981 __u16 temp;
1982 struct qeth_cmd_buffer *iob;
1983 struct ccw_dev_id dev_id;
1984
d11ba0c4 1985 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1986
1987 iob = qeth_wait_for_buffer(&card->write);
1988 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1989
1990 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1991 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1992 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1993 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1994 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1995 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1996
1997 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1998 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1999 temp = (card->info.cula << 8) + card->info.unit_addr2;
2000 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2001 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2002 qeth_ulp_setup_cb, NULL);
2003 return rc;
2004}
2005
2006static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2007{
2008 int i, j;
2009
d11ba0c4 2010 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2011
2012 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2013 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2014 return 0;
2015
2016 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2017 GFP_KERNEL);
4a71df50
FB		 2018 if (!card->qdio.in_q)
2019 goto out_nomem;
d11ba0c4
PT		 2020 QETH_DBF_TEXT(SETUP, 2, "inq");
2021 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2022 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2023 /* give inbound qeth_qdio_buffers their qdio_buffers */
2024 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2025 card->qdio.in_q->bufs[i].buffer =
2026 &card->qdio.in_q->qdio_bufs[i];
2027 /* inbound buffer pool */
2028 if (qeth_alloc_buffer_pool(card))
2029 goto out_freeinq;
2030 /* outbound */
2031 card->qdio.out_qs =
2032 kmalloc(card->qdio.no_out_queues *
2033 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2034 if (!card->qdio.out_qs)
2035 goto out_freepool;
2036 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2037 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2038 GFP_KERNEL);
4a71df50
FB		 2039 if (!card->qdio.out_qs[i])
2040 goto out_freeoutq;
d11ba0c4
PT		 2041 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2042 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2043 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2044 card->qdio.out_qs[i]->queue_no = i;
2045 /* give outbound qeth_qdio_buffers their qdio_buffers */
2046 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2047 card->qdio.out_qs[i]->bufs[j].buffer =
2048 &card->qdio.out_qs[i]->qdio_bufs[j];
2049 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2050 skb_list);
2051 lockdep_set_class(
2052 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2053 &qdio_out_skb_queue_key);
2054 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2055 }
2056 }
2057 return 0;
2058
2059out_freeoutq:
2060 while (i > 0)
2061 kfree(card->qdio.out_qs[--i]);
2062 kfree(card->qdio.out_qs);
2063 card->qdio.out_qs = NULL;
2064out_freepool:
2065 qeth_free_buffer_pool(card);
2066out_freeinq:
2067 kfree(card->qdio.in_q);
2068 card->qdio.in_q = NULL;
2069out_nomem:
2070 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2071 return -ENOMEM;
2072}
2073
2074static void qeth_create_qib_param_field(struct qeth_card *card,
2075 char *param_field)
2076{
2077
2078 param_field[0] = _ascebc['P'];
2079 param_field[1] = _ascebc['C'];
2080 param_field[2] = _ascebc['I'];
2081 param_field[3] = _ascebc['T'];
2082 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2083 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2084 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2085}
2086
2087static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2088 char *param_field)
2089{
2090 param_field[16] = _ascebc['B'];
2091 param_field[17] = _ascebc['L'];
2092 param_field[18] = _ascebc['K'];
2093 param_field[19] = _ascebc['T'];
2094 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2095 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2096 *((unsigned int *) (&param_field[28])) =
2097 card->info.blkt.inter_packet_jumbo;
2098}
2099
2100static int qeth_qdio_activate(struct qeth_card *card)
2101{
d11ba0c4 2102 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2103 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2104}
2105
2106static int qeth_dm_act(struct qeth_card *card)
2107{
2108 int rc;
2109 struct qeth_cmd_buffer *iob;
2110
d11ba0c4 2111 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2112
2113 iob = qeth_wait_for_buffer(&card->write);
2114 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2115
2116 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2117 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2118 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2119 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2120 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2121 return rc;
2122}
2123
2124static int qeth_mpc_initialize(struct qeth_card *card)
2125{
2126 int rc;
2127
d11ba0c4 2128 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2129
2130 rc = qeth_issue_next_read(card);
2131 if (rc) {
d11ba0c4 2132 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2133 return rc;
2134 }
2135 rc = qeth_cm_enable(card);
2136 if (rc) {
d11ba0c4 2137 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2138 goto out_qdio;
2139 }
2140 rc = qeth_cm_setup(card);
2141 if (rc) {
d11ba0c4 2142 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2143 goto out_qdio;
2144 }
2145 rc = qeth_ulp_enable(card);
2146 if (rc) {
d11ba0c4 2147 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2148 goto out_qdio;
2149 }
2150 rc = qeth_ulp_setup(card);
2151 if (rc) {
d11ba0c4 2152 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2153 goto out_qdio;
2154 }
2155 rc = qeth_alloc_qdio_buffers(card);
2156 if (rc) {
d11ba0c4 2157 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2158 goto out_qdio;
2159 }
2160 rc = qeth_qdio_establish(card);
2161 if (rc) {
d11ba0c4 2162 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2163 qeth_free_qdio_buffers(card);
2164 goto out_qdio;
2165 }
2166 rc = qeth_qdio_activate(card);
2167 if (rc) {
d11ba0c4 2168 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2169 goto out_qdio;
2170 }
2171 rc = qeth_dm_act(card);
2172 if (rc) {
d11ba0c4 2173 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2174 goto out_qdio;
2175 }
2176
2177 return 0;
2178out_qdio:
2179 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2180 return rc;
2181}
2182
2183static void qeth_print_status_with_portname(struct qeth_card *card)
2184{
2185 char dbf_text[15];
2186 int i;
2187
2188 sprintf(dbf_text, "%s", card->info.portname + 1);
2189 for (i = 0; i < 8; i++)
2190 dbf_text[i] =
2191 (char) _ebcasc[(__u8) dbf_text[i]];
2192 dbf_text[8] = 0;
74eacdb9 2193 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2194 "with link type %s (portname: %s)\n",
4a71df50
FB		 2195 qeth_get_cardname(card),
2196 (card->info.mcl_level[0]) ? " (level: " : "",
2197 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2198 (card->info.mcl_level[0]) ? ")" : "",
2199 qeth_get_cardname_short(card),
2200 dbf_text);
2201
2202}
2203
2204static void qeth_print_status_no_portname(struct qeth_card *card)
2205{
2206 if (card->info.portname[0])
74eacdb9 2207 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2208 "card%s%s%s\nwith link type %s "
2209 "(no portname needed by interface).\n",
4a71df50
FB		 2210 qeth_get_cardname(card),
2211 (card->info.mcl_level[0]) ? " (level: " : "",
2212 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2213 (card->info.mcl_level[0]) ? ")" : "",
2214 qeth_get_cardname_short(card));
2215 else
74eacdb9 2216 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2217 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2218 qeth_get_cardname(card),
2219 (card->info.mcl_level[0]) ? " (level: " : "",
2220 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2221 (card->info.mcl_level[0]) ? ")" : "",
2222 qeth_get_cardname_short(card));
2223}
2224
2225void qeth_print_status_message(struct qeth_card *card)
2226{
2227 switch (card->info.type) {
5113fec0
UB		 2228 case QETH_CARD_TYPE_OSD:
2229 case QETH_CARD_TYPE_OSM:
2230 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2231 /* VM will use a non-zero first character
2232 * to indicate a HiperSockets like reporting
2233 * of the level OSA sets the first character to zero
2234 * */
2235 if (!card->info.mcl_level[0]) {
2236 sprintf(card->info.mcl_level, "%02x%02x",
2237 card->info.mcl_level[2],
2238 card->info.mcl_level[3]);
2239
2240 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2241 break;
2242 }
2243 /* fallthrough */
2244 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2245 if ((card->info.guestlan) ||
2246 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2247 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2248 card->info.mcl_level[0]];
2249 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2250 card->info.mcl_level[1]];
2251 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2252 card->info.mcl_level[2]];
2253 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2254 card->info.mcl_level[3]];
2255 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2256 }
2257 break;
2258 default:
2259 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2260 }
2261 if (card->info.portname_required)
2262 qeth_print_status_with_portname(card);
2263 else
2264 qeth_print_status_no_portname(card);
2265}
2266EXPORT_SYMBOL_GPL(qeth_print_status_message);
2267
4a71df50
FB		 2268static void qeth_initialize_working_pool_list(struct qeth_card *card)
2269{
2270 struct qeth_buffer_pool_entry *entry;
2271
847a50fd 2272 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2273
2274 list_for_each_entry(entry,
2275 &card->qdio.init_pool.entry_list, init_list) {
2276 qeth_put_buffer_pool_entry(card, entry);
2277 }
2278}
2279
2280static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2281 struct qeth_card *card)
2282{
2283 struct list_head *plh;
2284 struct qeth_buffer_pool_entry *entry;
2285 int i, free;
2286 struct page *page;
2287
2288 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2289 return NULL;
2290
2291 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2292 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2293 free = 1;
2294 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2295 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2296 free = 0;
2297 break;
2298 }
2299 }
2300 if (free) {
2301 list_del_init(&entry->list);
2302 return entry;
2303 }
2304 }
2305
2306 /* no free buffer in pool so take first one and swap pages */
2307 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2308 struct qeth_buffer_pool_entry, list);
2309 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2310 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2311 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2312 if (!page) {
2313 return NULL;
2314 } else {
2315 free_page((unsigned long)entry->elements[i]);
2316 entry->elements[i] = page_address(page);
2317 if (card->options.performance_stats)
2318 card->perf_stats.sg_alloc_page_rx++;
2319 }
2320 }
2321 }
2322 list_del_init(&entry->list);
2323 return entry;
2324}
2325
2326static int qeth_init_input_buffer(struct qeth_card *card,
2327 struct qeth_qdio_buffer *buf)
2328{
2329 struct qeth_buffer_pool_entry *pool_entry;
2330 int i;
2331
2332 pool_entry = qeth_find_free_buffer_pool_entry(card);
2333 if (!pool_entry)
2334 return 1;
2335
2336 /*
2337 * since the buffer is accessed only from the input_tasklet
2338 * there shouldn't be a need to synchronize; also, since we use
2339 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2340 * buffers
2341 */
4a71df50
FB		 2342
2343 buf->pool_entry = pool_entry;
2344 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2345 buf->buffer->element[i].length = PAGE_SIZE;
2346 buf->buffer->element[i].addr = pool_entry->elements[i];
2347 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2348 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2349 else
2350 buf->buffer->element[i].flags = 0;
2351 }
2352 return 0;
2353}
2354
2355int qeth_init_qdio_queues(struct qeth_card *card)
2356{
2357 int i, j;
2358 int rc;
2359
d11ba0c4 2360 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2361
2362 /* inbound queue */
2363 memset(card->qdio.in_q->qdio_bufs, 0,
2364 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2365 qeth_initialize_working_pool_list(card);
2366 /*give only as many buffers to hardware as we have buffer pool entries*/
2367 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2368 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2369 card->qdio.in_q->next_buf_to_init =
2370 card->qdio.in_buf_pool.buf_count - 1;
2371 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2372 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2373 if (rc) {
d11ba0c4 2374 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2375 return rc;
2376 }
4a71df50
FB		 2377 /* outbound queue */
2378 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2379 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2380 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2381 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2382 qeth_clear_output_buffer(card->qdio.out_qs[i],
2383 &card->qdio.out_qs[i]->bufs[j]);
2384 }
2385 card->qdio.out_qs[i]->card = card;
2386 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2387 card->qdio.out_qs[i]->do_pack = 0;
2388 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2389 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2390 atomic_set(&card->qdio.out_qs[i]->state,
2391 QETH_OUT_Q_UNLOCKED);
2392 }
2393 return 0;
2394}
2395EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2396
2397static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2398{
2399 switch (link_type) {
2400 case QETH_LINK_TYPE_HSTR:
2401 return 2;
2402 default:
2403 return 1;
2404 }
2405}
2406
2407static void qeth_fill_ipacmd_header(struct qeth_card *card,
2408 struct qeth_ipa_cmd *cmd, __u8 command,
2409 enum qeth_prot_versions prot)
2410{
2411 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2412 cmd->hdr.command = command;
2413 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2414 cmd->hdr.seqno = card->seqno.ipa;
2415 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2416 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2417 if (card->options.layer2)
2418 cmd->hdr.prim_version_no = 2;
2419 else
2420 cmd->hdr.prim_version_no = 1;
2421 cmd->hdr.param_count = 1;
2422 cmd->hdr.prot_version = prot;
2423 cmd->hdr.ipa_supported = 0;
2424 cmd->hdr.ipa_enabled = 0;
2425}
2426
2427struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2428 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2429{
2430 struct qeth_cmd_buffer *iob;
2431 struct qeth_ipa_cmd *cmd;
2432
2433 iob = qeth_wait_for_buffer(&card->write);
2434 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2435 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2436
2437 return iob;
2438}
2439EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2440
2441void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2442 char prot_type)
2443{
2444 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2445 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2446 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2447 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2448}
2449EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2450
2451int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2452 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2453 unsigned long),
2454 void *reply_param)
2455{
2456 int rc;
2457 char prot_type;
4a71df50 2458
847a50fd 2459 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2460
2461 if (card->options.layer2)
2462 if (card->info.type == QETH_CARD_TYPE_OSN)
2463 prot_type = QETH_PROT_OSN2;
2464 else
2465 prot_type = QETH_PROT_LAYER2;
2466 else
2467 prot_type = QETH_PROT_TCPIP;
2468 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2469 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2470 iob, reply_cb, reply_param);
908abbb5
UB		 2471 if (rc == -ETIME) {
2472 qeth_clear_ipacmd_list(card);
2473 qeth_schedule_recovery(card);
2474 }
4a71df50
FB		 2475 return rc;
2476}
2477EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2478
2479static int qeth_send_startstoplan(struct qeth_card *card,
2480 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2481{
2482 int rc;
2483 struct qeth_cmd_buffer *iob;
2484
2485 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2486 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2487
2488 return rc;
2489}
2490
2491int qeth_send_startlan(struct qeth_card *card)
2492{
2493 int rc;
2494
d11ba0c4 2495 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2496
2497 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2498 return rc;
2499}
2500EXPORT_SYMBOL_GPL(qeth_send_startlan);
2501
2502int qeth_send_stoplan(struct qeth_card *card)
2503{
2504 int rc = 0;
2505
2506 /*
2507 * TODO: according to the IPA format document page 14,
2508 * TCP/IP (we!) never issue a STOPLAN
2509 * is this right ?!?
2510 */
d11ba0c4 2511 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2512
2513 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2514 return rc;
2515}
2516EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2517
2518int qeth_default_setadapterparms_cb(struct qeth_card *card,
2519 struct qeth_reply *reply, unsigned long data)
2520{
2521 struct qeth_ipa_cmd *cmd;
2522
847a50fd 2523 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2524
2525 cmd = (struct qeth_ipa_cmd *) data;
2526 if (cmd->hdr.return_code == 0)
2527 cmd->hdr.return_code =
2528 cmd->data.setadapterparms.hdr.return_code;
2529 return 0;
2530}
2531EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2532
2533static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2534 struct qeth_reply *reply, unsigned long data)
2535{
2536 struct qeth_ipa_cmd *cmd;
2537
847a50fd 2538 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2539
2540 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2541 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2542 card->info.link_type =
2543 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2544 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2545 }
4a71df50
FB		 2546 card->options.adp.supported_funcs =
2547 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2548 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2549}
2550
2551struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2552 __u32 command, __u32 cmdlen)
2553{
2554 struct qeth_cmd_buffer *iob;
2555 struct qeth_ipa_cmd *cmd;
2556
2557 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2558 QETH_PROT_IPV4);
2559 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2560 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2561 cmd->data.setadapterparms.hdr.command_code = command;
2562 cmd->data.setadapterparms.hdr.used_total = 1;
2563 cmd->data.setadapterparms.hdr.seq_no = 1;
2564
2565 return iob;
2566}
2567EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2568
2569int qeth_query_setadapterparms(struct qeth_card *card)
2570{
2571 int rc;
2572 struct qeth_cmd_buffer *iob;
2573
847a50fd 2574 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2575 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2576 sizeof(struct qeth_ipacmd_setadpparms));
2577 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2578 return rc;
2579}
2580EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2581
76b11f8e
UB		 2582int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2583 unsigned int qdio_error, const char *dbftext)
4a71df50 2584{
779e6e1c 2585 if (qdio_error) {
847a50fd 2586 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 2587 QETH_CARD_TEXT_(card, 2, " F15=%02X",
4a71df50 2588 buf->element[15].flags & 0xff);
38593d01 2589 QETH_CARD_TEXT_(card, 2, " F14=%02X",
4a71df50 2590 buf->element[14].flags & 0xff);
38593d01 2591 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
76b11f8e
UB		 2592 if ((buf->element[15].flags & 0xff) == 0x12) {
2593 card->stats.rx_dropped++;
2594 return 0;
2595 } else
2596 return 1;
4a71df50
FB		 2597 }
2598 return 0;
2599}
2600EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2601
2602void qeth_queue_input_buffer(struct qeth_card *card, int index)
2603{
2604 struct qeth_qdio_q *queue = card->qdio.in_q;
2605 int count;
2606 int i;
2607 int rc;
2608 int newcount = 0;
2609
4a71df50
FB		 2610 count = (index < queue->next_buf_to_init)?
2611 card->qdio.in_buf_pool.buf_count -
2612 (queue->next_buf_to_init - index) :
2613 card->qdio.in_buf_pool.buf_count -
2614 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2615 /* only requeue at a certain threshold to avoid SIGAs */
2616 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2617 for (i = queue->next_buf_to_init;
2618 i < queue->next_buf_to_init + count; ++i) {
2619 if (qeth_init_input_buffer(card,
2620 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2621 break;
2622 } else {
2623 newcount++;
2624 }
2625 }
2626
2627 if (newcount < count) {
2628 /* we are in memory shortage so we switch back to
2629 traditional skb allocation and drop packages */
4a71df50
FB		 2630 atomic_set(&card->force_alloc_skb, 3);
2631 count = newcount;
2632 } else {
4a71df50
FB		 2633 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2634 }
2635
2636 /*
2637 * according to old code it should be avoided to requeue all
2638 * 128 buffers in order to benefit from PCI avoidance.
2639 * this function keeps at least one buffer (the buffer at
2640 * 'index') un-requeued -> this buffer is the first buffer that
2641 * will be requeued the next time
2642 */
2643 if (card->options.performance_stats) {
2644 card->perf_stats.inbound_do_qdio_cnt++;
2645 card->perf_stats.inbound_do_qdio_start_time =
2646 qeth_get_micros();
2647 }
779e6e1c
JG		 2648 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2649 queue->next_buf_to_init, count);
4a71df50
FB		 2650 if (card->options.performance_stats)
2651 card->perf_stats.inbound_do_qdio_time +=
2652 qeth_get_micros() -
2653 card->perf_stats.inbound_do_qdio_start_time;
2654 if (rc) {
74eacdb9
FB		 2655 dev_warn(&card->gdev->dev,
2656 "QDIO reported an error, rc=%i\n", rc);
847a50fd 2657 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 2658 }
2659 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2660 QDIO_MAX_BUFFERS_PER_Q;
2661 }
2662}
2663EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2664
2665static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2666 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2667{
2668 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
4a71df50 2669
847a50fd 2670 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 2671 if (card->info.type == QETH_CARD_TYPE_IQD) {
2672 if (sbalf15 == 0) {
2673 qdio_err = 0;
2674 } else {
2675 qdio_err = 1;
2676 }
2677 }
76b11f8e 2678 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 2679
2680 if (!qdio_err)
4a71df50 2681 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 2682
2683 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2684 return QETH_SEND_ERROR_RETRY;
2685
847a50fd
CO		 2686 QETH_CARD_TEXT(card, 1, "lnkfail");
2687 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 2688 (u16)qdio_err, (u8)sbalf15);
2689 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 2690}
2691
2692/*
2693 * Switched to packing state if the number of used buffers on a queue
2694 * reaches a certain limit.
2695 */
2696static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2697{
2698 if (!queue->do_pack) {
2699 if (atomic_read(&queue->used_buffers)
2700 >= QETH_HIGH_WATERMARK_PACK){
2701 /* switch non-PACKING -> PACKING */
847a50fd 2702 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 2703 if (queue->card->options.performance_stats)
2704 queue->card->perf_stats.sc_dp_p++;
2705 queue->do_pack = 1;
2706 }
2707 }
2708}
2709
2710/*
2711 * Switches from packing to non-packing mode. If there is a packing
2712 * buffer on the queue this buffer will be prepared to be flushed.
2713 * In that case 1 is returned to inform the caller. If no buffer
2714 * has to be flushed, zero is returned.
2715 */
2716static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2717{
2718 struct qeth_qdio_out_buffer *buffer;
2719 int flush_count = 0;
2720
2721 if (queue->do_pack) {
2722 if (atomic_read(&queue->used_buffers)
2723 <= QETH_LOW_WATERMARK_PACK) {
2724 /* switch PACKING -> non-PACKING */
847a50fd 2725 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 2726 if (queue->card->options.performance_stats)
2727 queue->card->perf_stats.sc_p_dp++;
2728 queue->do_pack = 0;
2729 /* flush packing buffers */
2730 buffer = &queue->bufs[queue->next_buf_to_fill];
2731 if ((atomic_read(&buffer->state) ==
2732 QETH_QDIO_BUF_EMPTY) &&
2733 (buffer->next_element_to_fill > 0)) {
2734 atomic_set(&buffer->state,
2735 QETH_QDIO_BUF_PRIMED);
2736 flush_count++;
2737 queue->next_buf_to_fill =
2738 (queue->next_buf_to_fill + 1) %
2739 QDIO_MAX_BUFFERS_PER_Q;
2740 }
2741 }
2742 }
2743 return flush_count;
2744}
2745
2746/*
2747 * Called to flush a packing buffer if no more pci flags are on the queue.
2748 * Checks if there is a packing buffer and prepares it to be flushed.
2749 * In that case returns 1, otherwise zero.
2750 */
2751static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2752{
2753 struct qeth_qdio_out_buffer *buffer;
2754
2755 buffer = &queue->bufs[queue->next_buf_to_fill];
2756 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2757 (buffer->next_element_to_fill > 0)) {
2758 /* it's a packing buffer */
2759 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2760 queue->next_buf_to_fill =
2761 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2762 return 1;
2763 }
2764 return 0;
2765}
2766
779e6e1c
JG		 2767static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2768 int count)
4a71df50
FB		 2769{
2770 struct qeth_qdio_out_buffer *buf;
2771 int rc;
2772 int i;
2773 unsigned int qdio_flags;
2774
4a71df50
FB		 2775 for (i = index; i < index + count; ++i) {
2776 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2777 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2778 SBAL_FLAGS_LAST_ENTRY;
2779
2780 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2781 continue;
2782
2783 if (!queue->do_pack) {
2784 if ((atomic_read(&queue->used_buffers) >=
2785 (QETH_HIGH_WATERMARK_PACK -
2786 QETH_WATERMARK_PACK_FUZZ)) &&
2787 !atomic_read(&queue->set_pci_flags_count)) {
2788 /* it's likely that we'll go to packing
2789 * mode soon */
2790 atomic_inc(&queue->set_pci_flags_count);
2791 buf->buffer->element[0].flags |= 0x40;
2792 }
2793 } else {
2794 if (!atomic_read(&queue->set_pci_flags_count)) {
2795 /*
2796 * there's no outstanding PCI any more, so we
2797 * have to request a PCI to be sure the the PCI
2798 * will wake at some time in the future then we
2799 * can flush packed buffers that might still be
2800 * hanging around, which can happen if no
2801 * further send was requested by the stack
2802 */
2803 atomic_inc(&queue->set_pci_flags_count);
2804 buf->buffer->element[0].flags |= 0x40;
2805 }
2806 }
2807 }
2808
2809 queue->card->dev->trans_start = jiffies;
2810 if (queue->card->options.performance_stats) {
2811 queue->card->perf_stats.outbound_do_qdio_cnt++;
2812 queue->card->perf_stats.outbound_do_qdio_start_time =
2813 qeth_get_micros();
2814 }
2815 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2816 if (atomic_read(&queue->set_pci_flags_count))
2817 qdio_flags |= QDIO_FLAG_PCI_OUT;
2818 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2819 queue->queue_no, index, count);
4a71df50
FB		 2820 if (queue->card->options.performance_stats)
2821 queue->card->perf_stats.outbound_do_qdio_time +=
2822 qeth_get_micros() -
2823 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 2824 atomic_add(count, &queue->used_buffers);
4a71df50 2825 if (rc) {
d303b6fd
JG		 2826 queue->card->stats.tx_errors += count;
2827 /* ignore temporary SIGA errors without busy condition */
2828 if (rc == QDIO_ERROR_SIGA_TARGET)
2829 return;
847a50fd
CO		 2830 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
2831 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 2832
4a71df50
FB		 2833 /* this must not happen under normal circumstances. if it
2834 * happens something is really wrong -> recover */
2835 qeth_schedule_recovery(queue->card);
2836 return;
2837 }
4a71df50
FB		 2838 if (queue->card->options.performance_stats)
2839 queue->card->perf_stats.bufs_sent += count;
2840}
2841
2842static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2843{
2844 int index;
2845 int flush_cnt = 0;
2846 int q_was_packing = 0;
2847
2848 /*
2849 * check if weed have to switch to non-packing mode or if
2850 * we have to get a pci flag out on the queue
2851 */
2852 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2853 !atomic_read(&queue->set_pci_flags_count)) {
2854 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2855 QETH_OUT_Q_UNLOCKED) {
2856 /*
2857 * If we get in here, there was no action in
2858 * do_send_packet. So, we check if there is a
2859 * packing buffer to be flushed here.
2860 */
2861 netif_stop_queue(queue->card->dev);
2862 index = queue->next_buf_to_fill;
2863 q_was_packing = queue->do_pack;
2864 /* queue->do_pack may change */
2865 barrier();
2866 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2867 if (!flush_cnt &&
2868 !atomic_read(&queue->set_pci_flags_count))
2869 flush_cnt +=
2870 qeth_flush_buffers_on_no_pci(queue);
2871 if (queue->card->options.performance_stats &&
2872 q_was_packing)
2873 queue->card->perf_stats.bufs_sent_pack +=
2874 flush_cnt;
2875 if (flush_cnt)
779e6e1c 2876 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2877 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2878 }
2879 }
2880}
2881
a1c3ed4c
FB		 2882void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
2883 unsigned long card_ptr)
2884{
2885 struct qeth_card *card = (struct qeth_card *)card_ptr;
2886
0cffef48 2887 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 2888 napi_schedule(&card->napi);
2889}
2890EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
2891
2892void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
2893 unsigned int queue, int first_element, int count,
2894 unsigned long card_ptr)
2895{
2896 struct qeth_card *card = (struct qeth_card *)card_ptr;
2897
2898 if (qdio_err)
2899 qeth_schedule_recovery(card);
2900}
2901EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
2902
779e6e1c
JG		 2903void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2904 unsigned int qdio_error, int __queue, int first_element,
2905 int count, unsigned long card_ptr)
4a71df50
FB		 2906{
2907 struct qeth_card *card = (struct qeth_card *) card_ptr;
2908 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2909 struct qeth_qdio_out_buffer *buffer;
2910 int i;
2911
847a50fd 2912 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 2913 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 2914 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 2915 netif_stop_queue(card->dev);
2916 qeth_schedule_recovery(card);
2917 return;
4a71df50
FB		 2918 }
2919 if (card->options.performance_stats) {
2920 card->perf_stats.outbound_handler_cnt++;
2921 card->perf_stats.outbound_handler_start_time =
2922 qeth_get_micros();
2923 }
2924 for (i = first_element; i < (first_element + count); ++i) {
2925 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
b67d801f
UB		 2926 qeth_handle_send_error(card, buffer, qdio_error);
2927 qeth_clear_output_buffer(queue, buffer);
4a71df50
FB		 2928 }
2929 atomic_sub(count, &queue->used_buffers);
2930 /* check if we need to do something on this outbound queue */
2931 if (card->info.type != QETH_CARD_TYPE_IQD)
2932 qeth_check_outbound_queue(queue);
2933
2934 netif_wake_queue(queue->card->dev);
2935 if (card->options.performance_stats)
2936 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2937 card->perf_stats.outbound_handler_start_time;
2938}
2939EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2940
4a71df50
FB		 2941int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2942 int ipv, int cast_type)
2943{
5113fec0
UB		 2944 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
2945 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 2946 return card->qdio.default_out_queue;
2947 switch (card->qdio.no_out_queues) {
2948 case 4:
2949 if (cast_type && card->info.is_multicast_different)
2950 return card->info.is_multicast_different &
2951 (card->qdio.no_out_queues - 1);
2952 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2953 const u8 tos = ip_hdr(skb)->tos;
2954
2955 if (card->qdio.do_prio_queueing ==
2956 QETH_PRIO_Q_ING_TOS) {
2957 if (tos & IP_TOS_NOTIMPORTANT)
2958 return 3;
2959 if (tos & IP_TOS_HIGHRELIABILITY)
2960 return 2;
2961 if (tos & IP_TOS_HIGHTHROUGHPUT)
2962 return 1;
2963 if (tos & IP_TOS_LOWDELAY)
2964 return 0;
2965 }
2966 if (card->qdio.do_prio_queueing ==
2967 QETH_PRIO_Q_ING_PREC)
2968 return 3 - (tos >> 6);
2969 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2970 /* TODO: IPv6!!! */
2971 }
2972 return card->qdio.default_out_queue;
2973 case 1: /* fallthrough for single-out-queue 1920-device */
2974 default:
2975 return card->qdio.default_out_queue;
2976 }
2977}
2978EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2979
4a71df50
FB		 2980int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2981 struct sk_buff *skb, int elems)
2982{
51aa165c
FB		 2983 int dlen = skb->len - skb->data_len;
2984 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
2985 PFN_DOWN((unsigned long)skb->data);
4a71df50 2986
51aa165c 2987 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 2988 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 2989 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 2990 "(Number=%d / Length=%d). Discarded.\n",
2991 (elements_needed+elems), skb->len);
2992 return 0;
2993 }
2994 return elements_needed;
2995}
2996EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2997
51aa165c
FB		 2998int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
2999{
3000 int hroom, inpage, rest;
3001
3002 if (((unsigned long)skb->data & PAGE_MASK) !=
3003 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3004 hroom = skb_headroom(skb);
3005 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3006 rest = len - inpage;
3007 if (rest > hroom)
3008 return 1;
3009 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3010 skb->data -= rest;
3011 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3012 }
3013 return 0;
3014}
3015EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3016
f90b744e 3017static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3018 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3019 int offset)
4a71df50 3020{
51aa165c 3021 int length = skb->len - skb->data_len;
4a71df50
FB		 3022 int length_here;
3023 int element;
3024 char *data;
51aa165c
FB		 3025 int first_lap, cnt;
3026 struct skb_frag_struct *frag;
4a71df50
FB		 3027
3028 element = *next_element_to_fill;
3029 data = skb->data;
3030 first_lap = (is_tso == 0 ? 1 : 0);
3031
683d718a
FB		 3032 if (offset >= 0) {
3033 data = skb->data + offset;
e1f03ae8 3034 length -= offset;
683d718a
FB		 3035 first_lap = 0;
3036 }
3037
4a71df50
FB		 3038 while (length > 0) {
3039 /* length_here is the remaining amount of data in this page */
3040 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3041 if (length < length_here)
3042 length_here = length;
3043
3044 buffer->element[element].addr = data;
3045 buffer->element[element].length = length_here;
3046 length -= length_here;
3047 if (!length) {
3048 if (first_lap)
51aa165c
FB		 3049 if (skb_shinfo(skb)->nr_frags)
3050 buffer->element[element].flags =
3051 SBAL_FLAGS_FIRST_FRAG;
3052 else
3053 buffer->element[element].flags = 0;
4a71df50
FB		 3054 else
3055 buffer->element[element].flags =
51aa165c 3056 SBAL_FLAGS_MIDDLE_FRAG;
4a71df50
FB		 3057 } else {
3058 if (first_lap)
3059 buffer->element[element].flags =
3060 SBAL_FLAGS_FIRST_FRAG;
3061 else
3062 buffer->element[element].flags =
3063 SBAL_FLAGS_MIDDLE_FRAG;
3064 }
3065 data += length_here;
3066 element++;
3067 first_lap = 0;
3068 }
51aa165c
FB		 3069
3070 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3071 frag = &skb_shinfo(skb)->frags[cnt];
3072 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3073 + frag->page_offset;
3074 buffer->element[element].length = frag->size;
3075 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG;
3076 element++;
3077 }
3078
3079 if (buffer->element[element - 1].flags)
3080 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG;
4a71df50
FB		 3081 *next_element_to_fill = element;
3082}
3083
f90b744e 3084static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3085 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3086 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3087{
3088 struct qdio_buffer *buffer;
4a71df50
FB		 3089 int flush_cnt = 0, hdr_len, large_send = 0;
3090
4a71df50
FB		 3091 buffer = buf->buffer;
3092 atomic_inc(&skb->users);
3093 skb_queue_tail(&buf->skb_list, skb);
3094
4a71df50 3095 /*check first on TSO ....*/
683d718a 3096 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3097 int element = buf->next_element_to_fill;
3098
683d718a
FB		 3099 hdr_len = sizeof(struct qeth_hdr_tso) +
3100 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3101 /*fill first buffer entry only with header information */
3102 buffer->element[element].addr = skb->data;
3103 buffer->element[element].length = hdr_len;
3104 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3105 buf->next_element_to_fill++;
3106 skb->data += hdr_len;
3107 skb->len -= hdr_len;
3108 large_send = 1;
3109 }
683d718a
FB		 3110
3111 if (offset >= 0) {
3112 int element = buf->next_element_to_fill;
3113 buffer->element[element].addr = hdr;
3114 buffer->element[element].length = sizeof(struct qeth_hdr) +
3115 hd_len;
3116 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3117 buf->is_header[element] = 1;
3118 buf->next_element_to_fill++;
3119 }
3120
51aa165c
FB		 3121 __qeth_fill_buffer(skb, buffer, large_send,
3122 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3123
3124 if (!queue->do_pack) {
847a50fd 3125 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3126 /* set state to PRIMED -> will be flushed */
3127 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3128 flush_cnt = 1;
3129 } else {
847a50fd 3130 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3131 if (queue->card->options.performance_stats)
3132 queue->card->perf_stats.skbs_sent_pack++;
3133 if (buf->next_element_to_fill >=
3134 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3135 /*
3136 * packed buffer if full -> set state PRIMED
3137 * -> will be flushed
3138 */
3139 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3140 flush_cnt = 1;
3141 }
3142 }
3143 return flush_cnt;
3144}
3145
3146int qeth_do_send_packet_fast(struct qeth_card *card,
3147 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3148 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3149 int offset, int hd_len)
4a71df50
FB		 3150{
3151 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3152 int index;
3153
4a71df50
FB		 3154 /* spin until we get the queue ... */
3155 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3156 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3157 /* ... now we've got the queue */
3158 index = queue->next_buf_to_fill;
3159 buffer = &queue->bufs[queue->next_buf_to_fill];
3160 /*
3161 * check if buffer is empty to make sure that we do not 'overtake'
3162 * ourselves and try to fill a buffer that is already primed
3163 */
3164 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3165 goto out;
64ef8957 3166 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3167 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3168 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3169 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3170 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3171 return 0;
3172out:
3173 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3174 return -EBUSY;
3175}
3176EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3177
3178int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3179 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3180 int elements_needed)
4a71df50
FB		 3181{
3182 struct qeth_qdio_out_buffer *buffer;
3183 int start_index;
3184 int flush_count = 0;
3185 int do_pack = 0;
3186 int tmp;
3187 int rc = 0;
3188
4a71df50
FB		 3189 /* spin until we get the queue ... */
3190 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3191 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3192 start_index = queue->next_buf_to_fill;
3193 buffer = &queue->bufs[queue->next_buf_to_fill];
3194 /*
3195 * check if buffer is empty to make sure that we do not 'overtake'
3196 * ourselves and try to fill a buffer that is already primed
3197 */
3198 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3199 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3200 return -EBUSY;
3201 }
3202 /* check if we need to switch packing state of this queue */
3203 qeth_switch_to_packing_if_needed(queue);
3204 if (queue->do_pack) {
3205 do_pack = 1;
64ef8957
FB		 3206 /* does packet fit in current buffer? */
3207 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3208 buffer->next_element_to_fill) < elements_needed) {
3209 /* ... no -> set state PRIMED */
3210 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3211 flush_count++;
3212 queue->next_buf_to_fill =
3213 (queue->next_buf_to_fill + 1) %
3214 QDIO_MAX_BUFFERS_PER_Q;
3215 buffer = &queue->bufs[queue->next_buf_to_fill];
3216 /* we did a step forward, so check buffer state
3217 * again */
3218 if (atomic_read(&buffer->state) !=
3219 QETH_QDIO_BUF_EMPTY) {
3220 qeth_flush_buffers(queue, start_index,
779e6e1c 3221 flush_count);
64ef8957 3222 atomic_set(&queue->state,
4a71df50 3223 QETH_OUT_Q_UNLOCKED);
64ef8957 3224 return -EBUSY;
4a71df50
FB		 3225 }
3226 }
3227 }
64ef8957 3228 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3229 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3230 QDIO_MAX_BUFFERS_PER_Q;
3231 flush_count += tmp;
4a71df50 3232 if (flush_count)
779e6e1c 3233 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3234 else if (!atomic_read(&queue->set_pci_flags_count))
3235 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3236 /*
3237 * queue->state will go from LOCKED -> UNLOCKED or from
3238 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3239 * (switch packing state or flush buffer to get another pci flag out).
3240 * In that case we will enter this loop
3241 */
3242 while (atomic_dec_return(&queue->state)) {
3243 flush_count = 0;
3244 start_index = queue->next_buf_to_fill;
3245 /* check if we can go back to non-packing state */
3246 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3247 /*
3248 * check if we need to flush a packing buffer to get a pci
3249 * flag out on the queue
3250 */
3251 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3252 flush_count += qeth_flush_buffers_on_no_pci(queue);
3253 if (flush_count)
779e6e1c 3254 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3255 }
3256 /* at this point the queue is UNLOCKED again */
3257 if (queue->card->options.performance_stats && do_pack)
3258 queue->card->perf_stats.bufs_sent_pack += flush_count;
3259
3260 return rc;
3261}
3262EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3263
3264static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3265 struct qeth_reply *reply, unsigned long data)
3266{
3267 struct qeth_ipa_cmd *cmd;
3268 struct qeth_ipacmd_setadpparms *setparms;
3269
847a50fd 3270 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3271
3272 cmd = (struct qeth_ipa_cmd *) data;
3273 setparms = &(cmd->data.setadapterparms);
3274
3275 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3276 if (cmd->hdr.return_code) {
847a50fd 3277 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3278 setparms->data.mode = SET_PROMISC_MODE_OFF;
3279 }
3280 card->info.promisc_mode = setparms->data.mode;
3281 return 0;
3282}
3283
3284void qeth_setadp_promisc_mode(struct qeth_card *card)
3285{
3286 enum qeth_ipa_promisc_modes mode;
3287 struct net_device *dev = card->dev;
3288 struct qeth_cmd_buffer *iob;
3289 struct qeth_ipa_cmd *cmd;
3290
847a50fd 3291 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3292
3293 if (((dev->flags & IFF_PROMISC) &&
3294 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3295 (!(dev->flags & IFF_PROMISC) &&
3296 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3297 return;
3298 mode = SET_PROMISC_MODE_OFF;
3299 if (dev->flags & IFF_PROMISC)
3300 mode = SET_PROMISC_MODE_ON;
847a50fd 3301 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3302
3303 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3304 sizeof(struct qeth_ipacmd_setadpparms));
3305 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3306 cmd->data.setadapterparms.data.mode = mode;
3307 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3308}
3309EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3310
3311int qeth_change_mtu(struct net_device *dev, int new_mtu)
3312{
3313 struct qeth_card *card;
3314 char dbf_text[15];
3315
509e2562 3316 card = dev->ml_priv;
4a71df50 3317
847a50fd 3318 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3319 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3320 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3321
3322 if (new_mtu < 64)
3323 return -EINVAL;
3324 if (new_mtu > 65535)
3325 return -EINVAL;
3326 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3327 (!qeth_mtu_is_valid(card, new_mtu)))
3328 return -EINVAL;
3329 dev->mtu = new_mtu;
3330 return 0;
3331}
3332EXPORT_SYMBOL_GPL(qeth_change_mtu);
3333
3334struct net_device_stats *qeth_get_stats(struct net_device *dev)
3335{
3336 struct qeth_card *card;
3337
509e2562 3338 card = dev->ml_priv;
4a71df50 3339
847a50fd 3340 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 3341
3342 return &card->stats;
3343}
3344EXPORT_SYMBOL_GPL(qeth_get_stats);
3345
3346static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3347 struct qeth_reply *reply, unsigned long data)
3348{
3349 struct qeth_ipa_cmd *cmd;
3350
847a50fd 3351 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 3352
3353 cmd = (struct qeth_ipa_cmd *) data;
3354 if (!card->options.layer2 ||
3355 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3356 memcpy(card->dev->dev_addr,
3357 &cmd->data.setadapterparms.data.change_addr.addr,
3358 OSA_ADDR_LEN);
3359 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3360 }
3361 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3362 return 0;
3363}
3364
3365int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3366{
3367 int rc;
3368 struct qeth_cmd_buffer *iob;
3369 struct qeth_ipa_cmd *cmd;
3370
847a50fd 3371 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 3372
3373 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3374 sizeof(struct qeth_ipacmd_setadpparms));
3375 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3376 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3377 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3378 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3379 card->dev->dev_addr, OSA_ADDR_LEN);
3380 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3381 NULL);
3382 return rc;
3383}
3384EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3385
d64ecc22
EL		 3386static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3387 struct qeth_reply *reply, unsigned long data)
3388{
3389 struct qeth_ipa_cmd *cmd;
3390 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 3391
847a50fd 3392 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 3393
3394 cmd = (struct qeth_ipa_cmd *) data;
3395 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3396 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3397 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3398 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3399 cmd->data.setadapterparms.hdr.return_code);
3400 switch (cmd->data.setadapterparms.hdr.return_code) {
3401 case SET_ACCESS_CTRL_RC_SUCCESS:
3402 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3403 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3404 {
3405 card->options.isolation = access_ctrl_req->subcmd_code;
3406 if (card->options.isolation == ISOLATION_MODE_NONE) {
3407 dev_info(&card->gdev->dev,
3408 "QDIO data connection isolation is deactivated\n");
3409 } else {
3410 dev_info(&card->gdev->dev,
3411 "QDIO data connection isolation is activated\n");
3412 }
3413 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3414 card->gdev->dev.kobj.name,
3415 access_ctrl_req->subcmd_code,
3416 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 3417 break;
3418 }
3419 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3420 {
3421 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3422 card->gdev->dev.kobj.name,
3423 access_ctrl_req->subcmd_code,
3424 cmd->data.setadapterparms.hdr.return_code);
3425 dev_err(&card->gdev->dev, "Adapter does not "
3426 "support QDIO data connection isolation\n");
3427
3428 /* ensure isolation mode is "none" */
3429 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3430 break;
3431 }
3432 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3433 {
3434 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3435 card->gdev->dev.kobj.name,
3436 access_ctrl_req->subcmd_code,
3437 cmd->data.setadapterparms.hdr.return_code);
3438 dev_err(&card->gdev->dev,
3439 "Adapter is dedicated. "
3440 "QDIO data connection isolation not supported\n");
3441
3442 /* ensure isolation mode is "none" */
3443 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3444 break;
3445 }
3446 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3447 {
3448 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3449 card->gdev->dev.kobj.name,
3450 access_ctrl_req->subcmd_code,
3451 cmd->data.setadapterparms.hdr.return_code);
3452 dev_err(&card->gdev->dev,
3453 "TSO does not permit QDIO data connection isolation\n");
3454
3455 /* ensure isolation mode is "none" */
3456 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3457 break;
3458 }
3459 default:
3460 {
3461 /* this should never happen */
3462 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3463 "==UNKNOWN\n",
3464 card->gdev->dev.kobj.name,
3465 access_ctrl_req->subcmd_code,
3466 cmd->data.setadapterparms.hdr.return_code);
3467
3468 /* ensure isolation mode is "none" */
3469 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3470 break;
3471 }
3472 }
3473 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 3474 return 0;
d64ecc22
EL		 3475}
3476
3477static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3478 enum qeth_ipa_isolation_modes isolation)
3479{
3480 int rc;
3481 struct qeth_cmd_buffer *iob;
3482 struct qeth_ipa_cmd *cmd;
3483 struct qeth_set_access_ctrl *access_ctrl_req;
3484
847a50fd 3485 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 3486
3487 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3488 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3489
3490 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3491 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3492 sizeof(struct qeth_set_access_ctrl));
3493 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3494 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3495 access_ctrl_req->subcmd_code = isolation;
3496
3497 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3498 NULL);
3499 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3500 return rc;
3501}
3502
3503int qeth_set_access_ctrl_online(struct qeth_card *card)
3504{
3505 int rc = 0;
3506
847a50fd 3507 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 3508
5113fec0
UB		 3509 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3510 card->info.type == QETH_CARD_TYPE_OSX) &&
3511 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 3512 rc = qeth_setadpparms_set_access_ctrl(card,
3513 card->options.isolation);
3514 if (rc) {
3515 QETH_DBF_MESSAGE(3,
5113fec0 3516 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 3517 card->gdev->dev.kobj.name,
3518 rc);
3519 }
3520 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3521 card->options.isolation = ISOLATION_MODE_NONE;
3522
3523 dev_err(&card->gdev->dev, "Adapter does not "
3524 "support QDIO data connection isolation\n");
3525 rc = -EOPNOTSUPP;
3526 }
3527 return rc;
3528}
3529EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3530
4a71df50
FB		 3531void qeth_tx_timeout(struct net_device *dev)
3532{
3533 struct qeth_card *card;
3534
509e2562 3535 card = dev->ml_priv;
847a50fd 3536 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 3537 card->stats.tx_errors++;
3538 qeth_schedule_recovery(card);
3539}
3540EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3541
3542int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3543{
509e2562 3544 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3545 int rc = 0;
3546
3547 switch (regnum) {
3548 case MII_BMCR: /* Basic mode control register */
3549 rc = BMCR_FULLDPLX;
3550 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3551 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3552 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3553 rc |= BMCR_SPEED100;
3554 break;
3555 case MII_BMSR: /* Basic mode status register */
3556 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3557 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3558 BMSR_100BASE4;
3559 break;
3560 case MII_PHYSID1: /* PHYS ID 1 */
3561 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3562 dev->dev_addr[2];
3563 rc = (rc >> 5) & 0xFFFF;
3564 break;
3565 case MII_PHYSID2: /* PHYS ID 2 */
3566 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3567 break;
3568 case MII_ADVERTISE: /* Advertisement control reg */
3569 rc = ADVERTISE_ALL;
3570 break;
3571 case MII_LPA: /* Link partner ability reg */
3572 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3573 LPA_100BASE4 | LPA_LPACK;
3574 break;
3575 case MII_EXPANSION: /* Expansion register */
3576 break;
3577 case MII_DCOUNTER: /* disconnect counter */
3578 break;
3579 case MII_FCSCOUNTER: /* false carrier counter */
3580 break;
3581 case MII_NWAYTEST: /* N-way auto-neg test register */
3582 break;
3583 case MII_RERRCOUNTER: /* rx error counter */
3584 rc = card->stats.rx_errors;
3585 break;
3586 case MII_SREVISION: /* silicon revision */
3587 break;
3588 case MII_RESV1: /* reserved 1 */
3589 break;
3590 case MII_LBRERROR: /* loopback, rx, bypass error */
3591 break;
3592 case MII_PHYADDR: /* physical address */
3593 break;
3594 case MII_RESV2: /* reserved 2 */
3595 break;
3596 case MII_TPISTATUS: /* TPI status for 10mbps */
3597 break;
3598 case MII_NCONFIG: /* network interface config */
3599 break;
3600 default:
3601 break;
3602 }
3603 return rc;
3604}
3605EXPORT_SYMBOL_GPL(qeth_mdio_read);
3606
3607static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3608 struct qeth_cmd_buffer *iob, int len,
3609 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3610 unsigned long),
3611 void *reply_param)
3612{
3613 u16 s1, s2;
3614
847a50fd 3615 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 3616
3617 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3618 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3619 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3620 /* adjust PDU length fields in IPA_PDU_HEADER */
3621 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3622 s2 = (u32) len;
3623 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3624 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3625 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3626 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3627 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3628 reply_cb, reply_param);
3629}
3630
3631static int qeth_snmp_command_cb(struct qeth_card *card,
3632 struct qeth_reply *reply, unsigned long sdata)
3633{
3634 struct qeth_ipa_cmd *cmd;
3635 struct qeth_arp_query_info *qinfo;
3636 struct qeth_snmp_cmd *snmp;
3637 unsigned char *data;
3638 __u16 data_len;
3639
847a50fd 3640 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 3641
3642 cmd = (struct qeth_ipa_cmd *) sdata;
3643 data = (unsigned char *)((char *)cmd - reply->offset);
3644 qinfo = (struct qeth_arp_query_info *) reply->param;
3645 snmp = &cmd->data.setadapterparms.data.snmp;
3646
3647 if (cmd->hdr.return_code) {
847a50fd 3648 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3649 return 0;
3650 }
3651 if (cmd->data.setadapterparms.hdr.return_code) {
3652 cmd->hdr.return_code =
3653 cmd->data.setadapterparms.hdr.return_code;
847a50fd 3654 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3655 return 0;
3656 }
3657 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3658 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3659 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3660 else
3661 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3662
3663 /* check if there is enough room in userspace */
3664 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 3665 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3666 cmd->hdr.return_code = -ENOMEM;
3667 return 0;
3668 }
847a50fd 3669 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 3670 cmd->data.setadapterparms.hdr.used_total);
847a50fd 3671 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 3672 cmd->data.setadapterparms.hdr.seq_no);
3673 /*copy entries to user buffer*/
3674 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3675 memcpy(qinfo->udata + qinfo->udata_offset,
3676 (char *)snmp,
3677 data_len + offsetof(struct qeth_snmp_cmd, data));
3678 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3679 } else {
3680 memcpy(qinfo->udata + qinfo->udata_offset,
3681 (char *)&snmp->request, data_len);
3682 }
3683 qinfo->udata_offset += data_len;
3684 /* check if all replies received ... */
847a50fd 3685 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 3686 cmd->data.setadapterparms.hdr.used_total);
847a50fd 3687 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 3688 cmd->data.setadapterparms.hdr.seq_no);
3689 if (cmd->data.setadapterparms.hdr.seq_no <
3690 cmd->data.setadapterparms.hdr.used_total)
3691 return 1;
3692 return 0;
3693}
3694
3695int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3696{
3697 struct qeth_cmd_buffer *iob;
3698 struct qeth_ipa_cmd *cmd;
3699 struct qeth_snmp_ureq *ureq;
3700 int req_len;
3701 struct qeth_arp_query_info qinfo = {0, };
3702 int rc = 0;
3703
847a50fd 3704 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 3705
3706 if (card->info.guestlan)
3707 return -EOPNOTSUPP;
3708
3709 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3710 (!card->options.layer2)) {
4a71df50
FB		 3711 return -EOPNOTSUPP;
3712 }
3713 /* skip 4 bytes (data_len struct member) to get req_len */
3714 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3715 return -EFAULT;
4986f3f0
JL		 3716 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
3717 if (IS_ERR(ureq)) {
847a50fd 3718 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 3719 return PTR_ERR(ureq);
4a71df50
FB		 3720 }
3721 qinfo.udata_len = ureq->hdr.data_len;
3722 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3723 if (!qinfo.udata) {
3724 kfree(ureq);
3725 return -ENOMEM;
3726 }
3727 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3728
3729 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3730 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3731 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3732 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3733 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3734 qeth_snmp_command_cb, (void *)&qinfo);
3735 if (rc)
14cc21b6 3736 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3737 QETH_CARD_IFNAME(card), rc);
3738 else {
3739 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3740 rc = -EFAULT;
3741 }
3742
3743 kfree(ureq);
3744 kfree(qinfo.udata);
3745 return rc;
3746}
3747EXPORT_SYMBOL_GPL(qeth_snmp_command);
3748
3749static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3750{
3751 switch (card->info.type) {
3752 case QETH_CARD_TYPE_IQD:
3753 return 2;
3754 default:
3755 return 0;
3756 }
3757}
3758
3759static int qeth_qdio_establish(struct qeth_card *card)
3760{
3761 struct qdio_initialize init_data;
3762 char *qib_param_field;
3763 struct qdio_buffer **in_sbal_ptrs;
3764 struct qdio_buffer **out_sbal_ptrs;
3765 int i, j, k;
3766 int rc = 0;
3767
d11ba0c4 3768 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3769
3770 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3771 GFP_KERNEL);
3772 if (!qib_param_field)
3773 return -ENOMEM;
3774
3775 qeth_create_qib_param_field(card, qib_param_field);
3776 qeth_create_qib_param_field_blkt(card, qib_param_field);
3777
3778 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3779 GFP_KERNEL);
3780 if (!in_sbal_ptrs) {
3781 kfree(qib_param_field);
3782 return -ENOMEM;
3783 }
3784 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3785 in_sbal_ptrs[i] = (struct qdio_buffer *)
3786 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3787
3788 out_sbal_ptrs =
3789 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3790 sizeof(void *), GFP_KERNEL);
3791 if (!out_sbal_ptrs) {
3792 kfree(in_sbal_ptrs);
3793 kfree(qib_param_field);
3794 return -ENOMEM;
3795 }
3796 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3797 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3798 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3799 card->qdio.out_qs[i]->bufs[j].buffer);
3800 }
3801
3802 memset(&init_data, 0, sizeof(struct qdio_initialize));
3803 init_data.cdev = CARD_DDEV(card);
3804 init_data.q_format = qeth_get_qdio_q_format(card);
3805 init_data.qib_param_field_format = 0;
3806 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3807 init_data.no_input_qs = 1;
3808 init_data.no_output_qs = card->qdio.no_out_queues;
3809 init_data.input_handler = card->discipline.input_handler;
3810 init_data.output_handler = card->discipline.output_handler;
a1c3ed4c 3811 init_data.queue_start_poll = card->discipline.start_poll;
4a71df50 3812 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 3813 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3814 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3d6c76ff
JG		 3815 init_data.scan_threshold =
3816 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 3817
3818 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3819 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 3820 rc = qdio_allocate(&init_data);
3821 if (rc) {
3822 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3823 goto out;
3824 }
3825 rc = qdio_establish(&init_data);
3826 if (rc) {
4a71df50 3827 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 3828 qdio_free(CARD_DDEV(card));
3829 }
4a71df50 3830 }
cc961d40 3831out:
4a71df50
FB		 3832 kfree(out_sbal_ptrs);
3833 kfree(in_sbal_ptrs);
3834 kfree(qib_param_field);
3835 return rc;
3836}
3837
3838static void qeth_core_free_card(struct qeth_card *card)
3839{
3840
d11ba0c4
PT		 3841 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3842 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3843 qeth_clean_channel(&card->read);
3844 qeth_clean_channel(&card->write);
3845 if (card->dev)
3846 free_netdev(card->dev);
3847 kfree(card->ip_tbd_list);
3848 qeth_free_qdio_buffers(card);
6bcac508 3849 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 3850 kfree(card);
3851}
3852
3853static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 3854 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
3855 .driver_info = QETH_CARD_TYPE_OSD},
3856 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
3857 .driver_info = QETH_CARD_TYPE_IQD},
3858 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
3859 .driver_info = QETH_CARD_TYPE_OSN},
3860 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
3861 .driver_info = QETH_CARD_TYPE_OSM},
3862 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
3863 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 3864 {},
3865};
3866MODULE_DEVICE_TABLE(ccw, qeth_ids);
3867
3868static struct ccw_driver qeth_ccw_driver = {
3869 .name = "qeth",
3870 .ids = qeth_ids,
3871 .probe = ccwgroup_probe_ccwdev,
3872 .remove = ccwgroup_remove_ccwdev,
3873};
3874
3875static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3876 unsigned long driver_id)
3877{
022b660a
UB		 3878 return ccwgroup_create_from_string(root_dev, driver_id,
3879 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3880}
3881
3882int qeth_core_hardsetup_card(struct qeth_card *card)
3883{
aa909224 3884 int retries = 0;
4a71df50
FB		 3885 int rc;
3886
d11ba0c4 3887 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3888 atomic_set(&card->force_alloc_skb, 0);
3889retry:
aa909224 3890 if (retries)
74eacdb9
FB		 3891 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3892 dev_name(&card->gdev->dev));
aa909224
UB		 3893 ccw_device_set_offline(CARD_DDEV(card));
3894 ccw_device_set_offline(CARD_WDEV(card));
3895 ccw_device_set_offline(CARD_RDEV(card));
3896 rc = ccw_device_set_online(CARD_RDEV(card));
3897 if (rc)
3898 goto retriable;
3899 rc = ccw_device_set_online(CARD_WDEV(card));
3900 if (rc)
3901 goto retriable;
3902 rc = ccw_device_set_online(CARD_DDEV(card));
3903 if (rc)
3904 goto retriable;
4a71df50 3905 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 3906retriable:
4a71df50 3907 if (rc == -ERESTARTSYS) {
d11ba0c4 3908 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3909 return rc;
3910 } else if (rc) {
d11ba0c4 3911 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 3912 if (++retries > 3)
4a71df50
FB		 3913 goto out;
3914 else
3915 goto retry;
3916 }
4a71df50
FB		 3917 qeth_init_tokens(card);
3918 qeth_init_func_level(card);
3919 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3920 if (rc == -ERESTARTSYS) {
d11ba0c4 3921 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3922 return rc;
3923 } else if (rc) {
d11ba0c4 3924 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3925 if (--retries < 0)
3926 goto out;
3927 else
3928 goto retry;
3929 }
3930 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3931 if (rc == -ERESTARTSYS) {
d11ba0c4 3932 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3933 return rc;
3934 } else if (rc) {
d11ba0c4 3935 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3936 if (--retries < 0)
3937 goto out;
3938 else
3939 goto retry;
3940 }
908abbb5 3941 card->read_or_write_problem = 0;
4a71df50
FB		 3942 rc = qeth_mpc_initialize(card);
3943 if (rc) {
d11ba0c4 3944 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3945 goto out;
3946 }
3947 return 0;
3948out:
74eacdb9
FB		 3949 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3950 "an error on the device\n");
3951 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3952 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 3953 return rc;
3954}
3955EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3956
3957static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3958 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3959{
3960 struct page *page = virt_to_page(element->addr);
3961 if (*pskb == NULL) {
3962 /* the upper protocol layers assume that there is data in the
3963 * skb itself. Copy a small amount (64 bytes) to make them
3964 * happy. */
3965 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3966 if (!(*pskb))
3967 return -ENOMEM;
3968 skb_reserve(*pskb, ETH_HLEN);
3969 if (data_len <= 64) {
3970 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3971 data_len);
3972 } else {
3973 get_page(page);
3974 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3975 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3976 data_len - 64);
3977 (*pskb)->data_len += data_len - 64;
3978 (*pskb)->len += data_len - 64;
3979 (*pskb)->truesize += data_len - 64;
3980 (*pfrag)++;
3981 }
3982 } else {
3983 get_page(page);
3984 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3985 (*pskb)->data_len += data_len;
3986 (*pskb)->len += data_len;
3987 (*pskb)->truesize += data_len;
3988 (*pfrag)++;
3989 }
3990 return 0;
3991}
3992
3993struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3994 struct qdio_buffer *buffer,
3995 struct qdio_buffer_element **__element, int *__offset,
3996 struct qeth_hdr **hdr)
3997{
3998 struct qdio_buffer_element *element = *__element;
3999 int offset = *__offset;
4000 struct sk_buff *skb = NULL;
76b11f8e 4001 int skb_len = 0;
4a71df50
FB		 4002 void *data_ptr;
4003 int data_len;
4004 int headroom = 0;
4005 int use_rx_sg = 0;
4006 int frag = 0;
4007
4a71df50
FB		 4008 /* qeth_hdr must not cross element boundaries */
4009 if (element->length < offset + sizeof(struct qeth_hdr)) {
4010 if (qeth_is_last_sbale(element))
4011 return NULL;
4012 element++;
4013 offset = 0;
4014 if (element->length < sizeof(struct qeth_hdr))
4015 return NULL;
4016 }
4017 *hdr = element->addr + offset;
4018
4019 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4020 switch ((*hdr)->hdr.l2.id) {
4021 case QETH_HEADER_TYPE_LAYER2:
4022 skb_len = (*hdr)->hdr.l2.pkt_length;
4023 break;
4024 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4025 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4026 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4027 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4028 headroom = TR_HLEN;
4029 else
4030 headroom = ETH_HLEN;
76b11f8e
UB		 4031 break;
4032 case QETH_HEADER_TYPE_OSN:
4033 skb_len = (*hdr)->hdr.osn.pdu_length;
4034 headroom = sizeof(struct qeth_hdr);
4035 break;
4036 default:
4037 break;
4a71df50
FB		 4038 }
4039
4040 if (!skb_len)
4041 return NULL;
4042
4043 if ((skb_len >= card->options.rx_sg_cb) &&
4044 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4045 (!atomic_read(&card->force_alloc_skb))) {
4046 use_rx_sg = 1;
4047 } else {
4048 skb = dev_alloc_skb(skb_len + headroom);
4049 if (!skb)
4050 goto no_mem;
4051 if (headroom)
4052 skb_reserve(skb, headroom);
4053 }
4054
4055 data_ptr = element->addr + offset;
4056 while (skb_len) {
4057 data_len = min(skb_len, (int)(element->length - offset));
4058 if (data_len) {
4059 if (use_rx_sg) {
4060 if (qeth_create_skb_frag(element, &skb, offset,
4061 &frag, data_len))
4062 goto no_mem;
4063 } else {
4064 memcpy(skb_put(skb, data_len), data_ptr,
4065 data_len);
4066 }
4067 }
4068 skb_len -= data_len;
4069 if (skb_len) {
4070 if (qeth_is_last_sbale(element)) {
847a50fd 4071 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4072 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4073 dev_kfree_skb_any(skb);
4074 card->stats.rx_errors++;
4075 return NULL;
4076 }
4077 element++;
4078 offset = 0;
4079 data_ptr = element->addr;
4080 } else {
4081 offset += data_len;
4082 }
4083 }
4084 *__element = element;
4085 *__offset = offset;
4086 if (use_rx_sg && card->options.performance_stats) {
4087 card->perf_stats.sg_skbs_rx++;
4088 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4089 }
4090 return skb;
4091no_mem:
4092 if (net_ratelimit()) {
847a50fd 4093 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4094 }
4095 card->stats.rx_dropped++;
4096 return NULL;
4097}
4098EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4099
4100static void qeth_unregister_dbf_views(void)
4101{
d11ba0c4
PT		 4102 int x;
4103 for (x = 0; x < QETH_DBF_INFOS; x++) {
4104 debug_unregister(qeth_dbf[x].id);
4105 qeth_dbf[x].id = NULL;
4106 }
4a71df50
FB		 4107}
4108
8e96c51c 4109void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4110{
4111 char dbf_txt_buf[32];
345aa66e 4112 va_list args;
cd023216 4113
8e96c51c 4114 if (level > id->level)
cd023216 4115 return;
345aa66e
PT		 4116 va_start(args, fmt);
4117 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4118 va_end(args);
8e96c51c 4119 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 4120}
4121EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4122
4a71df50
FB		 4123static int qeth_register_dbf_views(void)
4124{
d11ba0c4
PT		 4125 int ret;
4126 int x;
4127
4128 for (x = 0; x < QETH_DBF_INFOS; x++) {
4129 /* register the areas */
4130 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4131 qeth_dbf[x].pages,
4132 qeth_dbf[x].areas,
4133 qeth_dbf[x].len);
4134 if (qeth_dbf[x].id == NULL) {
4135 qeth_unregister_dbf_views();
4136 return -ENOMEM;
4137 }
4a71df50 4138
d11ba0c4
PT		 4139 /* register a view */
4140 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4141 if (ret) {
4142 qeth_unregister_dbf_views();
4143 return ret;
4144 }
4a71df50 4145
d11ba0c4
PT		 4146 /* set a passing level */
4147 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4148 }
4a71df50
FB		 4149
4150 return 0;
4151}
4152
4153int qeth_core_load_discipline(struct qeth_card *card,
4154 enum qeth_discipline_id discipline)
4155{
4156 int rc = 0;
4157 switch (discipline) {
4158 case QETH_DISCIPLINE_LAYER3:
4159 card->discipline.ccwgdriver = try_then_request_module(
4160 symbol_get(qeth_l3_ccwgroup_driver),
4161 "qeth_l3");
4162 break;
4163 case QETH_DISCIPLINE_LAYER2:
4164 card->discipline.ccwgdriver = try_then_request_module(
4165 symbol_get(qeth_l2_ccwgroup_driver),
4166 "qeth_l2");
4167 break;
4168 }
4169 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4170 dev_err(&card->gdev->dev, "There is no kernel module to "
4171 "support discipline %d\n", discipline);
4a71df50
FB		 4172 rc = -EINVAL;
4173 }
4174 return rc;
4175}
4176
4177void qeth_core_free_discipline(struct qeth_card *card)
4178{
4179 if (card->options.layer2)
4180 symbol_put(qeth_l2_ccwgroup_driver);
4181 else
4182 symbol_put(qeth_l3_ccwgroup_driver);
4183 card->discipline.ccwgdriver = NULL;
4184}
4185
76b11f8e
UB		 4186static void qeth_determine_capabilities(struct qeth_card *card)
4187{
4188 int rc;
a60389ab
EL		 4189 int length;
4190 char *prcd;
76b11f8e
UB		 4191
4192 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4193 rc = ccw_device_set_online(CARD_DDEV(card));
4194 if (rc) {
4195 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4196 goto out;
4197 }
4198
a60389ab
EL		 4199
4200 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
76b11f8e 4201 if (rc) {
a60389ab
EL		 4202 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4203 dev_name(&card->gdev->dev), rc);
76b11f8e
UB		 4204 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4205 goto out_offline;
4206 }
a60389ab
EL		 4207 qeth_configure_unitaddr(card, prcd);
4208 qeth_configure_blkt_default(card, prcd);
4209 kfree(prcd);
76b11f8e
UB		 4210
4211 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4212 if (rc)
4213 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4214
4215out_offline:
4216 ccw_device_set_offline(CARD_DDEV(card));
4217out:
4218 return;
4219}
4220
4a71df50
FB		 4221static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4222{
4223 struct qeth_card *card;
4224 struct device *dev;
4225 int rc;
4226 unsigned long flags;
af039068 4227 char dbf_name[20];
4a71df50 4228
d11ba0c4 4229 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4230
4231 dev = &gdev->dev;
4232 if (!get_device(dev))
4233 return -ENODEV;
4234
2a0217d5 4235 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4236
4237 card = qeth_alloc_card();
4238 if (!card) {
d11ba0c4 4239 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4240 rc = -ENOMEM;
4241 goto err_dev;
4242 }
af039068
CO		 4243
4244 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4245 dev_name(&gdev->dev));
4246 card->debug = debug_register(dbf_name, 2, 1, 8);
4247 if (!card->debug) {
4248 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4249 rc = -ENOMEM;
4250 goto err_card;
4251 }
4252 debug_register_view(card->debug, &debug_hex_ascii_view);
4253
4a71df50
FB		 4254 card->read.ccwdev = gdev->cdev[0];
4255 card->write.ccwdev = gdev->cdev[1];
4256 card->data.ccwdev = gdev->cdev[2];
4257 dev_set_drvdata(&gdev->dev, card);
4258 card->gdev = gdev;
4259 gdev->cdev[0]->handler = qeth_irq;
4260 gdev->cdev[1]->handler = qeth_irq;
4261 gdev->cdev[2]->handler = qeth_irq;
4262
4263 rc = qeth_determine_card_type(card);
4264 if (rc) {
d11ba0c4 4265 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 4266 goto err_dbf;
4a71df50
FB		 4267 }
4268 rc = qeth_setup_card(card);
4269 if (rc) {
d11ba0c4 4270 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 4271 goto err_dbf;
4a71df50
FB		 4272 }
4273
5113fec0 4274 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 4275 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 4276 else
4277 rc = qeth_core_create_device_attributes(dev);
4278 if (rc)
af039068 4279 goto err_dbf;
5113fec0
UB		 4280 switch (card->info.type) {
4281 case QETH_CARD_TYPE_OSN:
4282 case QETH_CARD_TYPE_OSM:
4a71df50 4283 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 4284 if (rc)
4285 goto err_attr;
4a71df50 4286 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 4287 if (rc)
5113fec0
UB		 4288 goto err_disc;
4289 case QETH_CARD_TYPE_OSD:
4290 case QETH_CARD_TYPE_OSX:
4291 default:
4292 break;
4a71df50
FB		 4293 }
4294
4295 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4296 list_add_tail(&card->list, &qeth_core_card_list.list);
4297 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 4298
4299 qeth_determine_capabilities(card);
4a71df50
FB		 4300 return 0;
4301
5113fec0
UB		 4302err_disc:
4303 qeth_core_free_discipline(card);
4304err_attr:
4305 if (card->info.type == QETH_CARD_TYPE_OSN)
4306 qeth_core_remove_osn_attributes(dev);
4307 else
4308 qeth_core_remove_device_attributes(dev);
af039068
CO		 4309err_dbf:
4310 debug_unregister(card->debug);
4a71df50
FB		 4311err_card:
4312 qeth_core_free_card(card);
4313err_dev:
4314 put_device(dev);
4315 return rc;
4316}
4317
4318static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4319{
4320 unsigned long flags;
4321 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4322
28a7e4c9 4323 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4324
4325 if (card->info.type == QETH_CARD_TYPE_OSN) {
4326 qeth_core_remove_osn_attributes(&gdev->dev);
4327 } else {
4328 qeth_core_remove_device_attributes(&gdev->dev);
4329 }
9dc48ccc
UB		 4330
4331 if (card->discipline.ccwgdriver) {
4332 card->discipline.ccwgdriver->remove(gdev);
4333 qeth_core_free_discipline(card);
4334 }
4335
af039068 4336 debug_unregister(card->debug);
4a71df50
FB		 4337 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4338 list_del(&card->list);
4339 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4340 qeth_core_free_card(card);
4341 dev_set_drvdata(&gdev->dev, NULL);
4342 put_device(&gdev->dev);
4343 return;
4344}
4345
4346static int qeth_core_set_online(struct ccwgroup_device *gdev)
4347{
4348 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4349 int rc = 0;
4350 int def_discipline;
4351
4352 if (!card->discipline.ccwgdriver) {
4353 if (card->info.type == QETH_CARD_TYPE_IQD)
4354 def_discipline = QETH_DISCIPLINE_LAYER3;
4355 else
4356 def_discipline = QETH_DISCIPLINE_LAYER2;
4357 rc = qeth_core_load_discipline(card, def_discipline);
4358 if (rc)
4359 goto err;
4360 rc = card->discipline.ccwgdriver->probe(card->gdev);
4361 if (rc)
4362 goto err;
4363 }
4364 rc = card->discipline.ccwgdriver->set_online(gdev);
4365err:
4366 return rc;
4367}
4368
4369static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4370{
4371 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4372 return card->discipline.ccwgdriver->set_offline(gdev);
4373}
4374
4375static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4376{
4377 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4378 if (card->discipline.ccwgdriver &&
4379 card->discipline.ccwgdriver->shutdown)
4380 card->discipline.ccwgdriver->shutdown(gdev);
4381}
4382
bbcfcdc8
FB		 4383static int qeth_core_prepare(struct ccwgroup_device *gdev)
4384{
4385 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4386 if (card->discipline.ccwgdriver &&
4387 card->discipline.ccwgdriver->prepare)
4388 return card->discipline.ccwgdriver->prepare(gdev);
4389 return 0;
4390}
4391
4392static void qeth_core_complete(struct ccwgroup_device *gdev)
4393{
4394 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4395 if (card->discipline.ccwgdriver &&
4396 card->discipline.ccwgdriver->complete)
4397 card->discipline.ccwgdriver->complete(gdev);
4398}
4399
4400static int qeth_core_freeze(struct ccwgroup_device *gdev)
4401{
4402 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4403 if (card->discipline.ccwgdriver &&
4404 card->discipline.ccwgdriver->freeze)
4405 return card->discipline.ccwgdriver->freeze(gdev);
4406 return 0;
4407}
4408
4409static int qeth_core_thaw(struct ccwgroup_device *gdev)
4410{
4411 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4412 if (card->discipline.ccwgdriver &&
4413 card->discipline.ccwgdriver->thaw)
4414 return card->discipline.ccwgdriver->thaw(gdev);
4415 return 0;
4416}
4417
4418static int qeth_core_restore(struct ccwgroup_device *gdev)
4419{
4420 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4421 if (card->discipline.ccwgdriver &&
4422 card->discipline.ccwgdriver->restore)
4423 return card->discipline.ccwgdriver->restore(gdev);
4424 return 0;
4425}
4426
4a71df50
FB		 4427static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4428 .owner = THIS_MODULE,
4429 .name = "qeth",
4430 .driver_id = 0xD8C5E3C8,
4431 .probe = qeth_core_probe_device,
4432 .remove = qeth_core_remove_device,
4433 .set_online = qeth_core_set_online,
4434 .set_offline = qeth_core_set_offline,
4435 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 4436 .prepare = qeth_core_prepare,
4437 .complete = qeth_core_complete,
4438 .freeze = qeth_core_freeze,
4439 .thaw = qeth_core_thaw,
4440 .restore = qeth_core_restore,
4a71df50
FB		 4441};
4442
4443static ssize_t
4444qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4445 size_t count)
4446{
4447 int err;
4448 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4449 qeth_core_ccwgroup_driver.driver_id);
4450 if (err)
4451 return err;
4452 else
4453 return count;
4454}
4455
4456static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4457
4458static struct {
4459 const char str[ETH_GSTRING_LEN];
4460} qeth_ethtool_stats_keys[] = {
4461/* 0 */{"rx skbs"},
4462 {"rx buffers"},
4463 {"tx skbs"},
4464 {"tx buffers"},
4465 {"tx skbs no packing"},
4466 {"tx buffers no packing"},
4467 {"tx skbs packing"},
4468 {"tx buffers packing"},
4469 {"tx sg skbs"},
4470 {"tx sg frags"},
4471/* 10 */{"rx sg skbs"},
4472 {"rx sg frags"},
4473 {"rx sg page allocs"},
4474 {"tx large kbytes"},
4475 {"tx large count"},
4476 {"tx pk state ch n->p"},
4477 {"tx pk state ch p->n"},
4478 {"tx pk watermark low"},
4479 {"tx pk watermark high"},
4480 {"queue 0 buffer usage"},
4481/* 20 */{"queue 1 buffer usage"},
4482 {"queue 2 buffer usage"},
4483 {"queue 3 buffer usage"},
a1c3ed4c
FB		 4484 {"rx poll time"},
4485 {"rx poll count"},
4a71df50
FB		 4486 {"rx do_QDIO time"},
4487 {"rx do_QDIO count"},
4488 {"tx handler time"},
4489 {"tx handler count"},
4490 {"tx time"},
4491/* 30 */{"tx count"},
4492 {"tx do_QDIO time"},
4493 {"tx do_QDIO count"},
f61a0d05 4494 {"tx csum"},
c3b4a740 4495 {"tx lin"},
4a71df50
FB		 4496};
4497
df8b4ec8 4498int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 4499{
df8b4ec8
BH		 4500 switch (stringset) {
4501 case ETH_SS_STATS:
4502 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4503 default:
4504 return -EINVAL;
4505 }
4a71df50 4506}
df8b4ec8 4507EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 4508
4509void qeth_core_get_ethtool_stats(struct net_device *dev,
4510 struct ethtool_stats *stats, u64 *data)
4511{
509e2562 4512 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4513 data[0] = card->stats.rx_packets -
4514 card->perf_stats.initial_rx_packets;
4515 data[1] = card->perf_stats.bufs_rec;
4516 data[2] = card->stats.tx_packets -
4517 card->perf_stats.initial_tx_packets;
4518 data[3] = card->perf_stats.bufs_sent;
4519 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4520 - card->perf_stats.skbs_sent_pack;
4521 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4522 data[6] = card->perf_stats.skbs_sent_pack;
4523 data[7] = card->perf_stats.bufs_sent_pack;
4524 data[8] = card->perf_stats.sg_skbs_sent;
4525 data[9] = card->perf_stats.sg_frags_sent;
4526 data[10] = card->perf_stats.sg_skbs_rx;
4527 data[11] = card->perf_stats.sg_frags_rx;
4528 data[12] = card->perf_stats.sg_alloc_page_rx;
4529 data[13] = (card->perf_stats.large_send_bytes >> 10);
4530 data[14] = card->perf_stats.large_send_cnt;
4531 data[15] = card->perf_stats.sc_dp_p;
4532 data[16] = card->perf_stats.sc_p_dp;
4533 data[17] = QETH_LOW_WATERMARK_PACK;
4534 data[18] = QETH_HIGH_WATERMARK_PACK;
4535 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4536 data[20] = (card->qdio.no_out_queues > 1) ?
4537 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4538 data[21] = (card->qdio.no_out_queues > 2) ?
4539 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4540 data[22] = (card->qdio.no_out_queues > 3) ?
4541 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4542 data[23] = card->perf_stats.inbound_time;
4543 data[24] = card->perf_stats.inbound_cnt;
4544 data[25] = card->perf_stats.inbound_do_qdio_time;
4545 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4546 data[27] = card->perf_stats.outbound_handler_time;
4547 data[28] = card->perf_stats.outbound_handler_cnt;
4548 data[29] = card->perf_stats.outbound_time;
4549 data[30] = card->perf_stats.outbound_cnt;
4550 data[31] = card->perf_stats.outbound_do_qdio_time;
4551 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 4552 data[33] = card->perf_stats.tx_csum;
c3b4a740 4553 data[34] = card->perf_stats.tx_lin;
4a71df50
FB		 4554}
4555EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4556
4557void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4558{
4559 switch (stringset) {
4560 case ETH_SS_STATS:
4561 memcpy(data, &qeth_ethtool_stats_keys,
4562 sizeof(qeth_ethtool_stats_keys));
4563 break;
4564 default:
4565 WARN_ON(1);
4566 break;
4567 }
4568}
4569EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4570
4571void qeth_core_get_drvinfo(struct net_device *dev,
4572 struct ethtool_drvinfo *info)
4573{
509e2562 4574 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4575 if (card->options.layer2)
4576 strcpy(info->driver, "qeth_l2");
4577 else
4578 strcpy(info->driver, "qeth_l3");
4579
4580 strcpy(info->version, "1.0");
4581 strcpy(info->fw_version, card->info.mcl_level);
4582 sprintf(info->bus_info, "%s/%s/%s",
4583 CARD_RDEV_ID(card),
4584 CARD_WDEV_ID(card),
4585 CARD_DDEV_ID(card));
4586}
4587EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4588
3f9975aa
FB		 4589int qeth_core_ethtool_get_settings(struct net_device *netdev,
4590 struct ethtool_cmd *ecmd)
4591{
509e2562 4592 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4593 enum qeth_link_types link_type;
4594
4595 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4596 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4597 else
4598 link_type = card->info.link_type;
4599
4600 ecmd->transceiver = XCVR_INTERNAL;
4601 ecmd->supported = SUPPORTED_Autoneg;
4602 ecmd->advertising = ADVERTISED_Autoneg;
4603 ecmd->duplex = DUPLEX_FULL;
4604 ecmd->autoneg = AUTONEG_ENABLE;
4605
4606 switch (link_type) {
4607 case QETH_LINK_TYPE_FAST_ETH:
4608 case QETH_LINK_TYPE_LANE_ETH100:
4609 ecmd->supported |= SUPPORTED_10baseT_Half |
4610 SUPPORTED_10baseT_Full |
4611 SUPPORTED_100baseT_Half |
4612 SUPPORTED_100baseT_Full |
4613 SUPPORTED_TP;
4614 ecmd->advertising |= ADVERTISED_10baseT_Half |
4615 ADVERTISED_10baseT_Full |
4616 ADVERTISED_100baseT_Half |
4617 ADVERTISED_100baseT_Full |
4618 ADVERTISED_TP;
4619 ecmd->speed = SPEED_100;
4620 ecmd->port = PORT_TP;
4621 break;
4622
4623 case QETH_LINK_TYPE_GBIT_ETH:
4624 case QETH_LINK_TYPE_LANE_ETH1000:
4625 ecmd->supported |= SUPPORTED_10baseT_Half |
4626 SUPPORTED_10baseT_Full |
4627 SUPPORTED_100baseT_Half |
4628 SUPPORTED_100baseT_Full |
4629 SUPPORTED_1000baseT_Half |
4630 SUPPORTED_1000baseT_Full |
4631 SUPPORTED_FIBRE;
4632 ecmd->advertising |= ADVERTISED_10baseT_Half |
4633 ADVERTISED_10baseT_Full |
4634 ADVERTISED_100baseT_Half |
4635 ADVERTISED_100baseT_Full |
4636 ADVERTISED_1000baseT_Half |
4637 ADVERTISED_1000baseT_Full |
4638 ADVERTISED_FIBRE;
4639 ecmd->speed = SPEED_1000;
4640 ecmd->port = PORT_FIBRE;
4641 break;
4642
4643 case QETH_LINK_TYPE_10GBIT_ETH:
4644 ecmd->supported |= SUPPORTED_10baseT_Half |
4645 SUPPORTED_10baseT_Full |
4646 SUPPORTED_100baseT_Half |
4647 SUPPORTED_100baseT_Full |
4648 SUPPORTED_1000baseT_Half |
4649 SUPPORTED_1000baseT_Full |
4650 SUPPORTED_10000baseT_Full |
4651 SUPPORTED_FIBRE;
4652 ecmd->advertising |= ADVERTISED_10baseT_Half |
4653 ADVERTISED_10baseT_Full |
4654 ADVERTISED_100baseT_Half |
4655 ADVERTISED_100baseT_Full |
4656 ADVERTISED_1000baseT_Half |
4657 ADVERTISED_1000baseT_Full |
4658 ADVERTISED_10000baseT_Full |
4659 ADVERTISED_FIBRE;
4660 ecmd->speed = SPEED_10000;
4661 ecmd->port = PORT_FIBRE;
4662 break;
4663
4664 default:
4665 ecmd->supported |= SUPPORTED_10baseT_Half |
4666 SUPPORTED_10baseT_Full |
4667 SUPPORTED_TP;
4668 ecmd->advertising |= ADVERTISED_10baseT_Half |
4669 ADVERTISED_10baseT_Full |
4670 ADVERTISED_TP;
4671 ecmd->speed = SPEED_10;
4672 ecmd->port = PORT_TP;
4673 }
4674
4675 return 0;
4676}
4677EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4678
4a71df50
FB		 4679static int __init qeth_core_init(void)
4680{
4681 int rc;
4682
74eacdb9 4683 pr_info("loading core functions\n");
4a71df50
FB		 4684 INIT_LIST_HEAD(&qeth_core_card_list.list);
4685 rwlock_init(&qeth_core_card_list.rwlock);
4686
4687 rc = qeth_register_dbf_views();
4688 if (rc)
4689 goto out_err;
4690 rc = ccw_driver_register(&qeth_ccw_driver);
4691 if (rc)
4692 goto ccw_err;
4693 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4694 if (rc)
4695 goto ccwgroup_err;
4696 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4697 &driver_attr_group);
4698 if (rc)
4699 goto driver_err;
035da16f 4700 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 4701 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4702 if (rc)
4703 goto register_err;
4a71df50 4704
683d718a
FB		 4705 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4706 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4707 if (!qeth_core_header_cache) {
4708 rc = -ENOMEM;
4709 goto slab_err;
4710 }
4711
4712 return 0;
4713slab_err:
035da16f 4714 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 4715register_err:
4716 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4717 &driver_attr_group);
4718driver_err:
4719 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4720ccwgroup_err:
4721 ccw_driver_unregister(&qeth_ccw_driver);
4722ccw_err:
74eacdb9 4723 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 4724 qeth_unregister_dbf_views();
4725out_err:
74eacdb9 4726 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 4727 return rc;
4728}
4729
4730static void __exit qeth_core_exit(void)
4731{
035da16f 4732 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 4733 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4734 &driver_attr_group);
4735 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4736 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4737 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 4738 qeth_unregister_dbf_views();
74eacdb9 4739 pr_info("core functions removed\n");
4a71df50
FB		 4740}
4741
4742module_init(qeth_core_init);
4743module_exit(qeth_core_exit);
4744MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4745MODULE_DESCRIPTION("qeth core functions");
4746MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git