]> git.ipfire.org Git - thirdparty/kernel/stable.git/blame - drivers/s390/net/qeth_core_main.c
projects / thirdparty / kernel / stable.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
qeth layer 2 and layer 3 common feature handling
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
0da9581d 63static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
72861ae7 71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 72
b4d72c08 73struct workqueue_struct *qeth_wq;
c044dc21 74EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 75
511c2445
EC		 76int qeth_card_hw_is_reachable(struct qeth_card *card)
77{
78 return (card->state == CARD_STATE_SOFTSETUP) ||
79 (card->state == CARD_STATE_UP);
80}
81EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
82
0f54761d
SR		 83static void qeth_close_dev_handler(struct work_struct *work)
84{
85 struct qeth_card *card;
86
87 card = container_of(work, struct qeth_card, close_dev_work);
88 QETH_CARD_TEXT(card, 2, "cldevhdl");
89 rtnl_lock();
90 dev_close(card->dev);
91 rtnl_unlock();
92 ccwgroup_set_offline(card->gdev);
93}
94
95void qeth_close_dev(struct qeth_card *card)
96{
97 QETH_CARD_TEXT(card, 2, "cldevsubm");
98 queue_work(qeth_wq, &card->close_dev_work);
99}
100EXPORT_SYMBOL_GPL(qeth_close_dev);
101
4a71df50
FB		 102static inline const char *qeth_get_cardname(struct qeth_card *card)
103{
104 if (card->info.guestlan) {
105 switch (card->info.type) {
5113fec0 106 case QETH_CARD_TYPE_OSD:
7096b187 107 return " Virtual NIC QDIO";
4a71df50 108 case QETH_CARD_TYPE_IQD:
7096b187 109 return " Virtual NIC Hiper";
5113fec0 110 case QETH_CARD_TYPE_OSM:
7096b187 111 return " Virtual NIC QDIO - OSM";
5113fec0 112 case QETH_CARD_TYPE_OSX:
7096b187 113 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 114 default:
115 return " unknown";
116 }
117 } else {
118 switch (card->info.type) {
5113fec0 119 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 120 return " OSD Express";
121 case QETH_CARD_TYPE_IQD:
122 return " HiperSockets";
123 case QETH_CARD_TYPE_OSN:
124 return " OSN QDIO";
5113fec0
UB		 125 case QETH_CARD_TYPE_OSM:
126 return " OSM QDIO";
127 case QETH_CARD_TYPE_OSX:
128 return " OSX QDIO";
4a71df50
FB		 129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134}
135
136/* max length to be returned: 14 */
137const char *qeth_get_cardname_short(struct qeth_card *card)
138{
139 if (card->info.guestlan) {
140 switch (card->info.type) {
5113fec0 141 case QETH_CARD_TYPE_OSD:
7096b187 142 return "Virt.NIC QDIO";
4a71df50 143 case QETH_CARD_TYPE_IQD:
7096b187 144 return "Virt.NIC Hiper";
5113fec0 145 case QETH_CARD_TYPE_OSM:
7096b187 146 return "Virt.NIC OSM";
5113fec0 147 case QETH_CARD_TYPE_OSX:
7096b187 148 return "Virt.NIC OSX";
4a71df50
FB		 149 default:
150 return "unknown";
151 }
152 } else {
153 switch (card->info.type) {
5113fec0 154 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 155 switch (card->info.link_type) {
156 case QETH_LINK_TYPE_FAST_ETH:
157 return "OSD_100";
158 case QETH_LINK_TYPE_HSTR:
159 return "HSTR";
160 case QETH_LINK_TYPE_GBIT_ETH:
161 return "OSD_1000";
162 case QETH_LINK_TYPE_10GBIT_ETH:
163 return "OSD_10GIG";
164 case QETH_LINK_TYPE_LANE_ETH100:
165 return "OSD_FE_LANE";
166 case QETH_LINK_TYPE_LANE_TR:
167 return "OSD_TR_LANE";
168 case QETH_LINK_TYPE_LANE_ETH1000:
169 return "OSD_GbE_LANE";
170 case QETH_LINK_TYPE_LANE:
171 return "OSD_ATM_LANE";
172 default:
173 return "OSD_Express";
174 }
175 case QETH_CARD_TYPE_IQD:
176 return "HiperSockets";
177 case QETH_CARD_TYPE_OSN:
178 return "OSN";
5113fec0
UB		 179 case QETH_CARD_TYPE_OSM:
180 return "OSM_1000";
181 case QETH_CARD_TYPE_OSX:
182 return "OSX_10GIG";
4a71df50
FB		 183 default:
184 return "unknown";
185 }
186 }
187 return "n/a";
188}
189
65d8013c
SR		 190void qeth_set_recovery_task(struct qeth_card *card)
191{
192 card->recovery_task = current;
193}
194EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
195
196void qeth_clear_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = NULL;
199}
200EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
201
202static bool qeth_is_recovery_task(const struct qeth_card *card)
203{
204 return card->recovery_task == current;
205}
206
4a71df50
FB		 207void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
208 int clear_start_mask)
209{
210 unsigned long flags;
211
212 spin_lock_irqsave(&card->thread_mask_lock, flags);
213 card->thread_allowed_mask = threads;
214 if (clear_start_mask)
215 card->thread_start_mask &= threads;
216 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
217 wake_up(&card->wait_q);
218}
219EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
220
221int qeth_threads_running(struct qeth_card *card, unsigned long threads)
222{
223 unsigned long flags;
224 int rc = 0;
225
226 spin_lock_irqsave(&card->thread_mask_lock, flags);
227 rc = (card->thread_running_mask & threads);
228 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
229 return rc;
230}
231EXPORT_SYMBOL_GPL(qeth_threads_running);
232
233int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
234{
65d8013c
SR		 235 if (qeth_is_recovery_task(card))
236 return 0;
4a71df50
FB		 237 return wait_event_interruptible(card->wait_q,
238 qeth_threads_running(card, threads) == 0);
239}
240EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
241
242void qeth_clear_working_pool_list(struct qeth_card *card)
243{
244 struct qeth_buffer_pool_entry *pool_entry, *tmp;
245
847a50fd 246 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 247 list_for_each_entry_safe(pool_entry, tmp,
248 &card->qdio.in_buf_pool.entry_list, list){
249 list_del(&pool_entry->list);
250 }
251}
252EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
253
254static int qeth_alloc_buffer_pool(struct qeth_card *card)
255{
256 struct qeth_buffer_pool_entry *pool_entry;
257 void *ptr;
258 int i, j;
259
847a50fd 260 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 261 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 262 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 263 if (!pool_entry) {
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 268 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 269 if (!ptr) {
270 while (j > 0)
271 free_page((unsigned long)
272 pool_entry->elements[--j]);
273 kfree(pool_entry);
274 qeth_free_buffer_pool(card);
275 return -ENOMEM;
276 }
277 pool_entry->elements[j] = ptr;
278 }
279 list_add(&pool_entry->init_list,
280 &card->qdio.init_pool.entry_list);
281 }
282 return 0;
283}
284
285int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
286{
847a50fd 287 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 288
289 if ((card->state != CARD_STATE_DOWN) &&
290 (card->state != CARD_STATE_RECOVER))
291 return -EPERM;
292
293 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
294 qeth_clear_working_pool_list(card);
295 qeth_free_buffer_pool(card);
296 card->qdio.in_buf_pool.buf_count = bufcnt;
297 card->qdio.init_pool.buf_count = bufcnt;
298 return qeth_alloc_buffer_pool(card);
299}
76b11f8e 300EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 301
4601ba6c
SO		 302static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
303{
6d284bde
SO		 304 if (!q)
305 return;
306
307 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 308 kfree(q);
309}
310
311static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
312{
313 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
314 int i;
315
316 if (!q)
317 return NULL;
318
6d284bde
SO		 319 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
320 kfree(q);
321 return NULL;
322 }
323
4601ba6c 324 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 325 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 326
327 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
328 return q;
329}
330
0da9581d
EL		 331static inline int qeth_cq_init(struct qeth_card *card)
332{
333 int rc;
334
335 if (card->options.cq == QETH_CQ_ENABLED) {
336 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 337 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
338 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 339 card->qdio.c_q->next_buf_to_init = 127;
340 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
341 card->qdio.no_in_queues - 1, 0,
342 127);
343 if (rc) {
344 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
345 goto out;
346 }
347 }
348 rc = 0;
349out:
350 return rc;
351}
352
353static inline int qeth_alloc_cq(struct qeth_card *card)
354{
355 int rc;
356
357 if (card->options.cq == QETH_CQ_ENABLED) {
358 int i;
359 struct qdio_outbuf_state *outbuf_states;
360
361 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 362 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 363 if (!card->qdio.c_q) {
364 rc = -1;
365 goto kmsg_out;
366 }
0da9581d 367 card->qdio.no_in_queues = 2;
4a912f98 368 card->qdio.out_bufstates =
0da9581d
EL		 369 kzalloc(card->qdio.no_out_queues *
370 QDIO_MAX_BUFFERS_PER_Q *
371 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
372 outbuf_states = card->qdio.out_bufstates;
373 if (outbuf_states == NULL) {
374 rc = -1;
375 goto free_cq_out;
376 }
377 for (i = 0; i < card->qdio.no_out_queues; ++i) {
378 card->qdio.out_qs[i]->bufstates = outbuf_states;
379 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
380 }
381 } else {
382 QETH_DBF_TEXT(SETUP, 2, "nocq");
383 card->qdio.c_q = NULL;
384 card->qdio.no_in_queues = 1;
385 }
386 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
387 rc = 0;
388out:
389 return rc;
390free_cq_out:
4601ba6c 391 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 392 card->qdio.c_q = NULL;
393kmsg_out:
394 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
395 goto out;
396}
397
398static inline void qeth_free_cq(struct qeth_card *card)
399{
400 if (card->qdio.c_q) {
401 --card->qdio.no_in_queues;
4601ba6c 402 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 403 card->qdio.c_q = NULL;
404 }
405 kfree(card->qdio.out_bufstates);
406 card->qdio.out_bufstates = NULL;
407}
408
b3332930
FB		 409static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
410 int delayed) {
411 enum iucv_tx_notify n;
412
413 switch (sbalf15) {
414 case 0:
415 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
416 break;
417 case 4:
418 case 16:
419 case 17:
420 case 18:
421 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
422 TX_NOTIFY_UNREACHABLE;
423 break;
424 default:
425 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
426 TX_NOTIFY_GENERALERROR;
427 break;
428 }
429
430 return n;
431}
432
0da9581d
EL		 433static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
434 int bidx, int forced_cleanup)
435{
72861ae7
EL		 436 if (q->card->options.cq != QETH_CQ_ENABLED)
437 return;
438
0da9581d
EL		 439 if (q->bufs[bidx]->next_pending != NULL) {
440 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
441 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
442
443 while (c) {
444 if (forced_cleanup ||
445 atomic_read(&c->state) ==
446 QETH_QDIO_BUF_HANDLED_DELAYED) {
447 struct qeth_qdio_out_buffer *f = c;
448 QETH_CARD_TEXT(f->q->card, 5, "fp");
449 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 450 /* release here to avoid interleaving between
451 outbound tasklet and inbound tasklet
452 regarding notifications and lifecycle */
453 qeth_release_skbs(c);
454
0da9581d 455 c = f->next_pending;
18af5c17 456 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 457 head->next_pending = c;
458 kmem_cache_free(qeth_qdio_outbuf_cache, f);
459 } else {
460 head = c;
461 c = c->next_pending;
462 }
463
464 }
465 }
72861ae7
EL		 466 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
467 QETH_QDIO_BUF_HANDLED_DELAYED)) {
468 /* for recovery situations */
469 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
470 qeth_init_qdio_out_buf(q, bidx);
471 QETH_CARD_TEXT(q->card, 2, "clprecov");
472 }
0da9581d
EL		 473}
474
475
476static inline void qeth_qdio_handle_aob(struct qeth_card *card,
477 unsigned long phys_aob_addr) {
478 struct qaob *aob;
479 struct qeth_qdio_out_buffer *buffer;
b3332930 480 enum iucv_tx_notify notification;
0da9581d
EL		 481
482 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
483 QETH_CARD_TEXT(card, 5, "haob");
484 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
485 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
486 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
487
b3332930
FB		 488 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
489 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
490 notification = TX_NOTIFY_OK;
491 } else {
18af5c17
SR		 492 WARN_ON_ONCE(atomic_read(&buffer->state) !=
493 QETH_QDIO_BUF_PENDING);
b3332930
FB		 494 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
495 notification = TX_NOTIFY_DELAYED_OK;
496 }
497
498 if (aob->aorc != 0) {
499 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
500 notification = qeth_compute_cq_notification(aob->aorc, 1);
501 }
502 qeth_notify_skbs(buffer->q, buffer, notification);
503
0da9581d
EL		 504 buffer->aob = NULL;
505 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 506 QETH_QDIO_BUF_HANDLED_DELAYED);
507
0da9581d
EL		 508 /* from here on: do not touch buffer anymore */
509 qdio_release_aob(aob);
510}
511
512static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
513{
514 return card->options.cq == QETH_CQ_ENABLED &&
515 card->qdio.c_q != NULL &&
516 queue != 0 &&
517 queue == card->qdio.no_in_queues - 1;
518}
519
520
4a71df50
FB		 521static int qeth_issue_next_read(struct qeth_card *card)
522{
523 int rc;
524 struct qeth_cmd_buffer *iob;
525
847a50fd 526 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 527 if (card->read.state != CH_STATE_UP)
528 return -EIO;
529 iob = qeth_get_buffer(&card->read);
530 if (!iob) {
74eacdb9
FB		 531 dev_warn(&card->gdev->dev, "The qeth device driver "
532 "failed to recover an error on the device\n");
533 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
534 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 535 return -ENOMEM;
536 }
537 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 538 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 539 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
540 (addr_t) iob, 0, 0);
541 if (rc) {
74eacdb9
FB		 542 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
543 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 544 atomic_set(&card->read.irq_pending, 0);
908abbb5 545 card->read_or_write_problem = 1;
4a71df50
FB		 546 qeth_schedule_recovery(card);
547 wake_up(&card->wait_q);
548 }
549 return rc;
550}
551
552static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
553{
554 struct qeth_reply *reply;
555
556 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
557 if (reply) {
558 atomic_set(&reply->refcnt, 1);
559 atomic_set(&reply->received, 0);
560 reply->card = card;
6531084c 561 }
4a71df50
FB		 562 return reply;
563}
564
565static void qeth_get_reply(struct qeth_reply *reply)
566{
567 WARN_ON(atomic_read(&reply->refcnt) <= 0);
568 atomic_inc(&reply->refcnt);
569}
570
571static void qeth_put_reply(struct qeth_reply *reply)
572{
573 WARN_ON(atomic_read(&reply->refcnt) <= 0);
574 if (atomic_dec_and_test(&reply->refcnt))
575 kfree(reply);
576}
577
d11ba0c4 578static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 579 struct qeth_card *card)
580{
4a71df50 581 char *ipa_name;
d11ba0c4 582 int com = cmd->hdr.command;
4a71df50 583 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 584 if (rc)
70919e23
UB		 585 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
586 "x%X \"%s\"\n",
587 ipa_name, com, dev_name(&card->gdev->dev),
588 QETH_CARD_IFNAME(card), rc,
589 qeth_get_ipa_msg(rc));
d11ba0c4 590 else
70919e23
UB		 591 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
592 ipa_name, com, dev_name(&card->gdev->dev),
593 QETH_CARD_IFNAME(card));
4a71df50
FB		 594}
595
596static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
597 struct qeth_cmd_buffer *iob)
598{
599 struct qeth_ipa_cmd *cmd = NULL;
600
847a50fd 601 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 602 if (IS_IPA(iob->data)) {
603 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
604 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 605 if (cmd->hdr.command != IPA_CMD_SETCCID &&
606 cmd->hdr.command != IPA_CMD_DELCCID &&
607 cmd->hdr.command != IPA_CMD_MODCCID &&
608 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 609 qeth_issue_ipa_msg(cmd,
610 cmd->hdr.return_code, card);
4a71df50
FB		 611 return cmd;
612 } else {
613 switch (cmd->hdr.command) {
614 case IPA_CMD_STOPLAN:
0f54761d
SR		 615 if (cmd->hdr.return_code ==
616 IPA_RC_VEPA_TO_VEB_TRANSITION) {
617 dev_err(&card->gdev->dev,
618 "Interface %s is down because the "
619 "adjacent port is no longer in "
620 "reflective relay mode\n",
621 QETH_CARD_IFNAME(card));
622 qeth_close_dev(card);
623 } else {
624 dev_warn(&card->gdev->dev,
74eacdb9
FB		 625 "The link for interface %s on CHPID"
626 " 0x%X failed\n",
4a71df50
FB		 627 QETH_CARD_IFNAME(card),
628 card->info.chpid);
0f54761d
SR		 629 qeth_issue_ipa_msg(cmd,
630 cmd->hdr.return_code, card);
631 }
4a71df50
FB		 632 card->lan_online = 0;
633 if (card->dev && netif_carrier_ok(card->dev))
634 netif_carrier_off(card->dev);
635 return NULL;
636 case IPA_CMD_STARTLAN:
74eacdb9
FB		 637 dev_info(&card->gdev->dev,
638 "The link for %s on CHPID 0x%X has"
639 " been restored\n",
4a71df50
FB		 640 QETH_CARD_IFNAME(card),
641 card->info.chpid);
642 netif_carrier_on(card->dev);
922dc062 643 card->lan_online = 1;
1da74b1c
FB		 644 if (card->info.hwtrap)
645 card->info.hwtrap = 2;
4a71df50
FB		 646 qeth_schedule_recovery(card);
647 return NULL;
9c23f4da
EC		 648 case IPA_CMD_SETBRIDGEPORT_IQD:
649 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 650 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 651 if (card->discipline->control_event_handler
652 (card, cmd))
653 return cmd;
654 else
655 return NULL;
4a71df50
FB		 656 case IPA_CMD_MODCCID:
657 return cmd;
658 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 659 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 660 break;
661 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 662 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 663 break;
664 default:
c4cef07c 665 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 666 "but not a reply!\n");
667 break;
668 }
669 }
670 }
671 return cmd;
672}
673
674void qeth_clear_ipacmd_list(struct qeth_card *card)
675{
676 struct qeth_reply *reply, *r;
677 unsigned long flags;
678
847a50fd 679 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 680
681 spin_lock_irqsave(&card->lock, flags);
682 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
683 qeth_get_reply(reply);
684 reply->rc = -EIO;
685 atomic_inc(&reply->received);
686 list_del_init(&reply->list);
687 wake_up(&reply->wait_q);
688 qeth_put_reply(reply);
689 }
690 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 691 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 692}
693EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
694
5113fec0
UB		 695static int qeth_check_idx_response(struct qeth_card *card,
696 unsigned char *buffer)
4a71df50
FB		 697{
698 if (!buffer)
699 return 0;
700
d11ba0c4 701 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 702 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 703 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 704 "with cause code 0x%02x%s\n",
705 buffer[4],
706 ((buffer[4] == 0x22) ?
707 " -- try another portname" : ""));
847a50fd
CO		 708 QETH_CARD_TEXT(card, 2, "ckidxres");
709 QETH_CARD_TEXT(card, 2, " idxterm");
710 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 711 if (buffer[4] == 0xf6) {
712 dev_err(&card->gdev->dev,
713 "The qeth device is not configured "
714 "for the OSI layer required by z/VM\n");
715 return -EPERM;
716 }
4a71df50
FB		 717 return -EIO;
718 }
719 return 0;
720}
721
bca51650
TR		 722static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
723{
724 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
725 dev_get_drvdata(&cdev->dev))->dev);
726 return card;
727}
728
4a71df50
FB		 729static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
730 __u32 len)
731{
732 struct qeth_card *card;
733
4a71df50 734 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 735 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 736 if (channel == &card->read)
737 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
738 else
739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
740 channel->ccw.count = len;
741 channel->ccw.cda = (__u32) __pa(iob);
742}
743
744static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
745{
746 __u8 index;
747
847a50fd 748 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 749 index = channel->io_buf_no;
750 do {
751 if (channel->iob[index].state == BUF_STATE_FREE) {
752 channel->iob[index].state = BUF_STATE_LOCKED;
753 channel->io_buf_no = (channel->io_buf_no + 1) %
754 QETH_CMD_BUFFER_NO;
755 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
756 return channel->iob + index;
757 }
758 index = (index + 1) % QETH_CMD_BUFFER_NO;
759 } while (index != channel->io_buf_no);
760
761 return NULL;
762}
763
764void qeth_release_buffer(struct qeth_channel *channel,
765 struct qeth_cmd_buffer *iob)
766{
767 unsigned long flags;
768
847a50fd 769 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 770 spin_lock_irqsave(&channel->iob_lock, flags);
771 memset(iob->data, 0, QETH_BUFSIZE);
772 iob->state = BUF_STATE_FREE;
773 iob->callback = qeth_send_control_data_cb;
774 iob->rc = 0;
775 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 776 wake_up(&channel->wait_q);
4a71df50
FB		 777}
778EXPORT_SYMBOL_GPL(qeth_release_buffer);
779
780static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
781{
782 struct qeth_cmd_buffer *buffer = NULL;
783 unsigned long flags;
784
785 spin_lock_irqsave(&channel->iob_lock, flags);
786 buffer = __qeth_get_buffer(channel);
787 spin_unlock_irqrestore(&channel->iob_lock, flags);
788 return buffer;
789}
790
791struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
792{
793 struct qeth_cmd_buffer *buffer;
794 wait_event(channel->wait_q,
795 ((buffer = qeth_get_buffer(channel)) != NULL));
796 return buffer;
797}
798EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
799
800void qeth_clear_cmd_buffers(struct qeth_channel *channel)
801{
802 int cnt;
803
804 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
805 qeth_release_buffer(channel, &channel->iob[cnt]);
806 channel->buf_no = 0;
807 channel->io_buf_no = 0;
808}
809EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
810
811static void qeth_send_control_data_cb(struct qeth_channel *channel,
812 struct qeth_cmd_buffer *iob)
813{
814 struct qeth_card *card;
815 struct qeth_reply *reply, *r;
816 struct qeth_ipa_cmd *cmd;
817 unsigned long flags;
818 int keep_reply;
5113fec0 819 int rc = 0;
4a71df50 820
4a71df50 821 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 822 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 823 rc = qeth_check_idx_response(card, iob->data);
824 switch (rc) {
825 case 0:
826 break;
827 case -EIO:
4a71df50 828 qeth_clear_ipacmd_list(card);
5113fec0 829 qeth_schedule_recovery(card);
01fc3e86 830 /* fall through */
5113fec0 831 default:
4a71df50
FB		 832 goto out;
833 }
834
835 cmd = qeth_check_ipa_data(card, iob);
836 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
837 goto out;
838 /*in case of OSN : check if cmd is set */
839 if (card->info.type == QETH_CARD_TYPE_OSN &&
840 cmd &&
841 cmd->hdr.command != IPA_CMD_STARTLAN &&
842 card->osn_info.assist_cb != NULL) {
843 card->osn_info.assist_cb(card->dev, cmd);
844 goto out;
845 }
846
847 spin_lock_irqsave(&card->lock, flags);
848 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
849 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
850 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
851 qeth_get_reply(reply);
852 list_del_init(&reply->list);
853 spin_unlock_irqrestore(&card->lock, flags);
854 keep_reply = 0;
855 if (reply->callback != NULL) {
856 if (cmd) {
857 reply->offset = (__u16)((char *)cmd -
858 (char *)iob->data);
859 keep_reply = reply->callback(card,
860 reply,
861 (unsigned long)cmd);
862 } else
863 keep_reply = reply->callback(card,
864 reply,
865 (unsigned long)iob);
866 }
867 if (cmd)
868 reply->rc = (u16) cmd->hdr.return_code;
869 else if (iob->rc)
870 reply->rc = iob->rc;
871 if (keep_reply) {
872 spin_lock_irqsave(&card->lock, flags);
873 list_add_tail(&reply->list,
874 &card->cmd_waiter_list);
875 spin_unlock_irqrestore(&card->lock, flags);
876 } else {
877 atomic_inc(&reply->received);
878 wake_up(&reply->wait_q);
879 }
880 qeth_put_reply(reply);
881 goto out;
882 }
883 }
884 spin_unlock_irqrestore(&card->lock, flags);
885out:
886 memcpy(&card->seqno.pdu_hdr_ack,
887 QETH_PDU_HEADER_SEQ_NO(iob->data),
888 QETH_SEQ_NO_LENGTH);
889 qeth_release_buffer(channel, iob);
890}
891
892static int qeth_setup_channel(struct qeth_channel *channel)
893{
894 int cnt;
895
d11ba0c4 896 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 897 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 898 channel->iob[cnt].data =
b3332930 899 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 900 if (channel->iob[cnt].data == NULL)
901 break;
902 channel->iob[cnt].state = BUF_STATE_FREE;
903 channel->iob[cnt].channel = channel;
904 channel->iob[cnt].callback = qeth_send_control_data_cb;
905 channel->iob[cnt].rc = 0;
906 }
907 if (cnt < QETH_CMD_BUFFER_NO) {
908 while (cnt-- > 0)
909 kfree(channel->iob[cnt].data);
910 return -ENOMEM;
911 }
912 channel->buf_no = 0;
913 channel->io_buf_no = 0;
914 atomic_set(&channel->irq_pending, 0);
915 spin_lock_init(&channel->iob_lock);
916
917 init_waitqueue_head(&channel->wait_q);
918 return 0;
919}
920
921static int qeth_set_thread_start_bit(struct qeth_card *card,
922 unsigned long thread)
923{
924 unsigned long flags;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 if (!(card->thread_allowed_mask & thread) ||
928 (card->thread_start_mask & thread)) {
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 return -EPERM;
931 }
932 card->thread_start_mask |= thread;
933 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
934 return 0;
935}
936
937void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
938{
939 unsigned long flags;
940
941 spin_lock_irqsave(&card->thread_mask_lock, flags);
942 card->thread_start_mask &= ~thread;
943 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
944 wake_up(&card->wait_q);
945}
946EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
947
948void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
949{
950 unsigned long flags;
951
952 spin_lock_irqsave(&card->thread_mask_lock, flags);
953 card->thread_running_mask &= ~thread;
954 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
955 wake_up(&card->wait_q);
956}
957EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
958
959static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
960{
961 unsigned long flags;
962 int rc = 0;
963
964 spin_lock_irqsave(&card->thread_mask_lock, flags);
965 if (card->thread_start_mask & thread) {
966 if ((card->thread_allowed_mask & thread) &&
967 !(card->thread_running_mask & thread)) {
968 rc = 1;
969 card->thread_start_mask &= ~thread;
970 card->thread_running_mask |= thread;
971 } else
972 rc = -EPERM;
973 }
974 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
975 return rc;
976}
977
978int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
979{
980 int rc = 0;
981
982 wait_event(card->wait_q,
983 (rc = __qeth_do_run_thread(card, thread)) >= 0);
984 return rc;
985}
986EXPORT_SYMBOL_GPL(qeth_do_run_thread);
987
988void qeth_schedule_recovery(struct qeth_card *card)
989{
847a50fd 990 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 991 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
992 schedule_work(&card->kernel_thread_starter);
993}
994EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
995
996static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
997{
998 int dstat, cstat;
999 char *sense;
847a50fd 1000 struct qeth_card *card;
4a71df50
FB		 1001
1002 sense = (char *) irb->ecw;
23d805b6
PO		 1003 cstat = irb->scsw.cmd.cstat;
1004 dstat = irb->scsw.cmd.dstat;
847a50fd 1005 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1006
1007 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1008 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1009 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1010 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1011 dev_warn(&cdev->dev, "The qeth device driver "
1012 "failed to recover an error on the device\n");
5113fec0 1013 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1014 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1015 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1016 16, 1, irb, 64, 1);
1017 return 1;
1018 }
1019
1020 if (dstat & DEV_STAT_UNIT_CHECK) {
1021 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1022 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1023 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1024 return 1;
1025 }
1026 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1027 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1028 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1029 return 1;
4a71df50
FB		 1030 }
1031 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1032 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1033 return 1;
1034 }
1035 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1036 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1037 return 0;
1038 }
847a50fd 1039 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1040 return 1;
1041 }
1042 return 0;
1043}
1044
1045static long __qeth_check_irb_error(struct ccw_device *cdev,
1046 unsigned long intparm, struct irb *irb)
1047{
847a50fd
CO		 1048 struct qeth_card *card;
1049
1050 card = CARD_FROM_CDEV(cdev);
1051
e95051ff 1052 if (!card || !IS_ERR(irb))
4a71df50
FB		 1053 return 0;
1054
1055 switch (PTR_ERR(irb)) {
1056 case -EIO:
74eacdb9
FB		 1057 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1058 dev_name(&cdev->dev));
847a50fd
CO		 1059 QETH_CARD_TEXT(card, 2, "ckirberr");
1060 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1061 break;
1062 case -ETIMEDOUT:
74eacdb9
FB		 1063 dev_warn(&cdev->dev, "A hardware operation timed out"
1064 " on the device\n");
847a50fd
CO		 1065 QETH_CARD_TEXT(card, 2, "ckirberr");
1066 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1067 if (intparm == QETH_RCD_PARM) {
e95051ff 1068 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1069 card->data.state = CH_STATE_DOWN;
1070 wake_up(&card->wait_q);
1071 }
1072 }
1073 break;
1074 default:
74eacdb9
FB		 1075 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1076 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1077 QETH_CARD_TEXT(card, 2, "ckirberr");
1078 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1079 }
1080 return PTR_ERR(irb);
1081}
1082
1083static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1084 struct irb *irb)
1085{
1086 int rc;
1087 int cstat, dstat;
1088 struct qeth_cmd_buffer *buffer;
1089 struct qeth_channel *channel;
1090 struct qeth_card *card;
1091 struct qeth_cmd_buffer *iob;
1092 __u8 index;
1093
4a71df50
FB		 1094 if (__qeth_check_irb_error(cdev, intparm, irb))
1095 return;
23d805b6
PO		 1096 cstat = irb->scsw.cmd.cstat;
1097 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1098
1099 card = CARD_FROM_CDEV(cdev);
1100 if (!card)
1101 return;
1102
847a50fd
CO		 1103 QETH_CARD_TEXT(card, 5, "irq");
1104
4a71df50
FB		 1105 if (card->read.ccwdev == cdev) {
1106 channel = &card->read;
847a50fd 1107 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1108 } else if (card->write.ccwdev == cdev) {
1109 channel = &card->write;
847a50fd 1110 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1111 } else {
1112 channel = &card->data;
847a50fd 1113 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1114 }
1115 atomic_set(&channel->irq_pending, 0);
1116
23d805b6 1117 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1118 channel->state = CH_STATE_STOPPED;
1119
23d805b6 1120 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1121 channel->state = CH_STATE_HALTED;
1122
1123 /*let's wake up immediately on data channel*/
1124 if ((channel == &card->data) && (intparm != 0) &&
1125 (intparm != QETH_RCD_PARM))
1126 goto out;
1127
1128 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1129 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1130 /* we don't have to handle this further */
1131 intparm = 0;
1132 }
1133 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1134 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1135 /* we don't have to handle this further */
1136 intparm = 0;
1137 }
1138 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1139 (dstat & DEV_STAT_UNIT_CHECK) ||
1140 (cstat)) {
1141 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1142 dev_warn(&channel->ccwdev->dev,
1143 "The qeth device driver failed to recover "
1144 "an error on the device\n");
1145 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1146 "0x%X dstat 0x%X\n",
1147 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1148 print_hex_dump(KERN_WARNING, "qeth: irb ",
1149 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1150 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1151 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1152 }
1153 if (intparm == QETH_RCD_PARM) {
1154 channel->state = CH_STATE_DOWN;
1155 goto out;
1156 }
1157 rc = qeth_get_problem(cdev, irb);
1158 if (rc) {
28a7e4c9 1159 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1160 qeth_schedule_recovery(card);
1161 goto out;
1162 }
1163 }
1164
1165 if (intparm == QETH_RCD_PARM) {
1166 channel->state = CH_STATE_RCD_DONE;
1167 goto out;
1168 }
1169 if (intparm) {
1170 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1171 buffer->state = BUF_STATE_PROCESSED;
1172 }
1173 if (channel == &card->data)
1174 return;
1175 if (channel == &card->read &&
1176 channel->state == CH_STATE_UP)
1177 qeth_issue_next_read(card);
1178
1179 iob = channel->iob;
1180 index = channel->buf_no;
1181 while (iob[index].state == BUF_STATE_PROCESSED) {
1182 if (iob[index].callback != NULL)
1183 iob[index].callback(channel, iob + index);
1184
1185 index = (index + 1) % QETH_CMD_BUFFER_NO;
1186 }
1187 channel->buf_no = index;
1188out:
1189 wake_up(&card->wait_q);
1190 return;
1191}
1192
b3332930 1193static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1194 struct qeth_qdio_out_buffer *buf,
b3332930 1195 enum iucv_tx_notify notification)
4a71df50 1196{
4a71df50
FB		 1197 struct sk_buff *skb;
1198
b3332930
FB		 1199 if (skb_queue_empty(&buf->skb_list))
1200 goto out;
1201 skb = skb_peek(&buf->skb_list);
1202 while (skb) {
1203 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1204 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1205 if (skb->protocol == ETH_P_AF_IUCV) {
1206 if (skb->sk) {
1207 struct iucv_sock *iucv = iucv_sk(skb->sk);
1208 iucv->sk_txnotify(skb, notification);
1209 }
1210 }
1211 if (skb_queue_is_last(&buf->skb_list, skb))
1212 skb = NULL;
1213 else
1214 skb = skb_queue_next(&buf->skb_list, skb);
1215 }
1216out:
1217 return;
1218}
1219
1220static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1221{
1222 struct sk_buff *skb;
72861ae7
EL		 1223 struct iucv_sock *iucv;
1224 int notify_general_error = 0;
1225
1226 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1227 notify_general_error = 1;
1228
1229 /* release may never happen from within CQ tasklet scope */
18af5c17 1230 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1231
b67d801f
UB		 1232 skb = skb_dequeue(&buf->skb_list);
1233 while (skb) {
b3332930
FB		 1234 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1235 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1236 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1237 if (skb->sk) {
1238 iucv = iucv_sk(skb->sk);
1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1240 }
1241 }
b67d801f
UB		 1242 atomic_dec(&skb->users);
1243 dev_kfree_skb_any(skb);
4a71df50
FB		 1244 skb = skb_dequeue(&buf->skb_list);
1245 }
b3332930
FB		 1246}
1247
1248static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1249 struct qeth_qdio_out_buffer *buf,
1250 enum qeth_qdio_buffer_states newbufstate)
1251{
1252 int i;
1253
1254 /* is PCI flag set on buffer? */
1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1256 atomic_dec(&queue->set_pci_flags_count);
1257
1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1259 qeth_release_skbs(buf);
1260 }
4a71df50 1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1262 if (buf->buffer->element[i].addr && buf->is_header[i])
1263 kmem_cache_free(qeth_core_header_cache,
1264 buf->buffer->element[i].addr);
1265 buf->is_header[i] = 0;
4a71df50
FB		 1266 buf->buffer->element[i].length = 0;
1267 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1268 buf->buffer->element[i].eflags = 0;
1269 buf->buffer->element[i].sflags = 0;
4a71df50 1270 }
3ec90878
JG		 1271 buf->buffer->element[15].eflags = 0;
1272 buf->buffer->element[15].sflags = 0;
4a71df50 1273 buf->next_element_to_fill = 0;
0da9581d
EL		 1274 atomic_set(&buf->state, newbufstate);
1275}
1276
1277static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1278{
1279 int j;
1280
1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1282 if (!q->bufs[j])
1283 continue;
72861ae7 1284 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1286 if (free) {
1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1288 q->bufs[j] = NULL;
1289 }
1290 }
4a71df50
FB		 1291}
1292
1293void qeth_clear_qdio_buffers(struct qeth_card *card)
1294{
0da9581d 1295 int i;
4a71df50 1296
847a50fd 1297 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1298 /* clear outbound buffers to free skbs */
0da9581d 1299 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1300 if (card->qdio.out_qs[i]) {
0da9581d 1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1302 }
0da9581d 1303 }
4a71df50
FB		 1304}
1305EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1306
1307static void qeth_free_buffer_pool(struct qeth_card *card)
1308{
1309 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1310 int i = 0;
4a71df50
FB		 1311 list_for_each_entry_safe(pool_entry, tmp,
1312 &card->qdio.init_pool.entry_list, init_list){
1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1314 free_page((unsigned long)pool_entry->elements[i]);
1315 list_del(&pool_entry->init_list);
1316 kfree(pool_entry);
1317 }
1318}
1319
4a71df50
FB		 1320static void qeth_clean_channel(struct qeth_channel *channel)
1321{
1322 int cnt;
1323
d11ba0c4 1324 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1326 kfree(channel->iob[cnt].data);
1327}
1328
725b9c04
SO		 1329static void qeth_set_single_write_queues(struct qeth_card *card)
1330{
1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1332 (card->qdio.no_out_queues == 4))
1333 qeth_free_qdio_buffers(card);
1334
1335 card->qdio.no_out_queues = 1;
1336 if (card->qdio.default_out_queue != 0)
1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1338
1339 card->qdio.default_out_queue = 0;
1340}
1341
1342static void qeth_set_multiple_write_queues(struct qeth_card *card)
1343{
1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1345 (card->qdio.no_out_queues == 1)) {
1346 qeth_free_qdio_buffers(card);
1347 card->qdio.default_out_queue = 2;
1348 }
1349 card->qdio.no_out_queues = 4;
1350}
1351
1352static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1353{
4a71df50 1354 struct ccw_device *ccwdev;
2bf29df7 1355 struct channel_path_desc *chp_dsc;
4a71df50 1356
5113fec0 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1358
1359 ccwdev = card->data.ccwdev;
725b9c04
SO		 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368 /* CHPP field bit 6 == 1 -> single queue */
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
5113fec0
UB		 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
d11ba0c4 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383 /* inbound */
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1398 card->options.fake_broadcast = 0;
1399 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1400 card->options.performance_stats = 0;
1401 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1402 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1403 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1404}
1405
1406static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1407{
1408 unsigned long flags;
1409 int rc = 0;
1410
1411 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1412 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1413 (u8) card->thread_start_mask,
1414 (u8) card->thread_allowed_mask,
1415 (u8) card->thread_running_mask);
1416 rc = (card->thread_start_mask & thread);
1417 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1418 return rc;
1419}
1420
1421static void qeth_start_kernel_thread(struct work_struct *work)
1422{
3f36b890 1423 struct task_struct *ts;
4a71df50
FB		 1424 struct qeth_card *card = container_of(work, struct qeth_card,
1425 kernel_thread_starter);
847a50fd 1426 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1427
1428 if (card->read.state != CH_STATE_UP &&
1429 card->write.state != CH_STATE_UP)
1430 return;
3f36b890 1431 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1432 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1433 "qeth_recover");
3f36b890
FB		 1434 if (IS_ERR(ts)) {
1435 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1436 qeth_clear_thread_running_bit(card,
1437 QETH_RECOVER_THREAD);
1438 }
1439 }
4a71df50
FB		 1440}
1441
bca51650 1442static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1443static int qeth_setup_card(struct qeth_card *card)
1444{
1445
d11ba0c4
PT		 1446 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1447 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1448
1449 card->read.state = CH_STATE_DOWN;
1450 card->write.state = CH_STATE_DOWN;
1451 card->data.state = CH_STATE_DOWN;
1452 card->state = CARD_STATE_DOWN;
1453 card->lan_online = 0;
908abbb5 1454 card->read_or_write_problem = 0;
4a71df50
FB		 1455 card->dev = NULL;
1456 spin_lock_init(&card->vlanlock);
1457 spin_lock_init(&card->mclock);
4a71df50
FB		 1458 spin_lock_init(&card->lock);
1459 spin_lock_init(&card->ip_lock);
1460 spin_lock_init(&card->thread_mask_lock);
c4949f07 1461 mutex_init(&card->conf_mutex);
9dc48ccc 1462 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1463 card->thread_start_mask = 0;
1464 card->thread_allowed_mask = 0;
1465 card->thread_running_mask = 0;
1466 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1467 INIT_LIST_HEAD(&card->cmd_waiter_list);
1468 init_waitqueue_head(&card->wait_q);
25985edc 1469 /* initial options */
4a71df50
FB		 1470 qeth_set_intial_options(card);
1471 /* IP address takeover */
1472 INIT_LIST_HEAD(&card->ipato.entries);
1473 card->ipato.enabled = 0;
1474 card->ipato.invert4 = 0;
1475 card->ipato.invert6 = 0;
1476 /* init QDIO stuff */
1477 qeth_init_qdio_info(card);
b3332930 1478 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1479 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1480 return 0;
1481}
1482
6bcac508
MS		 1483static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1484{
1485 struct qeth_card *card = container_of(slr, struct qeth_card,
1486 qeth_service_level);
0d788c7d
KDW		 1487 if (card->info.mcl_level[0])
1488 seq_printf(m, "qeth: %s firmware level %s\n",
1489 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1490}
1491
4a71df50
FB		 1492static struct qeth_card *qeth_alloc_card(void)
1493{
1494 struct qeth_card *card;
1495
d11ba0c4 1496 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1497 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1498 if (!card)
76b11f8e 1499 goto out;
d11ba0c4 1500 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1501 if (qeth_setup_channel(&card->read))
1502 goto out_ip;
1503 if (qeth_setup_channel(&card->write))
1504 goto out_channel;
4a71df50 1505 card->options.layer2 = -1;
6bcac508
MS		 1506 card->qeth_service_level.seq_print = qeth_core_sl_print;
1507 register_service_level(&card->qeth_service_level);
4a71df50 1508 return card;
76b11f8e
UB		 1509
1510out_channel:
1511 qeth_clean_channel(&card->read);
1512out_ip:
76b11f8e
UB		 1513 kfree(card);
1514out:
1515 return NULL;
4a71df50
FB		 1516}
1517
1518static int qeth_determine_card_type(struct qeth_card *card)
1519{
1520 int i = 0;
1521
d11ba0c4 1522 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1523
1524 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1525 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1526 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1527 if ((CARD_RDEV(card)->id.dev_type ==
1528 known_devices[i][QETH_DEV_TYPE_IND]) &&
1529 (CARD_RDEV(card)->id.dev_model ==
1530 known_devices[i][QETH_DEV_MODEL_IND])) {
1531 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1532 card->qdio.no_out_queues =
1533 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1534 card->qdio.no_in_queues = 1;
5113fec0
UB		 1535 card->info.is_multicast_different =
1536 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1537 qeth_update_from_chp_desc(card);
4a71df50
FB		 1538 return 0;
1539 }
1540 i++;
1541 }
1542 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1543 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1544 "unknown type\n");
4a71df50
FB		 1545 return -ENOENT;
1546}
1547
1548static int qeth_clear_channel(struct qeth_channel *channel)
1549{
1550 unsigned long flags;
1551 struct qeth_card *card;
1552 int rc;
1553
4a71df50 1554 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1555 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1556 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1557 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1558 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1559
1560 if (rc)
1561 return rc;
1562 rc = wait_event_interruptible_timeout(card->wait_q,
1563 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1564 if (rc == -ERESTARTSYS)
1565 return rc;
1566 if (channel->state != CH_STATE_STOPPED)
1567 return -ETIME;
1568 channel->state = CH_STATE_DOWN;
1569 return 0;
1570}
1571
1572static int qeth_halt_channel(struct qeth_channel *channel)
1573{
1574 unsigned long flags;
1575 struct qeth_card *card;
1576 int rc;
1577
4a71df50 1578 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1579 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1580 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1581 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1582 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1583
1584 if (rc)
1585 return rc;
1586 rc = wait_event_interruptible_timeout(card->wait_q,
1587 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1588 if (rc == -ERESTARTSYS)
1589 return rc;
1590 if (channel->state != CH_STATE_HALTED)
1591 return -ETIME;
1592 return 0;
1593}
1594
1595static int qeth_halt_channels(struct qeth_card *card)
1596{
1597 int rc1 = 0, rc2 = 0, rc3 = 0;
1598
847a50fd 1599 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1600 rc1 = qeth_halt_channel(&card->read);
1601 rc2 = qeth_halt_channel(&card->write);
1602 rc3 = qeth_halt_channel(&card->data);
1603 if (rc1)
1604 return rc1;
1605 if (rc2)
1606 return rc2;
1607 return rc3;
1608}
1609
1610static int qeth_clear_channels(struct qeth_card *card)
1611{
1612 int rc1 = 0, rc2 = 0, rc3 = 0;
1613
847a50fd 1614 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1615 rc1 = qeth_clear_channel(&card->read);
1616 rc2 = qeth_clear_channel(&card->write);
1617 rc3 = qeth_clear_channel(&card->data);
1618 if (rc1)
1619 return rc1;
1620 if (rc2)
1621 return rc2;
1622 return rc3;
1623}
1624
1625static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1626{
1627 int rc = 0;
1628
847a50fd 1629 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1630
1631 if (halt)
1632 rc = qeth_halt_channels(card);
1633 if (rc)
1634 return rc;
1635 return qeth_clear_channels(card);
1636}
1637
1638int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1639{
1640 int rc = 0;
1641
847a50fd 1642 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1643 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1644 QETH_QDIO_CLEANING)) {
1645 case QETH_QDIO_ESTABLISHED:
1646 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1647 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1648 QDIO_FLAG_CLEANUP_USING_HALT);
1649 else
cc961d40 1650 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1651 QDIO_FLAG_CLEANUP_USING_CLEAR);
1652 if (rc)
847a50fd 1653 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1654 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1655 break;
1656 case QETH_QDIO_CLEANING:
1657 return rc;
1658 default:
1659 break;
1660 }
1661 rc = qeth_clear_halt_card(card, use_halt);
1662 if (rc)
847a50fd 1663 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1664 card->state = CARD_STATE_DOWN;
1665 return rc;
1666}
1667EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1668
1669static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1670 int *length)
1671{
1672 struct ciw *ciw;
1673 char *rcd_buf;
1674 int ret;
1675 struct qeth_channel *channel = &card->data;
1676 unsigned long flags;
1677
1678 /*
1679 * scan for RCD command in extended SenseID data
1680 */
1681 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1682 if (!ciw || ciw->cmd == 0)
1683 return -EOPNOTSUPP;
1684 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1685 if (!rcd_buf)
1686 return -ENOMEM;
1687
1688 channel->ccw.cmd_code = ciw->cmd;
1689 channel->ccw.cda = (__u32) __pa(rcd_buf);
1690 channel->ccw.count = ciw->count;
1691 channel->ccw.flags = CCW_FLAG_SLI;
1692 channel->state = CH_STATE_RCD;
1693 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1694 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1695 QETH_RCD_PARM, LPM_ANYPATH, 0,
1696 QETH_RCD_TIMEOUT);
1697 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1698 if (!ret)
1699 wait_event(card->wait_q,
1700 (channel->state == CH_STATE_RCD_DONE ||
1701 channel->state == CH_STATE_DOWN));
1702 if (channel->state == CH_STATE_DOWN)
1703 ret = -EIO;
1704 else
1705 channel->state = CH_STATE_DOWN;
1706 if (ret) {
1707 kfree(rcd_buf);
1708 *buffer = NULL;
1709 *length = 0;
1710 } else {
1711 *length = ciw->count;
1712 *buffer = rcd_buf;
1713 }
1714 return ret;
1715}
1716
a60389ab 1717static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1718{
a60389ab 1719 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1720 card->info.chpid = prcd[30];
1721 card->info.unit_addr2 = prcd[31];
1722 card->info.cula = prcd[63];
1723 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1724 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1725}
1726
1727static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1728{
1729 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1730
e6e056ba 1731 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1732 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1733 card->info.blkt.time_total = 0;
1734 card->info.blkt.inter_packet = 0;
1735 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1736 } else {
1737 card->info.blkt.time_total = 250;
1738 card->info.blkt.inter_packet = 5;
1739 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1740 }
4a71df50
FB		 1741}
1742
1743static void qeth_init_tokens(struct qeth_card *card)
1744{
1745 card->token.issuer_rm_w = 0x00010103UL;
1746 card->token.cm_filter_w = 0x00010108UL;
1747 card->token.cm_connection_w = 0x0001010aUL;
1748 card->token.ulp_filter_w = 0x0001010bUL;
1749 card->token.ulp_connection_w = 0x0001010dUL;
1750}
1751
1752static void qeth_init_func_level(struct qeth_card *card)
1753{
5113fec0
UB		 1754 switch (card->info.type) {
1755 case QETH_CARD_TYPE_IQD:
6298263a 1756 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1757 break;
1758 case QETH_CARD_TYPE_OSD:
0132951e 1759 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1760 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1761 break;
1762 default:
1763 break;
4a71df50
FB		 1764 }
1765}
1766
4a71df50
FB		 1767static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1768 void (*idx_reply_cb)(struct qeth_channel *,
1769 struct qeth_cmd_buffer *))
1770{
1771 struct qeth_cmd_buffer *iob;
1772 unsigned long flags;
1773 int rc;
1774 struct qeth_card *card;
1775
d11ba0c4 1776 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1777 card = CARD_FROM_CDEV(channel->ccwdev);
1778 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1779 if (!iob)
1780 return -ENOMEM;
4a71df50
FB		 1781 iob->callback = idx_reply_cb;
1782 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1783 channel->ccw.count = QETH_BUFSIZE;
1784 channel->ccw.cda = (__u32) __pa(iob->data);
1785
1786 wait_event(card->wait_q,
1787 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1788 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1789 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1790 rc = ccw_device_start(channel->ccwdev,
1791 &channel->ccw, (addr_t) iob, 0, 0);
1792 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1793
1794 if (rc) {
14cc21b6 1795 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1796 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1797 atomic_set(&channel->irq_pending, 0);
1798 wake_up(&card->wait_q);
1799 return rc;
1800 }
1801 rc = wait_event_interruptible_timeout(card->wait_q,
1802 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1803 if (rc == -ERESTARTSYS)
1804 return rc;
1805 if (channel->state != CH_STATE_UP) {
1806 rc = -ETIME;
d11ba0c4 1807 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1808 qeth_clear_cmd_buffers(channel);
1809 } else
1810 rc = 0;
1811 return rc;
1812}
1813
1814static int qeth_idx_activate_channel(struct qeth_channel *channel,
1815 void (*idx_reply_cb)(struct qeth_channel *,
1816 struct qeth_cmd_buffer *))
1817{
1818 struct qeth_card *card;
1819 struct qeth_cmd_buffer *iob;
1820 unsigned long flags;
1821 __u16 temp;
1822 __u8 tmp;
1823 int rc;
f06f6f32 1824 struct ccw_dev_id temp_devid;
4a71df50
FB		 1825
1826 card = CARD_FROM_CDEV(channel->ccwdev);
1827
d11ba0c4 1828 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1829
1830 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1831 if (!iob)
1832 return -ENOMEM;
4a71df50
FB		 1833 iob->callback = idx_reply_cb;
1834 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1835 channel->ccw.count = IDX_ACTIVATE_SIZE;
1836 channel->ccw.cda = (__u32) __pa(iob->data);
1837 if (channel == &card->write) {
1838 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1839 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1840 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1841 card->seqno.trans_hdr++;
1842 } else {
1843 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1844 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1845 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1846 }
1847 tmp = ((__u8)card->info.portno) | 0x80;
1848 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1849 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1850 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1851 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1852 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1853 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1854 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1855 temp = (card->info.cula << 8) + card->info.unit_addr2;
1856 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1857
1858 wait_event(card->wait_q,
1859 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1860 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1861 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1862 rc = ccw_device_start(channel->ccwdev,
1863 &channel->ccw, (addr_t) iob, 0, 0);
1864 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1865
1866 if (rc) {
14cc21b6
FB		 1867 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1868 rc);
d11ba0c4 1869 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1870 atomic_set(&channel->irq_pending, 0);
1871 wake_up(&card->wait_q);
1872 return rc;
1873 }
1874 rc = wait_event_interruptible_timeout(card->wait_q,
1875 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1876 if (rc == -ERESTARTSYS)
1877 return rc;
1878 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1879 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1880 " failed to recover an error on the device\n");
1881 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1882 dev_name(&channel->ccwdev->dev));
d11ba0c4 1883 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1884 qeth_clear_cmd_buffers(channel);
1885 return -ETIME;
1886 }
1887 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1888}
1889
1890static int qeth_peer_func_level(int level)
1891{
1892 if ((level & 0xff) == 8)
1893 return (level & 0xff) + 0x400;
1894 if (((level >> 8) & 3) == 1)
1895 return (level & 0xff) + 0x200;
1896 return level;
1897}
1898
1899static void qeth_idx_write_cb(struct qeth_channel *channel,
1900 struct qeth_cmd_buffer *iob)
1901{
1902 struct qeth_card *card;
1903 __u16 temp;
1904
d11ba0c4 1905 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1906
1907 if (channel->state == CH_STATE_DOWN) {
1908 channel->state = CH_STATE_ACTIVATING;
1909 goto out;
1910 }
1911 card = CARD_FROM_CDEV(channel->ccwdev);
1912
1913 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1914 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1915 dev_err(&card->write.ccwdev->dev,
1916 "The adapter is used exclusively by another "
1917 "host\n");
4a71df50 1918 else
74eacdb9
FB		 1919 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1920 " negative reply\n",
1921 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1922 goto out;
1923 }
1924 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1925 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1926 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1927 "function level mismatch (sent: 0x%x, received: "
1928 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1929 card->info.func_level, temp);
4a71df50
FB		 1930 goto out;
1931 }
1932 channel->state = CH_STATE_UP;
1933out:
1934 qeth_release_buffer(channel, iob);
1935}
1936
1937static void qeth_idx_read_cb(struct qeth_channel *channel,
1938 struct qeth_cmd_buffer *iob)
1939{
1940 struct qeth_card *card;
1941 __u16 temp;
1942
d11ba0c4 1943 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1944 if (channel->state == CH_STATE_DOWN) {
1945 channel->state = CH_STATE_ACTIVATING;
1946 goto out;
1947 }
1948
1949 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1950 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1951 goto out;
1952
1953 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1954 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1955 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1956 dev_err(&card->write.ccwdev->dev,
1957 "The adapter is used exclusively by another "
1958 "host\n");
5113fec0
UB		 1959 break;
1960 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1961 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1962 dev_err(&card->read.ccwdev->dev,
1963 "Setting the device online failed because of "
01fc3e86 1964 "insufficient authorization\n");
5113fec0
UB		 1965 break;
1966 default:
74eacdb9
FB		 1967 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1968 " negative reply\n",
1969 dev_name(&card->read.ccwdev->dev));
5113fec0 1970 }
01fc3e86
UB		 1971 QETH_CARD_TEXT_(card, 2, "idxread%c",
1972 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1973 goto out;
1974 }
1975
4a71df50
FB		 1976 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1977 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1978 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1979 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1980 dev_name(&card->read.ccwdev->dev),
1981 card->info.func_level, temp);
4a71df50
FB		 1982 goto out;
1983 }
1984 memcpy(&card->token.issuer_rm_r,
1985 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1986 QETH_MPC_TOKEN_LENGTH);
1987 memcpy(&card->info.mcl_level[0],
1988 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1989 channel->state = CH_STATE_UP;
1990out:
1991 qeth_release_buffer(channel, iob);
1992}
1993
1994void qeth_prepare_control_data(struct qeth_card *card, int len,
1995 struct qeth_cmd_buffer *iob)
1996{
1997 qeth_setup_ccw(&card->write, iob->data, len);
1998 iob->callback = qeth_release_buffer;
1999
2000 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2001 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2002 card->seqno.trans_hdr++;
2003 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2004 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2005 card->seqno.pdu_hdr++;
2006 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2007 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2008 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2009}
2010EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2011
efbbc1d5
EC		 2012/**
2013 * qeth_send_control_data() - send control command to the card
2014 * @card: qeth_card structure pointer
2015 * @len: size of the command buffer
2016 * @iob: qeth_cmd_buffer pointer
2017 * @reply_cb: callback function pointer
2018 * @cb_card: pointer to the qeth_card structure
2019 * @cb_reply: pointer to the qeth_reply structure
2020 * @cb_cmd: pointer to the original iob for non-IPA
2021 * commands, or to the qeth_ipa_cmd structure
2022 * for the IPA commands.
2023 * @reply_param: private pointer passed to the callback
2024 *
2025 * Returns the value of the `return_code' field of the response
2026 * block returned from the hardware, or other error indication.
2027 * Value of zero indicates successful execution of the command.
2028 *
2029 * Callback function gets called one or more times, with cb_cmd
2030 * pointing to the response returned by the hardware. Callback
2031 * function must return non-zero if more reply blocks are expected,
2032 * and zero if the last or only reply block is received. Callback
2033 * function can get the value of the reply_param pointer from the
2034 * field 'param' of the structure qeth_reply.
2035 */
2036
4a71df50
FB		 2037int qeth_send_control_data(struct qeth_card *card, int len,
2038 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2039 int (*reply_cb)(struct qeth_card *cb_card,
2040 struct qeth_reply *cb_reply,
2041 unsigned long cb_cmd),
4a71df50
FB		 2042 void *reply_param)
2043{
2044 int rc;
2045 unsigned long flags;
2046 struct qeth_reply *reply = NULL;
7834cd5a 2047 unsigned long timeout, event_timeout;
5b54e16f 2048 struct qeth_ipa_cmd *cmd;
4a71df50 2049
847a50fd 2050 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2051
908abbb5
UB		 2052 if (card->read_or_write_problem) {
2053 qeth_release_buffer(iob->channel, iob);
2054 return -EIO;
2055 }
4a71df50
FB		 2056 reply = qeth_alloc_reply(card);
2057 if (!reply) {
4a71df50
FB		 2058 return -ENOMEM;
2059 }
2060 reply->callback = reply_cb;
2061 reply->param = reply_param;
2062 if (card->state == CARD_STATE_DOWN)
2063 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2064 else
2065 reply->seqno = card->seqno.ipa++;
2066 init_waitqueue_head(&reply->wait_q);
2067 spin_lock_irqsave(&card->lock, flags);
2068 list_add_tail(&reply->list, &card->cmd_waiter_list);
2069 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2070 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2071
2072 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2073 qeth_prepare_control_data(card, len, iob);
2074
2075 if (IS_IPA(iob->data))
7834cd5a 2076 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2077 else
7834cd5a
HC		 2078 event_timeout = QETH_TIMEOUT;
2079 timeout = jiffies + event_timeout;
4a71df50 2080
847a50fd 2081 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2082 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2083 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2084 (addr_t) iob, 0, 0);
2085 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2086 if (rc) {
74eacdb9
FB		 2087 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2088 "ccw_device_start rc = %i\n",
2089 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2090 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2091 spin_lock_irqsave(&card->lock, flags);
2092 list_del_init(&reply->list);
2093 qeth_put_reply(reply);
2094 spin_unlock_irqrestore(&card->lock, flags);
2095 qeth_release_buffer(iob->channel, iob);
2096 atomic_set(&card->write.irq_pending, 0);
2097 wake_up(&card->wait_q);
2098 return rc;
2099 }
5b54e16f
FB		 2100
2101 /* we have only one long running ipassist, since we can ensure
2102 process context of this command we can sleep */
2103 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2104 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2105 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2106 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2107 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2108 goto time_err;
2109 } else {
2110 while (!atomic_read(&reply->received)) {
2111 if (time_after(jiffies, timeout))
2112 goto time_err;
2113 cpu_relax();
6531084c 2114 }
5b54e16f
FB		 2115 }
2116
70919e23
UB		 2117 if (reply->rc == -EIO)
2118 goto error;
5b54e16f
FB		 2119 rc = reply->rc;
2120 qeth_put_reply(reply);
2121 return rc;
2122
2123time_err:
70919e23 2124 reply->rc = -ETIME;
5b54e16f
FB		 2125 spin_lock_irqsave(&reply->card->lock, flags);
2126 list_del_init(&reply->list);
2127 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2128 atomic_inc(&reply->received);
70919e23 2129error:
908abbb5
UB		 2130 atomic_set(&card->write.irq_pending, 0);
2131 qeth_release_buffer(iob->channel, iob);
2132 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2133 rc = reply->rc;
2134 qeth_put_reply(reply);
2135 return rc;
2136}
2137EXPORT_SYMBOL_GPL(qeth_send_control_data);
2138
2139static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2140 unsigned long data)
2141{
2142 struct qeth_cmd_buffer *iob;
2143
d11ba0c4 2144 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2145
2146 iob = (struct qeth_cmd_buffer *) data;
2147 memcpy(&card->token.cm_filter_r,
2148 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2149 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2150 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2151 return 0;
2152}
2153
2154static int qeth_cm_enable(struct qeth_card *card)
2155{
2156 int rc;
2157 struct qeth_cmd_buffer *iob;
2158
d11ba0c4 2159 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2160
2161 iob = qeth_wait_for_buffer(&card->write);
2162 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2163 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2164 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2165 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2166 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2167
2168 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2169 qeth_cm_enable_cb, NULL);
2170 return rc;
2171}
2172
2173static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2174 unsigned long data)
2175{
2176
2177 struct qeth_cmd_buffer *iob;
2178
d11ba0c4 2179 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2180
2181 iob = (struct qeth_cmd_buffer *) data;
2182 memcpy(&card->token.cm_connection_r,
2183 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2184 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2185 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2186 return 0;
2187}
2188
2189static int qeth_cm_setup(struct qeth_card *card)
2190{
2191 int rc;
2192 struct qeth_cmd_buffer *iob;
2193
d11ba0c4 2194 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2195
2196 iob = qeth_wait_for_buffer(&card->write);
2197 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2198 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2199 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2200 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2201 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2202 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2203 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2204 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2205 qeth_cm_setup_cb, NULL);
2206 return rc;
2207
2208}
2209
2210static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2211{
2212 switch (card->info.type) {
2213 case QETH_CARD_TYPE_UNKNOWN:
2214 return 1500;
2215 case QETH_CARD_TYPE_IQD:
2216 return card->info.max_mtu;
5113fec0 2217 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2218 switch (card->info.link_type) {
2219 case QETH_LINK_TYPE_HSTR:
2220 case QETH_LINK_TYPE_LANE_TR:
2221 return 2000;
2222 default:
fe44014a 2223 return card->options.layer2 ? 1500 : 1492;
4a71df50 2224 }
5113fec0
UB		 2225 case QETH_CARD_TYPE_OSM:
2226 case QETH_CARD_TYPE_OSX:
fe44014a 2227 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2228 default:
2229 return 1500;
2230 }
2231}
2232
4a71df50
FB		 2233static inline int qeth_get_mtu_outof_framesize(int framesize)
2234{
2235 switch (framesize) {
2236 case 0x4000:
2237 return 8192;
2238 case 0x6000:
2239 return 16384;
2240 case 0xa000:
2241 return 32768;
2242 case 0xffff:
2243 return 57344;
2244 default:
2245 return 0;
2246 }
2247}
2248
2249static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2250{
2251 switch (card->info.type) {
5113fec0
UB		 2252 case QETH_CARD_TYPE_OSD:
2253 case QETH_CARD_TYPE_OSM:
2254 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2255 case QETH_CARD_TYPE_IQD:
2256 return ((mtu >= 576) &&
9853b97b 2257 (mtu <= card->info.max_mtu));
4a71df50
FB		 2258 case QETH_CARD_TYPE_OSN:
2259 case QETH_CARD_TYPE_UNKNOWN:
2260 default:
2261 return 1;
2262 }
2263}
2264
2265static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2266 unsigned long data)
2267{
2268
2269 __u16 mtu, framesize;
2270 __u16 len;
2271 __u8 link_type;
2272 struct qeth_cmd_buffer *iob;
2273
d11ba0c4 2274 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2275
2276 iob = (struct qeth_cmd_buffer *) data;
2277 memcpy(&card->token.ulp_filter_r,
2278 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2279 QETH_MPC_TOKEN_LENGTH);
9853b97b 2280 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2281 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2282 mtu = qeth_get_mtu_outof_framesize(framesize);
2283 if (!mtu) {
2284 iob->rc = -EINVAL;
d11ba0c4 2285 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2286 return 0;
2287 }
8b2e18f6
UB		 2288 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2289 /* frame size has changed */
2290 if (card->dev &&
2291 ((card->dev->mtu == card->info.initial_mtu) ||
2292 (card->dev->mtu > mtu)))
2293 card->dev->mtu = mtu;
2294 qeth_free_qdio_buffers(card);
2295 }
4a71df50 2296 card->info.initial_mtu = mtu;
8b2e18f6 2297 card->info.max_mtu = mtu;
4a71df50
FB		 2298 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2299 } else {
9853b97b
FB		 2300 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2301 iob->data);
fe44014a
SR		 2302 card->info.initial_mtu = min(card->info.max_mtu,
2303 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2304 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2305 }
2306
2307 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2308 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2309 memcpy(&link_type,
2310 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2311 card->info.link_type = link_type;
2312 } else
2313 card->info.link_type = 0;
01fc3e86 2314 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2315 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2316 return 0;
2317}
2318
2319static int qeth_ulp_enable(struct qeth_card *card)
2320{
2321 int rc;
2322 char prot_type;
2323 struct qeth_cmd_buffer *iob;
2324
2325 /*FIXME: trace view callbacks*/
d11ba0c4 2326 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2327
2328 iob = qeth_wait_for_buffer(&card->write);
2329 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2330
2331 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2332 (__u8) card->info.portno;
2333 if (card->options.layer2)
2334 if (card->info.type == QETH_CARD_TYPE_OSN)
2335 prot_type = QETH_PROT_OSN2;
2336 else
2337 prot_type = QETH_PROT_LAYER2;
2338 else
2339 prot_type = QETH_PROT_TCPIP;
2340
2341 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2342 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2343 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2344 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2345 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2346 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2347 qeth_ulp_enable_cb, NULL);
2348 return rc;
2349
2350}
2351
2352static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2353 unsigned long data)
2354{
2355 struct qeth_cmd_buffer *iob;
2356
d11ba0c4 2357 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2358
2359 iob = (struct qeth_cmd_buffer *) data;
2360 memcpy(&card->token.ulp_connection_r,
2361 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2362 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2363 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2364 3)) {
2365 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2366 dev_err(&card->gdev->dev, "A connection could not be "
2367 "established because of an OLM limit\n");
bbb822a8 2368 iob->rc = -EMLINK;
65a1f898 2369 }
d11ba0c4 2370 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2371 return 0;
4a71df50
FB		 2372}
2373
2374static int qeth_ulp_setup(struct qeth_card *card)
2375{
2376 int rc;
2377 __u16 temp;
2378 struct qeth_cmd_buffer *iob;
2379 struct ccw_dev_id dev_id;
2380
d11ba0c4 2381 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2382
2383 iob = qeth_wait_for_buffer(&card->write);
2384 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2385
2386 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2387 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2388 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2389 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2390 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2391 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2392
2393 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2394 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2395 temp = (card->info.cula << 8) + card->info.unit_addr2;
2396 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2397 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2398 qeth_ulp_setup_cb, NULL);
2399 return rc;
2400}
2401
0da9581d
EL		 2402static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2403{
2404 int rc;
2405 struct qeth_qdio_out_buffer *newbuf;
2406
2407 rc = 0;
2408 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2409 if (!newbuf) {
2410 rc = -ENOMEM;
2411 goto out;
2412 }
d445a4e2 2413 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2414 skb_queue_head_init(&newbuf->skb_list);
2415 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2416 newbuf->q = q;
2417 newbuf->aob = NULL;
2418 newbuf->next_pending = q->bufs[bidx];
2419 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2420 q->bufs[bidx] = newbuf;
2421 if (q->bufstates) {
2422 q->bufstates[bidx].user = newbuf;
2423 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2424 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2425 QETH_CARD_TEXT_(q->card, 2, "%lx",
2426 (long) newbuf->next_pending);
2427 }
2428out:
2429 return rc;
2430}
2431
d445a4e2
SO		 2432static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2433{
2434 if (!q)
2435 return;
2436
2437 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2438 kfree(q);
2439}
2440
2441static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2442{
2443 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2444
2445 if (!q)
2446 return NULL;
2447
2448 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2449 kfree(q);
2450 return NULL;
2451 }
2452 return q;
2453}
0da9581d 2454
4a71df50
FB		 2455static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2456{
2457 int i, j;
2458
d11ba0c4 2459 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2460
2461 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2462 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2463 return 0;
2464
4601ba6c
SO		 2465 QETH_DBF_TEXT(SETUP, 2, "inq");
2466 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2467 if (!card->qdio.in_q)
2468 goto out_nomem;
4601ba6c 2469
4a71df50
FB		 2470 /* inbound buffer pool */
2471 if (qeth_alloc_buffer_pool(card))
2472 goto out_freeinq;
0da9581d 2473
4a71df50
FB		 2474 /* outbound */
2475 card->qdio.out_qs =
b3332930 2476 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2477 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2478 if (!card->qdio.out_qs)
2479 goto out_freepool;
2480 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2481 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2482 if (!card->qdio.out_qs[i])
2483 goto out_freeoutq;
d11ba0c4
PT		 2484 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2485 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2486 card->qdio.out_qs[i]->queue_no = i;
2487 /* give outbound qeth_qdio_buffers their qdio_buffers */
2488 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2489 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2490 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2491 goto out_freeoutqbufs;
4a71df50
FB		 2492 }
2493 }
0da9581d
EL		 2494
2495 /* completion */
2496 if (qeth_alloc_cq(card))
2497 goto out_freeoutq;
2498
4a71df50
FB		 2499 return 0;
2500
0da9581d
EL		 2501out_freeoutqbufs:
2502 while (j > 0) {
2503 --j;
2504 kmem_cache_free(qeth_qdio_outbuf_cache,
2505 card->qdio.out_qs[i]->bufs[j]);
2506 card->qdio.out_qs[i]->bufs[j] = NULL;
2507 }
4a71df50 2508out_freeoutq:
0da9581d 2509 while (i > 0) {
d445a4e2 2510 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2511 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2512 }
4a71df50
FB		 2513 kfree(card->qdio.out_qs);
2514 card->qdio.out_qs = NULL;
2515out_freepool:
2516 qeth_free_buffer_pool(card);
2517out_freeinq:
4601ba6c 2518 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2519 card->qdio.in_q = NULL;
2520out_nomem:
2521 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2522 return -ENOMEM;
2523}
2524
d445a4e2
SO		 2525static void qeth_free_qdio_buffers(struct qeth_card *card)
2526{
2527 int i, j;
2528
2529 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2530 QETH_QDIO_UNINITIALIZED)
2531 return;
2532
2533 qeth_free_cq(card);
2534 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2535 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2536 if (card->qdio.in_q->bufs[j].rx_skb)
2537 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2538 }
2539 qeth_free_qdio_queue(card->qdio.in_q);
2540 card->qdio.in_q = NULL;
2541 /* inbound buffer pool */
2542 qeth_free_buffer_pool(card);
2543 /* free outbound qdio_qs */
2544 if (card->qdio.out_qs) {
2545 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2546 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2547 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2548 }
2549 kfree(card->qdio.out_qs);
2550 card->qdio.out_qs = NULL;
2551 }
2552}
2553
4a71df50
FB		 2554static void qeth_create_qib_param_field(struct qeth_card *card,
2555 char *param_field)
2556{
2557
2558 param_field[0] = _ascebc['P'];
2559 param_field[1] = _ascebc['C'];
2560 param_field[2] = _ascebc['I'];
2561 param_field[3] = _ascebc['T'];
2562 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2563 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2564 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2565}
2566
2567static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2568 char *param_field)
2569{
2570 param_field[16] = _ascebc['B'];
2571 param_field[17] = _ascebc['L'];
2572 param_field[18] = _ascebc['K'];
2573 param_field[19] = _ascebc['T'];
2574 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2575 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2576 *((unsigned int *) (&param_field[28])) =
2577 card->info.blkt.inter_packet_jumbo;
2578}
2579
2580static int qeth_qdio_activate(struct qeth_card *card)
2581{
d11ba0c4 2582 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2583 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2584}
2585
2586static int qeth_dm_act(struct qeth_card *card)
2587{
2588 int rc;
2589 struct qeth_cmd_buffer *iob;
2590
d11ba0c4 2591 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2592
2593 iob = qeth_wait_for_buffer(&card->write);
2594 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2595
2596 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2597 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2598 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2599 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2600 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2601 return rc;
2602}
2603
2604static int qeth_mpc_initialize(struct qeth_card *card)
2605{
2606 int rc;
2607
d11ba0c4 2608 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2609
2610 rc = qeth_issue_next_read(card);
2611 if (rc) {
d11ba0c4 2612 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2613 return rc;
2614 }
2615 rc = qeth_cm_enable(card);
2616 if (rc) {
d11ba0c4 2617 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2618 goto out_qdio;
2619 }
2620 rc = qeth_cm_setup(card);
2621 if (rc) {
d11ba0c4 2622 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2623 goto out_qdio;
2624 }
2625 rc = qeth_ulp_enable(card);
2626 if (rc) {
d11ba0c4 2627 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2628 goto out_qdio;
2629 }
2630 rc = qeth_ulp_setup(card);
2631 if (rc) {
d11ba0c4 2632 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2633 goto out_qdio;
2634 }
2635 rc = qeth_alloc_qdio_buffers(card);
2636 if (rc) {
d11ba0c4 2637 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2638 goto out_qdio;
2639 }
2640 rc = qeth_qdio_establish(card);
2641 if (rc) {
d11ba0c4 2642 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2643 qeth_free_qdio_buffers(card);
2644 goto out_qdio;
2645 }
2646 rc = qeth_qdio_activate(card);
2647 if (rc) {
d11ba0c4 2648 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2649 goto out_qdio;
2650 }
2651 rc = qeth_dm_act(card);
2652 if (rc) {
d11ba0c4 2653 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2654 goto out_qdio;
2655 }
2656
2657 return 0;
2658out_qdio:
2659 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2660 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2661 return rc;
2662}
2663
4a71df50
FB		 2664void qeth_print_status_message(struct qeth_card *card)
2665{
2666 switch (card->info.type) {
5113fec0
UB		 2667 case QETH_CARD_TYPE_OSD:
2668 case QETH_CARD_TYPE_OSM:
2669 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2670 /* VM will use a non-zero first character
2671 * to indicate a HiperSockets like reporting
2672 * of the level OSA sets the first character to zero
2673 * */
2674 if (!card->info.mcl_level[0]) {
2675 sprintf(card->info.mcl_level, "%02x%02x",
2676 card->info.mcl_level[2],
2677 card->info.mcl_level[3]);
4a71df50
FB		 2678 break;
2679 }
2680 /* fallthrough */
2681 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2682 if ((card->info.guestlan) ||
2683 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2684 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2685 card->info.mcl_level[0]];
2686 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2687 card->info.mcl_level[1]];
2688 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2689 card->info.mcl_level[2]];
2690 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2691 card->info.mcl_level[3]];
2692 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2693 }
2694 break;
2695 default:
2696 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2697 }
239ff408
UB		 2698 dev_info(&card->gdev->dev,
2699 "Device is a%s card%s%s%s\nwith link type %s.\n",
2700 qeth_get_cardname(card),
2701 (card->info.mcl_level[0]) ? " (level: " : "",
2702 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2703 (card->info.mcl_level[0]) ? ")" : "",
2704 qeth_get_cardname_short(card));
4a71df50
FB		 2705}
2706EXPORT_SYMBOL_GPL(qeth_print_status_message);
2707
4a71df50
FB		 2708static void qeth_initialize_working_pool_list(struct qeth_card *card)
2709{
2710 struct qeth_buffer_pool_entry *entry;
2711
847a50fd 2712 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2713
2714 list_for_each_entry(entry,
2715 &card->qdio.init_pool.entry_list, init_list) {
2716 qeth_put_buffer_pool_entry(card, entry);
2717 }
2718}
2719
2720static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2721 struct qeth_card *card)
2722{
2723 struct list_head *plh;
2724 struct qeth_buffer_pool_entry *entry;
2725 int i, free;
2726 struct page *page;
2727
2728 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2729 return NULL;
2730
2731 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2732 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2733 free = 1;
2734 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2735 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2736 free = 0;
2737 break;
2738 }
2739 }
2740 if (free) {
2741 list_del_init(&entry->list);
2742 return entry;
2743 }
2744 }
2745
2746 /* no free buffer in pool so take first one and swap pages */
2747 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2748 struct qeth_buffer_pool_entry, list);
2749 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2750 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2751 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2752 if (!page) {
2753 return NULL;
2754 } else {
2755 free_page((unsigned long)entry->elements[i]);
2756 entry->elements[i] = page_address(page);
2757 if (card->options.performance_stats)
2758 card->perf_stats.sg_alloc_page_rx++;
2759 }
2760 }
2761 }
2762 list_del_init(&entry->list);
2763 return entry;
2764}
2765
2766static int qeth_init_input_buffer(struct qeth_card *card,
2767 struct qeth_qdio_buffer *buf)
2768{
2769 struct qeth_buffer_pool_entry *pool_entry;
2770 int i;
2771
b3332930
FB		 2772 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2773 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2774 if (!buf->rx_skb)
2775 return 1;
2776 }
2777
4a71df50
FB		 2778 pool_entry = qeth_find_free_buffer_pool_entry(card);
2779 if (!pool_entry)
2780 return 1;
2781
2782 /*
2783 * since the buffer is accessed only from the input_tasklet
2784 * there shouldn't be a need to synchronize; also, since we use
2785 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2786 * buffers
2787 */
4a71df50
FB		 2788
2789 buf->pool_entry = pool_entry;
2790 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2791 buf->buffer->element[i].length = PAGE_SIZE;
2792 buf->buffer->element[i].addr = pool_entry->elements[i];
2793 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2794 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2795 else
3ec90878
JG		 2796 buf->buffer->element[i].eflags = 0;
2797 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2798 }
2799 return 0;
2800}
2801
2802int qeth_init_qdio_queues(struct qeth_card *card)
2803{
2804 int i, j;
2805 int rc;
2806
d11ba0c4 2807 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2808
2809 /* inbound queue */
6d284bde
SO		 2810 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2811 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2812 qeth_initialize_working_pool_list(card);
2813 /*give only as many buffers to hardware as we have buffer pool entries*/
2814 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2815 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2816 card->qdio.in_q->next_buf_to_init =
2817 card->qdio.in_buf_pool.buf_count - 1;
2818 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2819 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2820 if (rc) {
d11ba0c4 2821 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2822 return rc;
2823 }
0da9581d
EL		 2824
2825 /* completion */
2826 rc = qeth_cq_init(card);
2827 if (rc) {
2828 return rc;
2829 }
2830
4a71df50
FB		 2831 /* outbound queue */
2832 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2833 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2834 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2835 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2836 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2837 card->qdio.out_qs[i]->bufs[j],
2838 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2839 }
2840 card->qdio.out_qs[i]->card = card;
2841 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2842 card->qdio.out_qs[i]->do_pack = 0;
2843 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2844 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2845 atomic_set(&card->qdio.out_qs[i]->state,
2846 QETH_OUT_Q_UNLOCKED);
2847 }
2848 return 0;
2849}
2850EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2851
2852static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2853{
2854 switch (link_type) {
2855 case QETH_LINK_TYPE_HSTR:
2856 return 2;
2857 default:
2858 return 1;
2859 }
2860}
2861
2862static void qeth_fill_ipacmd_header(struct qeth_card *card,
2863 struct qeth_ipa_cmd *cmd, __u8 command,
2864 enum qeth_prot_versions prot)
2865{
2866 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2867 cmd->hdr.command = command;
2868 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2869 cmd->hdr.seqno = card->seqno.ipa;
2870 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2871 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2872 if (card->options.layer2)
2873 cmd->hdr.prim_version_no = 2;
2874 else
2875 cmd->hdr.prim_version_no = 1;
2876 cmd->hdr.param_count = 1;
2877 cmd->hdr.prot_version = prot;
2878 cmd->hdr.ipa_supported = 0;
2879 cmd->hdr.ipa_enabled = 0;
2880}
2881
2882struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2883 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2884{
2885 struct qeth_cmd_buffer *iob;
2886 struct qeth_ipa_cmd *cmd;
2887
1aec42bc
TR		 2888 iob = qeth_get_buffer(&card->write);
2889 if (iob) {
2890 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2891 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2892 } else {
2893 dev_warn(&card->gdev->dev,
2894 "The qeth driver ran out of channel command buffers\n");
2895 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2896 dev_name(&card->gdev->dev));
2897 }
4a71df50
FB		 2898
2899 return iob;
2900}
2901EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2902
2903void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2904 char prot_type)
2905{
2906 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2907 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2908 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2909 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2910}
2911EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2912
efbbc1d5
EC		 2913/**
2914 * qeth_send_ipa_cmd() - send an IPA command
2915 *
2916 * See qeth_send_control_data() for explanation of the arguments.
2917 */
2918
4a71df50
FB		 2919int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2920 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2921 unsigned long),
2922 void *reply_param)
2923{
2924 int rc;
2925 char prot_type;
4a71df50 2926
847a50fd 2927 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2928
2929 if (card->options.layer2)
2930 if (card->info.type == QETH_CARD_TYPE_OSN)
2931 prot_type = QETH_PROT_OSN2;
2932 else
2933 prot_type = QETH_PROT_LAYER2;
2934 else
2935 prot_type = QETH_PROT_TCPIP;
2936 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2937 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2938 iob, reply_cb, reply_param);
908abbb5
UB		 2939 if (rc == -ETIME) {
2940 qeth_clear_ipacmd_list(card);
2941 qeth_schedule_recovery(card);
2942 }
4a71df50
FB		 2943 return rc;
2944}
2945EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2946
4a71df50
FB		 2947int qeth_send_startlan(struct qeth_card *card)
2948{
2949 int rc;
70919e23 2950 struct qeth_cmd_buffer *iob;
4a71df50 2951
d11ba0c4 2952 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2953
70919e23 2954 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2955 if (!iob)
2956 return -ENOMEM;
70919e23 2957 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2958 return rc;
2959}
2960EXPORT_SYMBOL_GPL(qeth_send_startlan);
2961
eb3fb0ba 2962static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2963 struct qeth_reply *reply, unsigned long data)
2964{
2965 struct qeth_ipa_cmd *cmd;
2966
847a50fd 2967 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2968
2969 cmd = (struct qeth_ipa_cmd *) data;
2970 if (cmd->hdr.return_code == 0)
2971 cmd->hdr.return_code =
2972 cmd->data.setadapterparms.hdr.return_code;
2973 return 0;
2974}
4a71df50
FB		 2975
2976static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2977 struct qeth_reply *reply, unsigned long data)
2978{
2979 struct qeth_ipa_cmd *cmd;
2980
847a50fd 2981 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2982
2983 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2984 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2985 card->info.link_type =
2986 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2987 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2988 }
4a71df50
FB		 2989 card->options.adp.supported_funcs =
2990 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2991 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2992}
2993
eb3fb0ba 2994static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2995 __u32 command, __u32 cmdlen)
2996{
2997 struct qeth_cmd_buffer *iob;
2998 struct qeth_ipa_cmd *cmd;
2999
3000 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3001 QETH_PROT_IPV4);
1aec42bc
TR		 3002 if (iob) {
3003 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3004 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3005 cmd->data.setadapterparms.hdr.command_code = command;
3006 cmd->data.setadapterparms.hdr.used_total = 1;
3007 cmd->data.setadapterparms.hdr.seq_no = 1;
3008 }
4a71df50
FB		 3009
3010 return iob;
3011}
4a71df50
FB		 3012
3013int qeth_query_setadapterparms(struct qeth_card *card)
3014{
3015 int rc;
3016 struct qeth_cmd_buffer *iob;
3017
847a50fd 3018 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3019 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3020 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3021 if (!iob)
3022 return -ENOMEM;
4a71df50
FB		 3023 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3024 return rc;
3025}
3026EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3027
1da74b1c
FB		 3028static int qeth_query_ipassists_cb(struct qeth_card *card,
3029 struct qeth_reply *reply, unsigned long data)
3030{
3031 struct qeth_ipa_cmd *cmd;
3032
3033 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3034
3035 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3036
3037 switch (cmd->hdr.return_code) {
3038 case IPA_RC_NOTSUPP:
3039 case IPA_RC_L2_UNSUPPORTED_CMD:
3040 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3041 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3042 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3043 return -0;
3044 default:
3045 if (cmd->hdr.return_code) {
3046 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3047 "rc=%d\n",
3048 dev_name(&card->gdev->dev),
3049 cmd->hdr.return_code);
3050 return 0;
3051 }
3052 }
3053
1da74b1c
FB		 3054 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3055 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3056 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3057 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3058 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3059 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3060 } else
3061 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3062 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3063 return 0;
3064}
3065
3066int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3067{
3068 int rc;
3069 struct qeth_cmd_buffer *iob;
3070
3071 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3072 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3073 if (!iob)
3074 return -ENOMEM;
1da74b1c
FB		 3075 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3076 return rc;
3077}
3078EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3079
45cbb2e4
SR		 3080static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3081 struct qeth_reply *reply, unsigned long data)
3082{
3083 struct qeth_ipa_cmd *cmd;
3084 struct qeth_switch_info *sw_info;
3085 struct qeth_query_switch_attributes *attrs;
3086
3087 QETH_CARD_TEXT(card, 2, "qswiatcb");
3088 cmd = (struct qeth_ipa_cmd *) data;
3089 sw_info = (struct qeth_switch_info *)reply->param;
3090 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3091 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3092 sw_info->capabilities = attrs->capabilities;
3093 sw_info->settings = attrs->settings;
3094 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3095 sw_info->settings);
3096 }
3097 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3098
3099 return 0;
3100}
3101
3102int qeth_query_switch_attributes(struct qeth_card *card,
3103 struct qeth_switch_info *sw_info)
3104{
3105 struct qeth_cmd_buffer *iob;
3106
3107 QETH_CARD_TEXT(card, 2, "qswiattr");
3108 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3109 return -EOPNOTSUPP;
3110 if (!netif_carrier_ok(card->dev))
3111 return -ENOMEDIUM;
3112 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3113 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3114 if (!iob)
3115 return -ENOMEM;
45cbb2e4
SR		 3116 return qeth_send_ipa_cmd(card, iob,
3117 qeth_query_switch_attributes_cb, sw_info);
3118}
3119EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3120
1da74b1c
FB		 3121static int qeth_query_setdiagass_cb(struct qeth_card *card,
3122 struct qeth_reply *reply, unsigned long data)
3123{
3124 struct qeth_ipa_cmd *cmd;
3125 __u16 rc;
3126
3127 cmd = (struct qeth_ipa_cmd *)data;
3128 rc = cmd->hdr.return_code;
3129 if (rc)
3130 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3131 else
3132 card->info.diagass_support = cmd->data.diagass.ext;
3133 return 0;
3134}
3135
3136static int qeth_query_setdiagass(struct qeth_card *card)
3137{
3138 struct qeth_cmd_buffer *iob;
3139 struct qeth_ipa_cmd *cmd;
3140
3141 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3142 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3143 if (!iob)
3144 return -ENOMEM;
1da74b1c
FB		 3145 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3146 cmd->data.diagass.subcmd_len = 16;
3147 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3148 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3149}
3150
3151static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3152{
3153 unsigned long info = get_zeroed_page(GFP_KERNEL);
3154 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3155 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3156 struct ccw_dev_id ccwid;
caf757c6 3157 int level;
1da74b1c
FB		 3158
3159 tid->chpid = card->info.chpid;
3160 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3161 tid->ssid = ccwid.ssid;
3162 tid->devno = ccwid.devno;
3163 if (!info)
3164 return;
caf757c6
HC		 3165 level = stsi(NULL, 0, 0, 0);
3166 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3167 tid->lparnr = info222->lpar_number;
caf757c6 3168 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3169 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3170 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3171 }
3172 free_page(info);
3173 return;
3174}
3175
3176static int qeth_hw_trap_cb(struct qeth_card *card,
3177 struct qeth_reply *reply, unsigned long data)
3178{
3179 struct qeth_ipa_cmd *cmd;
3180 __u16 rc;
3181
3182 cmd = (struct qeth_ipa_cmd *)data;
3183 rc = cmd->hdr.return_code;
3184 if (rc)
3185 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3186 return 0;
3187}
3188
3189int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3190{
3191 struct qeth_cmd_buffer *iob;
3192 struct qeth_ipa_cmd *cmd;
3193
3194 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3195 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3196 if (!iob)
3197 return -ENOMEM;
1da74b1c
FB		 3198 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3199 cmd->data.diagass.subcmd_len = 80;
3200 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3201 cmd->data.diagass.type = 1;
3202 cmd->data.diagass.action = action;
3203 switch (action) {
3204 case QETH_DIAGS_TRAP_ARM:
3205 cmd->data.diagass.options = 0x0003;
3206 cmd->data.diagass.ext = 0x00010000 +
3207 sizeof(struct qeth_trap_id);
3208 qeth_get_trap_id(card,
3209 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3210 break;
3211 case QETH_DIAGS_TRAP_DISARM:
3212 cmd->data.diagass.options = 0x0001;
3213 break;
3214 case QETH_DIAGS_TRAP_CAPTURE:
3215 break;
3216 }
3217 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3218}
3219EXPORT_SYMBOL_GPL(qeth_hw_trap);
3220
76b11f8e
UB		 3221int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3222 unsigned int qdio_error, const char *dbftext)
4a71df50 3223{
779e6e1c 3224 if (qdio_error) {
847a50fd 3225 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3226 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3227 buf->element[15].sflags);
38593d01 3228 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3229 buf->element[14].sflags);
38593d01 3230 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3231 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3232 card->stats.rx_dropped++;
3233 return 0;
3234 } else
3235 return 1;
4a71df50
FB		 3236 }
3237 return 0;
3238}
3239EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3240
bca51650 3241static void qeth_buffer_reclaim_work(struct work_struct *work)
b3332930
FB		 3242{
3243 struct qeth_card *card = container_of(work, struct qeth_card,
3244 buffer_reclaim_work.work);
3245
3246 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3247 qeth_queue_input_buffer(card, card->reclaim_index);
3248}
3249
4a71df50
FB		 3250void qeth_queue_input_buffer(struct qeth_card *card, int index)
3251{
3252 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3253 struct list_head *lh;
4a71df50
FB		 3254 int count;
3255 int i;
3256 int rc;
3257 int newcount = 0;
3258
4a71df50
FB		 3259 count = (index < queue->next_buf_to_init)?
3260 card->qdio.in_buf_pool.buf_count -
3261 (queue->next_buf_to_init - index) :
3262 card->qdio.in_buf_pool.buf_count -
3263 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3264 /* only requeue at a certain threshold to avoid SIGAs */
3265 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3266 for (i = queue->next_buf_to_init;
3267 i < queue->next_buf_to_init + count; ++i) {
3268 if (qeth_init_input_buffer(card,
3269 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3270 break;
3271 } else {
3272 newcount++;
3273 }
3274 }
3275
3276 if (newcount < count) {
3277 /* we are in memory shortage so we switch back to
3278 traditional skb allocation and drop packages */
4a71df50
FB		 3279 atomic_set(&card->force_alloc_skb, 3);
3280 count = newcount;
3281 } else {
4a71df50
FB		 3282 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3283 }
3284
b3332930
FB		 3285 if (!count) {
3286 i = 0;
3287 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3288 i++;
3289 if (i == card->qdio.in_buf_pool.buf_count) {
3290 QETH_CARD_TEXT(card, 2, "qsarbw");
3291 card->reclaim_index = index;
3292 schedule_delayed_work(
3293 &card->buffer_reclaim_work,
3294 QETH_RECLAIM_WORK_TIME);
3295 }
3296 return;
3297 }
3298
4a71df50
FB		 3299 /*
3300 * according to old code it should be avoided to requeue all
3301 * 128 buffers in order to benefit from PCI avoidance.
3302 * this function keeps at least one buffer (the buffer at
3303 * 'index') un-requeued -> this buffer is the first buffer that
3304 * will be requeued the next time
3305 */
3306 if (card->options.performance_stats) {
3307 card->perf_stats.inbound_do_qdio_cnt++;
3308 card->perf_stats.inbound_do_qdio_start_time =
3309 qeth_get_micros();
3310 }
779e6e1c
JG		 3311 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3312 queue->next_buf_to_init, count);
4a71df50
FB		 3313 if (card->options.performance_stats)
3314 card->perf_stats.inbound_do_qdio_time +=
3315 qeth_get_micros() -
3316 card->perf_stats.inbound_do_qdio_start_time;
3317 if (rc) {
847a50fd 3318 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3319 }
3320 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3321 QDIO_MAX_BUFFERS_PER_Q;
3322 }
3323}
3324EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3325
3326static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3327 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3328{
3ec90878 3329 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3330
847a50fd 3331 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3332 if (card->info.type == QETH_CARD_TYPE_IQD) {
3333 if (sbalf15 == 0) {
3334 qdio_err = 0;
3335 } else {
3336 qdio_err = 1;
3337 }
3338 }
76b11f8e 3339 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3340
3341 if (!qdio_err)
4a71df50 3342 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3343
3344 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3345 return QETH_SEND_ERROR_RETRY;
3346
847a50fd
CO		 3347 QETH_CARD_TEXT(card, 1, "lnkfail");
3348 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3349 (u16)qdio_err, (u8)sbalf15);
3350 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3351}
3352
3353/*
3354 * Switched to packing state if the number of used buffers on a queue
3355 * reaches a certain limit.
3356 */
3357static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3358{
3359 if (!queue->do_pack) {
3360 if (atomic_read(&queue->used_buffers)
3361 >= QETH_HIGH_WATERMARK_PACK){
3362 /* switch non-PACKING -> PACKING */
847a50fd 3363 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3364 if (queue->card->options.performance_stats)
3365 queue->card->perf_stats.sc_dp_p++;
3366 queue->do_pack = 1;
3367 }
3368 }
3369}
3370
3371/*
3372 * Switches from packing to non-packing mode. If there is a packing
3373 * buffer on the queue this buffer will be prepared to be flushed.
3374 * In that case 1 is returned to inform the caller. If no buffer
3375 * has to be flushed, zero is returned.
3376 */
3377static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3378{
3379 struct qeth_qdio_out_buffer *buffer;
3380 int flush_count = 0;
3381
3382 if (queue->do_pack) {
3383 if (atomic_read(&queue->used_buffers)
3384 <= QETH_LOW_WATERMARK_PACK) {
3385 /* switch PACKING -> non-PACKING */
847a50fd 3386 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3387 if (queue->card->options.performance_stats)
3388 queue->card->perf_stats.sc_p_dp++;
3389 queue->do_pack = 0;
3390 /* flush packing buffers */
0da9581d 3391 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3392 if ((atomic_read(&buffer->state) ==
3393 QETH_QDIO_BUF_EMPTY) &&
3394 (buffer->next_element_to_fill > 0)) {
3395 atomic_set(&buffer->state,
0da9581d 3396 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3397 flush_count++;
3398 queue->next_buf_to_fill =
3399 (queue->next_buf_to_fill + 1) %
3400 QDIO_MAX_BUFFERS_PER_Q;
3401 }
3402 }
3403 }
3404 return flush_count;
3405}
3406
0da9581d 3407
4a71df50
FB		 3408/*
3409 * Called to flush a packing buffer if no more pci flags are on the queue.
3410 * Checks if there is a packing buffer and prepares it to be flushed.
3411 * In that case returns 1, otherwise zero.
3412 */
3413static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3414{
3415 struct qeth_qdio_out_buffer *buffer;
3416
0da9581d 3417 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3418 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3419 (buffer->next_element_to_fill > 0)) {
3420 /* it's a packing buffer */
3421 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3422 queue->next_buf_to_fill =
3423 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3424 return 1;
3425 }
3426 return 0;
3427}
3428
779e6e1c
JG		 3429static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3430 int count)
4a71df50
FB		 3431{
3432 struct qeth_qdio_out_buffer *buf;
3433 int rc;
3434 int i;
3435 unsigned int qdio_flags;
3436
4a71df50 3437 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3438 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3439 buf = queue->bufs[bidx];
3ec90878
JG		 3440 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3441 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3442
0da9581d
EL		 3443 if (queue->bufstates)
3444 queue->bufstates[bidx].user = buf;
3445
4a71df50
FB		 3446 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3447 continue;
3448
3449 if (!queue->do_pack) {
3450 if ((atomic_read(&queue->used_buffers) >=
3451 (QETH_HIGH_WATERMARK_PACK -
3452 QETH_WATERMARK_PACK_FUZZ)) &&
3453 !atomic_read(&queue->set_pci_flags_count)) {
3454 /* it's likely that we'll go to packing
3455 * mode soon */
3456 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3457 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3458 }
3459 } else {
3460 if (!atomic_read(&queue->set_pci_flags_count)) {
3461 /*
3462 * there's no outstanding PCI any more, so we
3463 * have to request a PCI to be sure the the PCI
3464 * will wake at some time in the future then we
3465 * can flush packed buffers that might still be
3466 * hanging around, which can happen if no
3467 * further send was requested by the stack
3468 */
3469 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3470 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3471 }
3472 }
3473 }
3474
3e66bab3 3475 netif_trans_update(queue->card->dev);
4a71df50
FB		 3476 if (queue->card->options.performance_stats) {
3477 queue->card->perf_stats.outbound_do_qdio_cnt++;
3478 queue->card->perf_stats.outbound_do_qdio_start_time =
3479 qeth_get_micros();
3480 }
3481 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3482 if (atomic_read(&queue->set_pci_flags_count))
3483 qdio_flags |= QDIO_FLAG_PCI_OUT;
3484 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3485 queue->queue_no, index, count);
4a71df50
FB		 3486 if (queue->card->options.performance_stats)
3487 queue->card->perf_stats.outbound_do_qdio_time +=
3488 qeth_get_micros() -
3489 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3490 atomic_add(count, &queue->used_buffers);
4a71df50 3491 if (rc) {
d303b6fd
JG		 3492 queue->card->stats.tx_errors += count;
3493 /* ignore temporary SIGA errors without busy condition */
1549d13f 3494 if (rc == -ENOBUFS)
d303b6fd 3495 return;
847a50fd 3496 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3497 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3498 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3499 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3500 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3501
4a71df50
FB		 3502 /* this must not happen under normal circumstances. if it
3503 * happens something is really wrong -> recover */
3504 qeth_schedule_recovery(queue->card);
3505 return;
3506 }
4a71df50
FB		 3507 if (queue->card->options.performance_stats)
3508 queue->card->perf_stats.bufs_sent += count;
3509}
3510
3511static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3512{
3513 int index;
3514 int flush_cnt = 0;
3515 int q_was_packing = 0;
3516
3517 /*
3518 * check if weed have to switch to non-packing mode or if
3519 * we have to get a pci flag out on the queue
3520 */
3521 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3522 !atomic_read(&queue->set_pci_flags_count)) {
3523 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3524 QETH_OUT_Q_UNLOCKED) {
3525 /*
3526 * If we get in here, there was no action in
3527 * do_send_packet. So, we check if there is a
3528 * packing buffer to be flushed here.
3529 */
3530 netif_stop_queue(queue->card->dev);
3531 index = queue->next_buf_to_fill;
3532 q_was_packing = queue->do_pack;
3533 /* queue->do_pack may change */
3534 barrier();
3535 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3536 if (!flush_cnt &&
3537 !atomic_read(&queue->set_pci_flags_count))
3538 flush_cnt +=
3539 qeth_flush_buffers_on_no_pci(queue);
3540 if (queue->card->options.performance_stats &&
3541 q_was_packing)
3542 queue->card->perf_stats.bufs_sent_pack +=
3543 flush_cnt;
3544 if (flush_cnt)
779e6e1c 3545 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3546 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3547 }
3548 }
3549}
3550
a1c3ed4c
FB		 3551void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3552 unsigned long card_ptr)
3553{
3554 struct qeth_card *card = (struct qeth_card *)card_ptr;
3555
0cffef48 3556 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3557 napi_schedule(&card->napi);
3558}
3559EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3560
0da9581d
EL		 3561int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3562{
3563 int rc;
3564
3565 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3566 rc = -1;
3567 goto out;
3568 } else {
3569 if (card->options.cq == cq) {
3570 rc = 0;
3571 goto out;
3572 }
3573
3574 if (card->state != CARD_STATE_DOWN &&
3575 card->state != CARD_STATE_RECOVER) {
3576 rc = -1;
3577 goto out;
3578 }
3579
3580 qeth_free_qdio_buffers(card);
3581 card->options.cq = cq;
3582 rc = 0;
3583 }
3584out:
3585 return rc;
3586
3587}
3588EXPORT_SYMBOL_GPL(qeth_configure_cq);
3589
3590
3591static void qeth_qdio_cq_handler(struct qeth_card *card,
3592 unsigned int qdio_err,
3593 unsigned int queue, int first_element, int count) {
3594 struct qeth_qdio_q *cq = card->qdio.c_q;
3595 int i;
3596 int rc;
3597
3598 if (!qeth_is_cq(card, queue))
3599 goto out;
3600
3601 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3602 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3603 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3604
3605 if (qdio_err) {
3606 netif_stop_queue(card->dev);
3607 qeth_schedule_recovery(card);
3608 goto out;
3609 }
3610
3611 if (card->options.performance_stats) {
3612 card->perf_stats.cq_cnt++;
3613 card->perf_stats.cq_start_time = qeth_get_micros();
3614 }
3615
3616 for (i = first_element; i < first_element + count; ++i) {
3617 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3618 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3619 int e;
3620
3621 e = 0;
3622 while (buffer->element[e].addr) {
3623 unsigned long phys_aob_addr;
3624
3625 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3626 qeth_qdio_handle_aob(card, phys_aob_addr);
3627 buffer->element[e].addr = NULL;
3628 buffer->element[e].eflags = 0;
3629 buffer->element[e].sflags = 0;
3630 buffer->element[e].length = 0;
3631
3632 ++e;
3633 }
3634
3635 buffer->element[15].eflags = 0;
3636 buffer->element[15].sflags = 0;
3637 }
3638 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3639 card->qdio.c_q->next_buf_to_init,
3640 count);
3641 if (rc) {
3642 dev_warn(&card->gdev->dev,
3643 "QDIO reported an error, rc=%i\n", rc);
3644 QETH_CARD_TEXT(card, 2, "qcqherr");
3645 }
3646 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3647 + count) % QDIO_MAX_BUFFERS_PER_Q;
3648
3649 netif_wake_queue(card->dev);
3650
3651 if (card->options.performance_stats) {
3652 int delta_t = qeth_get_micros();
3653 delta_t -= card->perf_stats.cq_start_time;
3654 card->perf_stats.cq_time += delta_t;
3655 }
3656out:
3657 return;
3658}
3659
a1c3ed4c 3660void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3661 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3662 unsigned long card_ptr)
3663{
3664 struct qeth_card *card = (struct qeth_card *)card_ptr;
3665
0da9581d
EL		 3666 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3667 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3668
3669 if (qeth_is_cq(card, queue))
3670 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3671 else if (qdio_err)
a1c3ed4c 3672 qeth_schedule_recovery(card);
0da9581d
EL		 3673
3674
a1c3ed4c
FB		 3675}
3676EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3677
779e6e1c
JG		 3678void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3679 unsigned int qdio_error, int __queue, int first_element,
3680 int count, unsigned long card_ptr)
4a71df50
FB		 3681{
3682 struct qeth_card *card = (struct qeth_card *) card_ptr;
3683 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3684 struct qeth_qdio_out_buffer *buffer;
3685 int i;
3686
847a50fd 3687 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3688 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3689 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3690 netif_stop_queue(card->dev);
3691 qeth_schedule_recovery(card);
3692 return;
4a71df50
FB		 3693 }
3694 if (card->options.performance_stats) {
3695 card->perf_stats.outbound_handler_cnt++;
3696 card->perf_stats.outbound_handler_start_time =
3697 qeth_get_micros();
3698 }
3699 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3700 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3701 buffer = queue->bufs[bidx];
b67d801f 3702 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3703
3704 if (queue->bufstates &&
3705 (queue->bufstates[bidx].flags &
3706 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3707 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3708
3709 if (atomic_cmpxchg(&buffer->state,
3710 QETH_QDIO_BUF_PRIMED,
3711 QETH_QDIO_BUF_PENDING) ==
3712 QETH_QDIO_BUF_PRIMED) {
3713 qeth_notify_skbs(queue, buffer,
3714 TX_NOTIFY_PENDING);
3715 }
0da9581d
EL		 3716 buffer->aob = queue->bufstates[bidx].aob;
3717 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3718 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3719 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3720 virt_to_phys(buffer->aob));
b3332930
FB		 3721 if (qeth_init_qdio_out_buf(queue, bidx)) {
3722 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3723 qeth_schedule_recovery(card);
b3332930 3724 }
0da9581d 3725 } else {
b3332930
FB		 3726 if (card->options.cq == QETH_CQ_ENABLED) {
3727 enum iucv_tx_notify n;
3728
3729 n = qeth_compute_cq_notification(
3730 buffer->buffer->element[15].sflags, 0);
3731 qeth_notify_skbs(queue, buffer, n);
3732 }
3733
0da9581d
EL		 3734 qeth_clear_output_buffer(queue, buffer,
3735 QETH_QDIO_BUF_EMPTY);
3736 }
3737 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3738 }
3739 atomic_sub(count, &queue->used_buffers);
3740 /* check if we need to do something on this outbound queue */
3741 if (card->info.type != QETH_CARD_TYPE_IQD)
3742 qeth_check_outbound_queue(queue);
3743
3744 netif_wake_queue(queue->card->dev);
3745 if (card->options.performance_stats)
3746 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3747 card->perf_stats.outbound_handler_start_time;
3748}
3749EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3750
290b8348
SR		 3751/**
3752 * Note: Function assumes that we have 4 outbound queues.
3753 */
4a71df50
FB		 3754int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3755 int ipv, int cast_type)
3756{
d66cb37e 3757 __be16 *tci;
290b8348
SR		 3758 u8 tos;
3759
290b8348
SR		 3760 if (cast_type && card->info.is_multicast_different)
3761 return card->info.is_multicast_different &
3762 (card->qdio.no_out_queues - 1);
3763
3764 switch (card->qdio.do_prio_queueing) {
3765 case QETH_PRIO_Q_ING_TOS:
3766 case QETH_PRIO_Q_ING_PREC:
3767 switch (ipv) {
3768 case 4:
3769 tos = ipv4_get_dsfield(ip_hdr(skb));
3770 break;
3771 case 6:
3772 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3773 break;
3774 default:
3775 return card->qdio.default_out_queue;
4a71df50 3776 }
290b8348
SR		 3777 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3778 return ~tos >> 6 & 3;
3779 if (tos & IPTOS_MINCOST)
3780 return 3;
3781 if (tos & IPTOS_RELIABILITY)
3782 return 2;
3783 if (tos & IPTOS_THROUGHPUT)
3784 return 1;
3785 if (tos & IPTOS_LOWDELAY)
3786 return 0;
d66cb37e
SR		 3787 break;
3788 case QETH_PRIO_Q_ING_SKB:
3789 if (skb->priority > 5)
3790 return 0;
3791 return ~skb->priority >> 1 & 3;
3792 case QETH_PRIO_Q_ING_VLAN:
3793 tci = &((struct ethhdr *)skb->data)->h_proto;
3794 if (*tci == ETH_P_8021Q)
3795 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
3796 break;
4a71df50 3797 default:
290b8348 3798 break;
4a71df50 3799 }
290b8348 3800 return card->qdio.default_out_queue;
4a71df50
FB		 3801}
3802EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3803
2863c613
EC		 3804/**
3805 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3806 * @skb: SKB address
3807 *
3808 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3809 * fragmented part of the SKB. Returns zero for linear SKB.
3810 */
271648b4
FB		 3811int qeth_get_elements_for_frags(struct sk_buff *skb)
3812{
2863c613 3813 int cnt, elements = 0;
271648b4
FB		 3814
3815 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3816 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3817
3818 elements += qeth_get_elements_for_range(
3819 (addr_t)skb_frag_address(frag),
3820 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3821 }
3822 return elements;
3823}
3824EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3825
2863c613
EC		 3826/**
3827 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3828 * @card: qeth card structure, to check max. elems.
3829 * @skb: SKB address
3830 * @extra_elems: extra elems needed, to check against max.
3831 *
3832 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3833 * skb data, including linear part and fragments. Checks if the result plus
3834 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3835 * Note: extra_elems is not included in the returned result.
3836 */
065cc782 3837int qeth_get_elements_no(struct qeth_card *card,
2863c613 3838 struct sk_buff *skb, int extra_elems)
4a71df50 3839{
2863c613
EC		 3840 int elements = qeth_get_elements_for_range(
3841 (addr_t)skb->data,
3842 (addr_t)skb->data + skb_headlen(skb)) +
3843 qeth_get_elements_for_frags(skb);
4a71df50 3844
2863c613 3845 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3846 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3847 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3848 elements + extra_elems, skb->len);
4a71df50
FB		 3849 return 0;
3850 }
2863c613 3851 return elements;
4a71df50
FB		 3852}
3853EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3854
d4ae1f5e 3855int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3856{
3857 int hroom, inpage, rest;
3858
3859 if (((unsigned long)skb->data & PAGE_MASK) !=
3860 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3861 hroom = skb_headroom(skb);
3862 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3863 rest = len - inpage;
3864 if (rest > hroom)
3865 return 1;
2863c613 3866 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3867 skb->data -= rest;
d4ae1f5e
SR		 3868 skb->tail -= rest;
3869 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3870 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3871 }
3872 return 0;
3873}
3874EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3875
f90b744e 3876static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3877 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3878 int offset)
4a71df50 3879{
2863c613 3880 int length = skb_headlen(skb);
4a71df50
FB		 3881 int length_here;
3882 int element;
3883 char *data;
51aa165c
FB		 3884 int first_lap, cnt;
3885 struct skb_frag_struct *frag;
4a71df50
FB		 3886
3887 element = *next_element_to_fill;
3888 data = skb->data;
3889 first_lap = (is_tso == 0 ? 1 : 0);
3890
683d718a
FB		 3891 if (offset >= 0) {
3892 data = skb->data + offset;
e1f03ae8 3893 length -= offset;
683d718a
FB		 3894 first_lap = 0;
3895 }
3896
4a71df50
FB		 3897 while (length > 0) {
3898 /* length_here is the remaining amount of data in this page */
3899 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3900 if (length < length_here)
3901 length_here = length;
3902
3903 buffer->element[element].addr = data;
3904 buffer->element[element].length = length_here;
3905 length -= length_here;
3906 if (!length) {
3907 if (first_lap)
51aa165c 3908 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3909 buffer->element[element].eflags =
3910 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3911 else
3ec90878 3912 buffer->element[element].eflags = 0;
4a71df50 3913 else
3ec90878
JG		 3914 buffer->element[element].eflags =
3915 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3916 } else {
3917 if (first_lap)
3ec90878
JG		 3918 buffer->element[element].eflags =
3919 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3920 else
3ec90878
JG		 3921 buffer->element[element].eflags =
3922 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3923 }
3924 data += length_here;
3925 element++;
3926 first_lap = 0;
3927 }
51aa165c
FB		 3928
3929 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3930 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3931 data = (char *)page_to_phys(skb_frag_page(frag)) +
3932 frag->page_offset;
3933 length = frag->size;
3934 while (length > 0) {
3935 length_here = PAGE_SIZE -
3936 ((unsigned long) data % PAGE_SIZE);
3937 if (length < length_here)
3938 length_here = length;
3939
3940 buffer->element[element].addr = data;
3941 buffer->element[element].length = length_here;
3942 buffer->element[element].eflags =
3943 SBAL_EFLAGS_MIDDLE_FRAG;
3944 length -= length_here;
3945 data += length_here;
3946 element++;
3947 }
51aa165c
FB		 3948 }
3949
3ec90878
JG		 3950 if (buffer->element[element - 1].eflags)
3951 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3952 *next_element_to_fill = element;
3953}
3954
f90b744e 3955static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3956 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3957 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3958{
3959 struct qdio_buffer *buffer;
4a71df50
FB		 3960 int flush_cnt = 0, hdr_len, large_send = 0;
3961
4a71df50
FB		 3962 buffer = buf->buffer;
3963 atomic_inc(&skb->users);
3964 skb_queue_tail(&buf->skb_list, skb);
3965
4a71df50 3966 /*check first on TSO ....*/
683d718a 3967 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3968 int element = buf->next_element_to_fill;
3969
683d718a
FB		 3970 hdr_len = sizeof(struct qeth_hdr_tso) +
3971 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3972 /*fill first buffer entry only with header information */
3973 buffer->element[element].addr = skb->data;
3974 buffer->element[element].length = hdr_len;
3ec90878 3975 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3976 buf->next_element_to_fill++;
3977 skb->data += hdr_len;
3978 skb->len -= hdr_len;
3979 large_send = 1;
3980 }
683d718a
FB		 3981
3982 if (offset >= 0) {
3983 int element = buf->next_element_to_fill;
3984 buffer->element[element].addr = hdr;
3985 buffer->element[element].length = sizeof(struct qeth_hdr) +
3986 hd_len;
3ec90878 3987 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3988 buf->is_header[element] = 1;
3989 buf->next_element_to_fill++;
3990 }
3991
51aa165c
FB		 3992 __qeth_fill_buffer(skb, buffer, large_send,
3993 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3994
3995 if (!queue->do_pack) {
847a50fd 3996 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3997 /* set state to PRIMED -> will be flushed */
3998 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3999 flush_cnt = 1;
4000 } else {
847a50fd 4001 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4002 if (queue->card->options.performance_stats)
4003 queue->card->perf_stats.skbs_sent_pack++;
4004 if (buf->next_element_to_fill >=
4005 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4006 /*
4007 * packed buffer if full -> set state PRIMED
4008 * -> will be flushed
4009 */
4010 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4011 flush_cnt = 1;
4012 }
4013 }
4014 return flush_cnt;
4015}
4016
4017int qeth_do_send_packet_fast(struct qeth_card *card,
4018 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4019 struct qeth_hdr *hdr, int elements_needed,
64ef8957 4020 int offset, int hd_len)
4a71df50
FB		 4021{
4022 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 4023 int index;
4024
4a71df50
FB		 4025 /* spin until we get the queue ... */
4026 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4027 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4028 /* ... now we've got the queue */
4029 index = queue->next_buf_to_fill;
0da9581d 4030 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4031 /*
4032 * check if buffer is empty to make sure that we do not 'overtake'
4033 * ourselves and try to fill a buffer that is already primed
4034 */
4035 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4036 goto out;
64ef8957 4037 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4038 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4039 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4040 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4041 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4042 return 0;
4043out:
4044 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4045 return -EBUSY;
4046}
4047EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4048
4049int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4050 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 4051 int elements_needed)
4a71df50
FB		 4052{
4053 struct qeth_qdio_out_buffer *buffer;
4054 int start_index;
4055 int flush_count = 0;
4056 int do_pack = 0;
4057 int tmp;
4058 int rc = 0;
4059
4a71df50
FB		 4060 /* spin until we get the queue ... */
4061 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4062 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4063 start_index = queue->next_buf_to_fill;
0da9581d 4064 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4065 /*
4066 * check if buffer is empty to make sure that we do not 'overtake'
4067 * ourselves and try to fill a buffer that is already primed
4068 */
4069 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4070 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4071 return -EBUSY;
4072 }
4073 /* check if we need to switch packing state of this queue */
4074 qeth_switch_to_packing_if_needed(queue);
4075 if (queue->do_pack) {
4076 do_pack = 1;
64ef8957
FB		 4077 /* does packet fit in current buffer? */
4078 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4079 buffer->next_element_to_fill) < elements_needed) {
4080 /* ... no -> set state PRIMED */
4081 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4082 flush_count++;
4083 queue->next_buf_to_fill =
4084 (queue->next_buf_to_fill + 1) %
4085 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4086 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4087 /* we did a step forward, so check buffer state
4088 * again */
4089 if (atomic_read(&buffer->state) !=
4090 QETH_QDIO_BUF_EMPTY) {
4091 qeth_flush_buffers(queue, start_index,
779e6e1c 4092 flush_count);
64ef8957 4093 atomic_set(&queue->state,
4a71df50 4094 QETH_OUT_Q_UNLOCKED);
64ef8957 4095 return -EBUSY;
4a71df50
FB		 4096 }
4097 }
4098 }
64ef8957 4099 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4100 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4101 QDIO_MAX_BUFFERS_PER_Q;
4102 flush_count += tmp;
4a71df50 4103 if (flush_count)
779e6e1c 4104 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4105 else if (!atomic_read(&queue->set_pci_flags_count))
4106 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4107 /*
4108 * queue->state will go from LOCKED -> UNLOCKED or from
4109 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4110 * (switch packing state or flush buffer to get another pci flag out).
4111 * In that case we will enter this loop
4112 */
4113 while (atomic_dec_return(&queue->state)) {
4114 flush_count = 0;
4115 start_index = queue->next_buf_to_fill;
4116 /* check if we can go back to non-packing state */
4117 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4118 /*
4119 * check if we need to flush a packing buffer to get a pci
4120 * flag out on the queue
4121 */
4122 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4123 flush_count += qeth_flush_buffers_on_no_pci(queue);
4124 if (flush_count)
779e6e1c 4125 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4126 }
4127 /* at this point the queue is UNLOCKED again */
4128 if (queue->card->options.performance_stats && do_pack)
4129 queue->card->perf_stats.bufs_sent_pack += flush_count;
4130
4131 return rc;
4132}
4133EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4134
4135static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4136 struct qeth_reply *reply, unsigned long data)
4137{
4138 struct qeth_ipa_cmd *cmd;
4139 struct qeth_ipacmd_setadpparms *setparms;
4140
847a50fd 4141 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4142
4143 cmd = (struct qeth_ipa_cmd *) data;
4144 setparms = &(cmd->data.setadapterparms);
4145
4146 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4147 if (cmd->hdr.return_code) {
8a593148 4148 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4149 setparms->data.mode = SET_PROMISC_MODE_OFF;
4150 }
4151 card->info.promisc_mode = setparms->data.mode;
4152 return 0;
4153}
4154
4155void qeth_setadp_promisc_mode(struct qeth_card *card)
4156{
4157 enum qeth_ipa_promisc_modes mode;
4158 struct net_device *dev = card->dev;
4159 struct qeth_cmd_buffer *iob;
4160 struct qeth_ipa_cmd *cmd;
4161
847a50fd 4162 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4163
4164 if (((dev->flags & IFF_PROMISC) &&
4165 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4166 (!(dev->flags & IFF_PROMISC) &&
4167 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4168 return;
4169 mode = SET_PROMISC_MODE_OFF;
4170 if (dev->flags & IFF_PROMISC)
4171 mode = SET_PROMISC_MODE_ON;
847a50fd 4172 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4173
4174 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4175 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4176 if (!iob)
4177 return;
4a71df50
FB		 4178 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4179 cmd->data.setadapterparms.data.mode = mode;
4180 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4181}
4182EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4183
4184int qeth_change_mtu(struct net_device *dev, int new_mtu)
4185{
4186 struct qeth_card *card;
4187 char dbf_text[15];
4188
509e2562 4189 card = dev->ml_priv;
4a71df50 4190
847a50fd 4191 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4192 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4193 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 4194
4195 if (new_mtu < 64)
4196 return -EINVAL;
4197 if (new_mtu > 65535)
4198 return -EINVAL;
4199 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4200 (!qeth_mtu_is_valid(card, new_mtu)))
4201 return -EINVAL;
4202 dev->mtu = new_mtu;
4203 return 0;
4204}
4205EXPORT_SYMBOL_GPL(qeth_change_mtu);
4206
4207struct net_device_stats *qeth_get_stats(struct net_device *dev)
4208{
4209 struct qeth_card *card;
4210
509e2562 4211 card = dev->ml_priv;
4a71df50 4212
847a50fd 4213 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4214
4215 return &card->stats;
4216}
4217EXPORT_SYMBOL_GPL(qeth_get_stats);
4218
4219static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4220 struct qeth_reply *reply, unsigned long data)
4221{
4222 struct qeth_ipa_cmd *cmd;
4223
847a50fd 4224 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4225
4226 cmd = (struct qeth_ipa_cmd *) data;
4227 if (!card->options.layer2 ||
4228 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4229 memcpy(card->dev->dev_addr,
4230 &cmd->data.setadapterparms.data.change_addr.addr,
4231 OSA_ADDR_LEN);
4232 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4233 }
4234 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4235 return 0;
4236}
4237
4238int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4239{
4240 int rc;
4241 struct qeth_cmd_buffer *iob;
4242 struct qeth_ipa_cmd *cmd;
4243
847a50fd 4244 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4245
4246 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4247 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4248 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4249 if (!iob)
4250 return -ENOMEM;
4a71df50
FB		 4251 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4252 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4253 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4254 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4255 card->dev->dev_addr, OSA_ADDR_LEN);
4256 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4257 NULL);
4258 return rc;
4259}
4260EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4261
d64ecc22
EL		 4262static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4263 struct qeth_reply *reply, unsigned long data)
4264{
4265 struct qeth_ipa_cmd *cmd;
4266 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4267 int fallback = *(int *)reply->param;
d64ecc22 4268
847a50fd 4269 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4270
4271 cmd = (struct qeth_ipa_cmd *) data;
4272 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4273 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4274 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4275 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4276 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4277 if (cmd->data.setadapterparms.hdr.return_code !=
4278 SET_ACCESS_CTRL_RC_SUCCESS)
4279 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4280 card->gdev->dev.kobj.name,
4281 access_ctrl_req->subcmd_code,
4282 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4283 switch (cmd->data.setadapterparms.hdr.return_code) {
4284 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4285 if (card->options.isolation == ISOLATION_MODE_NONE) {
4286 dev_info(&card->gdev->dev,
4287 "QDIO data connection isolation is deactivated\n");
4288 } else {
4289 dev_info(&card->gdev->dev,
4290 "QDIO data connection isolation is activated\n");
4291 }
d64ecc22 4292 break;
0f54761d
SR		 4293 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4294 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4295 "deactivated\n", dev_name(&card->gdev->dev));
4296 if (fallback)
4297 card->options.isolation = card->options.prev_isolation;
4298 break;
4299 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4300 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4301 " activated\n", dev_name(&card->gdev->dev));
4302 if (fallback)
4303 card->options.isolation = card->options.prev_isolation;
4304 break;
d64ecc22 4305 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4306 dev_err(&card->gdev->dev, "Adapter does not "
4307 "support QDIO data connection isolation\n");
d64ecc22 4308 break;
d64ecc22 4309 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4310 dev_err(&card->gdev->dev,
4311 "Adapter is dedicated. "
4312 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4313 if (fallback)
4314 card->options.isolation = card->options.prev_isolation;
d64ecc22 4315 break;
d64ecc22 4316 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4317 dev_err(&card->gdev->dev,
4318 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4319 if (fallback)
4320 card->options.isolation = card->options.prev_isolation;
4321 break;
4322 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4323 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4324 "support reflective relay mode\n");
4325 if (fallback)
4326 card->options.isolation = card->options.prev_isolation;
4327 break;
4328 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4329 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4330 "enabled at the adjacent switch port");
4331 if (fallback)
4332 card->options.isolation = card->options.prev_isolation;
4333 break;
4334 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4335 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4336 "at the adjacent switch failed\n");
d64ecc22 4337 break;
d64ecc22 4338 default:
d64ecc22 4339 /* this should never happen */
0f54761d
SR		 4340 if (fallback)
4341 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4342 break;
4343 }
d64ecc22 4344 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4345 return 0;
d64ecc22
EL		 4346}
4347
4348static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4349 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4350{
4351 int rc;
4352 struct qeth_cmd_buffer *iob;
4353 struct qeth_ipa_cmd *cmd;
4354 struct qeth_set_access_ctrl *access_ctrl_req;
4355
847a50fd 4356 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4357
4358 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4359 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4360
4361 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4362 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4363 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4364 if (!iob)
4365 return -ENOMEM;
d64ecc22
EL		 4366 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4367 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4368 access_ctrl_req->subcmd_code = isolation;
4369
4370 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4371 &fallback);
d64ecc22
EL		 4372 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4373 return rc;
4374}
4375
0f54761d 4376int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4377{
4378 int rc = 0;
4379
847a50fd 4380 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4381
5113fec0
UB		 4382 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4383 card->info.type == QETH_CARD_TYPE_OSX) &&
4384 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4385 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4386 card->options.isolation, fallback);
d64ecc22
EL		 4387 if (rc) {
4388 QETH_DBF_MESSAGE(3,
5113fec0 4389 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4390 card->gdev->dev.kobj.name,
4391 rc);
0f54761d 4392 rc = -EOPNOTSUPP;
d64ecc22
EL		 4393 }
4394 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4395 card->options.isolation = ISOLATION_MODE_NONE;
4396
4397 dev_err(&card->gdev->dev, "Adapter does not "
4398 "support QDIO data connection isolation\n");
4399 rc = -EOPNOTSUPP;
4400 }
4401 return rc;
4402}
4403EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4404
4a71df50
FB		 4405void qeth_tx_timeout(struct net_device *dev)
4406{
4407 struct qeth_card *card;
4408
509e2562 4409 card = dev->ml_priv;
847a50fd 4410 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4411 card->stats.tx_errors++;
4412 qeth_schedule_recovery(card);
4413}
4414EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4415
4416int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4417{
509e2562 4418 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4419 int rc = 0;
4420
4421 switch (regnum) {
4422 case MII_BMCR: /* Basic mode control register */
4423 rc = BMCR_FULLDPLX;
4424 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4425 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4426 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4427 rc |= BMCR_SPEED100;
4428 break;
4429 case MII_BMSR: /* Basic mode status register */
4430 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4431 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4432 BMSR_100BASE4;
4433 break;
4434 case MII_PHYSID1: /* PHYS ID 1 */
4435 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4436 dev->dev_addr[2];
4437 rc = (rc >> 5) & 0xFFFF;
4438 break;
4439 case MII_PHYSID2: /* PHYS ID 2 */
4440 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4441 break;
4442 case MII_ADVERTISE: /* Advertisement control reg */
4443 rc = ADVERTISE_ALL;
4444 break;
4445 case MII_LPA: /* Link partner ability reg */
4446 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4447 LPA_100BASE4 | LPA_LPACK;
4448 break;
4449 case MII_EXPANSION: /* Expansion register */
4450 break;
4451 case MII_DCOUNTER: /* disconnect counter */
4452 break;
4453 case MII_FCSCOUNTER: /* false carrier counter */
4454 break;
4455 case MII_NWAYTEST: /* N-way auto-neg test register */
4456 break;
4457 case MII_RERRCOUNTER: /* rx error counter */
4458 rc = card->stats.rx_errors;
4459 break;
4460 case MII_SREVISION: /* silicon revision */
4461 break;
4462 case MII_RESV1: /* reserved 1 */
4463 break;
4464 case MII_LBRERROR: /* loopback, rx, bypass error */
4465 break;
4466 case MII_PHYADDR: /* physical address */
4467 break;
4468 case MII_RESV2: /* reserved 2 */
4469 break;
4470 case MII_TPISTATUS: /* TPI status for 10mbps */
4471 break;
4472 case MII_NCONFIG: /* network interface config */
4473 break;
4474 default:
4475 break;
4476 }
4477 return rc;
4478}
4479EXPORT_SYMBOL_GPL(qeth_mdio_read);
4480
4481static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4482 struct qeth_cmd_buffer *iob, int len,
4483 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4484 unsigned long),
4485 void *reply_param)
4486{
4487 u16 s1, s2;
4488
847a50fd 4489 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4490
4491 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4492 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4493 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4494 /* adjust PDU length fields in IPA_PDU_HEADER */
4495 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4496 s2 = (u32) len;
4497 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4498 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4499 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4500 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4501 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4502 reply_cb, reply_param);
4503}
4504
4505static int qeth_snmp_command_cb(struct qeth_card *card,
4506 struct qeth_reply *reply, unsigned long sdata)
4507{
4508 struct qeth_ipa_cmd *cmd;
4509 struct qeth_arp_query_info *qinfo;
4510 struct qeth_snmp_cmd *snmp;
4511 unsigned char *data;
4512 __u16 data_len;
4513
847a50fd 4514 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4515
4516 cmd = (struct qeth_ipa_cmd *) sdata;
4517 data = (unsigned char *)((char *)cmd - reply->offset);
4518 qinfo = (struct qeth_arp_query_info *) reply->param;
4519 snmp = &cmd->data.setadapterparms.data.snmp;
4520
4521 if (cmd->hdr.return_code) {
8a593148 4522 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4523 return 0;
4524 }
4525 if (cmd->data.setadapterparms.hdr.return_code) {
4526 cmd->hdr.return_code =
4527 cmd->data.setadapterparms.hdr.return_code;
8a593148 4528 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4529 return 0;
4530 }
4531 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4532 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4533 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4534 else
4535 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4536
4537 /* check if there is enough room in userspace */
4538 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4539 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4540 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4541 return 0;
4542 }
847a50fd 4543 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4544 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4545 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4546 cmd->data.setadapterparms.hdr.seq_no);
4547 /*copy entries to user buffer*/
4548 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4549 memcpy(qinfo->udata + qinfo->udata_offset,
4550 (char *)snmp,
4551 data_len + offsetof(struct qeth_snmp_cmd, data));
4552 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4553 } else {
4554 memcpy(qinfo->udata + qinfo->udata_offset,
4555 (char *)&snmp->request, data_len);
4556 }
4557 qinfo->udata_offset += data_len;
4558 /* check if all replies received ... */
847a50fd 4559 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4560 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4561 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4562 cmd->data.setadapterparms.hdr.seq_no);
4563 if (cmd->data.setadapterparms.hdr.seq_no <
4564 cmd->data.setadapterparms.hdr.used_total)
4565 return 1;
4566 return 0;
4567}
4568
4569int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4570{
4571 struct qeth_cmd_buffer *iob;
4572 struct qeth_ipa_cmd *cmd;
4573 struct qeth_snmp_ureq *ureq;
6fb392b1 4574 unsigned int req_len;
4a71df50
FB		 4575 struct qeth_arp_query_info qinfo = {0, };
4576 int rc = 0;
4577
847a50fd 4578 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4579
4580 if (card->info.guestlan)
4581 return -EOPNOTSUPP;
4582
4583 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4584 (!card->options.layer2)) {
4a71df50
FB		 4585 return -EOPNOTSUPP;
4586 }
4587 /* skip 4 bytes (data_len struct member) to get req_len */
4588 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4589 return -EFAULT;
6fb392b1
UB		 4590 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4591 sizeof(struct qeth_ipacmd_hdr) -
4592 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4593 return -EINVAL;
4986f3f0
JL		 4594 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4595 if (IS_ERR(ureq)) {
847a50fd 4596 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4597 return PTR_ERR(ureq);
4a71df50
FB		 4598 }
4599 qinfo.udata_len = ureq->hdr.data_len;
4600 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4601 if (!qinfo.udata) {
4602 kfree(ureq);
4603 return -ENOMEM;
4604 }
4605 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4606
4607 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4608 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4609 if (!iob) {
4610 rc = -ENOMEM;
4611 goto out;
4612 }
4a71df50
FB		 4613 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4614 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4615 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4616 qeth_snmp_command_cb, (void *)&qinfo);
4617 if (rc)
14cc21b6 4618 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4619 QETH_CARD_IFNAME(card), rc);
4620 else {
4621 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4622 rc = -EFAULT;
4623 }
1aec42bc 4624out:
4a71df50
FB		 4625 kfree(ureq);
4626 kfree(qinfo.udata);
4627 return rc;
4628}
4629EXPORT_SYMBOL_GPL(qeth_snmp_command);
4630
c3ab96f3
FB		 4631static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4632 struct qeth_reply *reply, unsigned long data)
4633{
4634 struct qeth_ipa_cmd *cmd;
4635 struct qeth_qoat_priv *priv;
4636 char *resdata;
4637 int resdatalen;
4638
4639 QETH_CARD_TEXT(card, 3, "qoatcb");
4640
4641 cmd = (struct qeth_ipa_cmd *)data;
4642 priv = (struct qeth_qoat_priv *)reply->param;
4643 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4644 resdata = (char *)data + 28;
4645
4646 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4647 cmd->hdr.return_code = IPA_RC_FFFF;
4648 return 0;
4649 }
4650
4651 memcpy((priv->buffer + priv->response_len), resdata,
4652 resdatalen);
4653 priv->response_len += resdatalen;
4654
4655 if (cmd->data.setadapterparms.hdr.seq_no <
4656 cmd->data.setadapterparms.hdr.used_total)
4657 return 1;
4658 return 0;
4659}
4660
4661int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4662{
4663 int rc = 0;
4664 struct qeth_cmd_buffer *iob;
4665 struct qeth_ipa_cmd *cmd;
4666 struct qeth_query_oat *oat_req;
4667 struct qeth_query_oat_data oat_data;
4668 struct qeth_qoat_priv priv;
4669 void __user *tmp;
4670
4671 QETH_CARD_TEXT(card, 3, "qoatcmd");
4672
4673 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4674 rc = -EOPNOTSUPP;
4675 goto out;
4676 }
4677
4678 if (copy_from_user(&oat_data, udata,
4679 sizeof(struct qeth_query_oat_data))) {
4680 rc = -EFAULT;
4681 goto out;
4682 }
4683
4684 priv.buffer_len = oat_data.buffer_len;
4685 priv.response_len = 0;
4686 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4687 if (!priv.buffer) {
4688 rc = -ENOMEM;
4689 goto out;
4690 }
4691
4692 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4693 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4694 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4695 if (!iob) {
4696 rc = -ENOMEM;
4697 goto out_free;
4698 }
c3ab96f3
FB		 4699 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4700 oat_req = &cmd->data.setadapterparms.data.query_oat;
4701 oat_req->subcmd_code = oat_data.command;
4702
4703 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4704 &priv);
4705 if (!rc) {
4706 if (is_compat_task())
4707 tmp = compat_ptr(oat_data.ptr);
4708 else
4709 tmp = (void __user *)(unsigned long)oat_data.ptr;
4710
4711 if (copy_to_user(tmp, priv.buffer,
4712 priv.response_len)) {
4713 rc = -EFAULT;
4714 goto out_free;
4715 }
4716
4717 oat_data.response_len = priv.response_len;
4718
4719 if (copy_to_user(udata, &oat_data,
4720 sizeof(struct qeth_query_oat_data)))
4721 rc = -EFAULT;
4722 } else
4723 if (rc == IPA_RC_FFFF)
4724 rc = -EFAULT;
4725
4726out_free:
4727 kfree(priv.buffer);
4728out:
4729 return rc;
4730}
4731EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4732
e71e4072
HC		 4733static int qeth_query_card_info_cb(struct qeth_card *card,
4734 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4735{
4736 struct qeth_ipa_cmd *cmd;
4737 struct qeth_query_card_info *card_info;
4738 struct carrier_info *carrier_info;
4739
4740 QETH_CARD_TEXT(card, 2, "qcrdincb");
4741 carrier_info = (struct carrier_info *)reply->param;
4742 cmd = (struct qeth_ipa_cmd *)data;
4743 card_info = &cmd->data.setadapterparms.data.card_info;
4744 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4745 carrier_info->card_type = card_info->card_type;
4746 carrier_info->port_mode = card_info->port_mode;
4747 carrier_info->port_speed = card_info->port_speed;
4748 }
4749
4750 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4751 return 0;
4752}
4753
bca51650 4754static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4755 struct carrier_info *carrier_info)
4756{
4757 struct qeth_cmd_buffer *iob;
4758
4759 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4760 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4761 return -EOPNOTSUPP;
4762 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4763 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4764 if (!iob)
4765 return -ENOMEM;
02d5cb5b
EC		 4766 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4767 (void *)carrier_info);
4768}
02d5cb5b 4769
4a71df50
FB		 4770static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4771{
4772 switch (card->info.type) {
4773 case QETH_CARD_TYPE_IQD:
4774 return 2;
4775 default:
4776 return 0;
4777 }
4778}
4779
d0ff1f52
UB		 4780static void qeth_determine_capabilities(struct qeth_card *card)
4781{
4782 int rc;
4783 int length;
4784 char *prcd;
4785 struct ccw_device *ddev;
4786 int ddev_offline = 0;
4787
4788 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4789 ddev = CARD_DDEV(card);
4790 if (!ddev->online) {
4791 ddev_offline = 1;
4792 rc = ccw_device_set_online(ddev);
4793 if (rc) {
4794 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4795 goto out;
4796 }
4797 }
4798
4799 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4800 if (rc) {
4801 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4802 dev_name(&card->gdev->dev), rc);
4803 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4804 goto out_offline;
4805 }
4806 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4807 if (ddev_offline)
4808 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4809 kfree(prcd);
4810
4811 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4812 if (rc)
4813 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4814
0da9581d
EL		 4815 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4816 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4817 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4818 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4819 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4820 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4821 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4822 dev_info(&card->gdev->dev,
4823 "Completion Queueing supported\n");
4824 } else {
4825 card->options.cq = QETH_CQ_NOTAVAILABLE;
4826 }
4827
4828
d0ff1f52
UB		 4829out_offline:
4830 if (ddev_offline == 1)
4831 ccw_device_set_offline(ddev);
4832out:
4833 return;
4834}
4835
0da9581d
EL		 4836static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4837 struct qdio_buffer **in_sbal_ptrs,
4838 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4839 int i;
4840
4841 if (card->options.cq == QETH_CQ_ENABLED) {
4842 int offset = QDIO_MAX_BUFFERS_PER_Q *
4843 (card->qdio.no_in_queues - 1);
4844 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4845 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4846 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4847 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4848 }
4849
4850 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4851 }
4852}
4853
4a71df50
FB		 4854static int qeth_qdio_establish(struct qeth_card *card)
4855{
4856 struct qdio_initialize init_data;
4857 char *qib_param_field;
4858 struct qdio_buffer **in_sbal_ptrs;
104ea556 4859 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4860 struct qdio_buffer **out_sbal_ptrs;
4861 int i, j, k;
4862 int rc = 0;
4863
d11ba0c4 4864 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4865
4866 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4867 GFP_KERNEL);
104ea556 4868 if (!qib_param_field) {
4869 rc = -ENOMEM;
4870 goto out_free_nothing;
4871 }
4a71df50
FB		 4872
4873 qeth_create_qib_param_field(card, qib_param_field);
4874 qeth_create_qib_param_field_blkt(card, qib_param_field);
4875
b3332930 4876 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4877 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4878 GFP_KERNEL);
4879 if (!in_sbal_ptrs) {
104ea556 4880 rc = -ENOMEM;
4881 goto out_free_qib_param;
4a71df50 4882 }
0da9581d 4883 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4884 in_sbal_ptrs[i] = (struct qdio_buffer *)
4885 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4886 }
4a71df50 4887
0da9581d
EL		 4888 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4889 GFP_KERNEL);
104ea556 4890 if (!queue_start_poll) {
4891 rc = -ENOMEM;
4892 goto out_free_in_sbals;
4893 }
0da9581d 4894 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4895 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4896
4897 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4898
4a71df50 4899 out_sbal_ptrs =
b3332930 4900 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4901 sizeof(void *), GFP_KERNEL);
4902 if (!out_sbal_ptrs) {
104ea556 4903 rc = -ENOMEM;
4904 goto out_free_queue_start_poll;
4a71df50
FB		 4905 }
4906 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4907 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4908 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4909 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4910 }
4911
4912 memset(&init_data, 0, sizeof(struct qdio_initialize));
4913 init_data.cdev = CARD_DDEV(card);
4914 init_data.q_format = qeth_get_qdio_q_format(card);
4915 init_data.qib_param_field_format = 0;
4916 init_data.qib_param_field = qib_param_field;
0da9581d 4917 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4918 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4919 init_data.input_handler = card->discipline->input_handler;
4920 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4921 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4922 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4923 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4924 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4925 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4926 init_data.scan_threshold =
0fa81cd4 4927 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4928
4929 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4930 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4931 rc = qdio_allocate(&init_data);
4932 if (rc) {
4933 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4934 goto out;
4935 }
4936 rc = qdio_establish(&init_data);
4937 if (rc) {
4a71df50 4938 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4939 qdio_free(CARD_DDEV(card));
4940 }
4a71df50 4941 }
0da9581d
EL		 4942
4943 switch (card->options.cq) {
4944 case QETH_CQ_ENABLED:
4945 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4946 break;
4947 case QETH_CQ_DISABLED:
4948 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4949 break;
4950 default:
4951 break;
4952 }
cc961d40 4953out:
4a71df50 4954 kfree(out_sbal_ptrs);
104ea556 4955out_free_queue_start_poll:
4956 kfree(queue_start_poll);
4957out_free_in_sbals:
4a71df50 4958 kfree(in_sbal_ptrs);
104ea556 4959out_free_qib_param:
4a71df50 4960 kfree(qib_param_field);
104ea556 4961out_free_nothing:
4a71df50
FB		 4962 return rc;
4963}
4964
4965static void qeth_core_free_card(struct qeth_card *card)
4966{
4967
d11ba0c4
PT		 4968 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4969 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4970 qeth_clean_channel(&card->read);
4971 qeth_clean_channel(&card->write);
4972 if (card->dev)
4973 free_netdev(card->dev);
4a71df50 4974 qeth_free_qdio_buffers(card);
6bcac508 4975 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4976 kfree(card);
4977}
4978
395672e0
SR		 4979void qeth_trace_features(struct qeth_card *card)
4980{
4981 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4982 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4983 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4984 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4985 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4986 sizeof(card->info.diagass_support));
395672e0
SR		 4987}
4988EXPORT_SYMBOL_GPL(qeth_trace_features);
4989
4a71df50 4990static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4991 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4992 .driver_info = QETH_CARD_TYPE_OSD},
4993 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4994 .driver_info = QETH_CARD_TYPE_IQD},
4995 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4996 .driver_info = QETH_CARD_TYPE_OSN},
4997 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4998 .driver_info = QETH_CARD_TYPE_OSM},
4999 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5000 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5001 {},
5002};
5003MODULE_DEVICE_TABLE(ccw, qeth_ids);
5004
5005static struct ccw_driver qeth_ccw_driver = {
3bda058b 5006 .driver = {
3e70b3b8 5007 .owner = THIS_MODULE,
3bda058b
SO		 5008 .name = "qeth",
5009 },
4a71df50
FB		 5010 .ids = qeth_ids,
5011 .probe = ccwgroup_probe_ccwdev,
5012 .remove = ccwgroup_remove_ccwdev,
5013};
5014
4a71df50
FB		 5015int qeth_core_hardsetup_card(struct qeth_card *card)
5016{
6ebb7f8d 5017 int retries = 3;
4a71df50
FB		 5018 int rc;
5019
d11ba0c4 5020 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5021 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5022 qeth_update_from_chp_desc(card);
4a71df50 5023retry:
6ebb7f8d 5024 if (retries < 3)
74eacdb9
FB		 5025 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5026 dev_name(&card->gdev->dev));
22ae2790 5027 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5028 ccw_device_set_offline(CARD_DDEV(card));
5029 ccw_device_set_offline(CARD_WDEV(card));
5030 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5031 qdio_free(CARD_DDEV(card));
aa909224
UB		 5032 rc = ccw_device_set_online(CARD_RDEV(card));
5033 if (rc)
5034 goto retriable;
5035 rc = ccw_device_set_online(CARD_WDEV(card));
5036 if (rc)
5037 goto retriable;
5038 rc = ccw_device_set_online(CARD_DDEV(card));
5039 if (rc)
5040 goto retriable;
aa909224 5041retriable:
4a71df50 5042 if (rc == -ERESTARTSYS) {
d11ba0c4 5043 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5044 return rc;
5045 } else if (rc) {
d11ba0c4 5046 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5047 if (--retries < 0)
4a71df50
FB		 5048 goto out;
5049 else
5050 goto retry;
5051 }
d0ff1f52 5052 qeth_determine_capabilities(card);
4a71df50
FB		 5053 qeth_init_tokens(card);
5054 qeth_init_func_level(card);
5055 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5056 if (rc == -ERESTARTSYS) {
d11ba0c4 5057 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5058 return rc;
5059 } else if (rc) {
d11ba0c4 5060 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5061 if (--retries < 0)
5062 goto out;
5063 else
5064 goto retry;
5065 }
5066 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5067 if (rc == -ERESTARTSYS) {
d11ba0c4 5068 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5069 return rc;
5070 } else if (rc) {
d11ba0c4 5071 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5072 if (--retries < 0)
5073 goto out;
5074 else
5075 goto retry;
5076 }
908abbb5 5077 card->read_or_write_problem = 0;
4a71df50
FB		 5078 rc = qeth_mpc_initialize(card);
5079 if (rc) {
d11ba0c4 5080 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5081 goto out;
5082 }
1da74b1c
FB		 5083
5084 card->options.ipa4.supported_funcs = 0;
4d7def2a 5085 card->options.ipa6.supported_funcs = 0;
1da74b1c 5086 card->options.adp.supported_funcs = 0;
b4d72c08 5087 card->options.sbp.supported_funcs = 0;
1da74b1c 5088 card->info.diagass_support = 0;
1aec42bc
TR		 5089 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5090 if (rc == -ENOMEM)
5091 goto out;
5092 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5093 rc = qeth_query_setadapterparms(card);
5094 if (rc < 0) {
5095 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5096 goto out;
5097 }
5098 }
5099 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5100 rc = qeth_query_setdiagass(card);
5101 if (rc < 0) {
5102 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
5103 goto out;
5104 }
5105 }
4a71df50
FB		 5106 return 0;
5107out:
74eacdb9
FB		 5108 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5109 "an error on the device\n");
5110 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5111 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5112 return rc;
5113}
5114EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5115
b3332930
FB		 5116static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5117 struct qdio_buffer_element *element,
4a71df50
FB		 5118 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5119{
5120 struct page *page = virt_to_page(element->addr);
5121 if (*pskb == NULL) {
b3332930
FB		 5122 if (qethbuffer->rx_skb) {
5123 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5124 *pskb = qethbuffer->rx_skb;
5125 qethbuffer->rx_skb = NULL;
5126 } else {
5127 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5128 if (!(*pskb))
5129 return -ENOMEM;
5130 }
5131
4a71df50 5132 skb_reserve(*pskb, ETH_HLEN);
b3332930 5133 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5134 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5135 data_len);
5136 } else {
5137 get_page(page);
b3332930
FB		 5138 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5139 element->addr + offset, QETH_RX_PULL_LEN);
5140 skb_fill_page_desc(*pskb, *pfrag, page,
5141 offset + QETH_RX_PULL_LEN,
5142 data_len - QETH_RX_PULL_LEN);
5143 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5144 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5145 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5146 (*pfrag)++;
5147 }
5148 } else {
5149 get_page(page);
5150 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5151 (*pskb)->data_len += data_len;
5152 (*pskb)->len += data_len;
5153 (*pskb)->truesize += data_len;
5154 (*pfrag)++;
5155 }
0da9581d
EL		 5156
5157
4a71df50
FB		 5158 return 0;
5159}
5160
bca51650
TR		 5161static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5162{
5163 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5164}
5165
4a71df50 5166struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5167 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5168 struct qdio_buffer_element **__element, int *__offset,
5169 struct qeth_hdr **hdr)
5170{
5171 struct qdio_buffer_element *element = *__element;
b3332930 5172 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5173 int offset = *__offset;
5174 struct sk_buff *skb = NULL;
76b11f8e 5175 int skb_len = 0;
4a71df50
FB		 5176 void *data_ptr;
5177 int data_len;
5178 int headroom = 0;
5179 int use_rx_sg = 0;
5180 int frag = 0;
5181
4a71df50
FB		 5182 /* qeth_hdr must not cross element boundaries */
5183 if (element->length < offset + sizeof(struct qeth_hdr)) {
5184 if (qeth_is_last_sbale(element))
5185 return NULL;
5186 element++;
5187 offset = 0;
5188 if (element->length < sizeof(struct qeth_hdr))
5189 return NULL;
5190 }
5191 *hdr = element->addr + offset;
5192
5193 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5194 switch ((*hdr)->hdr.l2.id) {
5195 case QETH_HEADER_TYPE_LAYER2:
5196 skb_len = (*hdr)->hdr.l2.pkt_length;
5197 break;
5198 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5199 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5200 headroom = ETH_HLEN;
76b11f8e
UB		 5201 break;
5202 case QETH_HEADER_TYPE_OSN:
5203 skb_len = (*hdr)->hdr.osn.pdu_length;
5204 headroom = sizeof(struct qeth_hdr);
5205 break;
5206 default:
5207 break;
4a71df50
FB		 5208 }
5209
5210 if (!skb_len)
5211 return NULL;
5212
b3332930
FB		 5213 if (((skb_len >= card->options.rx_sg_cb) &&
5214 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5215 (!atomic_read(&card->force_alloc_skb))) ||
5216 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5217 use_rx_sg = 1;
5218 } else {
5219 skb = dev_alloc_skb(skb_len + headroom);
5220 if (!skb)
5221 goto no_mem;
5222 if (headroom)
5223 skb_reserve(skb, headroom);
5224 }
5225
5226 data_ptr = element->addr + offset;
5227 while (skb_len) {
5228 data_len = min(skb_len, (int)(element->length - offset));
5229 if (data_len) {
5230 if (use_rx_sg) {
b3332930
FB		 5231 if (qeth_create_skb_frag(qethbuffer, element,
5232 &skb, offset, &frag, data_len))
4a71df50
FB		 5233 goto no_mem;
5234 } else {
5235 memcpy(skb_put(skb, data_len), data_ptr,
5236 data_len);
5237 }
5238 }
5239 skb_len -= data_len;
5240 if (skb_len) {
5241 if (qeth_is_last_sbale(element)) {
847a50fd 5242 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5243 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5244 dev_kfree_skb_any(skb);
5245 card->stats.rx_errors++;
5246 return NULL;
5247 }
5248 element++;
5249 offset = 0;
5250 data_ptr = element->addr;
5251 } else {
5252 offset += data_len;
5253 }
5254 }
5255 *__element = element;
5256 *__offset = offset;
5257 if (use_rx_sg && card->options.performance_stats) {
5258 card->perf_stats.sg_skbs_rx++;
5259 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5260 }
5261 return skb;
5262no_mem:
5263 if (net_ratelimit()) {
847a50fd 5264 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5265 }
5266 card->stats.rx_dropped++;
5267 return NULL;
5268}
5269EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5270
8f43fb00
TR		 5271int qeth_setassparms_cb(struct qeth_card *card,
5272 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5273{
5274 struct qeth_ipa_cmd *cmd;
5275
5276 QETH_CARD_TEXT(card, 4, "defadpcb");
5277
5278 cmd = (struct qeth_ipa_cmd *) data;
5279 if (cmd->hdr.return_code == 0) {
5280 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5281 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5282 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5283 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5284 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5285 }
5286 if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM &&
5287 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
5288 card->info.csum_mask = cmd->data.setassparms.data.flags_32bit;
5289 QETH_CARD_TEXT_(card, 3, "csum:%d", card->info.csum_mask);
5290 }
5291 if (cmd->data.setassparms.hdr.assist_no == IPA_OUTBOUND_CHECKSUM &&
5292 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
5293 card->info.tx_csum_mask =
5294 cmd->data.setassparms.data.flags_32bit;
5295 QETH_CARD_TEXT_(card, 3, "tcsu:%d", card->info.tx_csum_mask);
5296 }
5297
5298 return 0;
5299}
8f43fb00 5300EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5301
b475e316
TR		 5302struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5303 enum qeth_ipa_funcs ipa_func,
5304 __u16 cmd_code, __u16 len,
5305 enum qeth_prot_versions prot)
4d7def2a
TR		 5306{
5307 struct qeth_cmd_buffer *iob;
5308 struct qeth_ipa_cmd *cmd;
5309
5310 QETH_CARD_TEXT(card, 4, "getasscm");
5311 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5312
5313 if (iob) {
5314 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5315 cmd->data.setassparms.hdr.assist_no = ipa_func;
5316 cmd->data.setassparms.hdr.length = 8 + len;
5317 cmd->data.setassparms.hdr.command_code = cmd_code;
5318 cmd->data.setassparms.hdr.return_code = 0;
5319 cmd->data.setassparms.hdr.seq_no = 0;
5320 }
5321
5322 return iob;
5323}
b475e316 5324EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5325
5326int qeth_send_setassparms(struct qeth_card *card,
5327 struct qeth_cmd_buffer *iob, __u16 len, long data,
5328 int (*reply_cb)(struct qeth_card *,
5329 struct qeth_reply *, unsigned long),
5330 void *reply_param)
5331{
5332 int rc;
5333 struct qeth_ipa_cmd *cmd;
5334
5335 QETH_CARD_TEXT(card, 4, "sendassp");
5336
5337 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5338 if (len <= sizeof(__u32))
5339 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5340 else /* (len > sizeof(__u32)) */
5341 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5342
5343 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5344 return rc;
5345}
5346EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5347
5348int qeth_send_simple_setassparms(struct qeth_card *card,
5349 enum qeth_ipa_funcs ipa_func,
5350 __u16 cmd_code, long data)
5351{
5352 int rc;
5353 int length = 0;
5354 struct qeth_cmd_buffer *iob;
5355
5356 QETH_CARD_TEXT(card, 4, "simassp4");
5357 if (data)
5358 length = sizeof(__u32);
5359 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5360 length, QETH_PROT_IPV4);
5361 if (!iob)
5362 return -ENOMEM;
5363 rc = qeth_send_setassparms(card, iob, length, data,
5364 qeth_setassparms_cb, NULL);
5365 return rc;
5366}
5367EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5368
4a71df50
FB		 5369static void qeth_unregister_dbf_views(void)
5370{
d11ba0c4
PT		 5371 int x;
5372 for (x = 0; x < QETH_DBF_INFOS; x++) {
5373 debug_unregister(qeth_dbf[x].id);
5374 qeth_dbf[x].id = NULL;
5375 }
4a71df50
FB		 5376}
5377
8e96c51c 5378void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5379{
5380 char dbf_txt_buf[32];
345aa66e 5381 va_list args;
cd023216 5382
8e6a8285 5383 if (!debug_level_enabled(id, level))
cd023216 5384 return;
345aa66e
PT		 5385 va_start(args, fmt);
5386 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5387 va_end(args);
8e96c51c 5388 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5389}
5390EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5391
4a71df50
FB		 5392static int qeth_register_dbf_views(void)
5393{
d11ba0c4
PT		 5394 int ret;
5395 int x;
5396
5397 for (x = 0; x < QETH_DBF_INFOS; x++) {
5398 /* register the areas */
5399 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5400 qeth_dbf[x].pages,
5401 qeth_dbf[x].areas,
5402 qeth_dbf[x].len);
5403 if (qeth_dbf[x].id == NULL) {
5404 qeth_unregister_dbf_views();
5405 return -ENOMEM;
5406 }
4a71df50 5407
d11ba0c4
PT		 5408 /* register a view */
5409 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5410 if (ret) {
5411 qeth_unregister_dbf_views();
5412 return ret;
5413 }
4a71df50 5414
d11ba0c4
PT		 5415 /* set a passing level */
5416 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5417 }
4a71df50
FB		 5418
5419 return 0;
5420}
5421
5422int qeth_core_load_discipline(struct qeth_card *card,
5423 enum qeth_discipline_id discipline)
5424{
5425 int rc = 0;
2022e00c 5426 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5427 switch (discipline) {
5428 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5429 card->discipline = try_then_request_module(
5430 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5431 break;
5432 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5433 card->discipline = try_then_request_module(
5434 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5435 break;
5436 }
c041f2d4 5437 if (!card->discipline) {
74eacdb9
FB		 5438 dev_err(&card->gdev->dev, "There is no kernel module to "
5439 "support discipline %d\n", discipline);
4a71df50
FB		 5440 rc = -EINVAL;
5441 }
2022e00c 5442 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5443 return rc;
5444}
5445
5446void qeth_core_free_discipline(struct qeth_card *card)
5447{
5448 if (card->options.layer2)
c041f2d4 5449 symbol_put(qeth_l2_discipline);
4a71df50 5450 else
c041f2d4
SO		 5451 symbol_put(qeth_l3_discipline);
5452 card->discipline = NULL;
4a71df50
FB		 5453}
5454
b7169c51
SO		 5455static const struct device_type qeth_generic_devtype = {
5456 .name = "qeth_generic",
5457 .groups = qeth_generic_attr_groups,
5458};
5459static const struct device_type qeth_osn_devtype = {
5460 .name = "qeth_osn",
5461 .groups = qeth_osn_attr_groups,
5462};
5463
819dc537
SR		 5464#define DBF_NAME_LEN 20
5465
5466struct qeth_dbf_entry {
5467 char dbf_name[DBF_NAME_LEN];
5468 debug_info_t *dbf_info;
5469 struct list_head dbf_list;
5470};
5471
5472static LIST_HEAD(qeth_dbf_list);
5473static DEFINE_MUTEX(qeth_dbf_list_mutex);
5474
5475static debug_info_t *qeth_get_dbf_entry(char *name)
5476{
5477 struct qeth_dbf_entry *entry;
5478 debug_info_t *rc = NULL;
5479
5480 mutex_lock(&qeth_dbf_list_mutex);
5481 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5482 if (strcmp(entry->dbf_name, name) == 0) {
5483 rc = entry->dbf_info;
5484 break;
5485 }
5486 }
5487 mutex_unlock(&qeth_dbf_list_mutex);
5488 return rc;
5489}
5490
5491static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5492{
5493 struct qeth_dbf_entry *new_entry;
5494
5495 card->debug = debug_register(name, 2, 1, 8);
5496 if (!card->debug) {
5497 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5498 goto err;
5499 }
5500 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5501 goto err_dbg;
5502 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5503 if (!new_entry)
5504 goto err_dbg;
5505 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5506 new_entry->dbf_info = card->debug;
5507 mutex_lock(&qeth_dbf_list_mutex);
5508 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5509 mutex_unlock(&qeth_dbf_list_mutex);
5510
5511 return 0;
5512
5513err_dbg:
5514 debug_unregister(card->debug);
5515err:
5516 return -ENOMEM;
5517}
5518
5519static void qeth_clear_dbf_list(void)
5520{
5521 struct qeth_dbf_entry *entry, *tmp;
5522
5523 mutex_lock(&qeth_dbf_list_mutex);
5524 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5525 list_del(&entry->dbf_list);
5526 debug_unregister(entry->dbf_info);
5527 kfree(entry);
5528 }
5529 mutex_unlock(&qeth_dbf_list_mutex);
5530}
5531
4a71df50
FB		 5532static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5533{
5534 struct qeth_card *card;
5535 struct device *dev;
5536 int rc;
5537 unsigned long flags;
819dc537 5538 char dbf_name[DBF_NAME_LEN];
4a71df50 5539
d11ba0c4 5540 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5541
5542 dev = &gdev->dev;
5543 if (!get_device(dev))
5544 return -ENODEV;
5545
2a0217d5 5546 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5547
5548 card = qeth_alloc_card();
5549 if (!card) {
d11ba0c4 5550 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5551 rc = -ENOMEM;
5552 goto err_dev;
5553 }
af039068
CO		 5554
5555 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5556 dev_name(&gdev->dev));
819dc537 5557 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5558 if (!card->debug) {
819dc537
SR		 5559 rc = qeth_add_dbf_entry(card, dbf_name);
5560 if (rc)
5561 goto err_card;
af039068 5562 }
af039068 5563
4a71df50
FB		 5564 card->read.ccwdev = gdev->cdev[0];
5565 card->write.ccwdev = gdev->cdev[1];
5566 card->data.ccwdev = gdev->cdev[2];
5567 dev_set_drvdata(&gdev->dev, card);
5568 card->gdev = gdev;
5569 gdev->cdev[0]->handler = qeth_irq;
5570 gdev->cdev[1]->handler = qeth_irq;
5571 gdev->cdev[2]->handler = qeth_irq;
5572
5573 rc = qeth_determine_card_type(card);
5574 if (rc) {
d11ba0c4 5575 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5576 goto err_card;
4a71df50
FB		 5577 }
5578 rc = qeth_setup_card(card);
5579 if (rc) {
d11ba0c4 5580 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5581 goto err_card;
4a71df50
FB		 5582 }
5583
5113fec0 5584 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5585 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5586 else
b7169c51
SO		 5587 gdev->dev.type = &qeth_generic_devtype;
5588
5113fec0
UB		 5589 switch (card->info.type) {
5590 case QETH_CARD_TYPE_OSN:
5591 case QETH_CARD_TYPE_OSM:
4a71df50 5592 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5593 if (rc)
819dc537 5594 goto err_card;
c041f2d4 5595 rc = card->discipline->setup(card->gdev);
4a71df50 5596 if (rc)
5113fec0
UB		 5597 goto err_disc;
5598 case QETH_CARD_TYPE_OSD:
5599 case QETH_CARD_TYPE_OSX:
5600 default:
5601 break;
4a71df50
FB		 5602 }
5603
5604 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5605 list_add_tail(&card->list, &qeth_core_card_list.list);
5606 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5607
5608 qeth_determine_capabilities(card);
4a71df50
FB		 5609 return 0;
5610
5113fec0
UB		 5611err_disc:
5612 qeth_core_free_discipline(card);
4a71df50
FB		 5613err_card:
5614 qeth_core_free_card(card);
5615err_dev:
5616 put_device(dev);
5617 return rc;
5618}
5619
5620static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5621{
5622 unsigned long flags;
5623 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5624
28a7e4c9 5625 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5626
c041f2d4
SO		 5627 if (card->discipline) {
5628 card->discipline->remove(gdev);
9dc48ccc
UB		 5629 qeth_core_free_discipline(card);
5630 }
5631
4a71df50
FB		 5632 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5633 list_del(&card->list);
5634 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5635 qeth_core_free_card(card);
5636 dev_set_drvdata(&gdev->dev, NULL);
5637 put_device(&gdev->dev);
5638 return;
5639}
5640
5641static int qeth_core_set_online(struct ccwgroup_device *gdev)
5642{
5643 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5644 int rc = 0;
5645 int def_discipline;
5646
c041f2d4 5647 if (!card->discipline) {
4a71df50
FB		 5648 if (card->info.type == QETH_CARD_TYPE_IQD)
5649 def_discipline = QETH_DISCIPLINE_LAYER3;
5650 else
5651 def_discipline = QETH_DISCIPLINE_LAYER2;
5652 rc = qeth_core_load_discipline(card, def_discipline);
5653 if (rc)
5654 goto err;
c041f2d4 5655 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5656 if (rc)
5657 goto err;
5658 }
c041f2d4 5659 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5660err:
5661 return rc;
5662}
5663
5664static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5665{
5666 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5667 return card->discipline->set_offline(gdev);
4a71df50
FB		 5668}
5669
5670static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5671{
5672 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5673 if (card->discipline && card->discipline->shutdown)
5674 card->discipline->shutdown(gdev);
4a71df50
FB		 5675}
5676
bbcfcdc8
FB		 5677static int qeth_core_prepare(struct ccwgroup_device *gdev)
5678{
5679 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5680 if (card->discipline && card->discipline->prepare)
5681 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5682 return 0;
5683}
5684
5685static void qeth_core_complete(struct ccwgroup_device *gdev)
5686{
5687 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5688 if (card->discipline && card->discipline->complete)
5689 card->discipline->complete(gdev);
bbcfcdc8
FB		 5690}
5691
5692static int qeth_core_freeze(struct ccwgroup_device *gdev)
5693{
5694 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5695 if (card->discipline && card->discipline->freeze)
5696 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5697 return 0;
5698}
5699
5700static int qeth_core_thaw(struct ccwgroup_device *gdev)
5701{
5702 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5703 if (card->discipline && card->discipline->thaw)
5704 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5705 return 0;
5706}
5707
5708static int qeth_core_restore(struct ccwgroup_device *gdev)
5709{
5710 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5711 if (card->discipline && card->discipline->restore)
5712 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5713 return 0;
5714}
5715
4a71df50 5716static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5717 .driver = {
5718 .owner = THIS_MODULE,
5719 .name = "qeth",
5720 },
b7169c51 5721 .setup = qeth_core_probe_device,
4a71df50
FB		 5722 .remove = qeth_core_remove_device,
5723 .set_online = qeth_core_set_online,
5724 .set_offline = qeth_core_set_offline,
5725 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5726 .prepare = qeth_core_prepare,
5727 .complete = qeth_core_complete,
5728 .freeze = qeth_core_freeze,
5729 .thaw = qeth_core_thaw,
5730 .restore = qeth_core_restore,
4a71df50
FB		 5731};
5732
b7169c51
SO		 5733static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5734 const char *buf, size_t count)
4a71df50
FB		 5735{
5736 int err;
4a71df50 5737
b7169c51 5738 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5739 &qeth_core_ccwgroup_driver, 3, buf);
5740
5741 return err ? err : count;
5742}
4a71df50
FB		 5743static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5744
f47e2256
SO		 5745static struct attribute *qeth_drv_attrs[] = {
5746 &driver_attr_group.attr,
5747 NULL,
5748};
5749static struct attribute_group qeth_drv_attr_group = {
5750 .attrs = qeth_drv_attrs,
5751};
5752static const struct attribute_group *qeth_drv_attr_groups[] = {
5753 &qeth_drv_attr_group,
5754 NULL,
5755};
5756
4a71df50
FB		 5757static struct {
5758 const char str[ETH_GSTRING_LEN];
5759} qeth_ethtool_stats_keys[] = {
5760/* 0 */{"rx skbs"},
5761 {"rx buffers"},
5762 {"tx skbs"},
5763 {"tx buffers"},
5764 {"tx skbs no packing"},
5765 {"tx buffers no packing"},
5766 {"tx skbs packing"},
5767 {"tx buffers packing"},
5768 {"tx sg skbs"},
5769 {"tx sg frags"},
5770/* 10 */{"rx sg skbs"},
5771 {"rx sg frags"},
5772 {"rx sg page allocs"},
5773 {"tx large kbytes"},
5774 {"tx large count"},
5775 {"tx pk state ch n->p"},
5776 {"tx pk state ch p->n"},
5777 {"tx pk watermark low"},
5778 {"tx pk watermark high"},
5779 {"queue 0 buffer usage"},
5780/* 20 */{"queue 1 buffer usage"},
5781 {"queue 2 buffer usage"},
5782 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5783 {"rx poll time"},
5784 {"rx poll count"},
4a71df50
FB		 5785 {"rx do_QDIO time"},
5786 {"rx do_QDIO count"},
5787 {"tx handler time"},
5788 {"tx handler count"},
5789 {"tx time"},
5790/* 30 */{"tx count"},
5791 {"tx do_QDIO time"},
5792 {"tx do_QDIO count"},
f61a0d05 5793 {"tx csum"},
c3b4a740 5794 {"tx lin"},
6059c905 5795 {"tx linfail"},
0da9581d
EL		 5796 {"cq handler count"},
5797 {"cq handler time"}
4a71df50
FB		 5798};
5799
df8b4ec8 5800int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5801{
df8b4ec8
BH		 5802 switch (stringset) {
5803 case ETH_SS_STATS:
5804 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5805 default:
5806 return -EINVAL;
5807 }
4a71df50 5808}
df8b4ec8 5809EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5810
5811void qeth_core_get_ethtool_stats(struct net_device *dev,
5812 struct ethtool_stats *stats, u64 *data)
5813{
509e2562 5814 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5815 data[0] = card->stats.rx_packets -
5816 card->perf_stats.initial_rx_packets;
5817 data[1] = card->perf_stats.bufs_rec;
5818 data[2] = card->stats.tx_packets -
5819 card->perf_stats.initial_tx_packets;
5820 data[3] = card->perf_stats.bufs_sent;
5821 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5822 - card->perf_stats.skbs_sent_pack;
5823 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5824 data[6] = card->perf_stats.skbs_sent_pack;
5825 data[7] = card->perf_stats.bufs_sent_pack;
5826 data[8] = card->perf_stats.sg_skbs_sent;
5827 data[9] = card->perf_stats.sg_frags_sent;
5828 data[10] = card->perf_stats.sg_skbs_rx;
5829 data[11] = card->perf_stats.sg_frags_rx;
5830 data[12] = card->perf_stats.sg_alloc_page_rx;
5831 data[13] = (card->perf_stats.large_send_bytes >> 10);
5832 data[14] = card->perf_stats.large_send_cnt;
5833 data[15] = card->perf_stats.sc_dp_p;
5834 data[16] = card->perf_stats.sc_p_dp;
5835 data[17] = QETH_LOW_WATERMARK_PACK;
5836 data[18] = QETH_HIGH_WATERMARK_PACK;
5837 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5838 data[20] = (card->qdio.no_out_queues > 1) ?
5839 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5840 data[21] = (card->qdio.no_out_queues > 2) ?
5841 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5842 data[22] = (card->qdio.no_out_queues > 3) ?
5843 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5844 data[23] = card->perf_stats.inbound_time;
5845 data[24] = card->perf_stats.inbound_cnt;
5846 data[25] = card->perf_stats.inbound_do_qdio_time;
5847 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5848 data[27] = card->perf_stats.outbound_handler_time;
5849 data[28] = card->perf_stats.outbound_handler_cnt;
5850 data[29] = card->perf_stats.outbound_time;
5851 data[30] = card->perf_stats.outbound_cnt;
5852 data[31] = card->perf_stats.outbound_do_qdio_time;
5853 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5854 data[33] = card->perf_stats.tx_csum;
c3b4a740 5855 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 5856 data[35] = card->perf_stats.tx_linfail;
5857 data[36] = card->perf_stats.cq_cnt;
5858 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 5859}
5860EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5861
5862void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5863{
5864 switch (stringset) {
5865 case ETH_SS_STATS:
5866 memcpy(data, &qeth_ethtool_stats_keys,
5867 sizeof(qeth_ethtool_stats_keys));
5868 break;
5869 default:
5870 WARN_ON(1);
5871 break;
5872 }
5873}
5874EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5875
5876void qeth_core_get_drvinfo(struct net_device *dev,
5877 struct ethtool_drvinfo *info)
5878{
509e2562 5879 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5880
5881 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5882 sizeof(info->driver));
5883 strlcpy(info->version, "1.0", sizeof(info->version));
5884 strlcpy(info->fw_version, card->info.mcl_level,
5885 sizeof(info->fw_version));
5886 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5887 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5888}
5889EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5890
02d5cb5b
EC		 5891/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5892/* Autoneg and full-duplex are supported and advertized uncondionally. */
5893/* Always advertize and support all speeds up to specified, and only one */
5894/* specified port type. */
5895static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5896 int maxspeed, int porttype)
5897{
5898 int port_sup, port_adv, spd_sup, spd_adv;
5899
5900 switch (porttype) {
5901 case PORT_TP:
5902 port_sup = SUPPORTED_TP;
5903 port_adv = ADVERTISED_TP;
5904 break;
5905 case PORT_FIBRE:
5906 port_sup = SUPPORTED_FIBRE;
5907 port_adv = ADVERTISED_FIBRE;
5908 break;
5909 default:
5910 port_sup = SUPPORTED_TP;
5911 port_adv = ADVERTISED_TP;
5912 WARN_ON_ONCE(1);
5913 }
5914
5915 /* "Fallthrough" case'es ordered from high to low result in setting */
5916 /* flags cumulatively, starting from the specified speed and down to */
5917 /* the lowest possible. */
5918 spd_sup = 0;
5919 spd_adv = 0;
5920 switch (maxspeed) {
5921 case SPEED_10000:
5922 spd_sup |= SUPPORTED_10000baseT_Full;
5923 spd_adv |= ADVERTISED_10000baseT_Full;
5924 case SPEED_1000:
5925 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5926 spd_adv |= ADVERTISED_1000baseT_Half |
5927 ADVERTISED_1000baseT_Full;
5928 case SPEED_100:
5929 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5930 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5931 case SPEED_10:
5932 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5933 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5934 break;
5935 default:
5936 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5937 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5938 WARN_ON_ONCE(1);
5939 }
5940 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5941 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5942}
5943
3f9975aa
FB		 5944int qeth_core_ethtool_get_settings(struct net_device *netdev,
5945 struct ethtool_cmd *ecmd)
5946{
509e2562 5947 struct qeth_card *card = netdev->ml_priv;
3f9975aa 5948 enum qeth_link_types link_type;
02d5cb5b 5949 struct carrier_info carrier_info;
511c2445 5950 int rc;
d4f3cd49 5951 u32 speed;
3f9975aa
FB		 5952
5953 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5954 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5955 else
5956 link_type = card->info.link_type;
5957
5958 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 5959 ecmd->duplex = DUPLEX_FULL;
5960 ecmd->autoneg = AUTONEG_ENABLE;
5961
5962 switch (link_type) {
5963 case QETH_LINK_TYPE_FAST_ETH:
5964 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 5965 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
d4f3cd49 5966 speed = SPEED_100;
3f9975aa
FB		 5967 ecmd->port = PORT_TP;
5968 break;
5969
5970 case QETH_LINK_TYPE_GBIT_ETH:
5971 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 5972 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
d4f3cd49 5973 speed = SPEED_1000;
3f9975aa
FB		 5974 ecmd->port = PORT_FIBRE;
5975 break;
5976
5977 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 5978 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
d4f3cd49 5979 speed = SPEED_10000;
3f9975aa
FB		 5980 ecmd->port = PORT_FIBRE;
5981 break;
5982
5983 default:
02d5cb5b 5984 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
d4f3cd49 5985 speed = SPEED_10;
3f9975aa
FB		 5986 ecmd->port = PORT_TP;
5987 }
d4f3cd49 5988 ethtool_cmd_speed_set(ecmd, speed);
3f9975aa 5989
02d5cb5b
EC		 5990 /* Check if we can obtain more accurate information. */
5991 /* If QUERY_CARD_INFO command is not supported or fails, */
5992 /* just return the heuristics that was filled above. */
511c2445
EC		 5993 if (!qeth_card_hw_is_reachable(card))
5994 return -ENODEV;
5995 rc = qeth_query_card_info(card, &carrier_info);
5996 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 5997 return 0;
511c2445
EC		 5998 if (rc) /* report error from the hardware operation */
5999 return rc;
6000 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6001
6002 netdev_dbg(netdev,
6003 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6004 carrier_info.card_type,
6005 carrier_info.port_mode,
6006 carrier_info.port_speed);
6007
6008 /* Update attributes for which we've obtained more authoritative */
6009 /* information, leave the rest the way they where filled above. */
6010 switch (carrier_info.card_type) {
6011 case CARD_INFO_TYPE_1G_COPPER_A:
6012 case CARD_INFO_TYPE_1G_COPPER_B:
6013 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
6014 ecmd->port = PORT_TP;
6015 break;
6016 case CARD_INFO_TYPE_1G_FIBRE_A:
6017 case CARD_INFO_TYPE_1G_FIBRE_B:
6018 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
6019 ecmd->port = PORT_FIBRE;
6020 break;
6021 case CARD_INFO_TYPE_10G_FIBRE_A:
6022 case CARD_INFO_TYPE_10G_FIBRE_B:
6023 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
6024 ecmd->port = PORT_FIBRE;
6025 break;
6026 }
6027
6028 switch (carrier_info.port_mode) {
6029 case CARD_INFO_PORTM_FULLDUPLEX:
6030 ecmd->duplex = DUPLEX_FULL;
6031 break;
6032 case CARD_INFO_PORTM_HALFDUPLEX:
6033 ecmd->duplex = DUPLEX_HALF;
6034 break;
6035 }
6036
6037 switch (carrier_info.port_speed) {
6038 case CARD_INFO_PORTS_10M:
d4f3cd49 6039 speed = SPEED_10;
02d5cb5b
EC		 6040 break;
6041 case CARD_INFO_PORTS_100M:
d4f3cd49 6042 speed = SPEED_100;
02d5cb5b
EC		 6043 break;
6044 case CARD_INFO_PORTS_1G:
d4f3cd49 6045 speed = SPEED_1000;
02d5cb5b
EC		 6046 break;
6047 case CARD_INFO_PORTS_10G:
d4f3cd49 6048 speed = SPEED_10000;
02d5cb5b
EC		 6049 break;
6050 }
d4f3cd49 6051 ethtool_cmd_speed_set(ecmd, speed);
02d5cb5b 6052
3f9975aa
FB		 6053 return 0;
6054}
6055EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
6056
8f43fb00 6057static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6058{
8f43fb00 6059 long rxtx_arg;
4d7def2a
TR		 6060 int rc;
6061
8f43fb00 6062 rc = qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_START, 0);
4d7def2a 6063 if (rc) {
8f43fb00
TR		 6064 dev_warn(&card->gdev->dev,
6065 "Starting HW checksumming for %s failed, using SW checksumming\n",
6066 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6067 return rc;
6068 }
8f43fb00
TR		 6069 rxtx_arg = (cstype == IPA_OUTBOUND_CHECKSUM) ? card->info.tx_csum_mask
6070 : card->info.csum_mask;
6071 rc = qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_ENABLE,
6072 rxtx_arg);
4d7def2a 6073 if (rc) {
8f43fb00
TR		 6074 dev_warn(&card->gdev->dev,
6075 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6076 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6077 return rc;
6078 }
8f43fb00
TR		 6079
6080 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6081 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6082 return 0;
6083}
6084
8f43fb00 6085static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a
TR		 6086{
6087 int rc;
6088
6089 if (on) {
8f43fb00 6090 rc = qeth_send_checksum_on(card, cstype);
4d7def2a
TR		 6091 if (rc)
6092 return -EIO;
4d7def2a 6093 } else {
8f43fb00
TR		 6094 rc = qeth_send_simple_setassparms(card, cstype,
6095 IPA_CMD_ASS_STOP, 0);
4d7def2a
TR		 6096 if (rc)
6097 return -EIO;
6098 }
6099 return 0;
6100}
4d7def2a 6101
8f43fb00 6102static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6103{
8f43fb00 6104 int rc;
4d7def2a 6105
8f43fb00 6106 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6107
8f43fb00
TR		 6108 if (on) {
6109 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6110 IPA_CMD_ASS_START, 0);
6111 if (rc) {
6112 dev_warn(&card->gdev->dev,
6113 "Starting outbound TCP segmentation offload for %s failed\n",
6114 QETH_CARD_IFNAME(card));
6115 return -EIO;
6116 }
6117 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6118 } else {
6119 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6120 IPA_CMD_ASS_STOP, 0);
6121 }
4d7def2a
TR		 6122 return rc;
6123}
8f43fb00
TR		 6124
6125int qeth_set_features(struct net_device *dev, netdev_features_t features)
6126{
6127 struct qeth_card *card = dev->ml_priv;
6128 netdev_features_t changed = card->dev->features ^ features;
6129 int rc = 0;
6130
6131 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6132 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6133
6134 if (card->state == CARD_STATE_DOWN ||
6135 card->state == CARD_STATE_RECOVER)
6136 return 0;
6137
6138 if ((changed & NETIF_F_IP_CSUM))
6139 rc = qeth_set_ipa_csum(card,
6140 features & NETIF_F_IP_CSUM ? 1 : 0,
6141 IPA_OUTBOUND_CHECKSUM);
6142 if ((changed & NETIF_F_RXCSUM))
6143 rc |= qeth_set_ipa_csum(card,
6144 features & NETIF_F_RXCSUM ? 1 : 0,
6145 IPA_INBOUND_CHECKSUM);
6146 if ((changed & NETIF_F_TSO))
6147 rc |= qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6148 return rc ? -EIO : 0;
6149}
6150EXPORT_SYMBOL_GPL(qeth_set_features);
6151
6152netdev_features_t qeth_fix_features(struct net_device *dev,
6153 netdev_features_t features)
6154{
6155 struct qeth_card *card = dev->ml_priv;
6156
6157 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6158 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6159 features &= ~NETIF_F_IP_CSUM;
6160 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6161 features &= ~NETIF_F_RXCSUM;
6162 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
6163 features &= ~NETIF_F_TSO;
6164 dev_info(&card->gdev->dev, "Outbound TSO not supported on %s\n",
6165 QETH_CARD_IFNAME(card));
6166 }
6167 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6168 return features;
6169}
6170EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6171
4a71df50
FB		 6172static int __init qeth_core_init(void)
6173{
6174 int rc;
6175
74eacdb9 6176 pr_info("loading core functions\n");
4a71df50 6177 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6178 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6179 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6180 mutex_init(&qeth_mod_mutex);
4a71df50 6181
0f54761d
SR		 6182 qeth_wq = create_singlethread_workqueue("qeth_wq");
6183
4a71df50
FB		 6184 rc = qeth_register_dbf_views();
6185 if (rc)
6186 goto out_err;
035da16f 6187 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6188 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6189 if (rc)
6190 goto register_err;
683d718a
FB		 6191 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6192 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6193 if (!qeth_core_header_cache) {
6194 rc = -ENOMEM;
6195 goto slab_err;
6196 }
0da9581d
EL		 6197 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6198 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6199 if (!qeth_qdio_outbuf_cache) {
6200 rc = -ENOMEM;
6201 goto cqslab_err;
6202 }
afb6ac59
SO		 6203 rc = ccw_driver_register(&qeth_ccw_driver);
6204 if (rc)
6205 goto ccw_err;
6206 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6207 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6208 if (rc)
6209 goto ccwgroup_err;
0da9581d 6210
683d718a 6211 return 0;
afb6ac59
SO		 6212
6213ccwgroup_err:
6214 ccw_driver_unregister(&qeth_ccw_driver);
6215ccw_err:
6216 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6217cqslab_err:
6218 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6219slab_err:
035da16f 6220 root_device_unregister(qeth_core_root_dev);
4a71df50 6221register_err:
4a71df50
FB		 6222 qeth_unregister_dbf_views();
6223out_err:
74eacdb9 6224 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6225 return rc;
6226}
6227
6228static void __exit qeth_core_exit(void)
6229{
819dc537 6230 qeth_clear_dbf_list();
0f54761d 6231 destroy_workqueue(qeth_wq);
4a71df50
FB		 6232 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6233 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6234 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6235 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6236 root_device_unregister(qeth_core_root_dev);
4a71df50 6237 qeth_unregister_dbf_views();
74eacdb9 6238 pr_info("core functions removed\n");
4a71df50
FB		 6239}
6240
6241module_init(qeth_core_init);
6242module_exit(qeth_core_exit);
6243MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6244MODULE_DESCRIPTION("qeth core functions");
6245MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git