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s390/qeth: move common ioctl handling to core
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
4a71df50
FB		 58static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
59static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
60static void qeth_free_buffer_pool(struct qeth_card *);
61static int qeth_qdio_establish(struct qeth_card *);
0da9581d 62static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 63static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
64 struct qeth_qdio_out_buffer *buf,
65 enum iucv_tx_notify notification);
66static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 67static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
68 struct qeth_qdio_out_buffer *buf,
69 enum qeth_qdio_buffer_states newbufstate);
72861ae7 70static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 71
b4d72c08 72struct workqueue_struct *qeth_wq;
c044dc21 73EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 74
511c2445
EC		 75int qeth_card_hw_is_reachable(struct qeth_card *card)
76{
77 return (card->state == CARD_STATE_SOFTSETUP) ||
78 (card->state == CARD_STATE_UP);
79}
80EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
81
0f54761d
SR		 82static void qeth_close_dev_handler(struct work_struct *work)
83{
84 struct qeth_card *card;
85
86 card = container_of(work, struct qeth_card, close_dev_work);
87 QETH_CARD_TEXT(card, 2, "cldevhdl");
88 rtnl_lock();
89 dev_close(card->dev);
90 rtnl_unlock();
91 ccwgroup_set_offline(card->gdev);
92}
93
94void qeth_close_dev(struct qeth_card *card)
95{
96 QETH_CARD_TEXT(card, 2, "cldevsubm");
97 queue_work(qeth_wq, &card->close_dev_work);
98}
99EXPORT_SYMBOL_GPL(qeth_close_dev);
100
4a71df50
FB		 101static inline const char *qeth_get_cardname(struct qeth_card *card)
102{
103 if (card->info.guestlan) {
104 switch (card->info.type) {
5113fec0 105 case QETH_CARD_TYPE_OSD:
7096b187 106 return " Virtual NIC QDIO";
4a71df50 107 case QETH_CARD_TYPE_IQD:
7096b187 108 return " Virtual NIC Hiper";
5113fec0 109 case QETH_CARD_TYPE_OSM:
7096b187 110 return " Virtual NIC QDIO - OSM";
5113fec0 111 case QETH_CARD_TYPE_OSX:
7096b187 112 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 113 default:
114 return " unknown";
115 }
116 } else {
117 switch (card->info.type) {
5113fec0 118 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 119 return " OSD Express";
120 case QETH_CARD_TYPE_IQD:
121 return " HiperSockets";
122 case QETH_CARD_TYPE_OSN:
123 return " OSN QDIO";
5113fec0
UB		 124 case QETH_CARD_TYPE_OSM:
125 return " OSM QDIO";
126 case QETH_CARD_TYPE_OSX:
127 return " OSX QDIO";
4a71df50
FB		 128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133}
134
135/* max length to be returned: 14 */
136const char *qeth_get_cardname_short(struct qeth_card *card)
137{
138 if (card->info.guestlan) {
139 switch (card->info.type) {
5113fec0 140 case QETH_CARD_TYPE_OSD:
7096b187 141 return "Virt.NIC QDIO";
4a71df50 142 case QETH_CARD_TYPE_IQD:
7096b187 143 return "Virt.NIC Hiper";
5113fec0 144 case QETH_CARD_TYPE_OSM:
7096b187 145 return "Virt.NIC OSM";
5113fec0 146 case QETH_CARD_TYPE_OSX:
7096b187 147 return "Virt.NIC OSX";
4a71df50
FB		 148 default:
149 return "unknown";
150 }
151 } else {
152 switch (card->info.type) {
5113fec0 153 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 154 switch (card->info.link_type) {
155 case QETH_LINK_TYPE_FAST_ETH:
156 return "OSD_100";
157 case QETH_LINK_TYPE_HSTR:
158 return "HSTR";
159 case QETH_LINK_TYPE_GBIT_ETH:
160 return "OSD_1000";
161 case QETH_LINK_TYPE_10GBIT_ETH:
162 return "OSD_10GIG";
163 case QETH_LINK_TYPE_LANE_ETH100:
164 return "OSD_FE_LANE";
165 case QETH_LINK_TYPE_LANE_TR:
166 return "OSD_TR_LANE";
167 case QETH_LINK_TYPE_LANE_ETH1000:
168 return "OSD_GbE_LANE";
169 case QETH_LINK_TYPE_LANE:
170 return "OSD_ATM_LANE";
171 default:
172 return "OSD_Express";
173 }
174 case QETH_CARD_TYPE_IQD:
175 return "HiperSockets";
176 case QETH_CARD_TYPE_OSN:
177 return "OSN";
5113fec0
UB		 178 case QETH_CARD_TYPE_OSM:
179 return "OSM_1000";
180 case QETH_CARD_TYPE_OSX:
181 return "OSX_10GIG";
4a71df50
FB		 182 default:
183 return "unknown";
184 }
185 }
186 return "n/a";
187}
188
65d8013c
SR		 189void qeth_set_recovery_task(struct qeth_card *card)
190{
191 card->recovery_task = current;
192}
193EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
194
195void qeth_clear_recovery_task(struct qeth_card *card)
196{
197 card->recovery_task = NULL;
198}
199EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
200
201static bool qeth_is_recovery_task(const struct qeth_card *card)
202{
203 return card->recovery_task == current;
204}
205
4a71df50
FB		 206void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
207 int clear_start_mask)
208{
209 unsigned long flags;
210
211 spin_lock_irqsave(&card->thread_mask_lock, flags);
212 card->thread_allowed_mask = threads;
213 if (clear_start_mask)
214 card->thread_start_mask &= threads;
215 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
216 wake_up(&card->wait_q);
217}
218EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
219
220int qeth_threads_running(struct qeth_card *card, unsigned long threads)
221{
222 unsigned long flags;
223 int rc = 0;
224
225 spin_lock_irqsave(&card->thread_mask_lock, flags);
226 rc = (card->thread_running_mask & threads);
227 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
228 return rc;
229}
230EXPORT_SYMBOL_GPL(qeth_threads_running);
231
232int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
233{
65d8013c
SR		 234 if (qeth_is_recovery_task(card))
235 return 0;
4a71df50
FB		 236 return wait_event_interruptible(card->wait_q,
237 qeth_threads_running(card, threads) == 0);
238}
239EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
240
241void qeth_clear_working_pool_list(struct qeth_card *card)
242{
243 struct qeth_buffer_pool_entry *pool_entry, *tmp;
244
847a50fd 245 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 246 list_for_each_entry_safe(pool_entry, tmp,
247 &card->qdio.in_buf_pool.entry_list, list){
248 list_del(&pool_entry->list);
249 }
250}
251EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
252
253static int qeth_alloc_buffer_pool(struct qeth_card *card)
254{
255 struct qeth_buffer_pool_entry *pool_entry;
256 void *ptr;
257 int i, j;
258
847a50fd 259 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 260 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 261 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 262 if (!pool_entry) {
263 qeth_free_buffer_pool(card);
264 return -ENOMEM;
265 }
266 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 267 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 268 if (!ptr) {
269 while (j > 0)
270 free_page((unsigned long)
271 pool_entry->elements[--j]);
272 kfree(pool_entry);
273 qeth_free_buffer_pool(card);
274 return -ENOMEM;
275 }
276 pool_entry->elements[j] = ptr;
277 }
278 list_add(&pool_entry->init_list,
279 &card->qdio.init_pool.entry_list);
280 }
281 return 0;
282}
283
284int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
285{
847a50fd 286 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 287
288 if ((card->state != CARD_STATE_DOWN) &&
289 (card->state != CARD_STATE_RECOVER))
290 return -EPERM;
291
292 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
293 qeth_clear_working_pool_list(card);
294 qeth_free_buffer_pool(card);
295 card->qdio.in_buf_pool.buf_count = bufcnt;
296 card->qdio.init_pool.buf_count = bufcnt;
297 return qeth_alloc_buffer_pool(card);
298}
76b11f8e 299EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 300
4601ba6c
SO		 301static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
302{
6d284bde
SO		 303 if (!q)
304 return;
305
306 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 307 kfree(q);
308}
309
310static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
311{
312 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
313 int i;
314
315 if (!q)
316 return NULL;
317
6d284bde
SO		 318 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
319 kfree(q);
320 return NULL;
321 }
322
4601ba6c 323 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 324 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 325
326 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
327 return q;
328}
329
0da9581d
EL		 330static inline int qeth_cq_init(struct qeth_card *card)
331{
332 int rc;
333
334 if (card->options.cq == QETH_CQ_ENABLED) {
335 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 336 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
337 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 338 card->qdio.c_q->next_buf_to_init = 127;
339 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
340 card->qdio.no_in_queues - 1, 0,
341 127);
342 if (rc) {
343 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
344 goto out;
345 }
346 }
347 rc = 0;
348out:
349 return rc;
350}
351
352static inline int qeth_alloc_cq(struct qeth_card *card)
353{
354 int rc;
355
356 if (card->options.cq == QETH_CQ_ENABLED) {
357 int i;
358 struct qdio_outbuf_state *outbuf_states;
359
360 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 361 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 362 if (!card->qdio.c_q) {
363 rc = -1;
364 goto kmsg_out;
365 }
0da9581d 366 card->qdio.no_in_queues = 2;
4a912f98 367 card->qdio.out_bufstates =
0da9581d
EL		 368 kzalloc(card->qdio.no_out_queues *
369 QDIO_MAX_BUFFERS_PER_Q *
370 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
371 outbuf_states = card->qdio.out_bufstates;
372 if (outbuf_states == NULL) {
373 rc = -1;
374 goto free_cq_out;
375 }
376 for (i = 0; i < card->qdio.no_out_queues; ++i) {
377 card->qdio.out_qs[i]->bufstates = outbuf_states;
378 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
379 }
380 } else {
381 QETH_DBF_TEXT(SETUP, 2, "nocq");
382 card->qdio.c_q = NULL;
383 card->qdio.no_in_queues = 1;
384 }
385 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
386 rc = 0;
387out:
388 return rc;
389free_cq_out:
4601ba6c 390 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 391 card->qdio.c_q = NULL;
392kmsg_out:
393 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
394 goto out;
395}
396
397static inline void qeth_free_cq(struct qeth_card *card)
398{
399 if (card->qdio.c_q) {
400 --card->qdio.no_in_queues;
4601ba6c 401 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 402 card->qdio.c_q = NULL;
403 }
404 kfree(card->qdio.out_bufstates);
405 card->qdio.out_bufstates = NULL;
406}
407
b3332930
FB		 408static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
409 int delayed) {
410 enum iucv_tx_notify n;
411
412 switch (sbalf15) {
413 case 0:
414 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
415 break;
416 case 4:
417 case 16:
418 case 17:
419 case 18:
420 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
421 TX_NOTIFY_UNREACHABLE;
422 break;
423 default:
424 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
425 TX_NOTIFY_GENERALERROR;
426 break;
427 }
428
429 return n;
430}
431
0da9581d
EL		 432static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
433 int bidx, int forced_cleanup)
434{
72861ae7
EL		 435 if (q->card->options.cq != QETH_CQ_ENABLED)
436 return;
437
0da9581d
EL		 438 if (q->bufs[bidx]->next_pending != NULL) {
439 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
440 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
441
442 while (c) {
443 if (forced_cleanup ||
444 atomic_read(&c->state) ==
445 QETH_QDIO_BUF_HANDLED_DELAYED) {
446 struct qeth_qdio_out_buffer *f = c;
447 QETH_CARD_TEXT(f->q->card, 5, "fp");
448 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 449 /* release here to avoid interleaving between
450 outbound tasklet and inbound tasklet
451 regarding notifications and lifecycle */
452 qeth_release_skbs(c);
453
0da9581d 454 c = f->next_pending;
18af5c17 455 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 456 head->next_pending = c;
457 kmem_cache_free(qeth_qdio_outbuf_cache, f);
458 } else {
459 head = c;
460 c = c->next_pending;
461 }
462
463 }
464 }
72861ae7
EL		 465 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
466 QETH_QDIO_BUF_HANDLED_DELAYED)) {
467 /* for recovery situations */
468 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
469 qeth_init_qdio_out_buf(q, bidx);
470 QETH_CARD_TEXT(q->card, 2, "clprecov");
471 }
0da9581d
EL		 472}
473
474
475static inline void qeth_qdio_handle_aob(struct qeth_card *card,
476 unsigned long phys_aob_addr) {
477 struct qaob *aob;
478 struct qeth_qdio_out_buffer *buffer;
b3332930 479 enum iucv_tx_notify notification;
0da9581d
EL		 480
481 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
482 QETH_CARD_TEXT(card, 5, "haob");
483 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
484 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
485 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
486
b3332930
FB		 487 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
488 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
489 notification = TX_NOTIFY_OK;
490 } else {
18af5c17
SR		 491 WARN_ON_ONCE(atomic_read(&buffer->state) !=
492 QETH_QDIO_BUF_PENDING);
b3332930
FB		 493 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
494 notification = TX_NOTIFY_DELAYED_OK;
495 }
496
497 if (aob->aorc != 0) {
498 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
499 notification = qeth_compute_cq_notification(aob->aorc, 1);
500 }
501 qeth_notify_skbs(buffer->q, buffer, notification);
502
0da9581d
EL		 503 buffer->aob = NULL;
504 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 505 QETH_QDIO_BUF_HANDLED_DELAYED);
506
0da9581d
EL		 507 /* from here on: do not touch buffer anymore */
508 qdio_release_aob(aob);
509}
510
511static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
512{
513 return card->options.cq == QETH_CQ_ENABLED &&
514 card->qdio.c_q != NULL &&
515 queue != 0 &&
516 queue == card->qdio.no_in_queues - 1;
517}
518
519
4a71df50
FB		 520static int qeth_issue_next_read(struct qeth_card *card)
521{
522 int rc;
523 struct qeth_cmd_buffer *iob;
524
847a50fd 525 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 526 if (card->read.state != CH_STATE_UP)
527 return -EIO;
528 iob = qeth_get_buffer(&card->read);
529 if (!iob) {
74eacdb9
FB		 530 dev_warn(&card->gdev->dev, "The qeth device driver "
531 "failed to recover an error on the device\n");
532 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
533 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 534 return -ENOMEM;
535 }
536 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 537 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 538 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
539 (addr_t) iob, 0, 0);
540 if (rc) {
74eacdb9
FB		 541 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
542 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 543 atomic_set(&card->read.irq_pending, 0);
908abbb5 544 card->read_or_write_problem = 1;
4a71df50
FB		 545 qeth_schedule_recovery(card);
546 wake_up(&card->wait_q);
547 }
548 return rc;
549}
550
551static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
552{
553 struct qeth_reply *reply;
554
555 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
556 if (reply) {
557 atomic_set(&reply->refcnt, 1);
558 atomic_set(&reply->received, 0);
559 reply->card = card;
6531084c 560 }
4a71df50
FB		 561 return reply;
562}
563
564static void qeth_get_reply(struct qeth_reply *reply)
565{
566 WARN_ON(atomic_read(&reply->refcnt) <= 0);
567 atomic_inc(&reply->refcnt);
568}
569
570static void qeth_put_reply(struct qeth_reply *reply)
571{
572 WARN_ON(atomic_read(&reply->refcnt) <= 0);
573 if (atomic_dec_and_test(&reply->refcnt))
574 kfree(reply);
575}
576
d11ba0c4 577static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 578 struct qeth_card *card)
579{
4a71df50 580 char *ipa_name;
d11ba0c4 581 int com = cmd->hdr.command;
4a71df50 582 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 583 if (rc)
70919e23
UB		 584 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
585 "x%X \"%s\"\n",
586 ipa_name, com, dev_name(&card->gdev->dev),
587 QETH_CARD_IFNAME(card), rc,
588 qeth_get_ipa_msg(rc));
d11ba0c4 589 else
70919e23
UB		 590 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
591 ipa_name, com, dev_name(&card->gdev->dev),
592 QETH_CARD_IFNAME(card));
4a71df50
FB		 593}
594
595static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
596 struct qeth_cmd_buffer *iob)
597{
598 struct qeth_ipa_cmd *cmd = NULL;
599
847a50fd 600 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 601 if (IS_IPA(iob->data)) {
602 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
603 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 604 if (cmd->hdr.command != IPA_CMD_SETCCID &&
605 cmd->hdr.command != IPA_CMD_DELCCID &&
606 cmd->hdr.command != IPA_CMD_MODCCID &&
607 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 608 qeth_issue_ipa_msg(cmd,
609 cmd->hdr.return_code, card);
4a71df50
FB		 610 return cmd;
611 } else {
612 switch (cmd->hdr.command) {
613 case IPA_CMD_STOPLAN:
0f54761d
SR		 614 if (cmd->hdr.return_code ==
615 IPA_RC_VEPA_TO_VEB_TRANSITION) {
616 dev_err(&card->gdev->dev,
617 "Interface %s is down because the "
618 "adjacent port is no longer in "
619 "reflective relay mode\n",
620 QETH_CARD_IFNAME(card));
621 qeth_close_dev(card);
622 } else {
623 dev_warn(&card->gdev->dev,
74eacdb9
FB		 624 "The link for interface %s on CHPID"
625 " 0x%X failed\n",
4a71df50
FB		 626 QETH_CARD_IFNAME(card),
627 card->info.chpid);
0f54761d
SR		 628 qeth_issue_ipa_msg(cmd,
629 cmd->hdr.return_code, card);
630 }
4a71df50
FB		 631 card->lan_online = 0;
632 if (card->dev && netif_carrier_ok(card->dev))
633 netif_carrier_off(card->dev);
634 return NULL;
635 case IPA_CMD_STARTLAN:
74eacdb9
FB		 636 dev_info(&card->gdev->dev,
637 "The link for %s on CHPID 0x%X has"
638 " been restored\n",
4a71df50
FB		 639 QETH_CARD_IFNAME(card),
640 card->info.chpid);
641 netif_carrier_on(card->dev);
922dc062 642 card->lan_online = 1;
1da74b1c
FB		 643 if (card->info.hwtrap)
644 card->info.hwtrap = 2;
4a71df50
FB		 645 qeth_schedule_recovery(card);
646 return NULL;
9c23f4da
EC		 647 case IPA_CMD_SETBRIDGEPORT_IQD:
648 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 649 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 650 if (card->discipline->control_event_handler
651 (card, cmd))
652 return cmd;
653 else
654 return NULL;
4a71df50
FB		 655 case IPA_CMD_MODCCID:
656 return cmd;
657 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 658 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 659 break;
660 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 661 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 662 break;
663 default:
c4cef07c 664 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 665 "but not a reply!\n");
666 break;
667 }
668 }
669 }
670 return cmd;
671}
672
673void qeth_clear_ipacmd_list(struct qeth_card *card)
674{
675 struct qeth_reply *reply, *r;
676 unsigned long flags;
677
847a50fd 678 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 679
680 spin_lock_irqsave(&card->lock, flags);
681 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
682 qeth_get_reply(reply);
683 reply->rc = -EIO;
684 atomic_inc(&reply->received);
685 list_del_init(&reply->list);
686 wake_up(&reply->wait_q);
687 qeth_put_reply(reply);
688 }
689 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 690 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 691}
692EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
693
5113fec0
UB		 694static int qeth_check_idx_response(struct qeth_card *card,
695 unsigned char *buffer)
4a71df50
FB		 696{
697 if (!buffer)
698 return 0;
699
d11ba0c4 700 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 701 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 702 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 703 "with cause code 0x%02x%s\n",
704 buffer[4],
705 ((buffer[4] == 0x22) ?
706 " -- try another portname" : ""));
847a50fd
CO		 707 QETH_CARD_TEXT(card, 2, "ckidxres");
708 QETH_CARD_TEXT(card, 2, " idxterm");
709 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 710 if (buffer[4] == 0xf6) {
711 dev_err(&card->gdev->dev,
712 "The qeth device is not configured "
713 "for the OSI layer required by z/VM\n");
714 return -EPERM;
715 }
4a71df50
FB		 716 return -EIO;
717 }
718 return 0;
719}
720
bca51650
TR		 721static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
722{
723 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
724 dev_get_drvdata(&cdev->dev))->dev);
725 return card;
726}
727
4a71df50
FB		 728static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
729 __u32 len)
730{
731 struct qeth_card *card;
732
4a71df50 733 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 734 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 735 if (channel == &card->read)
736 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
737 else
738 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
739 channel->ccw.count = len;
740 channel->ccw.cda = (__u32) __pa(iob);
741}
742
743static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
744{
745 __u8 index;
746
847a50fd 747 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 748 index = channel->io_buf_no;
749 do {
750 if (channel->iob[index].state == BUF_STATE_FREE) {
751 channel->iob[index].state = BUF_STATE_LOCKED;
752 channel->io_buf_no = (channel->io_buf_no + 1) %
753 QETH_CMD_BUFFER_NO;
754 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
755 return channel->iob + index;
756 }
757 index = (index + 1) % QETH_CMD_BUFFER_NO;
758 } while (index != channel->io_buf_no);
759
760 return NULL;
761}
762
763void qeth_release_buffer(struct qeth_channel *channel,
764 struct qeth_cmd_buffer *iob)
765{
766 unsigned long flags;
767
847a50fd 768 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 769 spin_lock_irqsave(&channel->iob_lock, flags);
770 memset(iob->data, 0, QETH_BUFSIZE);
771 iob->state = BUF_STATE_FREE;
772 iob->callback = qeth_send_control_data_cb;
773 iob->rc = 0;
774 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 775 wake_up(&channel->wait_q);
4a71df50
FB		 776}
777EXPORT_SYMBOL_GPL(qeth_release_buffer);
778
779static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
780{
781 struct qeth_cmd_buffer *buffer = NULL;
782 unsigned long flags;
783
784 spin_lock_irqsave(&channel->iob_lock, flags);
785 buffer = __qeth_get_buffer(channel);
786 spin_unlock_irqrestore(&channel->iob_lock, flags);
787 return buffer;
788}
789
790struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
791{
792 struct qeth_cmd_buffer *buffer;
793 wait_event(channel->wait_q,
794 ((buffer = qeth_get_buffer(channel)) != NULL));
795 return buffer;
796}
797EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
798
799void qeth_clear_cmd_buffers(struct qeth_channel *channel)
800{
801 int cnt;
802
803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
804 qeth_release_buffer(channel, &channel->iob[cnt]);
805 channel->buf_no = 0;
806 channel->io_buf_no = 0;
807}
808EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
809
810static void qeth_send_control_data_cb(struct qeth_channel *channel,
811 struct qeth_cmd_buffer *iob)
812{
813 struct qeth_card *card;
814 struct qeth_reply *reply, *r;
815 struct qeth_ipa_cmd *cmd;
816 unsigned long flags;
817 int keep_reply;
5113fec0 818 int rc = 0;
4a71df50 819
4a71df50 820 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 821 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 822 rc = qeth_check_idx_response(card, iob->data);
823 switch (rc) {
824 case 0:
825 break;
826 case -EIO:
4a71df50 827 qeth_clear_ipacmd_list(card);
5113fec0 828 qeth_schedule_recovery(card);
01fc3e86 829 /* fall through */
5113fec0 830 default:
4a71df50
FB		 831 goto out;
832 }
833
834 cmd = qeth_check_ipa_data(card, iob);
835 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
836 goto out;
837 /*in case of OSN : check if cmd is set */
838 if (card->info.type == QETH_CARD_TYPE_OSN &&
839 cmd &&
840 cmd->hdr.command != IPA_CMD_STARTLAN &&
841 card->osn_info.assist_cb != NULL) {
842 card->osn_info.assist_cb(card->dev, cmd);
843 goto out;
844 }
845
846 spin_lock_irqsave(&card->lock, flags);
847 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
848 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
849 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
850 qeth_get_reply(reply);
851 list_del_init(&reply->list);
852 spin_unlock_irqrestore(&card->lock, flags);
853 keep_reply = 0;
854 if (reply->callback != NULL) {
855 if (cmd) {
856 reply->offset = (__u16)((char *)cmd -
857 (char *)iob->data);
858 keep_reply = reply->callback(card,
859 reply,
860 (unsigned long)cmd);
861 } else
862 keep_reply = reply->callback(card,
863 reply,
864 (unsigned long)iob);
865 }
866 if (cmd)
867 reply->rc = (u16) cmd->hdr.return_code;
868 else if (iob->rc)
869 reply->rc = iob->rc;
870 if (keep_reply) {
871 spin_lock_irqsave(&card->lock, flags);
872 list_add_tail(&reply->list,
873 &card->cmd_waiter_list);
874 spin_unlock_irqrestore(&card->lock, flags);
875 } else {
876 atomic_inc(&reply->received);
877 wake_up(&reply->wait_q);
878 }
879 qeth_put_reply(reply);
880 goto out;
881 }
882 }
883 spin_unlock_irqrestore(&card->lock, flags);
884out:
885 memcpy(&card->seqno.pdu_hdr_ack,
886 QETH_PDU_HEADER_SEQ_NO(iob->data),
887 QETH_SEQ_NO_LENGTH);
888 qeth_release_buffer(channel, iob);
889}
890
891static int qeth_setup_channel(struct qeth_channel *channel)
892{
893 int cnt;
894
d11ba0c4 895 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 896 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 897 channel->iob[cnt].data =
b3332930 898 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 899 if (channel->iob[cnt].data == NULL)
900 break;
901 channel->iob[cnt].state = BUF_STATE_FREE;
902 channel->iob[cnt].channel = channel;
903 channel->iob[cnt].callback = qeth_send_control_data_cb;
904 channel->iob[cnt].rc = 0;
905 }
906 if (cnt < QETH_CMD_BUFFER_NO) {
907 while (cnt-- > 0)
908 kfree(channel->iob[cnt].data);
909 return -ENOMEM;
910 }
911 channel->buf_no = 0;
912 channel->io_buf_no = 0;
913 atomic_set(&channel->irq_pending, 0);
914 spin_lock_init(&channel->iob_lock);
915
916 init_waitqueue_head(&channel->wait_q);
917 return 0;
918}
919
920static int qeth_set_thread_start_bit(struct qeth_card *card,
921 unsigned long thread)
922{
923 unsigned long flags;
924
925 spin_lock_irqsave(&card->thread_mask_lock, flags);
926 if (!(card->thread_allowed_mask & thread) ||
927 (card->thread_start_mask & thread)) {
928 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
929 return -EPERM;
930 }
931 card->thread_start_mask |= thread;
932 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
933 return 0;
934}
935
936void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
937{
938 unsigned long flags;
939
940 spin_lock_irqsave(&card->thread_mask_lock, flags);
941 card->thread_start_mask &= ~thread;
942 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
943 wake_up(&card->wait_q);
944}
945EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
946
947void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
948{
949 unsigned long flags;
950
951 spin_lock_irqsave(&card->thread_mask_lock, flags);
952 card->thread_running_mask &= ~thread;
953 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
954 wake_up(&card->wait_q);
955}
956EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
957
958static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
959{
960 unsigned long flags;
961 int rc = 0;
962
963 spin_lock_irqsave(&card->thread_mask_lock, flags);
964 if (card->thread_start_mask & thread) {
965 if ((card->thread_allowed_mask & thread) &&
966 !(card->thread_running_mask & thread)) {
967 rc = 1;
968 card->thread_start_mask &= ~thread;
969 card->thread_running_mask |= thread;
970 } else
971 rc = -EPERM;
972 }
973 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
974 return rc;
975}
976
977int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
978{
979 int rc = 0;
980
981 wait_event(card->wait_q,
982 (rc = __qeth_do_run_thread(card, thread)) >= 0);
983 return rc;
984}
985EXPORT_SYMBOL_GPL(qeth_do_run_thread);
986
987void qeth_schedule_recovery(struct qeth_card *card)
988{
847a50fd 989 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 990 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
991 schedule_work(&card->kernel_thread_starter);
992}
993EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
994
995static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
996{
997 int dstat, cstat;
998 char *sense;
847a50fd 999 struct qeth_card *card;
4a71df50
FB		 1000
1001 sense = (char *) irb->ecw;
23d805b6
PO		 1002 cstat = irb->scsw.cmd.cstat;
1003 dstat = irb->scsw.cmd.dstat;
847a50fd 1004 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1005
1006 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1007 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1008 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1009 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1010 dev_warn(&cdev->dev, "The qeth device driver "
1011 "failed to recover an error on the device\n");
5113fec0 1012 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1013 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1014 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1015 16, 1, irb, 64, 1);
1016 return 1;
1017 }
1018
1019 if (dstat & DEV_STAT_UNIT_CHECK) {
1020 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1021 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1022 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1023 return 1;
1024 }
1025 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1026 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1027 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1028 return 1;
4a71df50
FB		 1029 }
1030 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1031 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1032 return 1;
1033 }
1034 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1035 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1036 return 0;
1037 }
847a50fd 1038 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1039 return 1;
1040 }
1041 return 0;
1042}
1043
1044static long __qeth_check_irb_error(struct ccw_device *cdev,
1045 unsigned long intparm, struct irb *irb)
1046{
847a50fd
CO		 1047 struct qeth_card *card;
1048
1049 card = CARD_FROM_CDEV(cdev);
1050
e95051ff 1051 if (!card || !IS_ERR(irb))
4a71df50
FB		 1052 return 0;
1053
1054 switch (PTR_ERR(irb)) {
1055 case -EIO:
74eacdb9
FB		 1056 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1057 dev_name(&cdev->dev));
847a50fd
CO		 1058 QETH_CARD_TEXT(card, 2, "ckirberr");
1059 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1060 break;
1061 case -ETIMEDOUT:
74eacdb9
FB		 1062 dev_warn(&cdev->dev, "A hardware operation timed out"
1063 " on the device\n");
847a50fd
CO		 1064 QETH_CARD_TEXT(card, 2, "ckirberr");
1065 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1066 if (intparm == QETH_RCD_PARM) {
e95051ff 1067 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1068 card->data.state = CH_STATE_DOWN;
1069 wake_up(&card->wait_q);
1070 }
1071 }
1072 break;
1073 default:
74eacdb9
FB		 1074 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1075 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1076 QETH_CARD_TEXT(card, 2, "ckirberr");
1077 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1078 }
1079 return PTR_ERR(irb);
1080}
1081
1082static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1083 struct irb *irb)
1084{
1085 int rc;
1086 int cstat, dstat;
1087 struct qeth_cmd_buffer *buffer;
1088 struct qeth_channel *channel;
1089 struct qeth_card *card;
1090 struct qeth_cmd_buffer *iob;
1091 __u8 index;
1092
4a71df50
FB		 1093 if (__qeth_check_irb_error(cdev, intparm, irb))
1094 return;
23d805b6
PO		 1095 cstat = irb->scsw.cmd.cstat;
1096 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1097
1098 card = CARD_FROM_CDEV(cdev);
1099 if (!card)
1100 return;
1101
847a50fd
CO		 1102 QETH_CARD_TEXT(card, 5, "irq");
1103
4a71df50
FB		 1104 if (card->read.ccwdev == cdev) {
1105 channel = &card->read;
847a50fd 1106 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1107 } else if (card->write.ccwdev == cdev) {
1108 channel = &card->write;
847a50fd 1109 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1110 } else {
1111 channel = &card->data;
847a50fd 1112 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1113 }
1114 atomic_set(&channel->irq_pending, 0);
1115
23d805b6 1116 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1117 channel->state = CH_STATE_STOPPED;
1118
23d805b6 1119 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1120 channel->state = CH_STATE_HALTED;
1121
1122 /*let's wake up immediately on data channel*/
1123 if ((channel == &card->data) && (intparm != 0) &&
1124 (intparm != QETH_RCD_PARM))
1125 goto out;
1126
1127 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1128 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1129 /* we don't have to handle this further */
1130 intparm = 0;
1131 }
1132 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1133 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1134 /* we don't have to handle this further */
1135 intparm = 0;
1136 }
1137 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1138 (dstat & DEV_STAT_UNIT_CHECK) ||
1139 (cstat)) {
1140 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1141 dev_warn(&channel->ccwdev->dev,
1142 "The qeth device driver failed to recover "
1143 "an error on the device\n");
1144 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1145 "0x%X dstat 0x%X\n",
1146 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1147 print_hex_dump(KERN_WARNING, "qeth: irb ",
1148 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1149 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1150 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1151 }
1152 if (intparm == QETH_RCD_PARM) {
1153 channel->state = CH_STATE_DOWN;
1154 goto out;
1155 }
1156 rc = qeth_get_problem(cdev, irb);
1157 if (rc) {
28a7e4c9 1158 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1159 qeth_schedule_recovery(card);
1160 goto out;
1161 }
1162 }
1163
1164 if (intparm == QETH_RCD_PARM) {
1165 channel->state = CH_STATE_RCD_DONE;
1166 goto out;
1167 }
1168 if (intparm) {
1169 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1170 buffer->state = BUF_STATE_PROCESSED;
1171 }
1172 if (channel == &card->data)
1173 return;
1174 if (channel == &card->read &&
1175 channel->state == CH_STATE_UP)
1176 qeth_issue_next_read(card);
1177
1178 iob = channel->iob;
1179 index = channel->buf_no;
1180 while (iob[index].state == BUF_STATE_PROCESSED) {
1181 if (iob[index].callback != NULL)
1182 iob[index].callback(channel, iob + index);
1183
1184 index = (index + 1) % QETH_CMD_BUFFER_NO;
1185 }
1186 channel->buf_no = index;
1187out:
1188 wake_up(&card->wait_q);
1189 return;
1190}
1191
b3332930 1192static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1193 struct qeth_qdio_out_buffer *buf,
b3332930 1194 enum iucv_tx_notify notification)
4a71df50 1195{
4a71df50
FB		 1196 struct sk_buff *skb;
1197
b3332930
FB		 1198 if (skb_queue_empty(&buf->skb_list))
1199 goto out;
1200 skb = skb_peek(&buf->skb_list);
1201 while (skb) {
1202 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1203 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1204 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1205 if (skb->sk) {
1206 struct iucv_sock *iucv = iucv_sk(skb->sk);
1207 iucv->sk_txnotify(skb, notification);
1208 }
1209 }
1210 if (skb_queue_is_last(&buf->skb_list, skb))
1211 skb = NULL;
1212 else
1213 skb = skb_queue_next(&buf->skb_list, skb);
1214 }
1215out:
1216 return;
1217}
1218
1219static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1220{
1221 struct sk_buff *skb;
72861ae7
EL		 1222 struct iucv_sock *iucv;
1223 int notify_general_error = 0;
1224
1225 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1226 notify_general_error = 1;
1227
1228 /* release may never happen from within CQ tasklet scope */
18af5c17 1229 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1230
b67d801f
UB		 1231 skb = skb_dequeue(&buf->skb_list);
1232 while (skb) {
b3332930
FB		 1233 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1234 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1235 if (notify_general_error &&
1236 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1237 if (skb->sk) {
1238 iucv = iucv_sk(skb->sk);
1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1240 }
1241 }
b67d801f
UB		 1242 atomic_dec(&skb->users);
1243 dev_kfree_skb_any(skb);
4a71df50
FB		 1244 skb = skb_dequeue(&buf->skb_list);
1245 }
b3332930
FB		 1246}
1247
1248static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1249 struct qeth_qdio_out_buffer *buf,
1250 enum qeth_qdio_buffer_states newbufstate)
1251{
1252 int i;
1253
1254 /* is PCI flag set on buffer? */
1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1256 atomic_dec(&queue->set_pci_flags_count);
1257
1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1259 qeth_release_skbs(buf);
1260 }
4a71df50 1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1262 if (buf->buffer->element[i].addr && buf->is_header[i])
1263 kmem_cache_free(qeth_core_header_cache,
1264 buf->buffer->element[i].addr);
1265 buf->is_header[i] = 0;
4a71df50
FB		 1266 buf->buffer->element[i].length = 0;
1267 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1268 buf->buffer->element[i].eflags = 0;
1269 buf->buffer->element[i].sflags = 0;
4a71df50 1270 }
3ec90878
JG		 1271 buf->buffer->element[15].eflags = 0;
1272 buf->buffer->element[15].sflags = 0;
4a71df50 1273 buf->next_element_to_fill = 0;
0da9581d
EL		 1274 atomic_set(&buf->state, newbufstate);
1275}
1276
1277static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1278{
1279 int j;
1280
1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1282 if (!q->bufs[j])
1283 continue;
72861ae7 1284 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1286 if (free) {
1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1288 q->bufs[j] = NULL;
1289 }
1290 }
4a71df50
FB		 1291}
1292
1293void qeth_clear_qdio_buffers(struct qeth_card *card)
1294{
0da9581d 1295 int i;
4a71df50 1296
847a50fd 1297 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1298 /* clear outbound buffers to free skbs */
0da9581d 1299 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1300 if (card->qdio.out_qs[i]) {
0da9581d 1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1302 }
0da9581d 1303 }
4a71df50
FB		 1304}
1305EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1306
1307static void qeth_free_buffer_pool(struct qeth_card *card)
1308{
1309 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1310 int i = 0;
4a71df50
FB		 1311 list_for_each_entry_safe(pool_entry, tmp,
1312 &card->qdio.init_pool.entry_list, init_list){
1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1314 free_page((unsigned long)pool_entry->elements[i]);
1315 list_del(&pool_entry->init_list);
1316 kfree(pool_entry);
1317 }
1318}
1319
4a71df50
FB		 1320static void qeth_clean_channel(struct qeth_channel *channel)
1321{
1322 int cnt;
1323
d11ba0c4 1324 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1326 kfree(channel->iob[cnt].data);
1327}
1328
725b9c04
SO		 1329static void qeth_set_single_write_queues(struct qeth_card *card)
1330{
1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1332 (card->qdio.no_out_queues == 4))
1333 qeth_free_qdio_buffers(card);
1334
1335 card->qdio.no_out_queues = 1;
1336 if (card->qdio.default_out_queue != 0)
1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1338
1339 card->qdio.default_out_queue = 0;
1340}
1341
1342static void qeth_set_multiple_write_queues(struct qeth_card *card)
1343{
1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1345 (card->qdio.no_out_queues == 1)) {
1346 qeth_free_qdio_buffers(card);
1347 card->qdio.default_out_queue = 2;
1348 }
1349 card->qdio.no_out_queues = 4;
1350}
1351
1352static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1353{
4a71df50 1354 struct ccw_device *ccwdev;
2bf29df7 1355 struct channel_path_desc *chp_dsc;
4a71df50 1356
5113fec0 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1358
1359 ccwdev = card->data.ccwdev;
725b9c04
SO		 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368 /* CHPP field bit 6 == 1 -> single queue */
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
5113fec0
UB		 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
d11ba0c4 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383 /* inbound */
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
4a71df50 1398 card->options.fake_broadcast = 0;
4a71df50
FB		 1399 card->options.performance_stats = 0;
1400 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1401 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1402 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1403}
1404
1405static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1406{
1407 unsigned long flags;
1408 int rc = 0;
1409
1410 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1411 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1412 (u8) card->thread_start_mask,
1413 (u8) card->thread_allowed_mask,
1414 (u8) card->thread_running_mask);
1415 rc = (card->thread_start_mask & thread);
1416 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1417 return rc;
1418}
1419
1420static void qeth_start_kernel_thread(struct work_struct *work)
1421{
3f36b890 1422 struct task_struct *ts;
4a71df50
FB		 1423 struct qeth_card *card = container_of(work, struct qeth_card,
1424 kernel_thread_starter);
847a50fd 1425 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1426
1427 if (card->read.state != CH_STATE_UP &&
1428 card->write.state != CH_STATE_UP)
1429 return;
3f36b890 1430 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1431 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1432 "qeth_recover");
3f36b890
FB		 1433 if (IS_ERR(ts)) {
1434 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1435 qeth_clear_thread_running_bit(card,
1436 QETH_RECOVER_THREAD);
1437 }
1438 }
4a71df50
FB		 1439}
1440
bca51650 1441static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1442static int qeth_setup_card(struct qeth_card *card)
1443{
1444
d11ba0c4
PT		 1445 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1446 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1447
1448 card->read.state = CH_STATE_DOWN;
1449 card->write.state = CH_STATE_DOWN;
1450 card->data.state = CH_STATE_DOWN;
1451 card->state = CARD_STATE_DOWN;
1452 card->lan_online = 0;
908abbb5 1453 card->read_or_write_problem = 0;
4a71df50
FB		 1454 card->dev = NULL;
1455 spin_lock_init(&card->vlanlock);
1456 spin_lock_init(&card->mclock);
4a71df50
FB		 1457 spin_lock_init(&card->lock);
1458 spin_lock_init(&card->ip_lock);
1459 spin_lock_init(&card->thread_mask_lock);
c4949f07 1460 mutex_init(&card->conf_mutex);
9dc48ccc 1461 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1462 card->thread_start_mask = 0;
1463 card->thread_allowed_mask = 0;
1464 card->thread_running_mask = 0;
1465 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1466 INIT_LIST_HEAD(&card->cmd_waiter_list);
1467 init_waitqueue_head(&card->wait_q);
25985edc 1468 /* initial options */
4a71df50
FB		 1469 qeth_set_intial_options(card);
1470 /* IP address takeover */
1471 INIT_LIST_HEAD(&card->ipato.entries);
1472 card->ipato.enabled = 0;
1473 card->ipato.invert4 = 0;
1474 card->ipato.invert6 = 0;
1475 /* init QDIO stuff */
1476 qeth_init_qdio_info(card);
b3332930 1477 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1478 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1479 return 0;
1480}
1481
6bcac508
MS		 1482static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1483{
1484 struct qeth_card *card = container_of(slr, struct qeth_card,
1485 qeth_service_level);
0d788c7d
KDW		 1486 if (card->info.mcl_level[0])
1487 seq_printf(m, "qeth: %s firmware level %s\n",
1488 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1489}
1490
4a71df50
FB		 1491static struct qeth_card *qeth_alloc_card(void)
1492{
1493 struct qeth_card *card;
1494
d11ba0c4 1495 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1496 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1497 if (!card)
76b11f8e 1498 goto out;
d11ba0c4 1499 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1500 if (qeth_setup_channel(&card->read))
1501 goto out_ip;
1502 if (qeth_setup_channel(&card->write))
1503 goto out_channel;
4a71df50 1504 card->options.layer2 = -1;
6bcac508
MS		 1505 card->qeth_service_level.seq_print = qeth_core_sl_print;
1506 register_service_level(&card->qeth_service_level);
4a71df50 1507 return card;
76b11f8e
UB		 1508
1509out_channel:
1510 qeth_clean_channel(&card->read);
1511out_ip:
76b11f8e
UB		 1512 kfree(card);
1513out:
1514 return NULL;
4a71df50
FB		 1515}
1516
1517static int qeth_determine_card_type(struct qeth_card *card)
1518{
1519 int i = 0;
1520
d11ba0c4 1521 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1522
1523 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1524 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1525 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1526 if ((CARD_RDEV(card)->id.dev_type ==
1527 known_devices[i][QETH_DEV_TYPE_IND]) &&
1528 (CARD_RDEV(card)->id.dev_model ==
1529 known_devices[i][QETH_DEV_MODEL_IND])) {
1530 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1531 card->qdio.no_out_queues =
1532 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1533 card->qdio.no_in_queues = 1;
5113fec0
UB		 1534 card->info.is_multicast_different =
1535 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1536 qeth_update_from_chp_desc(card);
4a71df50
FB		 1537 return 0;
1538 }
1539 i++;
1540 }
1541 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1542 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1543 "unknown type\n");
4a71df50
FB		 1544 return -ENOENT;
1545}
1546
1547static int qeth_clear_channel(struct qeth_channel *channel)
1548{
1549 unsigned long flags;
1550 struct qeth_card *card;
1551 int rc;
1552
4a71df50 1553 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1554 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1555 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1556 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1557 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1558
1559 if (rc)
1560 return rc;
1561 rc = wait_event_interruptible_timeout(card->wait_q,
1562 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1563 if (rc == -ERESTARTSYS)
1564 return rc;
1565 if (channel->state != CH_STATE_STOPPED)
1566 return -ETIME;
1567 channel->state = CH_STATE_DOWN;
1568 return 0;
1569}
1570
1571static int qeth_halt_channel(struct qeth_channel *channel)
1572{
1573 unsigned long flags;
1574 struct qeth_card *card;
1575 int rc;
1576
4a71df50 1577 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1578 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1579 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1580 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1581 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1582
1583 if (rc)
1584 return rc;
1585 rc = wait_event_interruptible_timeout(card->wait_q,
1586 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1587 if (rc == -ERESTARTSYS)
1588 return rc;
1589 if (channel->state != CH_STATE_HALTED)
1590 return -ETIME;
1591 return 0;
1592}
1593
1594static int qeth_halt_channels(struct qeth_card *card)
1595{
1596 int rc1 = 0, rc2 = 0, rc3 = 0;
1597
847a50fd 1598 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1599 rc1 = qeth_halt_channel(&card->read);
1600 rc2 = qeth_halt_channel(&card->write);
1601 rc3 = qeth_halt_channel(&card->data);
1602 if (rc1)
1603 return rc1;
1604 if (rc2)
1605 return rc2;
1606 return rc3;
1607}
1608
1609static int qeth_clear_channels(struct qeth_card *card)
1610{
1611 int rc1 = 0, rc2 = 0, rc3 = 0;
1612
847a50fd 1613 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1614 rc1 = qeth_clear_channel(&card->read);
1615 rc2 = qeth_clear_channel(&card->write);
1616 rc3 = qeth_clear_channel(&card->data);
1617 if (rc1)
1618 return rc1;
1619 if (rc2)
1620 return rc2;
1621 return rc3;
1622}
1623
1624static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1625{
1626 int rc = 0;
1627
847a50fd 1628 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1629
1630 if (halt)
1631 rc = qeth_halt_channels(card);
1632 if (rc)
1633 return rc;
1634 return qeth_clear_channels(card);
1635}
1636
1637int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1638{
1639 int rc = 0;
1640
847a50fd 1641 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1642 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1643 QETH_QDIO_CLEANING)) {
1644 case QETH_QDIO_ESTABLISHED:
1645 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1646 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1647 QDIO_FLAG_CLEANUP_USING_HALT);
1648 else
cc961d40 1649 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1650 QDIO_FLAG_CLEANUP_USING_CLEAR);
1651 if (rc)
847a50fd 1652 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1653 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1654 break;
1655 case QETH_QDIO_CLEANING:
1656 return rc;
1657 default:
1658 break;
1659 }
1660 rc = qeth_clear_halt_card(card, use_halt);
1661 if (rc)
847a50fd 1662 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1663 card->state = CARD_STATE_DOWN;
1664 return rc;
1665}
1666EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1667
1668static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1669 int *length)
1670{
1671 struct ciw *ciw;
1672 char *rcd_buf;
1673 int ret;
1674 struct qeth_channel *channel = &card->data;
1675 unsigned long flags;
1676
1677 /*
1678 * scan for RCD command in extended SenseID data
1679 */
1680 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1681 if (!ciw || ciw->cmd == 0)
1682 return -EOPNOTSUPP;
1683 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1684 if (!rcd_buf)
1685 return -ENOMEM;
1686
1687 channel->ccw.cmd_code = ciw->cmd;
1688 channel->ccw.cda = (__u32) __pa(rcd_buf);
1689 channel->ccw.count = ciw->count;
1690 channel->ccw.flags = CCW_FLAG_SLI;
1691 channel->state = CH_STATE_RCD;
1692 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1693 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1694 QETH_RCD_PARM, LPM_ANYPATH, 0,
1695 QETH_RCD_TIMEOUT);
1696 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1697 if (!ret)
1698 wait_event(card->wait_q,
1699 (channel->state == CH_STATE_RCD_DONE ||
1700 channel->state == CH_STATE_DOWN));
1701 if (channel->state == CH_STATE_DOWN)
1702 ret = -EIO;
1703 else
1704 channel->state = CH_STATE_DOWN;
1705 if (ret) {
1706 kfree(rcd_buf);
1707 *buffer = NULL;
1708 *length = 0;
1709 } else {
1710 *length = ciw->count;
1711 *buffer = rcd_buf;
1712 }
1713 return ret;
1714}
1715
a60389ab 1716static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1717{
a60389ab 1718 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1719 card->info.chpid = prcd[30];
1720 card->info.unit_addr2 = prcd[31];
1721 card->info.cula = prcd[63];
1722 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1723 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1724}
1725
1726static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1727{
1728 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1729
e6e056ba 1730 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1731 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1732 card->info.blkt.time_total = 0;
1733 card->info.blkt.inter_packet = 0;
1734 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1735 } else {
1736 card->info.blkt.time_total = 250;
1737 card->info.blkt.inter_packet = 5;
1738 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1739 }
4a71df50
FB		 1740}
1741
1742static void qeth_init_tokens(struct qeth_card *card)
1743{
1744 card->token.issuer_rm_w = 0x00010103UL;
1745 card->token.cm_filter_w = 0x00010108UL;
1746 card->token.cm_connection_w = 0x0001010aUL;
1747 card->token.ulp_filter_w = 0x0001010bUL;
1748 card->token.ulp_connection_w = 0x0001010dUL;
1749}
1750
1751static void qeth_init_func_level(struct qeth_card *card)
1752{
5113fec0
UB		 1753 switch (card->info.type) {
1754 case QETH_CARD_TYPE_IQD:
6298263a 1755 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1756 break;
1757 case QETH_CARD_TYPE_OSD:
0132951e 1758 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1759 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1760 break;
1761 default:
1762 break;
4a71df50
FB		 1763 }
1764}
1765
4a71df50
FB		 1766static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1767 void (*idx_reply_cb)(struct qeth_channel *,
1768 struct qeth_cmd_buffer *))
1769{
1770 struct qeth_cmd_buffer *iob;
1771 unsigned long flags;
1772 int rc;
1773 struct qeth_card *card;
1774
d11ba0c4 1775 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1776 card = CARD_FROM_CDEV(channel->ccwdev);
1777 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1778 if (!iob)
1779 return -ENOMEM;
4a71df50
FB		 1780 iob->callback = idx_reply_cb;
1781 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1782 channel->ccw.count = QETH_BUFSIZE;
1783 channel->ccw.cda = (__u32) __pa(iob->data);
1784
1785 wait_event(card->wait_q,
1786 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1787 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1788 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1789 rc = ccw_device_start(channel->ccwdev,
1790 &channel->ccw, (addr_t) iob, 0, 0);
1791 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1792
1793 if (rc) {
14cc21b6 1794 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1795 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1796 atomic_set(&channel->irq_pending, 0);
1797 wake_up(&card->wait_q);
1798 return rc;
1799 }
1800 rc = wait_event_interruptible_timeout(card->wait_q,
1801 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1802 if (rc == -ERESTARTSYS)
1803 return rc;
1804 if (channel->state != CH_STATE_UP) {
1805 rc = -ETIME;
d11ba0c4 1806 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1807 qeth_clear_cmd_buffers(channel);
1808 } else
1809 rc = 0;
1810 return rc;
1811}
1812
1813static int qeth_idx_activate_channel(struct qeth_channel *channel,
1814 void (*idx_reply_cb)(struct qeth_channel *,
1815 struct qeth_cmd_buffer *))
1816{
1817 struct qeth_card *card;
1818 struct qeth_cmd_buffer *iob;
1819 unsigned long flags;
1820 __u16 temp;
1821 __u8 tmp;
1822 int rc;
f06f6f32 1823 struct ccw_dev_id temp_devid;
4a71df50
FB		 1824
1825 card = CARD_FROM_CDEV(channel->ccwdev);
1826
d11ba0c4 1827 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1828
1829 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1830 if (!iob)
1831 return -ENOMEM;
4a71df50
FB		 1832 iob->callback = idx_reply_cb;
1833 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1834 channel->ccw.count = IDX_ACTIVATE_SIZE;
1835 channel->ccw.cda = (__u32) __pa(iob->data);
1836 if (channel == &card->write) {
1837 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1838 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1839 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1840 card->seqno.trans_hdr++;
1841 } else {
1842 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1843 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1844 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1845 }
1846 tmp = ((__u8)card->info.portno) | 0x80;
1847 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1848 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1849 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1850 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1851 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1852 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1853 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1854 temp = (card->info.cula << 8) + card->info.unit_addr2;
1855 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1856
1857 wait_event(card->wait_q,
1858 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1859 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1860 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1861 rc = ccw_device_start(channel->ccwdev,
1862 &channel->ccw, (addr_t) iob, 0, 0);
1863 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1864
1865 if (rc) {
14cc21b6
FB		 1866 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1867 rc);
d11ba0c4 1868 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1869 atomic_set(&channel->irq_pending, 0);
1870 wake_up(&card->wait_q);
1871 return rc;
1872 }
1873 rc = wait_event_interruptible_timeout(card->wait_q,
1874 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1875 if (rc == -ERESTARTSYS)
1876 return rc;
1877 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1878 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1879 " failed to recover an error on the device\n");
1880 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1881 dev_name(&channel->ccwdev->dev));
d11ba0c4 1882 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1883 qeth_clear_cmd_buffers(channel);
1884 return -ETIME;
1885 }
1886 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1887}
1888
1889static int qeth_peer_func_level(int level)
1890{
1891 if ((level & 0xff) == 8)
1892 return (level & 0xff) + 0x400;
1893 if (((level >> 8) & 3) == 1)
1894 return (level & 0xff) + 0x200;
1895 return level;
1896}
1897
1898static void qeth_idx_write_cb(struct qeth_channel *channel,
1899 struct qeth_cmd_buffer *iob)
1900{
1901 struct qeth_card *card;
1902 __u16 temp;
1903
d11ba0c4 1904 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1905
1906 if (channel->state == CH_STATE_DOWN) {
1907 channel->state = CH_STATE_ACTIVATING;
1908 goto out;
1909 }
1910 card = CARD_FROM_CDEV(channel->ccwdev);
1911
1912 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1913 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1914 dev_err(&card->write.ccwdev->dev,
1915 "The adapter is used exclusively by another "
1916 "host\n");
4a71df50 1917 else
74eacdb9
FB		 1918 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1919 " negative reply\n",
1920 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1921 goto out;
1922 }
1923 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1924 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1925 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1926 "function level mismatch (sent: 0x%x, received: "
1927 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1928 card->info.func_level, temp);
4a71df50
FB		 1929 goto out;
1930 }
1931 channel->state = CH_STATE_UP;
1932out:
1933 qeth_release_buffer(channel, iob);
1934}
1935
1936static void qeth_idx_read_cb(struct qeth_channel *channel,
1937 struct qeth_cmd_buffer *iob)
1938{
1939 struct qeth_card *card;
1940 __u16 temp;
1941
d11ba0c4 1942 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1943 if (channel->state == CH_STATE_DOWN) {
1944 channel->state = CH_STATE_ACTIVATING;
1945 goto out;
1946 }
1947
1948 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1949 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1950 goto out;
1951
1952 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1953 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1954 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1955 dev_err(&card->write.ccwdev->dev,
1956 "The adapter is used exclusively by another "
1957 "host\n");
5113fec0
UB		 1958 break;
1959 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1960 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1961 dev_err(&card->read.ccwdev->dev,
1962 "Setting the device online failed because of "
01fc3e86 1963 "insufficient authorization\n");
5113fec0
UB		 1964 break;
1965 default:
74eacdb9
FB		 1966 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1967 " negative reply\n",
1968 dev_name(&card->read.ccwdev->dev));
5113fec0 1969 }
01fc3e86
UB		 1970 QETH_CARD_TEXT_(card, 2, "idxread%c",
1971 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1972 goto out;
1973 }
1974
4a71df50
FB		 1975 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1976 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1977 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1978 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1979 dev_name(&card->read.ccwdev->dev),
1980 card->info.func_level, temp);
4a71df50
FB		 1981 goto out;
1982 }
1983 memcpy(&card->token.issuer_rm_r,
1984 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1985 QETH_MPC_TOKEN_LENGTH);
1986 memcpy(&card->info.mcl_level[0],
1987 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1988 channel->state = CH_STATE_UP;
1989out:
1990 qeth_release_buffer(channel, iob);
1991}
1992
1993void qeth_prepare_control_data(struct qeth_card *card, int len,
1994 struct qeth_cmd_buffer *iob)
1995{
1996 qeth_setup_ccw(&card->write, iob->data, len);
1997 iob->callback = qeth_release_buffer;
1998
1999 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2000 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2001 card->seqno.trans_hdr++;
2002 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2003 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2004 card->seqno.pdu_hdr++;
2005 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2006 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2007 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2008}
2009EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2010
efbbc1d5
EC		 2011/**
2012 * qeth_send_control_data() - send control command to the card
2013 * @card: qeth_card structure pointer
2014 * @len: size of the command buffer
2015 * @iob: qeth_cmd_buffer pointer
2016 * @reply_cb: callback function pointer
2017 * @cb_card: pointer to the qeth_card structure
2018 * @cb_reply: pointer to the qeth_reply structure
2019 * @cb_cmd: pointer to the original iob for non-IPA
2020 * commands, or to the qeth_ipa_cmd structure
2021 * for the IPA commands.
2022 * @reply_param: private pointer passed to the callback
2023 *
2024 * Returns the value of the `return_code' field of the response
2025 * block returned from the hardware, or other error indication.
2026 * Value of zero indicates successful execution of the command.
2027 *
2028 * Callback function gets called one or more times, with cb_cmd
2029 * pointing to the response returned by the hardware. Callback
2030 * function must return non-zero if more reply blocks are expected,
2031 * and zero if the last or only reply block is received. Callback
2032 * function can get the value of the reply_param pointer from the
2033 * field 'param' of the structure qeth_reply.
2034 */
2035
4a71df50
FB		 2036int qeth_send_control_data(struct qeth_card *card, int len,
2037 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2038 int (*reply_cb)(struct qeth_card *cb_card,
2039 struct qeth_reply *cb_reply,
2040 unsigned long cb_cmd),
4a71df50
FB		 2041 void *reply_param)
2042{
2043 int rc;
2044 unsigned long flags;
2045 struct qeth_reply *reply = NULL;
7834cd5a 2046 unsigned long timeout, event_timeout;
5b54e16f 2047 struct qeth_ipa_cmd *cmd;
4a71df50 2048
847a50fd 2049 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2050
908abbb5
UB		 2051 if (card->read_or_write_problem) {
2052 qeth_release_buffer(iob->channel, iob);
2053 return -EIO;
2054 }
4a71df50
FB		 2055 reply = qeth_alloc_reply(card);
2056 if (!reply) {
4a71df50
FB		 2057 return -ENOMEM;
2058 }
2059 reply->callback = reply_cb;
2060 reply->param = reply_param;
2061 if (card->state == CARD_STATE_DOWN)
2062 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2063 else
2064 reply->seqno = card->seqno.ipa++;
2065 init_waitqueue_head(&reply->wait_q);
2066 spin_lock_irqsave(&card->lock, flags);
2067 list_add_tail(&reply->list, &card->cmd_waiter_list);
2068 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2069 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2070
2071 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2072 qeth_prepare_control_data(card, len, iob);
2073
2074 if (IS_IPA(iob->data))
7834cd5a 2075 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2076 else
7834cd5a
HC		 2077 event_timeout = QETH_TIMEOUT;
2078 timeout = jiffies + event_timeout;
4a71df50 2079
847a50fd 2080 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2081 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2082 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2083 (addr_t) iob, 0, 0);
2084 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2085 if (rc) {
74eacdb9
FB		 2086 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2087 "ccw_device_start rc = %i\n",
2088 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2089 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2090 spin_lock_irqsave(&card->lock, flags);
2091 list_del_init(&reply->list);
2092 qeth_put_reply(reply);
2093 spin_unlock_irqrestore(&card->lock, flags);
2094 qeth_release_buffer(iob->channel, iob);
2095 atomic_set(&card->write.irq_pending, 0);
2096 wake_up(&card->wait_q);
2097 return rc;
2098 }
5b54e16f
FB		 2099
2100 /* we have only one long running ipassist, since we can ensure
2101 process context of this command we can sleep */
2102 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2103 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2104 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2105 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2106 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2107 goto time_err;
2108 } else {
2109 while (!atomic_read(&reply->received)) {
2110 if (time_after(jiffies, timeout))
2111 goto time_err;
2112 cpu_relax();
6531084c 2113 }
5b54e16f
FB		 2114 }
2115
70919e23
UB		 2116 if (reply->rc == -EIO)
2117 goto error;
5b54e16f
FB		 2118 rc = reply->rc;
2119 qeth_put_reply(reply);
2120 return rc;
2121
2122time_err:
70919e23 2123 reply->rc = -ETIME;
5b54e16f
FB		 2124 spin_lock_irqsave(&reply->card->lock, flags);
2125 list_del_init(&reply->list);
2126 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2127 atomic_inc(&reply->received);
70919e23 2128error:
908abbb5
UB		 2129 atomic_set(&card->write.irq_pending, 0);
2130 qeth_release_buffer(iob->channel, iob);
2131 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2132 rc = reply->rc;
2133 qeth_put_reply(reply);
2134 return rc;
2135}
2136EXPORT_SYMBOL_GPL(qeth_send_control_data);
2137
2138static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2139 unsigned long data)
2140{
2141 struct qeth_cmd_buffer *iob;
2142
d11ba0c4 2143 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2144
2145 iob = (struct qeth_cmd_buffer *) data;
2146 memcpy(&card->token.cm_filter_r,
2147 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2148 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2149 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2150 return 0;
2151}
2152
2153static int qeth_cm_enable(struct qeth_card *card)
2154{
2155 int rc;
2156 struct qeth_cmd_buffer *iob;
2157
d11ba0c4 2158 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2159
2160 iob = qeth_wait_for_buffer(&card->write);
2161 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2162 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2163 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2164 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2165 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2166
2167 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2168 qeth_cm_enable_cb, NULL);
2169 return rc;
2170}
2171
2172static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2173 unsigned long data)
2174{
2175
2176 struct qeth_cmd_buffer *iob;
2177
d11ba0c4 2178 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2179
2180 iob = (struct qeth_cmd_buffer *) data;
2181 memcpy(&card->token.cm_connection_r,
2182 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2183 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2184 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2185 return 0;
2186}
2187
2188static int qeth_cm_setup(struct qeth_card *card)
2189{
2190 int rc;
2191 struct qeth_cmd_buffer *iob;
2192
d11ba0c4 2193 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2194
2195 iob = qeth_wait_for_buffer(&card->write);
2196 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2197 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2198 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2199 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2200 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2201 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2202 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2203 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2204 qeth_cm_setup_cb, NULL);
2205 return rc;
2206
2207}
2208
2209static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2210{
2211 switch (card->info.type) {
2212 case QETH_CARD_TYPE_UNKNOWN:
2213 return 1500;
2214 case QETH_CARD_TYPE_IQD:
2215 return card->info.max_mtu;
5113fec0 2216 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2217 switch (card->info.link_type) {
2218 case QETH_LINK_TYPE_HSTR:
2219 case QETH_LINK_TYPE_LANE_TR:
2220 return 2000;
2221 default:
fe44014a 2222 return card->options.layer2 ? 1500 : 1492;
4a71df50 2223 }
5113fec0
UB		 2224 case QETH_CARD_TYPE_OSM:
2225 case QETH_CARD_TYPE_OSX:
fe44014a 2226 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2227 default:
2228 return 1500;
2229 }
2230}
2231
4a71df50
FB		 2232static inline int qeth_get_mtu_outof_framesize(int framesize)
2233{
2234 switch (framesize) {
2235 case 0x4000:
2236 return 8192;
2237 case 0x6000:
2238 return 16384;
2239 case 0xa000:
2240 return 32768;
2241 case 0xffff:
2242 return 57344;
2243 default:
2244 return 0;
2245 }
2246}
2247
2248static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2249{
2250 switch (card->info.type) {
5113fec0
UB		 2251 case QETH_CARD_TYPE_OSD:
2252 case QETH_CARD_TYPE_OSM:
2253 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2254 case QETH_CARD_TYPE_IQD:
2255 return ((mtu >= 576) &&
9853b97b 2256 (mtu <= card->info.max_mtu));
4a71df50
FB		 2257 case QETH_CARD_TYPE_OSN:
2258 case QETH_CARD_TYPE_UNKNOWN:
2259 default:
2260 return 1;
2261 }
2262}
2263
2264static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2265 unsigned long data)
2266{
2267
2268 __u16 mtu, framesize;
2269 __u16 len;
2270 __u8 link_type;
2271 struct qeth_cmd_buffer *iob;
2272
d11ba0c4 2273 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2274
2275 iob = (struct qeth_cmd_buffer *) data;
2276 memcpy(&card->token.ulp_filter_r,
2277 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2278 QETH_MPC_TOKEN_LENGTH);
9853b97b 2279 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2280 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2281 mtu = qeth_get_mtu_outof_framesize(framesize);
2282 if (!mtu) {
2283 iob->rc = -EINVAL;
d11ba0c4 2284 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2285 return 0;
2286 }
8b2e18f6
UB		 2287 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2288 /* frame size has changed */
2289 if (card->dev &&
2290 ((card->dev->mtu == card->info.initial_mtu) ||
2291 (card->dev->mtu > mtu)))
2292 card->dev->mtu = mtu;
2293 qeth_free_qdio_buffers(card);
2294 }
4a71df50 2295 card->info.initial_mtu = mtu;
8b2e18f6 2296 card->info.max_mtu = mtu;
4a71df50
FB		 2297 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2298 } else {
9853b97b
FB		 2299 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2300 iob->data);
fe44014a
SR		 2301 card->info.initial_mtu = min(card->info.max_mtu,
2302 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2303 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2304 }
2305
2306 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2307 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2308 memcpy(&link_type,
2309 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2310 card->info.link_type = link_type;
2311 } else
2312 card->info.link_type = 0;
01fc3e86 2313 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2314 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2315 return 0;
2316}
2317
2318static int qeth_ulp_enable(struct qeth_card *card)
2319{
2320 int rc;
2321 char prot_type;
2322 struct qeth_cmd_buffer *iob;
2323
2324 /*FIXME: trace view callbacks*/
d11ba0c4 2325 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2326
2327 iob = qeth_wait_for_buffer(&card->write);
2328 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2329
2330 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2331 (__u8) card->info.portno;
2332 if (card->options.layer2)
2333 if (card->info.type == QETH_CARD_TYPE_OSN)
2334 prot_type = QETH_PROT_OSN2;
2335 else
2336 prot_type = QETH_PROT_LAYER2;
2337 else
2338 prot_type = QETH_PROT_TCPIP;
2339
2340 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2341 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2342 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2343 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2344 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2345 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2346 qeth_ulp_enable_cb, NULL);
2347 return rc;
2348
2349}
2350
2351static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2352 unsigned long data)
2353{
2354 struct qeth_cmd_buffer *iob;
2355
d11ba0c4 2356 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2357
2358 iob = (struct qeth_cmd_buffer *) data;
2359 memcpy(&card->token.ulp_connection_r,
2360 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2361 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2362 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2363 3)) {
2364 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2365 dev_err(&card->gdev->dev, "A connection could not be "
2366 "established because of an OLM limit\n");
bbb822a8 2367 iob->rc = -EMLINK;
65a1f898 2368 }
d11ba0c4 2369 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2370 return 0;
4a71df50
FB		 2371}
2372
2373static int qeth_ulp_setup(struct qeth_card *card)
2374{
2375 int rc;
2376 __u16 temp;
2377 struct qeth_cmd_buffer *iob;
2378 struct ccw_dev_id dev_id;
2379
d11ba0c4 2380 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2381
2382 iob = qeth_wait_for_buffer(&card->write);
2383 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2384
2385 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2386 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2387 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2388 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2389 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2390 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2391
2392 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2393 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2394 temp = (card->info.cula << 8) + card->info.unit_addr2;
2395 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2396 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2397 qeth_ulp_setup_cb, NULL);
2398 return rc;
2399}
2400
0da9581d
EL		 2401static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2402{
2403 int rc;
2404 struct qeth_qdio_out_buffer *newbuf;
2405
2406 rc = 0;
2407 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2408 if (!newbuf) {
2409 rc = -ENOMEM;
2410 goto out;
2411 }
d445a4e2 2412 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2413 skb_queue_head_init(&newbuf->skb_list);
2414 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2415 newbuf->q = q;
2416 newbuf->aob = NULL;
2417 newbuf->next_pending = q->bufs[bidx];
2418 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2419 q->bufs[bidx] = newbuf;
2420 if (q->bufstates) {
2421 q->bufstates[bidx].user = newbuf;
2422 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2423 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2424 QETH_CARD_TEXT_(q->card, 2, "%lx",
2425 (long) newbuf->next_pending);
2426 }
2427out:
2428 return rc;
2429}
2430
d445a4e2
SO		 2431static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2432{
2433 if (!q)
2434 return;
2435
2436 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2437 kfree(q);
2438}
2439
2440static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2441{
2442 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2443
2444 if (!q)
2445 return NULL;
2446
2447 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2448 kfree(q);
2449 return NULL;
2450 }
2451 return q;
2452}
0da9581d 2453
4a71df50
FB		 2454static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2455{
2456 int i, j;
2457
d11ba0c4 2458 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2459
2460 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2461 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2462 return 0;
2463
4601ba6c
SO		 2464 QETH_DBF_TEXT(SETUP, 2, "inq");
2465 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2466 if (!card->qdio.in_q)
2467 goto out_nomem;
4601ba6c 2468
4a71df50
FB		 2469 /* inbound buffer pool */
2470 if (qeth_alloc_buffer_pool(card))
2471 goto out_freeinq;
0da9581d 2472
4a71df50
FB		 2473 /* outbound */
2474 card->qdio.out_qs =
b3332930 2475 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2476 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2477 if (!card->qdio.out_qs)
2478 goto out_freepool;
2479 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2480 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2481 if (!card->qdio.out_qs[i])
2482 goto out_freeoutq;
d11ba0c4
PT		 2483 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2484 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2485 card->qdio.out_qs[i]->queue_no = i;
2486 /* give outbound qeth_qdio_buffers their qdio_buffers */
2487 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2488 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2489 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2490 goto out_freeoutqbufs;
4a71df50
FB		 2491 }
2492 }
0da9581d
EL		 2493
2494 /* completion */
2495 if (qeth_alloc_cq(card))
2496 goto out_freeoutq;
2497
4a71df50
FB		 2498 return 0;
2499
0da9581d
EL		 2500out_freeoutqbufs:
2501 while (j > 0) {
2502 --j;
2503 kmem_cache_free(qeth_qdio_outbuf_cache,
2504 card->qdio.out_qs[i]->bufs[j]);
2505 card->qdio.out_qs[i]->bufs[j] = NULL;
2506 }
4a71df50 2507out_freeoutq:
0da9581d 2508 while (i > 0) {
d445a4e2 2509 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2510 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2511 }
4a71df50
FB		 2512 kfree(card->qdio.out_qs);
2513 card->qdio.out_qs = NULL;
2514out_freepool:
2515 qeth_free_buffer_pool(card);
2516out_freeinq:
4601ba6c 2517 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2518 card->qdio.in_q = NULL;
2519out_nomem:
2520 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2521 return -ENOMEM;
2522}
2523
d445a4e2
SO		 2524static void qeth_free_qdio_buffers(struct qeth_card *card)
2525{
2526 int i, j;
2527
2528 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2529 QETH_QDIO_UNINITIALIZED)
2530 return;
2531
2532 qeth_free_cq(card);
2533 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2534 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2535 if (card->qdio.in_q->bufs[j].rx_skb)
2536 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2537 }
2538 qeth_free_qdio_queue(card->qdio.in_q);
2539 card->qdio.in_q = NULL;
2540 /* inbound buffer pool */
2541 qeth_free_buffer_pool(card);
2542 /* free outbound qdio_qs */
2543 if (card->qdio.out_qs) {
2544 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2545 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2546 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2547 }
2548 kfree(card->qdio.out_qs);
2549 card->qdio.out_qs = NULL;
2550 }
2551}
2552
4a71df50
FB		 2553static void qeth_create_qib_param_field(struct qeth_card *card,
2554 char *param_field)
2555{
2556
2557 param_field[0] = _ascebc['P'];
2558 param_field[1] = _ascebc['C'];
2559 param_field[2] = _ascebc['I'];
2560 param_field[3] = _ascebc['T'];
2561 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2562 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2563 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2564}
2565
2566static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2567 char *param_field)
2568{
2569 param_field[16] = _ascebc['B'];
2570 param_field[17] = _ascebc['L'];
2571 param_field[18] = _ascebc['K'];
2572 param_field[19] = _ascebc['T'];
2573 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2574 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2575 *((unsigned int *) (&param_field[28])) =
2576 card->info.blkt.inter_packet_jumbo;
2577}
2578
2579static int qeth_qdio_activate(struct qeth_card *card)
2580{
d11ba0c4 2581 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2582 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2583}
2584
2585static int qeth_dm_act(struct qeth_card *card)
2586{
2587 int rc;
2588 struct qeth_cmd_buffer *iob;
2589
d11ba0c4 2590 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2591
2592 iob = qeth_wait_for_buffer(&card->write);
2593 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2594
2595 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2596 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2597 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2598 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2599 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2600 return rc;
2601}
2602
2603static int qeth_mpc_initialize(struct qeth_card *card)
2604{
2605 int rc;
2606
d11ba0c4 2607 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2608
2609 rc = qeth_issue_next_read(card);
2610 if (rc) {
d11ba0c4 2611 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2612 return rc;
2613 }
2614 rc = qeth_cm_enable(card);
2615 if (rc) {
d11ba0c4 2616 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2617 goto out_qdio;
2618 }
2619 rc = qeth_cm_setup(card);
2620 if (rc) {
d11ba0c4 2621 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2622 goto out_qdio;
2623 }
2624 rc = qeth_ulp_enable(card);
2625 if (rc) {
d11ba0c4 2626 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2627 goto out_qdio;
2628 }
2629 rc = qeth_ulp_setup(card);
2630 if (rc) {
d11ba0c4 2631 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2632 goto out_qdio;
2633 }
2634 rc = qeth_alloc_qdio_buffers(card);
2635 if (rc) {
d11ba0c4 2636 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2637 goto out_qdio;
2638 }
2639 rc = qeth_qdio_establish(card);
2640 if (rc) {
d11ba0c4 2641 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2642 qeth_free_qdio_buffers(card);
2643 goto out_qdio;
2644 }
2645 rc = qeth_qdio_activate(card);
2646 if (rc) {
d11ba0c4 2647 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2648 goto out_qdio;
2649 }
2650 rc = qeth_dm_act(card);
2651 if (rc) {
d11ba0c4 2652 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2653 goto out_qdio;
2654 }
2655
2656 return 0;
2657out_qdio:
2658 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2659 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2660 return rc;
2661}
2662
4a71df50
FB		 2663void qeth_print_status_message(struct qeth_card *card)
2664{
2665 switch (card->info.type) {
5113fec0
UB		 2666 case QETH_CARD_TYPE_OSD:
2667 case QETH_CARD_TYPE_OSM:
2668 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2669 /* VM will use a non-zero first character
2670 * to indicate a HiperSockets like reporting
2671 * of the level OSA sets the first character to zero
2672 * */
2673 if (!card->info.mcl_level[0]) {
2674 sprintf(card->info.mcl_level, "%02x%02x",
2675 card->info.mcl_level[2],
2676 card->info.mcl_level[3]);
4a71df50
FB		 2677 break;
2678 }
2679 /* fallthrough */
2680 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2681 if ((card->info.guestlan) ||
2682 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2683 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2684 card->info.mcl_level[0]];
2685 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2686 card->info.mcl_level[1]];
2687 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2688 card->info.mcl_level[2]];
2689 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2690 card->info.mcl_level[3]];
2691 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2692 }
2693 break;
2694 default:
2695 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2696 }
239ff408
UB		 2697 dev_info(&card->gdev->dev,
2698 "Device is a%s card%s%s%s\nwith link type %s.\n",
2699 qeth_get_cardname(card),
2700 (card->info.mcl_level[0]) ? " (level: " : "",
2701 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2702 (card->info.mcl_level[0]) ? ")" : "",
2703 qeth_get_cardname_short(card));
4a71df50
FB		 2704}
2705EXPORT_SYMBOL_GPL(qeth_print_status_message);
2706
4a71df50
FB		 2707static void qeth_initialize_working_pool_list(struct qeth_card *card)
2708{
2709 struct qeth_buffer_pool_entry *entry;
2710
847a50fd 2711 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2712
2713 list_for_each_entry(entry,
2714 &card->qdio.init_pool.entry_list, init_list) {
2715 qeth_put_buffer_pool_entry(card, entry);
2716 }
2717}
2718
2719static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2720 struct qeth_card *card)
2721{
2722 struct list_head *plh;
2723 struct qeth_buffer_pool_entry *entry;
2724 int i, free;
2725 struct page *page;
2726
2727 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2728 return NULL;
2729
2730 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2731 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2732 free = 1;
2733 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2734 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2735 free = 0;
2736 break;
2737 }
2738 }
2739 if (free) {
2740 list_del_init(&entry->list);
2741 return entry;
2742 }
2743 }
2744
2745 /* no free buffer in pool so take first one and swap pages */
2746 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2747 struct qeth_buffer_pool_entry, list);
2748 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2749 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2750 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2751 if (!page) {
2752 return NULL;
2753 } else {
2754 free_page((unsigned long)entry->elements[i]);
2755 entry->elements[i] = page_address(page);
2756 if (card->options.performance_stats)
2757 card->perf_stats.sg_alloc_page_rx++;
2758 }
2759 }
2760 }
2761 list_del_init(&entry->list);
2762 return entry;
2763}
2764
2765static int qeth_init_input_buffer(struct qeth_card *card,
2766 struct qeth_qdio_buffer *buf)
2767{
2768 struct qeth_buffer_pool_entry *pool_entry;
2769 int i;
2770
b3332930
FB		 2771 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2772 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2773 if (!buf->rx_skb)
2774 return 1;
2775 }
2776
4a71df50
FB		 2777 pool_entry = qeth_find_free_buffer_pool_entry(card);
2778 if (!pool_entry)
2779 return 1;
2780
2781 /*
2782 * since the buffer is accessed only from the input_tasklet
2783 * there shouldn't be a need to synchronize; also, since we use
2784 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2785 * buffers
2786 */
4a71df50
FB		 2787
2788 buf->pool_entry = pool_entry;
2789 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2790 buf->buffer->element[i].length = PAGE_SIZE;
2791 buf->buffer->element[i].addr = pool_entry->elements[i];
2792 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2793 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2794 else
3ec90878
JG		 2795 buf->buffer->element[i].eflags = 0;
2796 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2797 }
2798 return 0;
2799}
2800
2801int qeth_init_qdio_queues(struct qeth_card *card)
2802{
2803 int i, j;
2804 int rc;
2805
d11ba0c4 2806 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2807
2808 /* inbound queue */
6d284bde
SO		 2809 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2810 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2811 qeth_initialize_working_pool_list(card);
2812 /*give only as many buffers to hardware as we have buffer pool entries*/
2813 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2814 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2815 card->qdio.in_q->next_buf_to_init =
2816 card->qdio.in_buf_pool.buf_count - 1;
2817 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2818 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2819 if (rc) {
d11ba0c4 2820 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2821 return rc;
2822 }
0da9581d
EL		 2823
2824 /* completion */
2825 rc = qeth_cq_init(card);
2826 if (rc) {
2827 return rc;
2828 }
2829
4a71df50
FB		 2830 /* outbound queue */
2831 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2832 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2833 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2834 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2835 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2836 card->qdio.out_qs[i]->bufs[j],
2837 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2838 }
2839 card->qdio.out_qs[i]->card = card;
2840 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2841 card->qdio.out_qs[i]->do_pack = 0;
2842 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2843 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2844 atomic_set(&card->qdio.out_qs[i]->state,
2845 QETH_OUT_Q_UNLOCKED);
2846 }
2847 return 0;
2848}
2849EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2850
2851static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2852{
2853 switch (link_type) {
2854 case QETH_LINK_TYPE_HSTR:
2855 return 2;
2856 default:
2857 return 1;
2858 }
2859}
2860
2861static void qeth_fill_ipacmd_header(struct qeth_card *card,
2862 struct qeth_ipa_cmd *cmd, __u8 command,
2863 enum qeth_prot_versions prot)
2864{
2865 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2866 cmd->hdr.command = command;
2867 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2868 cmd->hdr.seqno = card->seqno.ipa;
2869 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2870 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2871 if (card->options.layer2)
2872 cmd->hdr.prim_version_no = 2;
2873 else
2874 cmd->hdr.prim_version_no = 1;
2875 cmd->hdr.param_count = 1;
2876 cmd->hdr.prot_version = prot;
2877 cmd->hdr.ipa_supported = 0;
2878 cmd->hdr.ipa_enabled = 0;
2879}
2880
2881struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2882 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2883{
2884 struct qeth_cmd_buffer *iob;
2885 struct qeth_ipa_cmd *cmd;
2886
1aec42bc
TR		 2887 iob = qeth_get_buffer(&card->write);
2888 if (iob) {
2889 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2890 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2891 } else {
2892 dev_warn(&card->gdev->dev,
2893 "The qeth driver ran out of channel command buffers\n");
2894 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2895 dev_name(&card->gdev->dev));
2896 }
4a71df50
FB		 2897
2898 return iob;
2899}
2900EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2901
2902void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2903 char prot_type)
2904{
2905 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2906 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2907 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2908 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2909}
2910EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2911
efbbc1d5
EC		 2912/**
2913 * qeth_send_ipa_cmd() - send an IPA command
2914 *
2915 * See qeth_send_control_data() for explanation of the arguments.
2916 */
2917
4a71df50
FB		 2918int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2919 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2920 unsigned long),
2921 void *reply_param)
2922{
2923 int rc;
2924 char prot_type;
4a71df50 2925
847a50fd 2926 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2927
2928 if (card->options.layer2)
2929 if (card->info.type == QETH_CARD_TYPE_OSN)
2930 prot_type = QETH_PROT_OSN2;
2931 else
2932 prot_type = QETH_PROT_LAYER2;
2933 else
2934 prot_type = QETH_PROT_TCPIP;
2935 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2936 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2937 iob, reply_cb, reply_param);
908abbb5
UB		 2938 if (rc == -ETIME) {
2939 qeth_clear_ipacmd_list(card);
2940 qeth_schedule_recovery(card);
2941 }
4a71df50
FB		 2942 return rc;
2943}
2944EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2945
10340510 2946static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2947{
2948 int rc;
70919e23 2949 struct qeth_cmd_buffer *iob;
4a71df50 2950
d11ba0c4 2951 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2952
70919e23 2953 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2954 if (!iob)
2955 return -ENOMEM;
70919e23 2956 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2957 return rc;
2958}
4a71df50 2959
eb3fb0ba 2960static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2961 struct qeth_reply *reply, unsigned long data)
2962{
2963 struct qeth_ipa_cmd *cmd;
2964
847a50fd 2965 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2966
2967 cmd = (struct qeth_ipa_cmd *) data;
2968 if (cmd->hdr.return_code == 0)
2969 cmd->hdr.return_code =
2970 cmd->data.setadapterparms.hdr.return_code;
2971 return 0;
2972}
4a71df50
FB		 2973
2974static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2975 struct qeth_reply *reply, unsigned long data)
2976{
2977 struct qeth_ipa_cmd *cmd;
2978
847a50fd 2979 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2980
2981 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2982 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2983 card->info.link_type =
2984 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2985 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2986 }
4a71df50
FB		 2987 card->options.adp.supported_funcs =
2988 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2989 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2990}
2991
eb3fb0ba 2992static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2993 __u32 command, __u32 cmdlen)
2994{
2995 struct qeth_cmd_buffer *iob;
2996 struct qeth_ipa_cmd *cmd;
2997
2998 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2999 QETH_PROT_IPV4);
1aec42bc
TR		 3000 if (iob) {
3001 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3002 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3003 cmd->data.setadapterparms.hdr.command_code = command;
3004 cmd->data.setadapterparms.hdr.used_total = 1;
3005 cmd->data.setadapterparms.hdr.seq_no = 1;
3006 }
4a71df50
FB		 3007
3008 return iob;
3009}
4a71df50
FB		 3010
3011int qeth_query_setadapterparms(struct qeth_card *card)
3012{
3013 int rc;
3014 struct qeth_cmd_buffer *iob;
3015
847a50fd 3016 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3017 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3018 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3019 if (!iob)
3020 return -ENOMEM;
4a71df50
FB		 3021 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3022 return rc;
3023}
3024EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3025
1da74b1c
FB		 3026static int qeth_query_ipassists_cb(struct qeth_card *card,
3027 struct qeth_reply *reply, unsigned long data)
3028{
3029 struct qeth_ipa_cmd *cmd;
3030
3031 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3032
3033 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3034
3035 switch (cmd->hdr.return_code) {
3036 case IPA_RC_NOTSUPP:
3037 case IPA_RC_L2_UNSUPPORTED_CMD:
3038 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3039 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3040 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3041 return -0;
3042 default:
3043 if (cmd->hdr.return_code) {
3044 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3045 "rc=%d\n",
3046 dev_name(&card->gdev->dev),
3047 cmd->hdr.return_code);
3048 return 0;
3049 }
3050 }
3051
1da74b1c
FB		 3052 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3053 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3054 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3055 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3056 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3057 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3058 } else
3059 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3060 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3061 return 0;
3062}
3063
3064int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3065{
3066 int rc;
3067 struct qeth_cmd_buffer *iob;
3068
3069 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3070 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3071 if (!iob)
3072 return -ENOMEM;
1da74b1c
FB		 3073 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3074 return rc;
3075}
3076EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3077
45cbb2e4
SR		 3078static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3079 struct qeth_reply *reply, unsigned long data)
3080{
3081 struct qeth_ipa_cmd *cmd;
3082 struct qeth_switch_info *sw_info;
3083 struct qeth_query_switch_attributes *attrs;
3084
3085 QETH_CARD_TEXT(card, 2, "qswiatcb");
3086 cmd = (struct qeth_ipa_cmd *) data;
3087 sw_info = (struct qeth_switch_info *)reply->param;
3088 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3089 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3090 sw_info->capabilities = attrs->capabilities;
3091 sw_info->settings = attrs->settings;
3092 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3093 sw_info->settings);
3094 }
3095 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3096
3097 return 0;
3098}
3099
3100int qeth_query_switch_attributes(struct qeth_card *card,
3101 struct qeth_switch_info *sw_info)
3102{
3103 struct qeth_cmd_buffer *iob;
3104
3105 QETH_CARD_TEXT(card, 2, "qswiattr");
3106 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3107 return -EOPNOTSUPP;
3108 if (!netif_carrier_ok(card->dev))
3109 return -ENOMEDIUM;
3110 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3111 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3112 if (!iob)
3113 return -ENOMEM;
45cbb2e4
SR		 3114 return qeth_send_ipa_cmd(card, iob,
3115 qeth_query_switch_attributes_cb, sw_info);
3116}
3117EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3118
1da74b1c
FB		 3119static int qeth_query_setdiagass_cb(struct qeth_card *card,
3120 struct qeth_reply *reply, unsigned long data)
3121{
3122 struct qeth_ipa_cmd *cmd;
3123 __u16 rc;
3124
3125 cmd = (struct qeth_ipa_cmd *)data;
3126 rc = cmd->hdr.return_code;
3127 if (rc)
3128 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3129 else
3130 card->info.diagass_support = cmd->data.diagass.ext;
3131 return 0;
3132}
3133
3134static int qeth_query_setdiagass(struct qeth_card *card)
3135{
3136 struct qeth_cmd_buffer *iob;
3137 struct qeth_ipa_cmd *cmd;
3138
3139 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3140 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3141 if (!iob)
3142 return -ENOMEM;
1da74b1c
FB		 3143 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3144 cmd->data.diagass.subcmd_len = 16;
3145 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3146 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3147}
3148
3149static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3150{
3151 unsigned long info = get_zeroed_page(GFP_KERNEL);
3152 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3153 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3154 struct ccw_dev_id ccwid;
caf757c6 3155 int level;
1da74b1c
FB		 3156
3157 tid->chpid = card->info.chpid;
3158 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3159 tid->ssid = ccwid.ssid;
3160 tid->devno = ccwid.devno;
3161 if (!info)
3162 return;
caf757c6
HC		 3163 level = stsi(NULL, 0, 0, 0);
3164 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3165 tid->lparnr = info222->lpar_number;
caf757c6 3166 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3167 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3168 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3169 }
3170 free_page(info);
3171 return;
3172}
3173
3174static int qeth_hw_trap_cb(struct qeth_card *card,
3175 struct qeth_reply *reply, unsigned long data)
3176{
3177 struct qeth_ipa_cmd *cmd;
3178 __u16 rc;
3179
3180 cmd = (struct qeth_ipa_cmd *)data;
3181 rc = cmd->hdr.return_code;
3182 if (rc)
3183 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3184 return 0;
3185}
3186
3187int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3188{
3189 struct qeth_cmd_buffer *iob;
3190 struct qeth_ipa_cmd *cmd;
3191
3192 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3193 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3194 if (!iob)
3195 return -ENOMEM;
1da74b1c
FB		 3196 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3197 cmd->data.diagass.subcmd_len = 80;
3198 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3199 cmd->data.diagass.type = 1;
3200 cmd->data.diagass.action = action;
3201 switch (action) {
3202 case QETH_DIAGS_TRAP_ARM:
3203 cmd->data.diagass.options = 0x0003;
3204 cmd->data.diagass.ext = 0x00010000 +
3205 sizeof(struct qeth_trap_id);
3206 qeth_get_trap_id(card,
3207 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3208 break;
3209 case QETH_DIAGS_TRAP_DISARM:
3210 cmd->data.diagass.options = 0x0001;
3211 break;
3212 case QETH_DIAGS_TRAP_CAPTURE:
3213 break;
3214 }
3215 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3216}
3217EXPORT_SYMBOL_GPL(qeth_hw_trap);
3218
76b11f8e
UB		 3219int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3220 unsigned int qdio_error, const char *dbftext)
4a71df50 3221{
779e6e1c 3222 if (qdio_error) {
847a50fd 3223 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3224 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3225 buf->element[15].sflags);
38593d01 3226 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3227 buf->element[14].sflags);
38593d01 3228 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3229 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3230 card->stats.rx_dropped++;
3231 return 0;
3232 } else
3233 return 1;
4a71df50
FB		 3234 }
3235 return 0;
3236}
3237EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3238
bca51650 3239static void qeth_buffer_reclaim_work(struct work_struct *work)
b3332930
FB		 3240{
3241 struct qeth_card *card = container_of(work, struct qeth_card,
3242 buffer_reclaim_work.work);
3243
3244 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3245 qeth_queue_input_buffer(card, card->reclaim_index);
3246}
3247
4a71df50
FB		 3248void qeth_queue_input_buffer(struct qeth_card *card, int index)
3249{
3250 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3251 struct list_head *lh;
4a71df50
FB		 3252 int count;
3253 int i;
3254 int rc;
3255 int newcount = 0;
3256
4a71df50
FB		 3257 count = (index < queue->next_buf_to_init)?
3258 card->qdio.in_buf_pool.buf_count -
3259 (queue->next_buf_to_init - index) :
3260 card->qdio.in_buf_pool.buf_count -
3261 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3262 /* only requeue at a certain threshold to avoid SIGAs */
3263 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3264 for (i = queue->next_buf_to_init;
3265 i < queue->next_buf_to_init + count; ++i) {
3266 if (qeth_init_input_buffer(card,
3267 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3268 break;
3269 } else {
3270 newcount++;
3271 }
3272 }
3273
3274 if (newcount < count) {
3275 /* we are in memory shortage so we switch back to
3276 traditional skb allocation and drop packages */
4a71df50
FB		 3277 atomic_set(&card->force_alloc_skb, 3);
3278 count = newcount;
3279 } else {
4a71df50
FB		 3280 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3281 }
3282
b3332930
FB		 3283 if (!count) {
3284 i = 0;
3285 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3286 i++;
3287 if (i == card->qdio.in_buf_pool.buf_count) {
3288 QETH_CARD_TEXT(card, 2, "qsarbw");
3289 card->reclaim_index = index;
3290 schedule_delayed_work(
3291 &card->buffer_reclaim_work,
3292 QETH_RECLAIM_WORK_TIME);
3293 }
3294 return;
3295 }
3296
4a71df50
FB		 3297 /*
3298 * according to old code it should be avoided to requeue all
3299 * 128 buffers in order to benefit from PCI avoidance.
3300 * this function keeps at least one buffer (the buffer at
3301 * 'index') un-requeued -> this buffer is the first buffer that
3302 * will be requeued the next time
3303 */
3304 if (card->options.performance_stats) {
3305 card->perf_stats.inbound_do_qdio_cnt++;
3306 card->perf_stats.inbound_do_qdio_start_time =
3307 qeth_get_micros();
3308 }
779e6e1c
JG		 3309 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3310 queue->next_buf_to_init, count);
4a71df50
FB		 3311 if (card->options.performance_stats)
3312 card->perf_stats.inbound_do_qdio_time +=
3313 qeth_get_micros() -
3314 card->perf_stats.inbound_do_qdio_start_time;
3315 if (rc) {
847a50fd 3316 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3317 }
3318 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3319 QDIO_MAX_BUFFERS_PER_Q;
3320 }
3321}
3322EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3323
d7a39937 3324static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3325 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3326{
3ec90878 3327 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3328
847a50fd 3329 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3330 if (card->info.type == QETH_CARD_TYPE_IQD) {
3331 if (sbalf15 == 0) {
3332 qdio_err = 0;
3333 } else {
3334 qdio_err = 1;
3335 }
3336 }
76b11f8e 3337 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3338
3339 if (!qdio_err)
d7a39937 3340 return;
d303b6fd
JG		 3341
3342 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3343 return;
d303b6fd 3344
847a50fd
CO		 3345 QETH_CARD_TEXT(card, 1, "lnkfail");
3346 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3347 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3348}
3349
3350/*
3351 * Switched to packing state if the number of used buffers on a queue
3352 * reaches a certain limit.
3353 */
3354static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3355{
3356 if (!queue->do_pack) {
3357 if (atomic_read(&queue->used_buffers)
3358 >= QETH_HIGH_WATERMARK_PACK){
3359 /* switch non-PACKING -> PACKING */
847a50fd 3360 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3361 if (queue->card->options.performance_stats)
3362 queue->card->perf_stats.sc_dp_p++;
3363 queue->do_pack = 1;
3364 }
3365 }
3366}
3367
3368/*
3369 * Switches from packing to non-packing mode. If there is a packing
3370 * buffer on the queue this buffer will be prepared to be flushed.
3371 * In that case 1 is returned to inform the caller. If no buffer
3372 * has to be flushed, zero is returned.
3373 */
3374static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3375{
3376 struct qeth_qdio_out_buffer *buffer;
3377 int flush_count = 0;
3378
3379 if (queue->do_pack) {
3380 if (atomic_read(&queue->used_buffers)
3381 <= QETH_LOW_WATERMARK_PACK) {
3382 /* switch PACKING -> non-PACKING */
847a50fd 3383 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3384 if (queue->card->options.performance_stats)
3385 queue->card->perf_stats.sc_p_dp++;
3386 queue->do_pack = 0;
3387 /* flush packing buffers */
0da9581d 3388 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3389 if ((atomic_read(&buffer->state) ==
3390 QETH_QDIO_BUF_EMPTY) &&
3391 (buffer->next_element_to_fill > 0)) {
3392 atomic_set(&buffer->state,
0da9581d 3393 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3394 flush_count++;
3395 queue->next_buf_to_fill =
3396 (queue->next_buf_to_fill + 1) %
3397 QDIO_MAX_BUFFERS_PER_Q;
3398 }
3399 }
3400 }
3401 return flush_count;
3402}
3403
0da9581d 3404
4a71df50
FB		 3405/*
3406 * Called to flush a packing buffer if no more pci flags are on the queue.
3407 * Checks if there is a packing buffer and prepares it to be flushed.
3408 * In that case returns 1, otherwise zero.
3409 */
3410static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3411{
3412 struct qeth_qdio_out_buffer *buffer;
3413
0da9581d 3414 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3415 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3416 (buffer->next_element_to_fill > 0)) {
3417 /* it's a packing buffer */
3418 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3419 queue->next_buf_to_fill =
3420 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3421 return 1;
3422 }
3423 return 0;
3424}
3425
779e6e1c
JG		 3426static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3427 int count)
4a71df50
FB		 3428{
3429 struct qeth_qdio_out_buffer *buf;
3430 int rc;
3431 int i;
3432 unsigned int qdio_flags;
3433
4a71df50 3434 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3435 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3436 buf = queue->bufs[bidx];
3ec90878
JG		 3437 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3438 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3439
0da9581d
EL		 3440 if (queue->bufstates)
3441 queue->bufstates[bidx].user = buf;
3442
4a71df50
FB		 3443 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3444 continue;
3445
3446 if (!queue->do_pack) {
3447 if ((atomic_read(&queue->used_buffers) >=
3448 (QETH_HIGH_WATERMARK_PACK -
3449 QETH_WATERMARK_PACK_FUZZ)) &&
3450 !atomic_read(&queue->set_pci_flags_count)) {
3451 /* it's likely that we'll go to packing
3452 * mode soon */
3453 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3454 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3455 }
3456 } else {
3457 if (!atomic_read(&queue->set_pci_flags_count)) {
3458 /*
3459 * there's no outstanding PCI any more, so we
3460 * have to request a PCI to be sure the the PCI
3461 * will wake at some time in the future then we
3462 * can flush packed buffers that might still be
3463 * hanging around, which can happen if no
3464 * further send was requested by the stack
3465 */
3466 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3467 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3468 }
3469 }
3470 }
3471
3e66bab3 3472 netif_trans_update(queue->card->dev);
4a71df50
FB		 3473 if (queue->card->options.performance_stats) {
3474 queue->card->perf_stats.outbound_do_qdio_cnt++;
3475 queue->card->perf_stats.outbound_do_qdio_start_time =
3476 qeth_get_micros();
3477 }
3478 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3479 if (atomic_read(&queue->set_pci_flags_count))
3480 qdio_flags |= QDIO_FLAG_PCI_OUT;
3481 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3482 queue->queue_no, index, count);
4a71df50
FB		 3483 if (queue->card->options.performance_stats)
3484 queue->card->perf_stats.outbound_do_qdio_time +=
3485 qeth_get_micros() -
3486 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3487 atomic_add(count, &queue->used_buffers);
4a71df50 3488 if (rc) {
d303b6fd
JG		 3489 queue->card->stats.tx_errors += count;
3490 /* ignore temporary SIGA errors without busy condition */
1549d13f 3491 if (rc == -ENOBUFS)
d303b6fd 3492 return;
847a50fd 3493 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3494 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3495 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3496 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3497 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3498
4a71df50
FB		 3499 /* this must not happen under normal circumstances. if it
3500 * happens something is really wrong -> recover */
3501 qeth_schedule_recovery(queue->card);
3502 return;
3503 }
4a71df50
FB		 3504 if (queue->card->options.performance_stats)
3505 queue->card->perf_stats.bufs_sent += count;
3506}
3507
3508static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3509{
3510 int index;
3511 int flush_cnt = 0;
3512 int q_was_packing = 0;
3513
3514 /*
3515 * check if weed have to switch to non-packing mode or if
3516 * we have to get a pci flag out on the queue
3517 */
3518 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3519 !atomic_read(&queue->set_pci_flags_count)) {
3520 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3521 QETH_OUT_Q_UNLOCKED) {
3522 /*
3523 * If we get in here, there was no action in
3524 * do_send_packet. So, we check if there is a
3525 * packing buffer to be flushed here.
3526 */
3527 netif_stop_queue(queue->card->dev);
3528 index = queue->next_buf_to_fill;
3529 q_was_packing = queue->do_pack;
3530 /* queue->do_pack may change */
3531 barrier();
3532 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3533 if (!flush_cnt &&
3534 !atomic_read(&queue->set_pci_flags_count))
3535 flush_cnt +=
3536 qeth_flush_buffers_on_no_pci(queue);
3537 if (queue->card->options.performance_stats &&
3538 q_was_packing)
3539 queue->card->perf_stats.bufs_sent_pack +=
3540 flush_cnt;
3541 if (flush_cnt)
779e6e1c 3542 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3543 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3544 }
3545 }
3546}
3547
a1c3ed4c
FB		 3548void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3549 unsigned long card_ptr)
3550{
3551 struct qeth_card *card = (struct qeth_card *)card_ptr;
3552
0cffef48 3553 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3554 napi_schedule(&card->napi);
3555}
3556EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3557
0da9581d
EL		 3558int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3559{
3560 int rc;
3561
3562 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3563 rc = -1;
3564 goto out;
3565 } else {
3566 if (card->options.cq == cq) {
3567 rc = 0;
3568 goto out;
3569 }
3570
3571 if (card->state != CARD_STATE_DOWN &&
3572 card->state != CARD_STATE_RECOVER) {
3573 rc = -1;
3574 goto out;
3575 }
3576
3577 qeth_free_qdio_buffers(card);
3578 card->options.cq = cq;
3579 rc = 0;
3580 }
3581out:
3582 return rc;
3583
3584}
3585EXPORT_SYMBOL_GPL(qeth_configure_cq);
3586
3587
3588static void qeth_qdio_cq_handler(struct qeth_card *card,
3589 unsigned int qdio_err,
3590 unsigned int queue, int first_element, int count) {
3591 struct qeth_qdio_q *cq = card->qdio.c_q;
3592 int i;
3593 int rc;
3594
3595 if (!qeth_is_cq(card, queue))
3596 goto out;
3597
3598 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3599 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3600 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3601
3602 if (qdio_err) {
3603 netif_stop_queue(card->dev);
3604 qeth_schedule_recovery(card);
3605 goto out;
3606 }
3607
3608 if (card->options.performance_stats) {
3609 card->perf_stats.cq_cnt++;
3610 card->perf_stats.cq_start_time = qeth_get_micros();
3611 }
3612
3613 for (i = first_element; i < first_element + count; ++i) {
3614 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3615 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3616 int e;
3617
3618 e = 0;
903e4853
UB		 3619 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3620 buffer->element[e].addr) {
0da9581d
EL		 3621 unsigned long phys_aob_addr;
3622
3623 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3624 qeth_qdio_handle_aob(card, phys_aob_addr);
3625 buffer->element[e].addr = NULL;
3626 buffer->element[e].eflags = 0;
3627 buffer->element[e].sflags = 0;
3628 buffer->element[e].length = 0;
3629
3630 ++e;
3631 }
3632
3633 buffer->element[15].eflags = 0;
3634 buffer->element[15].sflags = 0;
3635 }
3636 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3637 card->qdio.c_q->next_buf_to_init,
3638 count);
3639 if (rc) {
3640 dev_warn(&card->gdev->dev,
3641 "QDIO reported an error, rc=%i\n", rc);
3642 QETH_CARD_TEXT(card, 2, "qcqherr");
3643 }
3644 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3645 + count) % QDIO_MAX_BUFFERS_PER_Q;
3646
3647 netif_wake_queue(card->dev);
3648
3649 if (card->options.performance_stats) {
3650 int delta_t = qeth_get_micros();
3651 delta_t -= card->perf_stats.cq_start_time;
3652 card->perf_stats.cq_time += delta_t;
3653 }
3654out:
3655 return;
3656}
3657
a1c3ed4c 3658void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3659 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3660 unsigned long card_ptr)
3661{
3662 struct qeth_card *card = (struct qeth_card *)card_ptr;
3663
0da9581d
EL		 3664 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3665 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3666
3667 if (qeth_is_cq(card, queue))
3668 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3669 else if (qdio_err)
a1c3ed4c 3670 qeth_schedule_recovery(card);
0da9581d
EL		 3671
3672
a1c3ed4c
FB		 3673}
3674EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3675
779e6e1c
JG		 3676void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3677 unsigned int qdio_error, int __queue, int first_element,
3678 int count, unsigned long card_ptr)
4a71df50
FB		 3679{
3680 struct qeth_card *card = (struct qeth_card *) card_ptr;
3681 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3682 struct qeth_qdio_out_buffer *buffer;
3683 int i;
3684
847a50fd 3685 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3686 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3687 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3688 netif_stop_queue(card->dev);
3689 qeth_schedule_recovery(card);
3690 return;
4a71df50
FB		 3691 }
3692 if (card->options.performance_stats) {
3693 card->perf_stats.outbound_handler_cnt++;
3694 card->perf_stats.outbound_handler_start_time =
3695 qeth_get_micros();
3696 }
3697 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3698 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3699 buffer = queue->bufs[bidx];
b67d801f 3700 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3701
3702 if (queue->bufstates &&
3703 (queue->bufstates[bidx].flags &
3704 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3705 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3706
3707 if (atomic_cmpxchg(&buffer->state,
3708 QETH_QDIO_BUF_PRIMED,
3709 QETH_QDIO_BUF_PENDING) ==
3710 QETH_QDIO_BUF_PRIMED) {
3711 qeth_notify_skbs(queue, buffer,
3712 TX_NOTIFY_PENDING);
3713 }
0da9581d
EL		 3714 buffer->aob = queue->bufstates[bidx].aob;
3715 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3716 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3717 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3718 virt_to_phys(buffer->aob));
b3332930
FB		 3719 if (qeth_init_qdio_out_buf(queue, bidx)) {
3720 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3721 qeth_schedule_recovery(card);
b3332930 3722 }
0da9581d 3723 } else {
b3332930
FB		 3724 if (card->options.cq == QETH_CQ_ENABLED) {
3725 enum iucv_tx_notify n;
3726
3727 n = qeth_compute_cq_notification(
3728 buffer->buffer->element[15].sflags, 0);
3729 qeth_notify_skbs(queue, buffer, n);
3730 }
3731
0da9581d
EL		 3732 qeth_clear_output_buffer(queue, buffer,
3733 QETH_QDIO_BUF_EMPTY);
3734 }
3735 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3736 }
3737 atomic_sub(count, &queue->used_buffers);
3738 /* check if we need to do something on this outbound queue */
3739 if (card->info.type != QETH_CARD_TYPE_IQD)
3740 qeth_check_outbound_queue(queue);
3741
3742 netif_wake_queue(queue->card->dev);
3743 if (card->options.performance_stats)
3744 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3745 card->perf_stats.outbound_handler_start_time;
3746}
3747EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3748
70deb016
HW		 3749/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3750static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3751{
3752 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3753 return 2;
3754 return queue_num;
3755}
3756
290b8348
SR		 3757/**
3758 * Note: Function assumes that we have 4 outbound queues.
3759 */
4a71df50
FB		 3760int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3761 int ipv, int cast_type)
3762{
d66cb37e 3763 __be16 *tci;
290b8348
SR		 3764 u8 tos;
3765
290b8348
SR		 3766 if (cast_type && card->info.is_multicast_different)
3767 return card->info.is_multicast_different &
3768 (card->qdio.no_out_queues - 1);
3769
3770 switch (card->qdio.do_prio_queueing) {
3771 case QETH_PRIO_Q_ING_TOS:
3772 case QETH_PRIO_Q_ING_PREC:
3773 switch (ipv) {
3774 case 4:
3775 tos = ipv4_get_dsfield(ip_hdr(skb));
3776 break;
3777 case 6:
3778 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3779 break;
3780 default:
3781 return card->qdio.default_out_queue;
4a71df50 3782 }
290b8348 3783 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3784 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3785 if (tos & IPTOS_MINCOST)
70deb016 3786 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3787 if (tos & IPTOS_RELIABILITY)
3788 return 2;
3789 if (tos & IPTOS_THROUGHPUT)
3790 return 1;
3791 if (tos & IPTOS_LOWDELAY)
3792 return 0;
d66cb37e
SR		 3793 break;
3794 case QETH_PRIO_Q_ING_SKB:
3795 if (skb->priority > 5)
3796 return 0;
70deb016 3797 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3798 case QETH_PRIO_Q_ING_VLAN:
3799 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3800 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3801 return qeth_cut_iqd_prio(card,
3802 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3803 break;
4a71df50 3804 default:
290b8348 3805 break;
4a71df50 3806 }
290b8348 3807 return card->qdio.default_out_queue;
4a71df50
FB		 3808}
3809EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3810
2863c613
EC		 3811/**
3812 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3813 * @skb: SKB address
3814 *
3815 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3816 * fragmented part of the SKB. Returns zero for linear SKB.
3817 */
271648b4
FB		 3818int qeth_get_elements_for_frags(struct sk_buff *skb)
3819{
2863c613 3820 int cnt, elements = 0;
271648b4
FB		 3821
3822 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3823 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3824
3825 elements += qeth_get_elements_for_range(
3826 (addr_t)skb_frag_address(frag),
3827 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3828 }
3829 return elements;
3830}
3831EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3832
2863c613
EC		 3833/**
3834 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3835 * @card: qeth card structure, to check max. elems.
3836 * @skb: SKB address
3837 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3838 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3839 *
3840 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3841 * skb data, including linear part and fragments. Checks if the result plus
3842 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3843 * Note: extra_elems is not included in the returned result.
3844 */
065cc782 3845int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3846 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3847{
2863c613 3848 int elements = qeth_get_elements_for_range(
7d969d2e 3849 (addr_t)skb->data + data_offset,
2863c613
EC		 3850 (addr_t)skb->data + skb_headlen(skb)) +
3851 qeth_get_elements_for_frags(skb);
4a71df50 3852
2863c613 3853 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3854 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3855 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3856 elements + extra_elems, skb->len);
4a71df50
FB		 3857 return 0;
3858 }
2863c613 3859 return elements;
4a71df50
FB		 3860}
3861EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3862
d4ae1f5e 3863int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3864{
3865 int hroom, inpage, rest;
3866
3867 if (((unsigned long)skb->data & PAGE_MASK) !=
3868 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3869 hroom = skb_headroom(skb);
3870 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3871 rest = len - inpage;
3872 if (rest > hroom)
3873 return 1;
2863c613 3874 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3875 skb->data -= rest;
d4ae1f5e
SR		 3876 skb->tail -= rest;
3877 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3878 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3879 }
3880 return 0;
3881}
3882EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3883
f90b744e 3884static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3885 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3886 int offset)
4a71df50 3887{
2863c613 3888 int length = skb_headlen(skb);
4a71df50
FB		 3889 int length_here;
3890 int element;
3891 char *data;
51aa165c
FB		 3892 int first_lap, cnt;
3893 struct skb_frag_struct *frag;
4a71df50
FB		 3894
3895 element = *next_element_to_fill;
3896 data = skb->data;
3897 first_lap = (is_tso == 0 ? 1 : 0);
3898
683d718a
FB		 3899 if (offset >= 0) {
3900 data = skb->data + offset;
e1f03ae8 3901 length -= offset;
683d718a
FB		 3902 first_lap = 0;
3903 }
3904
4a71df50
FB		 3905 while (length > 0) {
3906 /* length_here is the remaining amount of data in this page */
3907 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3908 if (length < length_here)
3909 length_here = length;
3910
3911 buffer->element[element].addr = data;
3912 buffer->element[element].length = length_here;
3913 length -= length_here;
3914 if (!length) {
3915 if (first_lap)
51aa165c 3916 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3917 buffer->element[element].eflags =
3918 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3919 else
3ec90878 3920 buffer->element[element].eflags = 0;
4a71df50 3921 else
3ec90878
JG		 3922 buffer->element[element].eflags =
3923 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3924 } else {
3925 if (first_lap)
3ec90878
JG		 3926 buffer->element[element].eflags =
3927 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3928 else
3ec90878
JG		 3929 buffer->element[element].eflags =
3930 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3931 }
3932 data += length_here;
3933 element++;
3934 first_lap = 0;
3935 }
51aa165c
FB		 3936
3937 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3938 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3939 data = (char *)page_to_phys(skb_frag_page(frag)) +
3940 frag->page_offset;
3941 length = frag->size;
3942 while (length > 0) {
3943 length_here = PAGE_SIZE -
3944 ((unsigned long) data % PAGE_SIZE);
3945 if (length < length_here)
3946 length_here = length;
3947
3948 buffer->element[element].addr = data;
3949 buffer->element[element].length = length_here;
3950 buffer->element[element].eflags =
3951 SBAL_EFLAGS_MIDDLE_FRAG;
3952 length -= length_here;
3953 data += length_here;
3954 element++;
3955 }
51aa165c
FB		 3956 }
3957
3ec90878
JG		 3958 if (buffer->element[element - 1].eflags)
3959 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3960 *next_element_to_fill = element;
3961}
3962
f90b744e 3963static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3964 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3965 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3966{
3967 struct qdio_buffer *buffer;
4a71df50
FB		 3968 int flush_cnt = 0, hdr_len, large_send = 0;
3969
4a71df50
FB		 3970 buffer = buf->buffer;
3971 atomic_inc(&skb->users);
3972 skb_queue_tail(&buf->skb_list, skb);
3973
4a71df50 3974 /*check first on TSO ....*/
683d718a 3975 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3976 int element = buf->next_element_to_fill;
3977
683d718a
FB		 3978 hdr_len = sizeof(struct qeth_hdr_tso) +
3979 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3980 /*fill first buffer entry only with header information */
3981 buffer->element[element].addr = skb->data;
3982 buffer->element[element].length = hdr_len;
3ec90878 3983 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3984 buf->next_element_to_fill++;
3985 skb->data += hdr_len;
3986 skb->len -= hdr_len;
3987 large_send = 1;
3988 }
683d718a
FB		 3989
3990 if (offset >= 0) {
3991 int element = buf->next_element_to_fill;
3992 buffer->element[element].addr = hdr;
3993 buffer->element[element].length = sizeof(struct qeth_hdr) +
3994 hd_len;
3ec90878 3995 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3996 buf->is_header[element] = 1;
3997 buf->next_element_to_fill++;
3998 }
3999
51aa165c
FB		 4000 __qeth_fill_buffer(skb, buffer, large_send,
4001 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 4002
4003 if (!queue->do_pack) {
847a50fd 4004 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4005 /* set state to PRIMED -> will be flushed */
4006 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4007 flush_cnt = 1;
4008 } else {
847a50fd 4009 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4010 if (queue->card->options.performance_stats)
4011 queue->card->perf_stats.skbs_sent_pack++;
4012 if (buf->next_element_to_fill >=
4013 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4014 /*
4015 * packed buffer if full -> set state PRIMED
4016 * -> will be flushed
4017 */
4018 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4019 flush_cnt = 1;
4020 }
4021 }
4022 return flush_cnt;
4023}
4024
4025int qeth_do_send_packet_fast(struct qeth_card *card,
4026 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4027 struct qeth_hdr *hdr, int elements_needed,
64ef8957 4028 int offset, int hd_len)
4a71df50
FB		 4029{
4030 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 4031 int index;
4032
4a71df50
FB		 4033 /* spin until we get the queue ... */
4034 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4035 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4036 /* ... now we've got the queue */
4037 index = queue->next_buf_to_fill;
0da9581d 4038 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4039 /*
4040 * check if buffer is empty to make sure that we do not 'overtake'
4041 * ourselves and try to fill a buffer that is already primed
4042 */
4043 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4044 goto out;
64ef8957 4045 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4046 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4047 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4048 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4049 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4050 return 0;
4051out:
4052 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4053 return -EBUSY;
4054}
4055EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4056
4057int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4058 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 4059 int elements_needed)
4a71df50
FB		 4060{
4061 struct qeth_qdio_out_buffer *buffer;
4062 int start_index;
4063 int flush_count = 0;
4064 int do_pack = 0;
4065 int tmp;
4066 int rc = 0;
4067
4a71df50
FB		 4068 /* spin until we get the queue ... */
4069 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4070 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4071 start_index = queue->next_buf_to_fill;
0da9581d 4072 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4073 /*
4074 * check if buffer is empty to make sure that we do not 'overtake'
4075 * ourselves and try to fill a buffer that is already primed
4076 */
4077 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4078 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4079 return -EBUSY;
4080 }
4081 /* check if we need to switch packing state of this queue */
4082 qeth_switch_to_packing_if_needed(queue);
4083 if (queue->do_pack) {
4084 do_pack = 1;
64ef8957
FB		 4085 /* does packet fit in current buffer? */
4086 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4087 buffer->next_element_to_fill) < elements_needed) {
4088 /* ... no -> set state PRIMED */
4089 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4090 flush_count++;
4091 queue->next_buf_to_fill =
4092 (queue->next_buf_to_fill + 1) %
4093 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4094 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4095 /* we did a step forward, so check buffer state
4096 * again */
4097 if (atomic_read(&buffer->state) !=
4098 QETH_QDIO_BUF_EMPTY) {
4099 qeth_flush_buffers(queue, start_index,
779e6e1c 4100 flush_count);
64ef8957 4101 atomic_set(&queue->state,
4a71df50 4102 QETH_OUT_Q_UNLOCKED);
64ef8957 4103 return -EBUSY;
4a71df50
FB		 4104 }
4105 }
4106 }
64ef8957 4107 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4108 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4109 QDIO_MAX_BUFFERS_PER_Q;
4110 flush_count += tmp;
4a71df50 4111 if (flush_count)
779e6e1c 4112 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4113 else if (!atomic_read(&queue->set_pci_flags_count))
4114 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4115 /*
4116 * queue->state will go from LOCKED -> UNLOCKED or from
4117 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4118 * (switch packing state or flush buffer to get another pci flag out).
4119 * In that case we will enter this loop
4120 */
4121 while (atomic_dec_return(&queue->state)) {
4122 flush_count = 0;
4123 start_index = queue->next_buf_to_fill;
4124 /* check if we can go back to non-packing state */
4125 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4126 /*
4127 * check if we need to flush a packing buffer to get a pci
4128 * flag out on the queue
4129 */
4130 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4131 flush_count += qeth_flush_buffers_on_no_pci(queue);
4132 if (flush_count)
779e6e1c 4133 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4134 }
4135 /* at this point the queue is UNLOCKED again */
4136 if (queue->card->options.performance_stats && do_pack)
4137 queue->card->perf_stats.bufs_sent_pack += flush_count;
4138
4139 return rc;
4140}
4141EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4142
4143static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4144 struct qeth_reply *reply, unsigned long data)
4145{
4146 struct qeth_ipa_cmd *cmd;
4147 struct qeth_ipacmd_setadpparms *setparms;
4148
847a50fd 4149 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4150
4151 cmd = (struct qeth_ipa_cmd *) data;
4152 setparms = &(cmd->data.setadapterparms);
4153
4154 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4155 if (cmd->hdr.return_code) {
8a593148 4156 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4157 setparms->data.mode = SET_PROMISC_MODE_OFF;
4158 }
4159 card->info.promisc_mode = setparms->data.mode;
4160 return 0;
4161}
4162
4163void qeth_setadp_promisc_mode(struct qeth_card *card)
4164{
4165 enum qeth_ipa_promisc_modes mode;
4166 struct net_device *dev = card->dev;
4167 struct qeth_cmd_buffer *iob;
4168 struct qeth_ipa_cmd *cmd;
4169
847a50fd 4170 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4171
4172 if (((dev->flags & IFF_PROMISC) &&
4173 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4174 (!(dev->flags & IFF_PROMISC) &&
4175 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4176 return;
4177 mode = SET_PROMISC_MODE_OFF;
4178 if (dev->flags & IFF_PROMISC)
4179 mode = SET_PROMISC_MODE_ON;
847a50fd 4180 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4181
4182 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4183 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4184 if (!iob)
4185 return;
4a71df50
FB		 4186 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4187 cmd->data.setadapterparms.data.mode = mode;
4188 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4189}
4190EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4191
4192int qeth_change_mtu(struct net_device *dev, int new_mtu)
4193{
4194 struct qeth_card *card;
4195 char dbf_text[15];
4196
509e2562 4197 card = dev->ml_priv;
4a71df50 4198
847a50fd 4199 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4200 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4201 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4202
4a71df50
FB		 4203 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4204 (!qeth_mtu_is_valid(card, new_mtu)))
4205 return -EINVAL;
4206 dev->mtu = new_mtu;
4207 return 0;
4208}
4209EXPORT_SYMBOL_GPL(qeth_change_mtu);
4210
4211struct net_device_stats *qeth_get_stats(struct net_device *dev)
4212{
4213 struct qeth_card *card;
4214
509e2562 4215 card = dev->ml_priv;
4a71df50 4216
847a50fd 4217 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4218
4219 return &card->stats;
4220}
4221EXPORT_SYMBOL_GPL(qeth_get_stats);
4222
4223static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4224 struct qeth_reply *reply, unsigned long data)
4225{
4226 struct qeth_ipa_cmd *cmd;
4227
847a50fd 4228 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4229
4230 cmd = (struct qeth_ipa_cmd *) data;
4231 if (!card->options.layer2 ||
4232 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4233 memcpy(card->dev->dev_addr,
4234 &cmd->data.setadapterparms.data.change_addr.addr,
4235 OSA_ADDR_LEN);
4236 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4237 }
4238 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4239 return 0;
4240}
4241
4242int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4243{
4244 int rc;
4245 struct qeth_cmd_buffer *iob;
4246 struct qeth_ipa_cmd *cmd;
4247
847a50fd 4248 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4249
4250 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4251 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4252 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4253 if (!iob)
4254 return -ENOMEM;
4a71df50
FB		 4255 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4256 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4257 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4258 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4259 card->dev->dev_addr, OSA_ADDR_LEN);
4260 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4261 NULL);
4262 return rc;
4263}
4264EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4265
d64ecc22
EL		 4266static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4267 struct qeth_reply *reply, unsigned long data)
4268{
4269 struct qeth_ipa_cmd *cmd;
4270 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4271 int fallback = *(int *)reply->param;
d64ecc22 4272
847a50fd 4273 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4274
4275 cmd = (struct qeth_ipa_cmd *) data;
4276 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4277 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4278 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4279 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4280 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4281 if (cmd->data.setadapterparms.hdr.return_code !=
4282 SET_ACCESS_CTRL_RC_SUCCESS)
4283 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4284 card->gdev->dev.kobj.name,
4285 access_ctrl_req->subcmd_code,
4286 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4287 switch (cmd->data.setadapterparms.hdr.return_code) {
4288 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4289 if (card->options.isolation == ISOLATION_MODE_NONE) {
4290 dev_info(&card->gdev->dev,
4291 "QDIO data connection isolation is deactivated\n");
4292 } else {
4293 dev_info(&card->gdev->dev,
4294 "QDIO data connection isolation is activated\n");
4295 }
d64ecc22 4296 break;
0f54761d
SR		 4297 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4298 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4299 "deactivated\n", dev_name(&card->gdev->dev));
4300 if (fallback)
4301 card->options.isolation = card->options.prev_isolation;
4302 break;
4303 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4304 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4305 " activated\n", dev_name(&card->gdev->dev));
4306 if (fallback)
4307 card->options.isolation = card->options.prev_isolation;
4308 break;
d64ecc22 4309 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4310 dev_err(&card->gdev->dev, "Adapter does not "
4311 "support QDIO data connection isolation\n");
d64ecc22 4312 break;
d64ecc22 4313 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4314 dev_err(&card->gdev->dev,
4315 "Adapter is dedicated. "
4316 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4317 if (fallback)
4318 card->options.isolation = card->options.prev_isolation;
d64ecc22 4319 break;
d64ecc22 4320 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4321 dev_err(&card->gdev->dev,
4322 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4323 if (fallback)
4324 card->options.isolation = card->options.prev_isolation;
4325 break;
4326 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4327 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4328 "support reflective relay mode\n");
4329 if (fallback)
4330 card->options.isolation = card->options.prev_isolation;
4331 break;
4332 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4333 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4334 "enabled at the adjacent switch port");
4335 if (fallback)
4336 card->options.isolation = card->options.prev_isolation;
4337 break;
4338 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4339 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4340 "at the adjacent switch failed\n");
d64ecc22 4341 break;
d64ecc22 4342 default:
d64ecc22 4343 /* this should never happen */
0f54761d
SR		 4344 if (fallback)
4345 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4346 break;
4347 }
d64ecc22 4348 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4349 return 0;
d64ecc22
EL		 4350}
4351
4352static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4353 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4354{
4355 int rc;
4356 struct qeth_cmd_buffer *iob;
4357 struct qeth_ipa_cmd *cmd;
4358 struct qeth_set_access_ctrl *access_ctrl_req;
4359
847a50fd 4360 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4361
4362 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4363 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4364
4365 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4366 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4367 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4368 if (!iob)
4369 return -ENOMEM;
d64ecc22
EL		 4370 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4371 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4372 access_ctrl_req->subcmd_code = isolation;
4373
4374 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4375 &fallback);
d64ecc22
EL		 4376 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4377 return rc;
4378}
4379
0f54761d 4380int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4381{
4382 int rc = 0;
4383
847a50fd 4384 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4385
5113fec0
UB		 4386 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4387 card->info.type == QETH_CARD_TYPE_OSX) &&
4388 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4389 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4390 card->options.isolation, fallback);
d64ecc22
EL		 4391 if (rc) {
4392 QETH_DBF_MESSAGE(3,
5113fec0 4393 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4394 card->gdev->dev.kobj.name,
4395 rc);
0f54761d 4396 rc = -EOPNOTSUPP;
d64ecc22
EL		 4397 }
4398 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4399 card->options.isolation = ISOLATION_MODE_NONE;
4400
4401 dev_err(&card->gdev->dev, "Adapter does not "
4402 "support QDIO data connection isolation\n");
4403 rc = -EOPNOTSUPP;
4404 }
4405 return rc;
4406}
4407EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4408
4a71df50
FB		 4409void qeth_tx_timeout(struct net_device *dev)
4410{
4411 struct qeth_card *card;
4412
509e2562 4413 card = dev->ml_priv;
847a50fd 4414 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4415 card->stats.tx_errors++;
4416 qeth_schedule_recovery(card);
4417}
4418EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4419
942d6984 4420static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4421{
509e2562 4422 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4423 int rc = 0;
4424
4425 switch (regnum) {
4426 case MII_BMCR: /* Basic mode control register */
4427 rc = BMCR_FULLDPLX;
4428 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4429 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4430 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4431 rc |= BMCR_SPEED100;
4432 break;
4433 case MII_BMSR: /* Basic mode status register */
4434 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4435 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4436 BMSR_100BASE4;
4437 break;
4438 case MII_PHYSID1: /* PHYS ID 1 */
4439 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4440 dev->dev_addr[2];
4441 rc = (rc >> 5) & 0xFFFF;
4442 break;
4443 case MII_PHYSID2: /* PHYS ID 2 */
4444 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4445 break;
4446 case MII_ADVERTISE: /* Advertisement control reg */
4447 rc = ADVERTISE_ALL;
4448 break;
4449 case MII_LPA: /* Link partner ability reg */
4450 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4451 LPA_100BASE4 | LPA_LPACK;
4452 break;
4453 case MII_EXPANSION: /* Expansion register */
4454 break;
4455 case MII_DCOUNTER: /* disconnect counter */
4456 break;
4457 case MII_FCSCOUNTER: /* false carrier counter */
4458 break;
4459 case MII_NWAYTEST: /* N-way auto-neg test register */
4460 break;
4461 case MII_RERRCOUNTER: /* rx error counter */
4462 rc = card->stats.rx_errors;
4463 break;
4464 case MII_SREVISION: /* silicon revision */
4465 break;
4466 case MII_RESV1: /* reserved 1 */
4467 break;
4468 case MII_LBRERROR: /* loopback, rx, bypass error */
4469 break;
4470 case MII_PHYADDR: /* physical address */
4471 break;
4472 case MII_RESV2: /* reserved 2 */
4473 break;
4474 case MII_TPISTATUS: /* TPI status for 10mbps */
4475 break;
4476 case MII_NCONFIG: /* network interface config */
4477 break;
4478 default:
4479 break;
4480 }
4481 return rc;
4482}
4a71df50
FB		 4483
4484static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4485 struct qeth_cmd_buffer *iob, int len,
4486 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4487 unsigned long),
4488 void *reply_param)
4489{
4490 u16 s1, s2;
4491
847a50fd 4492 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4493
4494 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4495 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4496 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4497 /* adjust PDU length fields in IPA_PDU_HEADER */
4498 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4499 s2 = (u32) len;
4500 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4501 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4502 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4503 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4504 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4505 reply_cb, reply_param);
4506}
4507
4508static int qeth_snmp_command_cb(struct qeth_card *card,
4509 struct qeth_reply *reply, unsigned long sdata)
4510{
4511 struct qeth_ipa_cmd *cmd;
4512 struct qeth_arp_query_info *qinfo;
4513 struct qeth_snmp_cmd *snmp;
4514 unsigned char *data;
4515 __u16 data_len;
4516
847a50fd 4517 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4518
4519 cmd = (struct qeth_ipa_cmd *) sdata;
4520 data = (unsigned char *)((char *)cmd - reply->offset);
4521 qinfo = (struct qeth_arp_query_info *) reply->param;
4522 snmp = &cmd->data.setadapterparms.data.snmp;
4523
4524 if (cmd->hdr.return_code) {
8a593148 4525 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4526 return 0;
4527 }
4528 if (cmd->data.setadapterparms.hdr.return_code) {
4529 cmd->hdr.return_code =
4530 cmd->data.setadapterparms.hdr.return_code;
8a593148 4531 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4532 return 0;
4533 }
4534 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4535 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4536 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4537 else
4538 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4539
4540 /* check if there is enough room in userspace */
4541 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4542 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4543 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4544 return 0;
4545 }
847a50fd 4546 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4547 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4548 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4549 cmd->data.setadapterparms.hdr.seq_no);
4550 /*copy entries to user buffer*/
4551 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4552 memcpy(qinfo->udata + qinfo->udata_offset,
4553 (char *)snmp,
4554 data_len + offsetof(struct qeth_snmp_cmd, data));
4555 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4556 } else {
4557 memcpy(qinfo->udata + qinfo->udata_offset,
4558 (char *)&snmp->request, data_len);
4559 }
4560 qinfo->udata_offset += data_len;
4561 /* check if all replies received ... */
847a50fd 4562 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4563 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4564 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4565 cmd->data.setadapterparms.hdr.seq_no);
4566 if (cmd->data.setadapterparms.hdr.seq_no <
4567 cmd->data.setadapterparms.hdr.used_total)
4568 return 1;
4569 return 0;
4570}
4571
942d6984 4572static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4573{
4574 struct qeth_cmd_buffer *iob;
4575 struct qeth_ipa_cmd *cmd;
4576 struct qeth_snmp_ureq *ureq;
6fb392b1 4577 unsigned int req_len;
4a71df50
FB		 4578 struct qeth_arp_query_info qinfo = {0, };
4579 int rc = 0;
4580
847a50fd 4581 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4582
4583 if (card->info.guestlan)
4584 return -EOPNOTSUPP;
4585
4586 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4587 (!card->options.layer2)) {
4a71df50
FB		 4588 return -EOPNOTSUPP;
4589 }
4590 /* skip 4 bytes (data_len struct member) to get req_len */
4591 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4592 return -EFAULT;
6fb392b1
UB		 4593 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4594 sizeof(struct qeth_ipacmd_hdr) -
4595 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4596 return -EINVAL;
4986f3f0
JL		 4597 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4598 if (IS_ERR(ureq)) {
847a50fd 4599 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4600 return PTR_ERR(ureq);
4a71df50
FB		 4601 }
4602 qinfo.udata_len = ureq->hdr.data_len;
4603 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4604 if (!qinfo.udata) {
4605 kfree(ureq);
4606 return -ENOMEM;
4607 }
4608 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4609
4610 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4611 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4612 if (!iob) {
4613 rc = -ENOMEM;
4614 goto out;
4615 }
4a71df50
FB		 4616 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4617 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4618 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4619 qeth_snmp_command_cb, (void *)&qinfo);
4620 if (rc)
14cc21b6 4621 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4622 QETH_CARD_IFNAME(card), rc);
4623 else {
4624 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4625 rc = -EFAULT;
4626 }
1aec42bc 4627out:
4a71df50
FB		 4628 kfree(ureq);
4629 kfree(qinfo.udata);
4630 return rc;
4631}
4a71df50 4632
c3ab96f3
FB		 4633static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4634 struct qeth_reply *reply, unsigned long data)
4635{
4636 struct qeth_ipa_cmd *cmd;
4637 struct qeth_qoat_priv *priv;
4638 char *resdata;
4639 int resdatalen;
4640
4641 QETH_CARD_TEXT(card, 3, "qoatcb");
4642
4643 cmd = (struct qeth_ipa_cmd *)data;
4644 priv = (struct qeth_qoat_priv *)reply->param;
4645 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4646 resdata = (char *)data + 28;
4647
4648 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4649 cmd->hdr.return_code = IPA_RC_FFFF;
4650 return 0;
4651 }
4652
4653 memcpy((priv->buffer + priv->response_len), resdata,
4654 resdatalen);
4655 priv->response_len += resdatalen;
4656
4657 if (cmd->data.setadapterparms.hdr.seq_no <
4658 cmd->data.setadapterparms.hdr.used_total)
4659 return 1;
4660 return 0;
4661}
4662
942d6984 4663static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4664{
4665 int rc = 0;
4666 struct qeth_cmd_buffer *iob;
4667 struct qeth_ipa_cmd *cmd;
4668 struct qeth_query_oat *oat_req;
4669 struct qeth_query_oat_data oat_data;
4670 struct qeth_qoat_priv priv;
4671 void __user *tmp;
4672
4673 QETH_CARD_TEXT(card, 3, "qoatcmd");
4674
4675 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4676 rc = -EOPNOTSUPP;
4677 goto out;
4678 }
4679
4680 if (copy_from_user(&oat_data, udata,
4681 sizeof(struct qeth_query_oat_data))) {
4682 rc = -EFAULT;
4683 goto out;
4684 }
4685
4686 priv.buffer_len = oat_data.buffer_len;
4687 priv.response_len = 0;
4688 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4689 if (!priv.buffer) {
4690 rc = -ENOMEM;
4691 goto out;
4692 }
4693
4694 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4695 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4696 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4697 if (!iob) {
4698 rc = -ENOMEM;
4699 goto out_free;
4700 }
c3ab96f3
FB		 4701 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4702 oat_req = &cmd->data.setadapterparms.data.query_oat;
4703 oat_req->subcmd_code = oat_data.command;
4704
4705 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4706 &priv);
4707 if (!rc) {
4708 if (is_compat_task())
4709 tmp = compat_ptr(oat_data.ptr);
4710 else
4711 tmp = (void __user *)(unsigned long)oat_data.ptr;
4712
4713 if (copy_to_user(tmp, priv.buffer,
4714 priv.response_len)) {
4715 rc = -EFAULT;
4716 goto out_free;
4717 }
4718
4719 oat_data.response_len = priv.response_len;
4720
4721 if (copy_to_user(udata, &oat_data,
4722 sizeof(struct qeth_query_oat_data)))
4723 rc = -EFAULT;
4724 } else
4725 if (rc == IPA_RC_FFFF)
4726 rc = -EFAULT;
4727
4728out_free:
4729 kfree(priv.buffer);
4730out:
4731 return rc;
4732}
c3ab96f3 4733
e71e4072
HC		 4734static int qeth_query_card_info_cb(struct qeth_card *card,
4735 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4736{
4737 struct qeth_ipa_cmd *cmd;
4738 struct qeth_query_card_info *card_info;
4739 struct carrier_info *carrier_info;
4740
4741 QETH_CARD_TEXT(card, 2, "qcrdincb");
4742 carrier_info = (struct carrier_info *)reply->param;
4743 cmd = (struct qeth_ipa_cmd *)data;
4744 card_info = &cmd->data.setadapterparms.data.card_info;
4745 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4746 carrier_info->card_type = card_info->card_type;
4747 carrier_info->port_mode = card_info->port_mode;
4748 carrier_info->port_speed = card_info->port_speed;
4749 }
4750
4751 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4752 return 0;
4753}
4754
bca51650 4755static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4756 struct carrier_info *carrier_info)
4757{
4758 struct qeth_cmd_buffer *iob;
4759
4760 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4761 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4762 return -EOPNOTSUPP;
4763 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4764 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4765 if (!iob)
4766 return -ENOMEM;
02d5cb5b
EC		 4767 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4768 (void *)carrier_info);
4769}
02d5cb5b 4770
4a71df50
FB		 4771static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4772{
aa59004b
JW		 4773 if (card->info.type == QETH_CARD_TYPE_IQD)
4774 return QDIO_IQDIO_QFMT;
4775 else
4776 return QDIO_QETH_QFMT;
4a71df50
FB		 4777}
4778
d0ff1f52
UB		 4779static void qeth_determine_capabilities(struct qeth_card *card)
4780{
4781 int rc;
4782 int length;
4783 char *prcd;
4784 struct ccw_device *ddev;
4785 int ddev_offline = 0;
4786
4787 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4788 ddev = CARD_DDEV(card);
4789 if (!ddev->online) {
4790 ddev_offline = 1;
4791 rc = ccw_device_set_online(ddev);
4792 if (rc) {
4793 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4794 goto out;
4795 }
4796 }
4797
4798 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4799 if (rc) {
4800 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4801 dev_name(&card->gdev->dev), rc);
4802 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4803 goto out_offline;
4804 }
4805 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4806 if (ddev_offline)
4807 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4808 kfree(prcd);
4809
4810 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4811 if (rc)
4812 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4813
0da9581d 4814 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4815 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4816 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4817 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4818 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4819 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4820 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4821 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4822 dev_info(&card->gdev->dev,
4823 "Completion Queueing supported\n");
4824 } else {
4825 card->options.cq = QETH_CQ_NOTAVAILABLE;
4826 }
4827
4828
d0ff1f52
UB		 4829out_offline:
4830 if (ddev_offline == 1)
4831 ccw_device_set_offline(ddev);
4832out:
4833 return;
4834}
4835
0da9581d
EL		 4836static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4837 struct qdio_buffer **in_sbal_ptrs,
4838 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4839 int i;
4840
4841 if (card->options.cq == QETH_CQ_ENABLED) {
4842 int offset = QDIO_MAX_BUFFERS_PER_Q *
4843 (card->qdio.no_in_queues - 1);
4844 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4845 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4846 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4847 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4848 }
4849
4850 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4851 }
4852}
4853
4a71df50
FB		 4854static int qeth_qdio_establish(struct qeth_card *card)
4855{
4856 struct qdio_initialize init_data;
4857 char *qib_param_field;
4858 struct qdio_buffer **in_sbal_ptrs;
104ea556 4859 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4860 struct qdio_buffer **out_sbal_ptrs;
4861 int i, j, k;
4862 int rc = 0;
4863
d11ba0c4 4864 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4865
4866 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4867 GFP_KERNEL);
104ea556 4868 if (!qib_param_field) {
4869 rc = -ENOMEM;
4870 goto out_free_nothing;
4871 }
4a71df50
FB		 4872
4873 qeth_create_qib_param_field(card, qib_param_field);
4874 qeth_create_qib_param_field_blkt(card, qib_param_field);
4875
b3332930 4876 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4877 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4878 GFP_KERNEL);
4879 if (!in_sbal_ptrs) {
104ea556 4880 rc = -ENOMEM;
4881 goto out_free_qib_param;
4a71df50 4882 }
0da9581d 4883 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4884 in_sbal_ptrs[i] = (struct qdio_buffer *)
4885 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4886 }
4a71df50 4887
0da9581d
EL		 4888 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4889 GFP_KERNEL);
104ea556 4890 if (!queue_start_poll) {
4891 rc = -ENOMEM;
4892 goto out_free_in_sbals;
4893 }
0da9581d 4894 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4895 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4896
4897 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4898
4a71df50 4899 out_sbal_ptrs =
b3332930 4900 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4901 sizeof(void *), GFP_KERNEL);
4902 if (!out_sbal_ptrs) {
104ea556 4903 rc = -ENOMEM;
4904 goto out_free_queue_start_poll;
4a71df50
FB		 4905 }
4906 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4907 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4908 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4909 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4910 }
4911
4912 memset(&init_data, 0, sizeof(struct qdio_initialize));
4913 init_data.cdev = CARD_DDEV(card);
4914 init_data.q_format = qeth_get_qdio_q_format(card);
4915 init_data.qib_param_field_format = 0;
4916 init_data.qib_param_field = qib_param_field;
0da9581d 4917 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4918 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4919 init_data.input_handler = card->discipline->input_handler;
4920 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4921 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4922 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4923 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4924 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4925 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4926 init_data.scan_threshold =
0fa81cd4 4927 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4928
4929 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4930 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4931 rc = qdio_allocate(&init_data);
4932 if (rc) {
4933 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4934 goto out;
4935 }
4936 rc = qdio_establish(&init_data);
4937 if (rc) {
4a71df50 4938 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4939 qdio_free(CARD_DDEV(card));
4940 }
4a71df50 4941 }
0da9581d
EL		 4942
4943 switch (card->options.cq) {
4944 case QETH_CQ_ENABLED:
4945 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4946 break;
4947 case QETH_CQ_DISABLED:
4948 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4949 break;
4950 default:
4951 break;
4952 }
cc961d40 4953out:
4a71df50 4954 kfree(out_sbal_ptrs);
104ea556 4955out_free_queue_start_poll:
4956 kfree(queue_start_poll);
4957out_free_in_sbals:
4a71df50 4958 kfree(in_sbal_ptrs);
104ea556 4959out_free_qib_param:
4a71df50 4960 kfree(qib_param_field);
104ea556 4961out_free_nothing:
4a71df50
FB		 4962 return rc;
4963}
4964
4965static void qeth_core_free_card(struct qeth_card *card)
4966{
4967
d11ba0c4
PT		 4968 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4969 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4970 qeth_clean_channel(&card->read);
4971 qeth_clean_channel(&card->write);
4972 if (card->dev)
4973 free_netdev(card->dev);
4a71df50 4974 qeth_free_qdio_buffers(card);
6bcac508 4975 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4976 kfree(card);
4977}
4978
395672e0
SR		 4979void qeth_trace_features(struct qeth_card *card)
4980{
4981 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4982 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4983 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4984 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4985 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4986 sizeof(card->info.diagass_support));
395672e0
SR		 4987}
4988EXPORT_SYMBOL_GPL(qeth_trace_features);
4989
4a71df50 4990static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4991 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4992 .driver_info = QETH_CARD_TYPE_OSD},
4993 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4994 .driver_info = QETH_CARD_TYPE_IQD},
4995 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4996 .driver_info = QETH_CARD_TYPE_OSN},
4997 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4998 .driver_info = QETH_CARD_TYPE_OSM},
4999 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5000 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5001 {},
5002};
5003MODULE_DEVICE_TABLE(ccw, qeth_ids);
5004
5005static struct ccw_driver qeth_ccw_driver = {
3bda058b 5006 .driver = {
3e70b3b8 5007 .owner = THIS_MODULE,
3bda058b
SO		 5008 .name = "qeth",
5009 },
4a71df50
FB		 5010 .ids = qeth_ids,
5011 .probe = ccwgroup_probe_ccwdev,
5012 .remove = ccwgroup_remove_ccwdev,
5013};
5014
4a71df50
FB		 5015int qeth_core_hardsetup_card(struct qeth_card *card)
5016{
6ebb7f8d 5017 int retries = 3;
4a71df50
FB		 5018 int rc;
5019
d11ba0c4 5020 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5021 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5022 qeth_update_from_chp_desc(card);
4a71df50 5023retry:
6ebb7f8d 5024 if (retries < 3)
74eacdb9
FB		 5025 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5026 dev_name(&card->gdev->dev));
22ae2790 5027 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5028 ccw_device_set_offline(CARD_DDEV(card));
5029 ccw_device_set_offline(CARD_WDEV(card));
5030 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5031 qdio_free(CARD_DDEV(card));
aa909224
UB		 5032 rc = ccw_device_set_online(CARD_RDEV(card));
5033 if (rc)
5034 goto retriable;
5035 rc = ccw_device_set_online(CARD_WDEV(card));
5036 if (rc)
5037 goto retriable;
5038 rc = ccw_device_set_online(CARD_DDEV(card));
5039 if (rc)
5040 goto retriable;
aa909224 5041retriable:
4a71df50 5042 if (rc == -ERESTARTSYS) {
d11ba0c4 5043 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5044 return rc;
5045 } else if (rc) {
d11ba0c4 5046 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5047 if (--retries < 0)
4a71df50
FB		 5048 goto out;
5049 else
5050 goto retry;
5051 }
d0ff1f52 5052 qeth_determine_capabilities(card);
4a71df50
FB		 5053 qeth_init_tokens(card);
5054 qeth_init_func_level(card);
5055 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5056 if (rc == -ERESTARTSYS) {
d11ba0c4 5057 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5058 return rc;
5059 } else if (rc) {
d11ba0c4 5060 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5061 if (--retries < 0)
5062 goto out;
5063 else
5064 goto retry;
5065 }
5066 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5067 if (rc == -ERESTARTSYS) {
d11ba0c4 5068 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5069 return rc;
5070 } else if (rc) {
d11ba0c4 5071 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5072 if (--retries < 0)
5073 goto out;
5074 else
5075 goto retry;
5076 }
908abbb5 5077 card->read_or_write_problem = 0;
4a71df50
FB		 5078 rc = qeth_mpc_initialize(card);
5079 if (rc) {
d11ba0c4 5080 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5081 goto out;
5082 }
1da74b1c 5083
10340510
JW		 5084 rc = qeth_send_startlan(card);
5085 if (rc) {
5086 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5087 if (rc == IPA_RC_LAN_OFFLINE) {
5088 dev_warn(&card->gdev->dev,
5089 "The LAN is offline\n");
5090 card->lan_online = 0;
5091 } else {
5092 rc = -ENODEV;
5093 goto out;
5094 }
5095 } else
5096 card->lan_online = 1;
5097
1da74b1c 5098 card->options.ipa4.supported_funcs = 0;
4d7def2a 5099 card->options.ipa6.supported_funcs = 0;
1da74b1c 5100 card->options.adp.supported_funcs = 0;
b4d72c08 5101 card->options.sbp.supported_funcs = 0;
1da74b1c 5102 card->info.diagass_support = 0;
1aec42bc
TR		 5103 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5104 if (rc == -ENOMEM)
5105 goto out;
5106 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5107 rc = qeth_query_setadapterparms(card);
5108 if (rc < 0) {
10340510 5109 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5110 goto out;
5111 }
5112 }
5113 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5114 rc = qeth_query_setdiagass(card);
5115 if (rc < 0) {
10340510 5116 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5117 goto out;
5118 }
5119 }
4a71df50
FB		 5120 return 0;
5121out:
74eacdb9
FB		 5122 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5123 "an error on the device\n");
5124 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5125 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5126 return rc;
5127}
5128EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5129
b3332930
FB		 5130static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5131 struct qdio_buffer_element *element,
4a71df50
FB		 5132 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5133{
5134 struct page *page = virt_to_page(element->addr);
5135 if (*pskb == NULL) {
b3332930
FB		 5136 if (qethbuffer->rx_skb) {
5137 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5138 *pskb = qethbuffer->rx_skb;
5139 qethbuffer->rx_skb = NULL;
5140 } else {
5141 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5142 if (!(*pskb))
5143 return -ENOMEM;
5144 }
5145
4a71df50 5146 skb_reserve(*pskb, ETH_HLEN);
b3332930 5147 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5148 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5149 data_len);
5150 } else {
5151 get_page(page);
b3332930
FB		 5152 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5153 element->addr + offset, QETH_RX_PULL_LEN);
5154 skb_fill_page_desc(*pskb, *pfrag, page,
5155 offset + QETH_RX_PULL_LEN,
5156 data_len - QETH_RX_PULL_LEN);
5157 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5158 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5159 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5160 (*pfrag)++;
5161 }
5162 } else {
5163 get_page(page);
5164 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5165 (*pskb)->data_len += data_len;
5166 (*pskb)->len += data_len;
5167 (*pskb)->truesize += data_len;
5168 (*pfrag)++;
5169 }
0da9581d
EL		 5170
5171
4a71df50
FB		 5172 return 0;
5173}
5174
bca51650
TR		 5175static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5176{
5177 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5178}
5179
4a71df50 5180struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5181 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5182 struct qdio_buffer_element **__element, int *__offset,
5183 struct qeth_hdr **hdr)
5184{
5185 struct qdio_buffer_element *element = *__element;
b3332930 5186 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5187 int offset = *__offset;
5188 struct sk_buff *skb = NULL;
76b11f8e 5189 int skb_len = 0;
4a71df50
FB		 5190 void *data_ptr;
5191 int data_len;
5192 int headroom = 0;
5193 int use_rx_sg = 0;
5194 int frag = 0;
5195
4a71df50
FB		 5196 /* qeth_hdr must not cross element boundaries */
5197 if (element->length < offset + sizeof(struct qeth_hdr)) {
5198 if (qeth_is_last_sbale(element))
5199 return NULL;
5200 element++;
5201 offset = 0;
5202 if (element->length < sizeof(struct qeth_hdr))
5203 return NULL;
5204 }
5205 *hdr = element->addr + offset;
5206
5207 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5208 switch ((*hdr)->hdr.l2.id) {
5209 case QETH_HEADER_TYPE_LAYER2:
5210 skb_len = (*hdr)->hdr.l2.pkt_length;
5211 break;
5212 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5213 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5214 headroom = ETH_HLEN;
76b11f8e
UB		 5215 break;
5216 case QETH_HEADER_TYPE_OSN:
5217 skb_len = (*hdr)->hdr.osn.pdu_length;
5218 headroom = sizeof(struct qeth_hdr);
5219 break;
5220 default:
5221 break;
4a71df50
FB		 5222 }
5223
5224 if (!skb_len)
5225 return NULL;
5226
b3332930
FB		 5227 if (((skb_len >= card->options.rx_sg_cb) &&
5228 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5229 (!atomic_read(&card->force_alloc_skb))) ||
5230 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5231 use_rx_sg = 1;
5232 } else {
5233 skb = dev_alloc_skb(skb_len + headroom);
5234 if (!skb)
5235 goto no_mem;
5236 if (headroom)
5237 skb_reserve(skb, headroom);
5238 }
5239
5240 data_ptr = element->addr + offset;
5241 while (skb_len) {
5242 data_len = min(skb_len, (int)(element->length - offset));
5243 if (data_len) {
5244 if (use_rx_sg) {
b3332930
FB		 5245 if (qeth_create_skb_frag(qethbuffer, element,
5246 &skb, offset, &frag, data_len))
4a71df50
FB		 5247 goto no_mem;
5248 } else {
5249 memcpy(skb_put(skb, data_len), data_ptr,
5250 data_len);
5251 }
5252 }
5253 skb_len -= data_len;
5254 if (skb_len) {
5255 if (qeth_is_last_sbale(element)) {
847a50fd 5256 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5257 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5258 dev_kfree_skb_any(skb);
5259 card->stats.rx_errors++;
5260 return NULL;
5261 }
5262 element++;
5263 offset = 0;
5264 data_ptr = element->addr;
5265 } else {
5266 offset += data_len;
5267 }
5268 }
5269 *__element = element;
5270 *__offset = offset;
5271 if (use_rx_sg && card->options.performance_stats) {
5272 card->perf_stats.sg_skbs_rx++;
5273 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5274 }
5275 return skb;
5276no_mem:
5277 if (net_ratelimit()) {
847a50fd 5278 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5279 }
5280 card->stats.rx_dropped++;
5281 return NULL;
5282}
5283EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5284
8f43fb00
TR		 5285int qeth_setassparms_cb(struct qeth_card *card,
5286 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5287{
5288 struct qeth_ipa_cmd *cmd;
5289
5290 QETH_CARD_TEXT(card, 4, "defadpcb");
5291
5292 cmd = (struct qeth_ipa_cmd *) data;
5293 if (cmd->hdr.return_code == 0) {
5294 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5295 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5296 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5297 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5298 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5299 }
4d7def2a
TR		 5300 return 0;
5301}
8f43fb00 5302EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5303
b475e316
TR		 5304struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5305 enum qeth_ipa_funcs ipa_func,
5306 __u16 cmd_code, __u16 len,
5307 enum qeth_prot_versions prot)
4d7def2a
TR		 5308{
5309 struct qeth_cmd_buffer *iob;
5310 struct qeth_ipa_cmd *cmd;
5311
5312 QETH_CARD_TEXT(card, 4, "getasscm");
5313 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5314
5315 if (iob) {
5316 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5317 cmd->data.setassparms.hdr.assist_no = ipa_func;
5318 cmd->data.setassparms.hdr.length = 8 + len;
5319 cmd->data.setassparms.hdr.command_code = cmd_code;
5320 cmd->data.setassparms.hdr.return_code = 0;
5321 cmd->data.setassparms.hdr.seq_no = 0;
5322 }
5323
5324 return iob;
5325}
b475e316 5326EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5327
5328int qeth_send_setassparms(struct qeth_card *card,
5329 struct qeth_cmd_buffer *iob, __u16 len, long data,
5330 int (*reply_cb)(struct qeth_card *,
5331 struct qeth_reply *, unsigned long),
5332 void *reply_param)
5333{
5334 int rc;
5335 struct qeth_ipa_cmd *cmd;
5336
5337 QETH_CARD_TEXT(card, 4, "sendassp");
5338
5339 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5340 if (len <= sizeof(__u32))
5341 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5342 else /* (len > sizeof(__u32)) */
5343 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5344
5345 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5346 return rc;
5347}
5348EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5349
5350int qeth_send_simple_setassparms(struct qeth_card *card,
5351 enum qeth_ipa_funcs ipa_func,
5352 __u16 cmd_code, long data)
5353{
5354 int rc;
5355 int length = 0;
5356 struct qeth_cmd_buffer *iob;
5357
5358 QETH_CARD_TEXT(card, 4, "simassp4");
5359 if (data)
5360 length = sizeof(__u32);
5361 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5362 length, QETH_PROT_IPV4);
5363 if (!iob)
5364 return -ENOMEM;
5365 rc = qeth_send_setassparms(card, iob, length, data,
5366 qeth_setassparms_cb, NULL);
5367 return rc;
5368}
5369EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5370
4a71df50
FB		 5371static void qeth_unregister_dbf_views(void)
5372{
d11ba0c4
PT		 5373 int x;
5374 for (x = 0; x < QETH_DBF_INFOS; x++) {
5375 debug_unregister(qeth_dbf[x].id);
5376 qeth_dbf[x].id = NULL;
5377 }
4a71df50
FB		 5378}
5379
8e96c51c 5380void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5381{
5382 char dbf_txt_buf[32];
345aa66e 5383 va_list args;
cd023216 5384
8e6a8285 5385 if (!debug_level_enabled(id, level))
cd023216 5386 return;
345aa66e
PT		 5387 va_start(args, fmt);
5388 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5389 va_end(args);
8e96c51c 5390 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5391}
5392EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5393
4a71df50
FB		 5394static int qeth_register_dbf_views(void)
5395{
d11ba0c4
PT		 5396 int ret;
5397 int x;
5398
5399 for (x = 0; x < QETH_DBF_INFOS; x++) {
5400 /* register the areas */
5401 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5402 qeth_dbf[x].pages,
5403 qeth_dbf[x].areas,
5404 qeth_dbf[x].len);
5405 if (qeth_dbf[x].id == NULL) {
5406 qeth_unregister_dbf_views();
5407 return -ENOMEM;
5408 }
4a71df50 5409
d11ba0c4
PT		 5410 /* register a view */
5411 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5412 if (ret) {
5413 qeth_unregister_dbf_views();
5414 return ret;
5415 }
4a71df50 5416
d11ba0c4
PT		 5417 /* set a passing level */
5418 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5419 }
4a71df50
FB		 5420
5421 return 0;
5422}
5423
5424int qeth_core_load_discipline(struct qeth_card *card,
5425 enum qeth_discipline_id discipline)
5426{
5427 int rc = 0;
2022e00c 5428 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5429 switch (discipline) {
5430 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5431 card->discipline = try_then_request_module(
5432 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5433 break;
5434 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5435 card->discipline = try_then_request_module(
5436 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5437 break;
5438 }
c041f2d4 5439 if (!card->discipline) {
74eacdb9
FB		 5440 dev_err(&card->gdev->dev, "There is no kernel module to "
5441 "support discipline %d\n", discipline);
4a71df50
FB		 5442 rc = -EINVAL;
5443 }
2022e00c 5444 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5445 return rc;
5446}
5447
5448void qeth_core_free_discipline(struct qeth_card *card)
5449{
5450 if (card->options.layer2)
c041f2d4 5451 symbol_put(qeth_l2_discipline);
4a71df50 5452 else
c041f2d4
SO		 5453 symbol_put(qeth_l3_discipline);
5454 card->discipline = NULL;
4a71df50
FB		 5455}
5456
b7169c51
SO		 5457static const struct device_type qeth_generic_devtype = {
5458 .name = "qeth_generic",
5459 .groups = qeth_generic_attr_groups,
5460};
5461static const struct device_type qeth_osn_devtype = {
5462 .name = "qeth_osn",
5463 .groups = qeth_osn_attr_groups,
5464};
5465
819dc537
SR		 5466#define DBF_NAME_LEN 20
5467
5468struct qeth_dbf_entry {
5469 char dbf_name[DBF_NAME_LEN];
5470 debug_info_t *dbf_info;
5471 struct list_head dbf_list;
5472};
5473
5474static LIST_HEAD(qeth_dbf_list);
5475static DEFINE_MUTEX(qeth_dbf_list_mutex);
5476
5477static debug_info_t *qeth_get_dbf_entry(char *name)
5478{
5479 struct qeth_dbf_entry *entry;
5480 debug_info_t *rc = NULL;
5481
5482 mutex_lock(&qeth_dbf_list_mutex);
5483 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5484 if (strcmp(entry->dbf_name, name) == 0) {
5485 rc = entry->dbf_info;
5486 break;
5487 }
5488 }
5489 mutex_unlock(&qeth_dbf_list_mutex);
5490 return rc;
5491}
5492
5493static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5494{
5495 struct qeth_dbf_entry *new_entry;
5496
5497 card->debug = debug_register(name, 2, 1, 8);
5498 if (!card->debug) {
5499 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5500 goto err;
5501 }
5502 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5503 goto err_dbg;
5504 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5505 if (!new_entry)
5506 goto err_dbg;
5507 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5508 new_entry->dbf_info = card->debug;
5509 mutex_lock(&qeth_dbf_list_mutex);
5510 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5511 mutex_unlock(&qeth_dbf_list_mutex);
5512
5513 return 0;
5514
5515err_dbg:
5516 debug_unregister(card->debug);
5517err:
5518 return -ENOMEM;
5519}
5520
5521static void qeth_clear_dbf_list(void)
5522{
5523 struct qeth_dbf_entry *entry, *tmp;
5524
5525 mutex_lock(&qeth_dbf_list_mutex);
5526 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5527 list_del(&entry->dbf_list);
5528 debug_unregister(entry->dbf_info);
5529 kfree(entry);
5530 }
5531 mutex_unlock(&qeth_dbf_list_mutex);
5532}
5533
4a71df50
FB		 5534static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5535{
5536 struct qeth_card *card;
5537 struct device *dev;
5538 int rc;
5539 unsigned long flags;
819dc537 5540 char dbf_name[DBF_NAME_LEN];
4a71df50 5541
d11ba0c4 5542 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5543
5544 dev = &gdev->dev;
5545 if (!get_device(dev))
5546 return -ENODEV;
5547
2a0217d5 5548 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5549
5550 card = qeth_alloc_card();
5551 if (!card) {
d11ba0c4 5552 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5553 rc = -ENOMEM;
5554 goto err_dev;
5555 }
af039068
CO		 5556
5557 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5558 dev_name(&gdev->dev));
819dc537 5559 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5560 if (!card->debug) {
819dc537
SR		 5561 rc = qeth_add_dbf_entry(card, dbf_name);
5562 if (rc)
5563 goto err_card;
af039068 5564 }
af039068 5565
4a71df50
FB		 5566 card->read.ccwdev = gdev->cdev[0];
5567 card->write.ccwdev = gdev->cdev[1];
5568 card->data.ccwdev = gdev->cdev[2];
5569 dev_set_drvdata(&gdev->dev, card);
5570 card->gdev = gdev;
5571 gdev->cdev[0]->handler = qeth_irq;
5572 gdev->cdev[1]->handler = qeth_irq;
5573 gdev->cdev[2]->handler = qeth_irq;
5574
5575 rc = qeth_determine_card_type(card);
5576 if (rc) {
d11ba0c4 5577 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5578 goto err_card;
4a71df50
FB		 5579 }
5580 rc = qeth_setup_card(card);
5581 if (rc) {
d11ba0c4 5582 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5583 goto err_card;
4a71df50
FB		 5584 }
5585
5113fec0 5586 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5587 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5588 else
b7169c51
SO		 5589 gdev->dev.type = &qeth_generic_devtype;
5590
5113fec0
UB		 5591 switch (card->info.type) {
5592 case QETH_CARD_TYPE_OSN:
5593 case QETH_CARD_TYPE_OSM:
4a71df50 5594 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5595 if (rc)
819dc537 5596 goto err_card;
c041f2d4 5597 rc = card->discipline->setup(card->gdev);
4a71df50 5598 if (rc)
5113fec0
UB		 5599 goto err_disc;
5600 case QETH_CARD_TYPE_OSD:
5601 case QETH_CARD_TYPE_OSX:
5602 default:
5603 break;
4a71df50
FB		 5604 }
5605
5606 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5607 list_add_tail(&card->list, &qeth_core_card_list.list);
5608 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5609
5610 qeth_determine_capabilities(card);
4a71df50
FB		 5611 return 0;
5612
5113fec0
UB		 5613err_disc:
5614 qeth_core_free_discipline(card);
4a71df50
FB		 5615err_card:
5616 qeth_core_free_card(card);
5617err_dev:
5618 put_device(dev);
5619 return rc;
5620}
5621
5622static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5623{
5624 unsigned long flags;
5625 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5626
28a7e4c9 5627 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5628
c041f2d4
SO		 5629 if (card->discipline) {
5630 card->discipline->remove(gdev);
9dc48ccc
UB		 5631 qeth_core_free_discipline(card);
5632 }
5633
4a71df50
FB		 5634 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5635 list_del(&card->list);
5636 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5637 qeth_core_free_card(card);
5638 dev_set_drvdata(&gdev->dev, NULL);
5639 put_device(&gdev->dev);
5640 return;
5641}
5642
5643static int qeth_core_set_online(struct ccwgroup_device *gdev)
5644{
5645 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5646 int rc = 0;
5647 int def_discipline;
5648
c041f2d4 5649 if (!card->discipline) {
4a71df50
FB		 5650 if (card->info.type == QETH_CARD_TYPE_IQD)
5651 def_discipline = QETH_DISCIPLINE_LAYER3;
5652 else
5653 def_discipline = QETH_DISCIPLINE_LAYER2;
5654 rc = qeth_core_load_discipline(card, def_discipline);
5655 if (rc)
5656 goto err;
c041f2d4 5657 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5658 if (rc)
5659 goto err;
5660 }
c041f2d4 5661 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5662err:
5663 return rc;
5664}
5665
5666static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5667{
5668 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5669 return card->discipline->set_offline(gdev);
4a71df50
FB		 5670}
5671
5672static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5673{
5674 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5675 if (card->discipline && card->discipline->shutdown)
5676 card->discipline->shutdown(gdev);
4a71df50
FB		 5677}
5678
bbcfcdc8
FB		 5679static int qeth_core_prepare(struct ccwgroup_device *gdev)
5680{
5681 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5682 if (card->discipline && card->discipline->prepare)
5683 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5684 return 0;
5685}
5686
5687static void qeth_core_complete(struct ccwgroup_device *gdev)
5688{
5689 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5690 if (card->discipline && card->discipline->complete)
5691 card->discipline->complete(gdev);
bbcfcdc8
FB		 5692}
5693
5694static int qeth_core_freeze(struct ccwgroup_device *gdev)
5695{
5696 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5697 if (card->discipline && card->discipline->freeze)
5698 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5699 return 0;
5700}
5701
5702static int qeth_core_thaw(struct ccwgroup_device *gdev)
5703{
5704 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5705 if (card->discipline && card->discipline->thaw)
5706 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5707 return 0;
5708}
5709
5710static int qeth_core_restore(struct ccwgroup_device *gdev)
5711{
5712 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5713 if (card->discipline && card->discipline->restore)
5714 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5715 return 0;
5716}
5717
4a71df50 5718static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5719 .driver = {
5720 .owner = THIS_MODULE,
5721 .name = "qeth",
5722 },
b7169c51 5723 .setup = qeth_core_probe_device,
4a71df50
FB		 5724 .remove = qeth_core_remove_device,
5725 .set_online = qeth_core_set_online,
5726 .set_offline = qeth_core_set_offline,
5727 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5728 .prepare = qeth_core_prepare,
5729 .complete = qeth_core_complete,
5730 .freeze = qeth_core_freeze,
5731 .thaw = qeth_core_thaw,
5732 .restore = qeth_core_restore,
4a71df50
FB		 5733};
5734
b7169c51
SO		 5735static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5736 const char *buf, size_t count)
4a71df50
FB		 5737{
5738 int err;
4a71df50 5739
b7169c51 5740 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5741 &qeth_core_ccwgroup_driver, 3, buf);
5742
5743 return err ? err : count;
5744}
4a71df50
FB		 5745static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5746
f47e2256
SO		 5747static struct attribute *qeth_drv_attrs[] = {
5748 &driver_attr_group.attr,
5749 NULL,
5750};
5751static struct attribute_group qeth_drv_attr_group = {
5752 .attrs = qeth_drv_attrs,
5753};
5754static const struct attribute_group *qeth_drv_attr_groups[] = {
5755 &qeth_drv_attr_group,
5756 NULL,
5757};
5758
942d6984
JW		 5759int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5760{
5761 struct qeth_card *card = dev->ml_priv;
5762 struct mii_ioctl_data *mii_data;
5763 int rc = 0;
5764
5765 if (!card)
5766 return -ENODEV;
5767
5768 if (!qeth_card_hw_is_reachable(card))
5769 return -ENODEV;
5770
5771 if (card->info.type == QETH_CARD_TYPE_OSN)
5772 return -EPERM;
5773
5774 switch (cmd) {
5775 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5776 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5777 break;
5778 case SIOC_QETH_GET_CARD_TYPE:
5779 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5780 card->info.type == QETH_CARD_TYPE_OSM ||
5781 card->info.type == QETH_CARD_TYPE_OSX) &&
5782 !card->info.guestlan)
5783 return 1;
5784 else
5785 return 0;
5786 case SIOCGMIIPHY:
5787 mii_data = if_mii(rq);
5788 mii_data->phy_id = 0;
5789 break;
5790 case SIOCGMIIREG:
5791 mii_data = if_mii(rq);
5792 if (mii_data->phy_id != 0)
5793 rc = -EINVAL;
5794 else
5795 mii_data->val_out = qeth_mdio_read(dev,
5796 mii_data->phy_id, mii_data->reg_num);
5797 break;
5798 case SIOC_QETH_QUERY_OAT:
5799 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5800 break;
5801 default:
5802 if (card->discipline->do_ioctl)
5803 rc = card->discipline->do_ioctl(dev, rq, cmd);
5804 else
5805 rc = -EOPNOTSUPP;
5806 }
5807 if (rc)
5808 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5809 return rc;
5810}
5811EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5812
4a71df50
FB		 5813static struct {
5814 const char str[ETH_GSTRING_LEN];
5815} qeth_ethtool_stats_keys[] = {
5816/* 0 */{"rx skbs"},
5817 {"rx buffers"},
5818 {"tx skbs"},
5819 {"tx buffers"},
5820 {"tx skbs no packing"},
5821 {"tx buffers no packing"},
5822 {"tx skbs packing"},
5823 {"tx buffers packing"},
5824 {"tx sg skbs"},
5825 {"tx sg frags"},
5826/* 10 */{"rx sg skbs"},
5827 {"rx sg frags"},
5828 {"rx sg page allocs"},
5829 {"tx large kbytes"},
5830 {"tx large count"},
5831 {"tx pk state ch n->p"},
5832 {"tx pk state ch p->n"},
5833 {"tx pk watermark low"},
5834 {"tx pk watermark high"},
5835 {"queue 0 buffer usage"},
5836/* 20 */{"queue 1 buffer usage"},
5837 {"queue 2 buffer usage"},
5838 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5839 {"rx poll time"},
5840 {"rx poll count"},
4a71df50
FB		 5841 {"rx do_QDIO time"},
5842 {"rx do_QDIO count"},
5843 {"tx handler time"},
5844 {"tx handler count"},
5845 {"tx time"},
5846/* 30 */{"tx count"},
5847 {"tx do_QDIO time"},
5848 {"tx do_QDIO count"},
f61a0d05 5849 {"tx csum"},
c3b4a740 5850 {"tx lin"},
6059c905 5851 {"tx linfail"},
0da9581d
EL		 5852 {"cq handler count"},
5853 {"cq handler time"}
4a71df50
FB		 5854};
5855
df8b4ec8 5856int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5857{
df8b4ec8
BH		 5858 switch (stringset) {
5859 case ETH_SS_STATS:
5860 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5861 default:
5862 return -EINVAL;
5863 }
4a71df50 5864}
df8b4ec8 5865EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5866
5867void qeth_core_get_ethtool_stats(struct net_device *dev,
5868 struct ethtool_stats *stats, u64 *data)
5869{
509e2562 5870 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5871 data[0] = card->stats.rx_packets -
5872 card->perf_stats.initial_rx_packets;
5873 data[1] = card->perf_stats.bufs_rec;
5874 data[2] = card->stats.tx_packets -
5875 card->perf_stats.initial_tx_packets;
5876 data[3] = card->perf_stats.bufs_sent;
5877 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5878 - card->perf_stats.skbs_sent_pack;
5879 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5880 data[6] = card->perf_stats.skbs_sent_pack;
5881 data[7] = card->perf_stats.bufs_sent_pack;
5882 data[8] = card->perf_stats.sg_skbs_sent;
5883 data[9] = card->perf_stats.sg_frags_sent;
5884 data[10] = card->perf_stats.sg_skbs_rx;
5885 data[11] = card->perf_stats.sg_frags_rx;
5886 data[12] = card->perf_stats.sg_alloc_page_rx;
5887 data[13] = (card->perf_stats.large_send_bytes >> 10);
5888 data[14] = card->perf_stats.large_send_cnt;
5889 data[15] = card->perf_stats.sc_dp_p;
5890 data[16] = card->perf_stats.sc_p_dp;
5891 data[17] = QETH_LOW_WATERMARK_PACK;
5892 data[18] = QETH_HIGH_WATERMARK_PACK;
5893 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5894 data[20] = (card->qdio.no_out_queues > 1) ?
5895 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5896 data[21] = (card->qdio.no_out_queues > 2) ?
5897 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5898 data[22] = (card->qdio.no_out_queues > 3) ?
5899 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5900 data[23] = card->perf_stats.inbound_time;
5901 data[24] = card->perf_stats.inbound_cnt;
5902 data[25] = card->perf_stats.inbound_do_qdio_time;
5903 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5904 data[27] = card->perf_stats.outbound_handler_time;
5905 data[28] = card->perf_stats.outbound_handler_cnt;
5906 data[29] = card->perf_stats.outbound_time;
5907 data[30] = card->perf_stats.outbound_cnt;
5908 data[31] = card->perf_stats.outbound_do_qdio_time;
5909 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5910 data[33] = card->perf_stats.tx_csum;
c3b4a740 5911 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 5912 data[35] = card->perf_stats.tx_linfail;
5913 data[36] = card->perf_stats.cq_cnt;
5914 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 5915}
5916EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5917
5918void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5919{
5920 switch (stringset) {
5921 case ETH_SS_STATS:
5922 memcpy(data, &qeth_ethtool_stats_keys,
5923 sizeof(qeth_ethtool_stats_keys));
5924 break;
5925 default:
5926 WARN_ON(1);
5927 break;
5928 }
5929}
5930EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5931
5932void qeth_core_get_drvinfo(struct net_device *dev,
5933 struct ethtool_drvinfo *info)
5934{
509e2562 5935 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5936
5937 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5938 sizeof(info->driver));
5939 strlcpy(info->version, "1.0", sizeof(info->version));
5940 strlcpy(info->fw_version, card->info.mcl_level,
5941 sizeof(info->fw_version));
5942 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5943 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5944}
5945EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5946
02d5cb5b
EC		 5947/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5948/* Autoneg and full-duplex are supported and advertized uncondionally. */
5949/* Always advertize and support all speeds up to specified, and only one */
5950/* specified port type. */
5951static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5952 int maxspeed, int porttype)
5953{
5954 int port_sup, port_adv, spd_sup, spd_adv;
5955
5956 switch (porttype) {
5957 case PORT_TP:
5958 port_sup = SUPPORTED_TP;
5959 port_adv = ADVERTISED_TP;
5960 break;
5961 case PORT_FIBRE:
5962 port_sup = SUPPORTED_FIBRE;
5963 port_adv = ADVERTISED_FIBRE;
5964 break;
5965 default:
5966 port_sup = SUPPORTED_TP;
5967 port_adv = ADVERTISED_TP;
5968 WARN_ON_ONCE(1);
5969 }
5970
5971 /* "Fallthrough" case'es ordered from high to low result in setting */
5972 /* flags cumulatively, starting from the specified speed and down to */
5973 /* the lowest possible. */
5974 spd_sup = 0;
5975 spd_adv = 0;
5976 switch (maxspeed) {
5977 case SPEED_10000:
5978 spd_sup |= SUPPORTED_10000baseT_Full;
5979 spd_adv |= ADVERTISED_10000baseT_Full;
5980 case SPEED_1000:
5981 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5982 spd_adv |= ADVERTISED_1000baseT_Half |
5983 ADVERTISED_1000baseT_Full;
5984 case SPEED_100:
5985 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5986 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5987 case SPEED_10:
5988 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5989 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5990 break;
5991 default:
5992 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5993 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5994 WARN_ON_ONCE(1);
5995 }
5996 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5997 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5998}
5999
3f9975aa
FB		 6000int qeth_core_ethtool_get_settings(struct net_device *netdev,
6001 struct ethtool_cmd *ecmd)
6002{
509e2562 6003 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6004 enum qeth_link_types link_type;
02d5cb5b 6005 struct carrier_info carrier_info;
511c2445 6006 int rc;
d4f3cd49 6007 u32 speed;
3f9975aa
FB		 6008
6009 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6010 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6011 else
6012 link_type = card->info.link_type;
6013
6014 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 6015 ecmd->duplex = DUPLEX_FULL;
6016 ecmd->autoneg = AUTONEG_ENABLE;
6017
6018 switch (link_type) {
6019 case QETH_LINK_TYPE_FAST_ETH:
6020 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 6021 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
d4f3cd49 6022 speed = SPEED_100;
3f9975aa
FB		 6023 ecmd->port = PORT_TP;
6024 break;
6025
6026 case QETH_LINK_TYPE_GBIT_ETH:
6027 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 6028 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
d4f3cd49 6029 speed = SPEED_1000;
3f9975aa
FB		 6030 ecmd->port = PORT_FIBRE;
6031 break;
6032
6033 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 6034 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
d4f3cd49 6035 speed = SPEED_10000;
3f9975aa
FB		 6036 ecmd->port = PORT_FIBRE;
6037 break;
6038
6039 default:
02d5cb5b 6040 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
d4f3cd49 6041 speed = SPEED_10;
3f9975aa
FB		 6042 ecmd->port = PORT_TP;
6043 }
d4f3cd49 6044 ethtool_cmd_speed_set(ecmd, speed);
3f9975aa 6045
02d5cb5b
EC		 6046 /* Check if we can obtain more accurate information. */
6047 /* If QUERY_CARD_INFO command is not supported or fails, */
6048 /* just return the heuristics that was filled above. */
511c2445
EC		 6049 if (!qeth_card_hw_is_reachable(card))
6050 return -ENODEV;
6051 rc = qeth_query_card_info(card, &carrier_info);
6052 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6053 return 0;
511c2445
EC		 6054 if (rc) /* report error from the hardware operation */
6055 return rc;
6056 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6057
6058 netdev_dbg(netdev,
6059 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6060 carrier_info.card_type,
6061 carrier_info.port_mode,
6062 carrier_info.port_speed);
6063
6064 /* Update attributes for which we've obtained more authoritative */
6065 /* information, leave the rest the way they where filled above. */
6066 switch (carrier_info.card_type) {
6067 case CARD_INFO_TYPE_1G_COPPER_A:
6068 case CARD_INFO_TYPE_1G_COPPER_B:
6069 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
6070 ecmd->port = PORT_TP;
6071 break;
6072 case CARD_INFO_TYPE_1G_FIBRE_A:
6073 case CARD_INFO_TYPE_1G_FIBRE_B:
6074 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
6075 ecmd->port = PORT_FIBRE;
6076 break;
6077 case CARD_INFO_TYPE_10G_FIBRE_A:
6078 case CARD_INFO_TYPE_10G_FIBRE_B:
6079 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
6080 ecmd->port = PORT_FIBRE;
6081 break;
6082 }
6083
6084 switch (carrier_info.port_mode) {
6085 case CARD_INFO_PORTM_FULLDUPLEX:
6086 ecmd->duplex = DUPLEX_FULL;
6087 break;
6088 case CARD_INFO_PORTM_HALFDUPLEX:
6089 ecmd->duplex = DUPLEX_HALF;
6090 break;
6091 }
6092
6093 switch (carrier_info.port_speed) {
6094 case CARD_INFO_PORTS_10M:
d4f3cd49 6095 speed = SPEED_10;
02d5cb5b
EC		 6096 break;
6097 case CARD_INFO_PORTS_100M:
d4f3cd49 6098 speed = SPEED_100;
02d5cb5b
EC		 6099 break;
6100 case CARD_INFO_PORTS_1G:
d4f3cd49 6101 speed = SPEED_1000;
02d5cb5b
EC		 6102 break;
6103 case CARD_INFO_PORTS_10G:
d4f3cd49 6104 speed = SPEED_10000;
02d5cb5b
EC		 6105 break;
6106 }
d4f3cd49 6107 ethtool_cmd_speed_set(ecmd, speed);
02d5cb5b 6108
3f9975aa
FB		 6109 return 0;
6110}
6111EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
6112
c9475369
TR		 6113/* Callback to handle checksum offload command reply from OSA card.
6114 * Verify that required features have been enabled on the card.
6115 * Return error in hdr->return_code as this value is checked by caller.
6116 *
6117 * Always returns zero to indicate no further messages from the OSA card.
6118 */
6119static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6120 struct qeth_reply *reply,
6121 unsigned long data)
6122{
6123 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6124 struct qeth_checksum_cmd *chksum_cb =
6125 (struct qeth_checksum_cmd *)reply->param;
6126
6127 QETH_CARD_TEXT(card, 4, "chkdoccb");
6128 if (cmd->hdr.return_code)
6129 return 0;
6130
6131 memset(chksum_cb, 0, sizeof(*chksum_cb));
6132 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6133 chksum_cb->supported =
6134 cmd->data.setassparms.data.chksum.supported;
6135 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6136 }
6137 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6138 chksum_cb->supported =
6139 cmd->data.setassparms.data.chksum.supported;
6140 chksum_cb->enabled =
6141 cmd->data.setassparms.data.chksum.enabled;
6142 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6143 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6144 }
6145 return 0;
6146}
6147
6148/* Send command to OSA card and check results. */
6149static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6150 enum qeth_ipa_funcs ipa_func,
6151 __u16 cmd_code, long data,
6152 struct qeth_checksum_cmd *chksum_cb)
6153{
6154 struct qeth_cmd_buffer *iob;
6155 int rc = -ENOMEM;
6156
6157 QETH_CARD_TEXT(card, 4, "chkdocmd");
6158 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6159 sizeof(__u32), QETH_PROT_IPV4);
6160 if (iob)
6161 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6162 qeth_ipa_checksum_run_cmd_cb,
6163 chksum_cb);
6164 return rc;
6165}
6166
8f43fb00 6167static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6168{
f9d8e6dc
TR		 6169 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6170 QETH_IPA_CHECKSUM_UDP |
6171 QETH_IPA_CHECKSUM_TCP;
c9475369 6172 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6173 int rc;
6174
c9475369
TR		 6175 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6176 &chksum_cb);
f9d8e6dc
TR		 6177 if (!rc) {
6178 if ((required_features & chksum_cb.supported) !=
6179 required_features)
6180 rc = -EIO;
dae84c8e
TR		 6181 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6182 cstype == IPA_INBOUND_CHECKSUM)
6183 dev_warn(&card->gdev->dev,
6184 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6185 QETH_CARD_IFNAME(card));
f9d8e6dc 6186 }
4d7def2a 6187 if (rc) {
c9475369 6188 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6189 dev_warn(&card->gdev->dev,
6190 "Starting HW checksumming for %s failed, using SW checksumming\n",
6191 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6192 return rc;
6193 }
c9475369
TR		 6194 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6195 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6196 if (!rc) {
6197 if ((required_features & chksum_cb.enabled) !=
6198 required_features)
6199 rc = -EIO;
6200 }
4d7def2a 6201 if (rc) {
c9475369 6202 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6203 dev_warn(&card->gdev->dev,
6204 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6205 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6206 return rc;
6207 }
8f43fb00
TR		 6208
6209 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6210 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6211 return 0;
6212}
6213
8f43fb00 6214static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6215{
c9475369
TR		 6216 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6217 : qeth_send_simple_setassparms(card, cstype,
6218 IPA_CMD_ASS_STOP, 0);
6219 return rc ? -EIO : 0;
4d7def2a 6220}
4d7def2a 6221
8f43fb00 6222static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6223{
8f43fb00 6224 int rc;
4d7def2a 6225
8f43fb00 6226 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6227
8f43fb00
TR		 6228 if (on) {
6229 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6230 IPA_CMD_ASS_START, 0);
6231 if (rc) {
6232 dev_warn(&card->gdev->dev,
6233 "Starting outbound TCP segmentation offload for %s failed\n",
6234 QETH_CARD_IFNAME(card));
6235 return -EIO;
6236 }
6237 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6238 } else {
6239 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6240 IPA_CMD_ASS_STOP, 0);
6241 }
4d7def2a
TR		 6242 return rc;
6243}
8f43fb00 6244
e830baa9
HW		 6245/* try to restore device features on a device after recovery */
6246int qeth_recover_features(struct net_device *dev)
6247{
6248 struct qeth_card *card = dev->ml_priv;
6249 netdev_features_t recover = dev->features;
6250
6251 if (recover & NETIF_F_IP_CSUM) {
6252 if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
6253 recover ^= NETIF_F_IP_CSUM;
6254 }
6255 if (recover & NETIF_F_RXCSUM) {
6256 if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
6257 recover ^= NETIF_F_RXCSUM;
6258 }
6259 if (recover & NETIF_F_TSO) {
6260 if (qeth_set_ipa_tso(card, 1))
6261 recover ^= NETIF_F_TSO;
6262 }
6263
6264 if (recover == dev->features)
6265 return 0;
6266
6267 dev_warn(&card->gdev->dev,
6268 "Device recovery failed to restore all offload features\n");
6269 dev->features = recover;
6270 return -EIO;
6271}
6272EXPORT_SYMBOL_GPL(qeth_recover_features);
6273
8f43fb00
TR		 6274int qeth_set_features(struct net_device *dev, netdev_features_t features)
6275{
6276 struct qeth_card *card = dev->ml_priv;
6c7cd712 6277 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6278 int rc = 0;
6279
6280 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6281 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6282
6c7cd712 6283 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6284 rc = qeth_set_ipa_csum(card,
6285 features & NETIF_F_IP_CSUM ? 1 : 0,
6286 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6287 if (rc)
6288 changed ^= NETIF_F_IP_CSUM;
6289 }
6290 if ((changed & NETIF_F_RXCSUM)) {
6291 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6292 features & NETIF_F_RXCSUM ? 1 : 0,
6293 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6294 if (rc)
6295 changed ^= NETIF_F_RXCSUM;
6296 }
6297 if ((changed & NETIF_F_TSO)) {
6298 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6299 if (rc)
6300 changed ^= NETIF_F_TSO;
6301 }
6302
6303 /* everything changed successfully? */
6304 if ((dev->features ^ features) == changed)
6305 return 0;
6306 /* something went wrong. save changed features and return error */
6307 dev->features ^= changed;
6308 return -EIO;
8f43fb00
TR		 6309}
6310EXPORT_SYMBOL_GPL(qeth_set_features);
6311
6312netdev_features_t qeth_fix_features(struct net_device *dev,
6313 netdev_features_t features)
6314{
6315 struct qeth_card *card = dev->ml_priv;
6316
6317 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6318 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6319 features &= ~NETIF_F_IP_CSUM;
6320 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6321 features &= ~NETIF_F_RXCSUM;
6322 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
6323 features &= ~NETIF_F_TSO;
6324 dev_info(&card->gdev->dev, "Outbound TSO not supported on %s\n",
6325 QETH_CARD_IFNAME(card));
6326 }
6c7cd712
HW		 6327 /* if the card isn't up, remove features that require hw changes */
6328 if (card->state == CARD_STATE_DOWN ||
6329 card->state == CARD_STATE_RECOVER)
6330 features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
6331 NETIF_F_TSO);
8f43fb00
TR		 6332 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6333 return features;
6334}
6335EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6336
4a71df50
FB		 6337static int __init qeth_core_init(void)
6338{
6339 int rc;
6340
74eacdb9 6341 pr_info("loading core functions\n");
4a71df50 6342 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6343 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6344 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6345 mutex_init(&qeth_mod_mutex);
4a71df50 6346
0f54761d
SR		 6347 qeth_wq = create_singlethread_workqueue("qeth_wq");
6348
4a71df50
FB		 6349 rc = qeth_register_dbf_views();
6350 if (rc)
6351 goto out_err;
035da16f 6352 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6353 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6354 if (rc)
6355 goto register_err;
683d718a
FB		 6356 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6357 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6358 if (!qeth_core_header_cache) {
6359 rc = -ENOMEM;
6360 goto slab_err;
6361 }
0da9581d
EL		 6362 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6363 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6364 if (!qeth_qdio_outbuf_cache) {
6365 rc = -ENOMEM;
6366 goto cqslab_err;
6367 }
afb6ac59
SO		 6368 rc = ccw_driver_register(&qeth_ccw_driver);
6369 if (rc)
6370 goto ccw_err;
6371 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6372 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6373 if (rc)
6374 goto ccwgroup_err;
0da9581d 6375
683d718a 6376 return 0;
afb6ac59
SO		 6377
6378ccwgroup_err:
6379 ccw_driver_unregister(&qeth_ccw_driver);
6380ccw_err:
6381 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6382cqslab_err:
6383 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6384slab_err:
035da16f 6385 root_device_unregister(qeth_core_root_dev);
4a71df50 6386register_err:
4a71df50
FB		 6387 qeth_unregister_dbf_views();
6388out_err:
74eacdb9 6389 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6390 return rc;
6391}
6392
6393static void __exit qeth_core_exit(void)
6394{
819dc537 6395 qeth_clear_dbf_list();
0f54761d 6396 destroy_workqueue(qeth_wq);
4a71df50
FB		 6397 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6398 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6399 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6400 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6401 root_device_unregister(qeth_core_root_dev);
4a71df50 6402 qeth_unregister_dbf_views();
74eacdb9 6403 pr_info("core functions removed\n");
4a71df50
FB		 6404}
6405
6406module_init(qeth_core_init);
6407module_exit(qeth_core_exit);
6408MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6409MODULE_DESCRIPTION("qeth core functions");
6410MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git