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s390/qeth: pass TSO data offset to fill_buffer()
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
ec61bd2f
JW		 30#include <asm/diag.h>
31#include <asm/cio.h>
32#include <asm/ccwdev.h>
4a71df50
FB		 33
34#include "qeth_core.h"
4a71df50 35
d11ba0c4
PT		 36struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
37 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
38 /* N P A M L V H */
39 [QETH_DBF_SETUP] = {"qeth_setup",
40 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 41 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
42 &debug_sprintf_view, NULL},
d11ba0c4
PT		 43 [QETH_DBF_CTRL] = {"qeth_control",
44 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
45};
46EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 47
48struct qeth_card_list_struct qeth_core_card_list;
49EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 50struct kmem_cache *qeth_core_header_cache;
51EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 52static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 53
54static struct device *qeth_core_root_dev;
5113fec0 55static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 56static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 57static struct mutex qeth_mod_mutex;
4a71df50
FB		 58
59static void qeth_send_control_data_cb(struct qeth_channel *,
60 struct qeth_cmd_buffer *);
4a71df50
FB		 61static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63static void qeth_free_buffer_pool(struct qeth_card *);
64static int qeth_qdio_establish(struct qeth_card *);
0da9581d 65static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 66static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum iucv_tx_notify notification);
69static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 70static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
71 struct qeth_qdio_out_buffer *buf,
72 enum qeth_qdio_buffer_states newbufstate);
72861ae7 73static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 74
b4d72c08 75struct workqueue_struct *qeth_wq;
c044dc21 76EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 77
511c2445
EC		 78int qeth_card_hw_is_reachable(struct qeth_card *card)
79{
80 return (card->state == CARD_STATE_SOFTSETUP) ||
81 (card->state == CARD_STATE_UP);
82}
83EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
84
0f54761d
SR		 85static void qeth_close_dev_handler(struct work_struct *work)
86{
87 struct qeth_card *card;
88
89 card = container_of(work, struct qeth_card, close_dev_work);
90 QETH_CARD_TEXT(card, 2, "cldevhdl");
91 rtnl_lock();
92 dev_close(card->dev);
93 rtnl_unlock();
94 ccwgroup_set_offline(card->gdev);
95}
96
97void qeth_close_dev(struct qeth_card *card)
98{
99 QETH_CARD_TEXT(card, 2, "cldevsubm");
100 queue_work(qeth_wq, &card->close_dev_work);
101}
102EXPORT_SYMBOL_GPL(qeth_close_dev);
103
cef6ff22 104static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 105{
106 if (card->info.guestlan) {
107 switch (card->info.type) {
5113fec0 108 case QETH_CARD_TYPE_OSD:
7096b187 109 return " Virtual NIC QDIO";
4a71df50 110 case QETH_CARD_TYPE_IQD:
7096b187 111 return " Virtual NIC Hiper";
5113fec0 112 case QETH_CARD_TYPE_OSM:
7096b187 113 return " Virtual NIC QDIO - OSM";
5113fec0 114 case QETH_CARD_TYPE_OSX:
7096b187 115 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 116 default:
117 return " unknown";
118 }
119 } else {
120 switch (card->info.type) {
5113fec0 121 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 122 return " OSD Express";
123 case QETH_CARD_TYPE_IQD:
124 return " HiperSockets";
125 case QETH_CARD_TYPE_OSN:
126 return " OSN QDIO";
5113fec0
UB		 127 case QETH_CARD_TYPE_OSM:
128 return " OSM QDIO";
129 case QETH_CARD_TYPE_OSX:
130 return " OSX QDIO";
4a71df50
FB		 131 default:
132 return " unknown";
133 }
134 }
135 return " n/a";
136}
137
138/* max length to be returned: 14 */
139const char *qeth_get_cardname_short(struct qeth_card *card)
140{
141 if (card->info.guestlan) {
142 switch (card->info.type) {
5113fec0 143 case QETH_CARD_TYPE_OSD:
7096b187 144 return "Virt.NIC QDIO";
4a71df50 145 case QETH_CARD_TYPE_IQD:
7096b187 146 return "Virt.NIC Hiper";
5113fec0 147 case QETH_CARD_TYPE_OSM:
7096b187 148 return "Virt.NIC OSM";
5113fec0 149 case QETH_CARD_TYPE_OSX:
7096b187 150 return "Virt.NIC OSX";
4a71df50
FB		 151 default:
152 return "unknown";
153 }
154 } else {
155 switch (card->info.type) {
5113fec0 156 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 157 switch (card->info.link_type) {
158 case QETH_LINK_TYPE_FAST_ETH:
159 return "OSD_100";
160 case QETH_LINK_TYPE_HSTR:
161 return "HSTR";
162 case QETH_LINK_TYPE_GBIT_ETH:
163 return "OSD_1000";
164 case QETH_LINK_TYPE_10GBIT_ETH:
165 return "OSD_10GIG";
166 case QETH_LINK_TYPE_LANE_ETH100:
167 return "OSD_FE_LANE";
168 case QETH_LINK_TYPE_LANE_TR:
169 return "OSD_TR_LANE";
170 case QETH_LINK_TYPE_LANE_ETH1000:
171 return "OSD_GbE_LANE";
172 case QETH_LINK_TYPE_LANE:
173 return "OSD_ATM_LANE";
174 default:
175 return "OSD_Express";
176 }
177 case QETH_CARD_TYPE_IQD:
178 return "HiperSockets";
179 case QETH_CARD_TYPE_OSN:
180 return "OSN";
5113fec0
UB		 181 case QETH_CARD_TYPE_OSM:
182 return "OSM_1000";
183 case QETH_CARD_TYPE_OSX:
184 return "OSX_10GIG";
4a71df50
FB		 185 default:
186 return "unknown";
187 }
188 }
189 return "n/a";
190}
191
65d8013c
SR		 192void qeth_set_recovery_task(struct qeth_card *card)
193{
194 card->recovery_task = current;
195}
196EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
197
198void qeth_clear_recovery_task(struct qeth_card *card)
199{
200 card->recovery_task = NULL;
201}
202EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
203
204static bool qeth_is_recovery_task(const struct qeth_card *card)
205{
206 return card->recovery_task == current;
207}
208
4a71df50
FB		 209void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
210 int clear_start_mask)
211{
212 unsigned long flags;
213
214 spin_lock_irqsave(&card->thread_mask_lock, flags);
215 card->thread_allowed_mask = threads;
216 if (clear_start_mask)
217 card->thread_start_mask &= threads;
218 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
219 wake_up(&card->wait_q);
220}
221EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
222
223int qeth_threads_running(struct qeth_card *card, unsigned long threads)
224{
225 unsigned long flags;
226 int rc = 0;
227
228 spin_lock_irqsave(&card->thread_mask_lock, flags);
229 rc = (card->thread_running_mask & threads);
230 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
231 return rc;
232}
233EXPORT_SYMBOL_GPL(qeth_threads_running);
234
235int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
236{
65d8013c
SR		 237 if (qeth_is_recovery_task(card))
238 return 0;
4a71df50
FB		 239 return wait_event_interruptible(card->wait_q,
240 qeth_threads_running(card, threads) == 0);
241}
242EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
243
244void qeth_clear_working_pool_list(struct qeth_card *card)
245{
246 struct qeth_buffer_pool_entry *pool_entry, *tmp;
247
847a50fd 248 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 249 list_for_each_entry_safe(pool_entry, tmp,
250 &card->qdio.in_buf_pool.entry_list, list){
251 list_del(&pool_entry->list);
252 }
253}
254EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
255
256static int qeth_alloc_buffer_pool(struct qeth_card *card)
257{
258 struct qeth_buffer_pool_entry *pool_entry;
259 void *ptr;
260 int i, j;
261
847a50fd 262 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 263 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 264 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 265 if (!pool_entry) {
266 qeth_free_buffer_pool(card);
267 return -ENOMEM;
268 }
269 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 270 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 271 if (!ptr) {
272 while (j > 0)
273 free_page((unsigned long)
274 pool_entry->elements[--j]);
275 kfree(pool_entry);
276 qeth_free_buffer_pool(card);
277 return -ENOMEM;
278 }
279 pool_entry->elements[j] = ptr;
280 }
281 list_add(&pool_entry->init_list,
282 &card->qdio.init_pool.entry_list);
283 }
284 return 0;
285}
286
287int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
288{
847a50fd 289 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 290
291 if ((card->state != CARD_STATE_DOWN) &&
292 (card->state != CARD_STATE_RECOVER))
293 return -EPERM;
294
295 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
296 qeth_clear_working_pool_list(card);
297 qeth_free_buffer_pool(card);
298 card->qdio.in_buf_pool.buf_count = bufcnt;
299 card->qdio.init_pool.buf_count = bufcnt;
300 return qeth_alloc_buffer_pool(card);
301}
76b11f8e 302EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 303
4601ba6c
SO		 304static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
305{
6d284bde
SO		 306 if (!q)
307 return;
308
309 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 310 kfree(q);
311}
312
313static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
314{
315 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
316 int i;
317
318 if (!q)
319 return NULL;
320
6d284bde
SO		 321 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
322 kfree(q);
323 return NULL;
324 }
325
4601ba6c 326 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 327 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 328
329 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
330 return q;
331}
332
cef6ff22 333static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 334{
335 int rc;
336
337 if (card->options.cq == QETH_CQ_ENABLED) {
338 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 339 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
340 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 341 card->qdio.c_q->next_buf_to_init = 127;
342 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
343 card->qdio.no_in_queues - 1, 0,
344 127);
345 if (rc) {
346 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
347 goto out;
348 }
349 }
350 rc = 0;
351out:
352 return rc;
353}
354
cef6ff22 355static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 356{
357 int rc;
358
359 if (card->options.cq == QETH_CQ_ENABLED) {
360 int i;
361 struct qdio_outbuf_state *outbuf_states;
362
363 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 364 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 365 if (!card->qdio.c_q) {
366 rc = -1;
367 goto kmsg_out;
368 }
0da9581d 369 card->qdio.no_in_queues = 2;
4a912f98 370 card->qdio.out_bufstates =
0da9581d
EL		 371 kzalloc(card->qdio.no_out_queues *
372 QDIO_MAX_BUFFERS_PER_Q *
373 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
374 outbuf_states = card->qdio.out_bufstates;
375 if (outbuf_states == NULL) {
376 rc = -1;
377 goto free_cq_out;
378 }
379 for (i = 0; i < card->qdio.no_out_queues; ++i) {
380 card->qdio.out_qs[i]->bufstates = outbuf_states;
381 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
382 }
383 } else {
384 QETH_DBF_TEXT(SETUP, 2, "nocq");
385 card->qdio.c_q = NULL;
386 card->qdio.no_in_queues = 1;
387 }
388 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
389 rc = 0;
390out:
391 return rc;
392free_cq_out:
4601ba6c 393 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 394 card->qdio.c_q = NULL;
395kmsg_out:
396 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
397 goto out;
398}
399
cef6ff22 400static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 401{
402 if (card->qdio.c_q) {
403 --card->qdio.no_in_queues;
4601ba6c 404 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 405 card->qdio.c_q = NULL;
406 }
407 kfree(card->qdio.out_bufstates);
408 card->qdio.out_bufstates = NULL;
409}
410
cef6ff22
JW		 411static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
412 int delayed)
413{
b3332930
FB		 414 enum iucv_tx_notify n;
415
416 switch (sbalf15) {
417 case 0:
418 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
419 break;
420 case 4:
421 case 16:
422 case 17:
423 case 18:
424 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
425 TX_NOTIFY_UNREACHABLE;
426 break;
427 default:
428 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
429 TX_NOTIFY_GENERALERROR;
430 break;
431 }
432
433 return n;
434}
435
cef6ff22
JW		 436static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
437 int forced_cleanup)
0da9581d 438{
72861ae7
EL		 439 if (q->card->options.cq != QETH_CQ_ENABLED)
440 return;
441
0da9581d
EL		 442 if (q->bufs[bidx]->next_pending != NULL) {
443 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
444 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
445
446 while (c) {
447 if (forced_cleanup ||
448 atomic_read(&c->state) ==
449 QETH_QDIO_BUF_HANDLED_DELAYED) {
450 struct qeth_qdio_out_buffer *f = c;
451 QETH_CARD_TEXT(f->q->card, 5, "fp");
452 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 453 /* release here to avoid interleaving between
454 outbound tasklet and inbound tasklet
455 regarding notifications and lifecycle */
456 qeth_release_skbs(c);
457
0da9581d 458 c = f->next_pending;
18af5c17 459 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 460 head->next_pending = c;
461 kmem_cache_free(qeth_qdio_outbuf_cache, f);
462 } else {
463 head = c;
464 c = c->next_pending;
465 }
466
467 }
468 }
72861ae7
EL		 469 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
470 QETH_QDIO_BUF_HANDLED_DELAYED)) {
471 /* for recovery situations */
472 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
473 qeth_init_qdio_out_buf(q, bidx);
474 QETH_CARD_TEXT(q->card, 2, "clprecov");
475 }
0da9581d
EL		 476}
477
478
cef6ff22
JW		 479static void qeth_qdio_handle_aob(struct qeth_card *card,
480 unsigned long phys_aob_addr)
481{
0da9581d
EL		 482 struct qaob *aob;
483 struct qeth_qdio_out_buffer *buffer;
b3332930 484 enum iucv_tx_notify notification;
0da9581d
EL		 485
486 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
487 QETH_CARD_TEXT(card, 5, "haob");
488 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
489 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
490 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
491
b3332930
FB		 492 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
493 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
494 notification = TX_NOTIFY_OK;
495 } else {
18af5c17
SR		 496 WARN_ON_ONCE(atomic_read(&buffer->state) !=
497 QETH_QDIO_BUF_PENDING);
b3332930
FB		 498 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
499 notification = TX_NOTIFY_DELAYED_OK;
500 }
501
502 if (aob->aorc != 0) {
503 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
504 notification = qeth_compute_cq_notification(aob->aorc, 1);
505 }
506 qeth_notify_skbs(buffer->q, buffer, notification);
507
0da9581d
EL		 508 buffer->aob = NULL;
509 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 510 QETH_QDIO_BUF_HANDLED_DELAYED);
511
0da9581d
EL		 512 /* from here on: do not touch buffer anymore */
513 qdio_release_aob(aob);
514}
515
516static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
517{
518 return card->options.cq == QETH_CQ_ENABLED &&
519 card->qdio.c_q != NULL &&
520 queue != 0 &&
521 queue == card->qdio.no_in_queues - 1;
522}
523
524
4a71df50
FB		 525static int qeth_issue_next_read(struct qeth_card *card)
526{
527 int rc;
528 struct qeth_cmd_buffer *iob;
529
847a50fd 530 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 531 if (card->read.state != CH_STATE_UP)
532 return -EIO;
533 iob = qeth_get_buffer(&card->read);
534 if (!iob) {
74eacdb9
FB		 535 dev_warn(&card->gdev->dev, "The qeth device driver "
536 "failed to recover an error on the device\n");
537 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
538 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 539 return -ENOMEM;
540 }
541 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 542 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 543 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
544 (addr_t) iob, 0, 0);
545 if (rc) {
74eacdb9
FB		 546 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
547 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 548 atomic_set(&card->read.irq_pending, 0);
908abbb5 549 card->read_or_write_problem = 1;
4a71df50
FB		 550 qeth_schedule_recovery(card);
551 wake_up(&card->wait_q);
552 }
553 return rc;
554}
555
556static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
557{
558 struct qeth_reply *reply;
559
560 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
561 if (reply) {
562 atomic_set(&reply->refcnt, 1);
563 atomic_set(&reply->received, 0);
564 reply->card = card;
6531084c 565 }
4a71df50
FB		 566 return reply;
567}
568
569static void qeth_get_reply(struct qeth_reply *reply)
570{
571 WARN_ON(atomic_read(&reply->refcnt) <= 0);
572 atomic_inc(&reply->refcnt);
573}
574
575static void qeth_put_reply(struct qeth_reply *reply)
576{
577 WARN_ON(atomic_read(&reply->refcnt) <= 0);
578 if (atomic_dec_and_test(&reply->refcnt))
579 kfree(reply);
580}
581
d11ba0c4 582static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 583 struct qeth_card *card)
584{
4a71df50 585 char *ipa_name;
d11ba0c4 586 int com = cmd->hdr.command;
4a71df50 587 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 588 if (rc)
70919e23
UB		 589 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
590 "x%X \"%s\"\n",
591 ipa_name, com, dev_name(&card->gdev->dev),
592 QETH_CARD_IFNAME(card), rc,
593 qeth_get_ipa_msg(rc));
d11ba0c4 594 else
70919e23
UB		 595 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
596 ipa_name, com, dev_name(&card->gdev->dev),
597 QETH_CARD_IFNAME(card));
4a71df50
FB		 598}
599
600static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
601 struct qeth_cmd_buffer *iob)
602{
603 struct qeth_ipa_cmd *cmd = NULL;
604
847a50fd 605 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 606 if (IS_IPA(iob->data)) {
607 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
608 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 609 if (cmd->hdr.command != IPA_CMD_SETCCID &&
610 cmd->hdr.command != IPA_CMD_DELCCID &&
611 cmd->hdr.command != IPA_CMD_MODCCID &&
612 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 613 qeth_issue_ipa_msg(cmd,
614 cmd->hdr.return_code, card);
4a71df50
FB		 615 return cmd;
616 } else {
617 switch (cmd->hdr.command) {
618 case IPA_CMD_STOPLAN:
0f54761d
SR		 619 if (cmd->hdr.return_code ==
620 IPA_RC_VEPA_TO_VEB_TRANSITION) {
621 dev_err(&card->gdev->dev,
622 "Interface %s is down because the "
623 "adjacent port is no longer in "
624 "reflective relay mode\n",
625 QETH_CARD_IFNAME(card));
626 qeth_close_dev(card);
627 } else {
628 dev_warn(&card->gdev->dev,
74eacdb9
FB		 629 "The link for interface %s on CHPID"
630 " 0x%X failed\n",
4a71df50
FB		 631 QETH_CARD_IFNAME(card),
632 card->info.chpid);
0f54761d
SR		 633 qeth_issue_ipa_msg(cmd,
634 cmd->hdr.return_code, card);
635 }
4a71df50
FB		 636 card->lan_online = 0;
637 if (card->dev && netif_carrier_ok(card->dev))
638 netif_carrier_off(card->dev);
639 return NULL;
640 case IPA_CMD_STARTLAN:
74eacdb9
FB		 641 dev_info(&card->gdev->dev,
642 "The link for %s on CHPID 0x%X has"
643 " been restored\n",
4a71df50
FB		 644 QETH_CARD_IFNAME(card),
645 card->info.chpid);
646 netif_carrier_on(card->dev);
922dc062 647 card->lan_online = 1;
1da74b1c
FB		 648 if (card->info.hwtrap)
649 card->info.hwtrap = 2;
4a71df50
FB		 650 qeth_schedule_recovery(card);
651 return NULL;
9c23f4da
EC		 652 case IPA_CMD_SETBRIDGEPORT_IQD:
653 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 654 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 655 if (card->discipline->control_event_handler
656 (card, cmd))
657 return cmd;
658 else
659 return NULL;
4a71df50
FB		 660 case IPA_CMD_MODCCID:
661 return cmd;
662 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 663 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 664 break;
665 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 666 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 667 break;
668 default:
c4cef07c 669 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 670 "but not a reply!\n");
671 break;
672 }
673 }
674 }
675 return cmd;
676}
677
678void qeth_clear_ipacmd_list(struct qeth_card *card)
679{
680 struct qeth_reply *reply, *r;
681 unsigned long flags;
682
847a50fd 683 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 684
685 spin_lock_irqsave(&card->lock, flags);
686 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
687 qeth_get_reply(reply);
688 reply->rc = -EIO;
689 atomic_inc(&reply->received);
690 list_del_init(&reply->list);
691 wake_up(&reply->wait_q);
692 qeth_put_reply(reply);
693 }
694 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 695 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 696}
697EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
698
5113fec0
UB		 699static int qeth_check_idx_response(struct qeth_card *card,
700 unsigned char *buffer)
4a71df50
FB		 701{
702 if (!buffer)
703 return 0;
704
d11ba0c4 705 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 706 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 707 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 708 "with cause code 0x%02x%s\n",
709 buffer[4],
710 ((buffer[4] == 0x22) ?
711 " -- try another portname" : ""));
847a50fd
CO		 712 QETH_CARD_TEXT(card, 2, "ckidxres");
713 QETH_CARD_TEXT(card, 2, " idxterm");
714 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 715 if (buffer[4] == 0xf6) {
716 dev_err(&card->gdev->dev,
717 "The qeth device is not configured "
718 "for the OSI layer required by z/VM\n");
719 return -EPERM;
720 }
4a71df50
FB		 721 return -EIO;
722 }
723 return 0;
724}
725
bca51650
TR		 726static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
727{
728 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
729 dev_get_drvdata(&cdev->dev))->dev);
730 return card;
731}
732
4a71df50
FB		 733static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
734 __u32 len)
735{
736 struct qeth_card *card;
737
4a71df50 738 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 739 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 740 if (channel == &card->read)
741 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
742 else
743 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
744 channel->ccw.count = len;
745 channel->ccw.cda = (__u32) __pa(iob);
746}
747
748static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
749{
750 __u8 index;
751
847a50fd 752 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 753 index = channel->io_buf_no;
754 do {
755 if (channel->iob[index].state == BUF_STATE_FREE) {
756 channel->iob[index].state = BUF_STATE_LOCKED;
757 channel->io_buf_no = (channel->io_buf_no + 1) %
758 QETH_CMD_BUFFER_NO;
759 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
760 return channel->iob + index;
761 }
762 index = (index + 1) % QETH_CMD_BUFFER_NO;
763 } while (index != channel->io_buf_no);
764
765 return NULL;
766}
767
768void qeth_release_buffer(struct qeth_channel *channel,
769 struct qeth_cmd_buffer *iob)
770{
771 unsigned long flags;
772
847a50fd 773 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 774 spin_lock_irqsave(&channel->iob_lock, flags);
775 memset(iob->data, 0, QETH_BUFSIZE);
776 iob->state = BUF_STATE_FREE;
777 iob->callback = qeth_send_control_data_cb;
778 iob->rc = 0;
779 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 780 wake_up(&channel->wait_q);
4a71df50
FB		 781}
782EXPORT_SYMBOL_GPL(qeth_release_buffer);
783
784static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
785{
786 struct qeth_cmd_buffer *buffer = NULL;
787 unsigned long flags;
788
789 spin_lock_irqsave(&channel->iob_lock, flags);
790 buffer = __qeth_get_buffer(channel);
791 spin_unlock_irqrestore(&channel->iob_lock, flags);
792 return buffer;
793}
794
795struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
796{
797 struct qeth_cmd_buffer *buffer;
798 wait_event(channel->wait_q,
799 ((buffer = qeth_get_buffer(channel)) != NULL));
800 return buffer;
801}
802EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
803
804void qeth_clear_cmd_buffers(struct qeth_channel *channel)
805{
806 int cnt;
807
808 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
809 qeth_release_buffer(channel, &channel->iob[cnt]);
810 channel->buf_no = 0;
811 channel->io_buf_no = 0;
812}
813EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
814
815static void qeth_send_control_data_cb(struct qeth_channel *channel,
816 struct qeth_cmd_buffer *iob)
817{
818 struct qeth_card *card;
819 struct qeth_reply *reply, *r;
820 struct qeth_ipa_cmd *cmd;
821 unsigned long flags;
822 int keep_reply;
5113fec0 823 int rc = 0;
4a71df50 824
4a71df50 825 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 826 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 827 rc = qeth_check_idx_response(card, iob->data);
828 switch (rc) {
829 case 0:
830 break;
831 case -EIO:
4a71df50 832 qeth_clear_ipacmd_list(card);
5113fec0 833 qeth_schedule_recovery(card);
01fc3e86 834 /* fall through */
5113fec0 835 default:
4a71df50
FB		 836 goto out;
837 }
838
839 cmd = qeth_check_ipa_data(card, iob);
840 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
841 goto out;
842 /*in case of OSN : check if cmd is set */
843 if (card->info.type == QETH_CARD_TYPE_OSN &&
844 cmd &&
845 cmd->hdr.command != IPA_CMD_STARTLAN &&
846 card->osn_info.assist_cb != NULL) {
847 card->osn_info.assist_cb(card->dev, cmd);
848 goto out;
849 }
850
851 spin_lock_irqsave(&card->lock, flags);
852 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
853 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
854 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
855 qeth_get_reply(reply);
856 list_del_init(&reply->list);
857 spin_unlock_irqrestore(&card->lock, flags);
858 keep_reply = 0;
859 if (reply->callback != NULL) {
860 if (cmd) {
861 reply->offset = (__u16)((char *)cmd -
862 (char *)iob->data);
863 keep_reply = reply->callback(card,
864 reply,
865 (unsigned long)cmd);
866 } else
867 keep_reply = reply->callback(card,
868 reply,
869 (unsigned long)iob);
870 }
871 if (cmd)
872 reply->rc = (u16) cmd->hdr.return_code;
873 else if (iob->rc)
874 reply->rc = iob->rc;
875 if (keep_reply) {
876 spin_lock_irqsave(&card->lock, flags);
877 list_add_tail(&reply->list,
878 &card->cmd_waiter_list);
879 spin_unlock_irqrestore(&card->lock, flags);
880 } else {
881 atomic_inc(&reply->received);
882 wake_up(&reply->wait_q);
883 }
884 qeth_put_reply(reply);
885 goto out;
886 }
887 }
888 spin_unlock_irqrestore(&card->lock, flags);
889out:
890 memcpy(&card->seqno.pdu_hdr_ack,
891 QETH_PDU_HEADER_SEQ_NO(iob->data),
892 QETH_SEQ_NO_LENGTH);
893 qeth_release_buffer(channel, iob);
894}
895
896static int qeth_setup_channel(struct qeth_channel *channel)
897{
898 int cnt;
899
d11ba0c4 900 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 901 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 902 channel->iob[cnt].data =
b3332930 903 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 904 if (channel->iob[cnt].data == NULL)
905 break;
906 channel->iob[cnt].state = BUF_STATE_FREE;
907 channel->iob[cnt].channel = channel;
908 channel->iob[cnt].callback = qeth_send_control_data_cb;
909 channel->iob[cnt].rc = 0;
910 }
911 if (cnt < QETH_CMD_BUFFER_NO) {
912 while (cnt-- > 0)
913 kfree(channel->iob[cnt].data);
914 return -ENOMEM;
915 }
916 channel->buf_no = 0;
917 channel->io_buf_no = 0;
918 atomic_set(&channel->irq_pending, 0);
919 spin_lock_init(&channel->iob_lock);
920
921 init_waitqueue_head(&channel->wait_q);
922 return 0;
923}
924
925static int qeth_set_thread_start_bit(struct qeth_card *card,
926 unsigned long thread)
927{
928 unsigned long flags;
929
930 spin_lock_irqsave(&card->thread_mask_lock, flags);
931 if (!(card->thread_allowed_mask & thread) ||
932 (card->thread_start_mask & thread)) {
933 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
934 return -EPERM;
935 }
936 card->thread_start_mask |= thread;
937 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
938 return 0;
939}
940
941void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
942{
943 unsigned long flags;
944
945 spin_lock_irqsave(&card->thread_mask_lock, flags);
946 card->thread_start_mask &= ~thread;
947 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
948 wake_up(&card->wait_q);
949}
950EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
951
952void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
953{
954 unsigned long flags;
955
956 spin_lock_irqsave(&card->thread_mask_lock, flags);
957 card->thread_running_mask &= ~thread;
958 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
959 wake_up(&card->wait_q);
960}
961EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
962
963static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
964{
965 unsigned long flags;
966 int rc = 0;
967
968 spin_lock_irqsave(&card->thread_mask_lock, flags);
969 if (card->thread_start_mask & thread) {
970 if ((card->thread_allowed_mask & thread) &&
971 !(card->thread_running_mask & thread)) {
972 rc = 1;
973 card->thread_start_mask &= ~thread;
974 card->thread_running_mask |= thread;
975 } else
976 rc = -EPERM;
977 }
978 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
979 return rc;
980}
981
982int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
983{
984 int rc = 0;
985
986 wait_event(card->wait_q,
987 (rc = __qeth_do_run_thread(card, thread)) >= 0);
988 return rc;
989}
990EXPORT_SYMBOL_GPL(qeth_do_run_thread);
991
992void qeth_schedule_recovery(struct qeth_card *card)
993{
847a50fd 994 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 995 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
996 schedule_work(&card->kernel_thread_starter);
997}
998EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
999
1000static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1001{
1002 int dstat, cstat;
1003 char *sense;
847a50fd 1004 struct qeth_card *card;
4a71df50
FB		 1005
1006 sense = (char *) irb->ecw;
23d805b6
PO		 1007 cstat = irb->scsw.cmd.cstat;
1008 dstat = irb->scsw.cmd.dstat;
847a50fd 1009 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1010
1011 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1012 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1013 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1014 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1015 dev_warn(&cdev->dev, "The qeth device driver "
1016 "failed to recover an error on the device\n");
5113fec0 1017 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1018 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1019 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1020 16, 1, irb, 64, 1);
1021 return 1;
1022 }
1023
1024 if (dstat & DEV_STAT_UNIT_CHECK) {
1025 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1026 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1027 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1028 return 1;
1029 }
1030 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1031 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1032 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1033 return 1;
4a71df50
FB		 1034 }
1035 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1036 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1037 return 1;
1038 }
1039 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1040 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1041 return 0;
1042 }
847a50fd 1043 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1044 return 1;
1045 }
1046 return 0;
1047}
1048
1049static long __qeth_check_irb_error(struct ccw_device *cdev,
1050 unsigned long intparm, struct irb *irb)
1051{
847a50fd
CO		 1052 struct qeth_card *card;
1053
1054 card = CARD_FROM_CDEV(cdev);
1055
e95051ff 1056 if (!card || !IS_ERR(irb))
4a71df50
FB		 1057 return 0;
1058
1059 switch (PTR_ERR(irb)) {
1060 case -EIO:
74eacdb9
FB		 1061 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1062 dev_name(&cdev->dev));
847a50fd
CO		 1063 QETH_CARD_TEXT(card, 2, "ckirberr");
1064 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1065 break;
1066 case -ETIMEDOUT:
74eacdb9
FB		 1067 dev_warn(&cdev->dev, "A hardware operation timed out"
1068 " on the device\n");
847a50fd
CO		 1069 QETH_CARD_TEXT(card, 2, "ckirberr");
1070 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1071 if (intparm == QETH_RCD_PARM) {
e95051ff 1072 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1073 card->data.state = CH_STATE_DOWN;
1074 wake_up(&card->wait_q);
1075 }
1076 }
1077 break;
1078 default:
74eacdb9
FB		 1079 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1080 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1081 QETH_CARD_TEXT(card, 2, "ckirberr");
1082 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1083 }
1084 return PTR_ERR(irb);
1085}
1086
1087static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1088 struct irb *irb)
1089{
1090 int rc;
1091 int cstat, dstat;
1092 struct qeth_cmd_buffer *buffer;
1093 struct qeth_channel *channel;
1094 struct qeth_card *card;
1095 struct qeth_cmd_buffer *iob;
1096 __u8 index;
1097
4a71df50
FB		 1098 if (__qeth_check_irb_error(cdev, intparm, irb))
1099 return;
23d805b6
PO		 1100 cstat = irb->scsw.cmd.cstat;
1101 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1102
1103 card = CARD_FROM_CDEV(cdev);
1104 if (!card)
1105 return;
1106
847a50fd
CO		 1107 QETH_CARD_TEXT(card, 5, "irq");
1108
4a71df50
FB		 1109 if (card->read.ccwdev == cdev) {
1110 channel = &card->read;
847a50fd 1111 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1112 } else if (card->write.ccwdev == cdev) {
1113 channel = &card->write;
847a50fd 1114 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1115 } else {
1116 channel = &card->data;
847a50fd 1117 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1118 }
1119 atomic_set(&channel->irq_pending, 0);
1120
23d805b6 1121 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1122 channel->state = CH_STATE_STOPPED;
1123
23d805b6 1124 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1125 channel->state = CH_STATE_HALTED;
1126
1127 /*let's wake up immediately on data channel*/
1128 if ((channel == &card->data) && (intparm != 0) &&
1129 (intparm != QETH_RCD_PARM))
1130 goto out;
1131
1132 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1133 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1134 /* we don't have to handle this further */
1135 intparm = 0;
1136 }
1137 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1138 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1139 /* we don't have to handle this further */
1140 intparm = 0;
1141 }
1142 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1143 (dstat & DEV_STAT_UNIT_CHECK) ||
1144 (cstat)) {
1145 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1146 dev_warn(&channel->ccwdev->dev,
1147 "The qeth device driver failed to recover "
1148 "an error on the device\n");
1149 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1150 "0x%X dstat 0x%X\n",
1151 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1152 print_hex_dump(KERN_WARNING, "qeth: irb ",
1153 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1154 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1155 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1156 }
1157 if (intparm == QETH_RCD_PARM) {
1158 channel->state = CH_STATE_DOWN;
1159 goto out;
1160 }
1161 rc = qeth_get_problem(cdev, irb);
1162 if (rc) {
28a7e4c9 1163 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1164 qeth_schedule_recovery(card);
1165 goto out;
1166 }
1167 }
1168
1169 if (intparm == QETH_RCD_PARM) {
1170 channel->state = CH_STATE_RCD_DONE;
1171 goto out;
1172 }
1173 if (intparm) {
1174 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1175 buffer->state = BUF_STATE_PROCESSED;
1176 }
1177 if (channel == &card->data)
1178 return;
1179 if (channel == &card->read &&
1180 channel->state == CH_STATE_UP)
1181 qeth_issue_next_read(card);
1182
1183 iob = channel->iob;
1184 index = channel->buf_no;
1185 while (iob[index].state == BUF_STATE_PROCESSED) {
1186 if (iob[index].callback != NULL)
1187 iob[index].callback(channel, iob + index);
1188
1189 index = (index + 1) % QETH_CMD_BUFFER_NO;
1190 }
1191 channel->buf_no = index;
1192out:
1193 wake_up(&card->wait_q);
1194 return;
1195}
1196
b3332930 1197static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1198 struct qeth_qdio_out_buffer *buf,
b3332930 1199 enum iucv_tx_notify notification)
4a71df50 1200{
4a71df50
FB		 1201 struct sk_buff *skb;
1202
b3332930
FB		 1203 if (skb_queue_empty(&buf->skb_list))
1204 goto out;
1205 skb = skb_peek(&buf->skb_list);
1206 while (skb) {
1207 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1208 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1209 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1210 if (skb->sk) {
1211 struct iucv_sock *iucv = iucv_sk(skb->sk);
1212 iucv->sk_txnotify(skb, notification);
1213 }
1214 }
1215 if (skb_queue_is_last(&buf->skb_list, skb))
1216 skb = NULL;
1217 else
1218 skb = skb_queue_next(&buf->skb_list, skb);
1219 }
1220out:
1221 return;
1222}
1223
1224static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1225{
1226 struct sk_buff *skb;
72861ae7
EL		 1227 struct iucv_sock *iucv;
1228 int notify_general_error = 0;
1229
1230 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1231 notify_general_error = 1;
1232
1233 /* release may never happen from within CQ tasklet scope */
18af5c17 1234 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1235
b67d801f
UB		 1236 skb = skb_dequeue(&buf->skb_list);
1237 while (skb) {
b3332930
FB		 1238 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1239 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1240 if (notify_general_error &&
1241 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1242 if (skb->sk) {
1243 iucv = iucv_sk(skb->sk);
1244 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1245 }
1246 }
63354797 1247 refcount_dec(&skb->users);
b67d801f 1248 dev_kfree_skb_any(skb);
4a71df50
FB		 1249 skb = skb_dequeue(&buf->skb_list);
1250 }
b3332930
FB		 1251}
1252
1253static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1254 struct qeth_qdio_out_buffer *buf,
1255 enum qeth_qdio_buffer_states newbufstate)
1256{
1257 int i;
1258
1259 /* is PCI flag set on buffer? */
1260 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1261 atomic_dec(&queue->set_pci_flags_count);
1262
1263 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1264 qeth_release_skbs(buf);
1265 }
4a71df50 1266 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1267 if (buf->buffer->element[i].addr && buf->is_header[i])
1268 kmem_cache_free(qeth_core_header_cache,
1269 buf->buffer->element[i].addr);
1270 buf->is_header[i] = 0;
4a71df50
FB		 1271 buf->buffer->element[i].length = 0;
1272 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1273 buf->buffer->element[i].eflags = 0;
1274 buf->buffer->element[i].sflags = 0;
4a71df50 1275 }
3ec90878
JG		 1276 buf->buffer->element[15].eflags = 0;
1277 buf->buffer->element[15].sflags = 0;
4a71df50 1278 buf->next_element_to_fill = 0;
0da9581d
EL		 1279 atomic_set(&buf->state, newbufstate);
1280}
1281
1282static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1283{
1284 int j;
1285
1286 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1287 if (!q->bufs[j])
1288 continue;
72861ae7 1289 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1290 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1291 if (free) {
1292 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1293 q->bufs[j] = NULL;
1294 }
1295 }
4a71df50
FB		 1296}
1297
1298void qeth_clear_qdio_buffers(struct qeth_card *card)
1299{
0da9581d 1300 int i;
4a71df50 1301
847a50fd 1302 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1303 /* clear outbound buffers to free skbs */
0da9581d 1304 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1305 if (card->qdio.out_qs[i]) {
0da9581d 1306 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1307 }
0da9581d 1308 }
4a71df50
FB		 1309}
1310EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1311
1312static void qeth_free_buffer_pool(struct qeth_card *card)
1313{
1314 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1315 int i = 0;
4a71df50
FB		 1316 list_for_each_entry_safe(pool_entry, tmp,
1317 &card->qdio.init_pool.entry_list, init_list){
1318 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1319 free_page((unsigned long)pool_entry->elements[i]);
1320 list_del(&pool_entry->init_list);
1321 kfree(pool_entry);
1322 }
1323}
1324
4a71df50
FB		 1325static void qeth_clean_channel(struct qeth_channel *channel)
1326{
1327 int cnt;
1328
d11ba0c4 1329 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1330 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1331 kfree(channel->iob[cnt].data);
1332}
1333
725b9c04
SO		 1334static void qeth_set_single_write_queues(struct qeth_card *card)
1335{
1336 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1337 (card->qdio.no_out_queues == 4))
1338 qeth_free_qdio_buffers(card);
1339
1340 card->qdio.no_out_queues = 1;
1341 if (card->qdio.default_out_queue != 0)
1342 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1343
1344 card->qdio.default_out_queue = 0;
1345}
1346
1347static void qeth_set_multiple_write_queues(struct qeth_card *card)
1348{
1349 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1350 (card->qdio.no_out_queues == 1)) {
1351 qeth_free_qdio_buffers(card);
1352 card->qdio.default_out_queue = 2;
1353 }
1354 card->qdio.no_out_queues = 4;
1355}
1356
1357static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1358{
4a71df50 1359 struct ccw_device *ccwdev;
2bf29df7 1360 struct channel_path_desc *chp_dsc;
4a71df50 1361
5113fec0 1362 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1363
1364 ccwdev = card->data.ccwdev;
725b9c04
SO		 1365 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1366 if (!chp_dsc)
1367 goto out;
1368
1369 card->info.func_level = 0x4100 + chp_dsc->desc;
1370 if (card->info.type == QETH_CARD_TYPE_IQD)
1371 goto out;
1372
1373 /* CHPP field bit 6 == 1 -> single queue */
1374 if ((chp_dsc->chpp & 0x02) == 0x02)
1375 qeth_set_single_write_queues(card);
1376 else
1377 qeth_set_multiple_write_queues(card);
1378out:
1379 kfree(chp_dsc);
5113fec0
UB		 1380 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1381 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1382}
1383
1384static void qeth_init_qdio_info(struct qeth_card *card)
1385{
d11ba0c4 1386 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1387 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1388 /* inbound */
1389 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1390 if (card->info.type == QETH_CARD_TYPE_IQD)
1391 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1392 else
1393 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1394 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1395 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1396 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1397}
1398
1399static void qeth_set_intial_options(struct qeth_card *card)
1400{
1401 card->options.route4.type = NO_ROUTER;
1402 card->options.route6.type = NO_ROUTER;
4a71df50 1403 card->options.fake_broadcast = 0;
4a71df50
FB		 1404 card->options.performance_stats = 0;
1405 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1406 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1407 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1408}
1409
1410static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1411{
1412 unsigned long flags;
1413 int rc = 0;
1414
1415 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1416 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1417 (u8) card->thread_start_mask,
1418 (u8) card->thread_allowed_mask,
1419 (u8) card->thread_running_mask);
1420 rc = (card->thread_start_mask & thread);
1421 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1422 return rc;
1423}
1424
1425static void qeth_start_kernel_thread(struct work_struct *work)
1426{
3f36b890 1427 struct task_struct *ts;
4a71df50
FB		 1428 struct qeth_card *card = container_of(work, struct qeth_card,
1429 kernel_thread_starter);
847a50fd 1430 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1431
1432 if (card->read.state != CH_STATE_UP &&
1433 card->write.state != CH_STATE_UP)
1434 return;
3f36b890 1435 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1436 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1437 "qeth_recover");
3f36b890
FB		 1438 if (IS_ERR(ts)) {
1439 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1440 qeth_clear_thread_running_bit(card,
1441 QETH_RECOVER_THREAD);
1442 }
1443 }
4a71df50
FB		 1444}
1445
bca51650 1446static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1447static int qeth_setup_card(struct qeth_card *card)
1448{
1449
d11ba0c4
PT		 1450 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1451 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1452
1453 card->read.state = CH_STATE_DOWN;
1454 card->write.state = CH_STATE_DOWN;
1455 card->data.state = CH_STATE_DOWN;
1456 card->state = CARD_STATE_DOWN;
1457 card->lan_online = 0;
908abbb5 1458 card->read_or_write_problem = 0;
4a71df50
FB		 1459 card->dev = NULL;
1460 spin_lock_init(&card->vlanlock);
1461 spin_lock_init(&card->mclock);
4a71df50
FB		 1462 spin_lock_init(&card->lock);
1463 spin_lock_init(&card->ip_lock);
1464 spin_lock_init(&card->thread_mask_lock);
c4949f07 1465 mutex_init(&card->conf_mutex);
9dc48ccc 1466 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1467 card->thread_start_mask = 0;
1468 card->thread_allowed_mask = 0;
1469 card->thread_running_mask = 0;
1470 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1471 INIT_LIST_HEAD(&card->cmd_waiter_list);
1472 init_waitqueue_head(&card->wait_q);
25985edc 1473 /* initial options */
4a71df50
FB		 1474 qeth_set_intial_options(card);
1475 /* IP address takeover */
1476 INIT_LIST_HEAD(&card->ipato.entries);
1477 card->ipato.enabled = 0;
1478 card->ipato.invert4 = 0;
1479 card->ipato.invert6 = 0;
1480 /* init QDIO stuff */
1481 qeth_init_qdio_info(card);
b3332930 1482 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1483 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1484 return 0;
1485}
1486
6bcac508
MS		 1487static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1488{
1489 struct qeth_card *card = container_of(slr, struct qeth_card,
1490 qeth_service_level);
0d788c7d
KDW		 1491 if (card->info.mcl_level[0])
1492 seq_printf(m, "qeth: %s firmware level %s\n",
1493 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1494}
1495
4a71df50
FB		 1496static struct qeth_card *qeth_alloc_card(void)
1497{
1498 struct qeth_card *card;
1499
d11ba0c4 1500 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1501 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1502 if (!card)
76b11f8e 1503 goto out;
d11ba0c4 1504 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1505 if (qeth_setup_channel(&card->read))
1506 goto out_ip;
1507 if (qeth_setup_channel(&card->write))
1508 goto out_channel;
4a71df50 1509 card->options.layer2 = -1;
6bcac508
MS		 1510 card->qeth_service_level.seq_print = qeth_core_sl_print;
1511 register_service_level(&card->qeth_service_level);
4a71df50 1512 return card;
76b11f8e
UB		 1513
1514out_channel:
1515 qeth_clean_channel(&card->read);
1516out_ip:
76b11f8e
UB		 1517 kfree(card);
1518out:
1519 return NULL;
4a71df50
FB		 1520}
1521
1522static int qeth_determine_card_type(struct qeth_card *card)
1523{
1524 int i = 0;
1525
d11ba0c4 1526 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1527
1528 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1529 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1530 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1531 if ((CARD_RDEV(card)->id.dev_type ==
1532 known_devices[i][QETH_DEV_TYPE_IND]) &&
1533 (CARD_RDEV(card)->id.dev_model ==
1534 known_devices[i][QETH_DEV_MODEL_IND])) {
1535 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1536 card->qdio.no_out_queues =
1537 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1538 card->qdio.no_in_queues = 1;
5113fec0
UB		 1539 card->info.is_multicast_different =
1540 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1541 qeth_update_from_chp_desc(card);
4a71df50
FB		 1542 return 0;
1543 }
1544 i++;
1545 }
1546 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1547 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1548 "unknown type\n");
4a71df50
FB		 1549 return -ENOENT;
1550}
1551
1552static int qeth_clear_channel(struct qeth_channel *channel)
1553{
1554 unsigned long flags;
1555 struct qeth_card *card;
1556 int rc;
1557
4a71df50 1558 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1559 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1560 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1561 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1562 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1563
1564 if (rc)
1565 return rc;
1566 rc = wait_event_interruptible_timeout(card->wait_q,
1567 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1568 if (rc == -ERESTARTSYS)
1569 return rc;
1570 if (channel->state != CH_STATE_STOPPED)
1571 return -ETIME;
1572 channel->state = CH_STATE_DOWN;
1573 return 0;
1574}
1575
1576static int qeth_halt_channel(struct qeth_channel *channel)
1577{
1578 unsigned long flags;
1579 struct qeth_card *card;
1580 int rc;
1581
4a71df50 1582 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1583 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1584 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1585 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1586 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1587
1588 if (rc)
1589 return rc;
1590 rc = wait_event_interruptible_timeout(card->wait_q,
1591 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1592 if (rc == -ERESTARTSYS)
1593 return rc;
1594 if (channel->state != CH_STATE_HALTED)
1595 return -ETIME;
1596 return 0;
1597}
1598
1599static int qeth_halt_channels(struct qeth_card *card)
1600{
1601 int rc1 = 0, rc2 = 0, rc3 = 0;
1602
847a50fd 1603 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1604 rc1 = qeth_halt_channel(&card->read);
1605 rc2 = qeth_halt_channel(&card->write);
1606 rc3 = qeth_halt_channel(&card->data);
1607 if (rc1)
1608 return rc1;
1609 if (rc2)
1610 return rc2;
1611 return rc3;
1612}
1613
1614static int qeth_clear_channels(struct qeth_card *card)
1615{
1616 int rc1 = 0, rc2 = 0, rc3 = 0;
1617
847a50fd 1618 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1619 rc1 = qeth_clear_channel(&card->read);
1620 rc2 = qeth_clear_channel(&card->write);
1621 rc3 = qeth_clear_channel(&card->data);
1622 if (rc1)
1623 return rc1;
1624 if (rc2)
1625 return rc2;
1626 return rc3;
1627}
1628
1629static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1630{
1631 int rc = 0;
1632
847a50fd 1633 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1634
1635 if (halt)
1636 rc = qeth_halt_channels(card);
1637 if (rc)
1638 return rc;
1639 return qeth_clear_channels(card);
1640}
1641
1642int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1643{
1644 int rc = 0;
1645
847a50fd 1646 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1647 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1648 QETH_QDIO_CLEANING)) {
1649 case QETH_QDIO_ESTABLISHED:
1650 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1651 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1652 QDIO_FLAG_CLEANUP_USING_HALT);
1653 else
cc961d40 1654 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1655 QDIO_FLAG_CLEANUP_USING_CLEAR);
1656 if (rc)
847a50fd 1657 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1658 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1659 break;
1660 case QETH_QDIO_CLEANING:
1661 return rc;
1662 default:
1663 break;
1664 }
1665 rc = qeth_clear_halt_card(card, use_halt);
1666 if (rc)
847a50fd 1667 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1668 card->state = CARD_STATE_DOWN;
1669 return rc;
1670}
1671EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1672
1673static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1674 int *length)
1675{
1676 struct ciw *ciw;
1677 char *rcd_buf;
1678 int ret;
1679 struct qeth_channel *channel = &card->data;
1680 unsigned long flags;
1681
1682 /*
1683 * scan for RCD command in extended SenseID data
1684 */
1685 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1686 if (!ciw || ciw->cmd == 0)
1687 return -EOPNOTSUPP;
1688 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1689 if (!rcd_buf)
1690 return -ENOMEM;
1691
1692 channel->ccw.cmd_code = ciw->cmd;
1693 channel->ccw.cda = (__u32) __pa(rcd_buf);
1694 channel->ccw.count = ciw->count;
1695 channel->ccw.flags = CCW_FLAG_SLI;
1696 channel->state = CH_STATE_RCD;
1697 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1698 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1699 QETH_RCD_PARM, LPM_ANYPATH, 0,
1700 QETH_RCD_TIMEOUT);
1701 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1702 if (!ret)
1703 wait_event(card->wait_q,
1704 (channel->state == CH_STATE_RCD_DONE ||
1705 channel->state == CH_STATE_DOWN));
1706 if (channel->state == CH_STATE_DOWN)
1707 ret = -EIO;
1708 else
1709 channel->state = CH_STATE_DOWN;
1710 if (ret) {
1711 kfree(rcd_buf);
1712 *buffer = NULL;
1713 *length = 0;
1714 } else {
1715 *length = ciw->count;
1716 *buffer = rcd_buf;
1717 }
1718 return ret;
1719}
1720
a60389ab 1721static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1722{
a60389ab 1723 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1724 card->info.chpid = prcd[30];
1725 card->info.unit_addr2 = prcd[31];
1726 card->info.cula = prcd[63];
1727 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1728 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1729}
1730
c70eb09d
JW		 1731/* Determine whether the device requires a specific layer discipline */
1732static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1733{
1734 if (card->info.type == QETH_CARD_TYPE_OSM ||
1735 card->info.type == QETH_CARD_TYPE_OSN) {
1736 QETH_DBF_TEXT(SETUP, 3, "force l2");
1737 return QETH_DISCIPLINE_LAYER2;
1738 }
1739
1740 /* virtual HiperSocket is L3 only: */
1741 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
1742 QETH_DBF_TEXT(SETUP, 3, "force l3");
1743 return QETH_DISCIPLINE_LAYER3;
1744 }
1745
1746 QETH_DBF_TEXT(SETUP, 3, "force no");
1747 return QETH_DISCIPLINE_UNDETERMINED;
1748}
1749
a60389ab
EL		 1750static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1751{
1752 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1753
e6e056ba 1754 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1755 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1756 card->info.blkt.time_total = 0;
1757 card->info.blkt.inter_packet = 0;
1758 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1759 } else {
1760 card->info.blkt.time_total = 250;
1761 card->info.blkt.inter_packet = 5;
1762 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1763 }
4a71df50
FB		 1764}
1765
1766static void qeth_init_tokens(struct qeth_card *card)
1767{
1768 card->token.issuer_rm_w = 0x00010103UL;
1769 card->token.cm_filter_w = 0x00010108UL;
1770 card->token.cm_connection_w = 0x0001010aUL;
1771 card->token.ulp_filter_w = 0x0001010bUL;
1772 card->token.ulp_connection_w = 0x0001010dUL;
1773}
1774
1775static void qeth_init_func_level(struct qeth_card *card)
1776{
5113fec0
UB		 1777 switch (card->info.type) {
1778 case QETH_CARD_TYPE_IQD:
6298263a 1779 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1780 break;
1781 case QETH_CARD_TYPE_OSD:
0132951e 1782 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1783 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1784 break;
1785 default:
1786 break;
4a71df50
FB		 1787 }
1788}
1789
4a71df50
FB		 1790static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1791 void (*idx_reply_cb)(struct qeth_channel *,
1792 struct qeth_cmd_buffer *))
1793{
1794 struct qeth_cmd_buffer *iob;
1795 unsigned long flags;
1796 int rc;
1797 struct qeth_card *card;
1798
d11ba0c4 1799 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1800 card = CARD_FROM_CDEV(channel->ccwdev);
1801 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1802 if (!iob)
1803 return -ENOMEM;
4a71df50
FB		 1804 iob->callback = idx_reply_cb;
1805 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1806 channel->ccw.count = QETH_BUFSIZE;
1807 channel->ccw.cda = (__u32) __pa(iob->data);
1808
1809 wait_event(card->wait_q,
1810 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1811 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1812 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1813 rc = ccw_device_start(channel->ccwdev,
1814 &channel->ccw, (addr_t) iob, 0, 0);
1815 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1816
1817 if (rc) {
14cc21b6 1818 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1819 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1820 atomic_set(&channel->irq_pending, 0);
1821 wake_up(&card->wait_q);
1822 return rc;
1823 }
1824 rc = wait_event_interruptible_timeout(card->wait_q,
1825 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1826 if (rc == -ERESTARTSYS)
1827 return rc;
1828 if (channel->state != CH_STATE_UP) {
1829 rc = -ETIME;
d11ba0c4 1830 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1831 qeth_clear_cmd_buffers(channel);
1832 } else
1833 rc = 0;
1834 return rc;
1835}
1836
1837static int qeth_idx_activate_channel(struct qeth_channel *channel,
1838 void (*idx_reply_cb)(struct qeth_channel *,
1839 struct qeth_cmd_buffer *))
1840{
1841 struct qeth_card *card;
1842 struct qeth_cmd_buffer *iob;
1843 unsigned long flags;
1844 __u16 temp;
1845 __u8 tmp;
1846 int rc;
f06f6f32 1847 struct ccw_dev_id temp_devid;
4a71df50
FB		 1848
1849 card = CARD_FROM_CDEV(channel->ccwdev);
1850
d11ba0c4 1851 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1852
1853 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1854 if (!iob)
1855 return -ENOMEM;
4a71df50
FB		 1856 iob->callback = idx_reply_cb;
1857 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1858 channel->ccw.count = IDX_ACTIVATE_SIZE;
1859 channel->ccw.cda = (__u32) __pa(iob->data);
1860 if (channel == &card->write) {
1861 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1862 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1863 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1864 card->seqno.trans_hdr++;
1865 } else {
1866 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1867 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1868 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1869 }
1870 tmp = ((__u8)card->info.portno) | 0x80;
1871 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1872 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1873 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1874 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1875 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1876 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1877 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1878 temp = (card->info.cula << 8) + card->info.unit_addr2;
1879 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1880
1881 wait_event(card->wait_q,
1882 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1883 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1884 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1885 rc = ccw_device_start(channel->ccwdev,
1886 &channel->ccw, (addr_t) iob, 0, 0);
1887 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1888
1889 if (rc) {
14cc21b6
FB		 1890 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1891 rc);
d11ba0c4 1892 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1893 atomic_set(&channel->irq_pending, 0);
1894 wake_up(&card->wait_q);
1895 return rc;
1896 }
1897 rc = wait_event_interruptible_timeout(card->wait_q,
1898 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1899 if (rc == -ERESTARTSYS)
1900 return rc;
1901 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1902 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1903 " failed to recover an error on the device\n");
1904 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1905 dev_name(&channel->ccwdev->dev));
d11ba0c4 1906 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1907 qeth_clear_cmd_buffers(channel);
1908 return -ETIME;
1909 }
1910 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1911}
1912
1913static int qeth_peer_func_level(int level)
1914{
1915 if ((level & 0xff) == 8)
1916 return (level & 0xff) + 0x400;
1917 if (((level >> 8) & 3) == 1)
1918 return (level & 0xff) + 0x200;
1919 return level;
1920}
1921
1922static void qeth_idx_write_cb(struct qeth_channel *channel,
1923 struct qeth_cmd_buffer *iob)
1924{
1925 struct qeth_card *card;
1926 __u16 temp;
1927
d11ba0c4 1928 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1929
1930 if (channel->state == CH_STATE_DOWN) {
1931 channel->state = CH_STATE_ACTIVATING;
1932 goto out;
1933 }
1934 card = CARD_FROM_CDEV(channel->ccwdev);
1935
1936 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1937 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1938 dev_err(&card->write.ccwdev->dev,
1939 "The adapter is used exclusively by another "
1940 "host\n");
4a71df50 1941 else
74eacdb9
FB		 1942 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1943 " negative reply\n",
1944 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1945 goto out;
1946 }
1947 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1948 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1949 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1950 "function level mismatch (sent: 0x%x, received: "
1951 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1952 card->info.func_level, temp);
4a71df50
FB		 1953 goto out;
1954 }
1955 channel->state = CH_STATE_UP;
1956out:
1957 qeth_release_buffer(channel, iob);
1958}
1959
1960static void qeth_idx_read_cb(struct qeth_channel *channel,
1961 struct qeth_cmd_buffer *iob)
1962{
1963 struct qeth_card *card;
1964 __u16 temp;
1965
d11ba0c4 1966 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1967 if (channel->state == CH_STATE_DOWN) {
1968 channel->state = CH_STATE_ACTIVATING;
1969 goto out;
1970 }
1971
1972 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1973 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1974 goto out;
1975
1976 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1977 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1978 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1979 dev_err(&card->write.ccwdev->dev,
1980 "The adapter is used exclusively by another "
1981 "host\n");
5113fec0
UB		 1982 break;
1983 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1984 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1985 dev_err(&card->read.ccwdev->dev,
1986 "Setting the device online failed because of "
01fc3e86 1987 "insufficient authorization\n");
5113fec0
UB		 1988 break;
1989 default:
74eacdb9
FB		 1990 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1991 " negative reply\n",
1992 dev_name(&card->read.ccwdev->dev));
5113fec0 1993 }
01fc3e86
UB		 1994 QETH_CARD_TEXT_(card, 2, "idxread%c",
1995 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1996 goto out;
1997 }
1998
4a71df50
FB		 1999 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2000 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 2001 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
2002 "level mismatch (sent: 0x%x, received: 0x%x)\n",
2003 dev_name(&card->read.ccwdev->dev),
2004 card->info.func_level, temp);
4a71df50
FB		 2005 goto out;
2006 }
2007 memcpy(&card->token.issuer_rm_r,
2008 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2009 QETH_MPC_TOKEN_LENGTH);
2010 memcpy(&card->info.mcl_level[0],
2011 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2012 channel->state = CH_STATE_UP;
2013out:
2014 qeth_release_buffer(channel, iob);
2015}
2016
2017void qeth_prepare_control_data(struct qeth_card *card, int len,
2018 struct qeth_cmd_buffer *iob)
2019{
2020 qeth_setup_ccw(&card->write, iob->data, len);
2021 iob->callback = qeth_release_buffer;
2022
2023 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2024 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2025 card->seqno.trans_hdr++;
2026 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2027 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2028 card->seqno.pdu_hdr++;
2029 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2030 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2031 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2032}
2033EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2034
efbbc1d5
EC		 2035/**
2036 * qeth_send_control_data() - send control command to the card
2037 * @card: qeth_card structure pointer
2038 * @len: size of the command buffer
2039 * @iob: qeth_cmd_buffer pointer
2040 * @reply_cb: callback function pointer
2041 * @cb_card: pointer to the qeth_card structure
2042 * @cb_reply: pointer to the qeth_reply structure
2043 * @cb_cmd: pointer to the original iob for non-IPA
2044 * commands, or to the qeth_ipa_cmd structure
2045 * for the IPA commands.
2046 * @reply_param: private pointer passed to the callback
2047 *
2048 * Returns the value of the `return_code' field of the response
2049 * block returned from the hardware, or other error indication.
2050 * Value of zero indicates successful execution of the command.
2051 *
2052 * Callback function gets called one or more times, with cb_cmd
2053 * pointing to the response returned by the hardware. Callback
2054 * function must return non-zero if more reply blocks are expected,
2055 * and zero if the last or only reply block is received. Callback
2056 * function can get the value of the reply_param pointer from the
2057 * field 'param' of the structure qeth_reply.
2058 */
2059
4a71df50
FB		 2060int qeth_send_control_data(struct qeth_card *card, int len,
2061 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2062 int (*reply_cb)(struct qeth_card *cb_card,
2063 struct qeth_reply *cb_reply,
2064 unsigned long cb_cmd),
4a71df50
FB		 2065 void *reply_param)
2066{
2067 int rc;
2068 unsigned long flags;
2069 struct qeth_reply *reply = NULL;
7834cd5a 2070 unsigned long timeout, event_timeout;
5b54e16f 2071 struct qeth_ipa_cmd *cmd;
4a71df50 2072
847a50fd 2073 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2074
908abbb5
UB		 2075 if (card->read_or_write_problem) {
2076 qeth_release_buffer(iob->channel, iob);
2077 return -EIO;
2078 }
4a71df50
FB		 2079 reply = qeth_alloc_reply(card);
2080 if (!reply) {
4a71df50
FB		 2081 return -ENOMEM;
2082 }
2083 reply->callback = reply_cb;
2084 reply->param = reply_param;
2085 if (card->state == CARD_STATE_DOWN)
2086 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2087 else
2088 reply->seqno = card->seqno.ipa++;
2089 init_waitqueue_head(&reply->wait_q);
2090 spin_lock_irqsave(&card->lock, flags);
2091 list_add_tail(&reply->list, &card->cmd_waiter_list);
2092 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2093 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2094
2095 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2096 qeth_prepare_control_data(card, len, iob);
2097
2098 if (IS_IPA(iob->data))
7834cd5a 2099 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2100 else
7834cd5a
HC		 2101 event_timeout = QETH_TIMEOUT;
2102 timeout = jiffies + event_timeout;
4a71df50 2103
847a50fd 2104 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2105 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2106 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2107 (addr_t) iob, 0, 0);
2108 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2109 if (rc) {
74eacdb9
FB		 2110 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2111 "ccw_device_start rc = %i\n",
2112 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2113 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2114 spin_lock_irqsave(&card->lock, flags);
2115 list_del_init(&reply->list);
2116 qeth_put_reply(reply);
2117 spin_unlock_irqrestore(&card->lock, flags);
2118 qeth_release_buffer(iob->channel, iob);
2119 atomic_set(&card->write.irq_pending, 0);
2120 wake_up(&card->wait_q);
2121 return rc;
2122 }
5b54e16f
FB		 2123
2124 /* we have only one long running ipassist, since we can ensure
2125 process context of this command we can sleep */
2126 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2127 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2128 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2129 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2130 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2131 goto time_err;
2132 } else {
2133 while (!atomic_read(&reply->received)) {
2134 if (time_after(jiffies, timeout))
2135 goto time_err;
2136 cpu_relax();
6531084c 2137 }
5b54e16f
FB		 2138 }
2139
70919e23
UB		 2140 if (reply->rc == -EIO)
2141 goto error;
5b54e16f
FB		 2142 rc = reply->rc;
2143 qeth_put_reply(reply);
2144 return rc;
2145
2146time_err:
70919e23 2147 reply->rc = -ETIME;
5b54e16f
FB		 2148 spin_lock_irqsave(&reply->card->lock, flags);
2149 list_del_init(&reply->list);
2150 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2151 atomic_inc(&reply->received);
70919e23 2152error:
908abbb5
UB		 2153 atomic_set(&card->write.irq_pending, 0);
2154 qeth_release_buffer(iob->channel, iob);
2155 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2156 rc = reply->rc;
2157 qeth_put_reply(reply);
2158 return rc;
2159}
2160EXPORT_SYMBOL_GPL(qeth_send_control_data);
2161
2162static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2163 unsigned long data)
2164{
2165 struct qeth_cmd_buffer *iob;
2166
d11ba0c4 2167 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2168
2169 iob = (struct qeth_cmd_buffer *) data;
2170 memcpy(&card->token.cm_filter_r,
2171 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2172 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2173 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2174 return 0;
2175}
2176
2177static int qeth_cm_enable(struct qeth_card *card)
2178{
2179 int rc;
2180 struct qeth_cmd_buffer *iob;
2181
d11ba0c4 2182 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2183
2184 iob = qeth_wait_for_buffer(&card->write);
2185 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2186 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2187 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2188 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2189 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2190
2191 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2192 qeth_cm_enable_cb, NULL);
2193 return rc;
2194}
2195
2196static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2197 unsigned long data)
2198{
2199
2200 struct qeth_cmd_buffer *iob;
2201
d11ba0c4 2202 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2203
2204 iob = (struct qeth_cmd_buffer *) data;
2205 memcpy(&card->token.cm_connection_r,
2206 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2207 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2208 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2209 return 0;
2210}
2211
2212static int qeth_cm_setup(struct qeth_card *card)
2213{
2214 int rc;
2215 struct qeth_cmd_buffer *iob;
2216
d11ba0c4 2217 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2218
2219 iob = qeth_wait_for_buffer(&card->write);
2220 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2221 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2222 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2223 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2224 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2225 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2226 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2227 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2228 qeth_cm_setup_cb, NULL);
2229 return rc;
2230
2231}
2232
cef6ff22 2233static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
4a71df50
FB		 2234{
2235 switch (card->info.type) {
2236 case QETH_CARD_TYPE_UNKNOWN:
2237 return 1500;
2238 case QETH_CARD_TYPE_IQD:
2239 return card->info.max_mtu;
5113fec0 2240 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2241 switch (card->info.link_type) {
2242 case QETH_LINK_TYPE_HSTR:
2243 case QETH_LINK_TYPE_LANE_TR:
2244 return 2000;
2245 default:
fe44014a 2246 return card->options.layer2 ? 1500 : 1492;
4a71df50 2247 }
5113fec0
UB		 2248 case QETH_CARD_TYPE_OSM:
2249 case QETH_CARD_TYPE_OSX:
fe44014a 2250 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2251 default:
2252 return 1500;
2253 }
2254}
2255
cef6ff22 2256static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2257{
2258 switch (framesize) {
2259 case 0x4000:
2260 return 8192;
2261 case 0x6000:
2262 return 16384;
2263 case 0xa000:
2264 return 32768;
2265 case 0xffff:
2266 return 57344;
2267 default:
2268 return 0;
2269 }
2270}
2271
cef6ff22 2272static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
4a71df50
FB		 2273{
2274 switch (card->info.type) {
5113fec0
UB		 2275 case QETH_CARD_TYPE_OSD:
2276 case QETH_CARD_TYPE_OSM:
2277 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2278 case QETH_CARD_TYPE_IQD:
2279 return ((mtu >= 576) &&
9853b97b 2280 (mtu <= card->info.max_mtu));
4a71df50
FB		 2281 case QETH_CARD_TYPE_OSN:
2282 case QETH_CARD_TYPE_UNKNOWN:
2283 default:
2284 return 1;
2285 }
2286}
2287
2288static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2289 unsigned long data)
2290{
2291
2292 __u16 mtu, framesize;
2293 __u16 len;
2294 __u8 link_type;
2295 struct qeth_cmd_buffer *iob;
2296
d11ba0c4 2297 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2298
2299 iob = (struct qeth_cmd_buffer *) data;
2300 memcpy(&card->token.ulp_filter_r,
2301 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2302 QETH_MPC_TOKEN_LENGTH);
9853b97b 2303 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2304 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2305 mtu = qeth_get_mtu_outof_framesize(framesize);
2306 if (!mtu) {
2307 iob->rc = -EINVAL;
d11ba0c4 2308 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2309 return 0;
2310 }
8b2e18f6
UB		 2311 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2312 /* frame size has changed */
2313 if (card->dev &&
2314 ((card->dev->mtu == card->info.initial_mtu) ||
2315 (card->dev->mtu > mtu)))
2316 card->dev->mtu = mtu;
2317 qeth_free_qdio_buffers(card);
2318 }
4a71df50 2319 card->info.initial_mtu = mtu;
8b2e18f6 2320 card->info.max_mtu = mtu;
4a71df50
FB		 2321 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2322 } else {
9853b97b
FB		 2323 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2324 iob->data);
fe44014a
SR		 2325 card->info.initial_mtu = min(card->info.max_mtu,
2326 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2327 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2328 }
2329
2330 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2331 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2332 memcpy(&link_type,
2333 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2334 card->info.link_type = link_type;
2335 } else
2336 card->info.link_type = 0;
01fc3e86 2337 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2338 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2339 return 0;
2340}
2341
2342static int qeth_ulp_enable(struct qeth_card *card)
2343{
2344 int rc;
2345 char prot_type;
2346 struct qeth_cmd_buffer *iob;
2347
2348 /*FIXME: trace view callbacks*/
d11ba0c4 2349 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2350
2351 iob = qeth_wait_for_buffer(&card->write);
2352 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2353
2354 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2355 (__u8) card->info.portno;
2356 if (card->options.layer2)
2357 if (card->info.type == QETH_CARD_TYPE_OSN)
2358 prot_type = QETH_PROT_OSN2;
2359 else
2360 prot_type = QETH_PROT_LAYER2;
2361 else
2362 prot_type = QETH_PROT_TCPIP;
2363
2364 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2365 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2366 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2367 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2368 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2369 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2370 qeth_ulp_enable_cb, NULL);
2371 return rc;
2372
2373}
2374
2375static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2376 unsigned long data)
2377{
2378 struct qeth_cmd_buffer *iob;
2379
d11ba0c4 2380 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2381
2382 iob = (struct qeth_cmd_buffer *) data;
2383 memcpy(&card->token.ulp_connection_r,
2384 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2385 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2386 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2387 3)) {
2388 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2389 dev_err(&card->gdev->dev, "A connection could not be "
2390 "established because of an OLM limit\n");
bbb822a8 2391 iob->rc = -EMLINK;
65a1f898 2392 }
d11ba0c4 2393 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2394 return 0;
4a71df50
FB		 2395}
2396
2397static int qeth_ulp_setup(struct qeth_card *card)
2398{
2399 int rc;
2400 __u16 temp;
2401 struct qeth_cmd_buffer *iob;
2402 struct ccw_dev_id dev_id;
2403
d11ba0c4 2404 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2405
2406 iob = qeth_wait_for_buffer(&card->write);
2407 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2408
2409 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2410 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2411 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2412 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2413 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2414 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2415
2416 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2417 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2418 temp = (card->info.cula << 8) + card->info.unit_addr2;
2419 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2420 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2421 qeth_ulp_setup_cb, NULL);
2422 return rc;
2423}
2424
0da9581d
EL		 2425static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2426{
2427 int rc;
2428 struct qeth_qdio_out_buffer *newbuf;
2429
2430 rc = 0;
2431 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2432 if (!newbuf) {
2433 rc = -ENOMEM;
2434 goto out;
2435 }
d445a4e2 2436 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2437 skb_queue_head_init(&newbuf->skb_list);
2438 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2439 newbuf->q = q;
2440 newbuf->aob = NULL;
2441 newbuf->next_pending = q->bufs[bidx];
2442 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2443 q->bufs[bidx] = newbuf;
2444 if (q->bufstates) {
2445 q->bufstates[bidx].user = newbuf;
2446 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2447 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2448 QETH_CARD_TEXT_(q->card, 2, "%lx",
2449 (long) newbuf->next_pending);
2450 }
2451out:
2452 return rc;
2453}
2454
d445a4e2
SO		 2455static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2456{
2457 if (!q)
2458 return;
2459
2460 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2461 kfree(q);
2462}
2463
2464static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2465{
2466 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2467
2468 if (!q)
2469 return NULL;
2470
2471 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2472 kfree(q);
2473 return NULL;
2474 }
2475 return q;
2476}
0da9581d 2477
4a71df50
FB		 2478static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2479{
2480 int i, j;
2481
d11ba0c4 2482 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2483
2484 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2485 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2486 return 0;
2487
4601ba6c
SO		 2488 QETH_DBF_TEXT(SETUP, 2, "inq");
2489 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2490 if (!card->qdio.in_q)
2491 goto out_nomem;
4601ba6c 2492
4a71df50
FB		 2493 /* inbound buffer pool */
2494 if (qeth_alloc_buffer_pool(card))
2495 goto out_freeinq;
0da9581d 2496
4a71df50
FB		 2497 /* outbound */
2498 card->qdio.out_qs =
b3332930 2499 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2500 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2501 if (!card->qdio.out_qs)
2502 goto out_freepool;
2503 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2504 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2505 if (!card->qdio.out_qs[i])
2506 goto out_freeoutq;
d11ba0c4
PT		 2507 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2508 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2509 card->qdio.out_qs[i]->queue_no = i;
2510 /* give outbound qeth_qdio_buffers their qdio_buffers */
2511 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2512 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2513 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2514 goto out_freeoutqbufs;
4a71df50
FB		 2515 }
2516 }
0da9581d
EL		 2517
2518 /* completion */
2519 if (qeth_alloc_cq(card))
2520 goto out_freeoutq;
2521
4a71df50
FB		 2522 return 0;
2523
0da9581d
EL		 2524out_freeoutqbufs:
2525 while (j > 0) {
2526 --j;
2527 kmem_cache_free(qeth_qdio_outbuf_cache,
2528 card->qdio.out_qs[i]->bufs[j]);
2529 card->qdio.out_qs[i]->bufs[j] = NULL;
2530 }
4a71df50 2531out_freeoutq:
0da9581d 2532 while (i > 0) {
d445a4e2 2533 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2534 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2535 }
4a71df50
FB		 2536 kfree(card->qdio.out_qs);
2537 card->qdio.out_qs = NULL;
2538out_freepool:
2539 qeth_free_buffer_pool(card);
2540out_freeinq:
4601ba6c 2541 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2542 card->qdio.in_q = NULL;
2543out_nomem:
2544 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2545 return -ENOMEM;
2546}
2547
d445a4e2
SO		 2548static void qeth_free_qdio_buffers(struct qeth_card *card)
2549{
2550 int i, j;
2551
2552 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2553 QETH_QDIO_UNINITIALIZED)
2554 return;
2555
2556 qeth_free_cq(card);
2557 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2558 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2559 if (card->qdio.in_q->bufs[j].rx_skb)
2560 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2561 }
2562 qeth_free_qdio_queue(card->qdio.in_q);
2563 card->qdio.in_q = NULL;
2564 /* inbound buffer pool */
2565 qeth_free_buffer_pool(card);
2566 /* free outbound qdio_qs */
2567 if (card->qdio.out_qs) {
2568 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2569 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2570 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2571 }
2572 kfree(card->qdio.out_qs);
2573 card->qdio.out_qs = NULL;
2574 }
2575}
2576
4a71df50
FB		 2577static void qeth_create_qib_param_field(struct qeth_card *card,
2578 char *param_field)
2579{
2580
2581 param_field[0] = _ascebc['P'];
2582 param_field[1] = _ascebc['C'];
2583 param_field[2] = _ascebc['I'];
2584 param_field[3] = _ascebc['T'];
2585 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2586 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2587 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2588}
2589
2590static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2591 char *param_field)
2592{
2593 param_field[16] = _ascebc['B'];
2594 param_field[17] = _ascebc['L'];
2595 param_field[18] = _ascebc['K'];
2596 param_field[19] = _ascebc['T'];
2597 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2598 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2599 *((unsigned int *) (&param_field[28])) =
2600 card->info.blkt.inter_packet_jumbo;
2601}
2602
2603static int qeth_qdio_activate(struct qeth_card *card)
2604{
d11ba0c4 2605 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2606 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2607}
2608
2609static int qeth_dm_act(struct qeth_card *card)
2610{
2611 int rc;
2612 struct qeth_cmd_buffer *iob;
2613
d11ba0c4 2614 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2615
2616 iob = qeth_wait_for_buffer(&card->write);
2617 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2618
2619 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2620 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2621 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2622 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2623 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2624 return rc;
2625}
2626
2627static int qeth_mpc_initialize(struct qeth_card *card)
2628{
2629 int rc;
2630
d11ba0c4 2631 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2632
2633 rc = qeth_issue_next_read(card);
2634 if (rc) {
d11ba0c4 2635 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2636 return rc;
2637 }
2638 rc = qeth_cm_enable(card);
2639 if (rc) {
d11ba0c4 2640 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2641 goto out_qdio;
2642 }
2643 rc = qeth_cm_setup(card);
2644 if (rc) {
d11ba0c4 2645 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2646 goto out_qdio;
2647 }
2648 rc = qeth_ulp_enable(card);
2649 if (rc) {
d11ba0c4 2650 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2651 goto out_qdio;
2652 }
2653 rc = qeth_ulp_setup(card);
2654 if (rc) {
d11ba0c4 2655 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2656 goto out_qdio;
2657 }
2658 rc = qeth_alloc_qdio_buffers(card);
2659 if (rc) {
d11ba0c4 2660 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2661 goto out_qdio;
2662 }
2663 rc = qeth_qdio_establish(card);
2664 if (rc) {
d11ba0c4 2665 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2666 qeth_free_qdio_buffers(card);
2667 goto out_qdio;
2668 }
2669 rc = qeth_qdio_activate(card);
2670 if (rc) {
d11ba0c4 2671 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2672 goto out_qdio;
2673 }
2674 rc = qeth_dm_act(card);
2675 if (rc) {
d11ba0c4 2676 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2677 goto out_qdio;
2678 }
2679
2680 return 0;
2681out_qdio:
2682 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2683 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2684 return rc;
2685}
2686
4a71df50
FB		 2687void qeth_print_status_message(struct qeth_card *card)
2688{
2689 switch (card->info.type) {
5113fec0
UB		 2690 case QETH_CARD_TYPE_OSD:
2691 case QETH_CARD_TYPE_OSM:
2692 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2693 /* VM will use a non-zero first character
2694 * to indicate a HiperSockets like reporting
2695 * of the level OSA sets the first character to zero
2696 * */
2697 if (!card->info.mcl_level[0]) {
2698 sprintf(card->info.mcl_level, "%02x%02x",
2699 card->info.mcl_level[2],
2700 card->info.mcl_level[3]);
4a71df50
FB		 2701 break;
2702 }
2703 /* fallthrough */
2704 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2705 if ((card->info.guestlan) ||
2706 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2707 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2708 card->info.mcl_level[0]];
2709 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2710 card->info.mcl_level[1]];
2711 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2712 card->info.mcl_level[2]];
2713 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2714 card->info.mcl_level[3]];
2715 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2716 }
2717 break;
2718 default:
2719 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2720 }
239ff408
UB		 2721 dev_info(&card->gdev->dev,
2722 "Device is a%s card%s%s%s\nwith link type %s.\n",
2723 qeth_get_cardname(card),
2724 (card->info.mcl_level[0]) ? " (level: " : "",
2725 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2726 (card->info.mcl_level[0]) ? ")" : "",
2727 qeth_get_cardname_short(card));
4a71df50
FB		 2728}
2729EXPORT_SYMBOL_GPL(qeth_print_status_message);
2730
4a71df50
FB		 2731static void qeth_initialize_working_pool_list(struct qeth_card *card)
2732{
2733 struct qeth_buffer_pool_entry *entry;
2734
847a50fd 2735 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2736
2737 list_for_each_entry(entry,
2738 &card->qdio.init_pool.entry_list, init_list) {
2739 qeth_put_buffer_pool_entry(card, entry);
2740 }
2741}
2742
cef6ff22
JW		 2743static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2744 struct qeth_card *card)
4a71df50
FB		 2745{
2746 struct list_head *plh;
2747 struct qeth_buffer_pool_entry *entry;
2748 int i, free;
2749 struct page *page;
2750
2751 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2752 return NULL;
2753
2754 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2755 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2756 free = 1;
2757 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2758 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2759 free = 0;
2760 break;
2761 }
2762 }
2763 if (free) {
2764 list_del_init(&entry->list);
2765 return entry;
2766 }
2767 }
2768
2769 /* no free buffer in pool so take first one and swap pages */
2770 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2771 struct qeth_buffer_pool_entry, list);
2772 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2773 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2774 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2775 if (!page) {
2776 return NULL;
2777 } else {
2778 free_page((unsigned long)entry->elements[i]);
2779 entry->elements[i] = page_address(page);
2780 if (card->options.performance_stats)
2781 card->perf_stats.sg_alloc_page_rx++;
2782 }
2783 }
2784 }
2785 list_del_init(&entry->list);
2786 return entry;
2787}
2788
2789static int qeth_init_input_buffer(struct qeth_card *card,
2790 struct qeth_qdio_buffer *buf)
2791{
2792 struct qeth_buffer_pool_entry *pool_entry;
2793 int i;
2794
b3332930
FB		 2795 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2796 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2797 if (!buf->rx_skb)
2798 return 1;
2799 }
2800
4a71df50
FB		 2801 pool_entry = qeth_find_free_buffer_pool_entry(card);
2802 if (!pool_entry)
2803 return 1;
2804
2805 /*
2806 * since the buffer is accessed only from the input_tasklet
2807 * there shouldn't be a need to synchronize; also, since we use
2808 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2809 * buffers
2810 */
4a71df50
FB		 2811
2812 buf->pool_entry = pool_entry;
2813 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2814 buf->buffer->element[i].length = PAGE_SIZE;
2815 buf->buffer->element[i].addr = pool_entry->elements[i];
2816 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2817 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2818 else
3ec90878
JG		 2819 buf->buffer->element[i].eflags = 0;
2820 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2821 }
2822 return 0;
2823}
2824
2825int qeth_init_qdio_queues(struct qeth_card *card)
2826{
2827 int i, j;
2828 int rc;
2829
d11ba0c4 2830 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2831
2832 /* inbound queue */
6d284bde
SO		 2833 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2834 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2835 qeth_initialize_working_pool_list(card);
2836 /*give only as many buffers to hardware as we have buffer pool entries*/
2837 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2838 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2839 card->qdio.in_q->next_buf_to_init =
2840 card->qdio.in_buf_pool.buf_count - 1;
2841 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2842 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2843 if (rc) {
d11ba0c4 2844 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2845 return rc;
2846 }
0da9581d
EL		 2847
2848 /* completion */
2849 rc = qeth_cq_init(card);
2850 if (rc) {
2851 return rc;
2852 }
2853
4a71df50
FB		 2854 /* outbound queue */
2855 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2856 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2857 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2858 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2859 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2860 card->qdio.out_qs[i]->bufs[j],
2861 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2862 }
2863 card->qdio.out_qs[i]->card = card;
2864 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2865 card->qdio.out_qs[i]->do_pack = 0;
2866 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2867 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2868 atomic_set(&card->qdio.out_qs[i]->state,
2869 QETH_OUT_Q_UNLOCKED);
2870 }
2871 return 0;
2872}
2873EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2874
cef6ff22 2875static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2876{
2877 switch (link_type) {
2878 case QETH_LINK_TYPE_HSTR:
2879 return 2;
2880 default:
2881 return 1;
2882 }
2883}
2884
2885static void qeth_fill_ipacmd_header(struct qeth_card *card,
2886 struct qeth_ipa_cmd *cmd, __u8 command,
2887 enum qeth_prot_versions prot)
2888{
2889 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2890 cmd->hdr.command = command;
2891 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2892 cmd->hdr.seqno = card->seqno.ipa;
2893 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2894 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2895 if (card->options.layer2)
2896 cmd->hdr.prim_version_no = 2;
2897 else
2898 cmd->hdr.prim_version_no = 1;
2899 cmd->hdr.param_count = 1;
2900 cmd->hdr.prot_version = prot;
2901 cmd->hdr.ipa_supported = 0;
2902 cmd->hdr.ipa_enabled = 0;
2903}
2904
2905struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2906 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2907{
2908 struct qeth_cmd_buffer *iob;
2909 struct qeth_ipa_cmd *cmd;
2910
1aec42bc
TR		 2911 iob = qeth_get_buffer(&card->write);
2912 if (iob) {
2913 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2914 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2915 } else {
2916 dev_warn(&card->gdev->dev,
2917 "The qeth driver ran out of channel command buffers\n");
2918 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2919 dev_name(&card->gdev->dev));
2920 }
4a71df50
FB		 2921
2922 return iob;
2923}
2924EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2925
2926void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2927 char prot_type)
2928{
2929 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2930 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2931 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2932 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2933}
2934EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2935
efbbc1d5
EC		 2936/**
2937 * qeth_send_ipa_cmd() - send an IPA command
2938 *
2939 * See qeth_send_control_data() for explanation of the arguments.
2940 */
2941
4a71df50
FB		 2942int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2943 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2944 unsigned long),
2945 void *reply_param)
2946{
2947 int rc;
2948 char prot_type;
4a71df50 2949
847a50fd 2950 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2951
2952 if (card->options.layer2)
2953 if (card->info.type == QETH_CARD_TYPE_OSN)
2954 prot_type = QETH_PROT_OSN2;
2955 else
2956 prot_type = QETH_PROT_LAYER2;
2957 else
2958 prot_type = QETH_PROT_TCPIP;
2959 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2960 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2961 iob, reply_cb, reply_param);
908abbb5
UB		 2962 if (rc == -ETIME) {
2963 qeth_clear_ipacmd_list(card);
2964 qeth_schedule_recovery(card);
2965 }
4a71df50
FB		 2966 return rc;
2967}
2968EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2969
10340510 2970static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2971{
2972 int rc;
70919e23 2973 struct qeth_cmd_buffer *iob;
4a71df50 2974
d11ba0c4 2975 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2976
70919e23 2977 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2978 if (!iob)
2979 return -ENOMEM;
70919e23 2980 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2981 return rc;
2982}
4a71df50 2983
eb3fb0ba 2984static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2985 struct qeth_reply *reply, unsigned long data)
2986{
2987 struct qeth_ipa_cmd *cmd;
2988
847a50fd 2989 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2990
2991 cmd = (struct qeth_ipa_cmd *) data;
2992 if (cmd->hdr.return_code == 0)
2993 cmd->hdr.return_code =
2994 cmd->data.setadapterparms.hdr.return_code;
2995 return 0;
2996}
4a71df50
FB		 2997
2998static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2999 struct qeth_reply *reply, unsigned long data)
3000{
3001 struct qeth_ipa_cmd *cmd;
3002
847a50fd 3003 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 3004
3005 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 3006 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 3007 card->info.link_type =
3008 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 3009 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
3010 }
4a71df50
FB		 3011 card->options.adp.supported_funcs =
3012 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
3013 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3014}
3015
eb3fb0ba 3016static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 3017 __u32 command, __u32 cmdlen)
3018{
3019 struct qeth_cmd_buffer *iob;
3020 struct qeth_ipa_cmd *cmd;
3021
3022 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3023 QETH_PROT_IPV4);
1aec42bc
TR		 3024 if (iob) {
3025 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3026 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3027 cmd->data.setadapterparms.hdr.command_code = command;
3028 cmd->data.setadapterparms.hdr.used_total = 1;
3029 cmd->data.setadapterparms.hdr.seq_no = 1;
3030 }
4a71df50
FB		 3031
3032 return iob;
3033}
4a71df50
FB		 3034
3035int qeth_query_setadapterparms(struct qeth_card *card)
3036{
3037 int rc;
3038 struct qeth_cmd_buffer *iob;
3039
847a50fd 3040 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3041 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3042 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3043 if (!iob)
3044 return -ENOMEM;
4a71df50
FB		 3045 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3046 return rc;
3047}
3048EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3049
1da74b1c
FB		 3050static int qeth_query_ipassists_cb(struct qeth_card *card,
3051 struct qeth_reply *reply, unsigned long data)
3052{
3053 struct qeth_ipa_cmd *cmd;
3054
3055 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3056
3057 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3058
3059 switch (cmd->hdr.return_code) {
3060 case IPA_RC_NOTSUPP:
3061 case IPA_RC_L2_UNSUPPORTED_CMD:
3062 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3063 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3064 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3065 return -0;
3066 default:
3067 if (cmd->hdr.return_code) {
3068 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3069 "rc=%d\n",
3070 dev_name(&card->gdev->dev),
3071 cmd->hdr.return_code);
3072 return 0;
3073 }
3074 }
3075
1da74b1c
FB		 3076 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3077 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3078 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3079 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3080 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3081 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3082 } else
3083 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3084 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3085 return 0;
3086}
3087
3088int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3089{
3090 int rc;
3091 struct qeth_cmd_buffer *iob;
3092
3093 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3094 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3095 if (!iob)
3096 return -ENOMEM;
1da74b1c
FB		 3097 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3098 return rc;
3099}
3100EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3101
45cbb2e4
SR		 3102static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3103 struct qeth_reply *reply, unsigned long data)
3104{
3105 struct qeth_ipa_cmd *cmd;
3106 struct qeth_switch_info *sw_info;
3107 struct qeth_query_switch_attributes *attrs;
3108
3109 QETH_CARD_TEXT(card, 2, "qswiatcb");
3110 cmd = (struct qeth_ipa_cmd *) data;
3111 sw_info = (struct qeth_switch_info *)reply->param;
3112 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3113 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3114 sw_info->capabilities = attrs->capabilities;
3115 sw_info->settings = attrs->settings;
3116 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3117 sw_info->settings);
3118 }
3119 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3120
3121 return 0;
3122}
3123
3124int qeth_query_switch_attributes(struct qeth_card *card,
3125 struct qeth_switch_info *sw_info)
3126{
3127 struct qeth_cmd_buffer *iob;
3128
3129 QETH_CARD_TEXT(card, 2, "qswiattr");
3130 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3131 return -EOPNOTSUPP;
3132 if (!netif_carrier_ok(card->dev))
3133 return -ENOMEDIUM;
3134 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3135 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3136 if (!iob)
3137 return -ENOMEM;
45cbb2e4
SR		 3138 return qeth_send_ipa_cmd(card, iob,
3139 qeth_query_switch_attributes_cb, sw_info);
3140}
3141EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3142
1da74b1c
FB		 3143static int qeth_query_setdiagass_cb(struct qeth_card *card,
3144 struct qeth_reply *reply, unsigned long data)
3145{
3146 struct qeth_ipa_cmd *cmd;
3147 __u16 rc;
3148
3149 cmd = (struct qeth_ipa_cmd *)data;
3150 rc = cmd->hdr.return_code;
3151 if (rc)
3152 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3153 else
3154 card->info.diagass_support = cmd->data.diagass.ext;
3155 return 0;
3156}
3157
3158static int qeth_query_setdiagass(struct qeth_card *card)
3159{
3160 struct qeth_cmd_buffer *iob;
3161 struct qeth_ipa_cmd *cmd;
3162
3163 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3164 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3165 if (!iob)
3166 return -ENOMEM;
1da74b1c
FB		 3167 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3168 cmd->data.diagass.subcmd_len = 16;
3169 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3170 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3171}
3172
3173static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3174{
3175 unsigned long info = get_zeroed_page(GFP_KERNEL);
3176 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3177 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3178 struct ccw_dev_id ccwid;
caf757c6 3179 int level;
1da74b1c
FB		 3180
3181 tid->chpid = card->info.chpid;
3182 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3183 tid->ssid = ccwid.ssid;
3184 tid->devno = ccwid.devno;
3185 if (!info)
3186 return;
caf757c6
HC		 3187 level = stsi(NULL, 0, 0, 0);
3188 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3189 tid->lparnr = info222->lpar_number;
caf757c6 3190 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3191 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3192 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3193 }
3194 free_page(info);
3195 return;
3196}
3197
3198static int qeth_hw_trap_cb(struct qeth_card *card,
3199 struct qeth_reply *reply, unsigned long data)
3200{
3201 struct qeth_ipa_cmd *cmd;
3202 __u16 rc;
3203
3204 cmd = (struct qeth_ipa_cmd *)data;
3205 rc = cmd->hdr.return_code;
3206 if (rc)
3207 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3208 return 0;
3209}
3210
3211int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3212{
3213 struct qeth_cmd_buffer *iob;
3214 struct qeth_ipa_cmd *cmd;
3215
3216 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3217 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3218 if (!iob)
3219 return -ENOMEM;
1da74b1c
FB		 3220 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3221 cmd->data.diagass.subcmd_len = 80;
3222 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3223 cmd->data.diagass.type = 1;
3224 cmd->data.diagass.action = action;
3225 switch (action) {
3226 case QETH_DIAGS_TRAP_ARM:
3227 cmd->data.diagass.options = 0x0003;
3228 cmd->data.diagass.ext = 0x00010000 +
3229 sizeof(struct qeth_trap_id);
3230 qeth_get_trap_id(card,
3231 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3232 break;
3233 case QETH_DIAGS_TRAP_DISARM:
3234 cmd->data.diagass.options = 0x0001;
3235 break;
3236 case QETH_DIAGS_TRAP_CAPTURE:
3237 break;
3238 }
3239 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3240}
3241EXPORT_SYMBOL_GPL(qeth_hw_trap);
3242
d73ef324
JW		 3243static int qeth_check_qdio_errors(struct qeth_card *card,
3244 struct qdio_buffer *buf,
3245 unsigned int qdio_error,
3246 const char *dbftext)
4a71df50 3247{
779e6e1c 3248 if (qdio_error) {
847a50fd 3249 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3250 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3251 buf->element[15].sflags);
38593d01 3252 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3253 buf->element[14].sflags);
38593d01 3254 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3255 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3256 card->stats.rx_dropped++;
3257 return 0;
3258 } else
3259 return 1;
4a71df50
FB		 3260 }
3261 return 0;
3262}
4a71df50 3263
d73ef324 3264static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3265{
3266 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3267 struct list_head *lh;
4a71df50
FB		 3268 int count;
3269 int i;
3270 int rc;
3271 int newcount = 0;
3272
4a71df50
FB		 3273 count = (index < queue->next_buf_to_init)?
3274 card->qdio.in_buf_pool.buf_count -
3275 (queue->next_buf_to_init - index) :
3276 card->qdio.in_buf_pool.buf_count -
3277 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3278 /* only requeue at a certain threshold to avoid SIGAs */
3279 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3280 for (i = queue->next_buf_to_init;
3281 i < queue->next_buf_to_init + count; ++i) {
3282 if (qeth_init_input_buffer(card,
3283 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3284 break;
3285 } else {
3286 newcount++;
3287 }
3288 }
3289
3290 if (newcount < count) {
3291 /* we are in memory shortage so we switch back to
3292 traditional skb allocation and drop packages */
4a71df50
FB		 3293 atomic_set(&card->force_alloc_skb, 3);
3294 count = newcount;
3295 } else {
4a71df50
FB		 3296 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3297 }
3298
b3332930
FB		 3299 if (!count) {
3300 i = 0;
3301 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3302 i++;
3303 if (i == card->qdio.in_buf_pool.buf_count) {
3304 QETH_CARD_TEXT(card, 2, "qsarbw");
3305 card->reclaim_index = index;
3306 schedule_delayed_work(
3307 &card->buffer_reclaim_work,
3308 QETH_RECLAIM_WORK_TIME);
3309 }
3310 return;
3311 }
3312
4a71df50
FB		 3313 /*
3314 * according to old code it should be avoided to requeue all
3315 * 128 buffers in order to benefit from PCI avoidance.
3316 * this function keeps at least one buffer (the buffer at
3317 * 'index') un-requeued -> this buffer is the first buffer that
3318 * will be requeued the next time
3319 */
3320 if (card->options.performance_stats) {
3321 card->perf_stats.inbound_do_qdio_cnt++;
3322 card->perf_stats.inbound_do_qdio_start_time =
3323 qeth_get_micros();
3324 }
779e6e1c
JG		 3325 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3326 queue->next_buf_to_init, count);
4a71df50
FB		 3327 if (card->options.performance_stats)
3328 card->perf_stats.inbound_do_qdio_time +=
3329 qeth_get_micros() -
3330 card->perf_stats.inbound_do_qdio_start_time;
3331 if (rc) {
847a50fd 3332 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3333 }
3334 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3335 QDIO_MAX_BUFFERS_PER_Q;
3336 }
3337}
d73ef324
JW		 3338
3339static void qeth_buffer_reclaim_work(struct work_struct *work)
3340{
3341 struct qeth_card *card = container_of(work, struct qeth_card,
3342 buffer_reclaim_work.work);
3343
3344 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3345 qeth_queue_input_buffer(card, card->reclaim_index);
3346}
4a71df50 3347
d7a39937 3348static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3349 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3350{
3ec90878 3351 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3352
847a50fd 3353 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3354 if (card->info.type == QETH_CARD_TYPE_IQD) {
3355 if (sbalf15 == 0) {
3356 qdio_err = 0;
3357 } else {
3358 qdio_err = 1;
3359 }
3360 }
76b11f8e 3361 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3362
3363 if (!qdio_err)
d7a39937 3364 return;
d303b6fd
JG		 3365
3366 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3367 return;
d303b6fd 3368
847a50fd
CO		 3369 QETH_CARD_TEXT(card, 1, "lnkfail");
3370 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3371 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3372}
3373
664e42ac
JW		 3374/**
3375 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3376 * @queue: queue to check for packing buffer
3377 *
3378 * Returns number of buffers that were prepared for flush.
3379 */
3380static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3381{
3382 struct qeth_qdio_out_buffer *buffer;
3383
3384 buffer = queue->bufs[queue->next_buf_to_fill];
3385 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3386 (buffer->next_element_to_fill > 0)) {
3387 /* it's a packing buffer */
3388 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3389 queue->next_buf_to_fill =
3390 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3391 return 1;
3392 }
3393 return 0;
3394}
3395
4a71df50
FB		 3396/*
3397 * Switched to packing state if the number of used buffers on a queue
3398 * reaches a certain limit.
3399 */
3400static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3401{
3402 if (!queue->do_pack) {
3403 if (atomic_read(&queue->used_buffers)
3404 >= QETH_HIGH_WATERMARK_PACK){
3405 /* switch non-PACKING -> PACKING */
847a50fd 3406 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3407 if (queue->card->options.performance_stats)
3408 queue->card->perf_stats.sc_dp_p++;
3409 queue->do_pack = 1;
3410 }
3411 }
3412}
3413
3414/*
3415 * Switches from packing to non-packing mode. If there is a packing
3416 * buffer on the queue this buffer will be prepared to be flushed.
3417 * In that case 1 is returned to inform the caller. If no buffer
3418 * has to be flushed, zero is returned.
3419 */
3420static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3421{
4a71df50
FB		 3422 if (queue->do_pack) {
3423 if (atomic_read(&queue->used_buffers)
3424 <= QETH_LOW_WATERMARK_PACK) {
3425 /* switch PACKING -> non-PACKING */
847a50fd 3426 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3427 if (queue->card->options.performance_stats)
3428 queue->card->perf_stats.sc_p_dp++;
3429 queue->do_pack = 0;
664e42ac 3430 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3431 }
3432 }
4a71df50
FB		 3433 return 0;
3434}
3435
779e6e1c
JG		 3436static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3437 int count)
4a71df50
FB		 3438{
3439 struct qeth_qdio_out_buffer *buf;
3440 int rc;
3441 int i;
3442 unsigned int qdio_flags;
3443
4a71df50 3444 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3445 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3446 buf = queue->bufs[bidx];
3ec90878
JG		 3447 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3448 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3449
0da9581d
EL		 3450 if (queue->bufstates)
3451 queue->bufstates[bidx].user = buf;
3452
4a71df50
FB		 3453 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3454 continue;
3455
3456 if (!queue->do_pack) {
3457 if ((atomic_read(&queue->used_buffers) >=
3458 (QETH_HIGH_WATERMARK_PACK -
3459 QETH_WATERMARK_PACK_FUZZ)) &&
3460 !atomic_read(&queue->set_pci_flags_count)) {
3461 /* it's likely that we'll go to packing
3462 * mode soon */
3463 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3464 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3465 }
3466 } else {
3467 if (!atomic_read(&queue->set_pci_flags_count)) {
3468 /*
3469 * there's no outstanding PCI any more, so we
3470 * have to request a PCI to be sure the the PCI
3471 * will wake at some time in the future then we
3472 * can flush packed buffers that might still be
3473 * hanging around, which can happen if no
3474 * further send was requested by the stack
3475 */
3476 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3477 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3478 }
3479 }
3480 }
3481
3e66bab3 3482 netif_trans_update(queue->card->dev);
4a71df50
FB		 3483 if (queue->card->options.performance_stats) {
3484 queue->card->perf_stats.outbound_do_qdio_cnt++;
3485 queue->card->perf_stats.outbound_do_qdio_start_time =
3486 qeth_get_micros();
3487 }
3488 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3489 if (atomic_read(&queue->set_pci_flags_count))
3490 qdio_flags |= QDIO_FLAG_PCI_OUT;
3491 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3492 queue->queue_no, index, count);
4a71df50
FB		 3493 if (queue->card->options.performance_stats)
3494 queue->card->perf_stats.outbound_do_qdio_time +=
3495 qeth_get_micros() -
3496 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3497 atomic_add(count, &queue->used_buffers);
4a71df50 3498 if (rc) {
d303b6fd
JG		 3499 queue->card->stats.tx_errors += count;
3500 /* ignore temporary SIGA errors without busy condition */
1549d13f 3501 if (rc == -ENOBUFS)
d303b6fd 3502 return;
847a50fd 3503 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3504 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3505 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3506 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3507 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3508
4a71df50
FB		 3509 /* this must not happen under normal circumstances. if it
3510 * happens something is really wrong -> recover */
3511 qeth_schedule_recovery(queue->card);
3512 return;
3513 }
4a71df50
FB		 3514 if (queue->card->options.performance_stats)
3515 queue->card->perf_stats.bufs_sent += count;
3516}
3517
3518static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3519{
3520 int index;
3521 int flush_cnt = 0;
3522 int q_was_packing = 0;
3523
3524 /*
3525 * check if weed have to switch to non-packing mode or if
3526 * we have to get a pci flag out on the queue
3527 */
3528 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3529 !atomic_read(&queue->set_pci_flags_count)) {
3530 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3531 QETH_OUT_Q_UNLOCKED) {
3532 /*
3533 * If we get in here, there was no action in
3534 * do_send_packet. So, we check if there is a
3535 * packing buffer to be flushed here.
3536 */
3537 netif_stop_queue(queue->card->dev);
3538 index = queue->next_buf_to_fill;
3539 q_was_packing = queue->do_pack;
3540 /* queue->do_pack may change */
3541 barrier();
3542 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3543 if (!flush_cnt &&
3544 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3545 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3546 if (queue->card->options.performance_stats &&
3547 q_was_packing)
3548 queue->card->perf_stats.bufs_sent_pack +=
3549 flush_cnt;
3550 if (flush_cnt)
779e6e1c 3551 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3552 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3553 }
3554 }
3555}
3556
a1c3ed4c
FB		 3557void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3558 unsigned long card_ptr)
3559{
3560 struct qeth_card *card = (struct qeth_card *)card_ptr;
3561
0cffef48 3562 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3563 napi_schedule(&card->napi);
3564}
3565EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3566
0da9581d
EL		 3567int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3568{
3569 int rc;
3570
3571 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3572 rc = -1;
3573 goto out;
3574 } else {
3575 if (card->options.cq == cq) {
3576 rc = 0;
3577 goto out;
3578 }
3579
3580 if (card->state != CARD_STATE_DOWN &&
3581 card->state != CARD_STATE_RECOVER) {
3582 rc = -1;
3583 goto out;
3584 }
3585
3586 qeth_free_qdio_buffers(card);
3587 card->options.cq = cq;
3588 rc = 0;
3589 }
3590out:
3591 return rc;
3592
3593}
3594EXPORT_SYMBOL_GPL(qeth_configure_cq);
3595
3596
3597static void qeth_qdio_cq_handler(struct qeth_card *card,
3598 unsigned int qdio_err,
3599 unsigned int queue, int first_element, int count) {
3600 struct qeth_qdio_q *cq = card->qdio.c_q;
3601 int i;
3602 int rc;
3603
3604 if (!qeth_is_cq(card, queue))
3605 goto out;
3606
3607 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3608 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3609 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3610
3611 if (qdio_err) {
3612 netif_stop_queue(card->dev);
3613 qeth_schedule_recovery(card);
3614 goto out;
3615 }
3616
3617 if (card->options.performance_stats) {
3618 card->perf_stats.cq_cnt++;
3619 card->perf_stats.cq_start_time = qeth_get_micros();
3620 }
3621
3622 for (i = first_element; i < first_element + count; ++i) {
3623 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3624 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3625 int e;
3626
3627 e = 0;
903e4853
UB		 3628 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3629 buffer->element[e].addr) {
0da9581d
EL		 3630 unsigned long phys_aob_addr;
3631
3632 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3633 qeth_qdio_handle_aob(card, phys_aob_addr);
3634 buffer->element[e].addr = NULL;
3635 buffer->element[e].eflags = 0;
3636 buffer->element[e].sflags = 0;
3637 buffer->element[e].length = 0;
3638
3639 ++e;
3640 }
3641
3642 buffer->element[15].eflags = 0;
3643 buffer->element[15].sflags = 0;
3644 }
3645 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3646 card->qdio.c_q->next_buf_to_init,
3647 count);
3648 if (rc) {
3649 dev_warn(&card->gdev->dev,
3650 "QDIO reported an error, rc=%i\n", rc);
3651 QETH_CARD_TEXT(card, 2, "qcqherr");
3652 }
3653 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3654 + count) % QDIO_MAX_BUFFERS_PER_Q;
3655
3656 netif_wake_queue(card->dev);
3657
3658 if (card->options.performance_stats) {
3659 int delta_t = qeth_get_micros();
3660 delta_t -= card->perf_stats.cq_start_time;
3661 card->perf_stats.cq_time += delta_t;
3662 }
3663out:
3664 return;
3665}
3666
a1c3ed4c 3667void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3668 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3669 unsigned long card_ptr)
3670{
3671 struct qeth_card *card = (struct qeth_card *)card_ptr;
3672
0da9581d
EL		 3673 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3674 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3675
3676 if (qeth_is_cq(card, queue))
3677 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3678 else if (qdio_err)
a1c3ed4c 3679 qeth_schedule_recovery(card);
0da9581d
EL		 3680
3681
a1c3ed4c
FB		 3682}
3683EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3684
779e6e1c
JG		 3685void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3686 unsigned int qdio_error, int __queue, int first_element,
3687 int count, unsigned long card_ptr)
4a71df50
FB		 3688{
3689 struct qeth_card *card = (struct qeth_card *) card_ptr;
3690 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3691 struct qeth_qdio_out_buffer *buffer;
3692 int i;
3693
847a50fd 3694 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3695 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3696 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3697 netif_stop_queue(card->dev);
3698 qeth_schedule_recovery(card);
3699 return;
4a71df50
FB		 3700 }
3701 if (card->options.performance_stats) {
3702 card->perf_stats.outbound_handler_cnt++;
3703 card->perf_stats.outbound_handler_start_time =
3704 qeth_get_micros();
3705 }
3706 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3707 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3708 buffer = queue->bufs[bidx];
b67d801f 3709 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3710
3711 if (queue->bufstates &&
3712 (queue->bufstates[bidx].flags &
3713 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3714 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3715
3716 if (atomic_cmpxchg(&buffer->state,
3717 QETH_QDIO_BUF_PRIMED,
3718 QETH_QDIO_BUF_PENDING) ==
3719 QETH_QDIO_BUF_PRIMED) {
3720 qeth_notify_skbs(queue, buffer,
3721 TX_NOTIFY_PENDING);
3722 }
0da9581d
EL		 3723 buffer->aob = queue->bufstates[bidx].aob;
3724 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3725 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3726 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3727 virt_to_phys(buffer->aob));
b3332930
FB		 3728 if (qeth_init_qdio_out_buf(queue, bidx)) {
3729 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3730 qeth_schedule_recovery(card);
b3332930 3731 }
0da9581d 3732 } else {
b3332930
FB		 3733 if (card->options.cq == QETH_CQ_ENABLED) {
3734 enum iucv_tx_notify n;
3735
3736 n = qeth_compute_cq_notification(
3737 buffer->buffer->element[15].sflags, 0);
3738 qeth_notify_skbs(queue, buffer, n);
3739 }
3740
0da9581d
EL		 3741 qeth_clear_output_buffer(queue, buffer,
3742 QETH_QDIO_BUF_EMPTY);
3743 }
3744 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3745 }
3746 atomic_sub(count, &queue->used_buffers);
3747 /* check if we need to do something on this outbound queue */
3748 if (card->info.type != QETH_CARD_TYPE_IQD)
3749 qeth_check_outbound_queue(queue);
3750
3751 netif_wake_queue(queue->card->dev);
3752 if (card->options.performance_stats)
3753 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3754 card->perf_stats.outbound_handler_start_time;
3755}
3756EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3757
70deb016
HW		 3758/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3759static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3760{
3761 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3762 return 2;
3763 return queue_num;
3764}
3765
290b8348
SR		 3766/**
3767 * Note: Function assumes that we have 4 outbound queues.
3768 */
4a71df50
FB		 3769int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3770 int ipv, int cast_type)
3771{
d66cb37e 3772 __be16 *tci;
290b8348
SR		 3773 u8 tos;
3774
290b8348
SR		 3775 if (cast_type && card->info.is_multicast_different)
3776 return card->info.is_multicast_different &
3777 (card->qdio.no_out_queues - 1);
3778
3779 switch (card->qdio.do_prio_queueing) {
3780 case QETH_PRIO_Q_ING_TOS:
3781 case QETH_PRIO_Q_ING_PREC:
3782 switch (ipv) {
3783 case 4:
3784 tos = ipv4_get_dsfield(ip_hdr(skb));
3785 break;
3786 case 6:
3787 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3788 break;
3789 default:
3790 return card->qdio.default_out_queue;
4a71df50 3791 }
290b8348 3792 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3793 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3794 if (tos & IPTOS_MINCOST)
70deb016 3795 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3796 if (tos & IPTOS_RELIABILITY)
3797 return 2;
3798 if (tos & IPTOS_THROUGHPUT)
3799 return 1;
3800 if (tos & IPTOS_LOWDELAY)
3801 return 0;
d66cb37e
SR		 3802 break;
3803 case QETH_PRIO_Q_ING_SKB:
3804 if (skb->priority > 5)
3805 return 0;
70deb016 3806 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3807 case QETH_PRIO_Q_ING_VLAN:
3808 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3809 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3810 return qeth_cut_iqd_prio(card,
3811 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3812 break;
4a71df50 3813 default:
290b8348 3814 break;
4a71df50 3815 }
290b8348 3816 return card->qdio.default_out_queue;
4a71df50
FB		 3817}
3818EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3819
2863c613
EC		 3820/**
3821 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3822 * @skb: SKB address
3823 *
3824 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3825 * fragmented part of the SKB. Returns zero for linear SKB.
3826 */
271648b4
FB		 3827int qeth_get_elements_for_frags(struct sk_buff *skb)
3828{
2863c613 3829 int cnt, elements = 0;
271648b4
FB		 3830
3831 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3832 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3833
3834 elements += qeth_get_elements_for_range(
3835 (addr_t)skb_frag_address(frag),
3836 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3837 }
3838 return elements;
3839}
3840EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3841
2863c613
EC		 3842/**
3843 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3844 * @card: qeth card structure, to check max. elems.
3845 * @skb: SKB address
3846 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3847 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3848 *
3849 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3850 * skb data, including linear part and fragments. Checks if the result plus
3851 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3852 * Note: extra_elems is not included in the returned result.
3853 */
065cc782 3854int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3855 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3856{
2863c613 3857 int elements = qeth_get_elements_for_range(
7d969d2e 3858 (addr_t)skb->data + data_offset,
2863c613
EC		 3859 (addr_t)skb->data + skb_headlen(skb)) +
3860 qeth_get_elements_for_frags(skb);
4a71df50 3861
2863c613 3862 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3863 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3864 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3865 elements + extra_elems, skb->len);
4a71df50
FB		 3866 return 0;
3867 }
2863c613 3868 return elements;
4a71df50
FB		 3869}
3870EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3871
d4ae1f5e 3872int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3873{
3874 int hroom, inpage, rest;
3875
3876 if (((unsigned long)skb->data & PAGE_MASK) !=
3877 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3878 hroom = skb_headroom(skb);
3879 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3880 rest = len - inpage;
3881 if (rest > hroom)
3882 return 1;
2863c613 3883 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3884 skb->data -= rest;
d4ae1f5e
SR		 3885 skb->tail -= rest;
3886 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3887 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3888 }
3889 return 0;
3890}
3891EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3892
cef6ff22
JW		 3893static void __qeth_fill_buffer(struct sk_buff *skb,
3894 struct qeth_qdio_out_buffer *buf,
3895 bool is_first_elem, unsigned int offset)
4a71df50 3896{
384d2ef1
JW		 3897 struct qdio_buffer *buffer = buf->buffer;
3898 int element = buf->next_element_to_fill;
cc309f83
JW		 3899 int length = skb_headlen(skb) - offset;
3900 char *data = skb->data + offset;
384d2ef1 3901 int length_here, cnt;
4a71df50 3902
cc309f83 3903 /* map linear part into buffer element(s) */
4a71df50
FB		 3904 while (length > 0) {
3905 /* length_here is the remaining amount of data in this page */
3906 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3907 if (length < length_here)
3908 length_here = length;
3909
3910 buffer->element[element].addr = data;
3911 buffer->element[element].length = length_here;
3912 length -= length_here;
384d2ef1
JW		 3913 if (is_first_elem) {
3914 is_first_elem = false;
5258830b
JW		 3915 if (length || skb_is_nonlinear(skb))
3916 /* skb needs additional elements */
3ec90878 3917 buffer->element[element].eflags =
5258830b 3918 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3919 else
5258830b
JW		 3920 buffer->element[element].eflags = 0;
3921 } else {
3922 buffer->element[element].eflags =
3923 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3924 }
3925 data += length_here;
3926 element++;
4a71df50 3927 }
51aa165c 3928
cc309f83 3929 /* map page frags into buffer element(s) */
51aa165c 3930 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3931 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3932
3933 data = skb_frag_address(frag);
3934 length = skb_frag_size(frag);
271648b4
FB		 3935 while (length > 0) {
3936 length_here = PAGE_SIZE -
3937 ((unsigned long) data % PAGE_SIZE);
3938 if (length < length_here)
3939 length_here = length;
3940
3941 buffer->element[element].addr = data;
3942 buffer->element[element].length = length_here;
3943 buffer->element[element].eflags =
3944 SBAL_EFLAGS_MIDDLE_FRAG;
3945 length -= length_here;
3946 data += length_here;
3947 element++;
3948 }
51aa165c
FB		 3949 }
3950
3ec90878
JG		 3951 if (buffer->element[element - 1].eflags)
3952 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3953 buf->next_element_to_fill = element;
4a71df50
FB		 3954}
3955
cef6ff22
JW		 3956static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3957 struct qeth_qdio_out_buffer *buf,
3958 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3959 unsigned int offset, unsigned int hd_len)
4a71df50
FB		 3960{
3961 struct qdio_buffer *buffer;
384d2ef1 3962 bool is_first_elem = true;
13ddacb5 3963 int flush_cnt = 0;
4a71df50 3964
4a71df50 3965 buffer = buf->buffer;
63354797 3966 refcount_inc(&skb->users);
4a71df50
FB		 3967 skb_queue_tail(&buf->skb_list, skb);
3968
683d718a 3969 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50 3970 int element = buf->next_element_to_fill;
384d2ef1 3971 is_first_elem = false;
4a71df50 3972
4a71df50
FB		 3973 /*fill first buffer entry only with header information */
3974 buffer->element[element].addr = skb->data;
13ddacb5 3975 buffer->element[element].length = hd_len;
3ec90878 3976 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3977 buf->next_element_to_fill++;
cc309f83 3978 /* IQD */
9c3bfda9 3979 } else if (offset) {
683d718a 3980 int element = buf->next_element_to_fill;
384d2ef1
JW		 3981 is_first_elem = false;
3982
683d718a
FB		 3983 buffer->element[element].addr = hdr;
3984 buffer->element[element].length = sizeof(struct qeth_hdr) +
3985 hd_len;
3ec90878 3986 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3987 buf->is_header[element] = 1;
3988 buf->next_element_to_fill++;
3989 }
3990
384d2ef1 3991 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3992
3993 if (!queue->do_pack) {
847a50fd 3994 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3995 /* set state to PRIMED -> will be flushed */
3996 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3997 flush_cnt = 1;
3998 } else {
847a50fd 3999 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4000 if (queue->card->options.performance_stats)
4001 queue->card->perf_stats.skbs_sent_pack++;
4002 if (buf->next_element_to_fill >=
4003 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4004 /*
4005 * packed buffer if full -> set state PRIMED
4006 * -> will be flushed
4007 */
4008 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4009 flush_cnt = 1;
4010 }
4011 }
4012 return flush_cnt;
4013}
4014
4015int qeth_do_send_packet_fast(struct qeth_card *card,
cc309f83
JW		 4016 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4017 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4018 unsigned int hd_len)
4a71df50
FB		 4019{
4020 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 4021 int index;
4022
4a71df50
FB		 4023 /* spin until we get the queue ... */
4024 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4025 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4026 /* ... now we've got the queue */
4027 index = queue->next_buf_to_fill;
0da9581d 4028 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4029 /*
4030 * check if buffer is empty to make sure that we do not 'overtake'
4031 * ourselves and try to fill a buffer that is already primed
4032 */
4033 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4034 goto out;
64ef8957 4035 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4036 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4037 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4038 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4039 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4040 return 0;
4041out:
4042 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4043 return -EBUSY;
4044}
4045EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4046
4047int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4048 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4049 unsigned int offset, unsigned int hd_len,
4050 int elements_needed)
4a71df50
FB		 4051{
4052 struct qeth_qdio_out_buffer *buffer;
4053 int start_index;
4054 int flush_count = 0;
4055 int do_pack = 0;
4056 int tmp;
4057 int rc = 0;
4058
4a71df50
FB		 4059 /* spin until we get the queue ... */
4060 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4061 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4062 start_index = queue->next_buf_to_fill;
0da9581d 4063 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4064 /*
4065 * check if buffer is empty to make sure that we do not 'overtake'
4066 * ourselves and try to fill a buffer that is already primed
4067 */
4068 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4069 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4070 return -EBUSY;
4071 }
4072 /* check if we need to switch packing state of this queue */
4073 qeth_switch_to_packing_if_needed(queue);
4074 if (queue->do_pack) {
4075 do_pack = 1;
64ef8957
FB		 4076 /* does packet fit in current buffer? */
4077 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4078 buffer->next_element_to_fill) < elements_needed) {
4079 /* ... no -> set state PRIMED */
4080 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4081 flush_count++;
4082 queue->next_buf_to_fill =
4083 (queue->next_buf_to_fill + 1) %
4084 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4085 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4086 /* we did a step forward, so check buffer state
4087 * again */
4088 if (atomic_read(&buffer->state) !=
4089 QETH_QDIO_BUF_EMPTY) {
4090 qeth_flush_buffers(queue, start_index,
779e6e1c 4091 flush_count);
64ef8957 4092 atomic_set(&queue->state,
4a71df50 4093 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4094 rc = -EBUSY;
4095 goto out;
4a71df50
FB		 4096 }
4097 }
4098 }
9c3bfda9 4099 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4100 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4101 QDIO_MAX_BUFFERS_PER_Q;
4102 flush_count += tmp;
4a71df50 4103 if (flush_count)
779e6e1c 4104 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4105 else if (!atomic_read(&queue->set_pci_flags_count))
4106 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4107 /*
4108 * queue->state will go from LOCKED -> UNLOCKED or from
4109 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4110 * (switch packing state or flush buffer to get another pci flag out).
4111 * In that case we will enter this loop
4112 */
4113 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4114 start_index = queue->next_buf_to_fill;
4115 /* check if we can go back to non-packing state */
3cdc8a25 4116 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4117 /*
4118 * check if we need to flush a packing buffer to get a pci
4119 * flag out on the queue
4120 */
3cdc8a25
JW		 4121 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4122 tmp = qeth_prep_flush_pack_buffer(queue);
4123 if (tmp) {
4124 qeth_flush_buffers(queue, start_index, tmp);
4125 flush_count += tmp;
4126 }
4a71df50 4127 }
3cdc8a25 4128out:
4a71df50
FB		 4129 /* at this point the queue is UNLOCKED again */
4130 if (queue->card->options.performance_stats && do_pack)
4131 queue->card->perf_stats.bufs_sent_pack += flush_count;
4132
4133 return rc;
4134}
4135EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4136
4137static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4138 struct qeth_reply *reply, unsigned long data)
4139{
4140 struct qeth_ipa_cmd *cmd;
4141 struct qeth_ipacmd_setadpparms *setparms;
4142
847a50fd 4143 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4144
4145 cmd = (struct qeth_ipa_cmd *) data;
4146 setparms = &(cmd->data.setadapterparms);
4147
4148 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4149 if (cmd->hdr.return_code) {
8a593148 4150 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4151 setparms->data.mode = SET_PROMISC_MODE_OFF;
4152 }
4153 card->info.promisc_mode = setparms->data.mode;
4154 return 0;
4155}
4156
4157void qeth_setadp_promisc_mode(struct qeth_card *card)
4158{
4159 enum qeth_ipa_promisc_modes mode;
4160 struct net_device *dev = card->dev;
4161 struct qeth_cmd_buffer *iob;
4162 struct qeth_ipa_cmd *cmd;
4163
847a50fd 4164 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4165
4166 if (((dev->flags & IFF_PROMISC) &&
4167 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4168 (!(dev->flags & IFF_PROMISC) &&
4169 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4170 return;
4171 mode = SET_PROMISC_MODE_OFF;
4172 if (dev->flags & IFF_PROMISC)
4173 mode = SET_PROMISC_MODE_ON;
847a50fd 4174 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4175
4176 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4177 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4178 if (!iob)
4179 return;
4a71df50
FB		 4180 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4181 cmd->data.setadapterparms.data.mode = mode;
4182 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4183}
4184EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4185
4186int qeth_change_mtu(struct net_device *dev, int new_mtu)
4187{
4188 struct qeth_card *card;
4189 char dbf_text[15];
4190
509e2562 4191 card = dev->ml_priv;
4a71df50 4192
847a50fd 4193 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4194 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4195 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4196
4845b93f 4197 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4198 return -EINVAL;
4199 dev->mtu = new_mtu;
4200 return 0;
4201}
4202EXPORT_SYMBOL_GPL(qeth_change_mtu);
4203
4204struct net_device_stats *qeth_get_stats(struct net_device *dev)
4205{
4206 struct qeth_card *card;
4207
509e2562 4208 card = dev->ml_priv;
4a71df50 4209
847a50fd 4210 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4211
4212 return &card->stats;
4213}
4214EXPORT_SYMBOL_GPL(qeth_get_stats);
4215
4216static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4217 struct qeth_reply *reply, unsigned long data)
4218{
4219 struct qeth_ipa_cmd *cmd;
4220
847a50fd 4221 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4222
4223 cmd = (struct qeth_ipa_cmd *) data;
4224 if (!card->options.layer2 ||
4225 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4226 memcpy(card->dev->dev_addr,
4227 &cmd->data.setadapterparms.data.change_addr.addr,
4228 OSA_ADDR_LEN);
4229 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4230 }
4231 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4232 return 0;
4233}
4234
4235int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4236{
4237 int rc;
4238 struct qeth_cmd_buffer *iob;
4239 struct qeth_ipa_cmd *cmd;
4240
847a50fd 4241 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4242
4243 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4244 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4245 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4246 if (!iob)
4247 return -ENOMEM;
4a71df50
FB		 4248 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4249 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4250 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4251 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4252 card->dev->dev_addr, OSA_ADDR_LEN);
4253 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4254 NULL);
4255 return rc;
4256}
4257EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4258
d64ecc22
EL		 4259static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4260 struct qeth_reply *reply, unsigned long data)
4261{
4262 struct qeth_ipa_cmd *cmd;
4263 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4264 int fallback = *(int *)reply->param;
d64ecc22 4265
847a50fd 4266 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4267
4268 cmd = (struct qeth_ipa_cmd *) data;
4269 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4270 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4271 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4272 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4273 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4274 if (cmd->data.setadapterparms.hdr.return_code !=
4275 SET_ACCESS_CTRL_RC_SUCCESS)
4276 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4277 card->gdev->dev.kobj.name,
4278 access_ctrl_req->subcmd_code,
4279 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4280 switch (cmd->data.setadapterparms.hdr.return_code) {
4281 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4282 if (card->options.isolation == ISOLATION_MODE_NONE) {
4283 dev_info(&card->gdev->dev,
4284 "QDIO data connection isolation is deactivated\n");
4285 } else {
4286 dev_info(&card->gdev->dev,
4287 "QDIO data connection isolation is activated\n");
4288 }
d64ecc22 4289 break;
0f54761d
SR		 4290 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4291 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4292 "deactivated\n", dev_name(&card->gdev->dev));
4293 if (fallback)
4294 card->options.isolation = card->options.prev_isolation;
4295 break;
4296 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4297 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4298 " activated\n", dev_name(&card->gdev->dev));
4299 if (fallback)
4300 card->options.isolation = card->options.prev_isolation;
4301 break;
d64ecc22 4302 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4303 dev_err(&card->gdev->dev, "Adapter does not "
4304 "support QDIO data connection isolation\n");
d64ecc22 4305 break;
d64ecc22 4306 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4307 dev_err(&card->gdev->dev,
4308 "Adapter is dedicated. "
4309 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4310 if (fallback)
4311 card->options.isolation = card->options.prev_isolation;
d64ecc22 4312 break;
d64ecc22 4313 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4314 dev_err(&card->gdev->dev,
4315 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4316 if (fallback)
4317 card->options.isolation = card->options.prev_isolation;
4318 break;
4319 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4320 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4321 "support reflective relay mode\n");
4322 if (fallback)
4323 card->options.isolation = card->options.prev_isolation;
4324 break;
4325 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4326 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4327 "enabled at the adjacent switch port");
4328 if (fallback)
4329 card->options.isolation = card->options.prev_isolation;
4330 break;
4331 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4332 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4333 "at the adjacent switch failed\n");
d64ecc22 4334 break;
d64ecc22 4335 default:
d64ecc22 4336 /* this should never happen */
0f54761d
SR		 4337 if (fallback)
4338 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4339 break;
4340 }
d64ecc22 4341 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4342 return 0;
d64ecc22
EL		 4343}
4344
4345static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4346 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4347{
4348 int rc;
4349 struct qeth_cmd_buffer *iob;
4350 struct qeth_ipa_cmd *cmd;
4351 struct qeth_set_access_ctrl *access_ctrl_req;
4352
847a50fd 4353 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4354
4355 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4356 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4357
4358 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4359 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4360 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4361 if (!iob)
4362 return -ENOMEM;
d64ecc22
EL		 4363 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4364 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4365 access_ctrl_req->subcmd_code = isolation;
4366
4367 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4368 &fallback);
d64ecc22
EL		 4369 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4370 return rc;
4371}
4372
0f54761d 4373int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4374{
4375 int rc = 0;
4376
847a50fd 4377 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4378
5113fec0
UB		 4379 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4380 card->info.type == QETH_CARD_TYPE_OSX) &&
4381 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4382 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4383 card->options.isolation, fallback);
d64ecc22
EL		 4384 if (rc) {
4385 QETH_DBF_MESSAGE(3,
5113fec0 4386 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4387 card->gdev->dev.kobj.name,
4388 rc);
0f54761d 4389 rc = -EOPNOTSUPP;
d64ecc22
EL		 4390 }
4391 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4392 card->options.isolation = ISOLATION_MODE_NONE;
4393
4394 dev_err(&card->gdev->dev, "Adapter does not "
4395 "support QDIO data connection isolation\n");
4396 rc = -EOPNOTSUPP;
4397 }
4398 return rc;
4399}
4400EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4401
4a71df50
FB		 4402void qeth_tx_timeout(struct net_device *dev)
4403{
4404 struct qeth_card *card;
4405
509e2562 4406 card = dev->ml_priv;
847a50fd 4407 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4408 card->stats.tx_errors++;
4409 qeth_schedule_recovery(card);
4410}
4411EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4412
942d6984 4413static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4414{
509e2562 4415 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4416 int rc = 0;
4417
4418 switch (regnum) {
4419 case MII_BMCR: /* Basic mode control register */
4420 rc = BMCR_FULLDPLX;
4421 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4422 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4423 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4424 rc |= BMCR_SPEED100;
4425 break;
4426 case MII_BMSR: /* Basic mode status register */
4427 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4428 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4429 BMSR_100BASE4;
4430 break;
4431 case MII_PHYSID1: /* PHYS ID 1 */
4432 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4433 dev->dev_addr[2];
4434 rc = (rc >> 5) & 0xFFFF;
4435 break;
4436 case MII_PHYSID2: /* PHYS ID 2 */
4437 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4438 break;
4439 case MII_ADVERTISE: /* Advertisement control reg */
4440 rc = ADVERTISE_ALL;
4441 break;
4442 case MII_LPA: /* Link partner ability reg */
4443 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4444 LPA_100BASE4 | LPA_LPACK;
4445 break;
4446 case MII_EXPANSION: /* Expansion register */
4447 break;
4448 case MII_DCOUNTER: /* disconnect counter */
4449 break;
4450 case MII_FCSCOUNTER: /* false carrier counter */
4451 break;
4452 case MII_NWAYTEST: /* N-way auto-neg test register */
4453 break;
4454 case MII_RERRCOUNTER: /* rx error counter */
4455 rc = card->stats.rx_errors;
4456 break;
4457 case MII_SREVISION: /* silicon revision */
4458 break;
4459 case MII_RESV1: /* reserved 1 */
4460 break;
4461 case MII_LBRERROR: /* loopback, rx, bypass error */
4462 break;
4463 case MII_PHYADDR: /* physical address */
4464 break;
4465 case MII_RESV2: /* reserved 2 */
4466 break;
4467 case MII_TPISTATUS: /* TPI status for 10mbps */
4468 break;
4469 case MII_NCONFIG: /* network interface config */
4470 break;
4471 default:
4472 break;
4473 }
4474 return rc;
4475}
4a71df50
FB		 4476
4477static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4478 struct qeth_cmd_buffer *iob, int len,
4479 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4480 unsigned long),
4481 void *reply_param)
4482{
4483 u16 s1, s2;
4484
847a50fd 4485 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4486
4487 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4488 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4489 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4490 /* adjust PDU length fields in IPA_PDU_HEADER */
4491 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4492 s2 = (u32) len;
4493 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4494 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4495 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4496 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4497 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4498 reply_cb, reply_param);
4499}
4500
4501static int qeth_snmp_command_cb(struct qeth_card *card,
4502 struct qeth_reply *reply, unsigned long sdata)
4503{
4504 struct qeth_ipa_cmd *cmd;
4505 struct qeth_arp_query_info *qinfo;
4506 struct qeth_snmp_cmd *snmp;
4507 unsigned char *data;
4508 __u16 data_len;
4509
847a50fd 4510 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4511
4512 cmd = (struct qeth_ipa_cmd *) sdata;
4513 data = (unsigned char *)((char *)cmd - reply->offset);
4514 qinfo = (struct qeth_arp_query_info *) reply->param;
4515 snmp = &cmd->data.setadapterparms.data.snmp;
4516
4517 if (cmd->hdr.return_code) {
8a593148 4518 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4519 return 0;
4520 }
4521 if (cmd->data.setadapterparms.hdr.return_code) {
4522 cmd->hdr.return_code =
4523 cmd->data.setadapterparms.hdr.return_code;
8a593148 4524 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4525 return 0;
4526 }
4527 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4528 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4529 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4530 else
4531 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4532
4533 /* check if there is enough room in userspace */
4534 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4535 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4536 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4537 return 0;
4538 }
847a50fd 4539 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4540 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4541 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4542 cmd->data.setadapterparms.hdr.seq_no);
4543 /*copy entries to user buffer*/
4544 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4545 memcpy(qinfo->udata + qinfo->udata_offset,
4546 (char *)snmp,
4547 data_len + offsetof(struct qeth_snmp_cmd, data));
4548 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4549 } else {
4550 memcpy(qinfo->udata + qinfo->udata_offset,
4551 (char *)&snmp->request, data_len);
4552 }
4553 qinfo->udata_offset += data_len;
4554 /* check if all replies received ... */
847a50fd 4555 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4556 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4557 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4558 cmd->data.setadapterparms.hdr.seq_no);
4559 if (cmd->data.setadapterparms.hdr.seq_no <
4560 cmd->data.setadapterparms.hdr.used_total)
4561 return 1;
4562 return 0;
4563}
4564
942d6984 4565static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4566{
4567 struct qeth_cmd_buffer *iob;
4568 struct qeth_ipa_cmd *cmd;
4569 struct qeth_snmp_ureq *ureq;
6fb392b1 4570 unsigned int req_len;
4a71df50
FB		 4571 struct qeth_arp_query_info qinfo = {0, };
4572 int rc = 0;
4573
847a50fd 4574 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4575
4576 if (card->info.guestlan)
4577 return -EOPNOTSUPP;
4578
4579 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4580 (!card->options.layer2)) {
4a71df50
FB		 4581 return -EOPNOTSUPP;
4582 }
4583 /* skip 4 bytes (data_len struct member) to get req_len */
4584 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4585 return -EFAULT;
6fb392b1
UB		 4586 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4587 sizeof(struct qeth_ipacmd_hdr) -
4588 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4589 return -EINVAL;
4986f3f0
JL		 4590 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4591 if (IS_ERR(ureq)) {
847a50fd 4592 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4593 return PTR_ERR(ureq);
4a71df50
FB		 4594 }
4595 qinfo.udata_len = ureq->hdr.data_len;
4596 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4597 if (!qinfo.udata) {
4598 kfree(ureq);
4599 return -ENOMEM;
4600 }
4601 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4602
4603 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4604 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4605 if (!iob) {
4606 rc = -ENOMEM;
4607 goto out;
4608 }
4a71df50
FB		 4609 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4610 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4611 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4612 qeth_snmp_command_cb, (void *)&qinfo);
4613 if (rc)
14cc21b6 4614 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4615 QETH_CARD_IFNAME(card), rc);
4616 else {
4617 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4618 rc = -EFAULT;
4619 }
1aec42bc 4620out:
4a71df50
FB		 4621 kfree(ureq);
4622 kfree(qinfo.udata);
4623 return rc;
4624}
4a71df50 4625
c3ab96f3
FB		 4626static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4627 struct qeth_reply *reply, unsigned long data)
4628{
4629 struct qeth_ipa_cmd *cmd;
4630 struct qeth_qoat_priv *priv;
4631 char *resdata;
4632 int resdatalen;
4633
4634 QETH_CARD_TEXT(card, 3, "qoatcb");
4635
4636 cmd = (struct qeth_ipa_cmd *)data;
4637 priv = (struct qeth_qoat_priv *)reply->param;
4638 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4639 resdata = (char *)data + 28;
4640
4641 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4642 cmd->hdr.return_code = IPA_RC_FFFF;
4643 return 0;
4644 }
4645
4646 memcpy((priv->buffer + priv->response_len), resdata,
4647 resdatalen);
4648 priv->response_len += resdatalen;
4649
4650 if (cmd->data.setadapterparms.hdr.seq_no <
4651 cmd->data.setadapterparms.hdr.used_total)
4652 return 1;
4653 return 0;
4654}
4655
942d6984 4656static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4657{
4658 int rc = 0;
4659 struct qeth_cmd_buffer *iob;
4660 struct qeth_ipa_cmd *cmd;
4661 struct qeth_query_oat *oat_req;
4662 struct qeth_query_oat_data oat_data;
4663 struct qeth_qoat_priv priv;
4664 void __user *tmp;
4665
4666 QETH_CARD_TEXT(card, 3, "qoatcmd");
4667
4668 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4669 rc = -EOPNOTSUPP;
4670 goto out;
4671 }
4672
4673 if (copy_from_user(&oat_data, udata,
4674 sizeof(struct qeth_query_oat_data))) {
4675 rc = -EFAULT;
4676 goto out;
4677 }
4678
4679 priv.buffer_len = oat_data.buffer_len;
4680 priv.response_len = 0;
4681 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4682 if (!priv.buffer) {
4683 rc = -ENOMEM;
4684 goto out;
4685 }
4686
4687 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4688 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4689 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4690 if (!iob) {
4691 rc = -ENOMEM;
4692 goto out_free;
4693 }
c3ab96f3
FB		 4694 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4695 oat_req = &cmd->data.setadapterparms.data.query_oat;
4696 oat_req->subcmd_code = oat_data.command;
4697
4698 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4699 &priv);
4700 if (!rc) {
4701 if (is_compat_task())
4702 tmp = compat_ptr(oat_data.ptr);
4703 else
4704 tmp = (void __user *)(unsigned long)oat_data.ptr;
4705
4706 if (copy_to_user(tmp, priv.buffer,
4707 priv.response_len)) {
4708 rc = -EFAULT;
4709 goto out_free;
4710 }
4711
4712 oat_data.response_len = priv.response_len;
4713
4714 if (copy_to_user(udata, &oat_data,
4715 sizeof(struct qeth_query_oat_data)))
4716 rc = -EFAULT;
4717 } else
4718 if (rc == IPA_RC_FFFF)
4719 rc = -EFAULT;
4720
4721out_free:
4722 kfree(priv.buffer);
4723out:
4724 return rc;
4725}
c3ab96f3 4726
e71e4072
HC		 4727static int qeth_query_card_info_cb(struct qeth_card *card,
4728 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4729{
4730 struct qeth_ipa_cmd *cmd;
4731 struct qeth_query_card_info *card_info;
4732 struct carrier_info *carrier_info;
4733
4734 QETH_CARD_TEXT(card, 2, "qcrdincb");
4735 carrier_info = (struct carrier_info *)reply->param;
4736 cmd = (struct qeth_ipa_cmd *)data;
4737 card_info = &cmd->data.setadapterparms.data.card_info;
4738 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4739 carrier_info->card_type = card_info->card_type;
4740 carrier_info->port_mode = card_info->port_mode;
4741 carrier_info->port_speed = card_info->port_speed;
4742 }
4743
4744 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4745 return 0;
4746}
4747
bca51650 4748static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4749 struct carrier_info *carrier_info)
4750{
4751 struct qeth_cmd_buffer *iob;
4752
4753 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4754 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4755 return -EOPNOTSUPP;
4756 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4757 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4758 if (!iob)
4759 return -ENOMEM;
02d5cb5b
EC		 4760 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4761 (void *)carrier_info);
4762}
02d5cb5b 4763
ec61bd2f
JW		 4764/**
4765 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4766 * @card: pointer to a qeth_card
4767 *
4768 * Returns
4769 * 0, if a MAC address has been set for the card's netdevice
4770 * a return code, for various error conditions
4771 */
4772int qeth_vm_request_mac(struct qeth_card *card)
4773{
4774 struct diag26c_mac_resp *response;
4775 struct diag26c_mac_req *request;
4776 struct ccw_dev_id id;
4777 int rc;
4778
4779 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4780
4781 if (!card->dev)
4782 return -ENODEV;
4783
4784 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4785 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4786 if (!request || !response) {
4787 rc = -ENOMEM;
4788 goto out;
4789 }
4790
4791 ccw_device_get_id(CARD_DDEV(card), &id);
4792 request->resp_buf_len = sizeof(*response);
4793 request->resp_version = DIAG26C_VERSION2;
4794 request->op_code = DIAG26C_GET_MAC;
4795 request->devno = id.devno;
4796
4797 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
4798 if (rc)
4799 goto out;
4800
4801 if (request->resp_buf_len < sizeof(*response) ||
4802 response->version != request->resp_version) {
4803 rc = -EIO;
4804 QETH_DBF_TEXT(SETUP, 2, "badresp");
4805 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4806 sizeof(request->resp_buf_len));
4807 } else if (!is_valid_ether_addr(response->mac)) {
4808 rc = -EINVAL;
4809 QETH_DBF_TEXT(SETUP, 2, "badmac");
4810 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4811 } else {
4812 ether_addr_copy(card->dev->dev_addr, response->mac);
4813 }
4814
4815out:
4816 kfree(response);
4817 kfree(request);
4818 return rc;
4819}
4820EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4821
cef6ff22 4822static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4823{
aa59004b
JW		 4824 if (card->info.type == QETH_CARD_TYPE_IQD)
4825 return QDIO_IQDIO_QFMT;
4826 else
4827 return QDIO_QETH_QFMT;
4a71df50
FB		 4828}
4829
d0ff1f52
UB		 4830static void qeth_determine_capabilities(struct qeth_card *card)
4831{
4832 int rc;
4833 int length;
4834 char *prcd;
4835 struct ccw_device *ddev;
4836 int ddev_offline = 0;
4837
4838 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4839 ddev = CARD_DDEV(card);
4840 if (!ddev->online) {
4841 ddev_offline = 1;
4842 rc = ccw_device_set_online(ddev);
4843 if (rc) {
4844 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4845 goto out;
4846 }
4847 }
4848
4849 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4850 if (rc) {
4851 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4852 dev_name(&card->gdev->dev), rc);
4853 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4854 goto out_offline;
4855 }
4856 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4857 if (ddev_offline)
4858 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4859 kfree(prcd);
4860
4861 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4862 if (rc)
4863 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4864
0da9581d 4865 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4866 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4867 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4868 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4869 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4870 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4871 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4872 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4873 dev_info(&card->gdev->dev,
4874 "Completion Queueing supported\n");
4875 } else {
4876 card->options.cq = QETH_CQ_NOTAVAILABLE;
4877 }
4878
4879
d0ff1f52
UB		 4880out_offline:
4881 if (ddev_offline == 1)
4882 ccw_device_set_offline(ddev);
4883out:
4884 return;
4885}
4886
cef6ff22
JW		 4887static void qeth_qdio_establish_cq(struct qeth_card *card,
4888 struct qdio_buffer **in_sbal_ptrs,
4889 void (**queue_start_poll)
4890 (struct ccw_device *, int,
4891 unsigned long))
4892{
0da9581d
EL		 4893 int i;
4894
4895 if (card->options.cq == QETH_CQ_ENABLED) {
4896 int offset = QDIO_MAX_BUFFERS_PER_Q *
4897 (card->qdio.no_in_queues - 1);
4898 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4899 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4900 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4901 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4902 }
4903
4904 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4905 }
4906}
4907
4a71df50
FB		 4908static int qeth_qdio_establish(struct qeth_card *card)
4909{
4910 struct qdio_initialize init_data;
4911 char *qib_param_field;
4912 struct qdio_buffer **in_sbal_ptrs;
104ea556 4913 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4914 struct qdio_buffer **out_sbal_ptrs;
4915 int i, j, k;
4916 int rc = 0;
4917
d11ba0c4 4918 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4919
4920 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4921 GFP_KERNEL);
104ea556 4922 if (!qib_param_field) {
4923 rc = -ENOMEM;
4924 goto out_free_nothing;
4925 }
4a71df50
FB		 4926
4927 qeth_create_qib_param_field(card, qib_param_field);
4928 qeth_create_qib_param_field_blkt(card, qib_param_field);
4929
b3332930 4930 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4931 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4932 GFP_KERNEL);
4933 if (!in_sbal_ptrs) {
104ea556 4934 rc = -ENOMEM;
4935 goto out_free_qib_param;
4a71df50 4936 }
0da9581d 4937 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4938 in_sbal_ptrs[i] = (struct qdio_buffer *)
4939 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4940 }
4a71df50 4941
0da9581d
EL		 4942 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4943 GFP_KERNEL);
104ea556 4944 if (!queue_start_poll) {
4945 rc = -ENOMEM;
4946 goto out_free_in_sbals;
4947 }
0da9581d 4948 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4949 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4950
4951 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4952
4a71df50 4953 out_sbal_ptrs =
b3332930 4954 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4955 sizeof(void *), GFP_KERNEL);
4956 if (!out_sbal_ptrs) {
104ea556 4957 rc = -ENOMEM;
4958 goto out_free_queue_start_poll;
4a71df50
FB		 4959 }
4960 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4961 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4962 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4963 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4964 }
4965
4966 memset(&init_data, 0, sizeof(struct qdio_initialize));
4967 init_data.cdev = CARD_DDEV(card);
4968 init_data.q_format = qeth_get_qdio_q_format(card);
4969 init_data.qib_param_field_format = 0;
4970 init_data.qib_param_field = qib_param_field;
0da9581d 4971 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4972 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4973 init_data.input_handler = card->discipline->input_handler;
4974 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4975 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4976 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4977 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4978 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4979 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4980 init_data.scan_threshold =
0fa81cd4 4981 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4982
4983 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4984 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4985 rc = qdio_allocate(&init_data);
4986 if (rc) {
4987 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4988 goto out;
4989 }
4990 rc = qdio_establish(&init_data);
4991 if (rc) {
4a71df50 4992 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4993 qdio_free(CARD_DDEV(card));
4994 }
4a71df50 4995 }
0da9581d
EL		 4996
4997 switch (card->options.cq) {
4998 case QETH_CQ_ENABLED:
4999 dev_info(&card->gdev->dev, "Completion Queue support enabled");
5000 break;
5001 case QETH_CQ_DISABLED:
5002 dev_info(&card->gdev->dev, "Completion Queue support disabled");
5003 break;
5004 default:
5005 break;
5006 }
cc961d40 5007out:
4a71df50 5008 kfree(out_sbal_ptrs);
104ea556 5009out_free_queue_start_poll:
5010 kfree(queue_start_poll);
5011out_free_in_sbals:
4a71df50 5012 kfree(in_sbal_ptrs);
104ea556 5013out_free_qib_param:
4a71df50 5014 kfree(qib_param_field);
104ea556 5015out_free_nothing:
4a71df50
FB		 5016 return rc;
5017}
5018
5019static void qeth_core_free_card(struct qeth_card *card)
5020{
5021
d11ba0c4
PT		 5022 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5023 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5024 qeth_clean_channel(&card->read);
5025 qeth_clean_channel(&card->write);
5026 if (card->dev)
5027 free_netdev(card->dev);
4a71df50 5028 qeth_free_qdio_buffers(card);
6bcac508 5029 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5030 kfree(card);
5031}
5032
395672e0
SR		 5033void qeth_trace_features(struct qeth_card *card)
5034{
5035 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5036 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5037 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5038 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5039 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5040 sizeof(card->info.diagass_support));
395672e0
SR		 5041}
5042EXPORT_SYMBOL_GPL(qeth_trace_features);
5043
4a71df50 5044static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5045 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5046 .driver_info = QETH_CARD_TYPE_OSD},
5047 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5048 .driver_info = QETH_CARD_TYPE_IQD},
5049 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5050 .driver_info = QETH_CARD_TYPE_OSN},
5051 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5052 .driver_info = QETH_CARD_TYPE_OSM},
5053 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5054 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5055 {},
5056};
5057MODULE_DEVICE_TABLE(ccw, qeth_ids);
5058
5059static struct ccw_driver qeth_ccw_driver = {
3bda058b 5060 .driver = {
3e70b3b8 5061 .owner = THIS_MODULE,
3bda058b
SO		 5062 .name = "qeth",
5063 },
4a71df50
FB		 5064 .ids = qeth_ids,
5065 .probe = ccwgroup_probe_ccwdev,
5066 .remove = ccwgroup_remove_ccwdev,
5067};
5068
4a71df50
FB		 5069int qeth_core_hardsetup_card(struct qeth_card *card)
5070{
6ebb7f8d 5071 int retries = 3;
4a71df50
FB		 5072 int rc;
5073
d11ba0c4 5074 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5075 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5076 qeth_update_from_chp_desc(card);
4a71df50 5077retry:
6ebb7f8d 5078 if (retries < 3)
74eacdb9
FB		 5079 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5080 dev_name(&card->gdev->dev));
22ae2790 5081 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5082 ccw_device_set_offline(CARD_DDEV(card));
5083 ccw_device_set_offline(CARD_WDEV(card));
5084 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5085 qdio_free(CARD_DDEV(card));
aa909224
UB		 5086 rc = ccw_device_set_online(CARD_RDEV(card));
5087 if (rc)
5088 goto retriable;
5089 rc = ccw_device_set_online(CARD_WDEV(card));
5090 if (rc)
5091 goto retriable;
5092 rc = ccw_device_set_online(CARD_DDEV(card));
5093 if (rc)
5094 goto retriable;
aa909224 5095retriable:
4a71df50 5096 if (rc == -ERESTARTSYS) {
d11ba0c4 5097 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5098 return rc;
5099 } else if (rc) {
d11ba0c4 5100 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5101 if (--retries < 0)
4a71df50
FB		 5102 goto out;
5103 else
5104 goto retry;
5105 }
d0ff1f52 5106 qeth_determine_capabilities(card);
4a71df50
FB		 5107 qeth_init_tokens(card);
5108 qeth_init_func_level(card);
5109 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5110 if (rc == -ERESTARTSYS) {
d11ba0c4 5111 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5112 return rc;
5113 } else if (rc) {
d11ba0c4 5114 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5115 if (--retries < 0)
5116 goto out;
5117 else
5118 goto retry;
5119 }
5120 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5121 if (rc == -ERESTARTSYS) {
d11ba0c4 5122 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5123 return rc;
5124 } else if (rc) {
d11ba0c4 5125 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5126 if (--retries < 0)
5127 goto out;
5128 else
5129 goto retry;
5130 }
908abbb5 5131 card->read_or_write_problem = 0;
4a71df50
FB		 5132 rc = qeth_mpc_initialize(card);
5133 if (rc) {
d11ba0c4 5134 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5135 goto out;
5136 }
1da74b1c 5137
10340510
JW		 5138 rc = qeth_send_startlan(card);
5139 if (rc) {
5140 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5141 if (rc == IPA_RC_LAN_OFFLINE) {
5142 dev_warn(&card->gdev->dev,
5143 "The LAN is offline\n");
5144 card->lan_online = 0;
5145 } else {
5146 rc = -ENODEV;
5147 goto out;
5148 }
5149 } else
5150 card->lan_online = 1;
5151
1da74b1c 5152 card->options.ipa4.supported_funcs = 0;
4d7def2a 5153 card->options.ipa6.supported_funcs = 0;
1da74b1c 5154 card->options.adp.supported_funcs = 0;
b4d72c08 5155 card->options.sbp.supported_funcs = 0;
1da74b1c 5156 card->info.diagass_support = 0;
1aec42bc
TR		 5157 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5158 if (rc == -ENOMEM)
5159 goto out;
5160 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5161 rc = qeth_query_setadapterparms(card);
5162 if (rc < 0) {
10340510 5163 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5164 goto out;
5165 }
5166 }
5167 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5168 rc = qeth_query_setdiagass(card);
5169 if (rc < 0) {
10340510 5170 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5171 goto out;
5172 }
5173 }
4a71df50
FB		 5174 return 0;
5175out:
74eacdb9
FB		 5176 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5177 "an error on the device\n");
5178 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5179 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5180 return rc;
5181}
5182EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5183
cef6ff22
JW		 5184static int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5185 struct qdio_buffer_element *element,
5186 struct sk_buff **pskb, int offset, int *pfrag,
5187 int data_len)
4a71df50
FB		 5188{
5189 struct page *page = virt_to_page(element->addr);
5190 if (*pskb == NULL) {
b3332930
FB		 5191 if (qethbuffer->rx_skb) {
5192 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5193 *pskb = qethbuffer->rx_skb;
5194 qethbuffer->rx_skb = NULL;
5195 } else {
5196 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5197 if (!(*pskb))
5198 return -ENOMEM;
5199 }
5200
4a71df50 5201 skb_reserve(*pskb, ETH_HLEN);
b3332930 5202 if (data_len <= QETH_RX_PULL_LEN) {
59ae1d12 5203 skb_put_data(*pskb, element->addr + offset, data_len);
4a71df50
FB		 5204 } else {
5205 get_page(page);
59ae1d12
JB		 5206 skb_put_data(*pskb, element->addr + offset,
5207 QETH_RX_PULL_LEN);
b3332930
FB		 5208 skb_fill_page_desc(*pskb, *pfrag, page,
5209 offset + QETH_RX_PULL_LEN,
5210 data_len - QETH_RX_PULL_LEN);
5211 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5212 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5213 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5214 (*pfrag)++;
5215 }
5216 } else {
5217 get_page(page);
5218 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5219 (*pskb)->data_len += data_len;
5220 (*pskb)->len += data_len;
5221 (*pskb)->truesize += data_len;
5222 (*pfrag)++;
5223 }
0da9581d
EL		 5224
5225
4a71df50
FB		 5226 return 0;
5227}
5228
bca51650
TR		 5229static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5230{
5231 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5232}
5233
4a71df50 5234struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5235 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5236 struct qdio_buffer_element **__element, int *__offset,
5237 struct qeth_hdr **hdr)
5238{
5239 struct qdio_buffer_element *element = *__element;
b3332930 5240 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5241 int offset = *__offset;
5242 struct sk_buff *skb = NULL;
76b11f8e 5243 int skb_len = 0;
4a71df50
FB		 5244 void *data_ptr;
5245 int data_len;
5246 int headroom = 0;
5247 int use_rx_sg = 0;
5248 int frag = 0;
5249
4a71df50
FB		 5250 /* qeth_hdr must not cross element boundaries */
5251 if (element->length < offset + sizeof(struct qeth_hdr)) {
5252 if (qeth_is_last_sbale(element))
5253 return NULL;
5254 element++;
5255 offset = 0;
5256 if (element->length < sizeof(struct qeth_hdr))
5257 return NULL;
5258 }
5259 *hdr = element->addr + offset;
5260
5261 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5262 switch ((*hdr)->hdr.l2.id) {
5263 case QETH_HEADER_TYPE_LAYER2:
5264 skb_len = (*hdr)->hdr.l2.pkt_length;
5265 break;
5266 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5267 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5268 headroom = ETH_HLEN;
76b11f8e
UB		 5269 break;
5270 case QETH_HEADER_TYPE_OSN:
5271 skb_len = (*hdr)->hdr.osn.pdu_length;
5272 headroom = sizeof(struct qeth_hdr);
5273 break;
5274 default:
5275 break;
4a71df50
FB		 5276 }
5277
5278 if (!skb_len)
5279 return NULL;
5280
b3332930
FB		 5281 if (((skb_len >= card->options.rx_sg_cb) &&
5282 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5283 (!atomic_read(&card->force_alloc_skb))) ||
5284 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5285 use_rx_sg = 1;
5286 } else {
5287 skb = dev_alloc_skb(skb_len + headroom);
5288 if (!skb)
5289 goto no_mem;
5290 if (headroom)
5291 skb_reserve(skb, headroom);
5292 }
5293
5294 data_ptr = element->addr + offset;
5295 while (skb_len) {
5296 data_len = min(skb_len, (int)(element->length - offset));
5297 if (data_len) {
5298 if (use_rx_sg) {
b3332930
FB		 5299 if (qeth_create_skb_frag(qethbuffer, element,
5300 &skb, offset, &frag, data_len))
4a71df50
FB		 5301 goto no_mem;
5302 } else {
59ae1d12 5303 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5304 }
5305 }
5306 skb_len -= data_len;
5307 if (skb_len) {
5308 if (qeth_is_last_sbale(element)) {
847a50fd 5309 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5310 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5311 dev_kfree_skb_any(skb);
5312 card->stats.rx_errors++;
5313 return NULL;
5314 }
5315 element++;
5316 offset = 0;
5317 data_ptr = element->addr;
5318 } else {
5319 offset += data_len;
5320 }
5321 }
5322 *__element = element;
5323 *__offset = offset;
5324 if (use_rx_sg && card->options.performance_stats) {
5325 card->perf_stats.sg_skbs_rx++;
5326 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5327 }
5328 return skb;
5329no_mem:
5330 if (net_ratelimit()) {
847a50fd 5331 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5332 }
5333 card->stats.rx_dropped++;
5334 return NULL;
5335}
5336EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5337
d73ef324
JW		 5338int qeth_poll(struct napi_struct *napi, int budget)
5339{
5340 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5341 int work_done = 0;
5342 struct qeth_qdio_buffer *buffer;
5343 int done;
5344 int new_budget = budget;
5345
5346 if (card->options.performance_stats) {
5347 card->perf_stats.inbound_cnt++;
5348 card->perf_stats.inbound_start_time = qeth_get_micros();
5349 }
5350
5351 while (1) {
5352 if (!card->rx.b_count) {
5353 card->rx.qdio_err = 0;
5354 card->rx.b_count = qdio_get_next_buffers(
5355 card->data.ccwdev, 0, &card->rx.b_index,
5356 &card->rx.qdio_err);
5357 if (card->rx.b_count <= 0) {
5358 card->rx.b_count = 0;
5359 break;
5360 }
5361 card->rx.b_element =
5362 &card->qdio.in_q->bufs[card->rx.b_index]
5363 .buffer->element[0];
5364 card->rx.e_offset = 0;
5365 }
5366
5367 while (card->rx.b_count) {
5368 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5369 if (!(card->rx.qdio_err &&
5370 qeth_check_qdio_errors(card, buffer->buffer,
5371 card->rx.qdio_err, "qinerr")))
5372 work_done +=
5373 card->discipline->process_rx_buffer(
5374 card, new_budget, &done);
5375 else
5376 done = 1;
5377
5378 if (done) {
5379 if (card->options.performance_stats)
5380 card->perf_stats.bufs_rec++;
5381 qeth_put_buffer_pool_entry(card,
5382 buffer->pool_entry);
5383 qeth_queue_input_buffer(card, card->rx.b_index);
5384 card->rx.b_count--;
5385 if (card->rx.b_count) {
5386 card->rx.b_index =
5387 (card->rx.b_index + 1) %
5388 QDIO_MAX_BUFFERS_PER_Q;
5389 card->rx.b_element =
5390 &card->qdio.in_q
5391 ->bufs[card->rx.b_index]
5392 .buffer->element[0];
5393 card->rx.e_offset = 0;
5394 }
5395 }
5396
5397 if (work_done >= budget)
5398 goto out;
5399 else
5400 new_budget = budget - work_done;
5401 }
5402 }
5403
5404 napi_complete(napi);
5405 if (qdio_start_irq(card->data.ccwdev, 0))
5406 napi_schedule(&card->napi);
5407out:
5408 if (card->options.performance_stats)
5409 card->perf_stats.inbound_time += qeth_get_micros() -
5410 card->perf_stats.inbound_start_time;
5411 return work_done;
5412}
5413EXPORT_SYMBOL_GPL(qeth_poll);
5414
8f43fb00
TR		 5415int qeth_setassparms_cb(struct qeth_card *card,
5416 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5417{
5418 struct qeth_ipa_cmd *cmd;
5419
5420 QETH_CARD_TEXT(card, 4, "defadpcb");
5421
5422 cmd = (struct qeth_ipa_cmd *) data;
5423 if (cmd->hdr.return_code == 0) {
5424 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5425 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5426 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5427 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5428 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5429 }
4d7def2a
TR		 5430 return 0;
5431}
8f43fb00 5432EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5433
b475e316
TR		 5434struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5435 enum qeth_ipa_funcs ipa_func,
5436 __u16 cmd_code, __u16 len,
5437 enum qeth_prot_versions prot)
4d7def2a
TR		 5438{
5439 struct qeth_cmd_buffer *iob;
5440 struct qeth_ipa_cmd *cmd;
5441
5442 QETH_CARD_TEXT(card, 4, "getasscm");
5443 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5444
5445 if (iob) {
5446 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5447 cmd->data.setassparms.hdr.assist_no = ipa_func;
5448 cmd->data.setassparms.hdr.length = 8 + len;
5449 cmd->data.setassparms.hdr.command_code = cmd_code;
5450 cmd->data.setassparms.hdr.return_code = 0;
5451 cmd->data.setassparms.hdr.seq_no = 0;
5452 }
5453
5454 return iob;
5455}
b475e316 5456EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5457
5458int qeth_send_setassparms(struct qeth_card *card,
5459 struct qeth_cmd_buffer *iob, __u16 len, long data,
5460 int (*reply_cb)(struct qeth_card *,
5461 struct qeth_reply *, unsigned long),
5462 void *reply_param)
5463{
5464 int rc;
5465 struct qeth_ipa_cmd *cmd;
5466
5467 QETH_CARD_TEXT(card, 4, "sendassp");
5468
5469 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5470 if (len <= sizeof(__u32))
5471 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5472 else /* (len > sizeof(__u32)) */
5473 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5474
5475 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5476 return rc;
5477}
5478EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5479
5480int qeth_send_simple_setassparms(struct qeth_card *card,
5481 enum qeth_ipa_funcs ipa_func,
5482 __u16 cmd_code, long data)
5483{
5484 int rc;
5485 int length = 0;
5486 struct qeth_cmd_buffer *iob;
5487
5488 QETH_CARD_TEXT(card, 4, "simassp4");
5489 if (data)
5490 length = sizeof(__u32);
5491 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5492 length, QETH_PROT_IPV4);
5493 if (!iob)
5494 return -ENOMEM;
5495 rc = qeth_send_setassparms(card, iob, length, data,
5496 qeth_setassparms_cb, NULL);
5497 return rc;
5498}
5499EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5500
4a71df50
FB		 5501static void qeth_unregister_dbf_views(void)
5502{
d11ba0c4
PT		 5503 int x;
5504 for (x = 0; x < QETH_DBF_INFOS; x++) {
5505 debug_unregister(qeth_dbf[x].id);
5506 qeth_dbf[x].id = NULL;
5507 }
4a71df50
FB		 5508}
5509
8e96c51c 5510void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5511{
5512 char dbf_txt_buf[32];
345aa66e 5513 va_list args;
cd023216 5514
8e6a8285 5515 if (!debug_level_enabled(id, level))
cd023216 5516 return;
345aa66e
PT		 5517 va_start(args, fmt);
5518 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5519 va_end(args);
8e96c51c 5520 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5521}
5522EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5523
4a71df50
FB		 5524static int qeth_register_dbf_views(void)
5525{
d11ba0c4
PT		 5526 int ret;
5527 int x;
5528
5529 for (x = 0; x < QETH_DBF_INFOS; x++) {
5530 /* register the areas */
5531 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5532 qeth_dbf[x].pages,
5533 qeth_dbf[x].areas,
5534 qeth_dbf[x].len);
5535 if (qeth_dbf[x].id == NULL) {
5536 qeth_unregister_dbf_views();
5537 return -ENOMEM;
5538 }
4a71df50 5539
d11ba0c4
PT		 5540 /* register a view */
5541 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5542 if (ret) {
5543 qeth_unregister_dbf_views();
5544 return ret;
5545 }
4a71df50 5546
d11ba0c4
PT		 5547 /* set a passing level */
5548 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5549 }
4a71df50
FB		 5550
5551 return 0;
5552}
5553
5554int qeth_core_load_discipline(struct qeth_card *card,
5555 enum qeth_discipline_id discipline)
5556{
5557 int rc = 0;
c70eb09d 5558
2022e00c 5559 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5560 switch (discipline) {
5561 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5562 card->discipline = try_then_request_module(
5563 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5564 break;
5565 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5566 card->discipline = try_then_request_module(
5567 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5568 break;
c70eb09d
JW		 5569 default:
5570 break;
4a71df50 5571 }
c70eb09d 5572
c041f2d4 5573 if (!card->discipline) {
74eacdb9
FB		 5574 dev_err(&card->gdev->dev, "There is no kernel module to "
5575 "support discipline %d\n", discipline);
4a71df50
FB		 5576 rc = -EINVAL;
5577 }
2022e00c 5578 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5579 return rc;
5580}
5581
5582void qeth_core_free_discipline(struct qeth_card *card)
5583{
5584 if (card->options.layer2)
c041f2d4 5585 symbol_put(qeth_l2_discipline);
4a71df50 5586 else
c041f2d4
SO		 5587 symbol_put(qeth_l3_discipline);
5588 card->discipline = NULL;
4a71df50
FB		 5589}
5590
2d2ebb3e 5591const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5592 .name = "qeth_generic",
5593 .groups = qeth_generic_attr_groups,
5594};
2d2ebb3e
JW		 5595EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5596
b7169c51
SO		 5597static const struct device_type qeth_osn_devtype = {
5598 .name = "qeth_osn",
5599 .groups = qeth_osn_attr_groups,
5600};
5601
819dc537
SR		 5602#define DBF_NAME_LEN 20
5603
5604struct qeth_dbf_entry {
5605 char dbf_name[DBF_NAME_LEN];
5606 debug_info_t *dbf_info;
5607 struct list_head dbf_list;
5608};
5609
5610static LIST_HEAD(qeth_dbf_list);
5611static DEFINE_MUTEX(qeth_dbf_list_mutex);
5612
5613static debug_info_t *qeth_get_dbf_entry(char *name)
5614{
5615 struct qeth_dbf_entry *entry;
5616 debug_info_t *rc = NULL;
5617
5618 mutex_lock(&qeth_dbf_list_mutex);
5619 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5620 if (strcmp(entry->dbf_name, name) == 0) {
5621 rc = entry->dbf_info;
5622 break;
5623 }
5624 }
5625 mutex_unlock(&qeth_dbf_list_mutex);
5626 return rc;
5627}
5628
5629static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5630{
5631 struct qeth_dbf_entry *new_entry;
5632
5633 card->debug = debug_register(name, 2, 1, 8);
5634 if (!card->debug) {
5635 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5636 goto err;
5637 }
5638 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5639 goto err_dbg;
5640 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5641 if (!new_entry)
5642 goto err_dbg;
5643 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5644 new_entry->dbf_info = card->debug;
5645 mutex_lock(&qeth_dbf_list_mutex);
5646 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5647 mutex_unlock(&qeth_dbf_list_mutex);
5648
5649 return 0;
5650
5651err_dbg:
5652 debug_unregister(card->debug);
5653err:
5654 return -ENOMEM;
5655}
5656
5657static void qeth_clear_dbf_list(void)
5658{
5659 struct qeth_dbf_entry *entry, *tmp;
5660
5661 mutex_lock(&qeth_dbf_list_mutex);
5662 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5663 list_del(&entry->dbf_list);
5664 debug_unregister(entry->dbf_info);
5665 kfree(entry);
5666 }
5667 mutex_unlock(&qeth_dbf_list_mutex);
5668}
5669
4a71df50
FB		 5670static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5671{
5672 struct qeth_card *card;
5673 struct device *dev;
5674 int rc;
c70eb09d 5675 enum qeth_discipline_id enforced_disc;
4a71df50 5676 unsigned long flags;
819dc537 5677 char dbf_name[DBF_NAME_LEN];
4a71df50 5678
d11ba0c4 5679 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5680
5681 dev = &gdev->dev;
5682 if (!get_device(dev))
5683 return -ENODEV;
5684
2a0217d5 5685 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5686
5687 card = qeth_alloc_card();
5688 if (!card) {
d11ba0c4 5689 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5690 rc = -ENOMEM;
5691 goto err_dev;
5692 }
af039068
CO		 5693
5694 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5695 dev_name(&gdev->dev));
819dc537 5696 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5697 if (!card->debug) {
819dc537
SR		 5698 rc = qeth_add_dbf_entry(card, dbf_name);
5699 if (rc)
5700 goto err_card;
af039068 5701 }
af039068 5702
4a71df50
FB		 5703 card->read.ccwdev = gdev->cdev[0];
5704 card->write.ccwdev = gdev->cdev[1];
5705 card->data.ccwdev = gdev->cdev[2];
5706 dev_set_drvdata(&gdev->dev, card);
5707 card->gdev = gdev;
5708 gdev->cdev[0]->handler = qeth_irq;
5709 gdev->cdev[1]->handler = qeth_irq;
5710 gdev->cdev[2]->handler = qeth_irq;
5711
5712 rc = qeth_determine_card_type(card);
5713 if (rc) {
d11ba0c4 5714 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5715 goto err_card;
4a71df50
FB		 5716 }
5717 rc = qeth_setup_card(card);
5718 if (rc) {
d11ba0c4 5719 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5720 goto err_card;
4a71df50
FB		 5721 }
5722
c70eb09d
JW		 5723 qeth_determine_capabilities(card);
5724 enforced_disc = qeth_enforce_discipline(card);
5725 switch (enforced_disc) {
5726 case QETH_DISCIPLINE_UNDETERMINED:
5727 gdev->dev.type = &qeth_generic_devtype;
5728 break;
5729 default:
5730 card->info.layer_enforced = true;
5731 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5732 if (rc)
819dc537 5733 goto err_card;
2d2ebb3e
JW		 5734
5735 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5736 ? card->discipline->devtype
5737 : &qeth_osn_devtype;
c041f2d4 5738 rc = card->discipline->setup(card->gdev);
4a71df50 5739 if (rc)
5113fec0 5740 goto err_disc;
2d2ebb3e 5741 break;
4a71df50
FB		 5742 }
5743
5744 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5745 list_add_tail(&card->list, &qeth_core_card_list.list);
5746 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5747 return 0;
5748
5113fec0
UB		 5749err_disc:
5750 qeth_core_free_discipline(card);
4a71df50
FB		 5751err_card:
5752 qeth_core_free_card(card);
5753err_dev:
5754 put_device(dev);
5755 return rc;
5756}
5757
5758static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5759{
5760 unsigned long flags;
5761 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5762
28a7e4c9 5763 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5764
c041f2d4
SO		 5765 if (card->discipline) {
5766 card->discipline->remove(gdev);
9dc48ccc
UB		 5767 qeth_core_free_discipline(card);
5768 }
5769
4a71df50
FB		 5770 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5771 list_del(&card->list);
5772 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5773 qeth_core_free_card(card);
5774 dev_set_drvdata(&gdev->dev, NULL);
5775 put_device(&gdev->dev);
5776 return;
5777}
5778
5779static int qeth_core_set_online(struct ccwgroup_device *gdev)
5780{
5781 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5782 int rc = 0;
c70eb09d 5783 enum qeth_discipline_id def_discipline;
4a71df50 5784
c041f2d4 5785 if (!card->discipline) {
4a71df50
FB		 5786 if (card->info.type == QETH_CARD_TYPE_IQD)
5787 def_discipline = QETH_DISCIPLINE_LAYER3;
5788 else
5789 def_discipline = QETH_DISCIPLINE_LAYER2;
5790 rc = qeth_core_load_discipline(card, def_discipline);
5791 if (rc)
5792 goto err;
c041f2d4 5793 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5794 if (rc) {
5795 qeth_core_free_discipline(card);
4a71df50 5796 goto err;
9111e788 5797 }
4a71df50 5798 }
c041f2d4 5799 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5800err:
5801 return rc;
5802}
5803
5804static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5805{
5806 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5807 return card->discipline->set_offline(gdev);
4a71df50
FB		 5808}
5809
5810static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5811{
5812 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5813 qeth_set_allowed_threads(card, 0, 1);
5814 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5815 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5816 qeth_qdio_clear_card(card, 0);
5817 qeth_clear_qdio_buffers(card);
5818 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5819}
5820
bbcfcdc8
FB		 5821static int qeth_core_freeze(struct ccwgroup_device *gdev)
5822{
5823 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5824 if (card->discipline && card->discipline->freeze)
5825 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5826 return 0;
5827}
5828
5829static int qeth_core_thaw(struct ccwgroup_device *gdev)
5830{
5831 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5832 if (card->discipline && card->discipline->thaw)
5833 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5834 return 0;
5835}
5836
5837static int qeth_core_restore(struct ccwgroup_device *gdev)
5838{
5839 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5840 if (card->discipline && card->discipline->restore)
5841 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5842 return 0;
5843}
5844
4a71df50 5845static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5846 .driver = {
5847 .owner = THIS_MODULE,
5848 .name = "qeth",
5849 },
b7169c51 5850 .setup = qeth_core_probe_device,
4a71df50
FB		 5851 .remove = qeth_core_remove_device,
5852 .set_online = qeth_core_set_online,
5853 .set_offline = qeth_core_set_offline,
5854 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5855 .prepare = NULL,
5856 .complete = NULL,
bbcfcdc8
FB		 5857 .freeze = qeth_core_freeze,
5858 .thaw = qeth_core_thaw,
5859 .restore = qeth_core_restore,
4a71df50
FB		 5860};
5861
36369569
GKH		 5862static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5863 size_t count)
4a71df50
FB		 5864{
5865 int err;
4a71df50 5866
b7169c51 5867 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5868 &qeth_core_ccwgroup_driver, 3, buf);
5869
5870 return err ? err : count;
5871}
36369569 5872static DRIVER_ATTR_WO(group);
4a71df50 5873
f47e2256
SO		 5874static struct attribute *qeth_drv_attrs[] = {
5875 &driver_attr_group.attr,
5876 NULL,
5877};
5878static struct attribute_group qeth_drv_attr_group = {
5879 .attrs = qeth_drv_attrs,
5880};
5881static const struct attribute_group *qeth_drv_attr_groups[] = {
5882 &qeth_drv_attr_group,
5883 NULL,
5884};
5885
942d6984
JW		 5886int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5887{
5888 struct qeth_card *card = dev->ml_priv;
5889 struct mii_ioctl_data *mii_data;
5890 int rc = 0;
5891
5892 if (!card)
5893 return -ENODEV;
5894
5895 if (!qeth_card_hw_is_reachable(card))
5896 return -ENODEV;
5897
5898 if (card->info.type == QETH_CARD_TYPE_OSN)
5899 return -EPERM;
5900
5901 switch (cmd) {
5902 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5903 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5904 break;
5905 case SIOC_QETH_GET_CARD_TYPE:
5906 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5907 card->info.type == QETH_CARD_TYPE_OSM ||
5908 card->info.type == QETH_CARD_TYPE_OSX) &&
5909 !card->info.guestlan)
5910 return 1;
5911 else
5912 return 0;
5913 case SIOCGMIIPHY:
5914 mii_data = if_mii(rq);
5915 mii_data->phy_id = 0;
5916 break;
5917 case SIOCGMIIREG:
5918 mii_data = if_mii(rq);
5919 if (mii_data->phy_id != 0)
5920 rc = -EINVAL;
5921 else
5922 mii_data->val_out = qeth_mdio_read(dev,
5923 mii_data->phy_id, mii_data->reg_num);
5924 break;
5925 case SIOC_QETH_QUERY_OAT:
5926 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5927 break;
5928 default:
5929 if (card->discipline->do_ioctl)
5930 rc = card->discipline->do_ioctl(dev, rq, cmd);
5931 else
5932 rc = -EOPNOTSUPP;
5933 }
5934 if (rc)
5935 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5936 return rc;
5937}
5938EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5939
4a71df50
FB		 5940static struct {
5941 const char str[ETH_GSTRING_LEN];
5942} qeth_ethtool_stats_keys[] = {
5943/* 0 */{"rx skbs"},
5944 {"rx buffers"},
5945 {"tx skbs"},
5946 {"tx buffers"},
5947 {"tx skbs no packing"},
5948 {"tx buffers no packing"},
5949 {"tx skbs packing"},
5950 {"tx buffers packing"},
5951 {"tx sg skbs"},
5952 {"tx sg frags"},
5953/* 10 */{"rx sg skbs"},
5954 {"rx sg frags"},
5955 {"rx sg page allocs"},
5956 {"tx large kbytes"},
5957 {"tx large count"},
5958 {"tx pk state ch n->p"},
5959 {"tx pk state ch p->n"},
5960 {"tx pk watermark low"},
5961 {"tx pk watermark high"},
5962 {"queue 0 buffer usage"},
5963/* 20 */{"queue 1 buffer usage"},
5964 {"queue 2 buffer usage"},
5965 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5966 {"rx poll time"},
5967 {"rx poll count"},
4a71df50
FB		 5968 {"rx do_QDIO time"},
5969 {"rx do_QDIO count"},
5970 {"tx handler time"},
5971 {"tx handler count"},
5972 {"tx time"},
5973/* 30 */{"tx count"},
5974 {"tx do_QDIO time"},
5975 {"tx do_QDIO count"},
f61a0d05 5976 {"tx csum"},
c3b4a740 5977 {"tx lin"},
6059c905 5978 {"tx linfail"},
0da9581d
EL		 5979 {"cq handler count"},
5980 {"cq handler time"}
4a71df50
FB		 5981};
5982
df8b4ec8 5983int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5984{
df8b4ec8
BH		 5985 switch (stringset) {
5986 case ETH_SS_STATS:
5987 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5988 default:
5989 return -EINVAL;
5990 }
4a71df50 5991}
df8b4ec8 5992EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5993
5994void qeth_core_get_ethtool_stats(struct net_device *dev,
5995 struct ethtool_stats *stats, u64 *data)
5996{
509e2562 5997 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5998 data[0] = card->stats.rx_packets -
5999 card->perf_stats.initial_rx_packets;
6000 data[1] = card->perf_stats.bufs_rec;
6001 data[2] = card->stats.tx_packets -
6002 card->perf_stats.initial_tx_packets;
6003 data[3] = card->perf_stats.bufs_sent;
6004 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6005 - card->perf_stats.skbs_sent_pack;
6006 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6007 data[6] = card->perf_stats.skbs_sent_pack;
6008 data[7] = card->perf_stats.bufs_sent_pack;
6009 data[8] = card->perf_stats.sg_skbs_sent;
6010 data[9] = card->perf_stats.sg_frags_sent;
6011 data[10] = card->perf_stats.sg_skbs_rx;
6012 data[11] = card->perf_stats.sg_frags_rx;
6013 data[12] = card->perf_stats.sg_alloc_page_rx;
6014 data[13] = (card->perf_stats.large_send_bytes >> 10);
6015 data[14] = card->perf_stats.large_send_cnt;
6016 data[15] = card->perf_stats.sc_dp_p;
6017 data[16] = card->perf_stats.sc_p_dp;
6018 data[17] = QETH_LOW_WATERMARK_PACK;
6019 data[18] = QETH_HIGH_WATERMARK_PACK;
6020 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6021 data[20] = (card->qdio.no_out_queues > 1) ?
6022 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6023 data[21] = (card->qdio.no_out_queues > 2) ?
6024 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6025 data[22] = (card->qdio.no_out_queues > 3) ?
6026 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6027 data[23] = card->perf_stats.inbound_time;
6028 data[24] = card->perf_stats.inbound_cnt;
6029 data[25] = card->perf_stats.inbound_do_qdio_time;
6030 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6031 data[27] = card->perf_stats.outbound_handler_time;
6032 data[28] = card->perf_stats.outbound_handler_cnt;
6033 data[29] = card->perf_stats.outbound_time;
6034 data[30] = card->perf_stats.outbound_cnt;
6035 data[31] = card->perf_stats.outbound_do_qdio_time;
6036 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6037 data[33] = card->perf_stats.tx_csum;
c3b4a740 6038 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6039 data[35] = card->perf_stats.tx_linfail;
6040 data[36] = card->perf_stats.cq_cnt;
6041 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 6042}
6043EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6044
6045void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6046{
6047 switch (stringset) {
6048 case ETH_SS_STATS:
6049 memcpy(data, &qeth_ethtool_stats_keys,
6050 sizeof(qeth_ethtool_stats_keys));
6051 break;
6052 default:
6053 WARN_ON(1);
6054 break;
6055 }
6056}
6057EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6058
6059void qeth_core_get_drvinfo(struct net_device *dev,
6060 struct ethtool_drvinfo *info)
6061{
509e2562 6062 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6063
6064 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6065 sizeof(info->driver));
6066 strlcpy(info->version, "1.0", sizeof(info->version));
6067 strlcpy(info->fw_version, card->info.mcl_level,
6068 sizeof(info->fw_version));
6069 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6070 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6071}
6072EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6073
774afb8e
JW		 6074/* Helper function to fill 'advertising' and 'supported' which are the same. */
6075/* Autoneg and full-duplex are supported and advertised unconditionally. */
6076/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6077/* specified port type. */
993e19c0 6078static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6079 int maxspeed, int porttype)
6080{
41fc3b65
JW		 6081 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6082 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6083 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6084
41fc3b65
JW		 6085 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6086 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6087
6088 switch (porttype) {
6089 case PORT_TP:
41fc3b65
JW		 6090 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6091 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6092 break;
6093 case PORT_FIBRE:
41fc3b65
JW		 6094 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6095 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6096 break;
6097 default:
41fc3b65
JW		 6098 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6099 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6100 WARN_ON_ONCE(1);
6101 }
6102
774afb8e 6103 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6104 switch (maxspeed) {
6105 case SPEED_10000:
41fc3b65
JW		 6106 ethtool_link_ksettings_add_link_mode(cmd, supported,
6107 10000baseT_Full);
6108 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6109 10000baseT_Full);
02d5cb5b 6110 case SPEED_1000:
41fc3b65
JW		 6111 ethtool_link_ksettings_add_link_mode(cmd, supported,
6112 1000baseT_Full);
6113 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6114 1000baseT_Full);
6115 ethtool_link_ksettings_add_link_mode(cmd, supported,
6116 1000baseT_Half);
6117 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6118 1000baseT_Half);
02d5cb5b 6119 case SPEED_100:
41fc3b65
JW		 6120 ethtool_link_ksettings_add_link_mode(cmd, supported,
6121 100baseT_Full);
6122 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6123 100baseT_Full);
6124 ethtool_link_ksettings_add_link_mode(cmd, supported,
6125 100baseT_Half);
6126 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6127 100baseT_Half);
02d5cb5b 6128 case SPEED_10:
41fc3b65
JW		 6129 ethtool_link_ksettings_add_link_mode(cmd, supported,
6130 10baseT_Full);
6131 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6132 10baseT_Full);
6133 ethtool_link_ksettings_add_link_mode(cmd, supported,
6134 10baseT_Half);
6135 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6136 10baseT_Half);
774afb8e
JW		 6137 /* end fallthrough */
6138 break;
02d5cb5b 6139 default:
41fc3b65
JW		 6140 ethtool_link_ksettings_add_link_mode(cmd, supported,
6141 10baseT_Full);
6142 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6143 10baseT_Full);
6144 ethtool_link_ksettings_add_link_mode(cmd, supported,
6145 10baseT_Half);
6146 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6147 10baseT_Half);
02d5cb5b
EC		 6148 WARN_ON_ONCE(1);
6149 }
02d5cb5b
EC		 6150}
6151
993e19c0
JW		 6152int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6153 struct ethtool_link_ksettings *cmd)
3f9975aa 6154{
509e2562 6155 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6156 enum qeth_link_types link_type;
02d5cb5b 6157 struct carrier_info carrier_info;
511c2445 6158 int rc;
3f9975aa
FB		 6159
6160 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6161 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6162 else
6163 link_type = card->info.link_type;
6164
993e19c0
JW		 6165 cmd->base.duplex = DUPLEX_FULL;
6166 cmd->base.autoneg = AUTONEG_ENABLE;
6167 cmd->base.phy_address = 0;
6168 cmd->base.mdio_support = 0;
6169 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6170 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6171
6172 switch (link_type) {
6173 case QETH_LINK_TYPE_FAST_ETH:
6174 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6175 cmd->base.speed = SPEED_100;
6176 cmd->base.port = PORT_TP;
3f9975aa 6177 break;
3f9975aa
FB		 6178 case QETH_LINK_TYPE_GBIT_ETH:
6179 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6180 cmd->base.speed = SPEED_1000;
6181 cmd->base.port = PORT_FIBRE;
3f9975aa 6182 break;
3f9975aa 6183 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6184 cmd->base.speed = SPEED_10000;
6185 cmd->base.port = PORT_FIBRE;
3f9975aa 6186 break;
3f9975aa 6187 default:
993e19c0
JW		 6188 cmd->base.speed = SPEED_10;
6189 cmd->base.port = PORT_TP;
3f9975aa 6190 }
993e19c0 6191 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6192
02d5cb5b
EC		 6193 /* Check if we can obtain more accurate information. */
6194 /* If QUERY_CARD_INFO command is not supported or fails, */
6195 /* just return the heuristics that was filled above. */
511c2445
EC		 6196 if (!qeth_card_hw_is_reachable(card))
6197 return -ENODEV;
6198 rc = qeth_query_card_info(card, &carrier_info);
6199 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6200 return 0;
511c2445
EC		 6201 if (rc) /* report error from the hardware operation */
6202 return rc;
6203 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6204
6205 netdev_dbg(netdev,
6206 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6207 carrier_info.card_type,
6208 carrier_info.port_mode,
6209 carrier_info.port_speed);
6210
6211 /* Update attributes for which we've obtained more authoritative */
6212 /* information, leave the rest the way they where filled above. */
6213 switch (carrier_info.card_type) {
6214 case CARD_INFO_TYPE_1G_COPPER_A:
6215 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6216 cmd->base.port = PORT_TP;
6217 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6218 break;
6219 case CARD_INFO_TYPE_1G_FIBRE_A:
6220 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6221 cmd->base.port = PORT_FIBRE;
6222 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6223 break;
6224 case CARD_INFO_TYPE_10G_FIBRE_A:
6225 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6226 cmd->base.port = PORT_FIBRE;
6227 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6228 break;
6229 }
6230
6231 switch (carrier_info.port_mode) {
6232 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6233 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6234 break;
6235 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6236 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6237 break;
6238 }
6239
6240 switch (carrier_info.port_speed) {
6241 case CARD_INFO_PORTS_10M:
993e19c0 6242 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6243 break;
6244 case CARD_INFO_PORTS_100M:
993e19c0 6245 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6246 break;
6247 case CARD_INFO_PORTS_1G:
993e19c0 6248 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6249 break;
6250 case CARD_INFO_PORTS_10G:
993e19c0 6251 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6252 break;
6253 }
6254
3f9975aa
FB		 6255 return 0;
6256}
993e19c0 6257EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6258
c9475369
TR		 6259/* Callback to handle checksum offload command reply from OSA card.
6260 * Verify that required features have been enabled on the card.
6261 * Return error in hdr->return_code as this value is checked by caller.
6262 *
6263 * Always returns zero to indicate no further messages from the OSA card.
6264 */
6265static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6266 struct qeth_reply *reply,
6267 unsigned long data)
6268{
6269 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6270 struct qeth_checksum_cmd *chksum_cb =
6271 (struct qeth_checksum_cmd *)reply->param;
6272
6273 QETH_CARD_TEXT(card, 4, "chkdoccb");
6274 if (cmd->hdr.return_code)
6275 return 0;
6276
6277 memset(chksum_cb, 0, sizeof(*chksum_cb));
6278 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6279 chksum_cb->supported =
6280 cmd->data.setassparms.data.chksum.supported;
6281 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6282 }
6283 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6284 chksum_cb->supported =
6285 cmd->data.setassparms.data.chksum.supported;
6286 chksum_cb->enabled =
6287 cmd->data.setassparms.data.chksum.enabled;
6288 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6289 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6290 }
6291 return 0;
6292}
6293
6294/* Send command to OSA card and check results. */
6295static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6296 enum qeth_ipa_funcs ipa_func,
6297 __u16 cmd_code, long data,
6298 struct qeth_checksum_cmd *chksum_cb)
6299{
6300 struct qeth_cmd_buffer *iob;
6301 int rc = -ENOMEM;
6302
6303 QETH_CARD_TEXT(card, 4, "chkdocmd");
6304 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6305 sizeof(__u32), QETH_PROT_IPV4);
6306 if (iob)
6307 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6308 qeth_ipa_checksum_run_cmd_cb,
6309 chksum_cb);
6310 return rc;
6311}
6312
8f43fb00 6313static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6314{
f9d8e6dc
TR		 6315 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6316 QETH_IPA_CHECKSUM_UDP |
6317 QETH_IPA_CHECKSUM_TCP;
c9475369 6318 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6319 int rc;
6320
c9475369
TR		 6321 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6322 &chksum_cb);
f9d8e6dc
TR		 6323 if (!rc) {
6324 if ((required_features & chksum_cb.supported) !=
6325 required_features)
6326 rc = -EIO;
dae84c8e
TR		 6327 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6328 cstype == IPA_INBOUND_CHECKSUM)
6329 dev_warn(&card->gdev->dev,
6330 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6331 QETH_CARD_IFNAME(card));
f9d8e6dc 6332 }
4d7def2a 6333 if (rc) {
c9475369 6334 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6335 dev_warn(&card->gdev->dev,
6336 "Starting HW checksumming for %s failed, using SW checksumming\n",
6337 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6338 return rc;
6339 }
c9475369
TR		 6340 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6341 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6342 if (!rc) {
6343 if ((required_features & chksum_cb.enabled) !=
6344 required_features)
6345 rc = -EIO;
6346 }
4d7def2a 6347 if (rc) {
c9475369 6348 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6349 dev_warn(&card->gdev->dev,
6350 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6351 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6352 return rc;
6353 }
8f43fb00
TR		 6354
6355 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6356 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6357 return 0;
6358}
6359
8f43fb00 6360static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6361{
c9475369
TR		 6362 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6363 : qeth_send_simple_setassparms(card, cstype,
6364 IPA_CMD_ASS_STOP, 0);
6365 return rc ? -EIO : 0;
4d7def2a 6366}
4d7def2a 6367
8f43fb00 6368static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6369{
8f43fb00 6370 int rc;
4d7def2a 6371
8f43fb00 6372 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6373
8f43fb00
TR		 6374 if (on) {
6375 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6376 IPA_CMD_ASS_START, 0);
6377 if (rc) {
6378 dev_warn(&card->gdev->dev,
6379 "Starting outbound TCP segmentation offload for %s failed\n",
6380 QETH_CARD_IFNAME(card));
6381 return -EIO;
6382 }
6383 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6384 } else {
6385 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6386 IPA_CMD_ASS_STOP, 0);
6387 }
4d7def2a
TR		 6388 return rc;
6389}
8f43fb00 6390
e830baa9
HW		 6391/* try to restore device features on a device after recovery */
6392int qeth_recover_features(struct net_device *dev)
6393{
6394 struct qeth_card *card = dev->ml_priv;
6395 netdev_features_t recover = dev->features;
6396
6397 if (recover & NETIF_F_IP_CSUM) {
6398 if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
6399 recover ^= NETIF_F_IP_CSUM;
6400 }
6401 if (recover & NETIF_F_RXCSUM) {
6402 if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
6403 recover ^= NETIF_F_RXCSUM;
6404 }
6405 if (recover & NETIF_F_TSO) {
6406 if (qeth_set_ipa_tso(card, 1))
6407 recover ^= NETIF_F_TSO;
6408 }
6409
6410 if (recover == dev->features)
6411 return 0;
6412
6413 dev_warn(&card->gdev->dev,
6414 "Device recovery failed to restore all offload features\n");
6415 dev->features = recover;
6416 return -EIO;
6417}
6418EXPORT_SYMBOL_GPL(qeth_recover_features);
6419
8f43fb00
TR		 6420int qeth_set_features(struct net_device *dev, netdev_features_t features)
6421{
6422 struct qeth_card *card = dev->ml_priv;
6c7cd712 6423 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6424 int rc = 0;
6425
6426 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6427 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6428
6c7cd712 6429 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6430 rc = qeth_set_ipa_csum(card,
6431 features & NETIF_F_IP_CSUM ? 1 : 0,
6432 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6433 if (rc)
6434 changed ^= NETIF_F_IP_CSUM;
6435 }
6436 if ((changed & NETIF_F_RXCSUM)) {
6437 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6438 features & NETIF_F_RXCSUM ? 1 : 0,
6439 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6440 if (rc)
6441 changed ^= NETIF_F_RXCSUM;
6442 }
6443 if ((changed & NETIF_F_TSO)) {
6444 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6445 if (rc)
6446 changed ^= NETIF_F_TSO;
6447 }
6448
6449 /* everything changed successfully? */
6450 if ((dev->features ^ features) == changed)
6451 return 0;
6452 /* something went wrong. save changed features and return error */
6453 dev->features ^= changed;
6454 return -EIO;
8f43fb00
TR		 6455}
6456EXPORT_SYMBOL_GPL(qeth_set_features);
6457
6458netdev_features_t qeth_fix_features(struct net_device *dev,
6459 netdev_features_t features)
6460{
6461 struct qeth_card *card = dev->ml_priv;
6462
6463 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6464 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6465 features &= ~NETIF_F_IP_CSUM;
6466 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6467 features &= ~NETIF_F_RXCSUM;
cf536ffe 6468 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6469 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6470 /* if the card isn't up, remove features that require hw changes */
6471 if (card->state == CARD_STATE_DOWN ||
6472 card->state == CARD_STATE_RECOVER)
6473 features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
6474 NETIF_F_TSO);
8f43fb00
TR		 6475 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6476 return features;
6477}
6478EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6479
4a71df50
FB		 6480static int __init qeth_core_init(void)
6481{
6482 int rc;
6483
74eacdb9 6484 pr_info("loading core functions\n");
4a71df50 6485 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6486 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6487 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6488 mutex_init(&qeth_mod_mutex);
4a71df50 6489
0f54761d
SR		 6490 qeth_wq = create_singlethread_workqueue("qeth_wq");
6491
4a71df50
FB		 6492 rc = qeth_register_dbf_views();
6493 if (rc)
6494 goto out_err;
035da16f 6495 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6496 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6497 if (rc)
6498 goto register_err;
683d718a
FB		 6499 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6500 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6501 if (!qeth_core_header_cache) {
6502 rc = -ENOMEM;
6503 goto slab_err;
6504 }
0da9581d
EL		 6505 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6506 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6507 if (!qeth_qdio_outbuf_cache) {
6508 rc = -ENOMEM;
6509 goto cqslab_err;
6510 }
afb6ac59
SO		 6511 rc = ccw_driver_register(&qeth_ccw_driver);
6512 if (rc)
6513 goto ccw_err;
6514 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6515 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6516 if (rc)
6517 goto ccwgroup_err;
0da9581d 6518
683d718a 6519 return 0;
afb6ac59
SO		 6520
6521ccwgroup_err:
6522 ccw_driver_unregister(&qeth_ccw_driver);
6523ccw_err:
6524 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6525cqslab_err:
6526 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6527slab_err:
035da16f 6528 root_device_unregister(qeth_core_root_dev);
4a71df50 6529register_err:
4a71df50
FB		 6530 qeth_unregister_dbf_views();
6531out_err:
74eacdb9 6532 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6533 return rc;
6534}
6535
6536static void __exit qeth_core_exit(void)
6537{
819dc537 6538 qeth_clear_dbf_list();
0f54761d 6539 destroy_workqueue(qeth_wq);
4a71df50
FB		 6540 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6541 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6542 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6543 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6544 root_device_unregister(qeth_core_root_dev);
4a71df50 6545 qeth_unregister_dbf_views();
74eacdb9 6546 pr_info("core functions removed\n");
4a71df50
FB		 6547}
6548
6549module_init(qeth_core_init);
6550module_exit(qeth_core_exit);
6551MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6552MODULE_DESCRIPTION("qeth core functions");
6553MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git