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qeth: Remove unused exports
[thirdparty/kernel/stable.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
4a71df50 23
ab4227cb
MS		 24#include <asm/ebcdic.h>
25#include <asm/io.h>
1da74b1c 26#include <asm/sysinfo.h>
c3ab96f3 27#include <asm/compat.h>
4a71df50
FB		 28
29#include "qeth_core.h"
4a71df50 30
d11ba0c4
PT		 31struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40};
41EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 42
43struct qeth_card_list_struct qeth_core_card_list;
44EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 45struct kmem_cache *qeth_core_header_cache;
46EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 47static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 48
49static struct device *qeth_core_root_dev;
5113fec0 50static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 51static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 52static struct mutex qeth_mod_mutex;
4a71df50
FB		 53
54static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56static int qeth_issue_next_read(struct qeth_card *);
57static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59static void qeth_free_buffer_pool(struct qeth_card *);
60static int qeth_qdio_establish(struct qeth_card *);
0da9581d 61static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 62static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 66static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
72861ae7 69static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 70
4a71df50
FB		 71static inline const char *qeth_get_cardname(struct qeth_card *card)
72{
73 if (card->info.guestlan) {
74 switch (card->info.type) {
5113fec0 75 case QETH_CARD_TYPE_OSD:
7096b187 76 return " Virtual NIC QDIO";
4a71df50 77 case QETH_CARD_TYPE_IQD:
7096b187 78 return " Virtual NIC Hiper";
5113fec0 79 case QETH_CARD_TYPE_OSM:
7096b187 80 return " Virtual NIC QDIO - OSM";
5113fec0 81 case QETH_CARD_TYPE_OSX:
7096b187 82 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
5113fec0 88 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
5113fec0
UB		 94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
4a71df50
FB		 98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103}
104
105/* max length to be returned: 14 */
106const char *qeth_get_cardname_short(struct qeth_card *card)
107{
108 if (card->info.guestlan) {
109 switch (card->info.type) {
5113fec0 110 case QETH_CARD_TYPE_OSD:
7096b187 111 return "Virt.NIC QDIO";
4a71df50 112 case QETH_CARD_TYPE_IQD:
7096b187 113 return "Virt.NIC Hiper";
5113fec0 114 case QETH_CARD_TYPE_OSM:
7096b187 115 return "Virt.NIC OSM";
5113fec0 116 case QETH_CARD_TYPE_OSX:
7096b187 117 return "Virt.NIC OSX";
4a71df50
FB		 118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
5113fec0 123 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
5113fec0
UB		 148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
4a71df50
FB		 152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157}
158
159void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161{
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170}
171EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174{
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182}
183EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186{
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189}
190EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192void qeth_clear_working_pool_list(struct qeth_card *card)
193{
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
847a50fd 196 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201}
202EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204static int qeth_alloc_buffer_pool(struct qeth_card *card)
205{
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
847a50fd 210 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 218 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233}
234
235int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236{
847a50fd 237 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249}
76b11f8e 250EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 251
0da9581d
EL		 252static inline int qeth_cq_init(struct qeth_card *card)
253{
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270out:
271 return rc;
272}
273
274static inline int qeth_alloc_cq(struct qeth_card *card)
275{
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318out:
319 return rc;
320free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326}
327
328static inline void qeth_free_cq(struct qeth_card *card)
329{
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337}
338
b3332930
FB		 339static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361}
362
0da9581d
EL		 363static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365{
72861ae7
EL		 366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
0da9581d
EL		 369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
0da9581d 385 c = f->next_pending;
18af5c17 386 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
72861ae7
EL		 396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
0da9581d
EL		 403}
404
405
406static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
b3332930 410 enum iucv_tx_notify notification;
0da9581d
EL		 411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
b3332930
FB		 418 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
419 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
420 notification = TX_NOTIFY_OK;
421 } else {
18af5c17
SR		 422 WARN_ON_ONCE(atomic_read(&buffer->state) !=
423 QETH_QDIO_BUF_PENDING);
b3332930
FB		 424 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
425 notification = TX_NOTIFY_DELAYED_OK;
426 }
427
428 if (aob->aorc != 0) {
429 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
430 notification = qeth_compute_cq_notification(aob->aorc, 1);
431 }
432 qeth_notify_skbs(buffer->q, buffer, notification);
433
0da9581d
EL		 434 buffer->aob = NULL;
435 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 436 QETH_QDIO_BUF_HANDLED_DELAYED);
437
0da9581d
EL		 438 /* from here on: do not touch buffer anymore */
439 qdio_release_aob(aob);
440}
441
442static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
443{
444 return card->options.cq == QETH_CQ_ENABLED &&
445 card->qdio.c_q != NULL &&
446 queue != 0 &&
447 queue == card->qdio.no_in_queues - 1;
448}
449
450
4a71df50
FB		 451static int qeth_issue_next_read(struct qeth_card *card)
452{
453 int rc;
454 struct qeth_cmd_buffer *iob;
455
847a50fd 456 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 457 if (card->read.state != CH_STATE_UP)
458 return -EIO;
459 iob = qeth_get_buffer(&card->read);
460 if (!iob) {
74eacdb9
FB		 461 dev_warn(&card->gdev->dev, "The qeth device driver "
462 "failed to recover an error on the device\n");
463 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
464 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 465 return -ENOMEM;
466 }
467 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 468 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 469 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
470 (addr_t) iob, 0, 0);
471 if (rc) {
74eacdb9
FB		 472 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
473 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 474 atomic_set(&card->read.irq_pending, 0);
908abbb5 475 card->read_or_write_problem = 1;
4a71df50
FB		 476 qeth_schedule_recovery(card);
477 wake_up(&card->wait_q);
478 }
479 return rc;
480}
481
482static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
483{
484 struct qeth_reply *reply;
485
486 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
487 if (reply) {
488 atomic_set(&reply->refcnt, 1);
489 atomic_set(&reply->received, 0);
490 reply->card = card;
6531084c 491 }
4a71df50
FB		 492 return reply;
493}
494
495static void qeth_get_reply(struct qeth_reply *reply)
496{
497 WARN_ON(atomic_read(&reply->refcnt) <= 0);
498 atomic_inc(&reply->refcnt);
499}
500
501static void qeth_put_reply(struct qeth_reply *reply)
502{
503 WARN_ON(atomic_read(&reply->refcnt) <= 0);
504 if (atomic_dec_and_test(&reply->refcnt))
505 kfree(reply);
506}
507
d11ba0c4 508static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 509 struct qeth_card *card)
510{
4a71df50 511 char *ipa_name;
d11ba0c4 512 int com = cmd->hdr.command;
4a71df50 513 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 514 if (rc)
70919e23
UB		 515 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
516 "x%X \"%s\"\n",
517 ipa_name, com, dev_name(&card->gdev->dev),
518 QETH_CARD_IFNAME(card), rc,
519 qeth_get_ipa_msg(rc));
d11ba0c4 520 else
70919e23
UB		 521 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
522 ipa_name, com, dev_name(&card->gdev->dev),
523 QETH_CARD_IFNAME(card));
4a71df50
FB		 524}
525
526static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
527 struct qeth_cmd_buffer *iob)
528{
529 struct qeth_ipa_cmd *cmd = NULL;
530
847a50fd 531 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 532 if (IS_IPA(iob->data)) {
533 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
534 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 535 if (cmd->hdr.command != IPA_CMD_SETCCID &&
536 cmd->hdr.command != IPA_CMD_DELCCID &&
537 cmd->hdr.command != IPA_CMD_MODCCID &&
538 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 539 qeth_issue_ipa_msg(cmd,
540 cmd->hdr.return_code, card);
4a71df50
FB		 541 return cmd;
542 } else {
543 switch (cmd->hdr.command) {
544 case IPA_CMD_STOPLAN:
74eacdb9
FB		 545 dev_warn(&card->gdev->dev,
546 "The link for interface %s on CHPID"
547 " 0x%X failed\n",
4a71df50
FB		 548 QETH_CARD_IFNAME(card),
549 card->info.chpid);
550 card->lan_online = 0;
551 if (card->dev && netif_carrier_ok(card->dev))
552 netif_carrier_off(card->dev);
553 return NULL;
554 case IPA_CMD_STARTLAN:
74eacdb9
FB		 555 dev_info(&card->gdev->dev,
556 "The link for %s on CHPID 0x%X has"
557 " been restored\n",
4a71df50
FB		 558 QETH_CARD_IFNAME(card),
559 card->info.chpid);
560 netif_carrier_on(card->dev);
922dc062 561 card->lan_online = 1;
1da74b1c
FB		 562 if (card->info.hwtrap)
563 card->info.hwtrap = 2;
4a71df50
FB		 564 qeth_schedule_recovery(card);
565 return NULL;
566 case IPA_CMD_MODCCID:
567 return cmd;
568 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 569 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 570 break;
571 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 572 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 573 break;
574 default:
c4cef07c 575 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 576 "but not a reply!\n");
577 break;
578 }
579 }
580 }
581 return cmd;
582}
583
584void qeth_clear_ipacmd_list(struct qeth_card *card)
585{
586 struct qeth_reply *reply, *r;
587 unsigned long flags;
588
847a50fd 589 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 590
591 spin_lock_irqsave(&card->lock, flags);
592 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
593 qeth_get_reply(reply);
594 reply->rc = -EIO;
595 atomic_inc(&reply->received);
596 list_del_init(&reply->list);
597 wake_up(&reply->wait_q);
598 qeth_put_reply(reply);
599 }
600 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 601 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 602}
603EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
604
5113fec0
UB		 605static int qeth_check_idx_response(struct qeth_card *card,
606 unsigned char *buffer)
4a71df50
FB		 607{
608 if (!buffer)
609 return 0;
610
d11ba0c4 611 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 612 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 613 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 614 "with cause code 0x%02x%s\n",
615 buffer[4],
616 ((buffer[4] == 0x22) ?
617 " -- try another portname" : ""));
847a50fd
CO		 618 QETH_CARD_TEXT(card, 2, "ckidxres");
619 QETH_CARD_TEXT(card, 2, " idxterm");
620 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 621 if (buffer[4] == 0xf6) {
622 dev_err(&card->gdev->dev,
623 "The qeth device is not configured "
624 "for the OSI layer required by z/VM\n");
625 return -EPERM;
626 }
4a71df50
FB		 627 return -EIO;
628 }
629 return 0;
630}
631
632static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
633 __u32 len)
634{
635 struct qeth_card *card;
636
4a71df50 637 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 638 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 639 if (channel == &card->read)
640 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
641 else
642 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
643 channel->ccw.count = len;
644 channel->ccw.cda = (__u32) __pa(iob);
645}
646
647static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
648{
649 __u8 index;
650
847a50fd 651 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 652 index = channel->io_buf_no;
653 do {
654 if (channel->iob[index].state == BUF_STATE_FREE) {
655 channel->iob[index].state = BUF_STATE_LOCKED;
656 channel->io_buf_no = (channel->io_buf_no + 1) %
657 QETH_CMD_BUFFER_NO;
658 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
659 return channel->iob + index;
660 }
661 index = (index + 1) % QETH_CMD_BUFFER_NO;
662 } while (index != channel->io_buf_no);
663
664 return NULL;
665}
666
667void qeth_release_buffer(struct qeth_channel *channel,
668 struct qeth_cmd_buffer *iob)
669{
670 unsigned long flags;
671
847a50fd 672 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 673 spin_lock_irqsave(&channel->iob_lock, flags);
674 memset(iob->data, 0, QETH_BUFSIZE);
675 iob->state = BUF_STATE_FREE;
676 iob->callback = qeth_send_control_data_cb;
677 iob->rc = 0;
678 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 679 wake_up(&channel->wait_q);
4a71df50
FB		 680}
681EXPORT_SYMBOL_GPL(qeth_release_buffer);
682
683static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
684{
685 struct qeth_cmd_buffer *buffer = NULL;
686 unsigned long flags;
687
688 spin_lock_irqsave(&channel->iob_lock, flags);
689 buffer = __qeth_get_buffer(channel);
690 spin_unlock_irqrestore(&channel->iob_lock, flags);
691 return buffer;
692}
693
694struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
695{
696 struct qeth_cmd_buffer *buffer;
697 wait_event(channel->wait_q,
698 ((buffer = qeth_get_buffer(channel)) != NULL));
699 return buffer;
700}
701EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
702
703void qeth_clear_cmd_buffers(struct qeth_channel *channel)
704{
705 int cnt;
706
707 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
708 qeth_release_buffer(channel, &channel->iob[cnt]);
709 channel->buf_no = 0;
710 channel->io_buf_no = 0;
711}
712EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
713
714static void qeth_send_control_data_cb(struct qeth_channel *channel,
715 struct qeth_cmd_buffer *iob)
716{
717 struct qeth_card *card;
718 struct qeth_reply *reply, *r;
719 struct qeth_ipa_cmd *cmd;
720 unsigned long flags;
721 int keep_reply;
5113fec0 722 int rc = 0;
4a71df50 723
4a71df50 724 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 725 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 726 rc = qeth_check_idx_response(card, iob->data);
727 switch (rc) {
728 case 0:
729 break;
730 case -EIO:
4a71df50 731 qeth_clear_ipacmd_list(card);
5113fec0 732 qeth_schedule_recovery(card);
01fc3e86 733 /* fall through */
5113fec0 734 default:
4a71df50
FB		 735 goto out;
736 }
737
738 cmd = qeth_check_ipa_data(card, iob);
739 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
740 goto out;
741 /*in case of OSN : check if cmd is set */
742 if (card->info.type == QETH_CARD_TYPE_OSN &&
743 cmd &&
744 cmd->hdr.command != IPA_CMD_STARTLAN &&
745 card->osn_info.assist_cb != NULL) {
746 card->osn_info.assist_cb(card->dev, cmd);
747 goto out;
748 }
749
750 spin_lock_irqsave(&card->lock, flags);
751 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
752 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
753 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
754 qeth_get_reply(reply);
755 list_del_init(&reply->list);
756 spin_unlock_irqrestore(&card->lock, flags);
757 keep_reply = 0;
758 if (reply->callback != NULL) {
759 if (cmd) {
760 reply->offset = (__u16)((char *)cmd -
761 (char *)iob->data);
762 keep_reply = reply->callback(card,
763 reply,
764 (unsigned long)cmd);
765 } else
766 keep_reply = reply->callback(card,
767 reply,
768 (unsigned long)iob);
769 }
770 if (cmd)
771 reply->rc = (u16) cmd->hdr.return_code;
772 else if (iob->rc)
773 reply->rc = iob->rc;
774 if (keep_reply) {
775 spin_lock_irqsave(&card->lock, flags);
776 list_add_tail(&reply->list,
777 &card->cmd_waiter_list);
778 spin_unlock_irqrestore(&card->lock, flags);
779 } else {
780 atomic_inc(&reply->received);
781 wake_up(&reply->wait_q);
782 }
783 qeth_put_reply(reply);
784 goto out;
785 }
786 }
787 spin_unlock_irqrestore(&card->lock, flags);
788out:
789 memcpy(&card->seqno.pdu_hdr_ack,
790 QETH_PDU_HEADER_SEQ_NO(iob->data),
791 QETH_SEQ_NO_LENGTH);
792 qeth_release_buffer(channel, iob);
793}
794
795static int qeth_setup_channel(struct qeth_channel *channel)
796{
797 int cnt;
798
d11ba0c4 799 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 800 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 801 channel->iob[cnt].data =
b3332930 802 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 803 if (channel->iob[cnt].data == NULL)
804 break;
805 channel->iob[cnt].state = BUF_STATE_FREE;
806 channel->iob[cnt].channel = channel;
807 channel->iob[cnt].callback = qeth_send_control_data_cb;
808 channel->iob[cnt].rc = 0;
809 }
810 if (cnt < QETH_CMD_BUFFER_NO) {
811 while (cnt-- > 0)
812 kfree(channel->iob[cnt].data);
813 return -ENOMEM;
814 }
815 channel->buf_no = 0;
816 channel->io_buf_no = 0;
817 atomic_set(&channel->irq_pending, 0);
818 spin_lock_init(&channel->iob_lock);
819
820 init_waitqueue_head(&channel->wait_q);
821 return 0;
822}
823
824static int qeth_set_thread_start_bit(struct qeth_card *card,
825 unsigned long thread)
826{
827 unsigned long flags;
828
829 spin_lock_irqsave(&card->thread_mask_lock, flags);
830 if (!(card->thread_allowed_mask & thread) ||
831 (card->thread_start_mask & thread)) {
832 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
833 return -EPERM;
834 }
835 card->thread_start_mask |= thread;
836 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
837 return 0;
838}
839
840void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
841{
842 unsigned long flags;
843
844 spin_lock_irqsave(&card->thread_mask_lock, flags);
845 card->thread_start_mask &= ~thread;
846 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
847 wake_up(&card->wait_q);
848}
849EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
850
851void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
852{
853 unsigned long flags;
854
855 spin_lock_irqsave(&card->thread_mask_lock, flags);
856 card->thread_running_mask &= ~thread;
857 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
858 wake_up(&card->wait_q);
859}
860EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
861
862static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
863{
864 unsigned long flags;
865 int rc = 0;
866
867 spin_lock_irqsave(&card->thread_mask_lock, flags);
868 if (card->thread_start_mask & thread) {
869 if ((card->thread_allowed_mask & thread) &&
870 !(card->thread_running_mask & thread)) {
871 rc = 1;
872 card->thread_start_mask &= ~thread;
873 card->thread_running_mask |= thread;
874 } else
875 rc = -EPERM;
876 }
877 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
878 return rc;
879}
880
881int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
882{
883 int rc = 0;
884
885 wait_event(card->wait_q,
886 (rc = __qeth_do_run_thread(card, thread)) >= 0);
887 return rc;
888}
889EXPORT_SYMBOL_GPL(qeth_do_run_thread);
890
891void qeth_schedule_recovery(struct qeth_card *card)
892{
847a50fd 893 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 894 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
895 schedule_work(&card->kernel_thread_starter);
896}
897EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
898
899static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
900{
901 int dstat, cstat;
902 char *sense;
847a50fd 903 struct qeth_card *card;
4a71df50
FB		 904
905 sense = (char *) irb->ecw;
23d805b6
PO		 906 cstat = irb->scsw.cmd.cstat;
907 dstat = irb->scsw.cmd.dstat;
847a50fd 908 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 909
910 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
911 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
912 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 913 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 914 dev_warn(&cdev->dev, "The qeth device driver "
915 "failed to recover an error on the device\n");
5113fec0 916 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 917 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 918 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
919 16, 1, irb, 64, 1);
920 return 1;
921 }
922
923 if (dstat & DEV_STAT_UNIT_CHECK) {
924 if (sense[SENSE_RESETTING_EVENT_BYTE] &
925 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 926 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 927 return 1;
928 }
929 if (sense[SENSE_COMMAND_REJECT_BYTE] &
930 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 931 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 932 return 1;
4a71df50
FB		 933 }
934 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 935 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 936 return 1;
937 }
938 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 939 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 940 return 0;
941 }
847a50fd 942 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 943 return 1;
944 }
945 return 0;
946}
947
948static long __qeth_check_irb_error(struct ccw_device *cdev,
949 unsigned long intparm, struct irb *irb)
950{
847a50fd
CO		 951 struct qeth_card *card;
952
953 card = CARD_FROM_CDEV(cdev);
954
4a71df50
FB		 955 if (!IS_ERR(irb))
956 return 0;
957
958 switch (PTR_ERR(irb)) {
959 case -EIO:
74eacdb9
FB		 960 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
961 dev_name(&cdev->dev));
847a50fd
CO		 962 QETH_CARD_TEXT(card, 2, "ckirberr");
963 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 964 break;
965 case -ETIMEDOUT:
74eacdb9
FB		 966 dev_warn(&cdev->dev, "A hardware operation timed out"
967 " on the device\n");
847a50fd
CO		 968 QETH_CARD_TEXT(card, 2, "ckirberr");
969 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 970 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 971 if (card && (card->data.ccwdev == cdev)) {
972 card->data.state = CH_STATE_DOWN;
973 wake_up(&card->wait_q);
974 }
975 }
976 break;
977 default:
74eacdb9
FB		 978 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
979 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 980 QETH_CARD_TEXT(card, 2, "ckirberr");
981 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 982 }
983 return PTR_ERR(irb);
984}
985
986static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
987 struct irb *irb)
988{
989 int rc;
990 int cstat, dstat;
991 struct qeth_cmd_buffer *buffer;
992 struct qeth_channel *channel;
993 struct qeth_card *card;
994 struct qeth_cmd_buffer *iob;
995 __u8 index;
996
4a71df50
FB		 997 if (__qeth_check_irb_error(cdev, intparm, irb))
998 return;
23d805b6
PO		 999 cstat = irb->scsw.cmd.cstat;
1000 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1001
1002 card = CARD_FROM_CDEV(cdev);
1003 if (!card)
1004 return;
1005
847a50fd
CO		 1006 QETH_CARD_TEXT(card, 5, "irq");
1007
4a71df50
FB		 1008 if (card->read.ccwdev == cdev) {
1009 channel = &card->read;
847a50fd 1010 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1011 } else if (card->write.ccwdev == cdev) {
1012 channel = &card->write;
847a50fd 1013 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1014 } else {
1015 channel = &card->data;
847a50fd 1016 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1017 }
1018 atomic_set(&channel->irq_pending, 0);
1019
23d805b6 1020 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1021 channel->state = CH_STATE_STOPPED;
1022
23d805b6 1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1024 channel->state = CH_STATE_HALTED;
1025
1026 /*let's wake up immediately on data channel*/
1027 if ((channel == &card->data) && (intparm != 0) &&
1028 (intparm != QETH_RCD_PARM))
1029 goto out;
1030
1031 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1032 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1033 /* we don't have to handle this further */
1034 intparm = 0;
1035 }
1036 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1037 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1038 /* we don't have to handle this further */
1039 intparm = 0;
1040 }
1041 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1042 (dstat & DEV_STAT_UNIT_CHECK) ||
1043 (cstat)) {
1044 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1045 dev_warn(&channel->ccwdev->dev,
1046 "The qeth device driver failed to recover "
1047 "an error on the device\n");
1048 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1049 "0x%X dstat 0x%X\n",
1050 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1051 print_hex_dump(KERN_WARNING, "qeth: irb ",
1052 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1053 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1054 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1055 }
1056 if (intparm == QETH_RCD_PARM) {
1057 channel->state = CH_STATE_DOWN;
1058 goto out;
1059 }
1060 rc = qeth_get_problem(cdev, irb);
1061 if (rc) {
28a7e4c9 1062 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1063 qeth_schedule_recovery(card);
1064 goto out;
1065 }
1066 }
1067
1068 if (intparm == QETH_RCD_PARM) {
1069 channel->state = CH_STATE_RCD_DONE;
1070 goto out;
1071 }
1072 if (intparm) {
1073 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1074 buffer->state = BUF_STATE_PROCESSED;
1075 }
1076 if (channel == &card->data)
1077 return;
1078 if (channel == &card->read &&
1079 channel->state == CH_STATE_UP)
1080 qeth_issue_next_read(card);
1081
1082 iob = channel->iob;
1083 index = channel->buf_no;
1084 while (iob[index].state == BUF_STATE_PROCESSED) {
1085 if (iob[index].callback != NULL)
1086 iob[index].callback(channel, iob + index);
1087
1088 index = (index + 1) % QETH_CMD_BUFFER_NO;
1089 }
1090 channel->buf_no = index;
1091out:
1092 wake_up(&card->wait_q);
1093 return;
1094}
1095
b3332930 1096static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1097 struct qeth_qdio_out_buffer *buf,
b3332930 1098 enum iucv_tx_notify notification)
4a71df50 1099{
4a71df50
FB		 1100 struct sk_buff *skb;
1101
b3332930
FB		 1102 if (skb_queue_empty(&buf->skb_list))
1103 goto out;
1104 skb = skb_peek(&buf->skb_list);
1105 while (skb) {
1106 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1107 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1108 if (skb->protocol == ETH_P_AF_IUCV) {
1109 if (skb->sk) {
1110 struct iucv_sock *iucv = iucv_sk(skb->sk);
1111 iucv->sk_txnotify(skb, notification);
1112 }
1113 }
1114 if (skb_queue_is_last(&buf->skb_list, skb))
1115 skb = NULL;
1116 else
1117 skb = skb_queue_next(&buf->skb_list, skb);
1118 }
1119out:
1120 return;
1121}
1122
1123static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1124{
1125 struct sk_buff *skb;
72861ae7
EL		 1126 struct iucv_sock *iucv;
1127 int notify_general_error = 0;
1128
1129 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1130 notify_general_error = 1;
1131
1132 /* release may never happen from within CQ tasklet scope */
18af5c17 1133 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1134
b67d801f
UB		 1135 skb = skb_dequeue(&buf->skb_list);
1136 while (skb) {
b3332930
FB		 1137 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1138 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1139 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1140 if (skb->sk) {
1141 iucv = iucv_sk(skb->sk);
1142 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1143 }
1144 }
b67d801f
UB		 1145 atomic_dec(&skb->users);
1146 dev_kfree_skb_any(skb);
4a71df50
FB		 1147 skb = skb_dequeue(&buf->skb_list);
1148 }
b3332930
FB		 1149}
1150
1151static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1152 struct qeth_qdio_out_buffer *buf,
1153 enum qeth_qdio_buffer_states newbufstate)
1154{
1155 int i;
1156
1157 /* is PCI flag set on buffer? */
1158 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1159 atomic_dec(&queue->set_pci_flags_count);
1160
1161 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1162 qeth_release_skbs(buf);
1163 }
4a71df50 1164 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1165 if (buf->buffer->element[i].addr && buf->is_header[i])
1166 kmem_cache_free(qeth_core_header_cache,
1167 buf->buffer->element[i].addr);
1168 buf->is_header[i] = 0;
4a71df50
FB		 1169 buf->buffer->element[i].length = 0;
1170 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1171 buf->buffer->element[i].eflags = 0;
1172 buf->buffer->element[i].sflags = 0;
4a71df50 1173 }
3ec90878
JG		 1174 buf->buffer->element[15].eflags = 0;
1175 buf->buffer->element[15].sflags = 0;
4a71df50 1176 buf->next_element_to_fill = 0;
0da9581d
EL		 1177 atomic_set(&buf->state, newbufstate);
1178}
1179
1180static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1181{
1182 int j;
1183
1184 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1185 if (!q->bufs[j])
1186 continue;
72861ae7 1187 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1188 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1189 if (free) {
1190 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1191 q->bufs[j] = NULL;
1192 }
1193 }
4a71df50
FB		 1194}
1195
1196void qeth_clear_qdio_buffers(struct qeth_card *card)
1197{
0da9581d 1198 int i;
4a71df50 1199
847a50fd 1200 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1201 /* clear outbound buffers to free skbs */
0da9581d 1202 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1203 if (card->qdio.out_qs[i]) {
0da9581d 1204 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1205 }
0da9581d 1206 }
4a71df50
FB		 1207}
1208EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1209
1210static void qeth_free_buffer_pool(struct qeth_card *card)
1211{
1212 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1213 int i = 0;
4a71df50
FB		 1214 list_for_each_entry_safe(pool_entry, tmp,
1215 &card->qdio.init_pool.entry_list, init_list){
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1217 free_page((unsigned long)pool_entry->elements[i]);
1218 list_del(&pool_entry->init_list);
1219 kfree(pool_entry);
1220 }
1221}
1222
1223static void qeth_free_qdio_buffers(struct qeth_card *card)
1224{
b3332930 1225 int i, j;
4a71df50 1226
4a71df50
FB		 1227 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1228 QETH_QDIO_UNINITIALIZED)
1229 return;
0da9581d
EL		 1230
1231 qeth_free_cq(card);
b3332930
FB		 1232 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1233 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
72861ae7 1234 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1235 kfree(card->qdio.in_q);
1236 card->qdio.in_q = NULL;
1237 /* inbound buffer pool */
1238 qeth_free_buffer_pool(card);
1239 /* free outbound qdio_qs */
1240 if (card->qdio.out_qs) {
1241 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1242 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1243 kfree(card->qdio.out_qs[i]);
1244 }
1245 kfree(card->qdio.out_qs);
1246 card->qdio.out_qs = NULL;
1247 }
1248}
1249
1250static void qeth_clean_channel(struct qeth_channel *channel)
1251{
1252 int cnt;
1253
d11ba0c4 1254 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1255 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1256 kfree(channel->iob[cnt].data);
1257}
1258
725b9c04
SO		 1259static void qeth_set_single_write_queues(struct qeth_card *card)
1260{
1261 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1262 (card->qdio.no_out_queues == 4))
1263 qeth_free_qdio_buffers(card);
1264
1265 card->qdio.no_out_queues = 1;
1266 if (card->qdio.default_out_queue != 0)
1267 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1268
1269 card->qdio.default_out_queue = 0;
1270}
1271
1272static void qeth_set_multiple_write_queues(struct qeth_card *card)
1273{
1274 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1275 (card->qdio.no_out_queues == 1)) {
1276 qeth_free_qdio_buffers(card);
1277 card->qdio.default_out_queue = 2;
1278 }
1279 card->qdio.no_out_queues = 4;
1280}
1281
1282static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1283{
4a71df50
FB		 1284 struct ccw_device *ccwdev;
1285 struct channelPath_dsc {
1286 u8 flags;
1287 u8 lsn;
1288 u8 desc;
1289 u8 chpid;
1290 u8 swla;
1291 u8 zeroes;
1292 u8 chla;
1293 u8 chpp;
1294 } *chp_dsc;
1295
5113fec0 1296 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1297
1298 ccwdev = card->data.ccwdev;
725b9c04
SO		 1299 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1300 if (!chp_dsc)
1301 goto out;
1302
1303 card->info.func_level = 0x4100 + chp_dsc->desc;
1304 if (card->info.type == QETH_CARD_TYPE_IQD)
1305 goto out;
1306
1307 /* CHPP field bit 6 == 1 -> single queue */
1308 if ((chp_dsc->chpp & 0x02) == 0x02)
1309 qeth_set_single_write_queues(card);
1310 else
1311 qeth_set_multiple_write_queues(card);
1312out:
1313 kfree(chp_dsc);
5113fec0
UB		 1314 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1315 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1316}
1317
1318static void qeth_init_qdio_info(struct qeth_card *card)
1319{
d11ba0c4 1320 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1321 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1322 /* inbound */
1323 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1324 if (card->info.type == QETH_CARD_TYPE_IQD)
1325 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1326 else
1327 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1328 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1329 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1330 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1331}
1332
1333static void qeth_set_intial_options(struct qeth_card *card)
1334{
1335 card->options.route4.type = NO_ROUTER;
1336 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1337 card->options.fake_broadcast = 0;
1338 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1339 card->options.performance_stats = 0;
1340 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1341 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1342 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1343}
1344
1345static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1346{
1347 unsigned long flags;
1348 int rc = 0;
1349
1350 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1351 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1352 (u8) card->thread_start_mask,
1353 (u8) card->thread_allowed_mask,
1354 (u8) card->thread_running_mask);
1355 rc = (card->thread_start_mask & thread);
1356 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1357 return rc;
1358}
1359
1360static void qeth_start_kernel_thread(struct work_struct *work)
1361{
3f36b890 1362 struct task_struct *ts;
4a71df50
FB		 1363 struct qeth_card *card = container_of(work, struct qeth_card,
1364 kernel_thread_starter);
847a50fd 1365 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1366
1367 if (card->read.state != CH_STATE_UP &&
1368 card->write.state != CH_STATE_UP)
1369 return;
3f36b890 1370 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1371 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1372 "qeth_recover");
3f36b890
FB		 1373 if (IS_ERR(ts)) {
1374 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1375 qeth_clear_thread_running_bit(card,
1376 QETH_RECOVER_THREAD);
1377 }
1378 }
4a71df50
FB		 1379}
1380
1381static int qeth_setup_card(struct qeth_card *card)
1382{
1383
d11ba0c4
PT		 1384 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1385 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1386
1387 card->read.state = CH_STATE_DOWN;
1388 card->write.state = CH_STATE_DOWN;
1389 card->data.state = CH_STATE_DOWN;
1390 card->state = CARD_STATE_DOWN;
1391 card->lan_online = 0;
908abbb5 1392 card->read_or_write_problem = 0;
4a71df50
FB		 1393 card->dev = NULL;
1394 spin_lock_init(&card->vlanlock);
1395 spin_lock_init(&card->mclock);
4a71df50
FB		 1396 spin_lock_init(&card->lock);
1397 spin_lock_init(&card->ip_lock);
1398 spin_lock_init(&card->thread_mask_lock);
c4949f07 1399 mutex_init(&card->conf_mutex);
9dc48ccc 1400 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1401 card->thread_start_mask = 0;
1402 card->thread_allowed_mask = 0;
1403 card->thread_running_mask = 0;
1404 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1405 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1406 INIT_LIST_HEAD(card->ip_tbd_list);
1407 INIT_LIST_HEAD(&card->cmd_waiter_list);
1408 init_waitqueue_head(&card->wait_q);
25985edc 1409 /* initial options */
4a71df50
FB		 1410 qeth_set_intial_options(card);
1411 /* IP address takeover */
1412 INIT_LIST_HEAD(&card->ipato.entries);
1413 card->ipato.enabled = 0;
1414 card->ipato.invert4 = 0;
1415 card->ipato.invert6 = 0;
1416 /* init QDIO stuff */
1417 qeth_init_qdio_info(card);
b3332930 1418 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1419 return 0;
1420}
1421
6bcac508
MS		 1422static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1423{
1424 struct qeth_card *card = container_of(slr, struct qeth_card,
1425 qeth_service_level);
0d788c7d
KDW		 1426 if (card->info.mcl_level[0])
1427 seq_printf(m, "qeth: %s firmware level %s\n",
1428 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1429}
1430
4a71df50
FB		 1431static struct qeth_card *qeth_alloc_card(void)
1432{
1433 struct qeth_card *card;
1434
d11ba0c4 1435 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1436 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1437 if (!card)
76b11f8e 1438 goto out;
d11ba0c4 1439 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1440 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1441 if (!card->ip_tbd_list) {
1442 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1443 goto out_card;
4a71df50 1444 }
76b11f8e
UB		 1445 if (qeth_setup_channel(&card->read))
1446 goto out_ip;
1447 if (qeth_setup_channel(&card->write))
1448 goto out_channel;
4a71df50 1449 card->options.layer2 = -1;
6bcac508
MS		 1450 card->qeth_service_level.seq_print = qeth_core_sl_print;
1451 register_service_level(&card->qeth_service_level);
4a71df50 1452 return card;
76b11f8e
UB		 1453
1454out_channel:
1455 qeth_clean_channel(&card->read);
1456out_ip:
1457 kfree(card->ip_tbd_list);
1458out_card:
1459 kfree(card);
1460out:
1461 return NULL;
4a71df50
FB		 1462}
1463
1464static int qeth_determine_card_type(struct qeth_card *card)
1465{
1466 int i = 0;
1467
d11ba0c4 1468 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1469
1470 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1471 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1472 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1473 if ((CARD_RDEV(card)->id.dev_type ==
1474 known_devices[i][QETH_DEV_TYPE_IND]) &&
1475 (CARD_RDEV(card)->id.dev_model ==
1476 known_devices[i][QETH_DEV_MODEL_IND])) {
1477 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1478 card->qdio.no_out_queues =
1479 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1480 card->qdio.no_in_queues = 1;
5113fec0
UB		 1481 card->info.is_multicast_different =
1482 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1483 qeth_update_from_chp_desc(card);
4a71df50
FB		 1484 return 0;
1485 }
1486 i++;
1487 }
1488 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1489 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1490 "unknown type\n");
4a71df50
FB		 1491 return -ENOENT;
1492}
1493
1494static int qeth_clear_channel(struct qeth_channel *channel)
1495{
1496 unsigned long flags;
1497 struct qeth_card *card;
1498 int rc;
1499
4a71df50 1500 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1501 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1502 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1503 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1504 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1505
1506 if (rc)
1507 return rc;
1508 rc = wait_event_interruptible_timeout(card->wait_q,
1509 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1510 if (rc == -ERESTARTSYS)
1511 return rc;
1512 if (channel->state != CH_STATE_STOPPED)
1513 return -ETIME;
1514 channel->state = CH_STATE_DOWN;
1515 return 0;
1516}
1517
1518static int qeth_halt_channel(struct qeth_channel *channel)
1519{
1520 unsigned long flags;
1521 struct qeth_card *card;
1522 int rc;
1523
4a71df50 1524 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1525 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1526 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1527 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1528 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1529
1530 if (rc)
1531 return rc;
1532 rc = wait_event_interruptible_timeout(card->wait_q,
1533 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1534 if (rc == -ERESTARTSYS)
1535 return rc;
1536 if (channel->state != CH_STATE_HALTED)
1537 return -ETIME;
1538 return 0;
1539}
1540
1541static int qeth_halt_channels(struct qeth_card *card)
1542{
1543 int rc1 = 0, rc2 = 0, rc3 = 0;
1544
847a50fd 1545 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1546 rc1 = qeth_halt_channel(&card->read);
1547 rc2 = qeth_halt_channel(&card->write);
1548 rc3 = qeth_halt_channel(&card->data);
1549 if (rc1)
1550 return rc1;
1551 if (rc2)
1552 return rc2;
1553 return rc3;
1554}
1555
1556static int qeth_clear_channels(struct qeth_card *card)
1557{
1558 int rc1 = 0, rc2 = 0, rc3 = 0;
1559
847a50fd 1560 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1561 rc1 = qeth_clear_channel(&card->read);
1562 rc2 = qeth_clear_channel(&card->write);
1563 rc3 = qeth_clear_channel(&card->data);
1564 if (rc1)
1565 return rc1;
1566 if (rc2)
1567 return rc2;
1568 return rc3;
1569}
1570
1571static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1572{
1573 int rc = 0;
1574
847a50fd 1575 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1576
1577 if (halt)
1578 rc = qeth_halt_channels(card);
1579 if (rc)
1580 return rc;
1581 return qeth_clear_channels(card);
1582}
1583
1584int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1585{
1586 int rc = 0;
1587
847a50fd 1588 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1589 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1590 QETH_QDIO_CLEANING)) {
1591 case QETH_QDIO_ESTABLISHED:
1592 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1593 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1594 QDIO_FLAG_CLEANUP_USING_HALT);
1595 else
cc961d40 1596 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1597 QDIO_FLAG_CLEANUP_USING_CLEAR);
1598 if (rc)
847a50fd 1599 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1600 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1601 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1602 break;
1603 case QETH_QDIO_CLEANING:
1604 return rc;
1605 default:
1606 break;
1607 }
1608 rc = qeth_clear_halt_card(card, use_halt);
1609 if (rc)
847a50fd 1610 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1611 card->state = CARD_STATE_DOWN;
1612 return rc;
1613}
1614EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1615
1616static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1617 int *length)
1618{
1619 struct ciw *ciw;
1620 char *rcd_buf;
1621 int ret;
1622 struct qeth_channel *channel = &card->data;
1623 unsigned long flags;
1624
1625 /*
1626 * scan for RCD command in extended SenseID data
1627 */
1628 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1629 if (!ciw || ciw->cmd == 0)
1630 return -EOPNOTSUPP;
1631 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1632 if (!rcd_buf)
1633 return -ENOMEM;
1634
1635 channel->ccw.cmd_code = ciw->cmd;
1636 channel->ccw.cda = (__u32) __pa(rcd_buf);
1637 channel->ccw.count = ciw->count;
1638 channel->ccw.flags = CCW_FLAG_SLI;
1639 channel->state = CH_STATE_RCD;
1640 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1641 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1642 QETH_RCD_PARM, LPM_ANYPATH, 0,
1643 QETH_RCD_TIMEOUT);
1644 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1645 if (!ret)
1646 wait_event(card->wait_q,
1647 (channel->state == CH_STATE_RCD_DONE ||
1648 channel->state == CH_STATE_DOWN));
1649 if (channel->state == CH_STATE_DOWN)
1650 ret = -EIO;
1651 else
1652 channel->state = CH_STATE_DOWN;
1653 if (ret) {
1654 kfree(rcd_buf);
1655 *buffer = NULL;
1656 *length = 0;
1657 } else {
1658 *length = ciw->count;
1659 *buffer = rcd_buf;
1660 }
1661 return ret;
1662}
1663
a60389ab 1664static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1665{
a60389ab 1666 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1667 card->info.chpid = prcd[30];
1668 card->info.unit_addr2 = prcd[31];
1669 card->info.cula = prcd[63];
1670 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1671 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1672}
1673
1674static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1675{
1676 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1677
e6e056ba
SR		 1678 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1679 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
a60389ab
EL		 1680 card->info.blkt.time_total = 250;
1681 card->info.blkt.inter_packet = 5;
1682 card->info.blkt.inter_packet_jumbo = 15;
1683 } else {
1684 card->info.blkt.time_total = 0;
1685 card->info.blkt.inter_packet = 0;
1686 card->info.blkt.inter_packet_jumbo = 0;
1687 }
4a71df50
FB		 1688}
1689
1690static void qeth_init_tokens(struct qeth_card *card)
1691{
1692 card->token.issuer_rm_w = 0x00010103UL;
1693 card->token.cm_filter_w = 0x00010108UL;
1694 card->token.cm_connection_w = 0x0001010aUL;
1695 card->token.ulp_filter_w = 0x0001010bUL;
1696 card->token.ulp_connection_w = 0x0001010dUL;
1697}
1698
1699static void qeth_init_func_level(struct qeth_card *card)
1700{
5113fec0
UB		 1701 switch (card->info.type) {
1702 case QETH_CARD_TYPE_IQD:
6298263a 1703 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1704 break;
1705 case QETH_CARD_TYPE_OSD:
0132951e 1706 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1707 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1708 break;
1709 default:
1710 break;
4a71df50
FB		 1711 }
1712}
1713
4a71df50
FB		 1714static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1715 void (*idx_reply_cb)(struct qeth_channel *,
1716 struct qeth_cmd_buffer *))
1717{
1718 struct qeth_cmd_buffer *iob;
1719 unsigned long flags;
1720 int rc;
1721 struct qeth_card *card;
1722
d11ba0c4 1723 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1724 card = CARD_FROM_CDEV(channel->ccwdev);
1725 iob = qeth_get_buffer(channel);
1726 iob->callback = idx_reply_cb;
1727 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1728 channel->ccw.count = QETH_BUFSIZE;
1729 channel->ccw.cda = (__u32) __pa(iob->data);
1730
1731 wait_event(card->wait_q,
1732 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1733 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1734 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1735 rc = ccw_device_start(channel->ccwdev,
1736 &channel->ccw, (addr_t) iob, 0, 0);
1737 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1738
1739 if (rc) {
14cc21b6 1740 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1741 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1742 atomic_set(&channel->irq_pending, 0);
1743 wake_up(&card->wait_q);
1744 return rc;
1745 }
1746 rc = wait_event_interruptible_timeout(card->wait_q,
1747 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1748 if (rc == -ERESTARTSYS)
1749 return rc;
1750 if (channel->state != CH_STATE_UP) {
1751 rc = -ETIME;
d11ba0c4 1752 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1753 qeth_clear_cmd_buffers(channel);
1754 } else
1755 rc = 0;
1756 return rc;
1757}
1758
1759static int qeth_idx_activate_channel(struct qeth_channel *channel,
1760 void (*idx_reply_cb)(struct qeth_channel *,
1761 struct qeth_cmd_buffer *))
1762{
1763 struct qeth_card *card;
1764 struct qeth_cmd_buffer *iob;
1765 unsigned long flags;
1766 __u16 temp;
1767 __u8 tmp;
1768 int rc;
f06f6f32 1769 struct ccw_dev_id temp_devid;
4a71df50
FB		 1770
1771 card = CARD_FROM_CDEV(channel->ccwdev);
1772
d11ba0c4 1773 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1774
1775 iob = qeth_get_buffer(channel);
1776 iob->callback = idx_reply_cb;
1777 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1778 channel->ccw.count = IDX_ACTIVATE_SIZE;
1779 channel->ccw.cda = (__u32) __pa(iob->data);
1780 if (channel == &card->write) {
1781 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1782 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1783 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1784 card->seqno.trans_hdr++;
1785 } else {
1786 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1787 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1788 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1789 }
1790 tmp = ((__u8)card->info.portno) | 0x80;
1791 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1792 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1793 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1794 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1795 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1796 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1797 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1798 temp = (card->info.cula << 8) + card->info.unit_addr2;
1799 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1800
1801 wait_event(card->wait_q,
1802 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1803 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1804 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1805 rc = ccw_device_start(channel->ccwdev,
1806 &channel->ccw, (addr_t) iob, 0, 0);
1807 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1808
1809 if (rc) {
14cc21b6
FB		 1810 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1811 rc);
d11ba0c4 1812 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1813 atomic_set(&channel->irq_pending, 0);
1814 wake_up(&card->wait_q);
1815 return rc;
1816 }
1817 rc = wait_event_interruptible_timeout(card->wait_q,
1818 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1819 if (rc == -ERESTARTSYS)
1820 return rc;
1821 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1822 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1823 " failed to recover an error on the device\n");
1824 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1825 dev_name(&channel->ccwdev->dev));
d11ba0c4 1826 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1827 qeth_clear_cmd_buffers(channel);
1828 return -ETIME;
1829 }
1830 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1831}
1832
1833static int qeth_peer_func_level(int level)
1834{
1835 if ((level & 0xff) == 8)
1836 return (level & 0xff) + 0x400;
1837 if (((level >> 8) & 3) == 1)
1838 return (level & 0xff) + 0x200;
1839 return level;
1840}
1841
1842static void qeth_idx_write_cb(struct qeth_channel *channel,
1843 struct qeth_cmd_buffer *iob)
1844{
1845 struct qeth_card *card;
1846 __u16 temp;
1847
d11ba0c4 1848 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1849
1850 if (channel->state == CH_STATE_DOWN) {
1851 channel->state = CH_STATE_ACTIVATING;
1852 goto out;
1853 }
1854 card = CARD_FROM_CDEV(channel->ccwdev);
1855
1856 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1857 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1858 dev_err(&card->write.ccwdev->dev,
1859 "The adapter is used exclusively by another "
1860 "host\n");
4a71df50 1861 else
74eacdb9
FB		 1862 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1863 " negative reply\n",
1864 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1865 goto out;
1866 }
1867 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1868 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1869 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1870 "function level mismatch (sent: 0x%x, received: "
1871 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1872 card->info.func_level, temp);
4a71df50
FB		 1873 goto out;
1874 }
1875 channel->state = CH_STATE_UP;
1876out:
1877 qeth_release_buffer(channel, iob);
1878}
1879
1880static void qeth_idx_read_cb(struct qeth_channel *channel,
1881 struct qeth_cmd_buffer *iob)
1882{
1883 struct qeth_card *card;
1884 __u16 temp;
1885
d11ba0c4 1886 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1887 if (channel->state == CH_STATE_DOWN) {
1888 channel->state = CH_STATE_ACTIVATING;
1889 goto out;
1890 }
1891
1892 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1893 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1894 goto out;
1895
1896 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1897 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1898 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1899 dev_err(&card->write.ccwdev->dev,
1900 "The adapter is used exclusively by another "
1901 "host\n");
5113fec0
UB		 1902 break;
1903 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1904 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1905 dev_err(&card->read.ccwdev->dev,
1906 "Setting the device online failed because of "
01fc3e86 1907 "insufficient authorization\n");
5113fec0
UB		 1908 break;
1909 default:
74eacdb9
FB		 1910 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1911 " negative reply\n",
1912 dev_name(&card->read.ccwdev->dev));
5113fec0 1913 }
01fc3e86
UB		 1914 QETH_CARD_TEXT_(card, 2, "idxread%c",
1915 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1916 goto out;
1917 }
1918
1919/**
5113fec0
UB		 1920 * * temporary fix for microcode bug
1921 * * to revert it,replace OR by AND
1922 * */
4a71df50 1923 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1924 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1925 card->info.portname_required = 1;
1926
1927 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1928 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1929 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1930 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1931 dev_name(&card->read.ccwdev->dev),
1932 card->info.func_level, temp);
4a71df50
FB		 1933 goto out;
1934 }
1935 memcpy(&card->token.issuer_rm_r,
1936 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1937 QETH_MPC_TOKEN_LENGTH);
1938 memcpy(&card->info.mcl_level[0],
1939 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1940 channel->state = CH_STATE_UP;
1941out:
1942 qeth_release_buffer(channel, iob);
1943}
1944
1945void qeth_prepare_control_data(struct qeth_card *card, int len,
1946 struct qeth_cmd_buffer *iob)
1947{
1948 qeth_setup_ccw(&card->write, iob->data, len);
1949 iob->callback = qeth_release_buffer;
1950
1951 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1952 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1953 card->seqno.trans_hdr++;
1954 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1955 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1956 card->seqno.pdu_hdr++;
1957 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1958 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1959 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1960}
1961EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1962
1963int qeth_send_control_data(struct qeth_card *card, int len,
1964 struct qeth_cmd_buffer *iob,
1965 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1966 unsigned long),
1967 void *reply_param)
1968{
1969 int rc;
1970 unsigned long flags;
1971 struct qeth_reply *reply = NULL;
7834cd5a 1972 unsigned long timeout, event_timeout;
5b54e16f 1973 struct qeth_ipa_cmd *cmd;
4a71df50 1974
847a50fd 1975 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1976
908abbb5
UB		 1977 if (card->read_or_write_problem) {
1978 qeth_release_buffer(iob->channel, iob);
1979 return -EIO;
1980 }
4a71df50
FB		 1981 reply = qeth_alloc_reply(card);
1982 if (!reply) {
4a71df50
FB		 1983 return -ENOMEM;
1984 }
1985 reply->callback = reply_cb;
1986 reply->param = reply_param;
1987 if (card->state == CARD_STATE_DOWN)
1988 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1989 else
1990 reply->seqno = card->seqno.ipa++;
1991 init_waitqueue_head(&reply->wait_q);
1992 spin_lock_irqsave(&card->lock, flags);
1993 list_add_tail(&reply->list, &card->cmd_waiter_list);
1994 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1995 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1996
1997 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1998 qeth_prepare_control_data(card, len, iob);
1999
2000 if (IS_IPA(iob->data))
7834cd5a 2001 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2002 else
7834cd5a
HC		 2003 event_timeout = QETH_TIMEOUT;
2004 timeout = jiffies + event_timeout;
4a71df50 2005
847a50fd 2006 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2007 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2008 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2009 (addr_t) iob, 0, 0);
2010 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2011 if (rc) {
74eacdb9
FB		 2012 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2013 "ccw_device_start rc = %i\n",
2014 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2015 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2016 spin_lock_irqsave(&card->lock, flags);
2017 list_del_init(&reply->list);
2018 qeth_put_reply(reply);
2019 spin_unlock_irqrestore(&card->lock, flags);
2020 qeth_release_buffer(iob->channel, iob);
2021 atomic_set(&card->write.irq_pending, 0);
2022 wake_up(&card->wait_q);
2023 return rc;
2024 }
5b54e16f
FB		 2025
2026 /* we have only one long running ipassist, since we can ensure
2027 process context of this command we can sleep */
2028 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2029 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2030 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2031 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2032 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2033 goto time_err;
2034 } else {
2035 while (!atomic_read(&reply->received)) {
2036 if (time_after(jiffies, timeout))
2037 goto time_err;
2038 cpu_relax();
6531084c 2039 }
5b54e16f
FB		 2040 }
2041
70919e23
UB		 2042 if (reply->rc == -EIO)
2043 goto error;
5b54e16f
FB		 2044 rc = reply->rc;
2045 qeth_put_reply(reply);
2046 return rc;
2047
2048time_err:
70919e23 2049 reply->rc = -ETIME;
5b54e16f
FB		 2050 spin_lock_irqsave(&reply->card->lock, flags);
2051 list_del_init(&reply->list);
2052 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2053 atomic_inc(&reply->received);
70919e23 2054error:
908abbb5
UB		 2055 atomic_set(&card->write.irq_pending, 0);
2056 qeth_release_buffer(iob->channel, iob);
2057 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2058 rc = reply->rc;
2059 qeth_put_reply(reply);
2060 return rc;
2061}
2062EXPORT_SYMBOL_GPL(qeth_send_control_data);
2063
2064static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2065 unsigned long data)
2066{
2067 struct qeth_cmd_buffer *iob;
2068
d11ba0c4 2069 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2070
2071 iob = (struct qeth_cmd_buffer *) data;
2072 memcpy(&card->token.cm_filter_r,
2073 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2074 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2075 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2076 return 0;
2077}
2078
2079static int qeth_cm_enable(struct qeth_card *card)
2080{
2081 int rc;
2082 struct qeth_cmd_buffer *iob;
2083
d11ba0c4 2084 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2085
2086 iob = qeth_wait_for_buffer(&card->write);
2087 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2088 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2089 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2090 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2091 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2092
2093 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2094 qeth_cm_enable_cb, NULL);
2095 return rc;
2096}
2097
2098static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2099 unsigned long data)
2100{
2101
2102 struct qeth_cmd_buffer *iob;
2103
d11ba0c4 2104 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2105
2106 iob = (struct qeth_cmd_buffer *) data;
2107 memcpy(&card->token.cm_connection_r,
2108 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2109 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2110 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2111 return 0;
2112}
2113
2114static int qeth_cm_setup(struct qeth_card *card)
2115{
2116 int rc;
2117 struct qeth_cmd_buffer *iob;
2118
d11ba0c4 2119 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2120
2121 iob = qeth_wait_for_buffer(&card->write);
2122 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2123 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2124 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2125 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2126 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2127 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2128 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2129 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2130 qeth_cm_setup_cb, NULL);
2131 return rc;
2132
2133}
2134
2135static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2136{
2137 switch (card->info.type) {
2138 case QETH_CARD_TYPE_UNKNOWN:
2139 return 1500;
2140 case QETH_CARD_TYPE_IQD:
2141 return card->info.max_mtu;
5113fec0 2142 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2143 switch (card->info.link_type) {
2144 case QETH_LINK_TYPE_HSTR:
2145 case QETH_LINK_TYPE_LANE_TR:
2146 return 2000;
2147 default:
2148 return 1492;
2149 }
5113fec0
UB		 2150 case QETH_CARD_TYPE_OSM:
2151 case QETH_CARD_TYPE_OSX:
2152 return 1492;
4a71df50
FB		 2153 default:
2154 return 1500;
2155 }
2156}
2157
4a71df50
FB		 2158static inline int qeth_get_mtu_outof_framesize(int framesize)
2159{
2160 switch (framesize) {
2161 case 0x4000:
2162 return 8192;
2163 case 0x6000:
2164 return 16384;
2165 case 0xa000:
2166 return 32768;
2167 case 0xffff:
2168 return 57344;
2169 default:
2170 return 0;
2171 }
2172}
2173
2174static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2175{
2176 switch (card->info.type) {
5113fec0
UB		 2177 case QETH_CARD_TYPE_OSD:
2178 case QETH_CARD_TYPE_OSM:
2179 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2180 case QETH_CARD_TYPE_IQD:
2181 return ((mtu >= 576) &&
9853b97b 2182 (mtu <= card->info.max_mtu));
4a71df50
FB		 2183 case QETH_CARD_TYPE_OSN:
2184 case QETH_CARD_TYPE_UNKNOWN:
2185 default:
2186 return 1;
2187 }
2188}
2189
2190static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2191 unsigned long data)
2192{
2193
2194 __u16 mtu, framesize;
2195 __u16 len;
2196 __u8 link_type;
2197 struct qeth_cmd_buffer *iob;
2198
d11ba0c4 2199 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2200
2201 iob = (struct qeth_cmd_buffer *) data;
2202 memcpy(&card->token.ulp_filter_r,
2203 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2204 QETH_MPC_TOKEN_LENGTH);
9853b97b 2205 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2206 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2207 mtu = qeth_get_mtu_outof_framesize(framesize);
2208 if (!mtu) {
2209 iob->rc = -EINVAL;
d11ba0c4 2210 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2211 return 0;
2212 }
8b2e18f6
UB		 2213 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2214 /* frame size has changed */
2215 if (card->dev &&
2216 ((card->dev->mtu == card->info.initial_mtu) ||
2217 (card->dev->mtu > mtu)))
2218 card->dev->mtu = mtu;
2219 qeth_free_qdio_buffers(card);
2220 }
4a71df50 2221 card->info.initial_mtu = mtu;
8b2e18f6 2222 card->info.max_mtu = mtu;
4a71df50
FB		 2223 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2224 } else {
2225 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2226 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2227 iob->data);
4a71df50
FB		 2228 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2229 }
2230
2231 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2232 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2233 memcpy(&link_type,
2234 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2235 card->info.link_type = link_type;
2236 } else
2237 card->info.link_type = 0;
01fc3e86 2238 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2239 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2240 return 0;
2241}
2242
2243static int qeth_ulp_enable(struct qeth_card *card)
2244{
2245 int rc;
2246 char prot_type;
2247 struct qeth_cmd_buffer *iob;
2248
2249 /*FIXME: trace view callbacks*/
d11ba0c4 2250 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2251
2252 iob = qeth_wait_for_buffer(&card->write);
2253 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2254
2255 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2256 (__u8) card->info.portno;
2257 if (card->options.layer2)
2258 if (card->info.type == QETH_CARD_TYPE_OSN)
2259 prot_type = QETH_PROT_OSN2;
2260 else
2261 prot_type = QETH_PROT_LAYER2;
2262 else
2263 prot_type = QETH_PROT_TCPIP;
2264
2265 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2266 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2267 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2268 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2269 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2270 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2271 card->info.portname, 9);
2272 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2273 qeth_ulp_enable_cb, NULL);
2274 return rc;
2275
2276}
2277
2278static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2279 unsigned long data)
2280{
2281 struct qeth_cmd_buffer *iob;
2282
d11ba0c4 2283 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2284
2285 iob = (struct qeth_cmd_buffer *) data;
2286 memcpy(&card->token.ulp_connection_r,
2287 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2288 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2289 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2290 3)) {
2291 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2292 dev_err(&card->gdev->dev, "A connection could not be "
2293 "established because of an OLM limit\n");
bbb822a8 2294 iob->rc = -EMLINK;
65a1f898 2295 }
d11ba0c4 2296 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2297 return 0;
4a71df50
FB		 2298}
2299
2300static int qeth_ulp_setup(struct qeth_card *card)
2301{
2302 int rc;
2303 __u16 temp;
2304 struct qeth_cmd_buffer *iob;
2305 struct ccw_dev_id dev_id;
2306
d11ba0c4 2307 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2308
2309 iob = qeth_wait_for_buffer(&card->write);
2310 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2311
2312 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2313 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2314 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2315 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2316 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2317 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2318
2319 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2320 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2321 temp = (card->info.cula << 8) + card->info.unit_addr2;
2322 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2323 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2324 qeth_ulp_setup_cb, NULL);
2325 return rc;
2326}
2327
0da9581d
EL		 2328static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2329{
2330 int rc;
2331 struct qeth_qdio_out_buffer *newbuf;
2332
2333 rc = 0;
2334 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2335 if (!newbuf) {
2336 rc = -ENOMEM;
2337 goto out;
2338 }
2339 newbuf->buffer = &q->qdio_bufs[bidx];
2340 skb_queue_head_init(&newbuf->skb_list);
2341 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2342 newbuf->q = q;
2343 newbuf->aob = NULL;
2344 newbuf->next_pending = q->bufs[bidx];
2345 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2346 q->bufs[bidx] = newbuf;
2347 if (q->bufstates) {
2348 q->bufstates[bidx].user = newbuf;
2349 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2350 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2351 QETH_CARD_TEXT_(q->card, 2, "%lx",
2352 (long) newbuf->next_pending);
2353 }
2354out:
2355 return rc;
2356}
2357
2358
4a71df50
FB		 2359static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2360{
2361 int i, j;
2362
d11ba0c4 2363 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2364
2365 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2366 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2367 return 0;
2368
b3332930 2369 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2370 GFP_KERNEL);
4a71df50
FB		 2371 if (!card->qdio.in_q)
2372 goto out_nomem;
d11ba0c4
PT		 2373 QETH_DBF_TEXT(SETUP, 2, "inq");
2374 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2375 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2376 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2377 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2378 card->qdio.in_q->bufs[i].buffer =
2379 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2380 card->qdio.in_q->bufs[i].rx_skb = NULL;
2381 }
4a71df50
FB		 2382 /* inbound buffer pool */
2383 if (qeth_alloc_buffer_pool(card))
2384 goto out_freeinq;
0da9581d 2385
4a71df50
FB		 2386 /* outbound */
2387 card->qdio.out_qs =
b3332930 2388 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2389 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2390 if (!card->qdio.out_qs)
2391 goto out_freepool;
2392 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2393 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2394 GFP_KERNEL);
4a71df50
FB		 2395 if (!card->qdio.out_qs[i])
2396 goto out_freeoutq;
d11ba0c4
PT		 2397 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2398 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2399 card->qdio.out_qs[i]->queue_no = i;
2400 /* give outbound qeth_qdio_buffers their qdio_buffers */
2401 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2402 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2403 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2404 goto out_freeoutqbufs;
4a71df50
FB		 2405 }
2406 }
0da9581d
EL		 2407
2408 /* completion */
2409 if (qeth_alloc_cq(card))
2410 goto out_freeoutq;
2411
4a71df50
FB		 2412 return 0;
2413
0da9581d
EL		 2414out_freeoutqbufs:
2415 while (j > 0) {
2416 --j;
2417 kmem_cache_free(qeth_qdio_outbuf_cache,
2418 card->qdio.out_qs[i]->bufs[j]);
2419 card->qdio.out_qs[i]->bufs[j] = NULL;
2420 }
4a71df50 2421out_freeoutq:
0da9581d 2422 while (i > 0) {
4a71df50 2423 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2424 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2425 }
4a71df50
FB		 2426 kfree(card->qdio.out_qs);
2427 card->qdio.out_qs = NULL;
2428out_freepool:
2429 qeth_free_buffer_pool(card);
2430out_freeinq:
2431 kfree(card->qdio.in_q);
2432 card->qdio.in_q = NULL;
2433out_nomem:
2434 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2435 return -ENOMEM;
2436}
2437
2438static void qeth_create_qib_param_field(struct qeth_card *card,
2439 char *param_field)
2440{
2441
2442 param_field[0] = _ascebc['P'];
2443 param_field[1] = _ascebc['C'];
2444 param_field[2] = _ascebc['I'];
2445 param_field[3] = _ascebc['T'];
2446 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2447 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2448 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2449}
2450
2451static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2452 char *param_field)
2453{
2454 param_field[16] = _ascebc['B'];
2455 param_field[17] = _ascebc['L'];
2456 param_field[18] = _ascebc['K'];
2457 param_field[19] = _ascebc['T'];
2458 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2459 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2460 *((unsigned int *) (&param_field[28])) =
2461 card->info.blkt.inter_packet_jumbo;
2462}
2463
2464static int qeth_qdio_activate(struct qeth_card *card)
2465{
d11ba0c4 2466 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2467 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2468}
2469
2470static int qeth_dm_act(struct qeth_card *card)
2471{
2472 int rc;
2473 struct qeth_cmd_buffer *iob;
2474
d11ba0c4 2475 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2476
2477 iob = qeth_wait_for_buffer(&card->write);
2478 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2479
2480 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2481 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2482 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2483 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2484 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2485 return rc;
2486}
2487
2488static int qeth_mpc_initialize(struct qeth_card *card)
2489{
2490 int rc;
2491
d11ba0c4 2492 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2493
2494 rc = qeth_issue_next_read(card);
2495 if (rc) {
d11ba0c4 2496 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2497 return rc;
2498 }
2499 rc = qeth_cm_enable(card);
2500 if (rc) {
d11ba0c4 2501 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2502 goto out_qdio;
2503 }
2504 rc = qeth_cm_setup(card);
2505 if (rc) {
d11ba0c4 2506 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2507 goto out_qdio;
2508 }
2509 rc = qeth_ulp_enable(card);
2510 if (rc) {
d11ba0c4 2511 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2512 goto out_qdio;
2513 }
2514 rc = qeth_ulp_setup(card);
2515 if (rc) {
d11ba0c4 2516 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2517 goto out_qdio;
2518 }
2519 rc = qeth_alloc_qdio_buffers(card);
2520 if (rc) {
d11ba0c4 2521 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2522 goto out_qdio;
2523 }
2524 rc = qeth_qdio_establish(card);
2525 if (rc) {
d11ba0c4 2526 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2527 qeth_free_qdio_buffers(card);
2528 goto out_qdio;
2529 }
2530 rc = qeth_qdio_activate(card);
2531 if (rc) {
d11ba0c4 2532 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2533 goto out_qdio;
2534 }
2535 rc = qeth_dm_act(card);
2536 if (rc) {
d11ba0c4 2537 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2538 goto out_qdio;
2539 }
2540
2541 return 0;
2542out_qdio:
2543 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2544 return rc;
2545}
2546
2547static void qeth_print_status_with_portname(struct qeth_card *card)
2548{
2549 char dbf_text[15];
2550 int i;
2551
2552 sprintf(dbf_text, "%s", card->info.portname + 1);
2553 for (i = 0; i < 8; i++)
2554 dbf_text[i] =
2555 (char) _ebcasc[(__u8) dbf_text[i]];
2556 dbf_text[8] = 0;
74eacdb9 2557 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2558 "with link type %s (portname: %s)\n",
4a71df50
FB		 2559 qeth_get_cardname(card),
2560 (card->info.mcl_level[0]) ? " (level: " : "",
2561 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2562 (card->info.mcl_level[0]) ? ")" : "",
2563 qeth_get_cardname_short(card),
2564 dbf_text);
2565
2566}
2567
2568static void qeth_print_status_no_portname(struct qeth_card *card)
2569{
2570 if (card->info.portname[0])
74eacdb9 2571 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2572 "card%s%s%s\nwith link type %s "
2573 "(no portname needed by interface).\n",
4a71df50
FB		 2574 qeth_get_cardname(card),
2575 (card->info.mcl_level[0]) ? " (level: " : "",
2576 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2577 (card->info.mcl_level[0]) ? ")" : "",
2578 qeth_get_cardname_short(card));
2579 else
74eacdb9 2580 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2581 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2582 qeth_get_cardname(card),
2583 (card->info.mcl_level[0]) ? " (level: " : "",
2584 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2585 (card->info.mcl_level[0]) ? ")" : "",
2586 qeth_get_cardname_short(card));
2587}
2588
2589void qeth_print_status_message(struct qeth_card *card)
2590{
2591 switch (card->info.type) {
5113fec0
UB		 2592 case QETH_CARD_TYPE_OSD:
2593 case QETH_CARD_TYPE_OSM:
2594 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2595 /* VM will use a non-zero first character
2596 * to indicate a HiperSockets like reporting
2597 * of the level OSA sets the first character to zero
2598 * */
2599 if (!card->info.mcl_level[0]) {
2600 sprintf(card->info.mcl_level, "%02x%02x",
2601 card->info.mcl_level[2],
2602 card->info.mcl_level[3]);
2603
2604 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2605 break;
2606 }
2607 /* fallthrough */
2608 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2609 if ((card->info.guestlan) ||
2610 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2611 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2612 card->info.mcl_level[0]];
2613 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2614 card->info.mcl_level[1]];
2615 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2616 card->info.mcl_level[2]];
2617 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2618 card->info.mcl_level[3]];
2619 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2620 }
2621 break;
2622 default:
2623 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2624 }
2625 if (card->info.portname_required)
2626 qeth_print_status_with_portname(card);
2627 else
2628 qeth_print_status_no_portname(card);
2629}
2630EXPORT_SYMBOL_GPL(qeth_print_status_message);
2631
4a71df50
FB		 2632static void qeth_initialize_working_pool_list(struct qeth_card *card)
2633{
2634 struct qeth_buffer_pool_entry *entry;
2635
847a50fd 2636 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2637
2638 list_for_each_entry(entry,
2639 &card->qdio.init_pool.entry_list, init_list) {
2640 qeth_put_buffer_pool_entry(card, entry);
2641 }
2642}
2643
2644static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2645 struct qeth_card *card)
2646{
2647 struct list_head *plh;
2648 struct qeth_buffer_pool_entry *entry;
2649 int i, free;
2650 struct page *page;
2651
2652 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2653 return NULL;
2654
2655 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2656 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2657 free = 1;
2658 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2659 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2660 free = 0;
2661 break;
2662 }
2663 }
2664 if (free) {
2665 list_del_init(&entry->list);
2666 return entry;
2667 }
2668 }
2669
2670 /* no free buffer in pool so take first one and swap pages */
2671 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2672 struct qeth_buffer_pool_entry, list);
2673 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2674 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2675 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2676 if (!page) {
2677 return NULL;
2678 } else {
2679 free_page((unsigned long)entry->elements[i]);
2680 entry->elements[i] = page_address(page);
2681 if (card->options.performance_stats)
2682 card->perf_stats.sg_alloc_page_rx++;
2683 }
2684 }
2685 }
2686 list_del_init(&entry->list);
2687 return entry;
2688}
2689
2690static int qeth_init_input_buffer(struct qeth_card *card,
2691 struct qeth_qdio_buffer *buf)
2692{
2693 struct qeth_buffer_pool_entry *pool_entry;
2694 int i;
2695
b3332930
FB		 2696 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2697 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2698 if (!buf->rx_skb)
2699 return 1;
2700 }
2701
4a71df50
FB		 2702 pool_entry = qeth_find_free_buffer_pool_entry(card);
2703 if (!pool_entry)
2704 return 1;
2705
2706 /*
2707 * since the buffer is accessed only from the input_tasklet
2708 * there shouldn't be a need to synchronize; also, since we use
2709 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2710 * buffers
2711 */
4a71df50
FB		 2712
2713 buf->pool_entry = pool_entry;
2714 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2715 buf->buffer->element[i].length = PAGE_SIZE;
2716 buf->buffer->element[i].addr = pool_entry->elements[i];
2717 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2718 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2719 else
3ec90878
JG		 2720 buf->buffer->element[i].eflags = 0;
2721 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2722 }
2723 return 0;
2724}
2725
2726int qeth_init_qdio_queues(struct qeth_card *card)
2727{
2728 int i, j;
2729 int rc;
2730
d11ba0c4 2731 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2732
2733 /* inbound queue */
2734 memset(card->qdio.in_q->qdio_bufs, 0,
2735 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2736 qeth_initialize_working_pool_list(card);
2737 /*give only as many buffers to hardware as we have buffer pool entries*/
2738 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2739 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2740 card->qdio.in_q->next_buf_to_init =
2741 card->qdio.in_buf_pool.buf_count - 1;
2742 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2743 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2744 if (rc) {
d11ba0c4 2745 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2746 return rc;
2747 }
0da9581d
EL		 2748
2749 /* completion */
2750 rc = qeth_cq_init(card);
2751 if (rc) {
2752 return rc;
2753 }
2754
4a71df50
FB		 2755 /* outbound queue */
2756 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2757 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2758 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2759 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2760 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2761 card->qdio.out_qs[i]->bufs[j],
2762 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2763 }
2764 card->qdio.out_qs[i]->card = card;
2765 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2766 card->qdio.out_qs[i]->do_pack = 0;
2767 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2768 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2769 atomic_set(&card->qdio.out_qs[i]->state,
2770 QETH_OUT_Q_UNLOCKED);
2771 }
2772 return 0;
2773}
2774EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2775
2776static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2777{
2778 switch (link_type) {
2779 case QETH_LINK_TYPE_HSTR:
2780 return 2;
2781 default:
2782 return 1;
2783 }
2784}
2785
2786static void qeth_fill_ipacmd_header(struct qeth_card *card,
2787 struct qeth_ipa_cmd *cmd, __u8 command,
2788 enum qeth_prot_versions prot)
2789{
2790 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2791 cmd->hdr.command = command;
2792 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2793 cmd->hdr.seqno = card->seqno.ipa;
2794 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2795 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2796 if (card->options.layer2)
2797 cmd->hdr.prim_version_no = 2;
2798 else
2799 cmd->hdr.prim_version_no = 1;
2800 cmd->hdr.param_count = 1;
2801 cmd->hdr.prot_version = prot;
2802 cmd->hdr.ipa_supported = 0;
2803 cmd->hdr.ipa_enabled = 0;
2804}
2805
2806struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2807 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2808{
2809 struct qeth_cmd_buffer *iob;
2810 struct qeth_ipa_cmd *cmd;
2811
2812 iob = qeth_wait_for_buffer(&card->write);
2813 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2814 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2815
2816 return iob;
2817}
2818EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2819
2820void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2821 char prot_type)
2822{
2823 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2824 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2825 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2826 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2827}
2828EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2829
2830int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2831 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2832 unsigned long),
2833 void *reply_param)
2834{
2835 int rc;
2836 char prot_type;
4a71df50 2837
847a50fd 2838 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2839
2840 if (card->options.layer2)
2841 if (card->info.type == QETH_CARD_TYPE_OSN)
2842 prot_type = QETH_PROT_OSN2;
2843 else
2844 prot_type = QETH_PROT_LAYER2;
2845 else
2846 prot_type = QETH_PROT_TCPIP;
2847 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2848 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2849 iob, reply_cb, reply_param);
908abbb5
UB		 2850 if (rc == -ETIME) {
2851 qeth_clear_ipacmd_list(card);
2852 qeth_schedule_recovery(card);
2853 }
4a71df50
FB		 2854 return rc;
2855}
2856EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2857
4a71df50
FB		 2858int qeth_send_startlan(struct qeth_card *card)
2859{
2860 int rc;
70919e23 2861 struct qeth_cmd_buffer *iob;
4a71df50 2862
d11ba0c4 2863 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2864
70919e23
UB		 2865 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2866 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2867 return rc;
2868}
2869EXPORT_SYMBOL_GPL(qeth_send_startlan);
2870
eb3fb0ba 2871static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2872 struct qeth_reply *reply, unsigned long data)
2873{
2874 struct qeth_ipa_cmd *cmd;
2875
847a50fd 2876 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2877
2878 cmd = (struct qeth_ipa_cmd *) data;
2879 if (cmd->hdr.return_code == 0)
2880 cmd->hdr.return_code =
2881 cmd->data.setadapterparms.hdr.return_code;
2882 return 0;
2883}
4a71df50
FB		 2884
2885static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2886 struct qeth_reply *reply, unsigned long data)
2887{
2888 struct qeth_ipa_cmd *cmd;
2889
847a50fd 2890 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2891
2892 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2893 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2894 card->info.link_type =
2895 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2896 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2897 }
4a71df50
FB		 2898 card->options.adp.supported_funcs =
2899 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2900 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2901}
2902
eb3fb0ba 2903static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2904 __u32 command, __u32 cmdlen)
2905{
2906 struct qeth_cmd_buffer *iob;
2907 struct qeth_ipa_cmd *cmd;
2908
2909 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2910 QETH_PROT_IPV4);
2911 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2912 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2913 cmd->data.setadapterparms.hdr.command_code = command;
2914 cmd->data.setadapterparms.hdr.used_total = 1;
2915 cmd->data.setadapterparms.hdr.seq_no = 1;
2916
2917 return iob;
2918}
4a71df50
FB		 2919
2920int qeth_query_setadapterparms(struct qeth_card *card)
2921{
2922 int rc;
2923 struct qeth_cmd_buffer *iob;
2924
847a50fd 2925 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2926 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2927 sizeof(struct qeth_ipacmd_setadpparms));
2928 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2929 return rc;
2930}
2931EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2932
1da74b1c
FB		 2933static int qeth_query_ipassists_cb(struct qeth_card *card,
2934 struct qeth_reply *reply, unsigned long data)
2935{
2936 struct qeth_ipa_cmd *cmd;
2937
2938 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2939
2940 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2941
2942 switch (cmd->hdr.return_code) {
2943 case IPA_RC_NOTSUPP:
2944 case IPA_RC_L2_UNSUPPORTED_CMD:
2945 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2946 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2947 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2948 return -0;
2949 default:
2950 if (cmd->hdr.return_code) {
2951 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2952 "rc=%d\n",
2953 dev_name(&card->gdev->dev),
2954 cmd->hdr.return_code);
2955 return 0;
2956 }
2957 }
2958
1da74b1c
FB		 2959 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2960 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2961 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2962 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 2963 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2964 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 2965 } else
2966 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
2967 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 2968 return 0;
2969}
2970
2971int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2972{
2973 int rc;
2974 struct qeth_cmd_buffer *iob;
2975
2976 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2977 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2978 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2979 return rc;
2980}
2981EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2982
2983static int qeth_query_setdiagass_cb(struct qeth_card *card,
2984 struct qeth_reply *reply, unsigned long data)
2985{
2986 struct qeth_ipa_cmd *cmd;
2987 __u16 rc;
2988
2989 cmd = (struct qeth_ipa_cmd *)data;
2990 rc = cmd->hdr.return_code;
2991 if (rc)
2992 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2993 else
2994 card->info.diagass_support = cmd->data.diagass.ext;
2995 return 0;
2996}
2997
2998static int qeth_query_setdiagass(struct qeth_card *card)
2999{
3000 struct qeth_cmd_buffer *iob;
3001 struct qeth_ipa_cmd *cmd;
3002
3003 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3004 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3005 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3006 cmd->data.diagass.subcmd_len = 16;
3007 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3008 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3009}
3010
3011static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3012{
3013 unsigned long info = get_zeroed_page(GFP_KERNEL);
3014 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3015 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3016 struct ccw_dev_id ccwid;
caf757c6 3017 int level;
1da74b1c
FB		 3018
3019 tid->chpid = card->info.chpid;
3020 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3021 tid->ssid = ccwid.ssid;
3022 tid->devno = ccwid.devno;
3023 if (!info)
3024 return;
caf757c6
HC		 3025 level = stsi(NULL, 0, 0, 0);
3026 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3027 tid->lparnr = info222->lpar_number;
caf757c6 3028 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3029 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3030 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3031 }
3032 free_page(info);
3033 return;
3034}
3035
3036static int qeth_hw_trap_cb(struct qeth_card *card,
3037 struct qeth_reply *reply, unsigned long data)
3038{
3039 struct qeth_ipa_cmd *cmd;
3040 __u16 rc;
3041
3042 cmd = (struct qeth_ipa_cmd *)data;
3043 rc = cmd->hdr.return_code;
3044 if (rc)
3045 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3046 return 0;
3047}
3048
3049int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3050{
3051 struct qeth_cmd_buffer *iob;
3052 struct qeth_ipa_cmd *cmd;
3053
3054 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3055 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3056 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3057 cmd->data.diagass.subcmd_len = 80;
3058 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3059 cmd->data.diagass.type = 1;
3060 cmd->data.diagass.action = action;
3061 switch (action) {
3062 case QETH_DIAGS_TRAP_ARM:
3063 cmd->data.diagass.options = 0x0003;
3064 cmd->data.diagass.ext = 0x00010000 +
3065 sizeof(struct qeth_trap_id);
3066 qeth_get_trap_id(card,
3067 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3068 break;
3069 case QETH_DIAGS_TRAP_DISARM:
3070 cmd->data.diagass.options = 0x0001;
3071 break;
3072 case QETH_DIAGS_TRAP_CAPTURE:
3073 break;
3074 }
3075 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3076}
3077EXPORT_SYMBOL_GPL(qeth_hw_trap);
3078
76b11f8e
UB		 3079int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3080 unsigned int qdio_error, const char *dbftext)
4a71df50 3081{
779e6e1c 3082 if (qdio_error) {
847a50fd 3083 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3084 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3085 buf->element[15].sflags);
38593d01 3086 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3087 buf->element[14].sflags);
38593d01 3088 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3089 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3090 card->stats.rx_dropped++;
3091 return 0;
3092 } else
3093 return 1;
4a71df50
FB		 3094 }
3095 return 0;
3096}
3097EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3098
b3332930
FB		 3099void qeth_buffer_reclaim_work(struct work_struct *work)
3100{
3101 struct qeth_card *card = container_of(work, struct qeth_card,
3102 buffer_reclaim_work.work);
3103
3104 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3105 qeth_queue_input_buffer(card, card->reclaim_index);
3106}
3107
4a71df50
FB		 3108void qeth_queue_input_buffer(struct qeth_card *card, int index)
3109{
3110 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3111 struct list_head *lh;
4a71df50
FB		 3112 int count;
3113 int i;
3114 int rc;
3115 int newcount = 0;
3116
4a71df50
FB		 3117 count = (index < queue->next_buf_to_init)?
3118 card->qdio.in_buf_pool.buf_count -
3119 (queue->next_buf_to_init - index) :
3120 card->qdio.in_buf_pool.buf_count -
3121 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3122 /* only requeue at a certain threshold to avoid SIGAs */
3123 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3124 for (i = queue->next_buf_to_init;
3125 i < queue->next_buf_to_init + count; ++i) {
3126 if (qeth_init_input_buffer(card,
3127 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3128 break;
3129 } else {
3130 newcount++;
3131 }
3132 }
3133
3134 if (newcount < count) {
3135 /* we are in memory shortage so we switch back to
3136 traditional skb allocation and drop packages */
4a71df50
FB		 3137 atomic_set(&card->force_alloc_skb, 3);
3138 count = newcount;
3139 } else {
4a71df50
FB		 3140 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3141 }
3142
b3332930
FB		 3143 if (!count) {
3144 i = 0;
3145 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3146 i++;
3147 if (i == card->qdio.in_buf_pool.buf_count) {
3148 QETH_CARD_TEXT(card, 2, "qsarbw");
3149 card->reclaim_index = index;
3150 schedule_delayed_work(
3151 &card->buffer_reclaim_work,
3152 QETH_RECLAIM_WORK_TIME);
3153 }
3154 return;
3155 }
3156
4a71df50
FB		 3157 /*
3158 * according to old code it should be avoided to requeue all
3159 * 128 buffers in order to benefit from PCI avoidance.
3160 * this function keeps at least one buffer (the buffer at
3161 * 'index') un-requeued -> this buffer is the first buffer that
3162 * will be requeued the next time
3163 */
3164 if (card->options.performance_stats) {
3165 card->perf_stats.inbound_do_qdio_cnt++;
3166 card->perf_stats.inbound_do_qdio_start_time =
3167 qeth_get_micros();
3168 }
779e6e1c
JG		 3169 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3170 queue->next_buf_to_init, count);
4a71df50
FB		 3171 if (card->options.performance_stats)
3172 card->perf_stats.inbound_do_qdio_time +=
3173 qeth_get_micros() -
3174 card->perf_stats.inbound_do_qdio_start_time;
3175 if (rc) {
847a50fd 3176 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3177 }
3178 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3179 QDIO_MAX_BUFFERS_PER_Q;
3180 }
3181}
3182EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3183
3184static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3185 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3186{
3ec90878 3187 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3188
847a50fd 3189 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3190 if (card->info.type == QETH_CARD_TYPE_IQD) {
3191 if (sbalf15 == 0) {
3192 qdio_err = 0;
3193 } else {
3194 qdio_err = 1;
3195 }
3196 }
76b11f8e 3197 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3198
3199 if (!qdio_err)
4a71df50 3200 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3201
3202 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3203 return QETH_SEND_ERROR_RETRY;
3204
847a50fd
CO		 3205 QETH_CARD_TEXT(card, 1, "lnkfail");
3206 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3207 (u16)qdio_err, (u8)sbalf15);
3208 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3209}
3210
3211/*
3212 * Switched to packing state if the number of used buffers on a queue
3213 * reaches a certain limit.
3214 */
3215static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3216{
3217 if (!queue->do_pack) {
3218 if (atomic_read(&queue->used_buffers)
3219 >= QETH_HIGH_WATERMARK_PACK){
3220 /* switch non-PACKING -> PACKING */
847a50fd 3221 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3222 if (queue->card->options.performance_stats)
3223 queue->card->perf_stats.sc_dp_p++;
3224 queue->do_pack = 1;
3225 }
3226 }
3227}
3228
3229/*
3230 * Switches from packing to non-packing mode. If there is a packing
3231 * buffer on the queue this buffer will be prepared to be flushed.
3232 * In that case 1 is returned to inform the caller. If no buffer
3233 * has to be flushed, zero is returned.
3234 */
3235static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3236{
3237 struct qeth_qdio_out_buffer *buffer;
3238 int flush_count = 0;
3239
3240 if (queue->do_pack) {
3241 if (atomic_read(&queue->used_buffers)
3242 <= QETH_LOW_WATERMARK_PACK) {
3243 /* switch PACKING -> non-PACKING */
847a50fd 3244 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3245 if (queue->card->options.performance_stats)
3246 queue->card->perf_stats.sc_p_dp++;
3247 queue->do_pack = 0;
3248 /* flush packing buffers */
0da9581d 3249 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3250 if ((atomic_read(&buffer->state) ==
3251 QETH_QDIO_BUF_EMPTY) &&
3252 (buffer->next_element_to_fill > 0)) {
3253 atomic_set(&buffer->state,
0da9581d 3254 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3255 flush_count++;
3256 queue->next_buf_to_fill =
3257 (queue->next_buf_to_fill + 1) %
3258 QDIO_MAX_BUFFERS_PER_Q;
3259 }
3260 }
3261 }
3262 return flush_count;
3263}
3264
0da9581d 3265
4a71df50
FB		 3266/*
3267 * Called to flush a packing buffer if no more pci flags are on the queue.
3268 * Checks if there is a packing buffer and prepares it to be flushed.
3269 * In that case returns 1, otherwise zero.
3270 */
3271static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3272{
3273 struct qeth_qdio_out_buffer *buffer;
3274
0da9581d 3275 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3276 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3277 (buffer->next_element_to_fill > 0)) {
3278 /* it's a packing buffer */
3279 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3280 queue->next_buf_to_fill =
3281 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3282 return 1;
3283 }
3284 return 0;
3285}
3286
779e6e1c
JG		 3287static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3288 int count)
4a71df50
FB		 3289{
3290 struct qeth_qdio_out_buffer *buf;
3291 int rc;
3292 int i;
3293 unsigned int qdio_flags;
3294
4a71df50 3295 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3296 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3297 buf = queue->bufs[bidx];
3ec90878
JG		 3298 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3299 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3300
0da9581d
EL		 3301 if (queue->bufstates)
3302 queue->bufstates[bidx].user = buf;
3303
4a71df50
FB		 3304 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3305 continue;
3306
3307 if (!queue->do_pack) {
3308 if ((atomic_read(&queue->used_buffers) >=
3309 (QETH_HIGH_WATERMARK_PACK -
3310 QETH_WATERMARK_PACK_FUZZ)) &&
3311 !atomic_read(&queue->set_pci_flags_count)) {
3312 /* it's likely that we'll go to packing
3313 * mode soon */
3314 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3315 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3316 }
3317 } else {
3318 if (!atomic_read(&queue->set_pci_flags_count)) {
3319 /*
3320 * there's no outstanding PCI any more, so we
3321 * have to request a PCI to be sure the the PCI
3322 * will wake at some time in the future then we
3323 * can flush packed buffers that might still be
3324 * hanging around, which can happen if no
3325 * further send was requested by the stack
3326 */
3327 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3328 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3329 }
3330 }
3331 }
3332
3333 queue->card->dev->trans_start = jiffies;
3334 if (queue->card->options.performance_stats) {
3335 queue->card->perf_stats.outbound_do_qdio_cnt++;
3336 queue->card->perf_stats.outbound_do_qdio_start_time =
3337 qeth_get_micros();
3338 }
3339 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3340 if (atomic_read(&queue->set_pci_flags_count))
3341 qdio_flags |= QDIO_FLAG_PCI_OUT;
3342 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3343 queue->queue_no, index, count);
4a71df50
FB		 3344 if (queue->card->options.performance_stats)
3345 queue->card->perf_stats.outbound_do_qdio_time +=
3346 qeth_get_micros() -
3347 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3348 atomic_add(count, &queue->used_buffers);
4a71df50 3349 if (rc) {
d303b6fd
JG		 3350 queue->card->stats.tx_errors += count;
3351 /* ignore temporary SIGA errors without busy condition */
1549d13f 3352 if (rc == -ENOBUFS)
d303b6fd 3353 return;
847a50fd 3354 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3355 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3356 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3357 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3358 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3359
4a71df50
FB		 3360 /* this must not happen under normal circumstances. if it
3361 * happens something is really wrong -> recover */
3362 qeth_schedule_recovery(queue->card);
3363 return;
3364 }
4a71df50
FB		 3365 if (queue->card->options.performance_stats)
3366 queue->card->perf_stats.bufs_sent += count;
3367}
3368
3369static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3370{
3371 int index;
3372 int flush_cnt = 0;
3373 int q_was_packing = 0;
3374
3375 /*
3376 * check if weed have to switch to non-packing mode or if
3377 * we have to get a pci flag out on the queue
3378 */
3379 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3380 !atomic_read(&queue->set_pci_flags_count)) {
3381 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3382 QETH_OUT_Q_UNLOCKED) {
3383 /*
3384 * If we get in here, there was no action in
3385 * do_send_packet. So, we check if there is a
3386 * packing buffer to be flushed here.
3387 */
3388 netif_stop_queue(queue->card->dev);
3389 index = queue->next_buf_to_fill;
3390 q_was_packing = queue->do_pack;
3391 /* queue->do_pack may change */
3392 barrier();
3393 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3394 if (!flush_cnt &&
3395 !atomic_read(&queue->set_pci_flags_count))
3396 flush_cnt +=
3397 qeth_flush_buffers_on_no_pci(queue);
3398 if (queue->card->options.performance_stats &&
3399 q_was_packing)
3400 queue->card->perf_stats.bufs_sent_pack +=
3401 flush_cnt;
3402 if (flush_cnt)
779e6e1c 3403 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3404 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3405 }
3406 }
3407}
3408
a1c3ed4c
FB		 3409void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3410 unsigned long card_ptr)
3411{
3412 struct qeth_card *card = (struct qeth_card *)card_ptr;
3413
0cffef48 3414 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3415 napi_schedule(&card->napi);
3416}
3417EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3418
0da9581d
EL		 3419int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3420{
3421 int rc;
3422
3423 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3424 rc = -1;
3425 goto out;
3426 } else {
3427 if (card->options.cq == cq) {
3428 rc = 0;
3429 goto out;
3430 }
3431
3432 if (card->state != CARD_STATE_DOWN &&
3433 card->state != CARD_STATE_RECOVER) {
3434 rc = -1;
3435 goto out;
3436 }
3437
3438 qeth_free_qdio_buffers(card);
3439 card->options.cq = cq;
3440 rc = 0;
3441 }
3442out:
3443 return rc;
3444
3445}
3446EXPORT_SYMBOL_GPL(qeth_configure_cq);
3447
3448
3449static void qeth_qdio_cq_handler(struct qeth_card *card,
3450 unsigned int qdio_err,
3451 unsigned int queue, int first_element, int count) {
3452 struct qeth_qdio_q *cq = card->qdio.c_q;
3453 int i;
3454 int rc;
3455
3456 if (!qeth_is_cq(card, queue))
3457 goto out;
3458
3459 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3460 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3461 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3462
3463 if (qdio_err) {
3464 netif_stop_queue(card->dev);
3465 qeth_schedule_recovery(card);
3466 goto out;
3467 }
3468
3469 if (card->options.performance_stats) {
3470 card->perf_stats.cq_cnt++;
3471 card->perf_stats.cq_start_time = qeth_get_micros();
3472 }
3473
3474 for (i = first_element; i < first_element + count; ++i) {
3475 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3476 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3477 int e;
3478
3479 e = 0;
3480 while (buffer->element[e].addr) {
3481 unsigned long phys_aob_addr;
3482
3483 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3484 qeth_qdio_handle_aob(card, phys_aob_addr);
3485 buffer->element[e].addr = NULL;
3486 buffer->element[e].eflags = 0;
3487 buffer->element[e].sflags = 0;
3488 buffer->element[e].length = 0;
3489
3490 ++e;
3491 }
3492
3493 buffer->element[15].eflags = 0;
3494 buffer->element[15].sflags = 0;
3495 }
3496 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3497 card->qdio.c_q->next_buf_to_init,
3498 count);
3499 if (rc) {
3500 dev_warn(&card->gdev->dev,
3501 "QDIO reported an error, rc=%i\n", rc);
3502 QETH_CARD_TEXT(card, 2, "qcqherr");
3503 }
3504 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3505 + count) % QDIO_MAX_BUFFERS_PER_Q;
3506
3507 netif_wake_queue(card->dev);
3508
3509 if (card->options.performance_stats) {
3510 int delta_t = qeth_get_micros();
3511 delta_t -= card->perf_stats.cq_start_time;
3512 card->perf_stats.cq_time += delta_t;
3513 }
3514out:
3515 return;
3516}
3517
a1c3ed4c 3518void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3519 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3520 unsigned long card_ptr)
3521{
3522 struct qeth_card *card = (struct qeth_card *)card_ptr;
3523
0da9581d
EL		 3524 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3525 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3526
3527 if (qeth_is_cq(card, queue))
3528 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3529 else if (qdio_err)
a1c3ed4c 3530 qeth_schedule_recovery(card);
0da9581d
EL		 3531
3532
a1c3ed4c
FB		 3533}
3534EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3535
779e6e1c
JG		 3536void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3537 unsigned int qdio_error, int __queue, int first_element,
3538 int count, unsigned long card_ptr)
4a71df50
FB		 3539{
3540 struct qeth_card *card = (struct qeth_card *) card_ptr;
3541 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3542 struct qeth_qdio_out_buffer *buffer;
3543 int i;
3544
847a50fd 3545 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3546 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3547 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3548 netif_stop_queue(card->dev);
3549 qeth_schedule_recovery(card);
3550 return;
4a71df50
FB		 3551 }
3552 if (card->options.performance_stats) {
3553 card->perf_stats.outbound_handler_cnt++;
3554 card->perf_stats.outbound_handler_start_time =
3555 qeth_get_micros();
3556 }
3557 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3558 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3559 buffer = queue->bufs[bidx];
b67d801f 3560 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3561
3562 if (queue->bufstates &&
3563 (queue->bufstates[bidx].flags &
3564 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3565 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3566
3567 if (atomic_cmpxchg(&buffer->state,
3568 QETH_QDIO_BUF_PRIMED,
3569 QETH_QDIO_BUF_PENDING) ==
3570 QETH_QDIO_BUF_PRIMED) {
3571 qeth_notify_skbs(queue, buffer,
3572 TX_NOTIFY_PENDING);
3573 }
0da9581d
EL		 3574 buffer->aob = queue->bufstates[bidx].aob;
3575 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3576 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3577 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3578 virt_to_phys(buffer->aob));
b3332930
FB		 3579 if (qeth_init_qdio_out_buf(queue, bidx)) {
3580 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3581 qeth_schedule_recovery(card);
b3332930 3582 }
0da9581d 3583 } else {
b3332930
FB		 3584 if (card->options.cq == QETH_CQ_ENABLED) {
3585 enum iucv_tx_notify n;
3586
3587 n = qeth_compute_cq_notification(
3588 buffer->buffer->element[15].sflags, 0);
3589 qeth_notify_skbs(queue, buffer, n);
3590 }
3591
0da9581d
EL		 3592 qeth_clear_output_buffer(queue, buffer,
3593 QETH_QDIO_BUF_EMPTY);
3594 }
3595 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3596 }
3597 atomic_sub(count, &queue->used_buffers);
3598 /* check if we need to do something on this outbound queue */
3599 if (card->info.type != QETH_CARD_TYPE_IQD)
3600 qeth_check_outbound_queue(queue);
3601
3602 netif_wake_queue(queue->card->dev);
3603 if (card->options.performance_stats)
3604 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3605 card->perf_stats.outbound_handler_start_time;
3606}
3607EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3608
4a71df50
FB		 3609int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3610 int ipv, int cast_type)
3611{
5113fec0
UB		 3612 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3613 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3614 return card->qdio.default_out_queue;
3615 switch (card->qdio.no_out_queues) {
3616 case 4:
3617 if (cast_type && card->info.is_multicast_different)
3618 return card->info.is_multicast_different &
3619 (card->qdio.no_out_queues - 1);
3620 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3621 const u8 tos = ip_hdr(skb)->tos;
3622
3623 if (card->qdio.do_prio_queueing ==
3624 QETH_PRIO_Q_ING_TOS) {
3625 if (tos & IP_TOS_NOTIMPORTANT)
3626 return 3;
3627 if (tos & IP_TOS_HIGHRELIABILITY)
3628 return 2;
3629 if (tos & IP_TOS_HIGHTHROUGHPUT)
3630 return 1;
3631 if (tos & IP_TOS_LOWDELAY)
3632 return 0;
3633 }
3634 if (card->qdio.do_prio_queueing ==
3635 QETH_PRIO_Q_ING_PREC)
3636 return 3 - (tos >> 6);
3637 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3638 /* TODO: IPv6!!! */
3639 }
3640 return card->qdio.default_out_queue;
3641 case 1: /* fallthrough for single-out-queue 1920-device */
3642 default:
3643 return card->qdio.default_out_queue;
3644 }
3645}
3646EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3647
4a71df50
FB		 3648int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3649 struct sk_buff *skb, int elems)
3650{
51aa165c
FB		 3651 int dlen = skb->len - skb->data_len;
3652 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3653 PFN_DOWN((unsigned long)skb->data);
4a71df50 3654
51aa165c 3655 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3656 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3657 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3658 "(Number=%d / Length=%d). Discarded.\n",
3659 (elements_needed+elems), skb->len);
3660 return 0;
3661 }
3662 return elements_needed;
3663}
3664EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3665
51aa165c
FB		 3666int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3667{
3668 int hroom, inpage, rest;
3669
3670 if (((unsigned long)skb->data & PAGE_MASK) !=
3671 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3672 hroom = skb_headroom(skb);
3673 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3674 rest = len - inpage;
3675 if (rest > hroom)
3676 return 1;
3677 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3678 skb->data -= rest;
3679 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3680 }
3681 return 0;
3682}
3683EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3684
f90b744e 3685static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3686 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3687 int offset)
4a71df50 3688{
51aa165c 3689 int length = skb->len - skb->data_len;
4a71df50
FB		 3690 int length_here;
3691 int element;
3692 char *data;
51aa165c
FB		 3693 int first_lap, cnt;
3694 struct skb_frag_struct *frag;
4a71df50
FB		 3695
3696 element = *next_element_to_fill;
3697 data = skb->data;
3698 first_lap = (is_tso == 0 ? 1 : 0);
3699
683d718a
FB		 3700 if (offset >= 0) {
3701 data = skb->data + offset;
e1f03ae8 3702 length -= offset;
683d718a
FB		 3703 first_lap = 0;
3704 }
3705
4a71df50
FB		 3706 while (length > 0) {
3707 /* length_here is the remaining amount of data in this page */
3708 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3709 if (length < length_here)
3710 length_here = length;
3711
3712 buffer->element[element].addr = data;
3713 buffer->element[element].length = length_here;
3714 length -= length_here;
3715 if (!length) {
3716 if (first_lap)
51aa165c 3717 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3718 buffer->element[element].eflags =
3719 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3720 else
3ec90878 3721 buffer->element[element].eflags = 0;
4a71df50 3722 else
3ec90878
JG		 3723 buffer->element[element].eflags =
3724 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3725 } else {
3726 if (first_lap)
3ec90878
JG		 3727 buffer->element[element].eflags =
3728 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3729 else
3ec90878
JG		 3730 buffer->element[element].eflags =
3731 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3732 }
3733 data += length_here;
3734 element++;
3735 first_lap = 0;
3736 }
51aa165c
FB		 3737
3738 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3739 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3740 buffer->element[element].addr = (char *)
3741 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3742 + frag->page_offset;
3743 buffer->element[element].length = frag->size;
3ec90878 3744 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3745 element++;
3746 }
3747
3ec90878
JG		 3748 if (buffer->element[element - 1].eflags)
3749 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3750 *next_element_to_fill = element;
3751}
3752
f90b744e 3753static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3754 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3755 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3756{
3757 struct qdio_buffer *buffer;
4a71df50
FB		 3758 int flush_cnt = 0, hdr_len, large_send = 0;
3759
4a71df50
FB		 3760 buffer = buf->buffer;
3761 atomic_inc(&skb->users);
3762 skb_queue_tail(&buf->skb_list, skb);
3763
4a71df50 3764 /*check first on TSO ....*/
683d718a 3765 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3766 int element = buf->next_element_to_fill;
3767
683d718a
FB		 3768 hdr_len = sizeof(struct qeth_hdr_tso) +
3769 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3770 /*fill first buffer entry only with header information */
3771 buffer->element[element].addr = skb->data;
3772 buffer->element[element].length = hdr_len;
3ec90878 3773 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3774 buf->next_element_to_fill++;
3775 skb->data += hdr_len;
3776 skb->len -= hdr_len;
3777 large_send = 1;
3778 }
683d718a
FB		 3779
3780 if (offset >= 0) {
3781 int element = buf->next_element_to_fill;
3782 buffer->element[element].addr = hdr;
3783 buffer->element[element].length = sizeof(struct qeth_hdr) +
3784 hd_len;
3ec90878 3785 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3786 buf->is_header[element] = 1;
3787 buf->next_element_to_fill++;
3788 }
3789
51aa165c
FB		 3790 __qeth_fill_buffer(skb, buffer, large_send,
3791 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3792
3793 if (!queue->do_pack) {
847a50fd 3794 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3795 /* set state to PRIMED -> will be flushed */
3796 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3797 flush_cnt = 1;
3798 } else {
847a50fd 3799 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3800 if (queue->card->options.performance_stats)
3801 queue->card->perf_stats.skbs_sent_pack++;
3802 if (buf->next_element_to_fill >=
3803 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3804 /*
3805 * packed buffer if full -> set state PRIMED
3806 * -> will be flushed
3807 */
3808 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3809 flush_cnt = 1;
3810 }
3811 }
3812 return flush_cnt;
3813}
3814
3815int qeth_do_send_packet_fast(struct qeth_card *card,
3816 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3817 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3818 int offset, int hd_len)
4a71df50
FB		 3819{
3820 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3821 int index;
3822
4a71df50
FB		 3823 /* spin until we get the queue ... */
3824 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3825 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3826 /* ... now we've got the queue */
3827 index = queue->next_buf_to_fill;
0da9581d 3828 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3829 /*
3830 * check if buffer is empty to make sure that we do not 'overtake'
3831 * ourselves and try to fill a buffer that is already primed
3832 */
3833 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3834 goto out;
64ef8957 3835 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3836 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3837 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3838 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3839 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3840 return 0;
3841out:
3842 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3843 return -EBUSY;
3844}
3845EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3846
3847int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3848 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3849 int elements_needed)
4a71df50
FB		 3850{
3851 struct qeth_qdio_out_buffer *buffer;
3852 int start_index;
3853 int flush_count = 0;
3854 int do_pack = 0;
3855 int tmp;
3856 int rc = 0;
3857
4a71df50
FB		 3858 /* spin until we get the queue ... */
3859 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3860 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3861 start_index = queue->next_buf_to_fill;
0da9581d 3862 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3863 /*
3864 * check if buffer is empty to make sure that we do not 'overtake'
3865 * ourselves and try to fill a buffer that is already primed
3866 */
3867 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3868 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3869 return -EBUSY;
3870 }
3871 /* check if we need to switch packing state of this queue */
3872 qeth_switch_to_packing_if_needed(queue);
3873 if (queue->do_pack) {
3874 do_pack = 1;
64ef8957
FB		 3875 /* does packet fit in current buffer? */
3876 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3877 buffer->next_element_to_fill) < elements_needed) {
3878 /* ... no -> set state PRIMED */
3879 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3880 flush_count++;
3881 queue->next_buf_to_fill =
3882 (queue->next_buf_to_fill + 1) %
3883 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3884 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3885 /* we did a step forward, so check buffer state
3886 * again */
3887 if (atomic_read(&buffer->state) !=
3888 QETH_QDIO_BUF_EMPTY) {
3889 qeth_flush_buffers(queue, start_index,
779e6e1c 3890 flush_count);
64ef8957 3891 atomic_set(&queue->state,
4a71df50 3892 QETH_OUT_Q_UNLOCKED);
64ef8957 3893 return -EBUSY;
4a71df50
FB		 3894 }
3895 }
3896 }
64ef8957 3897 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3898 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3899 QDIO_MAX_BUFFERS_PER_Q;
3900 flush_count += tmp;
4a71df50 3901 if (flush_count)
779e6e1c 3902 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3903 else if (!atomic_read(&queue->set_pci_flags_count))
3904 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3905 /*
3906 * queue->state will go from LOCKED -> UNLOCKED or from
3907 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3908 * (switch packing state or flush buffer to get another pci flag out).
3909 * In that case we will enter this loop
3910 */
3911 while (atomic_dec_return(&queue->state)) {
3912 flush_count = 0;
3913 start_index = queue->next_buf_to_fill;
3914 /* check if we can go back to non-packing state */
3915 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3916 /*
3917 * check if we need to flush a packing buffer to get a pci
3918 * flag out on the queue
3919 */
3920 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3921 flush_count += qeth_flush_buffers_on_no_pci(queue);
3922 if (flush_count)
779e6e1c 3923 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3924 }
3925 /* at this point the queue is UNLOCKED again */
3926 if (queue->card->options.performance_stats && do_pack)
3927 queue->card->perf_stats.bufs_sent_pack += flush_count;
3928
3929 return rc;
3930}
3931EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3932
3933static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3934 struct qeth_reply *reply, unsigned long data)
3935{
3936 struct qeth_ipa_cmd *cmd;
3937 struct qeth_ipacmd_setadpparms *setparms;
3938
847a50fd 3939 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3940
3941 cmd = (struct qeth_ipa_cmd *) data;
3942 setparms = &(cmd->data.setadapterparms);
3943
3944 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3945 if (cmd->hdr.return_code) {
847a50fd 3946 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3947 setparms->data.mode = SET_PROMISC_MODE_OFF;
3948 }
3949 card->info.promisc_mode = setparms->data.mode;
3950 return 0;
3951}
3952
3953void qeth_setadp_promisc_mode(struct qeth_card *card)
3954{
3955 enum qeth_ipa_promisc_modes mode;
3956 struct net_device *dev = card->dev;
3957 struct qeth_cmd_buffer *iob;
3958 struct qeth_ipa_cmd *cmd;
3959
847a50fd 3960 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3961
3962 if (((dev->flags & IFF_PROMISC) &&
3963 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3964 (!(dev->flags & IFF_PROMISC) &&
3965 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3966 return;
3967 mode = SET_PROMISC_MODE_OFF;
3968 if (dev->flags & IFF_PROMISC)
3969 mode = SET_PROMISC_MODE_ON;
847a50fd 3970 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3971
3972 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3973 sizeof(struct qeth_ipacmd_setadpparms));
3974 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3975 cmd->data.setadapterparms.data.mode = mode;
3976 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3977}
3978EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3979
3980int qeth_change_mtu(struct net_device *dev, int new_mtu)
3981{
3982 struct qeth_card *card;
3983 char dbf_text[15];
3984
509e2562 3985 card = dev->ml_priv;
4a71df50 3986
847a50fd 3987 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3988 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3989 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3990
3991 if (new_mtu < 64)
3992 return -EINVAL;
3993 if (new_mtu > 65535)
3994 return -EINVAL;
3995 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3996 (!qeth_mtu_is_valid(card, new_mtu)))
3997 return -EINVAL;
3998 dev->mtu = new_mtu;
3999 return 0;
4000}
4001EXPORT_SYMBOL_GPL(qeth_change_mtu);
4002
4003struct net_device_stats *qeth_get_stats(struct net_device *dev)
4004{
4005 struct qeth_card *card;
4006
509e2562 4007 card = dev->ml_priv;
4a71df50 4008
847a50fd 4009 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4010
4011 return &card->stats;
4012}
4013EXPORT_SYMBOL_GPL(qeth_get_stats);
4014
4015static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4016 struct qeth_reply *reply, unsigned long data)
4017{
4018 struct qeth_ipa_cmd *cmd;
4019
847a50fd 4020 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4021
4022 cmd = (struct qeth_ipa_cmd *) data;
4023 if (!card->options.layer2 ||
4024 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4025 memcpy(card->dev->dev_addr,
4026 &cmd->data.setadapterparms.data.change_addr.addr,
4027 OSA_ADDR_LEN);
4028 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4029 }
4030 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4031 return 0;
4032}
4033
4034int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4035{
4036 int rc;
4037 struct qeth_cmd_buffer *iob;
4038 struct qeth_ipa_cmd *cmd;
4039
847a50fd 4040 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4041
4042 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4043 sizeof(struct qeth_ipacmd_setadpparms));
4044 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4045 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4046 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4047 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4048 card->dev->dev_addr, OSA_ADDR_LEN);
4049 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4050 NULL);
4051 return rc;
4052}
4053EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4054
d64ecc22
EL		 4055static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4056 struct qeth_reply *reply, unsigned long data)
4057{
4058 struct qeth_ipa_cmd *cmd;
4059 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4060
847a50fd 4061 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4062
4063 cmd = (struct qeth_ipa_cmd *) data;
4064 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4065 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4066 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4067 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4068 cmd->data.setadapterparms.hdr.return_code);
4069 switch (cmd->data.setadapterparms.hdr.return_code) {
4070 case SET_ACCESS_CTRL_RC_SUCCESS:
4071 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4072 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4073 {
4074 card->options.isolation = access_ctrl_req->subcmd_code;
4075 if (card->options.isolation == ISOLATION_MODE_NONE) {
4076 dev_info(&card->gdev->dev,
4077 "QDIO data connection isolation is deactivated\n");
4078 } else {
4079 dev_info(&card->gdev->dev,
4080 "QDIO data connection isolation is activated\n");
4081 }
4082 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4083 card->gdev->dev.kobj.name,
4084 access_ctrl_req->subcmd_code,
4085 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4086 break;
4087 }
4088 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4089 {
4090 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4091 card->gdev->dev.kobj.name,
4092 access_ctrl_req->subcmd_code,
4093 cmd->data.setadapterparms.hdr.return_code);
4094 dev_err(&card->gdev->dev, "Adapter does not "
4095 "support QDIO data connection isolation\n");
4096
4097 /* ensure isolation mode is "none" */
4098 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4099 break;
4100 }
4101 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4102 {
4103 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4104 card->gdev->dev.kobj.name,
4105 access_ctrl_req->subcmd_code,
4106 cmd->data.setadapterparms.hdr.return_code);
4107 dev_err(&card->gdev->dev,
4108 "Adapter is dedicated. "
4109 "QDIO data connection isolation not supported\n");
4110
4111 /* ensure isolation mode is "none" */
4112 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4113 break;
4114 }
4115 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4116 {
4117 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4118 card->gdev->dev.kobj.name,
4119 access_ctrl_req->subcmd_code,
4120 cmd->data.setadapterparms.hdr.return_code);
4121 dev_err(&card->gdev->dev,
4122 "TSO does not permit QDIO data connection isolation\n");
4123
4124 /* ensure isolation mode is "none" */
4125 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4126 break;
4127 }
4128 default:
4129 {
4130 /* this should never happen */
4131 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4132 "==UNKNOWN\n",
4133 card->gdev->dev.kobj.name,
4134 access_ctrl_req->subcmd_code,
4135 cmd->data.setadapterparms.hdr.return_code);
4136
4137 /* ensure isolation mode is "none" */
4138 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4139 break;
4140 }
4141 }
4142 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4143 return 0;
d64ecc22
EL		 4144}
4145
4146static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4147 enum qeth_ipa_isolation_modes isolation)
4148{
4149 int rc;
4150 struct qeth_cmd_buffer *iob;
4151 struct qeth_ipa_cmd *cmd;
4152 struct qeth_set_access_ctrl *access_ctrl_req;
4153
847a50fd 4154 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4155
4156 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4157 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4158
4159 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4160 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4161 sizeof(struct qeth_set_access_ctrl));
4162 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4163 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4164 access_ctrl_req->subcmd_code = isolation;
4165
4166 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4167 NULL);
4168 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4169 return rc;
4170}
4171
4172int qeth_set_access_ctrl_online(struct qeth_card *card)
4173{
4174 int rc = 0;
4175
847a50fd 4176 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4177
5113fec0
UB		 4178 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4179 card->info.type == QETH_CARD_TYPE_OSX) &&
4180 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4181 rc = qeth_setadpparms_set_access_ctrl(card,
4182 card->options.isolation);
4183 if (rc) {
4184 QETH_DBF_MESSAGE(3,
5113fec0 4185 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4186 card->gdev->dev.kobj.name,
4187 rc);
4188 }
4189 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4190 card->options.isolation = ISOLATION_MODE_NONE;
4191
4192 dev_err(&card->gdev->dev, "Adapter does not "
4193 "support QDIO data connection isolation\n");
4194 rc = -EOPNOTSUPP;
4195 }
4196 return rc;
4197}
4198EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4199
4a71df50
FB		 4200void qeth_tx_timeout(struct net_device *dev)
4201{
4202 struct qeth_card *card;
4203
509e2562 4204 card = dev->ml_priv;
847a50fd 4205 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4206 card->stats.tx_errors++;
4207 qeth_schedule_recovery(card);
4208}
4209EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4210
4211int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4212{
509e2562 4213 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4214 int rc = 0;
4215
4216 switch (regnum) {
4217 case MII_BMCR: /* Basic mode control register */
4218 rc = BMCR_FULLDPLX;
4219 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4220 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4221 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4222 rc |= BMCR_SPEED100;
4223 break;
4224 case MII_BMSR: /* Basic mode status register */
4225 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4226 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4227 BMSR_100BASE4;
4228 break;
4229 case MII_PHYSID1: /* PHYS ID 1 */
4230 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4231 dev->dev_addr[2];
4232 rc = (rc >> 5) & 0xFFFF;
4233 break;
4234 case MII_PHYSID2: /* PHYS ID 2 */
4235 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4236 break;
4237 case MII_ADVERTISE: /* Advertisement control reg */
4238 rc = ADVERTISE_ALL;
4239 break;
4240 case MII_LPA: /* Link partner ability reg */
4241 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4242 LPA_100BASE4 | LPA_LPACK;
4243 break;
4244 case MII_EXPANSION: /* Expansion register */
4245 break;
4246 case MII_DCOUNTER: /* disconnect counter */
4247 break;
4248 case MII_FCSCOUNTER: /* false carrier counter */
4249 break;
4250 case MII_NWAYTEST: /* N-way auto-neg test register */
4251 break;
4252 case MII_RERRCOUNTER: /* rx error counter */
4253 rc = card->stats.rx_errors;
4254 break;
4255 case MII_SREVISION: /* silicon revision */
4256 break;
4257 case MII_RESV1: /* reserved 1 */
4258 break;
4259 case MII_LBRERROR: /* loopback, rx, bypass error */
4260 break;
4261 case MII_PHYADDR: /* physical address */
4262 break;
4263 case MII_RESV2: /* reserved 2 */
4264 break;
4265 case MII_TPISTATUS: /* TPI status for 10mbps */
4266 break;
4267 case MII_NCONFIG: /* network interface config */
4268 break;
4269 default:
4270 break;
4271 }
4272 return rc;
4273}
4274EXPORT_SYMBOL_GPL(qeth_mdio_read);
4275
4276static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4277 struct qeth_cmd_buffer *iob, int len,
4278 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4279 unsigned long),
4280 void *reply_param)
4281{
4282 u16 s1, s2;
4283
847a50fd 4284 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4285
4286 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4287 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4288 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4289 /* adjust PDU length fields in IPA_PDU_HEADER */
4290 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4291 s2 = (u32) len;
4292 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4293 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4294 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4295 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4296 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4297 reply_cb, reply_param);
4298}
4299
4300static int qeth_snmp_command_cb(struct qeth_card *card,
4301 struct qeth_reply *reply, unsigned long sdata)
4302{
4303 struct qeth_ipa_cmd *cmd;
4304 struct qeth_arp_query_info *qinfo;
4305 struct qeth_snmp_cmd *snmp;
4306 unsigned char *data;
4307 __u16 data_len;
4308
847a50fd 4309 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4310
4311 cmd = (struct qeth_ipa_cmd *) sdata;
4312 data = (unsigned char *)((char *)cmd - reply->offset);
4313 qinfo = (struct qeth_arp_query_info *) reply->param;
4314 snmp = &cmd->data.setadapterparms.data.snmp;
4315
4316 if (cmd->hdr.return_code) {
847a50fd 4317 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4318 return 0;
4319 }
4320 if (cmd->data.setadapterparms.hdr.return_code) {
4321 cmd->hdr.return_code =
4322 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4323 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4324 return 0;
4325 }
4326 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4327 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4328 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4329 else
4330 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4331
4332 /* check if there is enough room in userspace */
4333 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4334 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4335 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4336 return 0;
4337 }
847a50fd 4338 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4339 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4340 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4341 cmd->data.setadapterparms.hdr.seq_no);
4342 /*copy entries to user buffer*/
4343 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4344 memcpy(qinfo->udata + qinfo->udata_offset,
4345 (char *)snmp,
4346 data_len + offsetof(struct qeth_snmp_cmd, data));
4347 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4348 } else {
4349 memcpy(qinfo->udata + qinfo->udata_offset,
4350 (char *)&snmp->request, data_len);
4351 }
4352 qinfo->udata_offset += data_len;
4353 /* check if all replies received ... */
847a50fd 4354 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4355 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4356 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4357 cmd->data.setadapterparms.hdr.seq_no);
4358 if (cmd->data.setadapterparms.hdr.seq_no <
4359 cmd->data.setadapterparms.hdr.used_total)
4360 return 1;
4361 return 0;
4362}
4363
4364int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4365{
4366 struct qeth_cmd_buffer *iob;
4367 struct qeth_ipa_cmd *cmd;
4368 struct qeth_snmp_ureq *ureq;
4369 int req_len;
4370 struct qeth_arp_query_info qinfo = {0, };
4371 int rc = 0;
4372
847a50fd 4373 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4374
4375 if (card->info.guestlan)
4376 return -EOPNOTSUPP;
4377
4378 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4379 (!card->options.layer2)) {
4a71df50
FB		 4380 return -EOPNOTSUPP;
4381 }
4382 /* skip 4 bytes (data_len struct member) to get req_len */
4383 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4384 return -EFAULT;
4986f3f0
JL		 4385 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4386 if (IS_ERR(ureq)) {
847a50fd 4387 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4388 return PTR_ERR(ureq);
4a71df50
FB		 4389 }
4390 qinfo.udata_len = ureq->hdr.data_len;
4391 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4392 if (!qinfo.udata) {
4393 kfree(ureq);
4394 return -ENOMEM;
4395 }
4396 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4397
4398 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4399 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4400 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4401 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4402 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4403 qeth_snmp_command_cb, (void *)&qinfo);
4404 if (rc)
14cc21b6 4405 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4406 QETH_CARD_IFNAME(card), rc);
4407 else {
4408 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4409 rc = -EFAULT;
4410 }
4411
4412 kfree(ureq);
4413 kfree(qinfo.udata);
4414 return rc;
4415}
4416EXPORT_SYMBOL_GPL(qeth_snmp_command);
4417
c3ab96f3
FB		 4418static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4419 struct qeth_reply *reply, unsigned long data)
4420{
4421 struct qeth_ipa_cmd *cmd;
4422 struct qeth_qoat_priv *priv;
4423 char *resdata;
4424 int resdatalen;
4425
4426 QETH_CARD_TEXT(card, 3, "qoatcb");
4427
4428 cmd = (struct qeth_ipa_cmd *)data;
4429 priv = (struct qeth_qoat_priv *)reply->param;
4430 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4431 resdata = (char *)data + 28;
4432
4433 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4434 cmd->hdr.return_code = IPA_RC_FFFF;
4435 return 0;
4436 }
4437
4438 memcpy((priv->buffer + priv->response_len), resdata,
4439 resdatalen);
4440 priv->response_len += resdatalen;
4441
4442 if (cmd->data.setadapterparms.hdr.seq_no <
4443 cmd->data.setadapterparms.hdr.used_total)
4444 return 1;
4445 return 0;
4446}
4447
4448int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4449{
4450 int rc = 0;
4451 struct qeth_cmd_buffer *iob;
4452 struct qeth_ipa_cmd *cmd;
4453 struct qeth_query_oat *oat_req;
4454 struct qeth_query_oat_data oat_data;
4455 struct qeth_qoat_priv priv;
4456 void __user *tmp;
4457
4458 QETH_CARD_TEXT(card, 3, "qoatcmd");
4459
4460 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4461 rc = -EOPNOTSUPP;
4462 goto out;
4463 }
4464
4465 if (copy_from_user(&oat_data, udata,
4466 sizeof(struct qeth_query_oat_data))) {
4467 rc = -EFAULT;
4468 goto out;
4469 }
4470
4471 priv.buffer_len = oat_data.buffer_len;
4472 priv.response_len = 0;
4473 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4474 if (!priv.buffer) {
4475 rc = -ENOMEM;
4476 goto out;
4477 }
4478
4479 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4480 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4481 sizeof(struct qeth_query_oat));
4482 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4483 oat_req = &cmd->data.setadapterparms.data.query_oat;
4484 oat_req->subcmd_code = oat_data.command;
4485
4486 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4487 &priv);
4488 if (!rc) {
4489 if (is_compat_task())
4490 tmp = compat_ptr(oat_data.ptr);
4491 else
4492 tmp = (void __user *)(unsigned long)oat_data.ptr;
4493
4494 if (copy_to_user(tmp, priv.buffer,
4495 priv.response_len)) {
4496 rc = -EFAULT;
4497 goto out_free;
4498 }
4499
4500 oat_data.response_len = priv.response_len;
4501
4502 if (copy_to_user(udata, &oat_data,
4503 sizeof(struct qeth_query_oat_data)))
4504 rc = -EFAULT;
4505 } else
4506 if (rc == IPA_RC_FFFF)
4507 rc = -EFAULT;
4508
4509out_free:
4510 kfree(priv.buffer);
4511out:
4512 return rc;
4513}
4514EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4515
4a71df50
FB		 4516static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4517{
4518 switch (card->info.type) {
4519 case QETH_CARD_TYPE_IQD:
4520 return 2;
4521 default:
4522 return 0;
4523 }
4524}
4525
d0ff1f52
UB		 4526static void qeth_determine_capabilities(struct qeth_card *card)
4527{
4528 int rc;
4529 int length;
4530 char *prcd;
4531 struct ccw_device *ddev;
4532 int ddev_offline = 0;
4533
4534 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4535 ddev = CARD_DDEV(card);
4536 if (!ddev->online) {
4537 ddev_offline = 1;
4538 rc = ccw_device_set_online(ddev);
4539 if (rc) {
4540 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4541 goto out;
4542 }
4543 }
4544
4545 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4546 if (rc) {
4547 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4548 dev_name(&card->gdev->dev), rc);
4549 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4550 goto out_offline;
4551 }
4552 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4553 if (ddev_offline)
4554 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4555 kfree(prcd);
4556
4557 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4558 if (rc)
4559 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4560
0da9581d
EL		 4561 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4562 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4563 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4564 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4565 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4566 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4567 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4568 dev_info(&card->gdev->dev,
4569 "Completion Queueing supported\n");
4570 } else {
4571 card->options.cq = QETH_CQ_NOTAVAILABLE;
4572 }
4573
4574
d0ff1f52
UB		 4575out_offline:
4576 if (ddev_offline == 1)
4577 ccw_device_set_offline(ddev);
4578out:
4579 return;
4580}
4581
0da9581d
EL		 4582static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4583 struct qdio_buffer **in_sbal_ptrs,
4584 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4585 int i;
4586
4587 if (card->options.cq == QETH_CQ_ENABLED) {
4588 int offset = QDIO_MAX_BUFFERS_PER_Q *
4589 (card->qdio.no_in_queues - 1);
4590 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4591 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4592 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4593 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4594 }
4595
4596 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4597 }
4598}
4599
4a71df50
FB		 4600static int qeth_qdio_establish(struct qeth_card *card)
4601{
4602 struct qdio_initialize init_data;
4603 char *qib_param_field;
4604 struct qdio_buffer **in_sbal_ptrs;
104ea556 4605 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4606 struct qdio_buffer **out_sbal_ptrs;
4607 int i, j, k;
4608 int rc = 0;
4609
d11ba0c4 4610 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4611
4612 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4613 GFP_KERNEL);
104ea556 4614 if (!qib_param_field) {
4615 rc = -ENOMEM;
4616 goto out_free_nothing;
4617 }
4a71df50
FB		 4618
4619 qeth_create_qib_param_field(card, qib_param_field);
4620 qeth_create_qib_param_field_blkt(card, qib_param_field);
4621
b3332930 4622 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4623 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4624 GFP_KERNEL);
4625 if (!in_sbal_ptrs) {
104ea556 4626 rc = -ENOMEM;
4627 goto out_free_qib_param;
4a71df50 4628 }
0da9581d 4629 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4630 in_sbal_ptrs[i] = (struct qdio_buffer *)
4631 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4632 }
4a71df50 4633
0da9581d
EL		 4634 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4635 GFP_KERNEL);
104ea556 4636 if (!queue_start_poll) {
4637 rc = -ENOMEM;
4638 goto out_free_in_sbals;
4639 }
0da9581d 4640 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4641 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4642
4643 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4644
4a71df50 4645 out_sbal_ptrs =
b3332930 4646 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4647 sizeof(void *), GFP_KERNEL);
4648 if (!out_sbal_ptrs) {
104ea556 4649 rc = -ENOMEM;
4650 goto out_free_queue_start_poll;
4a71df50
FB		 4651 }
4652 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4653 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4654 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4655 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4656 }
4657
4658 memset(&init_data, 0, sizeof(struct qdio_initialize));
4659 init_data.cdev = CARD_DDEV(card);
4660 init_data.q_format = qeth_get_qdio_q_format(card);
4661 init_data.qib_param_field_format = 0;
4662 init_data.qib_param_field = qib_param_field;
0da9581d 4663 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4664 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4665 init_data.input_handler = card->discipline->input_handler;
4666 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4667 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4668 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4669 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4670 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4671 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4672 init_data.scan_threshold =
4673 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4674
4675 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4676 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4677 rc = qdio_allocate(&init_data);
4678 if (rc) {
4679 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4680 goto out;
4681 }
4682 rc = qdio_establish(&init_data);
4683 if (rc) {
4a71df50 4684 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4685 qdio_free(CARD_DDEV(card));
4686 }
4a71df50 4687 }
0da9581d
EL		 4688
4689 switch (card->options.cq) {
4690 case QETH_CQ_ENABLED:
4691 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4692 break;
4693 case QETH_CQ_DISABLED:
4694 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4695 break;
4696 default:
4697 break;
4698 }
cc961d40 4699out:
4a71df50 4700 kfree(out_sbal_ptrs);
104ea556 4701out_free_queue_start_poll:
4702 kfree(queue_start_poll);
4703out_free_in_sbals:
4a71df50 4704 kfree(in_sbal_ptrs);
104ea556 4705out_free_qib_param:
4a71df50 4706 kfree(qib_param_field);
104ea556 4707out_free_nothing:
4a71df50
FB		 4708 return rc;
4709}
4710
4711static void qeth_core_free_card(struct qeth_card *card)
4712{
4713
d11ba0c4
PT		 4714 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4715 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4716 qeth_clean_channel(&card->read);
4717 qeth_clean_channel(&card->write);
4718 if (card->dev)
4719 free_netdev(card->dev);
4720 kfree(card->ip_tbd_list);
4721 qeth_free_qdio_buffers(card);
6bcac508 4722 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4723 kfree(card);
4724}
4725
395672e0
SR		 4726void qeth_trace_features(struct qeth_card *card)
4727{
4728 QETH_CARD_TEXT(card, 2, "features");
4729 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4730 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4731 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4732 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4733 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4734 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4735 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4736}
4737EXPORT_SYMBOL_GPL(qeth_trace_features);
4738
4a71df50 4739static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4740 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4741 .driver_info = QETH_CARD_TYPE_OSD},
4742 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4743 .driver_info = QETH_CARD_TYPE_IQD},
4744 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4745 .driver_info = QETH_CARD_TYPE_OSN},
4746 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4747 .driver_info = QETH_CARD_TYPE_OSM},
4748 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4749 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4750 {},
4751};
4752MODULE_DEVICE_TABLE(ccw, qeth_ids);
4753
4754static struct ccw_driver qeth_ccw_driver = {
3bda058b 4755 .driver = {
3e70b3b8 4756 .owner = THIS_MODULE,
3bda058b
SO		 4757 .name = "qeth",
4758 },
4a71df50
FB		 4759 .ids = qeth_ids,
4760 .probe = ccwgroup_probe_ccwdev,
4761 .remove = ccwgroup_remove_ccwdev,
4762};
4763
4a71df50
FB		 4764int qeth_core_hardsetup_card(struct qeth_card *card)
4765{
6ebb7f8d 4766 int retries = 3;
4a71df50
FB		 4767 int rc;
4768
d11ba0c4 4769 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4770 atomic_set(&card->force_alloc_skb, 0);
725b9c04 4771 qeth_update_from_chp_desc(card);
4a71df50 4772retry:
6ebb7f8d 4773 if (retries < 3)
74eacdb9
FB		 4774 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4775 dev_name(&card->gdev->dev));
aa909224
UB		 4776 ccw_device_set_offline(CARD_DDEV(card));
4777 ccw_device_set_offline(CARD_WDEV(card));
4778 ccw_device_set_offline(CARD_RDEV(card));
4779 rc = ccw_device_set_online(CARD_RDEV(card));
4780 if (rc)
4781 goto retriable;
4782 rc = ccw_device_set_online(CARD_WDEV(card));
4783 if (rc)
4784 goto retriable;
4785 rc = ccw_device_set_online(CARD_DDEV(card));
4786 if (rc)
4787 goto retriable;
4a71df50 4788 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4789retriable:
4a71df50 4790 if (rc == -ERESTARTSYS) {
d11ba0c4 4791 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4792 return rc;
4793 } else if (rc) {
d11ba0c4 4794 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 4795 if (--retries < 0)
4a71df50
FB		 4796 goto out;
4797 else
4798 goto retry;
4799 }
d0ff1f52 4800 qeth_determine_capabilities(card);
4a71df50
FB		 4801 qeth_init_tokens(card);
4802 qeth_init_func_level(card);
4803 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4804 if (rc == -ERESTARTSYS) {
d11ba0c4 4805 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4806 return rc;
4807 } else if (rc) {
d11ba0c4 4808 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4809 if (--retries < 0)
4810 goto out;
4811 else
4812 goto retry;
4813 }
4814 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4815 if (rc == -ERESTARTSYS) {
d11ba0c4 4816 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4817 return rc;
4818 } else if (rc) {
d11ba0c4 4819 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4820 if (--retries < 0)
4821 goto out;
4822 else
4823 goto retry;
4824 }
908abbb5 4825 card->read_or_write_problem = 0;
4a71df50
FB		 4826 rc = qeth_mpc_initialize(card);
4827 if (rc) {
d11ba0c4 4828 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4829 goto out;
4830 }
1da74b1c
FB		 4831
4832 card->options.ipa4.supported_funcs = 0;
4833 card->options.adp.supported_funcs = 0;
4834 card->info.diagass_support = 0;
4835 qeth_query_ipassists(card, QETH_PROT_IPV4);
4836 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4837 qeth_query_setadapterparms(card);
4838 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4839 qeth_query_setdiagass(card);
4a71df50
FB		 4840 return 0;
4841out:
74eacdb9
FB		 4842 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4843 "an error on the device\n");
4844 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4845 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4846 return rc;
4847}
4848EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4849
b3332930
FB		 4850static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4851 struct qdio_buffer_element *element,
4a71df50
FB		 4852 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4853{
4854 struct page *page = virt_to_page(element->addr);
4855 if (*pskb == NULL) {
b3332930
FB		 4856 if (qethbuffer->rx_skb) {
4857 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4858 *pskb = qethbuffer->rx_skb;
4859 qethbuffer->rx_skb = NULL;
4860 } else {
4861 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4862 if (!(*pskb))
4863 return -ENOMEM;
4864 }
4865
4a71df50 4866 skb_reserve(*pskb, ETH_HLEN);
b3332930 4867 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4868 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4869 data_len);
4870 } else {
4871 get_page(page);
b3332930
FB		 4872 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4873 element->addr + offset, QETH_RX_PULL_LEN);
4874 skb_fill_page_desc(*pskb, *pfrag, page,
4875 offset + QETH_RX_PULL_LEN,
4876 data_len - QETH_RX_PULL_LEN);
4877 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4878 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4879 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4880 (*pfrag)++;
4881 }
4882 } else {
4883 get_page(page);
4884 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4885 (*pskb)->data_len += data_len;
4886 (*pskb)->len += data_len;
4887 (*pskb)->truesize += data_len;
4888 (*pfrag)++;
4889 }
0da9581d
EL		 4890
4891
4a71df50
FB		 4892 return 0;
4893}
4894
4895struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4896 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4897 struct qdio_buffer_element **__element, int *__offset,
4898 struct qeth_hdr **hdr)
4899{
4900 struct qdio_buffer_element *element = *__element;
b3332930 4901 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4902 int offset = *__offset;
4903 struct sk_buff *skb = NULL;
76b11f8e 4904 int skb_len = 0;
4a71df50
FB		 4905 void *data_ptr;
4906 int data_len;
4907 int headroom = 0;
4908 int use_rx_sg = 0;
4909 int frag = 0;
4910
4a71df50
FB		 4911 /* qeth_hdr must not cross element boundaries */
4912 if (element->length < offset + sizeof(struct qeth_hdr)) {
4913 if (qeth_is_last_sbale(element))
4914 return NULL;
4915 element++;
4916 offset = 0;
4917 if (element->length < sizeof(struct qeth_hdr))
4918 return NULL;
4919 }
4920 *hdr = element->addr + offset;
4921
4922 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4923 switch ((*hdr)->hdr.l2.id) {
4924 case QETH_HEADER_TYPE_LAYER2:
4925 skb_len = (*hdr)->hdr.l2.pkt_length;
4926 break;
4927 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4928 skb_len = (*hdr)->hdr.l3.length;
1abd2296 4929 headroom = ETH_HLEN;
76b11f8e
UB		 4930 break;
4931 case QETH_HEADER_TYPE_OSN:
4932 skb_len = (*hdr)->hdr.osn.pdu_length;
4933 headroom = sizeof(struct qeth_hdr);
4934 break;
4935 default:
4936 break;
4a71df50
FB		 4937 }
4938
4939 if (!skb_len)
4940 return NULL;
4941
b3332930
FB		 4942 if (((skb_len >= card->options.rx_sg_cb) &&
4943 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4944 (!atomic_read(&card->force_alloc_skb))) ||
4945 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4946 use_rx_sg = 1;
4947 } else {
4948 skb = dev_alloc_skb(skb_len + headroom);
4949 if (!skb)
4950 goto no_mem;
4951 if (headroom)
4952 skb_reserve(skb, headroom);
4953 }
4954
4955 data_ptr = element->addr + offset;
4956 while (skb_len) {
4957 data_len = min(skb_len, (int)(element->length - offset));
4958 if (data_len) {
4959 if (use_rx_sg) {
b3332930
FB		 4960 if (qeth_create_skb_frag(qethbuffer, element,
4961 &skb, offset, &frag, data_len))
4a71df50
FB		 4962 goto no_mem;
4963 } else {
4964 memcpy(skb_put(skb, data_len), data_ptr,
4965 data_len);
4966 }
4967 }
4968 skb_len -= data_len;
4969 if (skb_len) {
4970 if (qeth_is_last_sbale(element)) {
847a50fd 4971 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4972 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4973 dev_kfree_skb_any(skb);
4974 card->stats.rx_errors++;
4975 return NULL;
4976 }
4977 element++;
4978 offset = 0;
4979 data_ptr = element->addr;
4980 } else {
4981 offset += data_len;
4982 }
4983 }
4984 *__element = element;
4985 *__offset = offset;
4986 if (use_rx_sg && card->options.performance_stats) {
4987 card->perf_stats.sg_skbs_rx++;
4988 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4989 }
4990 return skb;
4991no_mem:
4992 if (net_ratelimit()) {
847a50fd 4993 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4994 }
4995 card->stats.rx_dropped++;
4996 return NULL;
4997}
4998EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4999
5000static void qeth_unregister_dbf_views(void)
5001{
d11ba0c4
PT		 5002 int x;
5003 for (x = 0; x < QETH_DBF_INFOS; x++) {
5004 debug_unregister(qeth_dbf[x].id);
5005 qeth_dbf[x].id = NULL;
5006 }
4a71df50
FB		 5007}
5008
8e96c51c 5009void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5010{
5011 char dbf_txt_buf[32];
345aa66e 5012 va_list args;
cd023216 5013
8e96c51c 5014 if (level > id->level)
cd023216 5015 return;
345aa66e
PT		 5016 va_start(args, fmt);
5017 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5018 va_end(args);
8e96c51c 5019 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5020}
5021EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5022
4a71df50
FB		 5023static int qeth_register_dbf_views(void)
5024{
d11ba0c4
PT		 5025 int ret;
5026 int x;
5027
5028 for (x = 0; x < QETH_DBF_INFOS; x++) {
5029 /* register the areas */
5030 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5031 qeth_dbf[x].pages,
5032 qeth_dbf[x].areas,
5033 qeth_dbf[x].len);
5034 if (qeth_dbf[x].id == NULL) {
5035 qeth_unregister_dbf_views();
5036 return -ENOMEM;
5037 }
4a71df50 5038
d11ba0c4
PT		 5039 /* register a view */
5040 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5041 if (ret) {
5042 qeth_unregister_dbf_views();
5043 return ret;
5044 }
4a71df50 5045
d11ba0c4
PT		 5046 /* set a passing level */
5047 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5048 }
4a71df50
FB		 5049
5050 return 0;
5051}
5052
5053int qeth_core_load_discipline(struct qeth_card *card,
5054 enum qeth_discipline_id discipline)
5055{
5056 int rc = 0;
2022e00c 5057 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5058 switch (discipline) {
5059 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5060 card->discipline = try_then_request_module(
5061 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5062 break;
5063 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5064 card->discipline = try_then_request_module(
5065 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5066 break;
5067 }
c041f2d4 5068 if (!card->discipline) {
74eacdb9
FB		 5069 dev_err(&card->gdev->dev, "There is no kernel module to "
5070 "support discipline %d\n", discipline);
4a71df50
FB		 5071 rc = -EINVAL;
5072 }
2022e00c 5073 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5074 return rc;
5075}
5076
5077void qeth_core_free_discipline(struct qeth_card *card)
5078{
5079 if (card->options.layer2)
c041f2d4 5080 symbol_put(qeth_l2_discipline);
4a71df50 5081 else
c041f2d4
SO		 5082 symbol_put(qeth_l3_discipline);
5083 card->discipline = NULL;
4a71df50
FB		 5084}
5085
b7169c51
SO		 5086static const struct device_type qeth_generic_devtype = {
5087 .name = "qeth_generic",
5088 .groups = qeth_generic_attr_groups,
5089};
5090static const struct device_type qeth_osn_devtype = {
5091 .name = "qeth_osn",
5092 .groups = qeth_osn_attr_groups,
5093};
5094
4a71df50
FB		 5095static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5096{
5097 struct qeth_card *card;
5098 struct device *dev;
5099 int rc;
5100 unsigned long flags;
af039068 5101 char dbf_name[20];
4a71df50 5102
d11ba0c4 5103 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5104
5105 dev = &gdev->dev;
5106 if (!get_device(dev))
5107 return -ENODEV;
5108
2a0217d5 5109 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5110
5111 card = qeth_alloc_card();
5112 if (!card) {
d11ba0c4 5113 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5114 rc = -ENOMEM;
5115 goto err_dev;
5116 }
af039068
CO		 5117
5118 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5119 dev_name(&gdev->dev));
5120 card->debug = debug_register(dbf_name, 2, 1, 8);
5121 if (!card->debug) {
5122 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5123 rc = -ENOMEM;
5124 goto err_card;
5125 }
5126 debug_register_view(card->debug, &debug_hex_ascii_view);
5127
4a71df50
FB		 5128 card->read.ccwdev = gdev->cdev[0];
5129 card->write.ccwdev = gdev->cdev[1];
5130 card->data.ccwdev = gdev->cdev[2];
5131 dev_set_drvdata(&gdev->dev, card);
5132 card->gdev = gdev;
5133 gdev->cdev[0]->handler = qeth_irq;
5134 gdev->cdev[1]->handler = qeth_irq;
5135 gdev->cdev[2]->handler = qeth_irq;
5136
5137 rc = qeth_determine_card_type(card);
5138 if (rc) {
d11ba0c4 5139 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 5140 goto err_dbf;
4a71df50
FB		 5141 }
5142 rc = qeth_setup_card(card);
5143 if (rc) {
d11ba0c4 5144 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 5145 goto err_dbf;
4a71df50
FB		 5146 }
5147
5113fec0 5148 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5149 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5150 else
b7169c51
SO		 5151 gdev->dev.type = &qeth_generic_devtype;
5152
5113fec0
UB		 5153 switch (card->info.type) {
5154 case QETH_CARD_TYPE_OSN:
5155 case QETH_CARD_TYPE_OSM:
4a71df50 5156 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5157 if (rc)
b7169c51 5158 goto err_dbf;
c041f2d4 5159 rc = card->discipline->setup(card->gdev);
4a71df50 5160 if (rc)
5113fec0
UB		 5161 goto err_disc;
5162 case QETH_CARD_TYPE_OSD:
5163 case QETH_CARD_TYPE_OSX:
5164 default:
5165 break;
4a71df50
FB		 5166 }
5167
5168 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5169 list_add_tail(&card->list, &qeth_core_card_list.list);
5170 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5171
5172 qeth_determine_capabilities(card);
4a71df50
FB		 5173 return 0;
5174
5113fec0
UB		 5175err_disc:
5176 qeth_core_free_discipline(card);
af039068
CO		 5177err_dbf:
5178 debug_unregister(card->debug);
4a71df50
FB		 5179err_card:
5180 qeth_core_free_card(card);
5181err_dev:
5182 put_device(dev);
5183 return rc;
5184}
5185
5186static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5187{
5188 unsigned long flags;
5189 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5190
28a7e4c9 5191 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5192
c041f2d4
SO		 5193 if (card->discipline) {
5194 card->discipline->remove(gdev);
9dc48ccc
UB		 5195 qeth_core_free_discipline(card);
5196 }
5197
af039068 5198 debug_unregister(card->debug);
4a71df50
FB		 5199 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5200 list_del(&card->list);
5201 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5202 qeth_core_free_card(card);
5203 dev_set_drvdata(&gdev->dev, NULL);
5204 put_device(&gdev->dev);
5205 return;
5206}
5207
5208static int qeth_core_set_online(struct ccwgroup_device *gdev)
5209{
5210 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5211 int rc = 0;
5212 int def_discipline;
5213
c041f2d4 5214 if (!card->discipline) {
4a71df50
FB		 5215 if (card->info.type == QETH_CARD_TYPE_IQD)
5216 def_discipline = QETH_DISCIPLINE_LAYER3;
5217 else
5218 def_discipline = QETH_DISCIPLINE_LAYER2;
5219 rc = qeth_core_load_discipline(card, def_discipline);
5220 if (rc)
5221 goto err;
c041f2d4 5222 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5223 if (rc)
5224 goto err;
5225 }
c041f2d4 5226 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5227err:
5228 return rc;
5229}
5230
5231static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5232{
5233 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5234 return card->discipline->set_offline(gdev);
4a71df50
FB		 5235}
5236
5237static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5238{
5239 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5240 if (card->discipline && card->discipline->shutdown)
5241 card->discipline->shutdown(gdev);
4a71df50
FB		 5242}
5243
bbcfcdc8
FB		 5244static int qeth_core_prepare(struct ccwgroup_device *gdev)
5245{
5246 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5247 if (card->discipline && card->discipline->prepare)
5248 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5249 return 0;
5250}
5251
5252static void qeth_core_complete(struct ccwgroup_device *gdev)
5253{
5254 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5255 if (card->discipline && card->discipline->complete)
5256 card->discipline->complete(gdev);
bbcfcdc8
FB		 5257}
5258
5259static int qeth_core_freeze(struct ccwgroup_device *gdev)
5260{
5261 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5262 if (card->discipline && card->discipline->freeze)
5263 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5264 return 0;
5265}
5266
5267static int qeth_core_thaw(struct ccwgroup_device *gdev)
5268{
5269 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5270 if (card->discipline && card->discipline->thaw)
5271 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5272 return 0;
5273}
5274
5275static int qeth_core_restore(struct ccwgroup_device *gdev)
5276{
5277 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5278 if (card->discipline && card->discipline->restore)
5279 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5280 return 0;
5281}
5282
4a71df50 5283static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5284 .driver = {
5285 .owner = THIS_MODULE,
5286 .name = "qeth",
5287 },
b7169c51 5288 .setup = qeth_core_probe_device,
4a71df50
FB		 5289 .remove = qeth_core_remove_device,
5290 .set_online = qeth_core_set_online,
5291 .set_offline = qeth_core_set_offline,
5292 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5293 .prepare = qeth_core_prepare,
5294 .complete = qeth_core_complete,
5295 .freeze = qeth_core_freeze,
5296 .thaw = qeth_core_thaw,
5297 .restore = qeth_core_restore,
4a71df50
FB		 5298};
5299
b7169c51
SO		 5300static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5301 const char *buf, size_t count)
4a71df50
FB		 5302{
5303 int err;
4a71df50 5304
b7169c51 5305 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5306 &qeth_core_ccwgroup_driver, 3, buf);
5307
5308 return err ? err : count;
5309}
4a71df50
FB		 5310static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5311
f47e2256
SO		 5312static struct attribute *qeth_drv_attrs[] = {
5313 &driver_attr_group.attr,
5314 NULL,
5315};
5316static struct attribute_group qeth_drv_attr_group = {
5317 .attrs = qeth_drv_attrs,
5318};
5319static const struct attribute_group *qeth_drv_attr_groups[] = {
5320 &qeth_drv_attr_group,
5321 NULL,
5322};
5323
4a71df50
FB		 5324static struct {
5325 const char str[ETH_GSTRING_LEN];
5326} qeth_ethtool_stats_keys[] = {
5327/* 0 */{"rx skbs"},
5328 {"rx buffers"},
5329 {"tx skbs"},
5330 {"tx buffers"},
5331 {"tx skbs no packing"},
5332 {"tx buffers no packing"},
5333 {"tx skbs packing"},
5334 {"tx buffers packing"},
5335 {"tx sg skbs"},
5336 {"tx sg frags"},
5337/* 10 */{"rx sg skbs"},
5338 {"rx sg frags"},
5339 {"rx sg page allocs"},
5340 {"tx large kbytes"},
5341 {"tx large count"},
5342 {"tx pk state ch n->p"},
5343 {"tx pk state ch p->n"},
5344 {"tx pk watermark low"},
5345 {"tx pk watermark high"},
5346 {"queue 0 buffer usage"},
5347/* 20 */{"queue 1 buffer usage"},
5348 {"queue 2 buffer usage"},
5349 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5350 {"rx poll time"},
5351 {"rx poll count"},
4a71df50
FB		 5352 {"rx do_QDIO time"},
5353 {"rx do_QDIO count"},
5354 {"tx handler time"},
5355 {"tx handler count"},
5356 {"tx time"},
5357/* 30 */{"tx count"},
5358 {"tx do_QDIO time"},
5359 {"tx do_QDIO count"},
f61a0d05 5360 {"tx csum"},
c3b4a740 5361 {"tx lin"},
0da9581d
EL		 5362 {"cq handler count"},
5363 {"cq handler time"}
4a71df50
FB		 5364};
5365
df8b4ec8 5366int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5367{
df8b4ec8
BH		 5368 switch (stringset) {
5369 case ETH_SS_STATS:
5370 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5371 default:
5372 return -EINVAL;
5373 }
4a71df50 5374}
df8b4ec8 5375EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5376
5377void qeth_core_get_ethtool_stats(struct net_device *dev,
5378 struct ethtool_stats *stats, u64 *data)
5379{
509e2562 5380 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5381 data[0] = card->stats.rx_packets -
5382 card->perf_stats.initial_rx_packets;
5383 data[1] = card->perf_stats.bufs_rec;
5384 data[2] = card->stats.tx_packets -
5385 card->perf_stats.initial_tx_packets;
5386 data[3] = card->perf_stats.bufs_sent;
5387 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5388 - card->perf_stats.skbs_sent_pack;
5389 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5390 data[6] = card->perf_stats.skbs_sent_pack;
5391 data[7] = card->perf_stats.bufs_sent_pack;
5392 data[8] = card->perf_stats.sg_skbs_sent;
5393 data[9] = card->perf_stats.sg_frags_sent;
5394 data[10] = card->perf_stats.sg_skbs_rx;
5395 data[11] = card->perf_stats.sg_frags_rx;
5396 data[12] = card->perf_stats.sg_alloc_page_rx;
5397 data[13] = (card->perf_stats.large_send_bytes >> 10);
5398 data[14] = card->perf_stats.large_send_cnt;
5399 data[15] = card->perf_stats.sc_dp_p;
5400 data[16] = card->perf_stats.sc_p_dp;
5401 data[17] = QETH_LOW_WATERMARK_PACK;
5402 data[18] = QETH_HIGH_WATERMARK_PACK;
5403 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5404 data[20] = (card->qdio.no_out_queues > 1) ?
5405 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5406 data[21] = (card->qdio.no_out_queues > 2) ?
5407 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5408 data[22] = (card->qdio.no_out_queues > 3) ?
5409 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5410 data[23] = card->perf_stats.inbound_time;
5411 data[24] = card->perf_stats.inbound_cnt;
5412 data[25] = card->perf_stats.inbound_do_qdio_time;
5413 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5414 data[27] = card->perf_stats.outbound_handler_time;
5415 data[28] = card->perf_stats.outbound_handler_cnt;
5416 data[29] = card->perf_stats.outbound_time;
5417 data[30] = card->perf_stats.outbound_cnt;
5418 data[31] = card->perf_stats.outbound_do_qdio_time;
5419 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5420 data[33] = card->perf_stats.tx_csum;
c3b4a740 5421 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5422 data[35] = card->perf_stats.cq_cnt;
5423 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5424}
5425EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5426
5427void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5428{
5429 switch (stringset) {
5430 case ETH_SS_STATS:
5431 memcpy(data, &qeth_ethtool_stats_keys,
5432 sizeof(qeth_ethtool_stats_keys));
5433 break;
5434 default:
5435 WARN_ON(1);
5436 break;
5437 }
5438}
5439EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5440
5441void qeth_core_get_drvinfo(struct net_device *dev,
5442 struct ethtool_drvinfo *info)
5443{
509e2562 5444 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5445
5446 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5447 sizeof(info->driver));
5448 strlcpy(info->version, "1.0", sizeof(info->version));
5449 strlcpy(info->fw_version, card->info.mcl_level,
5450 sizeof(info->fw_version));
5451 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5452 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5453}
5454EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5455
3f9975aa
FB		 5456int qeth_core_ethtool_get_settings(struct net_device *netdev,
5457 struct ethtool_cmd *ecmd)
5458{
509e2562 5459 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5460 enum qeth_link_types link_type;
5461
5462 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5463 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5464 else
5465 link_type = card->info.link_type;
5466
5467 ecmd->transceiver = XCVR_INTERNAL;
5468 ecmd->supported = SUPPORTED_Autoneg;
5469 ecmd->advertising = ADVERTISED_Autoneg;
5470 ecmd->duplex = DUPLEX_FULL;
5471 ecmd->autoneg = AUTONEG_ENABLE;
5472
5473 switch (link_type) {
5474 case QETH_LINK_TYPE_FAST_ETH:
5475 case QETH_LINK_TYPE_LANE_ETH100:
5476 ecmd->supported |= SUPPORTED_10baseT_Half |
5477 SUPPORTED_10baseT_Full |
5478 SUPPORTED_100baseT_Half |
5479 SUPPORTED_100baseT_Full |
5480 SUPPORTED_TP;
5481 ecmd->advertising |= ADVERTISED_10baseT_Half |
5482 ADVERTISED_10baseT_Full |
5483 ADVERTISED_100baseT_Half |
5484 ADVERTISED_100baseT_Full |
5485 ADVERTISED_TP;
5486 ecmd->speed = SPEED_100;
5487 ecmd->port = PORT_TP;
5488 break;
5489
5490 case QETH_LINK_TYPE_GBIT_ETH:
5491 case QETH_LINK_TYPE_LANE_ETH1000:
5492 ecmd->supported |= SUPPORTED_10baseT_Half |
5493 SUPPORTED_10baseT_Full |
5494 SUPPORTED_100baseT_Half |
5495 SUPPORTED_100baseT_Full |
5496 SUPPORTED_1000baseT_Half |
5497 SUPPORTED_1000baseT_Full |
5498 SUPPORTED_FIBRE;
5499 ecmd->advertising |= ADVERTISED_10baseT_Half |
5500 ADVERTISED_10baseT_Full |
5501 ADVERTISED_100baseT_Half |
5502 ADVERTISED_100baseT_Full |
5503 ADVERTISED_1000baseT_Half |
5504 ADVERTISED_1000baseT_Full |
5505 ADVERTISED_FIBRE;
5506 ecmd->speed = SPEED_1000;
5507 ecmd->port = PORT_FIBRE;
5508 break;
5509
5510 case QETH_LINK_TYPE_10GBIT_ETH:
5511 ecmd->supported |= SUPPORTED_10baseT_Half |
5512 SUPPORTED_10baseT_Full |
5513 SUPPORTED_100baseT_Half |
5514 SUPPORTED_100baseT_Full |
5515 SUPPORTED_1000baseT_Half |
5516 SUPPORTED_1000baseT_Full |
5517 SUPPORTED_10000baseT_Full |
5518 SUPPORTED_FIBRE;
5519 ecmd->advertising |= ADVERTISED_10baseT_Half |
5520 ADVERTISED_10baseT_Full |
5521 ADVERTISED_100baseT_Half |
5522 ADVERTISED_100baseT_Full |
5523 ADVERTISED_1000baseT_Half |
5524 ADVERTISED_1000baseT_Full |
5525 ADVERTISED_10000baseT_Full |
5526 ADVERTISED_FIBRE;
5527 ecmd->speed = SPEED_10000;
5528 ecmd->port = PORT_FIBRE;
5529 break;
5530
5531 default:
5532 ecmd->supported |= SUPPORTED_10baseT_Half |
5533 SUPPORTED_10baseT_Full |
5534 SUPPORTED_TP;
5535 ecmd->advertising |= ADVERTISED_10baseT_Half |
5536 ADVERTISED_10baseT_Full |
5537 ADVERTISED_TP;
5538 ecmd->speed = SPEED_10;
5539 ecmd->port = PORT_TP;
5540 }
5541
5542 return 0;
5543}
5544EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5545
4a71df50
FB		 5546static int __init qeth_core_init(void)
5547{
5548 int rc;
5549
74eacdb9 5550 pr_info("loading core functions\n");
4a71df50
FB		 5551 INIT_LIST_HEAD(&qeth_core_card_list.list);
5552 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5553 mutex_init(&qeth_mod_mutex);
4a71df50
FB		 5554
5555 rc = qeth_register_dbf_views();
5556 if (rc)
5557 goto out_err;
035da16f 5558 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5559 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5560 if (rc)
5561 goto register_err;
683d718a
FB		 5562 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5563 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5564 if (!qeth_core_header_cache) {
5565 rc = -ENOMEM;
5566 goto slab_err;
5567 }
0da9581d
EL		 5568 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5569 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5570 if (!qeth_qdio_outbuf_cache) {
5571 rc = -ENOMEM;
5572 goto cqslab_err;
5573 }
afb6ac59
SO		 5574 rc = ccw_driver_register(&qeth_ccw_driver);
5575 if (rc)
5576 goto ccw_err;
5577 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5578 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5579 if (rc)
5580 goto ccwgroup_err;
0da9581d 5581
683d718a 5582 return 0;
afb6ac59
SO		 5583
5584ccwgroup_err:
5585 ccw_driver_unregister(&qeth_ccw_driver);
5586ccw_err:
5587 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 5588cqslab_err:
5589 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5590slab_err:
035da16f 5591 root_device_unregister(qeth_core_root_dev);
4a71df50 5592register_err:
4a71df50
FB		 5593 qeth_unregister_dbf_views();
5594out_err:
74eacdb9 5595 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5596 return rc;
5597}
5598
5599static void __exit qeth_core_exit(void)
5600{
4a71df50
FB		 5601 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5602 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5603 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5604 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 5605 root_device_unregister(qeth_core_root_dev);
4a71df50 5606 qeth_unregister_dbf_views();
74eacdb9 5607 pr_info("core functions removed\n");
4a71df50
FB		 5608}
5609
5610module_init(qeth_core_init);
5611module_exit(qeth_core_exit);
5612MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5613MODULE_DESCRIPTION("qeth core functions");
5614MODULE_LICENSE("GPL");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git