]> git.ipfire.org Git - thirdparty/linux.git/blame - drivers/scsi/megaraid/megaraid_sas_base.c
projects / thirdparty / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
scsi: megaraid_sas: Create separate functions for allocating and freeing controller...
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
7c0f6ba6 45#include <linux/uaccess.h>
318aaef8 46#include <asm/unaligned.h>
43399236 47#include <linux/fs.h>
c4a3e0a5 48#include <linux/compat.h>
cf62a0a5 49#include <linux/blkdev.h>
0b950672 50#include <linux/mutex.h>
c3518837 51#include <linux/poll.h>
def3e8df 52#include <linux/vmalloc.h>
c4a3e0a5
BS		 53
54#include <scsi/scsi.h>
55#include <scsi/scsi_cmnd.h>
56#include <scsi/scsi_device.h>
57#include <scsi/scsi_host.h>
4bcde509 58#include <scsi/scsi_tcq.h>
9c915a8c 59#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 60#include "megaraid_sas.h"
61
1fd10685
YB		 62/*
63 * Number of sectors per IO command
64 * Will be set in megasas_init_mfi if user does not provide
65 */
66static unsigned int max_sectors;
67module_param_named(max_sectors, max_sectors, int, 0);
68MODULE_PARM_DESC(max_sectors,
69 "Maximum number of sectors per IO command");
70
80d9da98
AR		 71static int msix_disable;
72module_param(msix_disable, int, S_IRUGO);
73MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
74
079eaddf
AR		 75static unsigned int msix_vectors;
76module_param(msix_vectors, int, S_IRUGO);
77MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
78
229fe47c
AR		 79static int allow_vf_ioctls;
80module_param(allow_vf_ioctls, int, S_IRUGO);
81MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
82
ae09a6c1 83static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 84module_param(throttlequeuedepth, int, S_IRUGO);
85MODULE_PARM_DESC(throttlequeuedepth,
86 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
87
e3d178ca 88unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2
AR		 89module_param(resetwaittime, int, S_IRUGO);
90MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
91 "before resetting adapter. Default: 180");
92
ac95136a
SS		 93int smp_affinity_enable = 1;
94module_param(smp_affinity_enable, int, S_IRUGO);
95MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
96
179ac142
SS		 97int rdpq_enable = 1;
98module_param(rdpq_enable, int, S_IRUGO);
99MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
100
308ec459
SS		 101unsigned int dual_qdepth_disable;
102module_param(dual_qdepth_disable, int, S_IRUGO);
103MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
104
e3d178ca
SS		 105unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
106module_param(scmd_timeout, int, S_IRUGO);
107MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
108
c4a3e0a5
BS		 109MODULE_LICENSE("GPL");
110MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 111MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
112MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 113
058a8fac 114int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 115static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 116static int megasas_ld_list_query(struct megasas_instance *instance,
117 u8 query_type);
39a98554 118static int megasas_issue_init_mfi(struct megasas_instance *instance);
119static int megasas_register_aen(struct megasas_instance *instance,
120 u32 seq_num, u32 class_locale_word);
15dd0381
S		 121static void megasas_get_pd_info(struct megasas_instance *instance,
122 struct scsi_device *sdev);
96188a89
S		 123static int megasas_get_target_prop(struct megasas_instance *instance,
124 struct scsi_device *sdev);
c4a3e0a5
BS		 125/*
126 * PCI ID table for all supported controllers
127 */
128static struct pci_device_id megasas_pci_table[] = {
129
f3d7271c
HK		 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
131 /* xscale IOP */
132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
133 /* ppc IOP */
af7a5647 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
135 /* ppc IOP */
6610a6b3
YB		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
137 /* gen2*/
138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
139 /* gen2*/
87911122
YB		 140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
141 /* skinny*/
142 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
143 /* skinny*/
f3d7271c
HK		 144 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
145 /* xscale IOP, vega */
146 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
147 /* xscale IOP */
9c915a8c
AR		 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
149 /* Fusion */
229fe47c
AR		 150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
151 /* Plasma */
36807e67
AR		 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
153 /* Invader */
21d3c710
SS		 154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
155 /* Fury */
90c204bc 156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
157 /* Intruder */
158 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
159 /* Intruder 24 port*/
7364d34b 160 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
161 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
45f4f2eb
SC		 162 /* VENTURA */
163 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA)},
754f1bae 164 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER)},
45f4f2eb
SC		 165 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_HARPOON)},
166 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_TOMCAT)},
167 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA_4PORT)},
168 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER_4PORT)},
f3d7271c 169 {}
c4a3e0a5
BS		 170};
171
172MODULE_DEVICE_TABLE(pci, megasas_pci_table);
173
174static int megasas_mgmt_majorno;
229fe47c 175struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 176static struct fasync_struct *megasas_async_queue;
0b950672 177static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 178
c3518837
YB		 179static int megasas_poll_wait_aen;
180static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 181static u32 support_poll_for_event;
9c915a8c 182u32 megasas_dbg_lvl;
837f5fe8 183static u32 support_device_change;
658dcedb 184
c3518837
YB		 185/* define lock for aen poll */
186spinlock_t poll_aen_lock;
187
9c915a8c 188void
7343eb65 189megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
190 u8 alt_status);
ebf054b0
AR		 191static u32
192megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
193static int
194megasas_adp_reset_gen2(struct megasas_instance *instance,
195 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 196static irqreturn_t megasas_isr(int irq, void *devp);
197static u32
198megasas_init_adapter_mfi(struct megasas_instance *instance);
199u32
200megasas_build_and_issue_cmd(struct megasas_instance *instance,
201 struct scsi_cmnd *scmd);
202static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 203int
229fe47c
AR		 204wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
205 int seconds);
9c915a8c 206void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 207static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
208 int initial);
cd50ba8e 209
f4fc2093 210void
cd50ba8e
AR		 211megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
212{
213 instance->instancet->fire_cmd(instance,
214 cmd->frame_phys_addr, 0, instance->reg_set);
f4fc2093 215 return;
cd50ba8e 216}
7343eb65 217
c4a3e0a5
BS		 218/**
219 * megasas_get_cmd - Get a command from the free pool
220 * @instance: Adapter soft state
221 *
222 * Returns a free command from the pool
223 */
9c915a8c 224struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 225 *instance)
226{
227 unsigned long flags;
228 struct megasas_cmd *cmd = NULL;
229
90dc9d98 230 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 231
232 if (!list_empty(&instance->cmd_pool)) {
233 cmd = list_entry((&instance->cmd_pool)->next,
234 struct megasas_cmd, list);
235 list_del_init(&cmd->list);
236 } else {
1be18254 237 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 238 }
239
90dc9d98 240 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 241 return cmd;
242}
243
244/**
4026e9aa 245 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 246 * @instance: Adapter soft state
247 * @cmd: Command packet to be returned to free command pool
248 */
68b43744 249void
4026e9aa 250megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 251{
4026e9aa
SS		 252 unsigned long flags;
253 u32 blk_tags;
254 struct megasas_cmd_fusion *cmd_fusion;
255 struct fusion_context *fusion = instance->ctrl_context;
256
257 /* This flag is used only for fusion adapter.
258 * Wait for Interrupt for Polled mode DCMD
90dc9d98 259 */
4026e9aa 260 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 261 return;
c4a3e0a5 262
4026e9aa
SS		 263 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
264
265 if (fusion) {
266 blk_tags = instance->max_scsi_cmds + cmd->index;
267 cmd_fusion = fusion->cmd_list[blk_tags];
268 megasas_return_cmd_fusion(instance, cmd_fusion);
269 }
c4a3e0a5 270 cmd->scmd = NULL;
9c915a8c 271 cmd->frame_count = 0;
4026e9aa 272 cmd->flags = 0;
21c34006
S		 273 memset(cmd->frame, 0, instance->mfi_frame_size);
274 cmd->frame->io.context = cpu_to_le32(cmd->index);
4026e9aa 275 if (!fusion && reset_devices)
e5f93a36 276 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 277 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 278
90dc9d98 279 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 280
4026e9aa 281}
1341c939 282
714f5177 283static const char *
284format_timestamp(uint32_t timestamp)
285{
286 static char buffer[32];
287
288 if ((timestamp & 0xff000000) == 0xff000000)
289 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
290 0x00ffffff);
291 else
292 snprintf(buffer, sizeof(buffer), "%us", timestamp);
293 return buffer;
294}
295
296static const char *
297format_class(int8_t class)
298{
299 static char buffer[6];
300
301 switch (class) {
302 case MFI_EVT_CLASS_DEBUG:
303 return "debug";
304 case MFI_EVT_CLASS_PROGRESS:
305 return "progress";
306 case MFI_EVT_CLASS_INFO:
307 return "info";
308 case MFI_EVT_CLASS_WARNING:
309 return "WARN";
310 case MFI_EVT_CLASS_CRITICAL:
311 return "CRIT";
312 case MFI_EVT_CLASS_FATAL:
313 return "FATAL";
314 case MFI_EVT_CLASS_DEAD:
315 return "DEAD";
316 default:
317 snprintf(buffer, sizeof(buffer), "%d", class);
318 return buffer;
319 }
320}
321
322/**
323 * megasas_decode_evt: Decode FW AEN event and print critical event
324 * for information.
325 * @instance: Adapter soft state
326 */
327static void
328megasas_decode_evt(struct megasas_instance *instance)
329{
330 struct megasas_evt_detail *evt_detail = instance->evt_detail;
331 union megasas_evt_class_locale class_locale;
332 class_locale.word = le32_to_cpu(evt_detail->cl.word);
333
334 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
335 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
336 le32_to_cpu(evt_detail->seq_num),
337 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
338 (class_locale.members.locale),
339 format_class(class_locale.members.class),
340 evt_detail->description);
341}
342
1341c939 343/**
0d49016b 344* The following functions are defined for xscale
1341c939
SP		 345* (deviceid : 1064R, PERC5) controllers
346*/
347
c4a3e0a5 348/**
1341c939 349 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 350 * @regs: MFI register set
351 */
352static inline void
d46a3ad6 353megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 354{
d46a3ad6 355 struct megasas_register_set __iomem *regs;
da0dc9fb 356
d46a3ad6 357 regs = instance->reg_set;
39a98554 358 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 359
360 /* Dummy readl to force pci flush */
361 readl(&regs->outbound_intr_mask);
362}
363
b274cab7
SP		 364/**
365 * megasas_disable_intr_xscale -Disables interrupt
366 * @regs: MFI register set
367 */
368static inline void
d46a3ad6 369megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 370{
d46a3ad6 371 struct megasas_register_set __iomem *regs;
b274cab7 372 u32 mask = 0x1f;
da0dc9fb 373
d46a3ad6 374 regs = instance->reg_set;
b274cab7
SP		 375 writel(mask, &regs->outbound_intr_mask);
376 /* Dummy readl to force pci flush */
377 readl(&regs->outbound_intr_mask);
378}
379
1341c939
SP		 380/**
381 * megasas_read_fw_status_reg_xscale - returns the current FW status value
382 * @regs: MFI register set
383 */
384static u32
385megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
386{
387 return readl(&(regs)->outbound_msg_0);
388}
389/**
390 * megasas_clear_interrupt_xscale - Check & clear interrupt
391 * @regs: MFI register set
392 */
0d49016b 393static int
1341c939
SP		 394megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
395{
396 u32 status;
39a98554 397 u32 mfiStatus = 0;
da0dc9fb 398
1341c939
SP		 399 /*
400 * Check if it is our interrupt
401 */
402 status = readl(&regs->outbound_intr_status);
403
39a98554 404 if (status & MFI_OB_INTR_STATUS_MASK)
405 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
406 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
407 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 408
409 /*
410 * Clear the interrupt by writing back the same value
411 */
39a98554 412 if (mfiStatus)
413 writel(status, &regs->outbound_intr_status);
1341c939 414
06f579de
YB		 415 /* Dummy readl to force pci flush */
416 readl(&regs->outbound_intr_status);
417
39a98554 418 return mfiStatus;
1341c939
SP		 419}
420
421/**
422 * megasas_fire_cmd_xscale - Sends command to the FW
423 * @frame_phys_addr : Physical address of cmd
424 * @frame_count : Number of frames for the command
425 * @regs : MFI register set
426 */
0d49016b 427static inline void
0c79e681
YB		 428megasas_fire_cmd_xscale(struct megasas_instance *instance,
429 dma_addr_t frame_phys_addr,
430 u32 frame_count,
431 struct megasas_register_set __iomem *regs)
1341c939 432{
39a98554 433 unsigned long flags;
da0dc9fb 434
39a98554 435 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 436 writel((frame_phys_addr >> 3)|(frame_count),
437 &(regs)->inbound_queue_port);
39a98554 438 spin_unlock_irqrestore(&instance->hba_lock, flags);
439}
440
441/**
442 * megasas_adp_reset_xscale - For controller reset
443 * @regs: MFI register set
444 */
445static int
446megasas_adp_reset_xscale(struct megasas_instance *instance,
447 struct megasas_register_set __iomem *regs)
448{
449 u32 i;
450 u32 pcidata;
da0dc9fb 451
39a98554 452 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
453
454 for (i = 0; i < 3; i++)
455 msleep(1000); /* sleep for 3 secs */
456 pcidata = 0;
457 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 458 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 459 if (pcidata & 0x2) {
1be18254 460 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 461 pcidata &= ~0x2;
462 pci_write_config_dword(instance->pdev,
463 MFI_1068_PCSR_OFFSET, pcidata);
464
465 for (i = 0; i < 2; i++)
466 msleep(1000); /* need to wait 2 secs again */
467
468 pcidata = 0;
469 pci_read_config_dword(instance->pdev,
470 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 471 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 472 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 473 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 474 pcidata = 0;
475 pci_write_config_dword(instance->pdev,
476 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
477 }
478 }
479 return 0;
480}
481
482/**
483 * megasas_check_reset_xscale - For controller reset check
484 * @regs: MFI register set
485 */
486static int
487megasas_check_reset_xscale(struct megasas_instance *instance,
488 struct megasas_register_set __iomem *regs)
489{
8a01a41d 490 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 491 (le32_to_cpu(*instance->consumer) ==
492 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 493 return 1;
39a98554 494 return 0;
1341c939
SP		 495}
496
497static struct megasas_instance_template megasas_instance_template_xscale = {
498
499 .fire_cmd = megasas_fire_cmd_xscale,
500 .enable_intr = megasas_enable_intr_xscale,
b274cab7 501 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 502 .clear_intr = megasas_clear_intr_xscale,
503 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 504 .adp_reset = megasas_adp_reset_xscale,
505 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 506 .service_isr = megasas_isr,
507 .tasklet = megasas_complete_cmd_dpc,
508 .init_adapter = megasas_init_adapter_mfi,
509 .build_and_issue_cmd = megasas_build_and_issue_cmd,
510 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 511};
512
513/**
0d49016b 514* This is the end of set of functions & definitions specific
1341c939
SP		 515* to xscale (deviceid : 1064R, PERC5) controllers
516*/
517
f9876f0b 518/**
0d49016b 519* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 520* controllers
f9876f0b
SP		 521*/
522
523/**
524 * megasas_enable_intr_ppc - Enables interrupts
525 * @regs: MFI register set
526 */
527static inline void
d46a3ad6 528megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 529{
d46a3ad6 530 struct megasas_register_set __iomem *regs;
da0dc9fb 531
d46a3ad6 532 regs = instance->reg_set;
f9876f0b 533 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 534
39a98554 535 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 536
537 /* Dummy readl to force pci flush */
538 readl(&regs->outbound_intr_mask);
539}
540
b274cab7
SP		 541/**
542 * megasas_disable_intr_ppc - Disable interrupt
543 * @regs: MFI register set
544 */
545static inline void
d46a3ad6 546megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 547{
d46a3ad6 548 struct megasas_register_set __iomem *regs;
b274cab7 549 u32 mask = 0xFFFFFFFF;
da0dc9fb 550
d46a3ad6 551 regs = instance->reg_set;
b274cab7
SP		 552 writel(mask, &regs->outbound_intr_mask);
553 /* Dummy readl to force pci flush */
554 readl(&regs->outbound_intr_mask);
555}
556
f9876f0b
SP		 557/**
558 * megasas_read_fw_status_reg_ppc - returns the current FW status value
559 * @regs: MFI register set
560 */
561static u32
562megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
563{
564 return readl(&(regs)->outbound_scratch_pad);
565}
566
567/**
568 * megasas_clear_interrupt_ppc - Check & clear interrupt
569 * @regs: MFI register set
570 */
0d49016b 571static int
f9876f0b
SP		 572megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
573{
3cc6851f
AR		 574 u32 status, mfiStatus = 0;
575
f9876f0b
SP		 576 /*
577 * Check if it is our interrupt
578 */
579 status = readl(&regs->outbound_intr_status);
580
3cc6851f
AR		 581 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
582 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
583
584 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
585 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 586
587 /*
588 * Clear the interrupt by writing back the same value
589 */
590 writel(status, &regs->outbound_doorbell_clear);
591
06f579de
YB		 592 /* Dummy readl to force pci flush */
593 readl(&regs->outbound_doorbell_clear);
594
3cc6851f 595 return mfiStatus;
f9876f0b 596}
3cc6851f 597
f9876f0b
SP		 598/**
599 * megasas_fire_cmd_ppc - Sends command to the FW
600 * @frame_phys_addr : Physical address of cmd
601 * @frame_count : Number of frames for the command
602 * @regs : MFI register set
603 */
0d49016b 604static inline void
0c79e681
YB		 605megasas_fire_cmd_ppc(struct megasas_instance *instance,
606 dma_addr_t frame_phys_addr,
607 u32 frame_count,
608 struct megasas_register_set __iomem *regs)
f9876f0b 609{
39a98554 610 unsigned long flags;
da0dc9fb 611
39a98554 612 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 613 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 614 &(regs)->inbound_queue_port);
39a98554 615 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 616}
617
39a98554 618/**
619 * megasas_check_reset_ppc - For controller reset check
620 * @regs: MFI register set
621 */
622static int
623megasas_check_reset_ppc(struct megasas_instance *instance,
624 struct megasas_register_set __iomem *regs)
625{
8a01a41d 626 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 627 return 1;
628
39a98554 629 return 0;
630}
3cc6851f 631
f9876f0b 632static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 633
f9876f0b
SP		 634 .fire_cmd = megasas_fire_cmd_ppc,
635 .enable_intr = megasas_enable_intr_ppc,
b274cab7 636 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 637 .clear_intr = megasas_clear_intr_ppc,
638 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 639 .adp_reset = megasas_adp_reset_xscale,
39a98554 640 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 641 .service_isr = megasas_isr,
642 .tasklet = megasas_complete_cmd_dpc,
643 .init_adapter = megasas_init_adapter_mfi,
644 .build_and_issue_cmd = megasas_build_and_issue_cmd,
645 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 646};
647
87911122
YB		 648/**
649 * megasas_enable_intr_skinny - Enables interrupts
650 * @regs: MFI register set
651 */
652static inline void
d46a3ad6 653megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 654{
d46a3ad6 655 struct megasas_register_set __iomem *regs;
da0dc9fb 656
d46a3ad6 657 regs = instance->reg_set;
87911122
YB		 658 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
659
660 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
661
662 /* Dummy readl to force pci flush */
663 readl(&regs->outbound_intr_mask);
664}
665
666/**
667 * megasas_disable_intr_skinny - Disables interrupt
668 * @regs: MFI register set
669 */
670static inline void
d46a3ad6 671megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 672{
d46a3ad6 673 struct megasas_register_set __iomem *regs;
87911122 674 u32 mask = 0xFFFFFFFF;
da0dc9fb 675
d46a3ad6 676 regs = instance->reg_set;
87911122
YB		 677 writel(mask, &regs->outbound_intr_mask);
678 /* Dummy readl to force pci flush */
679 readl(&regs->outbound_intr_mask);
680}
681
682/**
683 * megasas_read_fw_status_reg_skinny - returns the current FW status value
684 * @regs: MFI register set
685 */
686static u32
687megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
688{
689 return readl(&(regs)->outbound_scratch_pad);
690}
691
692/**
693 * megasas_clear_interrupt_skinny - Check & clear interrupt
694 * @regs: MFI register set
695 */
696static int
697megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
698{
699 u32 status;
ebf054b0
AR		 700 u32 mfiStatus = 0;
701
87911122
YB		 702 /*
703 * Check if it is our interrupt
704 */
705 status = readl(&regs->outbound_intr_status);
706
707 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 708 return 0;
87911122
YB		 709 }
710
ebf054b0
AR		 711 /*
712 * Check if it is our interrupt
713 */
a3fda7dd 714 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 715 MFI_STATE_FAULT) {
716 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
717 } else
718 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
719
87911122
YB		 720 /*
721 * Clear the interrupt by writing back the same value
722 */
723 writel(status, &regs->outbound_intr_status);
724
725 /*
da0dc9fb
BH		 726 * dummy read to flush PCI
727 */
87911122
YB		 728 readl(&regs->outbound_intr_status);
729
ebf054b0 730 return mfiStatus;
87911122
YB		 731}
732
733/**
734 * megasas_fire_cmd_skinny - Sends command to the FW
735 * @frame_phys_addr : Physical address of cmd
736 * @frame_count : Number of frames for the command
737 * @regs : MFI register set
738 */
739static inline void
0c79e681
YB		 740megasas_fire_cmd_skinny(struct megasas_instance *instance,
741 dma_addr_t frame_phys_addr,
742 u32 frame_count,
87911122
YB		 743 struct megasas_register_set __iomem *regs)
744{
0c79e681 745 unsigned long flags;
da0dc9fb 746
39a98554 747 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 748 writel(upper_32_bits(frame_phys_addr),
749 &(regs)->inbound_high_queue_port);
750 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
751 &(regs)->inbound_low_queue_port);
b99dbe56 752 mmiowb();
39a98554 753 spin_unlock_irqrestore(&instance->hba_lock, flags);
754}
755
39a98554 756/**
757 * megasas_check_reset_skinny - For controller reset check
758 * @regs: MFI register set
759 */
760static int
761megasas_check_reset_skinny(struct megasas_instance *instance,
762 struct megasas_register_set __iomem *regs)
763{
8a01a41d 764 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 765 return 1;
766
39a98554 767 return 0;
87911122
YB		 768}
769
770static struct megasas_instance_template megasas_instance_template_skinny = {
771
772 .fire_cmd = megasas_fire_cmd_skinny,
773 .enable_intr = megasas_enable_intr_skinny,
774 .disable_intr = megasas_disable_intr_skinny,
775 .clear_intr = megasas_clear_intr_skinny,
776 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 777 .adp_reset = megasas_adp_reset_gen2,
39a98554 778 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 779 .service_isr = megasas_isr,
780 .tasklet = megasas_complete_cmd_dpc,
781 .init_adapter = megasas_init_adapter_mfi,
782 .build_and_issue_cmd = megasas_build_and_issue_cmd,
783 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 784};
785
786
6610a6b3
YB		 787/**
788* The following functions are defined for gen2 (deviceid : 0x78 0x79)
789* controllers
790*/
791
792/**
793 * megasas_enable_intr_gen2 - Enables interrupts
794 * @regs: MFI register set
795 */
796static inline void
d46a3ad6 797megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 798{
d46a3ad6 799 struct megasas_register_set __iomem *regs;
da0dc9fb 800
d46a3ad6 801 regs = instance->reg_set;
6610a6b3
YB		 802 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
803
804 /* write ~0x00000005 (4 & 1) to the intr mask*/
805 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
806
807 /* Dummy readl to force pci flush */
808 readl(&regs->outbound_intr_mask);
809}
810
811/**
812 * megasas_disable_intr_gen2 - Disables interrupt
813 * @regs: MFI register set
814 */
815static inline void
d46a3ad6 816megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 817{
d46a3ad6 818 struct megasas_register_set __iomem *regs;
6610a6b3 819 u32 mask = 0xFFFFFFFF;
da0dc9fb 820
d46a3ad6 821 regs = instance->reg_set;
6610a6b3
YB		 822 writel(mask, &regs->outbound_intr_mask);
823 /* Dummy readl to force pci flush */
824 readl(&regs->outbound_intr_mask);
825}
826
827/**
828 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
829 * @regs: MFI register set
830 */
831static u32
832megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
833{
834 return readl(&(regs)->outbound_scratch_pad);
835}
836
837/**
838 * megasas_clear_interrupt_gen2 - Check & clear interrupt
839 * @regs: MFI register set
840 */
841static int
842megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
843{
844 u32 status;
39a98554 845 u32 mfiStatus = 0;
da0dc9fb 846
6610a6b3
YB		 847 /*
848 * Check if it is our interrupt
849 */
850 status = readl(&regs->outbound_intr_status);
851
b5bccadd 852 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 853 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
854 }
855 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
856 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
857 }
6610a6b3
YB		 858
859 /*
860 * Clear the interrupt by writing back the same value
861 */
39a98554 862 if (mfiStatus)
863 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 864
865 /* Dummy readl to force pci flush */
866 readl(&regs->outbound_intr_status);
867
39a98554 868 return mfiStatus;
6610a6b3
YB		 869}
870/**
871 * megasas_fire_cmd_gen2 - Sends command to the FW
872 * @frame_phys_addr : Physical address of cmd
873 * @frame_count : Number of frames for the command
874 * @regs : MFI register set
875 */
876static inline void
0c79e681
YB		 877megasas_fire_cmd_gen2(struct megasas_instance *instance,
878 dma_addr_t frame_phys_addr,
879 u32 frame_count,
6610a6b3
YB		 880 struct megasas_register_set __iomem *regs)
881{
39a98554 882 unsigned long flags;
da0dc9fb 883
39a98554 884 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 885 writel((frame_phys_addr | (frame_count<<1))|1,
886 &(regs)->inbound_queue_port);
39a98554 887 spin_unlock_irqrestore(&instance->hba_lock, flags);
888}
889
890/**
891 * megasas_adp_reset_gen2 - For controller reset
892 * @regs: MFI register set
893 */
894static int
895megasas_adp_reset_gen2(struct megasas_instance *instance,
896 struct megasas_register_set __iomem *reg_set)
897{
da0dc9fb
BH		 898 u32 retry = 0 ;
899 u32 HostDiag;
900 u32 __iomem *seq_offset = &reg_set->seq_offset;
901 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 902
903 if (instance->instancet == &megasas_instance_template_skinny) {
904 seq_offset = &reg_set->fusion_seq_offset;
905 hostdiag_offset = &reg_set->fusion_host_diag;
906 }
907
908 writel(0, seq_offset);
909 writel(4, seq_offset);
910 writel(0xb, seq_offset);
911 writel(2, seq_offset);
912 writel(7, seq_offset);
913 writel(0xd, seq_offset);
39a98554 914
39a98554 915 msleep(1000);
916
ebf054b0 917 HostDiag = (u32)readl(hostdiag_offset);
39a98554 918
da0dc9fb 919 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 920 msleep(100);
ebf054b0 921 HostDiag = (u32)readl(hostdiag_offset);
1be18254 922 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 923 retry, HostDiag);
924
925 if (retry++ >= 100)
926 return 1;
927
928 }
929
1be18254 930 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 931
ebf054b0 932 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 933
934 ssleep(10);
935
ebf054b0 936 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 937 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 938 msleep(100);
ebf054b0 939 HostDiag = (u32)readl(hostdiag_offset);
1be18254 940 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 941 retry, HostDiag);
942
943 if (retry++ >= 1000)
944 return 1;
945
946 }
947 return 0;
948}
949
950/**
951 * megasas_check_reset_gen2 - For controller reset check
952 * @regs: MFI register set
953 */
954static int
955megasas_check_reset_gen2(struct megasas_instance *instance,
956 struct megasas_register_set __iomem *regs)
957{
8a01a41d 958 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 959 return 1;
707e09bd 960
39a98554 961 return 0;
6610a6b3
YB		 962}
963
964static struct megasas_instance_template megasas_instance_template_gen2 = {
965
966 .fire_cmd = megasas_fire_cmd_gen2,
967 .enable_intr = megasas_enable_intr_gen2,
968 .disable_intr = megasas_disable_intr_gen2,
969 .clear_intr = megasas_clear_intr_gen2,
970 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 971 .adp_reset = megasas_adp_reset_gen2,
972 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 973 .service_isr = megasas_isr,
974 .tasklet = megasas_complete_cmd_dpc,
975 .init_adapter = megasas_init_adapter_mfi,
976 .build_and_issue_cmd = megasas_build_and_issue_cmd,
977 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 978};
979
f9876f0b
SP		 980/**
981* This is the end of set of functions & definitions
39a98554 982* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 983*/
984
9c915a8c
AR		 985/*
986 * Template added for TB (Fusion)
987 */
988extern struct megasas_instance_template megasas_instance_template_fusion;
989
c4a3e0a5
BS		 990/**
991 * megasas_issue_polled - Issues a polling command
992 * @instance: Adapter soft state
0d49016b 993 * @cmd: Command packet to be issued
c4a3e0a5 994 *
2be2a988 995 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 996 */
9c915a8c 997int
c4a3e0a5
BS		 998megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
999{
c4a3e0a5
BS		 1000 struct megasas_header *frame_hdr = &cmd->frame->hdr;
1001
6d40afbc 1002 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 1003 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 1004
f4fc2093 1005 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1006 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1007 __func__, __LINE__);
1008 return DCMD_NOT_FIRED;
1009 }
c4a3e0a5 1010
f4fc2093
S		 1011 instance->instancet->issue_dcmd(instance, cmd);
1012
6d40afbc
SS		 1013 return wait_and_poll(instance, cmd, instance->requestorId ?
1014 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS		 1015}
1016
1017/**
1018 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1019 * @instance: Adapter soft state
1020 * @cmd: Command to be issued
cfbe7554 1021 * @timeout: Timeout in seconds
c4a3e0a5
BS		 1022 *
1023 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1024 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1025 * Used to issue ioctl commands.
1026 */
90dc9d98 1027int
c4a3e0a5 1028megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1029 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1030{
cfbe7554 1031 int ret = 0;
2be2a988 1032 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1033
f4fc2093 1034 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1035 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1036 __func__, __LINE__);
1037 return DCMD_NOT_FIRED;
1038 }
1039
f4fc2093
S		 1040 instance->instancet->issue_dcmd(instance, cmd);
1041
cfbe7554
SS		 1042 if (timeout) {
1043 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1044 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS		 1045 if (!ret) {
1046 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1047 __func__, __LINE__);
1048 return DCMD_TIMEOUT;
1049 }
cfbe7554
SS		 1050 } else
1051 wait_event(instance->int_cmd_wait_q,
2be2a988 1052 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1053
2be2a988 1054 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1055 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1056}
1057
1058/**
1059 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1060 * @instance: Adapter soft state
1061 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1062 * @timeout: Timeout in seconds
c4a3e0a5 1063 *
cfbe7554 1064 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1065 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 1066 * cmd and waits for return status.
1067 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1068 */
1069static int
1070megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1071 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 1072{
1073 struct megasas_cmd *cmd;
1074 struct megasas_abort_frame *abort_fr;
cfbe7554 1075 int ret = 0;
c4a3e0a5
BS		 1076
1077 cmd = megasas_get_cmd(instance);
1078
1079 if (!cmd)
1080 return -1;
1081
1082 abort_fr = &cmd->frame->abort;
1083
1084 /*
1085 * Prepare and issue the abort frame
1086 */
1087 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1088 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1089 abort_fr->flags = cpu_to_le16(0);
1090 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1091 abort_fr->abort_mfi_phys_addr_lo =
1092 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1093 abort_fr->abort_mfi_phys_addr_hi =
1094 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1095
1096 cmd->sync_cmd = 1;
2be2a988 1097 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1098
f4fc2093 1099 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1100 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1101 __func__, __LINE__);
1102 return DCMD_NOT_FIRED;
1103 }
c4a3e0a5 1104
f4fc2093
S		 1105 instance->instancet->issue_dcmd(instance, cmd);
1106
cfbe7554
SS		 1107 if (timeout) {
1108 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1109 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1110 if (!ret) {
6d40afbc
SS		 1111 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1112 __func__, __LINE__);
1113 return DCMD_TIMEOUT;
cfbe7554
SS		 1114 }
1115 } else
1116 wait_event(instance->abort_cmd_wait_q,
2be2a988 1117 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1118
39a98554 1119 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1120
1121 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 1122 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1123 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1124}
1125
1126/**
1127 * megasas_make_sgl32 - Prepares 32-bit SGL
1128 * @instance: Adapter soft state
1129 * @scp: SCSI command from the mid-layer
1130 * @mfi_sgl: SGL to be filled in
1131 *
1132 * If successful, this function returns the number of SG elements. Otherwise,
1133 * it returnes -1.
1134 */
858119e1 1135static int
c4a3e0a5
BS		 1136megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1137 union megasas_sgl *mfi_sgl)
1138{
1139 int i;
1140 int sge_count;
1141 struct scatterlist *os_sgl;
1142
155d98f0
FT		 1143 sge_count = scsi_dma_map(scp);
1144 BUG_ON(sge_count < 0);
c4a3e0a5 1145
155d98f0
FT		 1146 if (sge_count) {
1147 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1148 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1149 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1150 }
c4a3e0a5 1151 }
c4a3e0a5
BS		 1152 return sge_count;
1153}
1154
1155/**
1156 * megasas_make_sgl64 - Prepares 64-bit SGL
1157 * @instance: Adapter soft state
1158 * @scp: SCSI command from the mid-layer
1159 * @mfi_sgl: SGL to be filled in
1160 *
1161 * If successful, this function returns the number of SG elements. Otherwise,
1162 * it returnes -1.
1163 */
858119e1 1164static int
c4a3e0a5
BS		 1165megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1166 union megasas_sgl *mfi_sgl)
1167{
1168 int i;
1169 int sge_count;
1170 struct scatterlist *os_sgl;
1171
155d98f0
FT		 1172 sge_count = scsi_dma_map(scp);
1173 BUG_ON(sge_count < 0);
c4a3e0a5 1174
155d98f0
FT		 1175 if (sge_count) {
1176 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1177 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1178 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1179 }
c4a3e0a5 1180 }
c4a3e0a5
BS		 1181 return sge_count;
1182}
1183
f4c9a131
YB		 1184/**
1185 * megasas_make_sgl_skinny - Prepares IEEE SGL
1186 * @instance: Adapter soft state
1187 * @scp: SCSI command from the mid-layer
1188 * @mfi_sgl: SGL to be filled in
1189 *
1190 * If successful, this function returns the number of SG elements. Otherwise,
1191 * it returnes -1.
1192 */
1193static int
1194megasas_make_sgl_skinny(struct megasas_instance *instance,
1195 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1196{
1197 int i;
1198 int sge_count;
1199 struct scatterlist *os_sgl;
1200
1201 sge_count = scsi_dma_map(scp);
1202
1203 if (sge_count) {
1204 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1205 mfi_sgl->sge_skinny[i].length =
1206 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1207 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1208 cpu_to_le64(sg_dma_address(os_sgl));
1209 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1210 }
1211 }
1212 return sge_count;
1213}
1214
b1df99d9
SP		 1215 /**
1216 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1217 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1218 * @sge_count : number of sg elements
1219 *
1220 * Returns the number of frames required for numnber of sge's (sge_count)
1221 */
1222
f4c9a131
YB		 1223static u32 megasas_get_frame_count(struct megasas_instance *instance,
1224 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1225{
1226 int num_cnt;
1227 int sge_bytes;
1228 u32 sge_sz;
da0dc9fb 1229 u32 frame_count = 0;
b1df99d9
SP		 1230
1231 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1232 sizeof(struct megasas_sge32);
1233
f4c9a131
YB		 1234 if (instance->flag_ieee) {
1235 sge_sz = sizeof(struct megasas_sge_skinny);
1236 }
1237
b1df99d9 1238 /*
d532dbe2 1239 * Main frame can contain 2 SGEs for 64-bit SGLs and
1240 * 3 SGEs for 32-bit SGLs for ldio &
1241 * 1 SGEs for 64-bit SGLs and
1242 * 2 SGEs for 32-bit SGLs for pthru frame
1243 */
1244 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1245 if (instance->flag_ieee == 1) {
1246 num_cnt = sge_count - 1;
1247 } else if (IS_DMA64)
d532dbe2 1248 num_cnt = sge_count - 1;
1249 else
1250 num_cnt = sge_count - 2;
1251 } else {
f4c9a131
YB		 1252 if (instance->flag_ieee == 1) {
1253 num_cnt = sge_count - 1;
1254 } else if (IS_DMA64)
d532dbe2 1255 num_cnt = sge_count - 2;
1256 else
1257 num_cnt = sge_count - 3;
1258 }
b1df99d9 1259
da0dc9fb 1260 if (num_cnt > 0) {
b1df99d9
SP		 1261 sge_bytes = sge_sz * num_cnt;
1262
1263 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1264 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1265 }
1266 /* Main frame */
da0dc9fb 1267 frame_count += 1;
b1df99d9
SP		 1268
1269 if (frame_count > 7)
1270 frame_count = 8;
1271 return frame_count;
1272}
1273
c4a3e0a5
BS		 1274/**
1275 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1276 * @instance: Adapter soft state
1277 * @scp: SCSI command
1278 * @cmd: Command to be prepared in
1279 *
1280 * This function prepares CDB commands. These are typcially pass-through
1281 * commands to the devices.
1282 */
858119e1 1283static int
c4a3e0a5
BS		 1284megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1285 struct megasas_cmd *cmd)
1286{
c4a3e0a5
BS		 1287 u32 is_logical;
1288 u32 device_id;
1289 u16 flags = 0;
1290 struct megasas_pthru_frame *pthru;
1291
3cabd162 1292 is_logical = MEGASAS_IS_LOGICAL(scp->device);
4a5c814d 1293 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1294 pthru = (struct megasas_pthru_frame *)cmd->frame;
1295
1296 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1297 flags = MFI_FRAME_DIR_WRITE;
1298 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1299 flags = MFI_FRAME_DIR_READ;
1300 else if (scp->sc_data_direction == PCI_DMA_NONE)
1301 flags = MFI_FRAME_DIR_NONE;
1302
f4c9a131
YB		 1303 if (instance->flag_ieee == 1) {
1304 flags |= MFI_FRAME_IEEE;
1305 }
1306
c4a3e0a5
BS		 1307 /*
1308 * Prepare the DCDB frame
1309 */
1310 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1311 pthru->cmd_status = 0x0;
1312 pthru->scsi_status = 0x0;
1313 pthru->target_id = device_id;
1314 pthru->lun = scp->device->lun;
1315 pthru->cdb_len = scp->cmd_len;
1316 pthru->timeout = 0;
780a3762 1317 pthru->pad_0 = 0;
94cd65dd
SS		 1318 pthru->flags = cpu_to_le16(flags);
1319 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1320
1321 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1322
8d568253 1323 /*
da0dc9fb
BH		 1324 * If the command is for the tape device, set the
1325 * pthru timeout to the os layer timeout value.
1326 */
8d568253
YB		 1327 if (scp->device->type == TYPE_TAPE) {
1328 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1329 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1330 else
94cd65dd 1331 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1332 }
1333
c4a3e0a5
BS		 1334 /*
1335 * Construct SGL
1336 */
f4c9a131 1337 if (instance->flag_ieee == 1) {
94cd65dd 1338 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1339 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1340 &pthru->sgl);
1341 } else if (IS_DMA64) {
94cd65dd 1342 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1343 pthru->sge_count = megasas_make_sgl64(instance, scp,
1344 &pthru->sgl);
1345 } else
1346 pthru->sge_count = megasas_make_sgl32(instance, scp,
1347 &pthru->sgl);
1348
bdc6fb8d 1349 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1350 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1351 pthru->sge_count);
1352 return 0;
1353 }
1354
c4a3e0a5
BS		 1355 /*
1356 * Sense info specific
1357 */
1358 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1359 pthru->sense_buf_phys_addr_hi =
1360 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1361 pthru->sense_buf_phys_addr_lo =
1362 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1363
c4a3e0a5
BS		 1364 /*
1365 * Compute the total number of frames this command consumes. FW uses
1366 * this number to pull sufficient number of frames from host memory.
1367 */
f4c9a131 1368 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1369 PTHRU_FRAME);
c4a3e0a5
BS		 1370
1371 return cmd->frame_count;
1372}
1373
1374/**
1375 * megasas_build_ldio - Prepares IOs to logical devices
1376 * @instance: Adapter soft state
1377 * @scp: SCSI command
fd589a8f 1378 * @cmd: Command to be prepared
c4a3e0a5
BS		 1379 *
1380 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1381 */
858119e1 1382static int
c4a3e0a5
BS		 1383megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1384 struct megasas_cmd *cmd)
1385{
c4a3e0a5
BS		 1386 u32 device_id;
1387 u8 sc = scp->cmnd[0];
1388 u16 flags = 0;
1389 struct megasas_io_frame *ldio;
1390
4a5c814d 1391 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1392 ldio = (struct megasas_io_frame *)cmd->frame;
1393
1394 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1395 flags = MFI_FRAME_DIR_WRITE;
1396 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1397 flags = MFI_FRAME_DIR_READ;
1398
f4c9a131
YB		 1399 if (instance->flag_ieee == 1) {
1400 flags |= MFI_FRAME_IEEE;
1401 }
1402
c4a3e0a5 1403 /*
b1df99d9 1404 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1405 */
1406 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1407 ldio->cmd_status = 0x0;
1408 ldio->scsi_status = 0x0;
1409 ldio->target_id = device_id;
1410 ldio->timeout = 0;
1411 ldio->reserved_0 = 0;
1412 ldio->pad_0 = 0;
94cd65dd 1413 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1414 ldio->start_lba_hi = 0;
1415 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1416
1417 /*
1418 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1419 */
1420 if (scp->cmd_len == 6) {
94cd65dd
SS		 1421 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1422 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1423 ((u32) scp->cmnd[2] << 8) |
1424 (u32) scp->cmnd[3]);
c4a3e0a5 1425
94cd65dd 1426 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1427 }
1428
1429 /*
1430 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1431 */
1432 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1433 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1434 ((u32) scp->cmnd[7] << 8));
1435 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1436 ((u32) scp->cmnd[3] << 16) |
1437 ((u32) scp->cmnd[4] << 8) |
1438 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1439 }
1440
1441 /*
1442 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1443 */
1444 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1445 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1446 ((u32) scp->cmnd[7] << 16) |
1447 ((u32) scp->cmnd[8] << 8) |
1448 (u32) scp->cmnd[9]);
c4a3e0a5 1449
94cd65dd
SS		 1450 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1451 ((u32) scp->cmnd[3] << 16) |
1452 ((u32) scp->cmnd[4] << 8) |
1453 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1454 }
1455
1456 /*
1457 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1458 */
1459 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1460 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1461 ((u32) scp->cmnd[11] << 16) |
1462 ((u32) scp->cmnd[12] << 8) |
1463 (u32) scp->cmnd[13]);
c4a3e0a5 1464
94cd65dd
SS		 1465 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1466 ((u32) scp->cmnd[7] << 16) |
1467 ((u32) scp->cmnd[8] << 8) |
1468 (u32) scp->cmnd[9]);
c4a3e0a5 1469
94cd65dd
SS		 1470 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1471 ((u32) scp->cmnd[3] << 16) |
1472 ((u32) scp->cmnd[4] << 8) |
1473 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1474
1475 }
1476
1477 /*
1478 * Construct SGL
1479 */
f4c9a131 1480 if (instance->flag_ieee) {
94cd65dd 1481 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1482 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1483 &ldio->sgl);
1484 } else if (IS_DMA64) {
94cd65dd 1485 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1486 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1487 } else
1488 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1489
bdc6fb8d 1490 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1491 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1492 ldio->sge_count);
1493 return 0;
1494 }
1495
c4a3e0a5
BS		 1496 /*
1497 * Sense info specific
1498 */
1499 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1500 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1501 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1502
b1df99d9
SP		 1503 /*
1504 * Compute the total number of frames this command consumes. FW uses
1505 * this number to pull sufficient number of frames from host memory.
1506 */
f4c9a131
YB		 1507 cmd->frame_count = megasas_get_frame_count(instance,
1508 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1509
1510 return cmd->frame_count;
1511}
1512
1513/**
7497cde8
SS		 1514 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1515 * and whether it's RW or non RW
cb59aa6a 1516 * @scmd: SCSI command
0d49016b 1517 *
c4a3e0a5 1518 */
7497cde8 1519inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1520{
7497cde8
SS		 1521 int ret;
1522
cb59aa6a
SP		 1523 switch (cmd->cmnd[0]) {
1524 case READ_10:
1525 case WRITE_10:
1526 case READ_12:
1527 case WRITE_12:
1528 case READ_6:
1529 case WRITE_6:
1530 case READ_16:
1531 case WRITE_16:
3cabd162 1532 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8
SS		 1533 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1534 break;
cb59aa6a 1535 default:
3cabd162 1536 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8 1537 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1538 }
7497cde8 1539 return ret;
c4a3e0a5
BS		 1540}
1541
658dcedb
SP		 1542 /**
1543 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1544 * in FW
658dcedb
SP		 1545 * @instance: Adapter soft state
1546 */
1547static inline void
1548megasas_dump_pending_frames(struct megasas_instance *instance)
1549{
1550 struct megasas_cmd *cmd;
1551 int i,n;
1552 union megasas_sgl *mfi_sgl;
1553 struct megasas_io_frame *ldio;
1554 struct megasas_pthru_frame *pthru;
1555 u32 sgcount;
50b7f5a2 1556 u16 max_cmd = instance->max_fw_cmds;
658dcedb 1557
1be18254
BH		 1558 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1559 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1560 if (IS_DMA64)
1be18254 1561 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1562 else
1be18254 1563 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1564
1be18254 1565 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1566 for (i = 0; i < max_cmd; i++) {
1567 cmd = instance->cmd_list[i];
da0dc9fb 1568 if (!cmd->scmd)
658dcedb 1569 continue;
1be18254 1570 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1571 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1572 ldio = (struct megasas_io_frame *)cmd->frame;
1573 mfi_sgl = &ldio->sgl;
1574 sgcount = ldio->sge_count;
1be18254 1575 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1576 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1577 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1578 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1579 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1580 } else {
658dcedb
SP		 1581 pthru = (struct megasas_pthru_frame *) cmd->frame;
1582 mfi_sgl = &pthru->sgl;
1583 sgcount = pthru->sge_count;
1be18254 1584 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1585 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1586 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1587 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1588 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1589 }
da0dc9fb
BH		 1590 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1591 for (n = 0; n < sgcount; n++) {
1592 if (IS_DMA64)
1593 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1594 le32_to_cpu(mfi_sgl->sge64[n].length),
1595 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1596 else
1597 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1598 le32_to_cpu(mfi_sgl->sge32[n].length),
1599 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1600 }
1601 }
658dcedb 1602 } /*for max_cmd*/
1be18254 1603 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1604 for (i = 0; i < max_cmd; i++) {
1605
1606 cmd = instance->cmd_list[i];
1607
da0dc9fb 1608 if (cmd->sync_cmd == 1)
1be18254 1609 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1610 }
1be18254 1611 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1612}
1613
cd50ba8e
AR		 1614u32
1615megasas_build_and_issue_cmd(struct megasas_instance *instance,
1616 struct scsi_cmnd *scmd)
1617{
1618 struct megasas_cmd *cmd;
1619 u32 frame_count;
1620
1621 cmd = megasas_get_cmd(instance);
1622 if (!cmd)
1623 return SCSI_MLQUEUE_HOST_BUSY;
1624
1625 /*
1626 * Logical drive command
1627 */
7497cde8 1628 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1629 frame_count = megasas_build_ldio(instance, scmd, cmd);
1630 else
1631 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1632
1633 if (!frame_count)
1634 goto out_return_cmd;
1635
1636 cmd->scmd = scmd;
1637 scmd->SCp.ptr = (char *)cmd;
1638
1639 /*
1640 * Issue the command to the FW
1641 */
1642 atomic_inc(&instance->fw_outstanding);
1643
1644 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1645 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1646
1647 return 0;
1648out_return_cmd:
1649 megasas_return_cmd(instance, cmd);
f9a9dee6 1650 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e
AR		 1651}
1652
1653
c4a3e0a5
BS		 1654/**
1655 * megasas_queue_command - Queue entry point
1656 * @scmd: SCSI command to be queued
1657 * @done: Callback entry point
1658 */
1659static int
fb1a24ff 1660megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1661{
c4a3e0a5 1662 struct megasas_instance *instance;
18365b13 1663 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS		 1664
1665 instance = (struct megasas_instance *)
1666 scmd->device->host->hostdata;
af37acfb 1667
aa00832b
SS		 1668 if (instance->unload == 1) {
1669 scmd->result = DID_NO_CONNECT << 16;
1670 scmd->scsi_done(scmd);
1671 return 0;
1672 }
1673
39a98554 1674 if (instance->issuepend_done == 0)
af37acfb
SP		 1675 return SCSI_MLQUEUE_HOST_BUSY;
1676
b09e66da 1677
229fe47c 1678 /* Check for an mpio path and adjust behavior */
8a01a41d 1679 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1680 if (megasas_check_mpio_paths(instance, scmd) ==
f55cf47d 1681 (DID_REQUEUE << 16)) {
229fe47c
AR		 1682 return SCSI_MLQUEUE_HOST_BUSY;
1683 } else {
229fe47c 1684 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1685 scmd->scsi_done(scmd);
229fe47c
AR		 1686 return 0;
1687 }
1688 }
1689
8a01a41d 1690 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1691 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1692 scmd->scsi_done(scmd);
b09e66da
SS		 1693 return 0;
1694 }
1695
18365b13
SS		 1696 mr_device_priv_data = scmd->device->hostdata;
1697 if (!mr_device_priv_data) {
18365b13
SS		 1698 scmd->result = DID_NO_CONNECT << 16;
1699 scmd->scsi_done(scmd);
1700 return 0;
1701 }
1702
8a01a41d 1703 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1704 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1705
8a01a41d 1706 if (mr_device_priv_data->tm_busy)
18365b13 1707 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1708
39a98554 1709
c4a3e0a5
BS		 1710 scmd->result = 0;
1711
3cabd162 1712 if (MEGASAS_IS_LOGICAL(scmd->device) &&
51087a86
SS		 1713 (scmd->device->id >= instance->fw_supported_vd_count ||
1714 scmd->device->lun)) {
cb59aa6a
SP		 1715 scmd->result = DID_BAD_TARGET << 16;
1716 goto out_done;
c4a3e0a5
BS		 1717 }
1718
3cabd162
S		 1719 if ((scmd->cmnd[0] == SYNCHRONIZE_CACHE) &&
1720 MEGASAS_IS_LOGICAL(scmd->device) &&
1721 (!instance->fw_sync_cache_support)) {
02b01e01
SP		 1722 scmd->result = DID_OK << 16;
1723 goto out_done;
02b01e01
SP		 1724 }
1725
f9a9dee6 1726 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1727
cb59aa6a 1728 out_done:
fb1a24ff 1729 scmd->scsi_done(scmd);
cb59aa6a 1730 return 0;
c4a3e0a5
BS		 1731}
1732
044833b5
YB		 1733static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1734{
1735 int i;
1736
1737 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1738
1739 if ((megasas_mgmt_info.instance[i]) &&
1740 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1741 return megasas_mgmt_info.instance[i];
1742 }
1743
1744 return NULL;
1745}
1746
0b48d12d 1747/*
15dd0381
S		 1748* megasas_set_dynamic_target_properties -
1749* Device property set by driver may not be static and it is required to be
1750* updated after OCR
1751*
1752* set tm_capable.
1753* set dma alignment (only for eedp protection enable vd).
0b48d12d 1754*
1755* @sdev: OS provided scsi device
1756*
1757* Returns void
1758*/
15dd0381 1759void megasas_set_dynamic_target_properties(struct scsi_device *sdev)
0b48d12d 1760{
15dd0381
S		 1761 u16 pd_index = 0, ld;
1762 u32 device_id;
0b48d12d 1763 struct megasas_instance *instance;
1764 struct fusion_context *fusion;
18365b13
SS		 1765 struct MR_PRIV_DEVICE *mr_device_priv_data;
1766 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1767 struct MR_LD_RAID *raid;
1768 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1769
1770 instance = megasas_lookup_instance(sdev->host->host_no);
1771 fusion = instance->ctrl_context;
18365b13 1772 mr_device_priv_data = sdev->hostdata;
0b48d12d 1773
ed981b81 1774 if (!fusion || !mr_device_priv_data)
0b48d12d 1775 return;
1776
ed981b81 1777 if (MEGASAS_IS_LOGICAL(sdev)) {
0b48d12d 1778 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1779 + sdev->id;
1780 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1781 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
ed981b81
S		 1782 if (ld >= instance->fw_supported_vd_count)
1783 return;
0b48d12d 1784 raid = MR_LdRaidGet(ld, local_map_ptr);
1785
1786 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
15dd0381 1787 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
ed981b81 1788
18365b13
SS		 1789 mr_device_priv_data->is_tm_capable =
1790 raid->capability.tmCapable;
ed981b81
S		 1791 } else if (instance->use_seqnum_jbod_fp) {
1792 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
15dd0381 1793 sdev->id;
ed981b81
S		 1794 pd_sync = (void *)fusion->pd_seq_sync
1795 [(instance->pd_seq_map_id - 1) & 1];
1796 mr_device_priv_data->is_tm_capable =
15dd0381 1797 pd_sync->seq[pd_index].capability.tmCapable;
0b48d12d 1798 }
1799}
1800
15dd0381
S		 1801/*
1802 * megasas_set_nvme_device_properties -
1803 * set nomerges=2
1804 * set virtual page boundary = 4K (current mr_nvme_pg_size is 4K).
1805 * set maximum io transfer = MDTS of NVME device provided by MR firmware.
1806 *
1807 * MR firmware provides value in KB. Caller of this function converts
1808 * kb into bytes.
1809 *
1810 * e.a MDTS=5 means 2^5 * nvme page size. (In case of 4K page size,
1811 * MR firmware provides value 128 as (32 * 4K) = 128K.
1812 *
1813 * @sdev: scsi device
1814 * @max_io_size: maximum io transfer size
1815 *
1816 */
1817static inline void
1818megasas_set_nvme_device_properties(struct scsi_device *sdev, u32 max_io_size)
2216c305 1819{
2216c305 1820 struct megasas_instance *instance;
15dd0381 1821 u32 mr_nvme_pg_size;
2216c305 1822
15dd0381
S		 1823 instance = (struct megasas_instance *)sdev->host->hostdata;
1824 mr_nvme_pg_size = max_t(u32, instance->nvme_page_size,
1825 MR_DEFAULT_NVME_PAGE_SIZE);
2216c305 1826
15dd0381 1827 blk_queue_max_hw_sectors(sdev->request_queue, (max_io_size / 512));
2216c305 1828
15dd0381
S		 1829 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, sdev->request_queue);
1830 blk_queue_virt_boundary(sdev->request_queue, mr_nvme_pg_size - 1);
1831}
2216c305 1832
2216c305 1833
15dd0381
S		 1834/*
1835 * megasas_set_static_target_properties -
1836 * Device property set by driver are static and it is not required to be
1837 * updated after OCR.
1838 *
1839 * set io timeout
1840 * set device queue depth
1841 * set nvme device properties. see - megasas_set_nvme_device_properties
1842 *
1843 * @sdev: scsi device
96188a89 1844 * @is_target_prop true, if fw provided target properties.
15dd0381 1845 */
96188a89
S		 1846static void megasas_set_static_target_properties(struct scsi_device *sdev,
1847 bool is_target_prop)
15dd0381
S		 1848{
1849 u16 target_index = 0;
1850 u8 interface_type;
1851 u32 device_qd = MEGASAS_DEFAULT_CMD_PER_LUN;
1852 u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB;
96188a89 1853 u32 tgt_device_qd;
15dd0381
S		 1854 struct megasas_instance *instance;
1855 struct MR_PRIV_DEVICE *mr_device_priv_data;
2216c305 1856
15dd0381
S		 1857 instance = megasas_lookup_instance(sdev->host->host_no);
1858 mr_device_priv_data = sdev->hostdata;
1859 interface_type = mr_device_priv_data->interface_type;
2216c305 1860
15dd0381
S		 1861 /*
1862 * The RAID firmware may require extended timeouts.
1863 */
1864 blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ);
2216c305 1865
15dd0381
S		 1866 target_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1867
1868 switch (interface_type) {
1869 case SAS_PD:
1870 device_qd = MEGASAS_SAS_QD;
1871 break;
1872 case SATA_PD:
1873 device_qd = MEGASAS_SATA_QD;
1874 break;
1875 case NVME_PD:
1876 device_qd = MEGASAS_NVME_QD;
1877 break;
2216c305 1878 }
15dd0381 1879
96188a89
S		 1880 if (is_target_prop) {
1881 tgt_device_qd = le32_to_cpu(instance->tgt_prop->device_qdepth);
1882 if (tgt_device_qd &&
1883 (tgt_device_qd <= instance->host->can_queue))
1884 device_qd = tgt_device_qd;
1885
1886 /* max_io_size_kb will be set to non zero for
1887 * nvme based vd and syspd.
1888 */
1889 max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb);
1890 }
1891
15dd0381
S		 1892 if (instance->nvme_page_size && max_io_size_kb)
1893 megasas_set_nvme_device_properties(sdev, (max_io_size_kb << 10));
1894
1895 scsi_change_queue_depth(sdev, device_qd);
1896
2216c305
SS		 1897}
1898
18365b13 1899
147aab6a
CH		 1900static int megasas_slave_configure(struct scsi_device *sdev)
1901{
aed335ee
SS		 1902 u16 pd_index = 0;
1903 struct megasas_instance *instance;
96188a89
S		 1904 int ret_target_prop = DCMD_FAILED;
1905 bool is_target_prop = false;
aed335ee
SS		 1906
1907 instance = megasas_lookup_instance(sdev->host->host_no);
30845586 1908 if (instance->pd_list_not_supported) {
3cabd162 1909 if (!MEGASAS_IS_LOGICAL(sdev) && sdev->type == TYPE_DISK) {
aed335ee
SS		 1910 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1911 sdev->id;
1912 if (instance->pd_list[pd_index].driveState !=
1913 MR_PD_STATE_SYSTEM)
1914 return -ENXIO;
1915 }
1916 }
18365b13 1917
15dd0381
S		 1918 mutex_lock(&instance->hba_mutex);
1919 /* Send DCMD to Firmware and cache the information */
1920 if ((instance->pd_info) && !MEGASAS_IS_LOGICAL(sdev))
1921 megasas_get_pd_info(instance, sdev);
1922
96188a89
S		 1923 /* Some ventura firmware may not have instance->nvme_page_size set.
1924 * Do not send MR_DCMD_DRV_GET_TARGET_PROP
1925 */
1926 if ((instance->tgt_prop) && (instance->nvme_page_size))
1927 ret_target_prop = megasas_get_target_prop(instance, sdev);
1928
1929 is_target_prop = (ret_target_prop == DCMD_SUCCESS) ? true : false;
1930 megasas_set_static_target_properties(sdev, is_target_prop);
15dd0381
S		 1931
1932 mutex_unlock(&instance->hba_mutex);
1933
1934 /* This sdev property may change post OCR */
1935 megasas_set_dynamic_target_properties(sdev);
07e38d94 1936
044833b5
YB		 1937 return 0;
1938}
1939
1940static int megasas_slave_alloc(struct scsi_device *sdev)
1941{
da0dc9fb 1942 u16 pd_index = 0;
044833b5 1943 struct megasas_instance *instance ;
18365b13 1944 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1945
044833b5 1946 instance = megasas_lookup_instance(sdev->host->host_no);
3cabd162 1947 if (!MEGASAS_IS_LOGICAL(sdev)) {
044833b5
YB		 1948 /*
1949 * Open the OS scan to the SYSTEM PD
1950 */
1951 pd_index =
1952 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1953 sdev->id;
30845586
SS		 1954 if ((instance->pd_list_not_supported ||
1955 instance->pd_list[pd_index].driveState ==
aed335ee 1956 MR_PD_STATE_SYSTEM)) {
18365b13 1957 goto scan_target;
044833b5
YB		 1958 }
1959 return -ENXIO;
1960 }
18365b13
SS		 1961
1962scan_target:
1963 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
1964 GFP_KERNEL);
1965 if (!mr_device_priv_data)
1966 return -ENOMEM;
1967 sdev->hostdata = mr_device_priv_data;
49524b3c
S		 1968
1969 atomic_set(&mr_device_priv_data->r1_ldio_hint,
1970 instance->r1_ldio_hint_default);
147aab6a
CH		 1971 return 0;
1972}
1973
18365b13
SS		 1974static void megasas_slave_destroy(struct scsi_device *sdev)
1975{
1976 kfree(sdev->hostdata);
1977 sdev->hostdata = NULL;
1978}
1979
c8dd61ef
SS		 1980/*
1981* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1982* kill adapter
1983* @instance: Adapter soft state
1984*
1985*/
6a6981fe 1986static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1987{
1988 int i;
1989 struct megasas_cmd *cmd_mfi;
1990 struct megasas_cmd_fusion *cmd_fusion;
1991 struct fusion_context *fusion = instance->ctrl_context;
1992
1993 /* Find all outstanding ioctls */
1994 if (fusion) {
1995 for (i = 0; i < instance->max_fw_cmds; i++) {
1996 cmd_fusion = fusion->cmd_list[i];
1997 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1998 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1999 if (cmd_mfi->sync_cmd &&
eb3fe263
S		 2000 (cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)) {
2001 cmd_mfi->frame->hdr.cmd_status =
2002 MFI_STAT_WRONG_STATE;
c8dd61ef
SS		 2003 megasas_complete_cmd(instance,
2004 cmd_mfi, DID_OK);
eb3fe263 2005 }
c8dd61ef
SS		 2006 }
2007 }
2008 } else {
2009 for (i = 0; i < instance->max_fw_cmds; i++) {
2010 cmd_mfi = instance->cmd_list[i];
2011 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
2012 MFI_CMD_ABORT)
2013 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
2014 }
2015 }
2016}
2017
2018
9c915a8c 2019void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 2020{
c8dd61ef 2021 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 2022 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS		 2023 /* Wait 1 second to ensure IO or ioctls in build have posted */
2024 msleep(1000);
39a98554 2025 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 2026 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 2027 (instance->adapter_type != MFI_SERIES)) {
da0dc9fb 2028 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c
AR		 2029 /* Flush */
2030 readl(&instance->reg_set->doorbell);
8f67c8c5 2031 if (instance->requestorId && instance->peerIsPresent)
229fe47c 2032 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 2033 } else {
c8dd61ef
SS		 2034 writel(MFI_STOP_ADP,
2035 &instance->reg_set->inbound_doorbell);
9c915a8c 2036 }
c8dd61ef
SS		 2037 /* Complete outstanding ioctls when adapter is killed */
2038 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 2039}
2040
2041 /**
2042 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
2043 * restored to max value
2044 * @instance: Adapter soft state
2045 *
2046 */
2047void
2048megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
2049{
2050 unsigned long flags;
ae09a6c1 2051
9c915a8c 2052 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 2053 && time_after(jiffies, instance->last_time + 5 * HZ)
2054 && atomic_read(&instance->fw_outstanding) <
2055 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 2056
2057 spin_lock_irqsave(instance->host->host_lock, flags);
2058 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 2059
308ec459 2060 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 2061 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 2062 }
2063}
2064
7343eb65 2065/**
2066 * megasas_complete_cmd_dpc - Returns FW's controller structure
2067 * @instance_addr: Address of adapter soft state
2068 *
2069 * Tasklet to complete cmds
2070 */
2071static void megasas_complete_cmd_dpc(unsigned long instance_addr)
2072{
2073 u32 producer;
2074 u32 consumer;
2075 u32 context;
2076 struct megasas_cmd *cmd;
2077 struct megasas_instance *instance =
2078 (struct megasas_instance *)instance_addr;
2079 unsigned long flags;
2080
2081 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 2082 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 2083 return;
2084
2085 spin_lock_irqsave(&instance->completion_lock, flags);
2086
94cd65dd
SS		 2087 producer = le32_to_cpu(*instance->producer);
2088 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2089
2090 while (consumer != producer) {
94cd65dd 2091 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2092 if (context >= instance->max_fw_cmds) {
1be18254 2093 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2094 context);
2095 BUG();
2096 }
7343eb65 2097
2098 cmd = instance->cmd_list[context];
2099
2100 megasas_complete_cmd(instance, cmd, DID_OK);
2101
2102 consumer++;
2103 if (consumer == (instance->max_fw_cmds + 1)) {
2104 consumer = 0;
2105 }
2106 }
2107
94cd65dd 2108 *instance->consumer = cpu_to_le32(producer);
7343eb65 2109
2110 spin_unlock_irqrestore(&instance->completion_lock, flags);
2111
2112 /*
2113 * Check if we can restore can_queue
2114 */
9c915a8c 2115 megasas_check_and_restore_queue_depth(instance);
7343eb65 2116}
2117
229fe47c
AR		 2118/**
2119 * megasas_start_timer - Initializes a timer object
2120 * @instance: Adapter soft state
2121 * @timer: timer object to be initialized
2122 * @fn: timer function
2123 * @interval: time interval between timer function call
2124 *
2125 */
2126void megasas_start_timer(struct megasas_instance *instance,
2127 struct timer_list *timer,
2128 void *fn, unsigned long interval)
2129{
2130 init_timer(timer);
2131 timer->expires = jiffies + interval;
2132 timer->data = (unsigned long)instance;
2133 timer->function = fn;
2134 add_timer(timer);
2135}
2136
707e09bd
YB		 2137static void
2138megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2139
2140static void
2141process_fw_state_change_wq(struct work_struct *work);
2142
2143void megasas_do_ocr(struct megasas_instance *instance)
2144{
2145 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2146 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2147 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2148 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2149 }
d46a3ad6 2150 instance->instancet->disable_intr(instance);
8a01a41d 2151 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB		 2152 instance->issuepend_done = 0;
2153
2154 atomic_set(&instance->fw_outstanding, 0);
2155 megasas_internal_reset_defer_cmds(instance);
2156 process_fw_state_change_wq(&instance->work_init);
2157}
2158
4cbfea88
AR		 2159static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2160 int initial)
229fe47c
AR		 2161{
2162 struct megasas_cmd *cmd;
2163 struct megasas_dcmd_frame *dcmd;
229fe47c 2164 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 2165 dma_addr_t new_affiliation_111_h;
2166 int ld, retval = 0;
2167 u8 thisVf;
2168
2169 cmd = megasas_get_cmd(instance);
2170
2171 if (!cmd) {
1be18254
BH		 2172 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2173 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2174 instance->host->host_no);
2175 return -ENOMEM;
2176 }
2177
2178 dcmd = &cmd->frame->dcmd;
2179
4cbfea88 2180 if (!instance->vf_affiliation_111) {
1be18254
BH		 2181 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2182 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 2183 megasas_return_cmd(instance, cmd);
2184 return -ENOMEM;
2185 }
2186
2187 if (initial)
229fe47c
AR		 2188 memset(instance->vf_affiliation_111, 0,
2189 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2190 else {
4cbfea88
AR		 2191 new_affiliation_111 =
2192 pci_alloc_consistent(instance->pdev,
2193 sizeof(struct MR_LD_VF_AFFILIATION_111),
2194 &new_affiliation_111_h);
2195 if (!new_affiliation_111) {
1be18254
BH		 2196 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2197 "memory for new affiliation for scsi%d\n",
4cbfea88 2198 instance->host->host_no);
229fe47c
AR		 2199 megasas_return_cmd(instance, cmd);
2200 return -ENOMEM;
2201 }
4cbfea88
AR		 2202 memset(new_affiliation_111, 0,
2203 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2204 }
2205
2206 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2207
2208 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2209 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2210 dcmd->sge_count = 1;
2213a467 2211 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2212 dcmd->timeout = 0;
2213 dcmd->pad_0 = 0;
2213a467
CH		 2214 dcmd->data_xfer_len =
2215 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2216 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2217
4cbfea88
AR		 2218 if (initial)
2219 dcmd->sgl.sge32[0].phys_addr =
2213a467 2220 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2221 else
2213a467
CH		 2222 dcmd->sgl.sge32[0].phys_addr =
2223 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2224
2213a467
CH		 2225 dcmd->sgl.sge32[0].length = cpu_to_le32(
2226 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2227
1be18254 2228 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 2229 "scsi%d\n", instance->host->host_no);
2230
6d40afbc 2231 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2232 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2233 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 2234 dcmd->cmd_status, instance->host->host_no);
2235 retval = 1; /* Do a scan if we couldn't get affiliation */
2236 goto out;
2237 }
2238
2239 if (!initial) {
4cbfea88
AR		 2240 thisVf = new_affiliation_111->thisVf;
2241 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2242 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2243 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 2244 dev_warn(&instance->pdev->dev, "SR-IOV: "
2245 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2246 instance->host->host_no);
4cbfea88
AR		 2247 memcpy(instance->vf_affiliation_111,
2248 new_affiliation_111,
2249 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2250 retval = 1;
2251 goto out;
2252 }
4cbfea88
AR		 2253 }
2254out:
2255 if (new_affiliation_111) {
2256 pci_free_consistent(instance->pdev,
2257 sizeof(struct MR_LD_VF_AFFILIATION_111),
2258 new_affiliation_111,
2259 new_affiliation_111_h);
2260 }
90dc9d98 2261
4026e9aa 2262 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 2263
2264 return retval;
2265}
2266
2267static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2268 int initial)
2269{
2270 struct megasas_cmd *cmd;
2271 struct megasas_dcmd_frame *dcmd;
2272 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2273 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2274 dma_addr_t new_affiliation_h;
2275 int i, j, retval = 0, found = 0, doscan = 0;
2276 u8 thisVf;
2277
2278 cmd = megasas_get_cmd(instance);
2279
2280 if (!cmd) {
1be18254
BH		 2281 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2282 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2283 instance->host->host_no);
2284 return -ENOMEM;
2285 }
2286
2287 dcmd = &cmd->frame->dcmd;
2288
2289 if (!instance->vf_affiliation) {
1be18254
BH		 2290 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2291 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2292 megasas_return_cmd(instance, cmd);
2293 return -ENOMEM;
2294 }
2295
2296 if (initial)
2297 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2298 sizeof(struct MR_LD_VF_AFFILIATION));
2299 else {
2300 new_affiliation =
2301 pci_alloc_consistent(instance->pdev,
2302 (MAX_LOGICAL_DRIVES + 1) *
2303 sizeof(struct MR_LD_VF_AFFILIATION),
2304 &new_affiliation_h);
2305 if (!new_affiliation) {
1be18254
BH		 2306 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2307 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2308 instance->host->host_no);
2309 megasas_return_cmd(instance, cmd);
2310 return -ENOMEM;
2311 }
2312 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2313 sizeof(struct MR_LD_VF_AFFILIATION));
2314 }
2315
2316 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2317
2318 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2319 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2320 dcmd->sge_count = 1;
2213a467 2321 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2322 dcmd->timeout = 0;
2323 dcmd->pad_0 = 0;
2213a467
CH		 2324 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2325 sizeof(struct MR_LD_VF_AFFILIATION));
2326 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2327
2328 if (initial)
2213a467
CH		 2329 dcmd->sgl.sge32[0].phys_addr =
2330 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2331 else
2213a467
CH		 2332 dcmd->sgl.sge32[0].phys_addr =
2333 cpu_to_le32(new_affiliation_h);
4cbfea88 2334
2213a467
CH		 2335 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2336 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2337
1be18254 2338 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2339 "scsi%d\n", instance->host->host_no);
2340
4cbfea88 2341
6d40afbc 2342 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2343 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2344 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2345 dcmd->cmd_status, instance->host->host_no);
2346 retval = 1; /* Do a scan if we couldn't get affiliation */
2347 goto out;
2348 }
2349
2350 if (!initial) {
2351 if (!new_affiliation->ldCount) {
1be18254
BH		 2352 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2353 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2354 instance->host->host_no);
2355 retval = 1;
2356 goto out;
2357 }
2358 newmap = new_affiliation->map;
2359 savedmap = instance->vf_affiliation->map;
2360 thisVf = new_affiliation->thisVf;
2361 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2362 found = 0;
2363 for (j = 0; j < instance->vf_affiliation->ldCount;
2364 j++) {
2365 if (newmap->ref.targetId ==
2366 savedmap->ref.targetId) {
2367 found = 1;
2368 if (newmap->policy[thisVf] !=
2369 savedmap->policy[thisVf]) {
2370 doscan = 1;
2371 goto out;
2372 }
229fe47c
AR		 2373 }
2374 savedmap = (struct MR_LD_VF_MAP *)
2375 ((unsigned char *)savedmap +
2376 savedmap->size);
4cbfea88
AR		 2377 }
2378 if (!found && newmap->policy[thisVf] !=
2379 MR_LD_ACCESS_HIDDEN) {
2380 doscan = 1;
2381 goto out;
2382 }
2383 newmap = (struct MR_LD_VF_MAP *)
2384 ((unsigned char *)newmap + newmap->size);
2385 }
2386
2387 newmap = new_affiliation->map;
2388 savedmap = instance->vf_affiliation->map;
2389
2390 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2391 found = 0;
2392 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2393 if (savedmap->ref.targetId ==
2394 newmap->ref.targetId) {
2395 found = 1;
2396 if (savedmap->policy[thisVf] !=
2397 newmap->policy[thisVf]) {
2398 doscan = 1;
2399 goto out;
2400 }
2401 }
229fe47c
AR		 2402 newmap = (struct MR_LD_VF_MAP *)
2403 ((unsigned char *)newmap +
2404 newmap->size);
2405 }
4cbfea88
AR		 2406 if (!found && savedmap->policy[thisVf] !=
2407 MR_LD_ACCESS_HIDDEN) {
2408 doscan = 1;
2409 goto out;
2410 }
2411 savedmap = (struct MR_LD_VF_MAP *)
2412 ((unsigned char *)savedmap +
2413 savedmap->size);
229fe47c
AR		 2414 }
2415 }
2416out:
4cbfea88 2417 if (doscan) {
1be18254
BH		 2418 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2419 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2420 memcpy(instance->vf_affiliation, new_affiliation,
2421 new_affiliation->size);
2422 retval = 1;
229fe47c 2423 }
4cbfea88
AR		 2424
2425 if (new_affiliation)
2426 pci_free_consistent(instance->pdev,
2427 (MAX_LOGICAL_DRIVES + 1) *
2428 sizeof(struct MR_LD_VF_AFFILIATION),
2429 new_affiliation, new_affiliation_h);
4026e9aa 2430 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2431
2432 return retval;
2433}
2434
4cbfea88
AR		 2435/* This function will get the current SR-IOV LD/VF affiliation */
2436static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2437 int initial)
2438{
2439 int retval;
2440
2441 if (instance->PlasmaFW111)
2442 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2443 else
2444 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2445 return retval;
2446}
2447
229fe47c
AR		 2448/* This function will tell FW to start the SR-IOV heartbeat */
2449int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2450 int initial)
2451{
2452 struct megasas_cmd *cmd;
2453 struct megasas_dcmd_frame *dcmd;
2454 int retval = 0;
2455
2456 cmd = megasas_get_cmd(instance);
2457
2458 if (!cmd) {
1be18254
BH		 2459 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2460 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2461 instance->host->host_no);
2462 return -ENOMEM;
2463 }
2464
2465 dcmd = &cmd->frame->dcmd;
2466
2467 if (initial) {
2468 instance->hb_host_mem =
7c845eb5
JP		 2469 pci_zalloc_consistent(instance->pdev,
2470 sizeof(struct MR_CTRL_HB_HOST_MEM),
2471 &instance->hb_host_mem_h);
229fe47c 2472 if (!instance->hb_host_mem) {
1be18254
BH		 2473 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2474 " memory for heartbeat host memory for scsi%d\n",
2475 instance->host->host_no);
229fe47c
AR		 2476 retval = -ENOMEM;
2477 goto out;
2478 }
229fe47c
AR		 2479 }
2480
2481 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2482
2213a467 2483 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2484 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2485 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2486 dcmd->sge_count = 1;
2213a467 2487 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2488 dcmd->timeout = 0;
2489 dcmd->pad_0 = 0;
2213a467
CH		 2490 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2491 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2492 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2493 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2494
1be18254 2495 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2496 instance->host->host_no);
2497
e7d36b88
S		 2498 if ((instance->adapter_type != MFI_SERIES) &&
2499 !instance->mask_interrupts)
4026e9aa
SS		 2500 retval = megasas_issue_blocked_cmd(instance, cmd,
2501 MEGASAS_ROUTINE_WAIT_TIME_VF);
2502 else
2503 retval = megasas_issue_polled(instance, cmd);
229fe47c 2504
4026e9aa 2505 if (retval) {
2be2a988
SS		 2506 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2507 "_MEM_ALLOC DCMD %s for scsi%d\n",
2508 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2509 "timed out" : "failed", instance->host->host_no);
229fe47c 2510 retval = 1;
229fe47c
AR		 2511 }
2512
2513out:
2514 megasas_return_cmd(instance, cmd);
2515
2516 return retval;
2517}
2518
2519/* Handler for SR-IOV heartbeat */
2520void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2521{
2522 struct megasas_instance *instance =
2523 (struct megasas_instance *)instance_addr;
2524
2525 if (instance->hb_host_mem->HB.fwCounter !=
2526 instance->hb_host_mem->HB.driverCounter) {
2527 instance->hb_host_mem->HB.driverCounter =
2528 instance->hb_host_mem->HB.fwCounter;
2529 mod_timer(&instance->sriov_heartbeat_timer,
2530 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2531 } else {
1be18254 2532 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2533 "completed for scsi%d\n", instance->host->host_no);
2534 schedule_work(&instance->work_init);
2535 }
2536}
2537
c4a3e0a5
BS		 2538/**
2539 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2540 * @instance: Adapter soft state
2541 *
25985edc 2542 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2543 * complete all its outstanding commands. Returns error if one or more IOs
2544 * are pending after this time period. It also marks the controller dead.
2545 */
2546static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2547{
ccc7507d 2548 int i, sl, outstanding;
39a98554 2549 u32 reset_index;
c4a3e0a5 2550 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2551 unsigned long flags;
2552 struct list_head clist_local;
2553 struct megasas_cmd *reset_cmd;
707e09bd 2554 u32 fw_state;
39a98554 2555
ccc7507d
SS		 2556 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2557 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2558 __func__, __LINE__);
2559 return FAILED;
2560 }
39a98554 2561
8a01a41d 2562 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2563
2564 INIT_LIST_HEAD(&clist_local);
2565 spin_lock_irqsave(&instance->hba_lock, flags);
2566 list_splice_init(&instance->internal_reset_pending_q,
2567 &clist_local);
2568 spin_unlock_irqrestore(&instance->hba_lock, flags);
2569
1be18254 2570 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2571 for (i = 0; i < wait_time; i++) {
2572 msleep(1000);
8a01a41d 2573 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2574 break;
2575 }
2576
8a01a41d 2577 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2578 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2579 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2580 return FAILED;
2581 }
2582
da0dc9fb 2583 reset_index = 0;
39a98554 2584 while (!list_empty(&clist_local)) {
da0dc9fb 2585 reset_cmd = list_entry((&clist_local)->next,
39a98554 2586 struct megasas_cmd, list);
2587 list_del_init(&reset_cmd->list);
2588 if (reset_cmd->scmd) {
f55cf47d 2589 reset_cmd->scmd->result = DID_REQUEUE << 16;
1be18254 2590 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2591 reset_index, reset_cmd,
5cd049a5 2592 reset_cmd->scmd->cmnd[0]);
39a98554 2593
2594 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2595 megasas_return_cmd(instance, reset_cmd);
2596 } else if (reset_cmd->sync_cmd) {
1be18254 2597 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2598 "reset queue\n",
2599 reset_cmd);
2600
2be2a988 2601 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2602 instance->instancet->fire_cmd(instance,
2603 reset_cmd->frame_phys_addr,
2604 0, instance->reg_set);
2605 } else {
1be18254 2606 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2607 "cmds lst\n",
2608 reset_cmd);
2609 }
2610 reset_index++;
2611 }
2612
2613 return SUCCESS;
2614 }
c4a3e0a5 2615
c007b8b2 2616 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2617 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP		 2618
2619 if (!outstanding)
c4a3e0a5
BS		 2620 break;
2621
2622 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2623 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2624 "commands to complete\n",i,outstanding);
7343eb65 2625 /*
2626 * Call cmd completion routine. Cmd to be
2627 * be completed directly without depending on isr.
2628 */
2629 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2630 }
2631
2632 msleep(1000);
2633 }
2634
707e09bd 2635 i = 0;
ccc7507d
SS		 2636 outstanding = atomic_read(&instance->fw_outstanding);
2637 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2638
2639 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2640 goto no_outstanding;
2641
2642 if (instance->disableOnlineCtrlReset)
2643 goto kill_hba_and_failed;
707e09bd 2644 do {
ccc7507d
SS		 2645 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2646 dev_info(&instance->pdev->dev,
2647 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2648 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2649 if (i == 3)
2650 goto kill_hba_and_failed;
707e09bd 2651 megasas_do_ocr(instance);
707e09bd 2652
ccc7507d
SS		 2653 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2654 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2655 __func__, __LINE__);
2656 return FAILED;
2657 }
2658 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2659 __func__, __LINE__);
2660
2661 for (sl = 0; sl < 10; sl++)
2662 msleep(500);
2663
2664 outstanding = atomic_read(&instance->fw_outstanding);
2665
2666 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2667 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2668 goto no_outstanding;
707e09bd
YB		 2669 }
2670 i++;
2671 } while (i <= 3);
2672
ccc7507d 2673no_outstanding:
707e09bd 2674
ccc7507d
SS		 2675 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2676 __func__, __LINE__);
2677 return SUCCESS;
707e09bd 2678
ccc7507d 2679kill_hba_and_failed:
c4a3e0a5 2680
ccc7507d
SS		 2681 /* Reset not supported, kill adapter */
2682 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2683 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2684 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2685 atomic_read(&instance->fw_outstanding));
2686 megasas_dump_pending_frames(instance);
2687 megaraid_sas_kill_hba(instance);
39a98554 2688
ccc7507d 2689 return FAILED;
c4a3e0a5
BS		 2690}
2691
2692/**
2693 * megasas_generic_reset - Generic reset routine
2694 * @scmd: Mid-layer SCSI command
2695 *
2696 * This routine implements a generic reset handler for device, bus and host
2697 * reset requests. Device, bus and host specific reset handlers can use this
2698 * function after they do their specific tasks.
2699 */
2700static int megasas_generic_reset(struct scsi_cmnd *scmd)
2701{
2702 int ret_val;
2703 struct megasas_instance *instance;
2704
2705 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2706
5cd049a5
CH		 2707 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2708 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2709
8a01a41d 2710 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2711 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2712 return FAILED;
2713 }
2714
c4a3e0a5 2715 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2716 if (ret_val == SUCCESS)
1be18254 2717 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2718 else
1be18254 2719 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2720
c4a3e0a5
BS		 2721 return ret_val;
2722}
2723
05e9ebbe
SP		 2724/**
2725 * megasas_reset_timer - quiesce the adapter if required
2726 * @scmd: scsi cmnd
2727 *
2728 * Sets the FW busy flag and reduces the host->can_queue if the
2729 * cmd has not been completed within the timeout period.
2730 */
2731static enum
242f9dcb 2732blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2733{
05e9ebbe
SP		 2734 struct megasas_instance *instance;
2735 unsigned long flags;
2736
2737 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2738 (scmd_timeout * 2) * HZ)) {
242f9dcb 2739 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2740 }
2741
f575c5d3 2742 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2743 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2744 /* FW is busy, throttle IO */
2745 spin_lock_irqsave(instance->host->host_lock, flags);
2746
c5daa6a9 2747 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2748 instance->last_time = jiffies;
2749 instance->flag |= MEGASAS_FW_BUSY;
2750
2751 spin_unlock_irqrestore(instance->host->host_lock, flags);
2752 }
242f9dcb 2753 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2754}
2755
def0eab3
S		 2756/**
2757 * megasas_dump_frame - This function will dump MPT/MFI frame
2758 */
2759static inline void
2760megasas_dump_frame(void *mpi_request, int sz)
2761{
2762 int i;
2763 __le32 *mfp = (__le32 *)mpi_request;
2764
2765 printk(KERN_INFO "IO request frame:\n\t");
40a4c2c3 2766 for (i = 0; i < sz / sizeof(__le32); i++) {
def0eab3
S		 2767 if (i && ((i % 8) == 0))
2768 printk("\n\t");
2769 printk("%08x ", le32_to_cpu(mfp[i]));
2770 }
2771 printk("\n");
2772}
2773
c4a3e0a5
BS		 2774/**
2775 * megasas_reset_bus_host - Bus & host reset handler entry point
2776 */
2777static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2778{
2779 int ret;
9c915a8c 2780 struct megasas_instance *instance;
da0dc9fb 2781
9c915a8c 2782 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5 2783
def0eab3
S		 2784 scmd_printk(KERN_INFO, scmd,
2785 "Controller reset is requested due to IO timeout\n"
2786 "SCSI command pointer: (%p)\t SCSI host state: %d\t"
2787 " SCSI host busy: %d\t FW outstanding: %d\n",
2788 scmd, scmd->device->host->shost_state,
2789 atomic_read((atomic_t *)&scmd->device->host->host_busy),
2790 atomic_read(&instance->fw_outstanding));
2791
c4a3e0a5 2792 /*
80682fa9 2793 * First wait for all commands to complete
c4a3e0a5 2794 */
e7d36b88
S		 2795 if (instance->adapter_type == MFI_SERIES) {
2796 ret = megasas_generic_reset(scmd);
2797 } else {
def0eab3
S		 2798 struct megasas_cmd_fusion *cmd;
2799 cmd = (struct megasas_cmd_fusion *)scmd->SCp.ptr;
2800 if (cmd)
2801 megasas_dump_frame(cmd->io_request,
5dd977e3 2802 MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE);
def0eab3
S		 2803 ret = megasas_reset_fusion(scmd->device->host,
2804 SCSIIO_TIMEOUT_OCR);
e7d36b88 2805 }
c4a3e0a5
BS		 2806
2807 return ret;
2808}
2809
bd23d4ab
SS		 2810/**
2811 * megasas_task_abort - Issues task abort request to firmware
2812 * (supported only for fusion adapters)
2813 * @scmd: SCSI command pointer
2814 */
2815static int megasas_task_abort(struct scsi_cmnd *scmd)
2816{
2817 int ret;
2818 struct megasas_instance *instance;
2819
2820 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2821
e7d36b88 2822 if (instance->adapter_type != MFI_SERIES)
bd23d4ab
SS		 2823 ret = megasas_task_abort_fusion(scmd);
2824 else {
2825 sdev_printk(KERN_NOTICE, scmd->device, "TASK ABORT not supported\n");
2826 ret = FAILED;
2827 }
2828
2829 return ret;
2830}
2831
2832/**
2833 * megasas_reset_target: Issues target reset request to firmware
2834 * (supported only for fusion adapters)
2835 * @scmd: SCSI command pointer
2836 */
2837static int megasas_reset_target(struct scsi_cmnd *scmd)
2838{
2839 int ret;
2840 struct megasas_instance *instance;
2841
2842 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2843
e7d36b88 2844 if (instance->adapter_type != MFI_SERIES)
bd23d4ab
SS		 2845 ret = megasas_reset_target_fusion(scmd);
2846 else {
2847 sdev_printk(KERN_NOTICE, scmd->device, "TARGET RESET not supported\n");
2848 ret = FAILED;
2849 }
2850
2851 return ret;
2852}
2853
cf62a0a5
SP		 2854/**
2855 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2856 * @sdev: device handle
cf62a0a5
SP		 2857 * @bdev: block device
2858 * @capacity: drive capacity
2859 * @geom: geometry parameters
2860 */
2861static int
2862megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2863 sector_t capacity, int geom[])
2864{
2865 int heads;
2866 int sectors;
2867 sector_t cylinders;
2868 unsigned long tmp;
da0dc9fb 2869
cf62a0a5
SP		 2870 /* Default heads (64) & sectors (32) */
2871 heads = 64;
2872 sectors = 32;
2873
2874 tmp = heads * sectors;
2875 cylinders = capacity;
2876
2877 sector_div(cylinders, tmp);
2878
2879 /*
2880 * Handle extended translation size for logical drives > 1Gb
2881 */
2882
2883 if (capacity >= 0x200000) {
2884 heads = 255;
2885 sectors = 63;
2886 tmp = heads*sectors;
2887 cylinders = capacity;
2888 sector_div(cylinders, tmp);
2889 }
2890
2891 geom[0] = heads;
2892 geom[1] = sectors;
2893 geom[2] = cylinders;
2894
2895 return 0;
2896}
2897
7e8a75f4
YB		 2898static void megasas_aen_polling(struct work_struct *work);
2899
c4a3e0a5
BS		 2900/**
2901 * megasas_service_aen - Processes an event notification
2902 * @instance: Adapter soft state
2903 * @cmd: AEN command completed by the ISR
2904 *
2905 * For AEN, driver sends a command down to FW that is held by the FW till an
2906 * event occurs. When an event of interest occurs, FW completes the command
2907 * that it was previously holding.
2908 *
2909 * This routines sends SIGIO signal to processes that have registered with the
2910 * driver for AEN.
2911 */
2912static void
2913megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2914{
c3518837 2915 unsigned long flags;
da0dc9fb 2916
c4a3e0a5
BS		 2917 /*
2918 * Don't signal app if it is just an aborted previously registered aen
2919 */
c3518837
YB		 2920 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2921 spin_lock_irqsave(&poll_aen_lock, flags);
2922 megasas_poll_wait_aen = 1;
2923 spin_unlock_irqrestore(&poll_aen_lock, flags);
2924 wake_up(&megasas_poll_wait);
c4a3e0a5 2925 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2926 }
c4a3e0a5
BS		 2927 else
2928 cmd->abort_aen = 0;
2929
2930 instance->aen_cmd = NULL;
90dc9d98 2931
4026e9aa 2932 megasas_return_cmd(instance, cmd);
7e8a75f4 2933
39a98554 2934 if ((instance->unload == 0) &&
2935 ((instance->issuepend_done == 1))) {
7e8a75f4 2936 struct megasas_aen_event *ev;
da0dc9fb 2937
7e8a75f4
YB		 2938 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2939 if (!ev) {
1be18254 2940 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2941 } else {
2942 ev->instance = instance;
2943 instance->ev = ev;
c1d390d8
XF		 2944 INIT_DELAYED_WORK(&ev->hotplug_work,
2945 megasas_aen_polling);
2946 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2947 }
2948 }
c4a3e0a5
BS		 2949}
2950
fc62b3fc
SS		 2951static ssize_t
2952megasas_fw_crash_buffer_store(struct device *cdev,
2953 struct device_attribute *attr, const char *buf, size_t count)
2954{
2955 struct Scsi_Host *shost = class_to_shost(cdev);
2956 struct megasas_instance *instance =
2957 (struct megasas_instance *) shost->hostdata;
2958 int val = 0;
2959 unsigned long flags;
2960
2961 if (kstrtoint(buf, 0, &val) != 0)
2962 return -EINVAL;
2963
2964 spin_lock_irqsave(&instance->crashdump_lock, flags);
2965 instance->fw_crash_buffer_offset = val;
2966 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2967 return strlen(buf);
2968}
2969
2970static ssize_t
2971megasas_fw_crash_buffer_show(struct device *cdev,
2972 struct device_attribute *attr, char *buf)
2973{
2974 struct Scsi_Host *shost = class_to_shost(cdev);
2975 struct megasas_instance *instance =
2976 (struct megasas_instance *) shost->hostdata;
2977 u32 size;
2978 unsigned long buff_addr;
2979 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2980 unsigned long src_addr;
2981 unsigned long flags;
2982 u32 buff_offset;
2983
2984 spin_lock_irqsave(&instance->crashdump_lock, flags);
2985 buff_offset = instance->fw_crash_buffer_offset;
2986 if (!instance->crash_dump_buf &&
2987 !((instance->fw_crash_state == AVAILABLE) ||
2988 (instance->fw_crash_state == COPYING))) {
2989 dev_err(&instance->pdev->dev,
2990 "Firmware crash dump is not available\n");
2991 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2992 return -EINVAL;
2993 }
2994
2995 buff_addr = (unsigned long) buf;
2996
da0dc9fb 2997 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2998 dev_err(&instance->pdev->dev,
2999 "Firmware crash dump offset is out of range\n");
3000 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3001 return 0;
3002 }
3003
3004 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
3005 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
3006
3007 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
3008 (buff_offset % dmachunk);
da0dc9fb 3009 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 3010 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3011
3012 return size;
3013}
3014
3015static ssize_t
3016megasas_fw_crash_buffer_size_show(struct device *cdev,
3017 struct device_attribute *attr, char *buf)
3018{
3019 struct Scsi_Host *shost = class_to_shost(cdev);
3020 struct megasas_instance *instance =
3021 (struct megasas_instance *) shost->hostdata;
3022
3023 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
3024 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
3025}
3026
3027static ssize_t
3028megasas_fw_crash_state_store(struct device *cdev,
3029 struct device_attribute *attr, const char *buf, size_t count)
3030{
3031 struct Scsi_Host *shost = class_to_shost(cdev);
3032 struct megasas_instance *instance =
3033 (struct megasas_instance *) shost->hostdata;
3034 int val = 0;
3035 unsigned long flags;
3036
3037 if (kstrtoint(buf, 0, &val) != 0)
3038 return -EINVAL;
3039
3040 if ((val <= AVAILABLE || val > COPY_ERROR)) {
3041 dev_err(&instance->pdev->dev, "application updates invalid "
3042 "firmware crash state\n");
3043 return -EINVAL;
3044 }
3045
3046 instance->fw_crash_state = val;
3047
3048 if ((val == COPIED) || (val == COPY_ERROR)) {
3049 spin_lock_irqsave(&instance->crashdump_lock, flags);
3050 megasas_free_host_crash_buffer(instance);
3051 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3052 if (val == COPY_ERROR)
3053 dev_info(&instance->pdev->dev, "application failed to "
3054 "copy Firmware crash dump\n");
3055 else
3056 dev_info(&instance->pdev->dev, "Firmware crash dump "
3057 "copied successfully\n");
3058 }
3059 return strlen(buf);
3060}
3061
3062static ssize_t
3063megasas_fw_crash_state_show(struct device *cdev,
3064 struct device_attribute *attr, char *buf)
3065{
3066 struct Scsi_Host *shost = class_to_shost(cdev);
3067 struct megasas_instance *instance =
3068 (struct megasas_instance *) shost->hostdata;
da0dc9fb 3069
fc62b3fc
SS		 3070 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
3071}
3072
3073static ssize_t
3074megasas_page_size_show(struct device *cdev,
3075 struct device_attribute *attr, char *buf)
3076{
3077 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
3078}
3079
308ec459
SS		 3080static ssize_t
3081megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
3082 char *buf)
3083{
3084 struct Scsi_Host *shost = class_to_shost(cdev);
3085 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
3086
3087 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
3088}
3089
fc62b3fc
SS		 3090static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
3091 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
3092static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
3093 megasas_fw_crash_buffer_size_show, NULL);
3094static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
3095 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
3096static DEVICE_ATTR(page_size, S_IRUGO,
3097 megasas_page_size_show, NULL);
308ec459
SS		 3098static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
3099 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS		 3100
3101struct device_attribute *megaraid_host_attrs[] = {
3102 &dev_attr_fw_crash_buffer_size,
3103 &dev_attr_fw_crash_buffer,
3104 &dev_attr_fw_crash_state,
3105 &dev_attr_page_size,
308ec459 3106 &dev_attr_ldio_outstanding,
fc62b3fc
SS		 3107 NULL,
3108};
3109
c4a3e0a5
BS		 3110/*
3111 * Scsi host template for megaraid_sas driver
3112 */
3113static struct scsi_host_template megasas_template = {
3114
3115 .module = THIS_MODULE,
43cd7fe4 3116 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 3117 .proc_name = "megaraid_sas",
147aab6a 3118 .slave_configure = megasas_slave_configure,
044833b5 3119 .slave_alloc = megasas_slave_alloc,
18365b13 3120 .slave_destroy = megasas_slave_destroy,
c4a3e0a5 3121 .queuecommand = megasas_queue_command,
bd23d4ab
SS		 3122 .eh_target_reset_handler = megasas_reset_target,
3123 .eh_abort_handler = megasas_task_abort,
c4a3e0a5 3124 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 3125 .eh_timed_out = megasas_reset_timer,
fc62b3fc 3126 .shost_attrs = megaraid_host_attrs,
cf62a0a5 3127 .bios_param = megasas_bios_param,
c4a3e0a5 3128 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 3129 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 3130 .no_write_same = 1,
c4a3e0a5
BS		 3131};
3132
3133/**
3134 * megasas_complete_int_cmd - Completes an internal command
3135 * @instance: Adapter soft state
3136 * @cmd: Command to be completed
3137 *
3138 * The megasas_issue_blocked_cmd() function waits for a command to complete
3139 * after it issues a command. This function wakes up that waiting routine by
3140 * calling wake_up() on the wait queue.
3141 */
3142static void
3143megasas_complete_int_cmd(struct megasas_instance *instance,
3144 struct megasas_cmd *cmd)
3145{
2be2a988 3146 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 3147 wake_up(&instance->int_cmd_wait_q);
3148}
3149
3150/**
3151 * megasas_complete_abort - Completes aborting a command
3152 * @instance: Adapter soft state
3153 * @cmd: Cmd that was issued to abort another cmd
3154 *
0d49016b
AR		 3155 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3156 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 3157 * wakes up all functions waiting on the same wait queue.
3158 */
3159static void
3160megasas_complete_abort(struct megasas_instance *instance,
3161 struct megasas_cmd *cmd)
3162{
3163 if (cmd->sync_cmd) {
3164 cmd->sync_cmd = 0;
2be2a988 3165 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 3166 wake_up(&instance->abort_cmd_wait_q);
3167 }
c4a3e0a5
BS		 3168}
3169
c4a3e0a5
BS		 3170/**
3171 * megasas_complete_cmd - Completes a command
3172 * @instance: Adapter soft state
3173 * @cmd: Command to be completed
0d49016b 3174 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 3175 * SCSI mid-layer instead of the value returned
3176 * by the FW. This should be used if caller wants
3177 * an alternate status (as in the case of aborted
3178 * commands)
c4a3e0a5 3179 */
9c915a8c 3180void
c4a3e0a5
BS		 3181megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3182 u8 alt_status)
3183{
3184 int exception = 0;
3185 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3186 unsigned long flags;
9c915a8c 3187 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3188 u32 opcode, status;
c4a3e0a5 3189
39a98554 3190 /* flag for the retry reset */
3191 cmd->retry_for_fw_reset = 0;
3192
05e9ebbe
SP		 3193 if (cmd->scmd)
3194 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 3195
3196 switch (hdr->cmd) {
e5f93a36
AR		 3197 case MFI_CMD_INVALID:
3198 /* Some older 1068 controller FW may keep a pended
3199 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3200 when booting the kdump kernel. Ignore this command to
3201 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 3202 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3203 "completed\n");
3204 dev_warn(&instance->pdev->dev, "If you have a controller "
3205 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3206 break;
c4a3e0a5
BS		 3207 case MFI_CMD_PD_SCSI_IO:
3208 case MFI_CMD_LD_SCSI_IO:
3209
3210 /*
3211 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3212 * issued either through an IO path or an IOCTL path. If it
3213 * was via IOCTL, we will send it to internal completion.
3214 */
3215 if (cmd->sync_cmd) {
3216 cmd->sync_cmd = 0;
3217 megasas_complete_int_cmd(instance, cmd);
3218 break;
3219 }
3220
c4a3e0a5
BS		 3221 case MFI_CMD_LD_READ:
3222 case MFI_CMD_LD_WRITE:
3223
3224 if (alt_status) {
3225 cmd->scmd->result = alt_status << 16;
3226 exception = 1;
3227 }
3228
3229 if (exception) {
3230
e4a082c7 3231 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3232
155d98f0 3233 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3234 cmd->scmd->scsi_done(cmd->scmd);
3235 megasas_return_cmd(instance, cmd);
3236
3237 break;
3238 }
3239
3240 switch (hdr->cmd_status) {
3241
3242 case MFI_STAT_OK:
3243 cmd->scmd->result = DID_OK << 16;
3244 break;
3245
3246 case MFI_STAT_SCSI_IO_FAILED:
3247 case MFI_STAT_LD_INIT_IN_PROGRESS:
3248 cmd->scmd->result =
3249 (DID_ERROR << 16) | hdr->scsi_status;
3250 break;
3251
3252 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3253
3254 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3255
3256 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3257 memset(cmd->scmd->sense_buffer, 0,
3258 SCSI_SENSE_BUFFERSIZE);
3259 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3260 hdr->sense_len);
3261
3262 cmd->scmd->result |= DRIVER_SENSE << 24;
3263 }
3264
3265 break;
3266
3267 case MFI_STAT_LD_OFFLINE:
3268 case MFI_STAT_DEVICE_NOT_FOUND:
3269 cmd->scmd->result = DID_BAD_TARGET << 16;
3270 break;
3271
3272 default:
1be18254 3273 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 3274 hdr->cmd_status);
3275 cmd->scmd->result = DID_ERROR << 16;
3276 break;
3277 }
3278
e4a082c7 3279 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3280
155d98f0 3281 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3282 cmd->scmd->scsi_done(cmd->scmd);
3283 megasas_return_cmd(instance, cmd);
3284
3285 break;
3286
3287 case MFI_CMD_SMP:
3288 case MFI_CMD_STP:
3289 case MFI_CMD_DCMD:
94cd65dd 3290 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3291 /* Check for LD map update */
94cd65dd
SS		 3292 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3293 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3294 fusion->fast_path_io = 0;
9c915a8c 3295 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3296 instance->map_update_cmd = NULL;
9c915a8c
AR		 3297 if (cmd->frame->hdr.cmd_status != 0) {
3298 if (cmd->frame->hdr.cmd_status !=
3299 MFI_STAT_NOT_FOUND)
1be18254 3300 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 3301 cmd->frame->hdr.cmd_status);
3302 else {
4026e9aa 3303 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 3304 spin_unlock_irqrestore(
3305 instance->host->host_lock,
3306 flags);
3307 break;
3308 }
3309 } else
3310 instance->map_id++;
4026e9aa 3311 megasas_return_cmd(instance, cmd);
bc93d425
SS		 3312
3313 /*
3314 * Set fast path IO to ZERO.
3315 * Validate Map will set proper value.
3316 * Meanwhile all IOs will go as LD IO.
3317 */
3318 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 3319 fusion->fast_path_io = 1;
3320 else
3321 fusion->fast_path_io = 0;
3322 megasas_sync_map_info(instance);
3323 spin_unlock_irqrestore(instance->host->host_lock,
3324 flags);
3325 break;
3326 }
94cd65dd
SS		 3327 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3328 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 3329 spin_lock_irqsave(&poll_aen_lock, flags);
3330 megasas_poll_wait_aen = 0;
3331 spin_unlock_irqrestore(&poll_aen_lock, flags);
3332 }
c4a3e0a5 3333
3761cb4c 3334 /* FW has an updated PD sequence */
3335 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3336 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3337
3338 spin_lock_irqsave(instance->host->host_lock, flags);
3339 status = cmd->frame->hdr.cmd_status;
3340 instance->jbod_seq_cmd = NULL;
3341 megasas_return_cmd(instance, cmd);
3342
3343 if (status == MFI_STAT_OK) {
3344 instance->pd_seq_map_id++;
3345 /* Re-register a pd sync seq num cmd */
3346 if (megasas_sync_pd_seq_num(instance, true))
3347 instance->use_seqnum_jbod_fp = false;
3348 } else
3349 instance->use_seqnum_jbod_fp = false;
3350
3351 spin_unlock_irqrestore(instance->host->host_lock, flags);
3352 break;
3353 }
3354
c4a3e0a5
BS		 3355 /*
3356 * See if got an event notification
3357 */
94cd65dd 3358 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3359 megasas_service_aen(instance, cmd);
3360 else
3361 megasas_complete_int_cmd(instance, cmd);
3362
3363 break;
3364
3365 case MFI_CMD_ABORT:
3366 /*
3367 * Cmd issued to abort another cmd returned
3368 */
3369 megasas_complete_abort(instance, cmd);
3370 break;
3371
3372 default:
1be18254 3373 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3374 hdr->cmd);
3375 break;
3376 }
3377}
3378
39a98554 3379/**
3380 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3381 * in FW again because of the fw reset
39a98554 3382 * @instance: Adapter soft state
3383 */
3384static inline void
3385megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3386{
3387 struct megasas_cmd *cmd;
3388 struct list_head clist_local;
3389 union megasas_evt_class_locale class_locale;
3390 unsigned long flags;
3391 u32 seq_num;
3392
3393 INIT_LIST_HEAD(&clist_local);
3394 spin_lock_irqsave(&instance->hba_lock, flags);
3395 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3396 spin_unlock_irqrestore(&instance->hba_lock, flags);
3397
3398 while (!list_empty(&clist_local)) {
da0dc9fb 3399 cmd = list_entry((&clist_local)->next,
39a98554 3400 struct megasas_cmd, list);
3401 list_del_init(&cmd->list);
3402
3403 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3404 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3405 "detected to be pending while HBA reset\n",
39a98554 3406 cmd, cmd->scmd, cmd->sync_cmd);
3407
3408 cmd->retry_for_fw_reset++;
3409
3410 if (cmd->retry_for_fw_reset == 3) {
1be18254 3411 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3412 "was tried multiple times during reset."
3413 "Shutting down the HBA\n",
3414 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3415 instance->instancet->disable_intr(instance);
3416 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3417 megaraid_sas_kill_hba(instance);
39a98554 3418 return;
3419 }
3420 }
3421
3422 if (cmd->sync_cmd == 1) {
3423 if (cmd->scmd) {
1be18254 3424 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3425 "cmd attached to internal command!\n");
3426 }
1be18254 3427 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3428 "on the internal reset queue,"
3429 "issue it again.\n", cmd);
2be2a988 3430 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3431 instance->instancet->fire_cmd(instance,
da0dc9fb 3432 cmd->frame_phys_addr,
39a98554 3433 0, instance->reg_set);
3434 } else if (cmd->scmd) {
1be18254 3435 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3436 "detected on the internal queue, issue again.\n",
5cd049a5 3437 cmd, cmd->scmd->cmnd[0]);
39a98554 3438
3439 atomic_inc(&instance->fw_outstanding);
3440 instance->instancet->fire_cmd(instance,
3441 cmd->frame_phys_addr,
3442 cmd->frame_count-1, instance->reg_set);
3443 } else {
1be18254 3444 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3445 "internal reset defer list while re-issue!!\n",
3446 cmd);
3447 }
3448 }
3449
3450 if (instance->aen_cmd) {
1be18254 3451 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3452 megasas_return_cmd(instance, instance->aen_cmd);
3453
da0dc9fb 3454 instance->aen_cmd = NULL;
39a98554 3455 }
3456
3457 /*
da0dc9fb
BH		 3458 * Initiate AEN (Asynchronous Event Notification)
3459 */
39a98554 3460 seq_num = instance->last_seq_num;
3461 class_locale.members.reserved = 0;
3462 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3463 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3464
3465 megasas_register_aen(instance, seq_num, class_locale.word);
3466}
3467
3468/**
3469 * Move the internal reset pending commands to a deferred queue.
3470 *
3471 * We move the commands pending at internal reset time to a
3472 * pending queue. This queue would be flushed after successful
3473 * completion of the internal reset sequence. if the internal reset
3474 * did not complete in time, the kernel reset handler would flush
3475 * these commands.
3476 **/
3477static void
3478megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3479{
3480 struct megasas_cmd *cmd;
3481 int i;
50b7f5a2 3482 u16 max_cmd = instance->max_fw_cmds;
39a98554 3483 u32 defer_index;
3484 unsigned long flags;
3485
da0dc9fb 3486 defer_index = 0;
90dc9d98 3487 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3488 for (i = 0; i < max_cmd; i++) {
3489 cmd = instance->cmd_list[i];
3490 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3491 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3492 "on the defer queue as internal\n",
3493 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3494
3495 if (!list_empty(&cmd->list)) {
1be18254 3496 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3497 " moving this cmd:%p, %d %p, it was"
3498 "discovered on some list?\n",
3499 cmd, cmd->sync_cmd, cmd->scmd);
3500
3501 list_del_init(&cmd->list);
3502 }
3503 defer_index++;
3504 list_add_tail(&cmd->list,
3505 &instance->internal_reset_pending_q);
3506 }
3507 }
90dc9d98 3508 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3509}
3510
3511
3512static void
3513process_fw_state_change_wq(struct work_struct *work)
3514{
3515 struct megasas_instance *instance =
3516 container_of(work, struct megasas_instance, work_init);
3517 u32 wait;
3518 unsigned long flags;
3519
8a01a41d 3520 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3521 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3522 atomic_read(&instance->adprecovery));
39a98554 3523 return ;
3524 }
3525
8a01a41d 3526 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3527 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3528 "state, restarting it...\n");
3529
d46a3ad6 3530 instance->instancet->disable_intr(instance);
39a98554 3531 atomic_set(&instance->fw_outstanding, 0);
3532
3533 atomic_set(&instance->fw_reset_no_pci_access, 1);
3534 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3535 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3536
1be18254 3537 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3538 "initiating next stage...\n");
3539
1be18254 3540 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3541 "state 2 starting...\n");
3542
da0dc9fb 3543 /* waiting for about 20 second before start the second init */
39a98554 3544 for (wait = 0; wait < 30; wait++) {
3545 msleep(1000);
3546 }
3547
058a8fac 3548 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3549 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3550
c8dd61ef 3551 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3552 megaraid_sas_kill_hba(instance);
39a98554 3553 return ;
3554 }
3555
3556 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3557 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3558 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3559 ) {
3560 *instance->consumer = *instance->producer;
3561 } else {
3562 *instance->consumer = 0;
3563 *instance->producer = 0;
3564 }
3565
3566 megasas_issue_init_mfi(instance);
3567
3568 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3569 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3570 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3571 instance->instancet->enable_intr(instance);
39a98554 3572
3573 megasas_issue_pending_cmds_again(instance);
3574 instance->issuepend_done = 1;
3575 }
39a98554 3576}
3577
c4a3e0a5
BS		 3578/**
3579 * megasas_deplete_reply_queue - Processes all completed commands
3580 * @instance: Adapter soft state
3581 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3582 * SCSI mid-layer instead of the status
3583 * returned by the FW
39a98554 3584 * Note: this must be called with hba lock held
c4a3e0a5 3585 */
858119e1 3586static int
39a98554 3587megasas_deplete_reply_queue(struct megasas_instance *instance,
3588 u8 alt_status)
c4a3e0a5 3589{
39a98554 3590 u32 mfiStatus;
3591 u32 fw_state;
3592
3593 if ((mfiStatus = instance->instancet->check_reset(instance,
3594 instance->reg_set)) == 1) {
3595 return IRQ_HANDLED;
3596 }
3597
3598 if ((mfiStatus = instance->instancet->clear_intr(
3599 instance->reg_set)
3600 ) == 0) {
e1419191 3601 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3602 if (!instance->msix_vectors)
e1419191 3603 return IRQ_NONE;
39a98554 3604 }
3605
3606 instance->mfiStatus = mfiStatus;
3607
3608 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3609 fw_state = instance->instancet->read_fw_status_reg(
3610 instance->reg_set) & MFI_STATE_MASK;
3611
3612 if (fw_state != MFI_STATE_FAULT) {
1be18254 3613 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3614 fw_state);
3615 }
3616
3617 if ((fw_state == MFI_STATE_FAULT) &&
3618 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3619 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3620
3621 if ((instance->pdev->device ==
3622 PCI_DEVICE_ID_LSI_SAS1064R) ||
3623 (instance->pdev->device ==
3624 PCI_DEVICE_ID_DELL_PERC5) ||
3625 (instance->pdev->device ==
3626 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3627
3628 *instance->consumer =
94cd65dd 3629 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3630 }
3631
3632
d46a3ad6 3633 instance->instancet->disable_intr(instance);
8a01a41d 3634 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3635 instance->issuepend_done = 0;
3636
3637 atomic_set(&instance->fw_outstanding, 0);
3638 megasas_internal_reset_defer_cmds(instance);
3639
1be18254 3640 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3641 fw_state, atomic_read(&instance->adprecovery));
39a98554 3642
3643 schedule_work(&instance->work_init);
3644 return IRQ_HANDLED;
3645
3646 } else {
1be18254 3647 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3648 fw_state, instance->disableOnlineCtrlReset);
3649 }
3650 }
c4a3e0a5 3651
5d018ad0 3652 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3653 return IRQ_HANDLED;
3654}
c4a3e0a5
BS		 3655/**
3656 * megasas_isr - isr entry point
3657 */
7d12e780 3658static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3659{
c8e858fe
AR		 3660 struct megasas_irq_context *irq_context = devp;
3661 struct megasas_instance *instance = irq_context->instance;
39a98554 3662 unsigned long flags;
da0dc9fb 3663 irqreturn_t rc;
39a98554 3664
c8e858fe 3665 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3666 return IRQ_HANDLED;
3667
39a98554 3668 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3669 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3670 spin_unlock_irqrestore(&instance->hba_lock, flags);
3671
3672 return rc;
c4a3e0a5
BS		 3673}
3674
3675/**
3676 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3677 * @instance: Adapter soft state
c4a3e0a5
BS		 3678 *
3679 * During the initialization, FW passes can potentially be in any one of
3680 * several possible states. If the FW in operational, waiting-for-handshake
3681 * states, driver must take steps to bring it to ready state. Otherwise, it
3682 * has to wait for the ready state.
3683 */
9c915a8c 3684int
058a8fac 3685megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3686{
3687 int i;
3688 u8 max_wait;
3689 u32 fw_state;
3690 u32 cur_state;
7218df69 3691 u32 abs_state, curr_abs_state;
c4a3e0a5 3692
bc6ac5e8
TH		 3693 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3694 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3695
e3bbff9f 3696 if (fw_state != MFI_STATE_READY)
1be18254 3697 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3698 " state\n");
e3bbff9f 3699
c4a3e0a5
BS		 3700 while (fw_state != MFI_STATE_READY) {
3701
c4a3e0a5
BS		 3702 switch (fw_state) {
3703
3704 case MFI_STATE_FAULT:
1be18254 3705 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3706 if (ocr) {
3707 max_wait = MEGASAS_RESET_WAIT_TIME;
3708 cur_state = MFI_STATE_FAULT;
3709 break;
3710 } else
3711 return -ENODEV;
c4a3e0a5
BS		 3712
3713 case MFI_STATE_WAIT_HANDSHAKE:
3714 /*
3715 * Set the CLR bit in inbound doorbell
3716 */
0c79e681 3717 if ((instance->pdev->device ==
87911122
YB		 3718 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3719 (instance->pdev->device ==
9c915a8c 3720 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3721 (instance->adapter_type != MFI_SERIES))
87911122
YB		 3722 writel(
3723 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3724 &instance->reg_set->doorbell);
5a8cb85b 3725 else
87911122
YB		 3726 writel(
3727 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3728 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3729
7218df69 3730 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3731 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3732 break;
3733
e3bbff9f 3734 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3735 if ((instance->pdev->device ==
9c915a8c
AR		 3736 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3737 (instance->pdev->device ==
3738 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3739 (instance->adapter_type != MFI_SERIES))
87911122 3740 writel(MFI_INIT_HOTPLUG,
9c915a8c 3741 &instance->reg_set->doorbell);
5a8cb85b 3742 else
87911122
YB		 3743 writel(MFI_INIT_HOTPLUG,
3744 &instance->reg_set->inbound_doorbell);
e3bbff9f 3745
7218df69 3746 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3747 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3748 break;
3749
c4a3e0a5
BS		 3750 case MFI_STATE_OPERATIONAL:
3751 /*
e3bbff9f 3752 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3753 */
d46a3ad6 3754 instance->instancet->disable_intr(instance);
87911122
YB		 3755 if ((instance->pdev->device ==
3756 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3757 (instance->pdev->device ==
9c915a8c 3758 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3759 (instance->adapter_type != MFI_SERIES)) {
87911122 3760 writel(MFI_RESET_FLAGS,
9c915a8c 3761 &instance->reg_set->doorbell);
5a8cb85b 3762
e7d36b88 3763 if (instance->adapter_type != MFI_SERIES) {
9c915a8c
AR		 3764 for (i = 0; i < (10 * 1000); i += 20) {
3765 if (readl(
3766 &instance->
3767 reg_set->
3768 doorbell) & 1)
3769 msleep(20);
3770 else
3771 break;
3772 }
3773 }
87911122
YB		 3774 } else
3775 writel(MFI_RESET_FLAGS,
3776 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3777
7218df69 3778 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3779 cur_state = MFI_STATE_OPERATIONAL;
3780 break;
3781
3782 case MFI_STATE_UNDEFINED:
3783 /*
3784 * This state should not last for more than 2 seconds
3785 */
7218df69 3786 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3787 cur_state = MFI_STATE_UNDEFINED;
3788 break;
3789
3790 case MFI_STATE_BB_INIT:
7218df69 3791 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3792 cur_state = MFI_STATE_BB_INIT;
3793 break;
3794
3795 case MFI_STATE_FW_INIT:
7218df69 3796 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3797 cur_state = MFI_STATE_FW_INIT;
3798 break;
3799
3800 case MFI_STATE_FW_INIT_2:
7218df69 3801 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3802 cur_state = MFI_STATE_FW_INIT_2;
3803 break;
3804
3805 case MFI_STATE_DEVICE_SCAN:
7218df69 3806 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3807 cur_state = MFI_STATE_DEVICE_SCAN;
3808 break;
3809
3810 case MFI_STATE_FLUSH_CACHE:
7218df69 3811 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3812 cur_state = MFI_STATE_FLUSH_CACHE;
3813 break;
3814
3815 default:
1be18254 3816 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3817 fw_state);
3818 return -ENODEV;
3819 }
3820
3821 /*
3822 * The cur_state should not last for more than max_wait secs
3823 */
3824 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3825 curr_abs_state = instance->instancet->
3826 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3827
7218df69 3828 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3829 msleep(1);
3830 } else
3831 break;
3832 }
3833
3834 /*
3835 * Return error if fw_state hasn't changed after max_wait
3836 */
7218df69 3837 if (curr_abs_state == abs_state) {
1be18254 3838 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3839 "in %d secs\n", fw_state, max_wait);
3840 return -ENODEV;
3841 }
bc6ac5e8
TH		 3842
3843 abs_state = curr_abs_state;
3844 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3845 }
1be18254 3846 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3847
3848 return 0;
3849}
3850
3851/**
3852 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3853 * @instance: Adapter soft state
3854 */
3855static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3856{
3857 int i;
50b7f5a2 3858 u16 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3859 struct megasas_cmd *cmd;
3860
3861 if (!instance->frame_dma_pool)
3862 return;
3863
3864 /*
3865 * Return all frames to pool
3866 */
3867 for (i = 0; i < max_cmd; i++) {
3868
3869 cmd = instance->cmd_list[i];
3870
3871 if (cmd->frame)
fc69d86d 3872 dma_pool_free(instance->frame_dma_pool, cmd->frame,
c4a3e0a5
BS		 3873 cmd->frame_phys_addr);
3874
3875 if (cmd->sense)
fc69d86d 3876 dma_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3877 cmd->sense_phys_addr);
3878 }
3879
3880 /*
3881 * Now destroy the pool itself
3882 */
fc69d86d
RP		 3883 dma_pool_destroy(instance->frame_dma_pool);
3884 dma_pool_destroy(instance->sense_dma_pool);
c4a3e0a5
BS		 3885
3886 instance->frame_dma_pool = NULL;
3887 instance->sense_dma_pool = NULL;
3888}
3889
3890/**
3891 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3892 * @instance: Adapter soft state
3893 *
3894 * Each command packet has an embedded DMA memory buffer that is used for
3895 * filling MFI frame and the SG list that immediately follows the frame. This
3896 * function creates those DMA memory buffers for each command packet by using
3897 * PCI pool facility.
3898 */
3899static int megasas_create_frame_pool(struct megasas_instance *instance)
3900{
3901 int i;
50b7f5a2 3902 u16 max_cmd;
c4a3e0a5 3903 u32 sge_sz;
c4a3e0a5
BS		 3904 u32 frame_count;
3905 struct megasas_cmd *cmd;
3906
9c915a8c 3907 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3908
3909 /*
3910 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3911 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3912 */
3913 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3914 sizeof(struct megasas_sge32);
3915
da0dc9fb 3916 if (instance->flag_ieee)
f4c9a131 3917 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3918
c4a3e0a5 3919 /*
200aed58
SS		 3920 * For MFI controllers.
3921 * max_num_sge = 60
3922 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3923 * Total 960 byte (15 MFI frame of 64 byte)
3924 *
3925 * Fusion adapter require only 3 extra frame.
3926 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3927 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3928 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3929 */
e7d36b88
S		 3930 frame_count = (instance->adapter_type == MFI_SERIES) ?
3931 (15 + 1) : (3 + 1);
21c34006 3932 instance->mfi_frame_size = MEGAMFI_FRAME_SIZE * frame_count;
c4a3e0a5
BS		 3933 /*
3934 * Use DMA pool facility provided by PCI layer
3935 */
fc69d86d
RP		 3936 instance->frame_dma_pool = dma_pool_create("megasas frame pool",
3937 &instance->pdev->dev,
3938 instance->mfi_frame_size, 256, 0);
c4a3e0a5
BS		 3939
3940 if (!instance->frame_dma_pool) {
1be18254 3941 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3942 return -ENOMEM;
3943 }
3944
fc69d86d
RP		 3945 instance->sense_dma_pool = dma_pool_create("megasas sense pool",
3946 &instance->pdev->dev, 128,
3947 4, 0);
c4a3e0a5
BS		 3948
3949 if (!instance->sense_dma_pool) {
1be18254 3950 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5 3951
fc69d86d 3952 dma_pool_destroy(instance->frame_dma_pool);
c4a3e0a5
BS		 3953 instance->frame_dma_pool = NULL;
3954
3955 return -ENOMEM;
3956 }
3957
3958 /*
3959 * Allocate and attach a frame to each of the commands in cmd_list.
3960 * By making cmd->index as the context instead of the &cmd, we can
3961 * always use 32bit context regardless of the architecture
3962 */
3963 for (i = 0; i < max_cmd; i++) {
3964
3965 cmd = instance->cmd_list[i];
3966
fc69d86d 3967 cmd->frame = dma_pool_alloc(instance->frame_dma_pool,
c4a3e0a5
BS		 3968 GFP_KERNEL, &cmd->frame_phys_addr);
3969
fc69d86d 3970 cmd->sense = dma_pool_alloc(instance->sense_dma_pool,
c4a3e0a5
BS		 3971 GFP_KERNEL, &cmd->sense_phys_addr);
3972
3973 /*
3974 * megasas_teardown_frame_pool() takes care of freeing
3975 * whatever has been allocated
3976 */
3977 if (!cmd->frame || !cmd->sense) {
fc69d86d 3978 dev_printk(KERN_DEBUG, &instance->pdev->dev, "dma_pool_alloc failed\n");
c4a3e0a5
BS		 3979 megasas_teardown_frame_pool(instance);
3980 return -ENOMEM;
3981 }
3982
21c34006 3983 memset(cmd->frame, 0, instance->mfi_frame_size);
94cd65dd 3984 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3985 cmd->frame->io.pad_0 = 0;
e7d36b88 3986 if ((instance->adapter_type == MFI_SERIES) && reset_devices)
e5f93a36 3987 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3988 }
3989
3990 return 0;
3991}
3992
3993/**
3994 * megasas_free_cmds - Free all the cmds in the free cmd pool
3995 * @instance: Adapter soft state
3996 */
9c915a8c 3997void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3998{
3999 int i;
da0dc9fb 4000
c4a3e0a5
BS		 4001 /* First free the MFI frame pool */
4002 megasas_teardown_frame_pool(instance);
4003
4004 /* Free all the commands in the cmd_list */
9c915a8c
AR		 4005 for (i = 0; i < instance->max_mfi_cmds; i++)
4006
c4a3e0a5
BS		 4007 kfree(instance->cmd_list[i]);
4008
4009 /* Free the cmd_list buffer itself */
4010 kfree(instance->cmd_list);
4011 instance->cmd_list = NULL;
4012
4013 INIT_LIST_HEAD(&instance->cmd_pool);
4014}
4015
4016/**
4017 * megasas_alloc_cmds - Allocates the command packets
4018 * @instance: Adapter soft state
4019 *
4020 * Each command that is issued to the FW, whether IO commands from the OS or
4021 * internal commands like IOCTLs, are wrapped in local data structure called
4022 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
4023 * the FW.
4024 *
4025 * Each frame has a 32-bit field called context (tag). This context is used
4026 * to get back the megasas_cmd from the frame when a frame gets completed in
4027 * the ISR. Typically the address of the megasas_cmd itself would be used as
4028 * the context. But we wanted to keep the differences between 32 and 64 bit
4029 * systems to the mininum. We always use 32 bit integers for the context. In
4030 * this driver, the 32 bit values are the indices into an array cmd_list.
4031 * This array is used only to look up the megasas_cmd given the context. The
4032 * free commands themselves are maintained in a linked list called cmd_pool.
4033 */
9c915a8c 4034int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 4035{
4036 int i;
4037 int j;
50b7f5a2 4038 u16 max_cmd;
c4a3e0a5 4039 struct megasas_cmd *cmd;
90dc9d98 4040 struct fusion_context *fusion;
c4a3e0a5 4041
90dc9d98 4042 fusion = instance->ctrl_context;
9c915a8c 4043 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 4044
4045 /*
4046 * instance->cmd_list is an array of struct megasas_cmd pointers.
4047 * Allocate the dynamic array first and then allocate individual
4048 * commands.
4049 */
dd00cc48 4050 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 4051
4052 if (!instance->cmd_list) {
1be18254 4053 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 4054 return -ENOMEM;
4055 }
4056
9c915a8c 4057 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 4058
4059 for (i = 0; i < max_cmd; i++) {
4060 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
4061 GFP_KERNEL);
4062
4063 if (!instance->cmd_list[i]) {
4064
4065 for (j = 0; j < i; j++)
4066 kfree(instance->cmd_list[j]);
4067
4068 kfree(instance->cmd_list);
4069 instance->cmd_list = NULL;
4070
4071 return -ENOMEM;
4072 }
4073 }
4074
c4a3e0a5
BS		 4075 for (i = 0; i < max_cmd; i++) {
4076 cmd = instance->cmd_list[i];
4077 memset(cmd, 0, sizeof(struct megasas_cmd));
4078 cmd->index = i;
39a98554 4079 cmd->scmd = NULL;
c4a3e0a5
BS		 4080 cmd->instance = instance;
4081
4082 list_add_tail(&cmd->list, &instance->cmd_pool);
4083 }
4084
4085 /*
4086 * Create a frame pool and assign one frame to each cmd
4087 */
4088 if (megasas_create_frame_pool(instance)) {
1be18254 4089 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 4090 megasas_free_cmds(instance);
4091 }
4092
4093 return 0;
4094}
4095
6d40afbc
SS		 4096/*
4097 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
4098 * @instance: Adapter soft state
4099 *
4100 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
4101 * or FW is not under OCR.
4102 */
4103inline int
4104dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
4105
e7d36b88 4106 if (instance->adapter_type == MFI_SERIES)
6d40afbc
SS		 4107 return KILL_ADAPTER;
4108 else if (instance->unload ||
4109 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
4110 return IGNORE_TIMEOUT;
4111 else
4112 return INITIATE_OCR;
4113}
4114
15dd0381
S		 4115static void
4116megasas_get_pd_info(struct megasas_instance *instance, struct scsi_device *sdev)
2216c305
SS		 4117{
4118 int ret;
4119 struct megasas_cmd *cmd;
4120 struct megasas_dcmd_frame *dcmd;
4121
15dd0381
S		 4122 struct MR_PRIV_DEVICE *mr_device_priv_data;
4123 u16 device_id = 0;
4124
4125 device_id = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
2216c305
SS		 4126 cmd = megasas_get_cmd(instance);
4127
4128 if (!cmd) {
4129 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
15dd0381 4130 return;
2216c305
SS		 4131 }
4132
4133 dcmd = &cmd->frame->dcmd;
4134
4135 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
4136 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4137
4138 dcmd->mbox.s[0] = cpu_to_le16(device_id);
4139 dcmd->cmd = MFI_CMD_DCMD;
4140 dcmd->cmd_status = 0xFF;
4141 dcmd->sge_count = 1;
4142 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
4143 dcmd->timeout = 0;
4144 dcmd->pad_0 = 0;
4145 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
4146 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
4147 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->pd_info_h);
4148 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_PD_INFO));
4149
e7d36b88
S		 4150 if ((instance->adapter_type != MFI_SERIES) &&
4151 !instance->mask_interrupts)
2216c305
SS		 4152 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
4153 else
4154 ret = megasas_issue_polled(instance, cmd);
4155
4156 switch (ret) {
4157 case DCMD_SUCCESS:
15dd0381
S		 4158 mr_device_priv_data = sdev->hostdata;
4159 le16_to_cpus((u16 *)&instance->pd_info->state.ddf.pdType);
4160 mr_device_priv_data->interface_type =
2216c305
SS		 4161 instance->pd_info->state.ddf.pdType.intf;
4162 break;
4163
4164 case DCMD_TIMEOUT:
4165
4166 switch (dcmd_timeout_ocr_possible(instance)) {
4167 case INITIATE_OCR:
4168 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4169 megasas_reset_fusion(instance->host,
4170 MFI_IO_TIMEOUT_OCR);
4171 break;
4172 case KILL_ADAPTER:
4173 megaraid_sas_kill_hba(instance);
4174 break;
4175 case IGNORE_TIMEOUT:
4176 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4177 __func__, __LINE__);
4178 break;
4179 }
4180
4181 break;
4182 }
4183
4184 if (ret != DCMD_TIMEOUT)
4185 megasas_return_cmd(instance, cmd);
4186
15dd0381 4187 return;
2216c305 4188}
81e403ce
YB		 4189/*
4190 * megasas_get_pd_list_info - Returns FW's pd_list structure
4191 * @instance: Adapter soft state
4192 * @pd_list: pd_list structure
4193 *
4194 * Issues an internal command (DCMD) to get the FW's controller PD
4195 * list structure. This information is mainly used to find out SYSTEM
4196 * supported by the FW.
4197 */
4198static int
4199megasas_get_pd_list(struct megasas_instance *instance)
4200{
4201 int ret = 0, pd_index = 0;
4202 struct megasas_cmd *cmd;
4203 struct megasas_dcmd_frame *dcmd;
4204 struct MR_PD_LIST *ci;
4205 struct MR_PD_ADDRESS *pd_addr;
4206 dma_addr_t ci_h = 0;
4207
d9083160
SS		 4208 if (instance->pd_list_not_supported) {
4209 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4210 "not supported by firmware\n");
4211 return ret;
4212 }
4213
81e403ce
YB		 4214 cmd = megasas_get_cmd(instance);
4215
4216 if (!cmd) {
1be18254 4217 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 4218 return -ENOMEM;
4219 }
4220
4221 dcmd = &cmd->frame->dcmd;
4222
4223 ci = pci_alloc_consistent(instance->pdev,
4224 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
4225
4226 if (!ci) {
1be18254 4227 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 4228 megasas_return_cmd(instance, cmd);
4229 return -ENOMEM;
4230 }
4231
4232 memset(ci, 0, sizeof(*ci));
4233 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4234
4235 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4236 dcmd->mbox.b[1] = 0;
4237 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4238 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4239 dcmd->sge_count = 1;
94cd65dd 4240 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 4241 dcmd->timeout = 0;
780a3762 4242 dcmd->pad_0 = 0;
94cd65dd
SS		 4243 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4244 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
4245 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4246 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 4247
e7d36b88
S		 4248 if ((instance->adapter_type != MFI_SERIES) &&
4249 !instance->mask_interrupts)
90dc9d98 4250 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4251 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4252 else
4253 ret = megasas_issue_polled(instance, cmd);
81e403ce 4254
6d40afbc
SS		 4255 switch (ret) {
4256 case DCMD_FAILED:
30845586
SS		 4257 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4258 "failed/not supported by firmware\n");
4259
e7d36b88 4260 if (instance->adapter_type != MFI_SERIES)
30845586
SS		 4261 megaraid_sas_kill_hba(instance);
4262 else
4263 instance->pd_list_not_supported = 1;
6d40afbc
SS		 4264 break;
4265 case DCMD_TIMEOUT:
81e403ce 4266
6d40afbc
SS		 4267 switch (dcmd_timeout_ocr_possible(instance)) {
4268 case INITIATE_OCR:
4269 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4270 /*
4271 * DCMD failed from AEN path.
4272 * AEN path already hold reset_mutex to avoid PCI access
4273 * while OCR is in progress.
4274 */
4275 mutex_unlock(&instance->reset_mutex);
4276 megasas_reset_fusion(instance->host,
4277 MFI_IO_TIMEOUT_OCR);
4278 mutex_lock(&instance->reset_mutex);
4279 break;
4280 case KILL_ADAPTER:
4281 megaraid_sas_kill_hba(instance);
4282 break;
4283 case IGNORE_TIMEOUT:
4284 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4285 __func__, __LINE__);
4286 break;
4287 }
81e403ce 4288
6d40afbc
SS		 4289 break;
4290
4291 case DCMD_SUCCESS:
4292 pd_addr = ci->addr;
4293
4294 if ((le32_to_cpu(ci->count) >
4295 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4296 break;
81e403ce 4297
999ece0a 4298 memset(instance->local_pd_list, 0,
6d40afbc 4299 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4300
94cd65dd 4301 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4302 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4303 le16_to_cpu(pd_addr->deviceId);
999ece0a 4304 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4305 pd_addr->scsiDevType;
999ece0a 4306 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4307 MR_PD_STATE_SYSTEM;
81e403ce
YB		 4308 pd_addr++;
4309 }
6d40afbc 4310
999ece0a
SS		 4311 memcpy(instance->pd_list, instance->local_pd_list,
4312 sizeof(instance->pd_list));
6d40afbc
SS		 4313 break;
4314
81e403ce
YB		 4315 }
4316
4317 pci_free_consistent(instance->pdev,
4318 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
4319 ci, ci_h);
90dc9d98 4320
6d40afbc
SS		 4321 if (ret != DCMD_TIMEOUT)
4322 megasas_return_cmd(instance, cmd);
81e403ce
YB		 4323
4324 return ret;
4325}
4326
bdc6fb8d
YB		 4327/*
4328 * megasas_get_ld_list_info - Returns FW's ld_list structure
4329 * @instance: Adapter soft state
4330 * @ld_list: ld_list structure
4331 *
4332 * Issues an internal command (DCMD) to get the FW's controller PD
4333 * list structure. This information is mainly used to find out SYSTEM
4334 * supported by the FW.
4335 */
4336static int
4337megasas_get_ld_list(struct megasas_instance *instance)
4338{
4339 int ret = 0, ld_index = 0, ids = 0;
4340 struct megasas_cmd *cmd;
4341 struct megasas_dcmd_frame *dcmd;
4342 struct MR_LD_LIST *ci;
4343 dma_addr_t ci_h = 0;
94cd65dd 4344 u32 ld_count;
bdc6fb8d
YB		 4345
4346 cmd = megasas_get_cmd(instance);
4347
4348 if (!cmd) {
1be18254 4349 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 4350 return -ENOMEM;
4351 }
4352
4353 dcmd = &cmd->frame->dcmd;
4354
4355 ci = pci_alloc_consistent(instance->pdev,
4356 sizeof(struct MR_LD_LIST),
4357 &ci_h);
4358
4359 if (!ci) {
1be18254 4360 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 4361 megasas_return_cmd(instance, cmd);
4362 return -ENOMEM;
4363 }
4364
4365 memset(ci, 0, sizeof(*ci));
4366 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4367
51087a86
SS		 4368 if (instance->supportmax256vd)
4369 dcmd->mbox.b[0] = 1;
bdc6fb8d 4370 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4371 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4372 dcmd->sge_count = 1;
94cd65dd 4373 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 4374 dcmd->timeout = 0;
94cd65dd
SS		 4375 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4376 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
4377 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4378 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 4379 dcmd->pad_0 = 0;
4380
e7d36b88
S		 4381 if ((instance->adapter_type != MFI_SERIES) &&
4382 !instance->mask_interrupts)
90dc9d98 4383 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4384 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4385 else
4386 ret = megasas_issue_polled(instance, cmd);
4387
94cd65dd
SS		 4388 ld_count = le32_to_cpu(ci->ldCount);
4389
6d40afbc
SS		 4390 switch (ret) {
4391 case DCMD_FAILED:
4392 megaraid_sas_kill_hba(instance);
4393 break;
4394 case DCMD_TIMEOUT:
4395
4396 switch (dcmd_timeout_ocr_possible(instance)) {
4397 case INITIATE_OCR:
4398 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4399 /*
4400 * DCMD failed from AEN path.
4401 * AEN path already hold reset_mutex to avoid PCI access
4402 * while OCR is in progress.
4403 */
4404 mutex_unlock(&instance->reset_mutex);
4405 megasas_reset_fusion(instance->host,
4406 MFI_IO_TIMEOUT_OCR);
4407 mutex_lock(&instance->reset_mutex);
4408 break;
4409 case KILL_ADAPTER:
4410 megaraid_sas_kill_hba(instance);
4411 break;
4412 case IGNORE_TIMEOUT:
4413 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4414 __func__, __LINE__);
4415 break;
4416 }
4417
4418 break;
4419
4420 case DCMD_SUCCESS:
4421 if (ld_count > instance->fw_supported_vd_count)
4422 break;
bdc6fb8d 4423
51087a86 4424 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4425
94cd65dd 4426 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 4427 if (ci->ldList[ld_index].state != 0) {
4428 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4429 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB		 4430 }
4431 }
6d40afbc
SS		 4432
4433 break;
bdc6fb8d
YB		 4434 }
4435
6d40afbc
SS		 4436 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_LIST), ci, ci_h);
4437
4438 if (ret != DCMD_TIMEOUT)
4439 megasas_return_cmd(instance, cmd);
bdc6fb8d 4440
bdc6fb8d
YB		 4441 return ret;
4442}
4443
21c9e160
AR		 4444/**
4445 * megasas_ld_list_query - Returns FW's ld_list structure
4446 * @instance: Adapter soft state
4447 * @ld_list: ld_list structure
4448 *
4449 * Issues an internal command (DCMD) to get the FW's controller PD
4450 * list structure. This information is mainly used to find out SYSTEM
4451 * supported by the FW.
4452 */
4453static int
4454megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4455{
4456 int ret = 0, ld_index = 0, ids = 0;
4457 struct megasas_cmd *cmd;
4458 struct megasas_dcmd_frame *dcmd;
4459 struct MR_LD_TARGETID_LIST *ci;
4460 dma_addr_t ci_h = 0;
94cd65dd 4461 u32 tgtid_count;
21c9e160
AR		 4462
4463 cmd = megasas_get_cmd(instance);
4464
4465 if (!cmd) {
1be18254
BH		 4466 dev_warn(&instance->pdev->dev,
4467 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 4468 return -ENOMEM;
4469 }
4470
4471 dcmd = &cmd->frame->dcmd;
4472
4473 ci = pci_alloc_consistent(instance->pdev,
4474 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4475
4476 if (!ci) {
1be18254
BH		 4477 dev_warn(&instance->pdev->dev,
4478 "Failed to alloc mem for ld_list_query\n");
21c9e160
AR		 4479 megasas_return_cmd(instance, cmd);
4480 return -ENOMEM;
4481 }
4482
4483 memset(ci, 0, sizeof(*ci));
4484 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4485
4486 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4487 if (instance->supportmax256vd)
4488 dcmd->mbox.b[2] = 1;
21c9e160
AR		 4489
4490 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4491 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4492 dcmd->sge_count = 1;
94cd65dd 4493 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4494 dcmd->timeout = 0;
94cd65dd
SS		 4495 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4496 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4497 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4498 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160
AR		 4499 dcmd->pad_0 = 0;
4500
e7d36b88
S		 4501 if ((instance->adapter_type != MFI_SERIES) &&
4502 !instance->mask_interrupts)
6d40afbc 4503 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4504 else
4505 ret = megasas_issue_polled(instance, cmd);
21c9e160 4506
6d40afbc
SS		 4507 switch (ret) {
4508 case DCMD_FAILED:
4509 dev_info(&instance->pdev->dev,
4510 "DCMD not supported by firmware - %s %d\n",
4511 __func__, __LINE__);
4512 ret = megasas_get_ld_list(instance);
4513 break;
4514 case DCMD_TIMEOUT:
4515 switch (dcmd_timeout_ocr_possible(instance)) {
4516 case INITIATE_OCR:
4517 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4518 /*
4519 * DCMD failed from AEN path.
4520 * AEN path already hold reset_mutex to avoid PCI access
4521 * while OCR is in progress.
4522 */
4523 mutex_unlock(&instance->reset_mutex);
4524 megasas_reset_fusion(instance->host,
4525 MFI_IO_TIMEOUT_OCR);
4526 mutex_lock(&instance->reset_mutex);
4527 break;
4528 case KILL_ADAPTER:
4529 megaraid_sas_kill_hba(instance);
4530 break;
4531 case IGNORE_TIMEOUT:
4532 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4533 __func__, __LINE__);
4534 break;
4535 }
4536
4537 break;
4538 case DCMD_SUCCESS:
4539 tgtid_count = le32_to_cpu(ci->count);
4540
4541 if ((tgtid_count > (instance->fw_supported_vd_count)))
4542 break;
94cd65dd 4543
21c9e160 4544 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4545 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 4546 ids = ci->targetId[ld_index];
4547 instance->ld_ids[ids] = ci->targetId[ld_index];
4548 }
4549
6d40afbc 4550 break;
21c9e160
AR		 4551 }
4552
4553 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
6d40afbc 4554 ci, ci_h);
21c9e160 4555
6d40afbc
SS		 4556 if (ret != DCMD_TIMEOUT)
4557 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4558
4559 return ret;
4560}
4561
d009b576
SS		 4562/*
4563 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4564 * instance : Controller's instance
4565*/
4566static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4567{
4568 struct fusion_context *fusion;
d889344e 4569 u32 ventura_map_sz = 0;
d009b576
SS		 4570
4571 fusion = instance->ctrl_context;
4572 /* For MFI based controllers return dummy success */
4573 if (!fusion)
4574 return;
4575
4576 instance->supportmax256vd =
4577 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4578 /* Below is additional check to address future FW enhancement */
4579 if (instance->ctrl_info->max_lds > 64)
4580 instance->supportmax256vd = 1;
4581
4582 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4583 * MEGASAS_MAX_DEV_PER_CHANNEL;
4584 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4585 * MEGASAS_MAX_DEV_PER_CHANNEL;
4586 if (instance->supportmax256vd) {
4587 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4588 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4589 } else {
4590 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4591 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4592 }
d88da09a
SS		 4593
4594 dev_info(&instance->pdev->dev,
4595 "firmware type\t: %s\n",
4596 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4597 "Legacy(64 VD) firmware");
d009b576 4598
d889344e
SC		 4599 if (instance->max_raid_mapsize) {
4600 ventura_map_sz = instance->max_raid_mapsize *
4601 MR_MIN_MAP_SIZE; /* 64k */
4602 fusion->current_map_sz = ventura_map_sz;
4603 fusion->max_map_sz = ventura_map_sz;
4604 } else {
4605 fusion->old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
4606 (sizeof(struct MR_LD_SPAN_MAP) *
4607 (instance->fw_supported_vd_count - 1));
4608 fusion->new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
d009b576 4609
d889344e
SC		 4610 fusion->max_map_sz =
4611 max(fusion->old_map_sz, fusion->new_map_sz);
d009b576 4612
d889344e
SC		 4613 if (instance->supportmax256vd)
4614 fusion->current_map_sz = fusion->new_map_sz;
4615 else
4616 fusion->current_map_sz = fusion->old_map_sz;
4617 }
4618 /* irrespective of FW raid maps, driver raid map is constant */
4619 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP_ALL);
d009b576
SS		 4620}
4621
c4a3e0a5
BS		 4622/**
4623 * megasas_get_controller_info - Returns FW's controller structure
4624 * @instance: Adapter soft state
c4a3e0a5
BS		 4625 *
4626 * Issues an internal command (DCMD) to get the FW's controller structure.
4627 * This information is mainly used to find out the maximum IO transfer per
4628 * command supported by the FW.
4629 */
51087a86 4630int
d009b576 4631megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4632{
4633 int ret = 0;
4634 struct megasas_cmd *cmd;
4635 struct megasas_dcmd_frame *dcmd;
4636 struct megasas_ctrl_info *ci;
d009b576 4637 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4638 dma_addr_t ci_h = 0;
4639
d009b576
SS		 4640 ctrl_info = instance->ctrl_info;
4641
c4a3e0a5
BS		 4642 cmd = megasas_get_cmd(instance);
4643
4644 if (!cmd) {
1be18254 4645 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4646 return -ENOMEM;
4647 }
4648
4649 dcmd = &cmd->frame->dcmd;
4650
4651 ci = pci_alloc_consistent(instance->pdev,
4652 sizeof(struct megasas_ctrl_info), &ci_h);
4653
4654 if (!ci) {
1be18254 4655 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4656 megasas_return_cmd(instance, cmd);
4657 return -ENOMEM;
4658 }
4659
4660 memset(ci, 0, sizeof(*ci));
4661 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4662
4663 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4664 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4665 dcmd->sge_count = 1;
94cd65dd 4666 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4667 dcmd->timeout = 0;
780a3762 4668 dcmd->pad_0 = 0;
94cd65dd
SS		 4669 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4670 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4671 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4672 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4673 dcmd->mbox.b[0] = 1;
c4a3e0a5 4674
e7d36b88
S		 4675 if ((instance->adapter_type != MFI_SERIES) &&
4676 !instance->mask_interrupts)
6d40afbc 4677 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4678 else
4679 ret = megasas_issue_polled(instance, cmd);
4680
6d40afbc
SS		 4681 switch (ret) {
4682 case DCMD_SUCCESS:
c4a3e0a5 4683 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
6d40afbc
SS		 4684 /* Save required controller information in
4685 * CPU endianness format.
4686 */
d009b576
SS		 4687 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4688 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4689 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
ede7c3ce 4690 le16_to_cpus((u16 *)&ctrl_info->adapter_operations4);
6d40afbc
SS		 4691
4692 /* Update the latest Ext VD info.
4693 * From Init path, store current firmware details.
4694 * From OCR path, detect any firmware properties changes.
4695 * in case of Firmware upgrade without system reboot.
4696 */
d009b576 4697 megasas_update_ext_vd_details(instance);
3761cb4c 4698 instance->use_seqnum_jbod_fp =
4699 ctrl_info->adapterOperations3.useSeqNumJbodFP;
ede7c3ce
SC		 4700 instance->support_morethan256jbod =
4701 ctrl_info->adapter_operations4.support_pd_map_target_id;
6d40afbc
SS		 4702
4703 /*Check whether controller is iMR or MR */
4026e9aa
SS		 4704 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4705 dev_info(&instance->pdev->dev,
6d40afbc
SS		 4706 "controller type\t: %s(%dMB)\n",
4707 instance->is_imr ? "iMR" : "MR",
4708 le16_to_cpu(ctrl_info->memory_size));
4709
c4bd2654 4710 instance->disableOnlineCtrlReset =
4711 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4712 instance->secure_jbod_support =
4713 ctrl_info->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS		 4714 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4715 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4716 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4717 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS		 4718 break;
4719
4720 case DCMD_TIMEOUT:
4721 switch (dcmd_timeout_ocr_possible(instance)) {
4722 case INITIATE_OCR:
4723 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4724 megasas_reset_fusion(instance->host,
4725 MFI_IO_TIMEOUT_OCR);
4726 break;
4727 case KILL_ADAPTER:
4728 megaraid_sas_kill_hba(instance);
4729 break;
4730 case IGNORE_TIMEOUT:
4731 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4732 __func__, __LINE__);
4733 break;
4734 }
4735 case DCMD_FAILED:
4736 megaraid_sas_kill_hba(instance);
4737 break;
4738
d009b576 4739 }
c4a3e0a5
BS		 4740
4741 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4742 ci, ci_h);
4743
4026e9aa 4744 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 4745
4746
c4a3e0a5
BS		 4747 return ret;
4748}
4749
fc62b3fc
SS		 4750/*
4751 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4752 * to firmware
4753 *
4754 * @instance: Adapter soft state
4755 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4756 MR_CRASH_BUF_TURN_OFF = 0
4757 MR_CRASH_BUF_TURN_ON = 1
4758 * @return 0 on success non-zero on failure.
4759 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4760 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4761 * that driver supports crash dump feature. This DCMD will be sent only if
4762 * crash dump feature is supported by the FW.
4763 *
4764 */
4765int megasas_set_crash_dump_params(struct megasas_instance *instance,
4766 u8 crash_buf_state)
4767{
4768 int ret = 0;
4769 struct megasas_cmd *cmd;
4770 struct megasas_dcmd_frame *dcmd;
4771
4772 cmd = megasas_get_cmd(instance);
4773
4774 if (!cmd) {
4775 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4776 return -ENOMEM;
4777 }
4778
4779
4780 dcmd = &cmd->frame->dcmd;
4781
4782 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4783 dcmd->mbox.b[0] = crash_buf_state;
4784 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4785 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4786 dcmd->sge_count = 1;
4787 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4788 dcmd->timeout = 0;
4789 dcmd->pad_0 = 0;
4790 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4791 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4792 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4793 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4794
e7d36b88
S		 4795 if ((instance->adapter_type != MFI_SERIES) &&
4796 !instance->mask_interrupts)
6d40afbc 4797 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4798 else
90dc9d98
SS		 4799 ret = megasas_issue_polled(instance, cmd);
4800
6d40afbc
SS		 4801 if (ret == DCMD_TIMEOUT) {
4802 switch (dcmd_timeout_ocr_possible(instance)) {
4803 case INITIATE_OCR:
4804 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4805 megasas_reset_fusion(instance->host,
4806 MFI_IO_TIMEOUT_OCR);
4807 break;
4808 case KILL_ADAPTER:
4809 megaraid_sas_kill_hba(instance);
4810 break;
4811 case IGNORE_TIMEOUT:
4812 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4813 __func__, __LINE__);
4814 break;
4815 }
4816 } else
4817 megasas_return_cmd(instance, cmd);
4818
fc62b3fc
SS		 4819 return ret;
4820}
4821
31ea7088 4822/**
4823 * megasas_issue_init_mfi - Initializes the FW
4824 * @instance: Adapter soft state
4825 *
4826 * Issues the INIT MFI cmd
4827 */
4828static int
4829megasas_issue_init_mfi(struct megasas_instance *instance)
4830{
9ab9ed38 4831 __le32 context;
31ea7088 4832 struct megasas_cmd *cmd;
31ea7088 4833 struct megasas_init_frame *init_frame;
4834 struct megasas_init_queue_info *initq_info;
4835 dma_addr_t init_frame_h;
4836 dma_addr_t initq_info_h;
4837
4838 /*
4839 * Prepare a init frame. Note the init frame points to queue info
4840 * structure. Each frame has SGL allocated after first 64 bytes. For
4841 * this frame - since we don't need any SGL - we use SGL's space as
4842 * queue info structure
4843 *
4844 * We will not get a NULL command below. We just created the pool.
4845 */
4846 cmd = megasas_get_cmd(instance);
4847
4848 init_frame = (struct megasas_init_frame *)cmd->frame;
4849 initq_info = (struct megasas_init_queue_info *)
4850 ((unsigned long)init_frame + 64);
4851
4852 init_frame_h = cmd->frame_phys_addr;
4853 initq_info_h = init_frame_h + 64;
4854
4855 context = init_frame->context;
4856 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4857 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4858 init_frame->context = context;
4859
94cd65dd
SS		 4860 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4861 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4862
94cd65dd
SS		 4863 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4864 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4865
4866 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4867 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4868 init_frame->queue_info_new_phys_addr_lo =
4869 cpu_to_le32(lower_32_bits(initq_info_h));
4870 init_frame->queue_info_new_phys_addr_hi =
4871 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4872
94cd65dd 4873 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4874
4875 /*
4876 * disable the intr before firing the init frame to FW
4877 */
d46a3ad6 4878 instance->instancet->disable_intr(instance);
31ea7088 4879
4880 /*
4881 * Issue the init frame in polled mode
4882 */
4883
4884 if (megasas_issue_polled(instance, cmd)) {
1be18254 4885 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4886 megasas_return_cmd(instance, cmd);
4887 goto fail_fw_init;
4888 }
4889
4890 megasas_return_cmd(instance, cmd);
4891
4892 return 0;
4893
4894fail_fw_init:
4895 return -EINVAL;
4896}
4897
cd50ba8e
AR		 4898static u32
4899megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4900{
cd50ba8e 4901 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4902 u32 context_sz;
4903 u32 reply_q_sz;
c4a3e0a5
BS		 4904
4905 reg_set = instance->reg_set;
4906
c4a3e0a5
BS		 4907 /*
4908 * Get various operational parameters from status register
4909 */
1341c939 4910 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4911 /*
4912 * Reduce the max supported cmds by 1. This is to ensure that the
4913 * reply_q_sz (1 more than the max cmd that driver may send)
4914 * does not exceed max cmds that the FW can support
4915 */
4916 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4917 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4918 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4919 0x10;
f26ac3a1
SS		 4920 /*
4921 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4922 * are reserved for IOCTL + driver's internal DCMDs.
4923 */
4924 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4925 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4926 instance->max_scsi_cmds = (instance->max_fw_cmds -
4927 MEGASAS_SKINNY_INT_CMDS);
4928 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4929 } else {
4930 instance->max_scsi_cmds = (instance->max_fw_cmds -
4931 MEGASAS_INT_CMDS);
4932 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4933 }
4934
308ec459 4935 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 4936 /*
4937 * Create a pool of commands
4938 */
4939 if (megasas_alloc_cmds(instance))
4940 goto fail_alloc_cmds;
4941
4942 /*
4943 * Allocate memory for reply queue. Length of reply queue should
4944 * be _one_ more than the maximum commands handled by the firmware.
4945 *
4946 * Note: When FW completes commands, it places corresponding contex
4947 * values in this circular reply queue. This circular queue is a fairly
4948 * typical producer-consumer queue. FW is the producer (of completed
4949 * commands) and the driver is the consumer.
4950 */
4951 context_sz = sizeof(u32);
4952 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4953
4954 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4955 reply_q_sz,
4956 &instance->reply_queue_h);
4957
4958 if (!instance->reply_queue) {
1be18254 4959 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4960 goto fail_reply_queue;
4961 }
4962
31ea7088 4963 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4964 goto fail_fw_init;
c4a3e0a5 4965
d009b576 4966 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4967 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4968 "Fail from %s %d\n", instance->unique_id,
4969 __func__, __LINE__);
4970 goto fail_fw_init;
4971 }
4972
39a98554 4973 instance->fw_support_ieee = 0;
4974 instance->fw_support_ieee =
4975 (instance->instancet->read_fw_status_reg(reg_set) &
4976 0x04000000);
4977
1be18254 4978 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4979 instance->fw_support_ieee);
4980
4981 if (instance->fw_support_ieee)
4982 instance->flag_ieee = 1;
4983
cd50ba8e
AR		 4984 return 0;
4985
4986fail_fw_init:
4987
4988 pci_free_consistent(instance->pdev, reply_q_sz,
4989 instance->reply_queue, instance->reply_queue_h);
4990fail_reply_queue:
4991 megasas_free_cmds(instance);
4992
4993fail_alloc_cmds:
cd50ba8e
AR		 4994 return 1;
4995}
4996
d3557fc8 4997/*
fad119b7 4998 * megasas_setup_irqs_ioapic - register legacy interrupts.
d3557fc8
SS		 4999 * @instance: Adapter soft state
5000 *
5001 * Do not enable interrupt, only setup ISRs.
5002 *
5003 * Return 0 on success.
5004 */
5005static int
5006megasas_setup_irqs_ioapic(struct megasas_instance *instance)
5007{
5008 struct pci_dev *pdev;
5009
5010 pdev = instance->pdev;
5011 instance->irq_context[0].instance = instance;
5012 instance->irq_context[0].MSIxIndex = 0;
fad119b7
HR		 5013 if (request_irq(pci_irq_vector(pdev, 0),
5014 instance->instancet->service_isr, IRQF_SHARED,
5015 "megasas", &instance->irq_context[0])) {
d3557fc8
SS		 5016 dev_err(&instance->pdev->dev,
5017 "Failed to register IRQ from %s %d\n",
5018 __func__, __LINE__);
5019 return -1;
5020 }
5021 return 0;
5022}
5023
5024/**
5025 * megasas_setup_irqs_msix - register MSI-x interrupts.
5026 * @instance: Adapter soft state
5027 * @is_probe: Driver probe check
5028 *
5029 * Do not enable interrupt, only setup ISRs.
5030 *
5031 * Return 0 on success.
5032 */
5033static int
5034megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
5035{
fad119b7 5036 int i, j;
d3557fc8
SS		 5037 struct pci_dev *pdev;
5038
5039 pdev = instance->pdev;
5040
5041 /* Try MSI-x */
d3557fc8
SS		 5042 for (i = 0; i < instance->msix_vectors; i++) {
5043 instance->irq_context[i].instance = instance;
5044 instance->irq_context[i].MSIxIndex = i;
fad119b7 5045 if (request_irq(pci_irq_vector(pdev, i),
d3557fc8
SS		 5046 instance->instancet->service_isr, 0, "megasas",
5047 &instance->irq_context[i])) {
5048 dev_err(&instance->pdev->dev,
5049 "Failed to register IRQ for vector %d.\n", i);
fad119b7
HR		 5050 for (j = 0; j < i; j++)
5051 free_irq(pci_irq_vector(pdev, j),
5052 &instance->irq_context[j]);
d3557fc8
SS		 5053 /* Retry irq register for IO_APIC*/
5054 instance->msix_vectors = 0;
64ff64b9
S		 5055 if (is_probe) {
5056 pci_free_irq_vectors(instance->pdev);
d3557fc8 5057 return megasas_setup_irqs_ioapic(instance);
64ff64b9 5058 } else {
d3557fc8 5059 return -1;
64ff64b9 5060 }
d3557fc8 5061 }
d3557fc8
SS		 5062 }
5063 return 0;
5064}
5065
5066/*
5067 * megasas_destroy_irqs- unregister interrupts.
5068 * @instance: Adapter soft state
5069 * return: void
5070 */
5071static void
5072megasas_destroy_irqs(struct megasas_instance *instance) {
5073
5074 int i;
5075
5076 if (instance->msix_vectors)
5077 for (i = 0; i < instance->msix_vectors; i++) {
fad119b7 5078 free_irq(pci_irq_vector(instance->pdev, i),
d3557fc8
SS		 5079 &instance->irq_context[i]);
5080 }
5081 else
fad119b7
HR		 5082 free_irq(pci_irq_vector(instance->pdev, 0),
5083 &instance->irq_context[0]);
d3557fc8
SS		 5084}
5085
3761cb4c 5086/**
5087 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
5088 * @instance: Adapter soft state
5089 * @is_probe: Driver probe check
5090 *
5091 * Return 0 on success.
5092 */
5093void
5094megasas_setup_jbod_map(struct megasas_instance *instance)
5095{
5096 int i;
5097 struct fusion_context *fusion = instance->ctrl_context;
5098 u32 pd_seq_map_sz;
5099
5100 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5101 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
5102
5103 if (reset_devices || !fusion ||
5104 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
5105 dev_info(&instance->pdev->dev,
5106 "Jbod map is not supported %s %d\n",
5107 __func__, __LINE__);
5108 instance->use_seqnum_jbod_fp = false;
5109 return;
5110 }
5111
5112 if (fusion->pd_seq_sync[0])
5113 goto skip_alloc;
5114
5115 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
5116 fusion->pd_seq_sync[i] = dma_alloc_coherent
5117 (&instance->pdev->dev, pd_seq_map_sz,
5118 &fusion->pd_seq_phys[i], GFP_KERNEL);
5119 if (!fusion->pd_seq_sync[i]) {
5120 dev_err(&instance->pdev->dev,
5121 "Failed to allocate memory from %s %d\n",
5122 __func__, __LINE__);
5123 if (i == 1) {
5124 dma_free_coherent(&instance->pdev->dev,
5125 pd_seq_map_sz, fusion->pd_seq_sync[0],
5126 fusion->pd_seq_phys[0]);
5127 fusion->pd_seq_sync[0] = NULL;
5128 }
5129 instance->use_seqnum_jbod_fp = false;
5130 return;
5131 }
5132 }
5133
5134skip_alloc:
5135 if (!megasas_sync_pd_seq_num(instance, false) &&
5136 !megasas_sync_pd_seq_num(instance, true))
5137 instance->use_seqnum_jbod_fp = true;
5138 else
5139 instance->use_seqnum_jbod_fp = false;
5140}
5141
cd50ba8e
AR		 5142/**
5143 * megasas_init_fw - Initializes the FW
5144 * @instance: Adapter soft state
5145 *
5146 * This is the main function for initializing firmware
5147 */
5148
5149static int megasas_init_fw(struct megasas_instance *instance)
5150{
5151 u32 max_sectors_1;
15dd0381
S		 5152 u32 max_sectors_2, tmp_sectors, msix_enable;
5153 u32 scratch_pad_2, scratch_pad_3, scratch_pad_4;
11f8a7b3 5154 resource_size_t base_addr;
cd50ba8e 5155 struct megasas_register_set __iomem *reg_set;
51087a86 5156 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 5157 unsigned long bar_list;
fdd84e25 5158 int i, j, loop, fw_msix_count = 0;
229fe47c 5159 struct IOV_111 *iovPtr;
5a8cb85b 5160 struct fusion_context *fusion;
5161
5162 fusion = instance->ctrl_context;
cd50ba8e
AR		 5163
5164 /* Find first memory bar */
5165 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
51f9039f 5166 instance->bar = find_first_bit(&bar_list, BITS_PER_LONG);
e7f85168 5167 if (pci_request_selected_regions(instance->pdev, 1<<instance->bar,
cd50ba8e 5168 "megasas: LSI")) {
1be18254 5169 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 5170 return -EBUSY;
5171 }
5172
11f8a7b3
BC		 5173 base_addr = pci_resource_start(instance->pdev, instance->bar);
5174 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 5175
5176 if (!instance->reg_set) {
1be18254 5177 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 5178 goto fail_ioremap;
5179 }
5180
5181 reg_set = instance->reg_set;
5182
e7d36b88 5183 if (instance->adapter_type != MFI_SERIES)
9c915a8c 5184 instance->instancet = &megasas_instance_template_fusion;
9581ebeb
SC		 5185 else {
5186 switch (instance->pdev->device) {
5187 case PCI_DEVICE_ID_LSI_SAS1078R:
5188 case PCI_DEVICE_ID_LSI_SAS1078DE:
5189 instance->instancet = &megasas_instance_template_ppc;
5190 break;
5191 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5192 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5193 instance->instancet = &megasas_instance_template_gen2;
5194 break;
5195 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5196 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5197 instance->instancet = &megasas_instance_template_skinny;
5198 break;
5199 case PCI_DEVICE_ID_LSI_SAS1064R:
5200 case PCI_DEVICE_ID_DELL_PERC5:
5201 default:
5202 instance->instancet = &megasas_instance_template_xscale;
5203 instance->pd_list_not_supported = 1;
5204 break;
5205 }
cd50ba8e
AR		 5206 }
5207
6431f5d7
SS		 5208 if (megasas_transition_to_ready(instance, 0)) {
5209 atomic_set(&instance->fw_reset_no_pci_access, 1);
5210 instance->instancet->adp_reset
5211 (instance, instance->reg_set);
5212 atomic_set(&instance->fw_reset_no_pci_access, 0);
5213 dev_info(&instance->pdev->dev,
1be18254 5214 "FW restarted successfully from %s!\n",
6431f5d7
SS		 5215 __func__);
5216
5217 /*waitting for about 30 second before retry*/
5218 ssleep(30);
5219
5220 if (megasas_transition_to_ready(instance, 0))
5221 goto fail_ready_state;
5222 }
cd50ba8e 5223
f369a315 5224 if (instance->adapter_type == VENTURA_SERIES) {
d889344e
SC		 5225 scratch_pad_3 =
5226 readl(&instance->reg_set->outbound_scratch_pad_3);
d889344e
SC		 5227 instance->max_raid_mapsize = ((scratch_pad_3 >>
5228 MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
5229 MR_MAX_RAID_MAP_SIZE_MASK);
5230 }
d46a3ad6 5231
3f1abce4
AR		 5232 /* Check if MSI-X is supported while in ready state */
5233 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5234 0x4000000) >> 0x1a;
c8e858fe 5235 if (msix_enable && !msix_disable) {
fad119b7
HR		 5236 int irq_flags = PCI_IRQ_MSIX;
5237
d46a3ad6
SS		 5238 scratch_pad_2 = readl
5239 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5240 /* Check max MSI-X vectors */
5a8cb85b 5241 if (fusion) {
c365178f
S		 5242 if (instance->adapter_type == THUNDERBOLT_SERIES) {
5243 /* Thunderbolt Series*/
5a8cb85b 5244 instance->msix_vectors = (scratch_pad_2
5245 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5246 fw_msix_count = instance->msix_vectors;
5247 } else { /* Invader series supports more than 8 MSI-x vectors*/
5248 instance->msix_vectors = ((scratch_pad_2
5249 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5250 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
2493c67e
SC		 5251 if (instance->msix_vectors > 16)
5252 instance->msix_combined = true;
5253
179ac142
SS		 5254 if (rdpq_enable)
5255 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5256 1 : 0;
5a8cb85b 5257 fw_msix_count = instance->msix_vectors;
5258 /* Save 1-15 reply post index address to local memory
5259 * Index 0 is already saved from reg offset
5260 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5261 */
5262 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5263 instance->reply_post_host_index_addr[loop] =
5264 (u32 __iomem *)
5265 ((u8 __iomem *)instance->reg_set +
5266 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5267 + (loop * 0x10));
5268 }
d46a3ad6
SS		 5269 }
5270 if (msix_vectors)
5271 instance->msix_vectors = min(msix_vectors,
5272 instance->msix_vectors);
5a8cb85b 5273 } else /* MFI adapters */
c8e858fe
AR		 5274 instance->msix_vectors = 1;
5275 /* Don't bother allocating more MSI-X vectors than cpus */
5276 instance->msix_vectors = min(instance->msix_vectors,
5277 (unsigned int)num_online_cpus());
fad119b7
HR		 5278 if (smp_affinity_enable)
5279 irq_flags |= PCI_IRQ_AFFINITY;
5280 i = pci_alloc_irq_vectors(instance->pdev, 1,
5281 instance->msix_vectors, irq_flags);
c12de882 5282 if (i > 0)
8ae80ed1
AG		 5283 instance->msix_vectors = i;
5284 else
c8e858fe
AR		 5285 instance->msix_vectors = 0;
5286 }
2493c67e
SC		 5287 /*
5288 * MSI-X host index 0 is common for all adapter.
5289 * It is used for all MPT based Adapters.
5290 */
5291 if (instance->msix_combined) {
5292 instance->reply_post_host_index_addr[0] =
5293 (u32 *)((u8 *)instance->reg_set +
5294 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET);
5295 } else {
5296 instance->reply_post_host_index_addr[0] =
5297 (u32 *)((u8 *)instance->reg_set +
5298 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5299 }
5300
64ff64b9
S		 5301 if (!instance->msix_vectors) {
5302 i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
5303 if (i < 0)
5304 goto fail_setup_irqs;
5305 }
3f1abce4 5306
258c3af2
TH		 5307 dev_info(&instance->pdev->dev,
5308 "firmware supports msix\t: (%d)", fw_msix_count);
5309 dev_info(&instance->pdev->dev,
5310 "current msix/online cpus\t: (%d/%d)\n",
5311 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS		 5312 dev_info(&instance->pdev->dev,
5313 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5314
91626c27 5315 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5316 (unsigned long)instance);
5317
51087a86
SS		 5318 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
5319 GFP_KERNEL);
5320 if (instance->ctrl_info == NULL)
5321 goto fail_init_adapter;
5322
5323 /*
5324 * Below are default value for legacy Firmware.
5325 * non-fusion based controllers
5326 */
5327 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5328 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 5329 /* Get operational params, sge flags, send init cmd to controller */
5330 if (instance->instancet->init_adapter(instance))
eb1b1237 5331 goto fail_init_adapter;
cd50ba8e 5332
f369a315 5333 if (instance->adapter_type == VENTURA_SERIES) {
15dd0381
S		 5334 scratch_pad_4 =
5335 readl(&instance->reg_set->outbound_scratch_pad_4);
5336 if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
5337 MR_DEFAULT_NVME_PAGE_SHIFT)
5338 instance->nvme_page_size =
5339 (1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK));
5340
5341 dev_info(&instance->pdev->dev,
5342 "NVME page size\t: (%d)\n", instance->nvme_page_size);
5343 }
5344
18103efc
TH		 5345 if (instance->msix_vectors ?
5346 megasas_setup_irqs_msix(instance, 1) :
5347 megasas_setup_irqs_ioapic(instance))
5348 goto fail_init_adapter;
258c3af2 5349
d3557fc8 5350 instance->instancet->enable_intr(instance);
cd50ba8e 5351
13f30771 5352 dev_info(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5353
3761cb4c 5354 megasas_setup_jbod_map(instance);
5355
39a98554 5356 /** for passthrough
da0dc9fb
BH		 5357 * the following function will get the PD LIST.
5358 */
5359 memset(instance->pd_list, 0,
81e403ce 5360 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5361 if (megasas_get_pd_list(instance) < 0) {
1be18254 5362 dev_err(&instance->pdev->dev, "failed to get PD list\n");
72bff2d1 5363 goto fail_get_ld_pd_list;
58968fc8 5364 }
81e403ce 5365
bdc6fb8d 5366 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
fdd84e25
SC		 5367
5368 /* stream detection initialization */
f369a315 5369 if (instance->adapter_type == VENTURA_SERIES) {
fdd84e25 5370 fusion->stream_detect_by_ld =
41064f1b
S		 5371 kzalloc(sizeof(struct LD_STREAM_DETECT *)
5372 * MAX_LOGICAL_DRIVES_EXT,
5373 GFP_KERNEL);
fdd84e25
SC		 5374 if (!fusion->stream_detect_by_ld) {
5375 dev_err(&instance->pdev->dev,
41064f1b 5376 "unable to allocate stream detection for pool of LDs\n");
fdd84e25
SC		 5377 goto fail_get_ld_pd_list;
5378 }
5379 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) {
5380 fusion->stream_detect_by_ld[i] =
5381 kmalloc(sizeof(struct LD_STREAM_DETECT),
5382 GFP_KERNEL);
5383 if (!fusion->stream_detect_by_ld[i]) {
5384 dev_err(&instance->pdev->dev,
5385 "unable to allocate stream detect by LD\n ");
5386 for (j = 0; j < i; ++j)
5387 kfree(fusion->stream_detect_by_ld[j]);
5388 kfree(fusion->stream_detect_by_ld);
5389 fusion->stream_detect_by_ld = NULL;
5390 goto fail_get_ld_pd_list;
5391 }
5392 fusion->stream_detect_by_ld[i]->mru_bit_map
5393 = MR_STREAM_BITMAP;
5394 }
5395 }
5396
21c9e160
AR		 5397 if (megasas_ld_list_query(instance,
5398 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
72bff2d1 5399 goto fail_get_ld_pd_list;
bdc6fb8d 5400
c4a3e0a5
BS		 5401 /*
5402 * Compute the max allowed sectors per IO: The controller info has two
5403 * limits on max sectors. Driver should use the minimum of these two.
5404 *
5405 * 1 << stripe_sz_ops.min = max sectors per strip
5406 *
5407 * Note that older firmwares ( < FW ver 30) didn't report information
5408 * to calculate max_sectors_1. So the number ended up as zero always.
5409 */
14faea9f 5410 tmp_sectors = 0;
51087a86 5411 ctrl_info = instance->ctrl_info;
c4a3e0a5 5412
51087a86
SS		 5413 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5414 le16_to_cpu(ctrl_info->max_strips_per_io);
5415 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5416
da0dc9fb 5417 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5418
8f67c8c5
SS		 5419 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5420 instance->passive = ctrl_info->cluster.passive;
5421 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS		 5422 instance->UnevenSpanSupport =
5423 ctrl_info->adapterOperations2.supportUnevenSpans;
5424 if (instance->UnevenSpanSupport) {
5425 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 5426 if (MR_ValidateMapInfo(instance))
5427 fusion->fast_path_io = 1;
5428 else
5429 fusion->fast_path_io = 0;
fc62b3fc 5430
51087a86
SS		 5431 }
5432 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5433 instance->requestorId = ctrl_info->iov.requestorId;
5434 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5435 if (!ctrl_info->adapterOperations2.activePassive)
5436 instance->PlasmaFW111 = 1;
5437
5438 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5439 instance->PlasmaFW111 ? "1.11" : "new");
5440
5441 if (instance->PlasmaFW111) {
5442 iovPtr = (struct IOV_111 *)
5443 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5444 instance->requestorId = iovPtr->requestorId;
5445 }
fc62b3fc 5446 }
92bb6505 5447 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5448 instance->requestorId);
51087a86
SS		 5449 }
5450
51087a86
SS		 5451 instance->crash_dump_fw_support =
5452 ctrl_info->adapterOperations3.supportCrashDump;
5453 instance->crash_dump_drv_support =
5454 (instance->crash_dump_fw_support &&
5455 instance->crash_dump_buf);
d88da09a 5456 if (instance->crash_dump_drv_support)
51087a86
SS		 5457 megasas_set_crash_dump_params(instance,
5458 MR_CRASH_BUF_TURN_OFF);
5459
d88da09a 5460 else {
51087a86
SS		 5461 if (instance->crash_dump_buf)
5462 pci_free_consistent(instance->pdev,
5463 CRASH_DMA_BUF_SIZE,
5464 instance->crash_dump_buf,
5465 instance->crash_dump_h);
5466 instance->crash_dump_buf = NULL;
14faea9f 5467 }
7497cde8 5468
d88da09a
SS		 5469
5470 dev_info(&instance->pdev->dev,
5471 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5472 le16_to_cpu(ctrl_info->pci.vendor_id),
5473 le16_to_cpu(ctrl_info->pci.device_id),
5474 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5475 le16_to_cpu(ctrl_info->pci.sub_device_id));
5476 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5477 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS		 5478 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5479 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5480 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5481 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 5482
5483
14faea9f 5484 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5485 SGE_BUFFER_SIZE / 512;
14faea9f 5486 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5487 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5488
ae09a6c1
SS		 5489 /* Check for valid throttlequeuedepth module parameter */
5490 if (throttlequeuedepth &&
5491 throttlequeuedepth <= instance->max_scsi_cmds)
5492 instance->throttlequeuedepth = throttlequeuedepth;
5493 else
5494 instance->throttlequeuedepth =
5495 MEGASAS_THROTTLE_QUEUE_DEPTH;
5496
e636a7a4
S		 5497 if ((resetwaittime < 1) ||
5498 (resetwaittime > MEGASAS_RESET_WAIT_TIME))
e3d178ca
SS		 5499 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5500
5501 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5502 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5503
229fe47c
AR		 5504 /* Launch SR-IOV heartbeat timer */
5505 if (instance->requestorId) {
5506 if (!megasas_sriov_start_heartbeat(instance, 1))
5507 megasas_start_timer(instance,
5508 &instance->sriov_heartbeat_timer,
5509 megasas_sriov_heartbeat_handler,
5510 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5511 else
5512 instance->skip_heartbeat_timer_del = 1;
5513 }
5514
c4a3e0a5
BS		 5515 return 0;
5516
fdd84e25
SC		 5517fail_get_ld_pd_list:
5518 instance->instancet->disable_intr(instance);
18103efc 5519fail_init_adapter:
fad119b7
HR		 5520 megasas_destroy_irqs(instance);
5521fail_setup_irqs:
d3557fc8 5522 if (instance->msix_vectors)
fad119b7 5523 pci_free_irq_vectors(instance->pdev);
d3557fc8 5524 instance->msix_vectors = 0;
cd50ba8e 5525fail_ready_state:
51087a86
SS		 5526 kfree(instance->ctrl_info);
5527 instance->ctrl_info = NULL;
c4a3e0a5
BS		 5528 iounmap(instance->reg_set);
5529
72bff2d1 5530fail_ioremap:
e7f85168 5531 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5 5532
72bff2d1
S		 5533 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
5534 __func__, __LINE__);
c4a3e0a5
BS		 5535 return -EINVAL;
5536}
5537
5538/**
5539 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5540 * @instance: Adapter soft state
c4a3e0a5
BS		 5541 */
5542static void megasas_release_mfi(struct megasas_instance *instance)
5543{
9c915a8c 5544 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5545
9c915a8c
AR		 5546 if (instance->reply_queue)
5547 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 5548 instance->reply_queue, instance->reply_queue_h);
5549
5550 megasas_free_cmds(instance);
5551
5552 iounmap(instance->reg_set);
5553
e7f85168 5554 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5
BS		 5555}
5556
5557/**
5558 * megasas_get_seq_num - Gets latest event sequence numbers
5559 * @instance: Adapter soft state
5560 * @eli: FW event log sequence numbers information
5561 *
5562 * FW maintains a log of all events in a non-volatile area. Upper layers would
5563 * usually find out the latest sequence number of the events, the seq number at
5564 * the boot etc. They would "read" all the events below the latest seq number
5565 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5566 * number), they would subsribe to AEN (asynchronous event notification) and
5567 * wait for the events to happen.
5568 */
5569static int
5570megasas_get_seq_num(struct megasas_instance *instance,
5571 struct megasas_evt_log_info *eli)
5572{
5573 struct megasas_cmd *cmd;
5574 struct megasas_dcmd_frame *dcmd;
5575 struct megasas_evt_log_info *el_info;
5576 dma_addr_t el_info_h = 0;
5577
5578 cmd = megasas_get_cmd(instance);
5579
5580 if (!cmd) {
5581 return -ENOMEM;
5582 }
5583
5584 dcmd = &cmd->frame->dcmd;
5585 el_info = pci_alloc_consistent(instance->pdev,
5586 sizeof(struct megasas_evt_log_info),
5587 &el_info_h);
5588
5589 if (!el_info) {
5590 megasas_return_cmd(instance, cmd);
5591 return -ENOMEM;
5592 }
5593
5594 memset(el_info, 0, sizeof(*el_info));
5595 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5596
5597 dcmd->cmd = MFI_CMD_DCMD;
5598 dcmd->cmd_status = 0x0;
5599 dcmd->sge_count = 1;
94cd65dd 5600 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5601 dcmd->timeout = 0;
780a3762 5602 dcmd->pad_0 = 0;
94cd65dd
SS		 5603 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5604 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5605 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5606 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5607
6d40afbc
SS		 5608 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS) ==
5609 DCMD_SUCCESS) {
cfbe7554
SS		 5610 /*
5611 * Copy the data back into callers buffer
5612 */
48100b0e
CH		 5613 eli->newest_seq_num = el_info->newest_seq_num;
5614 eli->oldest_seq_num = el_info->oldest_seq_num;
5615 eli->clear_seq_num = el_info->clear_seq_num;
5616 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5617 eli->boot_seq_num = el_info->boot_seq_num;
6d40afbc
SS		 5618 } else
5619 dev_err(&instance->pdev->dev, "DCMD failed "
5620 "from %s\n", __func__);
c4a3e0a5
BS		 5621
5622 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5623 el_info, el_info_h);
5624
4026e9aa 5625 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5626
5627 return 0;
5628}
5629
5630/**
5631 * megasas_register_aen - Registers for asynchronous event notification
5632 * @instance: Adapter soft state
5633 * @seq_num: The starting sequence number
5634 * @class_locale: Class of the event
5635 *
5636 * This function subscribes for AEN for events beyond the @seq_num. It requests
5637 * to be notified if and only if the event is of type @class_locale
5638 */
5639static int
5640megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5641 u32 class_locale_word)
5642{
5643 int ret_val;
5644 struct megasas_cmd *cmd;
5645 struct megasas_dcmd_frame *dcmd;
5646 union megasas_evt_class_locale curr_aen;
5647 union megasas_evt_class_locale prev_aen;
5648
5649 /*
5650 * If there an AEN pending already (aen_cmd), check if the
5651 * class_locale of that pending AEN is inclusive of the new
5652 * AEN request we currently have. If it is, then we don't have
5653 * to do anything. In other words, whichever events the current
5654 * AEN request is subscribing to, have already been subscribed
5655 * to.
5656 *
5657 * If the old_cmd is _not_ inclusive, then we have to abort
5658 * that command, form a class_locale that is superset of both
5659 * old and current and re-issue to the FW
5660 */
5661
5662 curr_aen.word = class_locale_word;
5663
5664 if (instance->aen_cmd) {
5665
a9555534
CH		 5666 prev_aen.word =
5667 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5 5668
91b3d9f0
S		 5669 if ((curr_aen.members.class < MFI_EVT_CLASS_DEBUG) ||
5670 (curr_aen.members.class > MFI_EVT_CLASS_DEAD)) {
5671 dev_info(&instance->pdev->dev,
5672 "%s %d out of range class %d send by application\n",
5673 __func__, __LINE__, curr_aen.members.class);
5674 return 0;
5675 }
5676
c4a3e0a5
BS		 5677 /*
5678 * A class whose enum value is smaller is inclusive of all
5679 * higher values. If a PROGRESS (= -1) was previously
5680 * registered, then a new registration requests for higher
5681 * classes need not be sent to FW. They are automatically
5682 * included.
5683 *
5684 * Locale numbers don't have such hierarchy. They are bitmap
5685 * values
5686 */
5687 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5688 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5689 curr_aen.members.locale)) {
5690 /*
5691 * Previously issued event registration includes
5692 * current request. Nothing to do.
5693 */
5694 return 0;
5695 } else {
3993a862 5696 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5697
5698 if (prev_aen.members.class < curr_aen.members.class)
5699 curr_aen.members.class = prev_aen.members.class;
5700
5701 instance->aen_cmd->abort_aen = 1;
5702 ret_val = megasas_issue_blocked_abort_cmd(instance,
5703 instance->
cfbe7554 5704 aen_cmd, 30);
c4a3e0a5
BS		 5705
5706 if (ret_val) {
1be18254 5707 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5708 "previous AEN command\n");
5709 return ret_val;
5710 }
5711 }
5712 }
5713
5714 cmd = megasas_get_cmd(instance);
5715
5716 if (!cmd)
5717 return -ENOMEM;
5718
5719 dcmd = &cmd->frame->dcmd;
5720
5721 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5722
5723 /*
5724 * Prepare DCMD for aen registration
5725 */
5726 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5727
5728 dcmd->cmd = MFI_CMD_DCMD;
5729 dcmd->cmd_status = 0x0;
5730 dcmd->sge_count = 1;
94cd65dd 5731 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5732 dcmd->timeout = 0;
780a3762 5733 dcmd->pad_0 = 0;
94cd65dd
SS		 5734 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5735 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5736 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5737 instance->last_seq_num = seq_num;
94cd65dd
SS		 5738 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5739 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5740 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5741
f4c9a131
YB		 5742 if (instance->aen_cmd != NULL) {
5743 megasas_return_cmd(instance, cmd);
5744 return 0;
5745 }
5746
c4a3e0a5
BS		 5747 /*
5748 * Store reference to the cmd used to register for AEN. When an
5749 * application wants us to register for AEN, we have to abort this
5750 * cmd and re-register with a new EVENT LOCALE supplied by that app
5751 */
5752 instance->aen_cmd = cmd;
5753
5754 /*
5755 * Issue the aen registration frame
5756 */
9c915a8c 5757 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5758
5759 return 0;
5760}
5761
96188a89
S		 5762/* megasas_get_target_prop - Send DCMD with below details to firmware.
5763 *
5764 * This DCMD will fetch few properties of LD/system PD defined
5765 * in MR_TARGET_DEV_PROPERTIES. eg. Queue Depth, MDTS value.
5766 *
5767 * DCMD send by drivers whenever new target is added to the OS.
5768 *
5769 * dcmd.opcode - MR_DCMD_DEV_GET_TARGET_PROP
5770 * dcmd.mbox.b[0] - DCMD is to be fired for LD or system PD.
5771 * 0 = system PD, 1 = LD.
5772 * dcmd.mbox.s[1] - TargetID for LD/system PD.
5773 * dcmd.sge IN - Pointer to return MR_TARGET_DEV_PROPERTIES.
5774 *
5775 * @instance: Adapter soft state
5776 * @sdev: OS provided scsi device
5777 *
5778 * Returns 0 on success non-zero on failure.
5779 */
5780static int
5781megasas_get_target_prop(struct megasas_instance *instance,
5782 struct scsi_device *sdev)
5783{
5784 int ret;
5785 struct megasas_cmd *cmd;
5786 struct megasas_dcmd_frame *dcmd;
5787 u16 targetId = (sdev->channel % 2) + sdev->id;
5788
5789 cmd = megasas_get_cmd(instance);
5790
5791 if (!cmd) {
5792 dev_err(&instance->pdev->dev,
5793 "Failed to get cmd %s\n", __func__);
5794 return -ENOMEM;
5795 }
5796
5797 dcmd = &cmd->frame->dcmd;
5798
5799 memset(instance->tgt_prop, 0, sizeof(*instance->tgt_prop));
5800 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5801 dcmd->mbox.b[0] = MEGASAS_IS_LOGICAL(sdev);
5802
5803 dcmd->mbox.s[1] = cpu_to_le16(targetId);
5804 dcmd->cmd = MFI_CMD_DCMD;
5805 dcmd->cmd_status = 0xFF;
5806 dcmd->sge_count = 1;
5807 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
5808 dcmd->timeout = 0;
5809 dcmd->pad_0 = 0;
5810 dcmd->data_xfer_len =
5811 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5812 dcmd->opcode = cpu_to_le32(MR_DCMD_DRV_GET_TARGET_PROP);
5813 dcmd->sgl.sge32[0].phys_addr =
5814 cpu_to_le32(instance->tgt_prop_h);
5815 dcmd->sgl.sge32[0].length =
5816 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5817
e7d36b88
S		 5818 if ((instance->adapter_type != MFI_SERIES) &&
5819 !instance->mask_interrupts)
96188a89
S		 5820 ret = megasas_issue_blocked_cmd(instance,
5821 cmd, MFI_IO_TIMEOUT_SECS);
5822 else
5823 ret = megasas_issue_polled(instance, cmd);
5824
5825 switch (ret) {
5826 case DCMD_TIMEOUT:
5827 switch (dcmd_timeout_ocr_possible(instance)) {
5828 case INITIATE_OCR:
5829 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
5830 megasas_reset_fusion(instance->host,
5831 MFI_IO_TIMEOUT_OCR);
5832 break;
5833 case KILL_ADAPTER:
5834 megaraid_sas_kill_hba(instance);
5835 break;
5836 case IGNORE_TIMEOUT:
5837 dev_info(&instance->pdev->dev,
5838 "Ignore DCMD timeout: %s %d\n",
5839 __func__, __LINE__);
5840 break;
5841 }
5842 break;
5843
5844 default:
5845 megasas_return_cmd(instance, cmd);
5846 }
5847 if (ret != DCMD_SUCCESS)
5848 dev_err(&instance->pdev->dev,
5849 "return from %s %d return value %d\n",
5850 __func__, __LINE__, ret);
5851
5852 return ret;
5853}
5854
c4a3e0a5
BS		 5855/**
5856 * megasas_start_aen - Subscribes to AEN during driver load time
5857 * @instance: Adapter soft state
5858 */
5859static int megasas_start_aen(struct megasas_instance *instance)
5860{
5861 struct megasas_evt_log_info eli;
5862 union megasas_evt_class_locale class_locale;
5863
5864 /*
5865 * Get the latest sequence number from FW
5866 */
5867 memset(&eli, 0, sizeof(eli));
5868
5869 if (megasas_get_seq_num(instance, &eli))
5870 return -1;
5871
5872 /*
5873 * Register AEN with FW for latest sequence number plus 1
5874 */
5875 class_locale.members.reserved = 0;
5876 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5877 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5878
94cd65dd 5879 return megasas_register_aen(instance,
48100b0e 5880 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5881 class_locale.word);
c4a3e0a5
BS		 5882}
5883
5884/**
5885 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5886 * @instance: Adapter soft state
5887 */
5888static int megasas_io_attach(struct megasas_instance *instance)
5889{
5890 struct Scsi_Host *host = instance->host;
5891
5892 /*
5893 * Export parameters required by SCSI mid-layer
5894 */
c4a3e0a5 5895 host->unique_id = instance->unique_id;
ae09a6c1 5896 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5897 host->this_id = instance->init_id;
5898 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5899
5900 if (instance->fw_support_ieee)
5901 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5902
1fd10685
YB		 5903 /*
5904 * Check if the module parameter value for max_sectors can be used
5905 */
5906 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5907 instance->max_sectors_per_req = max_sectors;
5908 else {
5909 if (max_sectors) {
5910 if (((instance->pdev->device ==
5911 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5912 (instance->pdev->device ==
5913 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5914 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5915 instance->max_sectors_per_req = max_sectors;
5916 } else {
1be18254 5917 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5918 "and <= %d (or < 1MB for GEN2 controller)\n",
5919 instance->max_sectors_per_req);
5920 }
5921 }
5922 }
5923
c4a3e0a5 5924 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5925 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5926 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5927 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5928 host->max_lun = MEGASAS_MAX_LUN;
122da302 5929 host->max_cmd_len = 16;
c4a3e0a5
BS		 5930
5931 /*
5932 * Notify the mid-layer about the new controller
5933 */
5934 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5935 dev_err(&instance->pdev->dev,
5936 "Failed to add host from %s %d\n",
5937 __func__, __LINE__);
c4a3e0a5
BS		 5938 return -ENODEV;
5939 }
5940
c4a3e0a5
BS		 5941 return 0;
5942}
5943
31ea7088 5944static int
5945megasas_set_dma_mask(struct pci_dev *pdev)
5946{
5947 /*
da0dc9fb 5948 * All our controllers are capable of performing 64-bit DMA
31ea7088 5949 */
5950 if (IS_DMA64) {
6a35528a 5951 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5952
284901a9 5953 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5954 goto fail_set_dma_mask;
5955 }
5956 } else {
284901a9 5957 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5958 goto fail_set_dma_mask;
5959 }
46de63e2
SS		 5960 /*
5961 * Ensure that all data structures are allocated in 32-bit
5962 * memory.
5963 */
5964 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5965 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5966 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5967 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5968 dev_info(&pdev->dev, "set 32bit DMA mask"
5969 "and 32 bit consistent mask\n");
5970 else
5971 goto fail_set_dma_mask;
5972 }
94cd65dd 5973
31ea7088 5974 return 0;
5975
5976fail_set_dma_mask:
5977 return 1;
5978}
5979
c365178f
S		 5980/*
5981 * megasas_set_adapter_type - Set adapter type.
5982 * Supported controllers can be divided in
5983 * 4 categories- enum MR_ADAPTER_TYPE {
5984 * MFI_SERIES = 1,
5985 * THUNDERBOLT_SERIES = 2,
5986 * INVADER_SERIES = 3,
5987 * VENTURA_SERIES = 4,
5988 * };
5989 * @instance: Adapter soft state
5990 * return: void
5991 */
5992static inline void megasas_set_adapter_type(struct megasas_instance *instance)
5993{
754f1bae
S		 5994 if ((instance->pdev->vendor == PCI_VENDOR_ID_DELL) &&
5995 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5)) {
c365178f 5996 instance->adapter_type = MFI_SERIES;
754f1bae
S		 5997 } else {
5998 switch (instance->pdev->device) {
5999 case PCI_DEVICE_ID_LSI_VENTURA:
6000 case PCI_DEVICE_ID_LSI_CRUSADER:
6001 case PCI_DEVICE_ID_LSI_HARPOON:
6002 case PCI_DEVICE_ID_LSI_TOMCAT:
6003 case PCI_DEVICE_ID_LSI_VENTURA_4PORT:
6004 case PCI_DEVICE_ID_LSI_CRUSADER_4PORT:
6005 instance->adapter_type = VENTURA_SERIES;
6006 break;
6007 case PCI_DEVICE_ID_LSI_FUSION:
6008 case PCI_DEVICE_ID_LSI_PLASMA:
6009 instance->adapter_type = THUNDERBOLT_SERIES;
6010 break;
6011 case PCI_DEVICE_ID_LSI_INVADER:
6012 case PCI_DEVICE_ID_LSI_INTRUDER:
6013 case PCI_DEVICE_ID_LSI_INTRUDER_24:
6014 case PCI_DEVICE_ID_LSI_CUTLASS_52:
6015 case PCI_DEVICE_ID_LSI_CUTLASS_53:
6016 case PCI_DEVICE_ID_LSI_FURY:
6017 instance->adapter_type = INVADER_SERIES;
6018 break;
6019 default: /* For all other supported controllers */
6020 instance->adapter_type = MFI_SERIES;
6021 break;
6022 }
c365178f
S		 6023 }
6024}
6025
49a7a4ad
S		 6026static inline int megasas_alloc_mfi_ctrl_mem(struct megasas_instance *instance)
6027{
6028 instance->producer = pci_alloc_consistent(instance->pdev, sizeof(u32),
6029 &instance->producer_h);
6030 instance->consumer = pci_alloc_consistent(instance->pdev, sizeof(u32),
6031 &instance->consumer_h);
6032
6033 if (!instance->producer || !instance->consumer) {
6034 dev_err(&instance->pdev->dev,
6035 "Failed to allocate memory for producer, consumer\n");
6036 return -1;
6037 }
6038
6039 *instance->producer = 0;
6040 *instance->consumer = 0;
6041 return 0;
6042}
6043
6044/**
6045 * megasas_alloc_ctrl_mem - Allocate per controller memory for core data
6046 * structures which are not common across MFI
6047 * adapters and fusion adapters.
6048 * For MFI based adapters, allocate producer and
6049 * consumer buffers. For fusion adapters, allocate
6050 * memory for fusion context.
6051 * @instance: Adapter soft state
6052 * return: 0 for SUCCESS
6053 */
6054static int megasas_alloc_ctrl_mem(struct megasas_instance *instance)
6055{
6056 switch (instance->adapter_type) {
6057 case MFI_SERIES:
6058 if (megasas_alloc_mfi_ctrl_mem(instance))
6059 return -ENOMEM;
6060 break;
6061 case VENTURA_SERIES:
6062 case THUNDERBOLT_SERIES:
6063 case INVADER_SERIES:
6064 if (megasas_alloc_fusion_context(instance))
6065 return -ENOMEM;
6066 break;
6067 }
6068
6069 return 0;
6070}
6071
6072/*
6073 * megasas_free_ctrl_mem - Free fusion context for fusion adapters and
6074 * producer, consumer buffers for MFI adapters
6075 *
6076 * @instance - Adapter soft instance
6077 *
6078 */
6079static inline void megasas_free_ctrl_mem(struct megasas_instance *instance)
6080{
6081 if (instance->adapter_type == MFI_SERIES) {
6082 if (instance->producer)
6083 pci_free_consistent(instance->pdev, sizeof(u32),
6084 instance->producer,
6085 instance->producer_h);
6086 if (instance->consumer)
6087 pci_free_consistent(instance->pdev, sizeof(u32),
6088 instance->consumer,
6089 instance->consumer_h);
6090 } else {
6091 megasas_free_fusion_context(instance);
6092 }
6093}
6094
1b4bed20
S		 6095/**
6096 * megasas_alloc_ctrl_dma_buffers - Allocate consistent DMA buffers during
6097 * driver load time
6098 *
6099 * @instance- Adapter soft instance
6100 * @return- O for SUCCESS
6101 */
6102static inline
6103int megasas_alloc_ctrl_dma_buffers(struct megasas_instance *instance)
6104{
6105 struct pci_dev *pdev = instance->pdev;
6106
6107 instance->evt_detail =
6108 pci_alloc_consistent(pdev,
6109 sizeof(struct megasas_evt_detail),
6110 &instance->evt_detail_h);
6111
6112 if (!instance->evt_detail) {
6113 dev_err(&instance->pdev->dev,
6114 "Failed to allocate event detail buffer\n");
6115 return -ENOMEM;
6116 }
6117
6118 if (!reset_devices) {
6119 instance->system_info_buf =
6120 pci_alloc_consistent(pdev,
6121 sizeof(struct MR_DRV_SYSTEM_INFO),
6122 &instance->system_info_h);
6123 instance->pd_info =
6124 pci_alloc_consistent(pdev,
6125 sizeof(struct MR_PD_INFO),
6126 &instance->pd_info_h);
6127 instance->tgt_prop =
6128 pci_alloc_consistent(pdev,
6129 sizeof(struct MR_TARGET_PROPERTIES),
6130 &instance->tgt_prop_h);
6131 instance->crash_dump_buf =
6132 pci_alloc_consistent(pdev,
6133 CRASH_DMA_BUF_SIZE,
6134 &instance->crash_dump_h);
6135
6136 if (!instance->system_info_buf)
6137 dev_err(&instance->pdev->dev,
6138 "Failed to allocate system info buffer\n");
6139
6140 if (!instance->pd_info)
6141 dev_err(&instance->pdev->dev,
6142 "Failed to allocate pd_info buffer\n");
6143
6144 if (!instance->tgt_prop)
6145 dev_err(&instance->pdev->dev,
6146 "Failed to allocate tgt_prop buffer\n");
6147
6148 if (!instance->crash_dump_buf)
6149 dev_err(&instance->pdev->dev,
6150 "Failed to allocate crash dump buffer\n");
6151 }
6152
6153 return 0;
6154}
6155
6156/*
6157 * megasas_free_ctrl_dma_buffers - Free consistent DMA buffers allocated
6158 * during driver load time
6159 *
6160 * @instance- Adapter soft instance
6161 *
6162 */
6163static inline
6164void megasas_free_ctrl_dma_buffers(struct megasas_instance *instance)
6165{
6166 struct pci_dev *pdev = instance->pdev;
6167
6168 if (instance->evt_detail)
6169 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6170 instance->evt_detail,
6171 instance->evt_detail_h);
6172
6173 if (instance->system_info_buf)
6174 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6175 instance->system_info_buf,
6176 instance->system_info_h);
6177
6178 if (instance->pd_info)
6179 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6180 instance->pd_info, instance->pd_info_h);
6181
6182 if (instance->tgt_prop)
6183 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6184 instance->tgt_prop, instance->tgt_prop_h);
6185
6186 if (instance->crash_dump_buf)
6187 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6188 instance->crash_dump_buf,
6189 instance->crash_dump_h);
6190}
6191
c4a3e0a5
BS		 6192/**
6193 * megasas_probe_one - PCI hotplug entry point
6194 * @pdev: PCI device structure
0d49016b 6195 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 6196 */
6f039790
GKH		 6197static int megasas_probe_one(struct pci_dev *pdev,
6198 const struct pci_device_id *id)
c4a3e0a5 6199{
d3557fc8 6200 int rval, pos;
c4a3e0a5
BS		 6201 struct Scsi_Host *host;
6202 struct megasas_instance *instance;
66192dfe
AR		 6203 u16 control = 0;
6204
6205 /* Reset MSI-X in the kdump kernel */
6206 if (reset_devices) {
6207 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
6208 if (pos) {
99369065 6209 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6210 &control);
6211 if (control & PCI_MSIX_FLAGS_ENABLE) {
6212 dev_info(&pdev->dev, "resetting MSI-X\n");
6213 pci_write_config_word(pdev,
99369065 6214 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6215 control &
6216 ~PCI_MSIX_FLAGS_ENABLE);
6217 }
6218 }
6219 }
c4a3e0a5 6220
c4a3e0a5
BS		 6221 /*
6222 * PCI prepping: enable device set bus mastering and dma mask
6223 */
aeab3fd7 6224 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 6225
6226 if (rval) {
6227 return rval;
6228 }
6229
6230 pci_set_master(pdev);
6231
31ea7088 6232 if (megasas_set_dma_mask(pdev))
6233 goto fail_set_dma_mask;
c4a3e0a5
BS		 6234
6235 host = scsi_host_alloc(&megasas_template,
6236 sizeof(struct megasas_instance));
6237
6238 if (!host) {
1be18254 6239 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 6240 goto fail_alloc_instance;
6241 }
6242
6243 instance = (struct megasas_instance *)host->hostdata;
6244 memset(instance, 0, sizeof(*instance));
da0dc9fb 6245 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 6246 instance->pdev = pdev;
c4a3e0a5 6247
c365178f 6248 megasas_set_adapter_type(instance);
9c915a8c 6249
49a7a4ad
S		 6250 if (megasas_alloc_ctrl_mem(instance))
6251 goto fail_alloc_dma_buf;
c4a3e0a5 6252
1b4bed20
S		 6253 if (megasas_alloc_ctrl_dma_buffers(instance))
6254 goto fail_alloc_dma_buf;
6255
fc62b3fc
SS		 6256 /* Crash dump feature related initialisation*/
6257 instance->drv_buf_index = 0;
6258 instance->drv_buf_alloc = 0;
6259 instance->crash_dump_fw_support = 0;
6260 instance->crash_dump_app_support = 0;
6261 instance->fw_crash_state = UNAVAILABLE;
6262 spin_lock_init(&instance->crashdump_lock);
6263 instance->crash_dump_buf = NULL;
6264
c3518837 6265 megasas_poll_wait_aen = 0;
f4c9a131 6266 instance->flag_ieee = 0;
7e8a75f4 6267 instance->ev = NULL;
39a98554 6268 instance->issuepend_done = 1;
8a01a41d 6269 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
404a8a1a 6270 instance->is_imr = 0;
c4a3e0a5 6271
c4a3e0a5
BS		 6272 /*
6273 * Initialize locks and queues
6274 */
6275 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 6276 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 6277
e4a082c7
SP		 6278 atomic_set(&instance->fw_outstanding,0);
6279
c4a3e0a5
BS		 6280 init_waitqueue_head(&instance->int_cmd_wait_q);
6281 init_waitqueue_head(&instance->abort_cmd_wait_q);
6282
90dc9d98 6283 spin_lock_init(&instance->mfi_pool_lock);
39a98554 6284 spin_lock_init(&instance->hba_lock);
fdd84e25 6285 spin_lock_init(&instance->stream_lock);
7343eb65 6286 spin_lock_init(&instance->completion_lock);
c4a3e0a5 6287
9c915a8c 6288 mutex_init(&instance->reset_mutex);
2216c305 6289 mutex_init(&instance->hba_mutex);
c4a3e0a5
BS		 6290
6291 /*
6292 * Initialize PCI related and misc parameters
6293 */
c4a3e0a5
BS		 6294 instance->host = host;
6295 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
6296 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 6297 instance->ctrl_info = NULL;
c4a3e0a5 6298
ae09a6c1 6299
7bebf5c7 6300 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 6301 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 6302 instance->flag_ieee = 1;
7bebf5c7 6303
658dcedb 6304 megasas_dbg_lvl = 0;
05e9ebbe 6305 instance->flag = 0;
0c79e681 6306 instance->unload = 1;
05e9ebbe 6307 instance->last_time = 0;
39a98554 6308 instance->disableOnlineCtrlReset = 1;
bc93d425 6309 instance->UnevenSpanSupport = 0;
39a98554 6310
e7d36b88 6311 if (instance->adapter_type != MFI_SERIES) {
9c915a8c 6312 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 6313 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
6314 } else
9c915a8c 6315 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 6316
0a77066a
AR		 6317 /*
6318 * Initialize MFI Firmware
6319 */
6320 if (megasas_init_fw(instance))
6321 goto fail_init_mfi;
6322
229fe47c
AR		 6323 if (instance->requestorId) {
6324 if (instance->PlasmaFW111) {
6325 instance->vf_affiliation_111 =
6326 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
6327 &instance->vf_affiliation_111_h);
6328 if (!instance->vf_affiliation_111)
1be18254 6329 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6330 "memory for VF affiliation buffer\n");
6331 } else {
6332 instance->vf_affiliation =
6333 pci_alloc_consistent(pdev,
6334 (MAX_LOGICAL_DRIVES + 1) *
6335 sizeof(struct MR_LD_VF_AFFILIATION),
6336 &instance->vf_affiliation_h);
6337 if (!instance->vf_affiliation)
1be18254 6338 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6339 "memory for VF affiliation buffer\n");
6340 }
6341 }
6342
c4a3e0a5
BS		 6343 /*
6344 * Store instance in PCI softstate
6345 */
6346 pci_set_drvdata(pdev, instance);
6347
6348 /*
6349 * Add this controller to megasas_mgmt_info structure so that it
6350 * can be exported to management applications
6351 */
6352 megasas_mgmt_info.count++;
6353 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
6354 megasas_mgmt_info.max_index++;
6355
541f90b7
AR		 6356 /*
6357 * Register with SCSI mid-layer
6358 */
6359 if (megasas_io_attach(instance))
6360 goto fail_io_attach;
6361
6362 instance->unload = 0;
aa00832b
SS		 6363 /*
6364 * Trigger SCSI to scan our drives
6365 */
6366 scsi_scan_host(host);
541f90b7 6367
c4a3e0a5
BS		 6368 /*
6369 * Initiate AEN (Asynchronous Event Notification)
6370 */
6371 if (megasas_start_aen(instance)) {
1be18254 6372 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 6373 goto fail_start_aen;
6374 }
6375
9ea81f81
AR		 6376 /* Get current SR-IOV LD/VF affiliation */
6377 if (instance->requestorId)
6378 megasas_get_ld_vf_affiliation(instance, 1);
6379
c4a3e0a5
BS		 6380 return 0;
6381
da0dc9fb
BH		 6382fail_start_aen:
6383fail_io_attach:
c4a3e0a5 6384 megasas_mgmt_info.count--;
c4a3e0a5 6385 megasas_mgmt_info.max_index--;
61f0c3c7 6386 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
c4a3e0a5 6387
d46a3ad6 6388 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6389 megasas_destroy_irqs(instance);
6390
e7d36b88 6391 if (instance->adapter_type != MFI_SERIES)
eb1b1237
AR		 6392 megasas_release_fusion(instance);
6393 else
6394 megasas_release_mfi(instance);
c8e858fe 6395 if (instance->msix_vectors)
fad119b7 6396 pci_free_irq_vectors(instance->pdev);
d3557fc8 6397fail_init_mfi:
da0dc9fb 6398fail_alloc_dma_buf:
1b4bed20 6399 megasas_free_ctrl_dma_buffers(instance);
49a7a4ad 6400 megasas_free_ctrl_mem(instance);
c4a3e0a5
BS		 6401 scsi_host_put(host);
6402
da0dc9fb
BH		 6403fail_alloc_instance:
6404fail_set_dma_mask:
c4a3e0a5
BS		 6405 pci_disable_device(pdev);
6406
6407 return -ENODEV;
6408}
6409
6410/**
6411 * megasas_flush_cache - Requests FW to flush all its caches
6412 * @instance: Adapter soft state
6413 */
6414static void megasas_flush_cache(struct megasas_instance *instance)
6415{
6416 struct megasas_cmd *cmd;
6417 struct megasas_dcmd_frame *dcmd;
6418
8a01a41d 6419 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6420 return;
6421
c4a3e0a5
BS		 6422 cmd = megasas_get_cmd(instance);
6423
6424 if (!cmd)
6425 return;
6426
6427 dcmd = &cmd->frame->dcmd;
6428
6429 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6430
6431 dcmd->cmd = MFI_CMD_DCMD;
6432 dcmd->cmd_status = 0x0;
6433 dcmd->sge_count = 0;
94cd65dd 6434 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6435 dcmd->timeout = 0;
780a3762 6436 dcmd->pad_0 = 0;
c4a3e0a5 6437 dcmd->data_xfer_len = 0;
94cd65dd 6438 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 6439 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
6440
6d40afbc
SS		 6441 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6442 != DCMD_SUCCESS) {
6443 dev_err(&instance->pdev->dev,
6444 "return from %s %d\n", __func__, __LINE__);
6445 return;
6446 }
c4a3e0a5 6447
4026e9aa 6448 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6449}
6450
6451/**
6452 * megasas_shutdown_controller - Instructs FW to shutdown the controller
6453 * @instance: Adapter soft state
31ea7088 6454 * @opcode: Shutdown/Hibernate
c4a3e0a5 6455 */
31ea7088 6456static void megasas_shutdown_controller(struct megasas_instance *instance,
6457 u32 opcode)
c4a3e0a5
BS		 6458{
6459 struct megasas_cmd *cmd;
6460 struct megasas_dcmd_frame *dcmd;
6461
8a01a41d 6462 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6463 return;
6464
c4a3e0a5
BS		 6465 cmd = megasas_get_cmd(instance);
6466
6467 if (!cmd)
6468 return;
6469
6470 if (instance->aen_cmd)
cfbe7554 6471 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6472 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c
AR		 6473 if (instance->map_update_cmd)
6474 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6475 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6476 if (instance->jbod_seq_cmd)
6477 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6478 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6479
c4a3e0a5
BS		 6480 dcmd = &cmd->frame->dcmd;
6481
6482 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6483
6484 dcmd->cmd = MFI_CMD_DCMD;
6485 dcmd->cmd_status = 0x0;
6486 dcmd->sge_count = 0;
94cd65dd 6487 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6488 dcmd->timeout = 0;
780a3762 6489 dcmd->pad_0 = 0;
c4a3e0a5 6490 dcmd->data_xfer_len = 0;
94cd65dd 6491 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6492
6d40afbc
SS		 6493 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6494 != DCMD_SUCCESS) {
6495 dev_err(&instance->pdev->dev,
6496 "return from %s %d\n", __func__, __LINE__);
6497 return;
6498 }
c4a3e0a5 6499
4026e9aa 6500 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6501}
6502
33139b21 6503#ifdef CONFIG_PM
31ea7088 6504/**
ad84db2e 6505 * megasas_suspend - driver suspend entry point
6506 * @pdev: PCI device structure
31ea7088 6507 * @state: PCI power state to suspend routine
6508 */
33139b21 6509static int
31ea7088 6510megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6511{
6512 struct Scsi_Host *host;
6513 struct megasas_instance *instance;
6514
6515 instance = pci_get_drvdata(pdev);
6516 host = instance->host;
0c79e681 6517 instance->unload = 1;
31ea7088 6518
229fe47c
AR		 6519 /* Shutdown SR-IOV heartbeat timer */
6520 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6521 del_timer_sync(&instance->sriov_heartbeat_timer);
6522
31ea7088 6523 megasas_flush_cache(instance);
6524 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 6525
6526 /* cancel the delayed work if this work still in queue */
6527 if (instance->ev != NULL) {
6528 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6529 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6530 instance->ev = NULL;
6531 }
6532
31ea7088 6533 tasklet_kill(&instance->isr_tasklet);
6534
6535 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6536 instance->instancet->disable_intr(instance);
c8e858fe 6537
d3557fc8
SS		 6538 megasas_destroy_irqs(instance);
6539
c8e858fe 6540 if (instance->msix_vectors)
fad119b7 6541 pci_free_irq_vectors(instance->pdev);
31ea7088 6542
6543 pci_save_state(pdev);
6544 pci_disable_device(pdev);
6545
6546 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6547
6548 return 0;
6549}
6550
6551/**
6552 * megasas_resume- driver resume entry point
6553 * @pdev: PCI device structure
6554 */
33139b21 6555static int
31ea7088 6556megasas_resume(struct pci_dev *pdev)
6557{
d3557fc8 6558 int rval;
31ea7088 6559 struct Scsi_Host *host;
6560 struct megasas_instance *instance;
fad119b7 6561 int irq_flags = PCI_IRQ_LEGACY;
31ea7088 6562
6563 instance = pci_get_drvdata(pdev);
6564 host = instance->host;
6565 pci_set_power_state(pdev, PCI_D0);
6566 pci_enable_wake(pdev, PCI_D0, 0);
6567 pci_restore_state(pdev);
6568
6569 /*
6570 * PCI prepping: enable device set bus mastering and dma mask
6571 */
aeab3fd7 6572 rval = pci_enable_device_mem(pdev);
31ea7088 6573
6574 if (rval) {
1be18254 6575 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6576 return rval;
6577 }
6578
6579 pci_set_master(pdev);
6580
6581 if (megasas_set_dma_mask(pdev))
6582 goto fail_set_dma_mask;
6583
6584 /*
6585 * Initialize MFI Firmware
6586 */
6587
31ea7088 6588 atomic_set(&instance->fw_outstanding, 0);
6589
6590 /*
6591 * We expect the FW state to be READY
6592 */
058a8fac 6593 if (megasas_transition_to_ready(instance, 0))
31ea7088 6594 goto fail_ready_state;
6595
3f1abce4 6596 /* Now re-enable MSI-X */
fad119b7
HR		 6597 if (instance->msix_vectors) {
6598 irq_flags = PCI_IRQ_MSIX;
6599 if (smp_affinity_enable)
6600 irq_flags |= PCI_IRQ_AFFINITY;
6601 }
6602 rval = pci_alloc_irq_vectors(instance->pdev, 1,
6603 instance->msix_vectors ?
6604 instance->msix_vectors : 1, irq_flags);
6605 if (rval < 0)
dd088128 6606 goto fail_reenable_msix;
3f1abce4 6607
e7d36b88 6608 if (instance->adapter_type != MFI_SERIES) {
9c915a8c
AR		 6609 megasas_reset_reply_desc(instance);
6610 if (megasas_ioc_init_fusion(instance)) {
6611 megasas_free_cmds(instance);
6612 megasas_free_cmds_fusion(instance);
6613 goto fail_init_mfi;
6614 }
6615 if (!megasas_get_map_info(instance))
6616 megasas_sync_map_info(instance);
5a8cb85b 6617 } else {
9c915a8c
AR		 6618 *instance->producer = 0;
6619 *instance->consumer = 0;
6620 if (megasas_issue_init_mfi(instance))
6621 goto fail_init_mfi;
9c915a8c 6622 }
31ea7088 6623
9c915a8c
AR		 6624 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6625 (unsigned long)instance);
31ea7088 6626
d3557fc8
SS		 6627 if (instance->msix_vectors ?
6628 megasas_setup_irqs_msix(instance, 0) :
6629 megasas_setup_irqs_ioapic(instance))
6630 goto fail_init_mfi;
31ea7088 6631
229fe47c
AR		 6632 /* Re-launch SR-IOV heartbeat timer */
6633 if (instance->requestorId) {
6634 if (!megasas_sriov_start_heartbeat(instance, 0))
6635 megasas_start_timer(instance,
6636 &instance->sriov_heartbeat_timer,
6637 megasas_sriov_heartbeat_handler,
6638 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 6639 else {
229fe47c 6640 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 6641 goto fail_init_mfi;
6642 }
229fe47c
AR		 6643 }
6644
d46a3ad6 6645 instance->instancet->enable_intr(instance);
3761cb4c 6646 megasas_setup_jbod_map(instance);
0c79e681
YB		 6647 instance->unload = 0;
6648
541f90b7
AR		 6649 /*
6650 * Initiate AEN (Asynchronous Event Notification)
6651 */
6652 if (megasas_start_aen(instance))
1be18254 6653 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6654
31ea7088 6655 return 0;
6656
31ea7088 6657fail_init_mfi:
1b4bed20 6658 megasas_free_ctrl_dma_buffers(instance);
49a7a4ad 6659 megasas_free_ctrl_mem(instance);
31ea7088 6660 scsi_host_put(host);
6661
6662fail_set_dma_mask:
6663fail_ready_state:
dd088128 6664fail_reenable_msix:
31ea7088 6665
6666 pci_disable_device(pdev);
6667
6668 return -ENODEV;
6669}
33139b21
JS		 6670#else
6671#define megasas_suspend NULL
6672#define megasas_resume NULL
6673#endif
31ea7088 6674
a1dfd62c
KD		 6675static inline int
6676megasas_wait_for_adapter_operational(struct megasas_instance *instance)
6677{
6678 int wait_time = MEGASAS_RESET_WAIT_TIME * 2;
6679 int i;
6680
6681 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
6682 return 1;
6683
6684 for (i = 0; i < wait_time; i++) {
6685 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
6686 break;
6687
6688 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL))
6689 dev_notice(&instance->pdev->dev, "waiting for controller reset to finish\n");
6690
6691 msleep(1000);
6692 }
6693
6694 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
6695 dev_info(&instance->pdev->dev, "%s timed out while waiting for HBA to recover.\n",
6696 __func__);
6697 return 1;
6698 }
6699
6700 return 0;
6701}
6702
c4a3e0a5
BS		 6703/**
6704 * megasas_detach_one - PCI hot"un"plug entry point
6705 * @pdev: PCI device structure
6706 */
6f039790 6707static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 6708{
6709 int i;
6710 struct Scsi_Host *host;
6711 struct megasas_instance *instance;
9c915a8c 6712 struct fusion_context *fusion;
3761cb4c 6713 u32 pd_seq_map_sz;
c4a3e0a5
BS		 6714
6715 instance = pci_get_drvdata(pdev);
c3518837 6716 instance->unload = 1;
c4a3e0a5 6717 host = instance->host;
9c915a8c 6718 fusion = instance->ctrl_context;
c4a3e0a5 6719
229fe47c
AR		 6720 /* Shutdown SR-IOV heartbeat timer */
6721 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6722 del_timer_sync(&instance->sriov_heartbeat_timer);
6723
fc62b3fc
SS		 6724 if (instance->fw_crash_state != UNAVAILABLE)
6725 megasas_free_host_crash_buffer(instance);
c4a3e0a5 6726 scsi_remove_host(instance->host);
a1dfd62c
KD		 6727
6728 if (megasas_wait_for_adapter_operational(instance))
6729 goto skip_firing_dcmds;
6730
c4a3e0a5 6731 megasas_flush_cache(instance);
31ea7088 6732 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4 6733
a1dfd62c 6734skip_firing_dcmds:
7e8a75f4
YB		 6735 /* cancel the delayed work if this work still in queue*/
6736 if (instance->ev != NULL) {
6737 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6738 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6739 instance->ev = NULL;
6740 }
6741
cfbe7554
SS		 6742 /* cancel all wait events */
6743 wake_up_all(&instance->int_cmd_wait_q);
6744
5d018ad0 6745 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 6746
6747 /*
6748 * Take the instance off the instance array. Note that we will not
6749 * decrement the max_index. We let this array be sparse array
6750 */
6751 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6752 if (megasas_mgmt_info.instance[i] == instance) {
6753 megasas_mgmt_info.count--;
6754 megasas_mgmt_info.instance[i] = NULL;
6755
6756 break;
6757 }
6758 }
6759
d46a3ad6 6760 instance->instancet->disable_intr(instance);
c4a3e0a5 6761
d3557fc8
SS		 6762 megasas_destroy_irqs(instance);
6763
c8e858fe 6764 if (instance->msix_vectors)
fad119b7 6765 pci_free_irq_vectors(instance->pdev);
c4a3e0a5 6766
f369a315 6767 if (instance->adapter_type == VENTURA_SERIES) {
fdd84e25
SC		 6768 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i)
6769 kfree(fusion->stream_detect_by_ld[i]);
6770 kfree(fusion->stream_detect_by_ld);
6771 fusion->stream_detect_by_ld = NULL;
6772 }
6773
6774
e7d36b88 6775 if (instance->adapter_type != MFI_SERIES) {
9c915a8c 6776 megasas_release_fusion(instance);
3761cb4c 6777 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6778 (sizeof(struct MR_PD_CFG_SEQ) *
6779 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6780 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 6781 if (fusion->ld_map[i])
6782 dma_free_coherent(&instance->pdev->dev,
51087a86 6783 fusion->max_map_sz,
9c915a8c 6784 fusion->ld_map[i],
51087a86 6785 fusion->ld_map_phys[i]);
def3e8df
S		 6786 if (fusion->ld_drv_map[i]) {
6787 if (is_vmalloc_addr(fusion->ld_drv_map[i]))
6788 vfree(fusion->ld_drv_map[i]);
6789 else
6790 free_pages((ulong)fusion->ld_drv_map[i],
6791 fusion->drv_map_pages);
6792 }
6793
546e559c
ML		 6794 if (fusion->pd_seq_sync[i])
6795 dma_free_coherent(&instance->pdev->dev,
6796 pd_seq_map_sz,
6797 fusion->pd_seq_sync[i],
6798 fusion->pd_seq_phys[i]);
51087a86 6799 }
5a8cb85b 6800 } else {
9c915a8c 6801 megasas_release_mfi(instance);
9c915a8c 6802 }
c4a3e0a5 6803
51087a86
SS		 6804 kfree(instance->ctrl_info);
6805
229fe47c
AR		 6806 if (instance->vf_affiliation)
6807 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6808 sizeof(struct MR_LD_VF_AFFILIATION),
6809 instance->vf_affiliation,
6810 instance->vf_affiliation_h);
6811
6812 if (instance->vf_affiliation_111)
6813 pci_free_consistent(pdev,
6814 sizeof(struct MR_LD_VF_AFFILIATION_111),
6815 instance->vf_affiliation_111,
6816 instance->vf_affiliation_111_h);
6817
6818 if (instance->hb_host_mem)
6819 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6820 instance->hb_host_mem,
6821 instance->hb_host_mem_h);
6822
1b4bed20 6823 megasas_free_ctrl_dma_buffers(instance);
5765c5b8 6824
49a7a4ad
S		 6825 megasas_free_ctrl_mem(instance);
6826
c4a3e0a5
BS		 6827 scsi_host_put(host);
6828
c4a3e0a5 6829 pci_disable_device(pdev);
c4a3e0a5
BS		 6830}
6831
6832/**
6833 * megasas_shutdown - Shutdown entry point
6834 * @device: Generic device structure
6835 */
6836static void megasas_shutdown(struct pci_dev *pdev)
6837{
6838 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6839
0c79e681 6840 instance->unload = 1;
a1dfd62c
KD		 6841
6842 if (megasas_wait_for_adapter_operational(instance))
6843 goto skip_firing_dcmds;
6844
c4a3e0a5 6845 megasas_flush_cache(instance);
530e6fc1 6846 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
a1dfd62c
KD		 6847
6848skip_firing_dcmds:
d46a3ad6 6849 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6850 megasas_destroy_irqs(instance);
6851
c8e858fe 6852 if (instance->msix_vectors)
fad119b7 6853 pci_free_irq_vectors(instance->pdev);
c4a3e0a5
BS		 6854}
6855
6856/**
6857 * megasas_mgmt_open - char node "open" entry point
6858 */
6859static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6860{
6861 /*
6862 * Allow only those users with admin rights
6863 */
6864 if (!capable(CAP_SYS_ADMIN))
6865 return -EACCES;
6866
6867 return 0;
6868}
6869
c4a3e0a5
BS		 6870/**
6871 * megasas_mgmt_fasync - Async notifier registration from applications
6872 *
6873 * This function adds the calling process to a driver global queue. When an
6874 * event occurs, SIGIO will be sent to all processes in this queue.
6875 */
6876static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6877{
6878 int rc;
6879
0b950672 6880 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6881
6882 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6883
0b950672 6884 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6885
6886 if (rc >= 0) {
6887 /* For sanity check when we get ioctl */
6888 filep->private_data = filep;
6889 return 0;
6890 }
6891
6892 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6893
6894 return rc;
6895}
6896
c3518837
YB		 6897/**
6898 * megasas_mgmt_poll - char node "poll" entry point
6899 * */
6900static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6901{
6902 unsigned int mask;
6903 unsigned long flags;
da0dc9fb 6904
c3518837
YB		 6905 poll_wait(file, &megasas_poll_wait, wait);
6906 spin_lock_irqsave(&poll_aen_lock, flags);
6907 if (megasas_poll_wait_aen)
da0dc9fb 6908 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 6909 else
6910 mask = 0;
51087a86 6911 megasas_poll_wait_aen = 0;
c3518837
YB		 6912 spin_unlock_irqrestore(&poll_aen_lock, flags);
6913 return mask;
6914}
6915
fc62b3fc
SS		 6916/*
6917 * megasas_set_crash_dump_params_ioctl:
6918 * Send CRASH_DUMP_MODE DCMD to all controllers
6919 * @cmd: MFI command frame
6920 */
6921
da0dc9fb 6922static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 6923{
6924 struct megasas_instance *local_instance;
6925 int i, error = 0;
6926 int crash_support;
6927
6928 crash_support = cmd->frame->dcmd.mbox.w[0];
6929
6930 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6931 local_instance = megasas_mgmt_info.instance[i];
6932 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 6933 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS		 6934 MEGASAS_HBA_OPERATIONAL) &&
6935 !megasas_set_crash_dump_params(local_instance,
6936 crash_support)) {
6937 local_instance->crash_dump_app_support =
6938 crash_support;
6939 dev_info(&local_instance->pdev->dev,
6940 "Application firmware crash "
6941 "dump mode set success\n");
6942 error = 0;
6943 } else {
6944 dev_info(&local_instance->pdev->dev,
6945 "Application firmware crash "
6946 "dump mode set failed\n");
6947 error = -1;
6948 }
6949 }
6950 }
6951 return error;
6952}
6953
c4a3e0a5
BS		 6954/**
6955 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6956 * @instance: Adapter soft state
6957 * @argp: User's ioctl packet
6958 */
6959static int
6960megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6961 struct megasas_iocpacket __user * user_ioc,
6962 struct megasas_iocpacket *ioc)
6963{
6964 struct megasas_sge32 *kern_sge32;
6965 struct megasas_cmd *cmd;
6966 void *kbuff_arr[MAX_IOCTL_SGE];
6967 dma_addr_t buf_handle = 0;
6968 int error = 0, i;
6969 void *sense = NULL;
6970 dma_addr_t sense_handle;
7b2519af 6971 unsigned long *sense_ptr;
8823abed 6972 u32 opcode;
c4a3e0a5
BS		 6973
6974 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6975
6976 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6977 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 6978 ioc->sge_count, MAX_IOCTL_SGE);
6979 return -EINVAL;
6980 }
6981
6982 cmd = megasas_get_cmd(instance);
6983 if (!cmd) {
1be18254 6984 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 6985 return -ENOMEM;
6986 }
6987
6988 /*
6989 * User's IOCTL packet has 2 frames (maximum). Copy those two
6990 * frames into our cmd's frames. cmd->frame's context will get
6991 * overwritten when we copy from user's frames. So set that value
6992 * alone separately
6993 */
6994 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6995 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6996 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6997 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6998 MFI_FRAME_SGL64 |
6999 MFI_FRAME_SENSE64));
8823abed 7000 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
c4a3e0a5 7001
8823abed 7002 if (opcode == MR_DCMD_CTRL_SHUTDOWN) {
95c06086
S		 7003 if (megasas_get_ctrl_info(instance) != DCMD_SUCCESS) {
7004 megasas_return_cmd(instance, cmd);
7005 return -1;
7006 }
7007 }
7008
8823abed 7009 if (opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
fc62b3fc
SS		 7010 error = megasas_set_crash_dump_params_ioctl(cmd);
7011 megasas_return_cmd(instance, cmd);
7012 return error;
7013 }
7014
c4a3e0a5
BS		 7015 /*
7016 * The management interface between applications and the fw uses
7017 * MFI frames. E.g, RAID configuration changes, LD property changes
7018 * etc are accomplishes through different kinds of MFI frames. The
7019 * driver needs to care only about substituting user buffers with
7020 * kernel buffers in SGLs. The location of SGL is embedded in the
7021 * struct iocpacket itself.
7022 */
7023 kern_sge32 = (struct megasas_sge32 *)
7024 ((unsigned long)cmd->frame + ioc->sgl_off);
7025
7026 /*
7027 * For each user buffer, create a mirror buffer and copy in
7028 */
7029 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 7030 if (!ioc->sgl[i].iov_len)
7031 continue;
7032
9f35fa8a 7033 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 7034 ioc->sgl[i].iov_len,
9f35fa8a 7035 &buf_handle, GFP_KERNEL);
c4a3e0a5 7036 if (!kbuff_arr[i]) {
1be18254
BH		 7037 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
7038 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 7039 error = -ENOMEM;
7040 goto out;
7041 }
7042
7043 /*
7044 * We don't change the dma_coherent_mask, so
7045 * pci_alloc_consistent only returns 32bit addresses
7046 */
94cd65dd
SS		 7047 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
7048 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 7049
7050 /*
7051 * We created a kernel buffer corresponding to the
7052 * user buffer. Now copy in from the user buffer
7053 */
7054 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
7055 (u32) (ioc->sgl[i].iov_len))) {
7056 error = -EFAULT;
7057 goto out;
7058 }
7059 }
7060
7061 if (ioc->sense_len) {
9f35fa8a
SP		 7062 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
7063 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 7064 if (!sense) {
7065 error = -ENOMEM;
7066 goto out;
7067 }
7068
7069 sense_ptr =
7b2519af 7070 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 7071 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 7072 }
7073
7074 /*
7075 * Set the sync_cmd flag so that the ISR knows not to complete this
7076 * cmd to the SCSI mid-layer
7077 */
7078 cmd->sync_cmd = 1;
6d40afbc
SS		 7079 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
7080 cmd->sync_cmd = 0;
7081 dev_err(&instance->pdev->dev,
7082 "return -EBUSY from %s %d opcode 0x%x cmd->cmd_status_drv 0x%x\n",
8823abed 7083 __func__, __LINE__, opcode, cmd->cmd_status_drv);
6d40afbc
SS		 7084 return -EBUSY;
7085 }
7086
c4a3e0a5
BS		 7087 cmd->sync_cmd = 0;
7088
aa00832b
SS		 7089 if (instance->unload == 1) {
7090 dev_info(&instance->pdev->dev, "Driver unload is in progress "
7091 "don't submit data to application\n");
7092 goto out;
7093 }
c4a3e0a5
BS		 7094 /*
7095 * copy out the kernel buffers to user buffers
7096 */
7097 for (i = 0; i < ioc->sge_count; i++) {
7098 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
7099 ioc->sgl[i].iov_len)) {
7100 error = -EFAULT;
7101 goto out;
7102 }
7103 }
7104
7105 /*
7106 * copy out the sense
7107 */
7108 if (ioc->sense_len) {
7109 /*
b70a41e0 7110 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 7111 * sense buffer address
7112 */
7b2519af
YB		 7113 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
7114 ioc->sense_off);
c4a3e0a5 7115
318aaef8
S		 7116 if (copy_to_user((void __user *)((unsigned long)
7117 get_unaligned((unsigned long *)sense_ptr)),
b70a41e0 7118 sense, ioc->sense_len)) {
1be18254 7119 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 7120 "sense data\n");
c4a3e0a5
BS		 7121 error = -EFAULT;
7122 goto out;
7123 }
7124 }
7125
7126 /*
7127 * copy the status codes returned by the fw
7128 */
7129 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
7130 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 7131 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 7132 error = -EFAULT;
7133 }
7134
da0dc9fb 7135out:
c4a3e0a5 7136 if (sense) {
9f35fa8a 7137 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 7138 sense, sense_handle);
7139 }
7140
7a6a731b 7141 for (i = 0; i < ioc->sge_count; i++) {
3deb9438 7142 if (kbuff_arr[i]) {
7a6a731b 7143 dma_free_coherent(&instance->pdev->dev,
94cd65dd 7144 le32_to_cpu(kern_sge32[i].length),
7a6a731b 7145 kbuff_arr[i],
94cd65dd 7146 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 7147 kbuff_arr[i] = NULL;
3deb9438 7148 }
c4a3e0a5
BS		 7149 }
7150
4026e9aa 7151 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 7152 return error;
7153}
7154
c4a3e0a5
BS		 7155static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
7156{
7157 struct megasas_iocpacket __user *user_ioc =
7158 (struct megasas_iocpacket __user *)arg;
7159 struct megasas_iocpacket *ioc;
7160 struct megasas_instance *instance;
7161 int error;
39a98554 7162 int i;
7163 unsigned long flags;
7164 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5 7165
709ab231
ME		 7166 ioc = memdup_user(user_ioc, sizeof(*ioc));
7167 if (IS_ERR(ioc))
7168 return PTR_ERR(ioc);
c4a3e0a5
BS		 7169
7170 instance = megasas_lookup_instance(ioc->host_no);
7171 if (!instance) {
7172 error = -ENODEV;
7173 goto out_kfree_ioc;
7174 }
7175
229fe47c
AR		 7176 /* Adjust ioctl wait time for VF mode */
7177 if (instance->requestorId)
7178 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7179
7180 /* Block ioctls in VF mode */
7181 if (instance->requestorId && !allow_vf_ioctls) {
7182 error = -ENODEV;
7183 goto out_kfree_ioc;
7184 }
7185
8a01a41d 7186 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 7187 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 7188 error = -ENODEV;
7189 goto out_kfree_ioc;
7190 }
7191
7192 if (instance->unload == 1) {
7193 error = -ENODEV;
7194 goto out_kfree_ioc;
7195 }
7196
c4a3e0a5
BS		 7197 if (down_interruptible(&instance->ioctl_sem)) {
7198 error = -ERESTARTSYS;
7199 goto out_kfree_ioc;
7200 }
39a98554 7201
7202 for (i = 0; i < wait_time; i++) {
7203
7204 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7205 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7206 spin_unlock_irqrestore(&instance->hba_lock, flags);
7207 break;
7208 }
7209 spin_unlock_irqrestore(&instance->hba_lock, flags);
7210
7211 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7212 dev_notice(&instance->pdev->dev, "waiting"
39a98554 7213 "for controller reset to finish\n");
7214 }
7215
7216 msleep(1000);
7217 }
7218
7219 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7220 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7221 spin_unlock_irqrestore(&instance->hba_lock, flags);
7222
644da3c3 7223 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7224 error = -ENODEV;
c64e483e 7225 goto out_up;
39a98554 7226 }
7227 spin_unlock_irqrestore(&instance->hba_lock, flags);
7228
c4a3e0a5 7229 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 7230out_up:
c4a3e0a5
BS		 7231 up(&instance->ioctl_sem);
7232
da0dc9fb 7233out_kfree_ioc:
c4a3e0a5
BS		 7234 kfree(ioc);
7235 return error;
7236}
7237
7238static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
7239{
7240 struct megasas_instance *instance;
7241 struct megasas_aen aen;
7242 int error;
39a98554 7243 int i;
7244 unsigned long flags;
7245 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 7246
7247 if (file->private_data != file) {
7248 printk(KERN_DEBUG "megasas: fasync_helper was not "
7249 "called first\n");
7250 return -EINVAL;
7251 }
7252
7253 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
7254 return -EFAULT;
7255
7256 instance = megasas_lookup_instance(aen.host_no);
7257
7258 if (!instance)
7259 return -ENODEV;
7260
8a01a41d 7261 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 7262 return -ENODEV;
0c79e681
YB		 7263 }
7264
7265 if (instance->unload == 1) {
7266 return -ENODEV;
7267 }
7268
39a98554 7269 for (i = 0; i < wait_time; i++) {
7270
7271 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7272 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7273 spin_unlock_irqrestore(&instance->hba_lock,
7274 flags);
7275 break;
7276 }
7277
7278 spin_unlock_irqrestore(&instance->hba_lock, flags);
7279
7280 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7281 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 7282 "controller reset to finish\n");
7283 }
7284
7285 msleep(1000);
7286 }
7287
7288 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7289 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7290 spin_unlock_irqrestore(&instance->hba_lock, flags);
644da3c3 7291 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7292 return -ENODEV;
7293 }
7294 spin_unlock_irqrestore(&instance->hba_lock, flags);
7295
11c71cb4 7296 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS		 7297 error = megasas_register_aen(instance, aen.seq_num,
7298 aen.class_locale_word);
11c71cb4 7299 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS		 7300 return error;
7301}
7302
7303/**
7304 * megasas_mgmt_ioctl - char node ioctl entry point
7305 */
7306static long
7307megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
7308{
7309 switch (cmd) {
7310 case MEGASAS_IOC_FIRMWARE:
7311 return megasas_mgmt_ioctl_fw(file, arg);
7312
7313 case MEGASAS_IOC_GET_AEN:
7314 return megasas_mgmt_ioctl_aen(file, arg);
7315 }
7316
7317 return -ENOTTY;
7318}
7319
7320#ifdef CONFIG_COMPAT
7321static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
7322{
7323 struct compat_megasas_iocpacket __user *cioc =
7324 (struct compat_megasas_iocpacket __user *)arg;
7325 struct megasas_iocpacket __user *ioc =
7326 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
7327 int i;
7328 int error = 0;
b3dc1a21 7329 compat_uptr_t ptr;
323c4a02 7330 u32 local_sense_off;
7331 u32 local_sense_len;
ea1c928b 7332 u32 user_sense_off;
c4a3e0a5 7333
83aabc1b
JG		 7334 if (clear_user(ioc, sizeof(*ioc)))
7335 return -EFAULT;
c4a3e0a5
BS		 7336
7337 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
7338 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
7339 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
7340 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
7341 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
7342 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
7343 return -EFAULT;
7344
b3dc1a21
TH		 7345 /*
7346 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
7347 * sense_len is not null, so prepare the 64bit value under
7348 * the same condition.
7349 */
ea1c928b
SS		 7350 if (get_user(local_sense_off, &ioc->sense_off) ||
7351 get_user(local_sense_len, &ioc->sense_len) ||
7352 get_user(user_sense_off, &cioc->sense_off))
323c4a02 7353 return -EFAULT;
7354
323c4a02 7355 if (local_sense_len) {
b3dc1a21 7356 void __user **sense_ioc_ptr =
ea1c928b 7357 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 7358 compat_uptr_t *sense_cioc_ptr =
ea1c928b 7359 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH		 7360 if (get_user(ptr, sense_cioc_ptr) ||
7361 put_user(compat_ptr(ptr), sense_ioc_ptr))
7362 return -EFAULT;
7363 }
c4a3e0a5 7364
b3dc1a21 7365 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 7366 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
7367 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
7368 copy_in_user(&ioc->sgl[i].iov_len,
7369 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
7370 return -EFAULT;
7371 }
7372
7373 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
7374
7375 if (copy_in_user(&cioc->frame.hdr.cmd_status,
7376 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
7377 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
7378 return -EFAULT;
7379 }
7380 return error;
7381}
7382
7383static long
7384megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
7385 unsigned long arg)
7386{
7387 switch (cmd) {
cb59aa6a
SP		 7388 case MEGASAS_IOC_FIRMWARE32:
7389 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 7390 case MEGASAS_IOC_GET_AEN:
7391 return megasas_mgmt_ioctl_aen(file, arg);
7392 }
7393
7394 return -ENOTTY;
7395}
7396#endif
7397
7398/*
7399 * File operations structure for management interface
7400 */
00977a59 7401static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 7402 .owner = THIS_MODULE,
7403 .open = megasas_mgmt_open,
c4a3e0a5
BS		 7404 .fasync = megasas_mgmt_fasync,
7405 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 7406 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 7407#ifdef CONFIG_COMPAT
7408 .compat_ioctl = megasas_mgmt_compat_ioctl,
7409#endif
6038f373 7410 .llseek = noop_llseek,
c4a3e0a5
BS		 7411};
7412
7413/*
7414 * PCI hotplug support registration structure
7415 */
7416static struct pci_driver megasas_pci_driver = {
7417
7418 .name = "megaraid_sas",
7419 .id_table = megasas_pci_table,
7420 .probe = megasas_probe_one,
6f039790 7421 .remove = megasas_detach_one,
31ea7088 7422 .suspend = megasas_suspend,
7423 .resume = megasas_resume,
c4a3e0a5
BS		 7424 .shutdown = megasas_shutdown,
7425};
7426
7427/*
7428 * Sysfs driver attributes
7429 */
e14a3967 7430static ssize_t version_show(struct device_driver *dd, char *buf)
c4a3e0a5
BS		 7431{
7432 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
7433 MEGASAS_VERSION);
7434}
e14a3967 7435static DRIVER_ATTR_RO(version);
c4a3e0a5 7436
e14a3967 7437static ssize_t release_date_show(struct device_driver *dd, char *buf)
09fced19
SS		 7438{
7439 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
7440 MEGASAS_RELDATE);
7441}
e14a3967 7442static DRIVER_ATTR_RO(release_date);
09fced19 7443
e14a3967 7444static ssize_t support_poll_for_event_show(struct device_driver *dd, char *buf)
72c4fd36
YB		 7445{
7446 return sprintf(buf, "%u\n", support_poll_for_event);
7447}
e14a3967 7448static DRIVER_ATTR_RO(support_poll_for_event);
72c4fd36 7449
e14a3967 7450static ssize_t support_device_change_show(struct device_driver *dd, char *buf)
837f5fe8
YB		 7451{
7452 return sprintf(buf, "%u\n", support_device_change);
7453}
e14a3967 7454static DRIVER_ATTR_RO(support_device_change);
837f5fe8 7455
e14a3967 7456static ssize_t dbg_lvl_show(struct device_driver *dd, char *buf)
658dcedb 7457{
ad84db2e 7458 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 7459}
7460
e14a3967
GKH		 7461static ssize_t dbg_lvl_store(struct device_driver *dd, const char *buf,
7462 size_t count)
658dcedb
SP		 7463{
7464 int retval = count;
da0dc9fb
BH		 7465
7466 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 7467 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
7468 retval = -EINVAL;
7469 }
7470 return retval;
7471}
e14a3967 7472static DRIVER_ATTR_RW(dbg_lvl);
ad84db2e 7473
b4a42213
S		 7474static inline void megasas_remove_scsi_device(struct scsi_device *sdev)
7475{
7476 sdev_printk(KERN_INFO, sdev, "SCSI device is removed\n");
7477 scsi_remove_device(sdev);
7478 scsi_device_put(sdev);
7479}
7480
7e8a75f4
YB		 7481static void
7482megasas_aen_polling(struct work_struct *work)
7483{
7484 struct megasas_aen_event *ev =
c1d390d8 7485 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 7486 struct megasas_instance *instance = ev->instance;
7487 union megasas_evt_class_locale class_locale;
7488 struct Scsi_Host *host;
7489 struct scsi_device *sdev1;
7490 u16 pd_index = 0;
c9786842 7491 u16 ld_index = 0;
7e8a75f4 7492 int i, j, doscan = 0;
229fe47c 7493 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7494 int error;
6d40afbc 7495 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB		 7496
7497 if (!instance) {
7498 printk(KERN_ERR "invalid instance!\n");
7499 kfree(ev);
7500 return;
7501 }
229fe47c
AR		 7502
7503 /* Adjust event workqueue thread wait time for VF mode */
7504 if (instance->requestorId)
7505 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7506
7507 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7508 mutex_lock(&instance->reset_mutex);
229fe47c 7509
7e8a75f4
YB		 7510 instance->ev = NULL;
7511 host = instance->host;
7512 if (instance->evt_detail) {
714f5177 7513 megasas_decode_evt(instance);
7e8a75f4 7514
94cd65dd 7515 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7516
11c71cb4 7517 case MR_EVT_PD_INSERTED:
7e8a75f4 7518 case MR_EVT_PD_REMOVED:
11c71cb4 7519 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7520 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7521 doscan = SCAN_PD_CHANNEL;
c9786842
YB		 7522 break;
7523
7524 case MR_EVT_LD_OFFLINE:
4c598b23 7525 case MR_EVT_CFG_CLEARED:
c9786842 7526 case MR_EVT_LD_DELETED:
c9786842 7527 case MR_EVT_LD_CREATED:
229fe47c 7528 if (!instance->requestorId ||
11c71cb4
SS		 7529 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7530 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7531
6d40afbc 7532 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7533 doscan = SCAN_VD_CHANNEL;
7534
c9786842 7535 break;
11c71cb4 7536
7e8a75f4 7537 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7538 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7539 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS		 7540 dcmd_ret = megasas_get_pd_list(instance);
7541
6d40afbc 7542 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7543 break;
7544
7545 if (!instance->requestorId ||
7546 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7547 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7548
6d40afbc 7549 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7550 break;
7551
7552 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7553 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7554 instance->host->host_no);
7e8a75f4 7555 break;
11c71cb4 7556
c4bd2654 7557 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS		 7558 dcmd_ret = megasas_get_ctrl_info(instance);
7559 break;
7e8a75f4
YB		 7560 default:
7561 doscan = 0;
7562 break;
7563 }
7564 } else {
1be18254 7565 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7566 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7567 kfree(ev);
7568 return;
7569 }
7570
11c71cb4
SS		 7571 mutex_unlock(&instance->reset_mutex);
7572
7573 if (doscan & SCAN_PD_CHANNEL) {
7574 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7575 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7576 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7577 sdev1 = scsi_device_lookup(host, i, j, 0);
7578 if (instance->pd_list[pd_index].driveState ==
7579 MR_PD_STATE_SYSTEM) {
7580 if (!sdev1)
7581 scsi_add_device(host, i, j, 0);
7582 else
7583 scsi_device_put(sdev1);
7584 } else {
b4a42213
S		 7585 if (sdev1)
7586 megasas_remove_scsi_device(sdev1);
7e8a75f4
YB		 7587 }
7588 }
7589 }
11c71cb4 7590 }
c9786842 7591
11c71cb4
SS		 7592 if (doscan & SCAN_VD_CHANNEL) {
7593 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7594 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7595 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7596 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7597 if (instance->ld_ids[ld_index] != 0xff) {
7598 if (!sdev1)
7599 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7600 else
7601 scsi_device_put(sdev1);
7602 } else {
b4a42213
S		 7603 if (sdev1)
7604 megasas_remove_scsi_device(sdev1);
c9786842
YB		 7605 }
7606 }
7607 }
7e8a75f4
YB		 7608 }
7609
6d40afbc 7610 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7611 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7612 else
7613 seq_num = instance->last_seq_num;
7e8a75f4
YB		 7614
7615 /* Register AEN with FW for latest sequence number plus 1 */
7616 class_locale.members.reserved = 0;
7617 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7618 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS		 7619
7620 if (instance->aen_cmd != NULL) {
7621 kfree(ev);
7622 return;
7623 }
7624
7625 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB		 7626 error = megasas_register_aen(instance, seq_num,
7627 class_locale.word);
7e8a75f4 7628 if (error)
11c71cb4
SS		 7629 dev_err(&instance->pdev->dev,
7630 "register aen failed error %x\n", error);
7e8a75f4 7631
11c71cb4 7632 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7633 kfree(ev);
7634}
7635
c4a3e0a5
BS		 7636/**
7637 * megasas_init - Driver load entry point
7638 */
7639static int __init megasas_init(void)
7640{
7641 int rval;
7642
c3e385a1
SS		 7643 /*
7644 * Booted in kdump kernel, minimize memory footprints by
7645 * disabling few features
7646 */
7647 if (reset_devices) {
7648 msix_vectors = 1;
7649 rdpq_enable = 0;
7650 dual_qdepth_disable = 1;
7651 }
7652
c4a3e0a5
BS		 7653 /*
7654 * Announce driver version and other information
7655 */
d98a6deb 7656 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7657
bd8d6dd4
KD		 7658 spin_lock_init(&poll_aen_lock);
7659
72c4fd36 7660 support_poll_for_event = 2;
837f5fe8 7661 support_device_change = 1;
72c4fd36 7662
c4a3e0a5
BS		 7663 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7664
7665 /*
7666 * Register character device node
7667 */
7668 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7669
7670 if (rval < 0) {
7671 printk(KERN_DEBUG "megasas: failed to open device node\n");
7672 return rval;
7673 }
7674
7675 megasas_mgmt_majorno = rval;
7676
7677 /*
7678 * Register ourselves as PCI hotplug module
7679 */
4041b9cd 7680 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 7681
7682 if (rval) {
6774def6 7683 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 7684 goto err_pcidrv;
7685 }
7686
7687 rval = driver_create_file(&megasas_pci_driver.driver,
7688 &driver_attr_version);
7689 if (rval)
7690 goto err_dcf_attr_ver;
72c4fd36 7691
09fced19
SS		 7692 rval = driver_create_file(&megasas_pci_driver.driver,
7693 &driver_attr_release_date);
7694 if (rval)
7695 goto err_dcf_rel_date;
7696
72c4fd36
YB		 7697 rval = driver_create_file(&megasas_pci_driver.driver,
7698 &driver_attr_support_poll_for_event);
7699 if (rval)
7700 goto err_dcf_support_poll_for_event;
7701
83aabc1b
JG		 7702 rval = driver_create_file(&megasas_pci_driver.driver,
7703 &driver_attr_dbg_lvl);
7704 if (rval)
7705 goto err_dcf_dbg_lvl;
837f5fe8
YB		 7706 rval = driver_create_file(&megasas_pci_driver.driver,
7707 &driver_attr_support_device_change);
7708 if (rval)
7709 goto err_dcf_support_device_change;
7710
c4a3e0a5 7711 return rval;
ad84db2e 7712
837f5fe8 7713err_dcf_support_device_change:
ad84db2e 7714 driver_remove_file(&megasas_pci_driver.driver,
7715 &driver_attr_dbg_lvl);
83aabc1b 7716err_dcf_dbg_lvl:
72c4fd36
YB		 7717 driver_remove_file(&megasas_pci_driver.driver,
7718 &driver_attr_support_poll_for_event);
72c4fd36 7719err_dcf_support_poll_for_event:
09fced19
SS		 7720 driver_remove_file(&megasas_pci_driver.driver,
7721 &driver_attr_release_date);
7722err_dcf_rel_date:
83aabc1b
JG		 7723 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7724err_dcf_attr_ver:
7725 pci_unregister_driver(&megasas_pci_driver);
7726err_pcidrv:
7727 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7728 return rval;
c4a3e0a5
BS		 7729}
7730
7731/**
7732 * megasas_exit - Driver unload entry point
7733 */
7734static void __exit megasas_exit(void)
7735{
658dcedb
SP		 7736 driver_remove_file(&megasas_pci_driver.driver,
7737 &driver_attr_dbg_lvl);
837f5fe8
YB		 7738 driver_remove_file(&megasas_pci_driver.driver,
7739 &driver_attr_support_poll_for_event);
7740 driver_remove_file(&megasas_pci_driver.driver,
7741 &driver_attr_support_device_change);
09fced19
SS		 7742 driver_remove_file(&megasas_pci_driver.driver,
7743 &driver_attr_release_date);
83aabc1b 7744 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 7745
7746 pci_unregister_driver(&megasas_pci_driver);
7747 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7748}
7749
7750module_init(megasas_init);
7751module_exit(megasas_exit);
A mirror of Linus' kernel repository