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megaraid_sas: use dev_printk when possible
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS		 51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 58#include "megaraid_sas.h"
59
1fd10685
YB		 60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98
AR		 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf
AR		 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c
AR		 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
c007b8b2
AR		 86int resetwaittime = MEGASAS_RESET_WAIT_TIME;
87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS		 91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
c4a3e0a5
BS		 95MODULE_LICENSE("GPL");
96MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 97MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
98MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 99
058a8fac 100int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 101static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 102static int megasas_ld_list_query(struct megasas_instance *instance,
103 u8 query_type);
39a98554 104static int megasas_issue_init_mfi(struct megasas_instance *instance);
105static int megasas_register_aen(struct megasas_instance *instance,
106 u32 seq_num, u32 class_locale_word);
c4a3e0a5
BS		 107/*
108 * PCI ID table for all supported controllers
109 */
110static struct pci_device_id megasas_pci_table[] = {
111
f3d7271c
HK		 112 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
113 /* xscale IOP */
114 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
115 /* ppc IOP */
af7a5647 116 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
117 /* ppc IOP */
6610a6b3
YB		 118 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
119 /* gen2*/
120 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
121 /* gen2*/
87911122
YB		 122 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
123 /* skinny*/
124 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
125 /* skinny*/
f3d7271c
HK		 126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
127 /* xscale IOP, vega */
128 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
129 /* xscale IOP */
9c915a8c
AR		 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
131 /* Fusion */
229fe47c
AR		 132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
133 /* Plasma */
36807e67
AR		 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
135 /* Invader */
21d3c710
SS		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
137 /* Fury */
f3d7271c 138 {}
c4a3e0a5
BS		 139};
140
141MODULE_DEVICE_TABLE(pci, megasas_pci_table);
142
143static int megasas_mgmt_majorno;
229fe47c 144struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 145static struct fasync_struct *megasas_async_queue;
0b950672 146static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 147
c3518837
YB		 148static int megasas_poll_wait_aen;
149static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 150static u32 support_poll_for_event;
9c915a8c 151u32 megasas_dbg_lvl;
837f5fe8 152static u32 support_device_change;
658dcedb 153
c3518837
YB		 154/* define lock for aen poll */
155spinlock_t poll_aen_lock;
156
9c915a8c 157void
7343eb65 158megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
159 u8 alt_status);
ebf054b0
AR		 160static u32
161megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
162static int
163megasas_adp_reset_gen2(struct megasas_instance *instance,
164 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 165static irqreturn_t megasas_isr(int irq, void *devp);
166static u32
167megasas_init_adapter_mfi(struct megasas_instance *instance);
168u32
169megasas_build_and_issue_cmd(struct megasas_instance *instance,
170 struct scsi_cmnd *scmd);
171static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c
AR		 172void
173megasas_release_fusion(struct megasas_instance *instance);
174int
175megasas_ioc_init_fusion(struct megasas_instance *instance);
176void
177megasas_free_cmds_fusion(struct megasas_instance *instance);
178u8
179megasas_get_map_info(struct megasas_instance *instance);
180int
181megasas_sync_map_info(struct megasas_instance *instance);
182int
229fe47c
AR		 183wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
184 int seconds);
9c915a8c 185void megasas_reset_reply_desc(struct megasas_instance *instance);
229fe47c 186int megasas_reset_fusion(struct Scsi_Host *shost, int iotimeout);
9c915a8c 187void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 188static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
189 int initial);
190int megasas_check_mpio_paths(struct megasas_instance *instance,
191 struct scsi_cmnd *scmd);
cd50ba8e
AR		 192
193void
194megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
195{
196 instance->instancet->fire_cmd(instance,
197 cmd->frame_phys_addr, 0, instance->reg_set);
198}
7343eb65 199
c4a3e0a5
BS		 200/**
201 * megasas_get_cmd - Get a command from the free pool
202 * @instance: Adapter soft state
203 *
204 * Returns a free command from the pool
205 */
9c915a8c 206struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 207 *instance)
208{
209 unsigned long flags;
210 struct megasas_cmd *cmd = NULL;
211
90dc9d98 212 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 213
214 if (!list_empty(&instance->cmd_pool)) {
215 cmd = list_entry((&instance->cmd_pool)->next,
216 struct megasas_cmd, list);
217 list_del_init(&cmd->list);
218 } else {
1be18254 219 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 220 }
221
90dc9d98 222 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 223 return cmd;
224}
225
226/**
4026e9aa 227 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 228 * @instance: Adapter soft state
229 * @cmd: Command packet to be returned to free command pool
230 */
9c915a8c 231inline void
4026e9aa 232megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 233{
4026e9aa
SS		 234 unsigned long flags;
235 u32 blk_tags;
236 struct megasas_cmd_fusion *cmd_fusion;
237 struct fusion_context *fusion = instance->ctrl_context;
238
239 /* This flag is used only for fusion adapter.
240 * Wait for Interrupt for Polled mode DCMD
90dc9d98 241 */
4026e9aa 242 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 243 return;
c4a3e0a5 244
4026e9aa
SS		 245 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
246
247 if (fusion) {
248 blk_tags = instance->max_scsi_cmds + cmd->index;
249 cmd_fusion = fusion->cmd_list[blk_tags];
250 megasas_return_cmd_fusion(instance, cmd_fusion);
251 }
c4a3e0a5 252 cmd->scmd = NULL;
9c915a8c 253 cmd->frame_count = 0;
4026e9aa
SS		 254 cmd->flags = 0;
255 if (!fusion && reset_devices)
e5f93a36 256 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 257 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 258
90dc9d98 259 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 260
4026e9aa 261}
1341c939
SP		 262
263/**
0d49016b 264* The following functions are defined for xscale
1341c939
SP		 265* (deviceid : 1064R, PERC5) controllers
266*/
267
c4a3e0a5 268/**
1341c939 269 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 270 * @regs: MFI register set
271 */
272static inline void
d46a3ad6 273megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 274{
d46a3ad6
SS		 275 struct megasas_register_set __iomem *regs;
276 regs = instance->reg_set;
39a98554 277 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 278
279 /* Dummy readl to force pci flush */
280 readl(&regs->outbound_intr_mask);
281}
282
b274cab7
SP		 283/**
284 * megasas_disable_intr_xscale -Disables interrupt
285 * @regs: MFI register set
286 */
287static inline void
d46a3ad6 288megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 289{
d46a3ad6 290 struct megasas_register_set __iomem *regs;
b274cab7 291 u32 mask = 0x1f;
d46a3ad6 292 regs = instance->reg_set;
b274cab7
SP		 293 writel(mask, &regs->outbound_intr_mask);
294 /* Dummy readl to force pci flush */
295 readl(&regs->outbound_intr_mask);
296}
297
1341c939
SP		 298/**
299 * megasas_read_fw_status_reg_xscale - returns the current FW status value
300 * @regs: MFI register set
301 */
302static u32
303megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
304{
305 return readl(&(regs)->outbound_msg_0);
306}
307/**
308 * megasas_clear_interrupt_xscale - Check & clear interrupt
309 * @regs: MFI register set
310 */
0d49016b 311static int
1341c939
SP		 312megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
313{
314 u32 status;
39a98554 315 u32 mfiStatus = 0;
1341c939
SP		 316 /*
317 * Check if it is our interrupt
318 */
319 status = readl(&regs->outbound_intr_status);
320
39a98554 321 if (status & MFI_OB_INTR_STATUS_MASK)
322 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
323 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
324 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 325
326 /*
327 * Clear the interrupt by writing back the same value
328 */
39a98554 329 if (mfiStatus)
330 writel(status, &regs->outbound_intr_status);
1341c939 331
06f579de
YB		 332 /* Dummy readl to force pci flush */
333 readl(&regs->outbound_intr_status);
334
39a98554 335 return mfiStatus;
1341c939
SP		 336}
337
338/**
339 * megasas_fire_cmd_xscale - Sends command to the FW
340 * @frame_phys_addr : Physical address of cmd
341 * @frame_count : Number of frames for the command
342 * @regs : MFI register set
343 */
0d49016b 344static inline void
0c79e681
YB		 345megasas_fire_cmd_xscale(struct megasas_instance *instance,
346 dma_addr_t frame_phys_addr,
347 u32 frame_count,
348 struct megasas_register_set __iomem *regs)
1341c939 349{
39a98554 350 unsigned long flags;
351 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 352 writel((frame_phys_addr >> 3)|(frame_count),
353 &(regs)->inbound_queue_port);
39a98554 354 spin_unlock_irqrestore(&instance->hba_lock, flags);
355}
356
357/**
358 * megasas_adp_reset_xscale - For controller reset
359 * @regs: MFI register set
360 */
361static int
362megasas_adp_reset_xscale(struct megasas_instance *instance,
363 struct megasas_register_set __iomem *regs)
364{
365 u32 i;
366 u32 pcidata;
367 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
368
369 for (i = 0; i < 3; i++)
370 msleep(1000); /* sleep for 3 secs */
371 pcidata = 0;
372 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 373 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 374 if (pcidata & 0x2) {
1be18254 375 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 376 pcidata &= ~0x2;
377 pci_write_config_dword(instance->pdev,
378 MFI_1068_PCSR_OFFSET, pcidata);
379
380 for (i = 0; i < 2; i++)
381 msleep(1000); /* need to wait 2 secs again */
382
383 pcidata = 0;
384 pci_read_config_dword(instance->pdev,
385 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 386 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 387 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 388 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 389 pcidata = 0;
390 pci_write_config_dword(instance->pdev,
391 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
392 }
393 }
394 return 0;
395}
396
397/**
398 * megasas_check_reset_xscale - For controller reset check
399 * @regs: MFI register set
400 */
401static int
402megasas_check_reset_xscale(struct megasas_instance *instance,
403 struct megasas_register_set __iomem *regs)
404{
39a98554 405
406 if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 407 (le32_to_cpu(*instance->consumer) ==
408 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 409 return 1;
39a98554 410 return 0;
1341c939
SP		 411}
412
413static struct megasas_instance_template megasas_instance_template_xscale = {
414
415 .fire_cmd = megasas_fire_cmd_xscale,
416 .enable_intr = megasas_enable_intr_xscale,
b274cab7 417 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 418 .clear_intr = megasas_clear_intr_xscale,
419 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 420 .adp_reset = megasas_adp_reset_xscale,
421 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 422 .service_isr = megasas_isr,
423 .tasklet = megasas_complete_cmd_dpc,
424 .init_adapter = megasas_init_adapter_mfi,
425 .build_and_issue_cmd = megasas_build_and_issue_cmd,
426 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 427};
428
429/**
0d49016b 430* This is the end of set of functions & definitions specific
1341c939
SP		 431* to xscale (deviceid : 1064R, PERC5) controllers
432*/
433
f9876f0b 434/**
0d49016b 435* The following functions are defined for ppc (deviceid : 0x60)
f9876f0b
SP		 436* controllers
437*/
438
439/**
440 * megasas_enable_intr_ppc - Enables interrupts
441 * @regs: MFI register set
442 */
443static inline void
d46a3ad6 444megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 445{
d46a3ad6
SS		 446 struct megasas_register_set __iomem *regs;
447 regs = instance->reg_set;
f9876f0b 448 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 449
39a98554 450 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 451
452 /* Dummy readl to force pci flush */
453 readl(&regs->outbound_intr_mask);
454}
455
b274cab7
SP		 456/**
457 * megasas_disable_intr_ppc - Disable interrupt
458 * @regs: MFI register set
459 */
460static inline void
d46a3ad6 461megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 462{
d46a3ad6 463 struct megasas_register_set __iomem *regs;
b274cab7 464 u32 mask = 0xFFFFFFFF;
d46a3ad6 465 regs = instance->reg_set;
b274cab7
SP		 466 writel(mask, &regs->outbound_intr_mask);
467 /* Dummy readl to force pci flush */
468 readl(&regs->outbound_intr_mask);
469}
470
f9876f0b
SP		 471/**
472 * megasas_read_fw_status_reg_ppc - returns the current FW status value
473 * @regs: MFI register set
474 */
475static u32
476megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
477{
478 return readl(&(regs)->outbound_scratch_pad);
479}
480
481/**
482 * megasas_clear_interrupt_ppc - Check & clear interrupt
483 * @regs: MFI register set
484 */
0d49016b 485static int
f9876f0b
SP		 486megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
487{
3cc6851f
AR		 488 u32 status, mfiStatus = 0;
489
f9876f0b
SP		 490 /*
491 * Check if it is our interrupt
492 */
493 status = readl(&regs->outbound_intr_status);
494
3cc6851f
AR		 495 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
496 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
497
498 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
499 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 500
501 /*
502 * Clear the interrupt by writing back the same value
503 */
504 writel(status, &regs->outbound_doorbell_clear);
505
06f579de
YB		 506 /* Dummy readl to force pci flush */
507 readl(&regs->outbound_doorbell_clear);
508
3cc6851f 509 return mfiStatus;
f9876f0b 510}
3cc6851f 511
f9876f0b
SP		 512/**
513 * megasas_fire_cmd_ppc - Sends command to the FW
514 * @frame_phys_addr : Physical address of cmd
515 * @frame_count : Number of frames for the command
516 * @regs : MFI register set
517 */
0d49016b 518static inline void
0c79e681
YB		 519megasas_fire_cmd_ppc(struct megasas_instance *instance,
520 dma_addr_t frame_phys_addr,
521 u32 frame_count,
522 struct megasas_register_set __iomem *regs)
f9876f0b 523{
39a98554 524 unsigned long flags;
525 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 526 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 527 &(regs)->inbound_queue_port);
39a98554 528 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 529}
530
39a98554 531/**
532 * megasas_check_reset_ppc - For controller reset check
533 * @regs: MFI register set
534 */
535static int
536megasas_check_reset_ppc(struct megasas_instance *instance,
537 struct megasas_register_set __iomem *regs)
538{
3cc6851f
AR		 539 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
540 return 1;
541
39a98554 542 return 0;
543}
3cc6851f 544
f9876f0b 545static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 546
f9876f0b
SP		 547 .fire_cmd = megasas_fire_cmd_ppc,
548 .enable_intr = megasas_enable_intr_ppc,
b274cab7 549 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 550 .clear_intr = megasas_clear_intr_ppc,
551 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 552 .adp_reset = megasas_adp_reset_xscale,
39a98554 553 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 554 .service_isr = megasas_isr,
555 .tasklet = megasas_complete_cmd_dpc,
556 .init_adapter = megasas_init_adapter_mfi,
557 .build_and_issue_cmd = megasas_build_and_issue_cmd,
558 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 559};
560
87911122
YB		 561/**
562 * megasas_enable_intr_skinny - Enables interrupts
563 * @regs: MFI register set
564 */
565static inline void
d46a3ad6 566megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 567{
d46a3ad6
SS		 568 struct megasas_register_set __iomem *regs;
569 regs = instance->reg_set;
87911122
YB		 570 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
571
572 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
573
574 /* Dummy readl to force pci flush */
575 readl(&regs->outbound_intr_mask);
576}
577
578/**
579 * megasas_disable_intr_skinny - Disables interrupt
580 * @regs: MFI register set
581 */
582static inline void
d46a3ad6 583megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 584{
d46a3ad6 585 struct megasas_register_set __iomem *regs;
87911122 586 u32 mask = 0xFFFFFFFF;
d46a3ad6 587 regs = instance->reg_set;
87911122
YB		 588 writel(mask, &regs->outbound_intr_mask);
589 /* Dummy readl to force pci flush */
590 readl(&regs->outbound_intr_mask);
591}
592
593/**
594 * megasas_read_fw_status_reg_skinny - returns the current FW status value
595 * @regs: MFI register set
596 */
597static u32
598megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
599{
600 return readl(&(regs)->outbound_scratch_pad);
601}
602
603/**
604 * megasas_clear_interrupt_skinny - Check & clear interrupt
605 * @regs: MFI register set
606 */
607static int
608megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
609{
610 u32 status;
ebf054b0
AR		 611 u32 mfiStatus = 0;
612
87911122
YB		 613 /*
614 * Check if it is our interrupt
615 */
616 status = readl(&regs->outbound_intr_status);
617
618 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 619 return 0;
87911122
YB		 620 }
621
ebf054b0
AR		 622 /*
623 * Check if it is our interrupt
624 */
a3fda7dd 625 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 626 MFI_STATE_FAULT) {
627 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
628 } else
629 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
630
87911122
YB		 631 /*
632 * Clear the interrupt by writing back the same value
633 */
634 writel(status, &regs->outbound_intr_status);
635
636 /*
637 * dummy read to flush PCI
638 */
639 readl(&regs->outbound_intr_status);
640
ebf054b0 641 return mfiStatus;
87911122
YB		 642}
643
644/**
645 * megasas_fire_cmd_skinny - Sends command to the FW
646 * @frame_phys_addr : Physical address of cmd
647 * @frame_count : Number of frames for the command
648 * @regs : MFI register set
649 */
650static inline void
0c79e681
YB		 651megasas_fire_cmd_skinny(struct megasas_instance *instance,
652 dma_addr_t frame_phys_addr,
653 u32 frame_count,
87911122
YB		 654 struct megasas_register_set __iomem *regs)
655{
0c79e681 656 unsigned long flags;
39a98554 657 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 658 writel(upper_32_bits(frame_phys_addr),
659 &(regs)->inbound_high_queue_port);
660 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
661 &(regs)->inbound_low_queue_port);
39a98554 662 spin_unlock_irqrestore(&instance->hba_lock, flags);
663}
664
39a98554 665/**
666 * megasas_check_reset_skinny - For controller reset check
667 * @regs: MFI register set
668 */
669static int
670megasas_check_reset_skinny(struct megasas_instance *instance,
671 struct megasas_register_set __iomem *regs)
672{
3cc6851f
AR		 673 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
674 return 1;
675
39a98554 676 return 0;
87911122
YB		 677}
678
679static struct megasas_instance_template megasas_instance_template_skinny = {
680
681 .fire_cmd = megasas_fire_cmd_skinny,
682 .enable_intr = megasas_enable_intr_skinny,
683 .disable_intr = megasas_disable_intr_skinny,
684 .clear_intr = megasas_clear_intr_skinny,
685 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 686 .adp_reset = megasas_adp_reset_gen2,
39a98554 687 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 688 .service_isr = megasas_isr,
689 .tasklet = megasas_complete_cmd_dpc,
690 .init_adapter = megasas_init_adapter_mfi,
691 .build_and_issue_cmd = megasas_build_and_issue_cmd,
692 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 693};
694
695
6610a6b3
YB		 696/**
697* The following functions are defined for gen2 (deviceid : 0x78 0x79)
698* controllers
699*/
700
701/**
702 * megasas_enable_intr_gen2 - Enables interrupts
703 * @regs: MFI register set
704 */
705static inline void
d46a3ad6 706megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 707{
d46a3ad6
SS		 708 struct megasas_register_set __iomem *regs;
709 regs = instance->reg_set;
6610a6b3
YB		 710 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
711
712 /* write ~0x00000005 (4 & 1) to the intr mask*/
713 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
714
715 /* Dummy readl to force pci flush */
716 readl(&regs->outbound_intr_mask);
717}
718
719/**
720 * megasas_disable_intr_gen2 - Disables interrupt
721 * @regs: MFI register set
722 */
723static inline void
d46a3ad6 724megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 725{
d46a3ad6 726 struct megasas_register_set __iomem *regs;
6610a6b3 727 u32 mask = 0xFFFFFFFF;
d46a3ad6 728 regs = instance->reg_set;
6610a6b3
YB		 729 writel(mask, &regs->outbound_intr_mask);
730 /* Dummy readl to force pci flush */
731 readl(&regs->outbound_intr_mask);
732}
733
734/**
735 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
736 * @regs: MFI register set
737 */
738static u32
739megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
740{
741 return readl(&(regs)->outbound_scratch_pad);
742}
743
744/**
745 * megasas_clear_interrupt_gen2 - Check & clear interrupt
746 * @regs: MFI register set
747 */
748static int
749megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
750{
751 u32 status;
39a98554 752 u32 mfiStatus = 0;
6610a6b3
YB		 753 /*
754 * Check if it is our interrupt
755 */
756 status = readl(&regs->outbound_intr_status);
757
b5bccadd 758 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 759 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
760 }
761 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
762 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
763 }
6610a6b3
YB		 764
765 /*
766 * Clear the interrupt by writing back the same value
767 */
39a98554 768 if (mfiStatus)
769 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 770
771 /* Dummy readl to force pci flush */
772 readl(&regs->outbound_intr_status);
773
39a98554 774 return mfiStatus;
6610a6b3
YB		 775}
776/**
777 * megasas_fire_cmd_gen2 - Sends command to the FW
778 * @frame_phys_addr : Physical address of cmd
779 * @frame_count : Number of frames for the command
780 * @regs : MFI register set
781 */
782static inline void
0c79e681
YB		 783megasas_fire_cmd_gen2(struct megasas_instance *instance,
784 dma_addr_t frame_phys_addr,
785 u32 frame_count,
6610a6b3
YB		 786 struct megasas_register_set __iomem *regs)
787{
39a98554 788 unsigned long flags;
789 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 790 writel((frame_phys_addr | (frame_count<<1))|1,
791 &(regs)->inbound_queue_port);
39a98554 792 spin_unlock_irqrestore(&instance->hba_lock, flags);
793}
794
795/**
796 * megasas_adp_reset_gen2 - For controller reset
797 * @regs: MFI register set
798 */
799static int
800megasas_adp_reset_gen2(struct megasas_instance *instance,
801 struct megasas_register_set __iomem *reg_set)
802{
803 u32 retry = 0 ;
804 u32 HostDiag;
8a232bb3
CH		 805 u32 __iomem *seq_offset = &reg_set->seq_offset;
806 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 807
808 if (instance->instancet == &megasas_instance_template_skinny) {
809 seq_offset = &reg_set->fusion_seq_offset;
810 hostdiag_offset = &reg_set->fusion_host_diag;
811 }
812
813 writel(0, seq_offset);
814 writel(4, seq_offset);
815 writel(0xb, seq_offset);
816 writel(2, seq_offset);
817 writel(7, seq_offset);
818 writel(0xd, seq_offset);
39a98554 819
39a98554 820 msleep(1000);
821
ebf054b0 822 HostDiag = (u32)readl(hostdiag_offset);
39a98554 823
824 while ( !( HostDiag & DIAG_WRITE_ENABLE) ) {
825 msleep(100);
ebf054b0 826 HostDiag = (u32)readl(hostdiag_offset);
1be18254 827 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 828 retry, HostDiag);
829
830 if (retry++ >= 100)
831 return 1;
832
833 }
834
1be18254 835 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 836
ebf054b0 837 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 838
839 ssleep(10);
840
ebf054b0 841 HostDiag = (u32)readl(hostdiag_offset);
39a98554 842 while ( ( HostDiag & DIAG_RESET_ADAPTER) ) {
843 msleep(100);
ebf054b0 844 HostDiag = (u32)readl(hostdiag_offset);
1be18254 845 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 846 retry, HostDiag);
847
848 if (retry++ >= 1000)
849 return 1;
850
851 }
852 return 0;
853}
854
855/**
856 * megasas_check_reset_gen2 - For controller reset check
857 * @regs: MFI register set
858 */
859static int
860megasas_check_reset_gen2(struct megasas_instance *instance,
861 struct megasas_register_set __iomem *regs)
862{
707e09bd
YB		 863 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
864 return 1;
865 }
866
39a98554 867 return 0;
6610a6b3
YB		 868}
869
870static struct megasas_instance_template megasas_instance_template_gen2 = {
871
872 .fire_cmd = megasas_fire_cmd_gen2,
873 .enable_intr = megasas_enable_intr_gen2,
874 .disable_intr = megasas_disable_intr_gen2,
875 .clear_intr = megasas_clear_intr_gen2,
876 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 877 .adp_reset = megasas_adp_reset_gen2,
878 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 879 .service_isr = megasas_isr,
880 .tasklet = megasas_complete_cmd_dpc,
881 .init_adapter = megasas_init_adapter_mfi,
882 .build_and_issue_cmd = megasas_build_and_issue_cmd,
883 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 884};
885
f9876f0b
SP		 886/**
887* This is the end of set of functions & definitions
39a98554 888* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 889*/
890
9c915a8c
AR		 891/*
892 * Template added for TB (Fusion)
893 */
894extern struct megasas_instance_template megasas_instance_template_fusion;
895
c4a3e0a5
BS		 896/**
897 * megasas_issue_polled - Issues a polling command
898 * @instance: Adapter soft state
0d49016b 899 * @cmd: Command packet to be issued
c4a3e0a5 900 *
2be2a988 901 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 902 */
9c915a8c 903int
c4a3e0a5
BS		 904megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
905{
229fe47c 906 int seconds;
c4a3e0a5
BS		 907
908 struct megasas_header *frame_hdr = &cmd->frame->hdr;
909
94cd65dd
SS		 910 frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE;
911 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5
BS		 912
913 /*
914 * Issue the frame using inbound queue port
915 */
9c915a8c 916 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 917
918 /*
919 * Wait for cmd_status to change
920 */
229fe47c
AR		 921 if (instance->requestorId)
922 seconds = MEGASAS_ROUTINE_WAIT_TIME_VF;
923 else
924 seconds = MFI_POLL_TIMEOUT_SECS;
925 return wait_and_poll(instance, cmd, seconds);
c4a3e0a5
BS		 926}
927
928/**
929 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
930 * @instance: Adapter soft state
931 * @cmd: Command to be issued
cfbe7554 932 * @timeout: Timeout in seconds
c4a3e0a5
BS		 933 *
934 * This function waits on an event for the command to be returned from ISR.
2a3681e5 935 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 936 * Used to issue ioctl commands.
937 */
90dc9d98 938int
c4a3e0a5 939megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 940 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 941{
cfbe7554 942 int ret = 0;
2be2a988 943 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 944
9c915a8c 945 instance->instancet->issue_dcmd(instance, cmd);
cfbe7554
SS		 946 if (timeout) {
947 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 948 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 949 if (!ret)
950 return 1;
951 } else
952 wait_event(instance->int_cmd_wait_q,
2be2a988 953 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 954
2be2a988
SS		 955 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
956 0 : 1;
c4a3e0a5
BS		 957}
958
959/**
960 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
961 * @instance: Adapter soft state
962 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 963 * @timeout: Timeout in seconds
c4a3e0a5 964 *
cfbe7554 965 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 966 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 967 * cmd and waits for return status.
968 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 969 */
970static int
971megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 972 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 973{
974 struct megasas_cmd *cmd;
975 struct megasas_abort_frame *abort_fr;
cfbe7554 976 int ret = 0;
c4a3e0a5
BS		 977
978 cmd = megasas_get_cmd(instance);
979
980 if (!cmd)
981 return -1;
982
983 abort_fr = &cmd->frame->abort;
984
985 /*
986 * Prepare and issue the abort frame
987 */
988 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 989 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 990 abort_fr->flags = cpu_to_le16(0);
991 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
992 abort_fr->abort_mfi_phys_addr_lo =
993 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
994 abort_fr->abort_mfi_phys_addr_hi =
995 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 996
997 cmd->sync_cmd = 1;
2be2a988 998 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 999
9c915a8c 1000 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5 1001
cfbe7554
SS		 1002 if (timeout) {
1003 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1004 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 1005 if (!ret) {
1006 dev_err(&instance->pdev->dev, "Command timedout"
1007 "from %s\n", __func__);
1008 return 1;
1009 }
1010 } else
1011 wait_event(instance->abort_cmd_wait_q,
2be2a988 1012 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1013
39a98554 1014 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1015
1016 megasas_return_cmd(instance, cmd);
1017 return 0;
1018}
1019
1020/**
1021 * megasas_make_sgl32 - Prepares 32-bit SGL
1022 * @instance: Adapter soft state
1023 * @scp: SCSI command from the mid-layer
1024 * @mfi_sgl: SGL to be filled in
1025 *
1026 * If successful, this function returns the number of SG elements. Otherwise,
1027 * it returnes -1.
1028 */
858119e1 1029static int
c4a3e0a5
BS		 1030megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1031 union megasas_sgl *mfi_sgl)
1032{
1033 int i;
1034 int sge_count;
1035 struct scatterlist *os_sgl;
1036
155d98f0
FT		 1037 sge_count = scsi_dma_map(scp);
1038 BUG_ON(sge_count < 0);
c4a3e0a5 1039
155d98f0
FT		 1040 if (sge_count) {
1041 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1042 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1043 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1044 }
c4a3e0a5 1045 }
c4a3e0a5
BS		 1046 return sge_count;
1047}
1048
1049/**
1050 * megasas_make_sgl64 - Prepares 64-bit SGL
1051 * @instance: Adapter soft state
1052 * @scp: SCSI command from the mid-layer
1053 * @mfi_sgl: SGL to be filled in
1054 *
1055 * If successful, this function returns the number of SG elements. Otherwise,
1056 * it returnes -1.
1057 */
858119e1 1058static int
c4a3e0a5
BS		 1059megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1060 union megasas_sgl *mfi_sgl)
1061{
1062 int i;
1063 int sge_count;
1064 struct scatterlist *os_sgl;
1065
155d98f0
FT		 1066 sge_count = scsi_dma_map(scp);
1067 BUG_ON(sge_count < 0);
c4a3e0a5 1068
155d98f0
FT		 1069 if (sge_count) {
1070 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1071 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1072 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1073 }
c4a3e0a5 1074 }
c4a3e0a5
BS		 1075 return sge_count;
1076}
1077
f4c9a131
YB		 1078/**
1079 * megasas_make_sgl_skinny - Prepares IEEE SGL
1080 * @instance: Adapter soft state
1081 * @scp: SCSI command from the mid-layer
1082 * @mfi_sgl: SGL to be filled in
1083 *
1084 * If successful, this function returns the number of SG elements. Otherwise,
1085 * it returnes -1.
1086 */
1087static int
1088megasas_make_sgl_skinny(struct megasas_instance *instance,
1089 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1090{
1091 int i;
1092 int sge_count;
1093 struct scatterlist *os_sgl;
1094
1095 sge_count = scsi_dma_map(scp);
1096
1097 if (sge_count) {
1098 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1099 mfi_sgl->sge_skinny[i].length =
1100 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1101 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1102 cpu_to_le64(sg_dma_address(os_sgl));
1103 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1104 }
1105 }
1106 return sge_count;
1107}
1108
b1df99d9
SP		 1109 /**
1110 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1111 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1112 * @sge_count : number of sg elements
1113 *
1114 * Returns the number of frames required for numnber of sge's (sge_count)
1115 */
1116
f4c9a131
YB		 1117static u32 megasas_get_frame_count(struct megasas_instance *instance,
1118 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1119{
1120 int num_cnt;
1121 int sge_bytes;
1122 u32 sge_sz;
1123 u32 frame_count=0;
1124
1125 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1126 sizeof(struct megasas_sge32);
1127
f4c9a131
YB		 1128 if (instance->flag_ieee) {
1129 sge_sz = sizeof(struct megasas_sge_skinny);
1130 }
1131
b1df99d9 1132 /*
d532dbe2 1133 * Main frame can contain 2 SGEs for 64-bit SGLs and
1134 * 3 SGEs for 32-bit SGLs for ldio &
1135 * 1 SGEs for 64-bit SGLs and
1136 * 2 SGEs for 32-bit SGLs for pthru frame
1137 */
1138 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1139 if (instance->flag_ieee == 1) {
1140 num_cnt = sge_count - 1;
1141 } else if (IS_DMA64)
d532dbe2 1142 num_cnt = sge_count - 1;
1143 else
1144 num_cnt = sge_count - 2;
1145 } else {
f4c9a131
YB		 1146 if (instance->flag_ieee == 1) {
1147 num_cnt = sge_count - 1;
1148 } else if (IS_DMA64)
d532dbe2 1149 num_cnt = sge_count - 2;
1150 else
1151 num_cnt = sge_count - 3;
1152 }
b1df99d9
SP		 1153
1154 if(num_cnt>0){
1155 sge_bytes = sge_sz * num_cnt;
1156
1157 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1158 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1159 }
1160 /* Main frame */
1161 frame_count +=1;
1162
1163 if (frame_count > 7)
1164 frame_count = 8;
1165 return frame_count;
1166}
1167
c4a3e0a5
BS		 1168/**
1169 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1170 * @instance: Adapter soft state
1171 * @scp: SCSI command
1172 * @cmd: Command to be prepared in
1173 *
1174 * This function prepares CDB commands. These are typcially pass-through
1175 * commands to the devices.
1176 */
858119e1 1177static int
c4a3e0a5
BS		 1178megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1179 struct megasas_cmd *cmd)
1180{
c4a3e0a5
BS		 1181 u32 is_logical;
1182 u32 device_id;
1183 u16 flags = 0;
1184 struct megasas_pthru_frame *pthru;
1185
1186 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1187 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1188 pthru = (struct megasas_pthru_frame *)cmd->frame;
1189
1190 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1191 flags = MFI_FRAME_DIR_WRITE;
1192 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1193 flags = MFI_FRAME_DIR_READ;
1194 else if (scp->sc_data_direction == PCI_DMA_NONE)
1195 flags = MFI_FRAME_DIR_NONE;
1196
f4c9a131
YB		 1197 if (instance->flag_ieee == 1) {
1198 flags |= MFI_FRAME_IEEE;
1199 }
1200
c4a3e0a5
BS		 1201 /*
1202 * Prepare the DCDB frame
1203 */
1204 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1205 pthru->cmd_status = 0x0;
1206 pthru->scsi_status = 0x0;
1207 pthru->target_id = device_id;
1208 pthru->lun = scp->device->lun;
1209 pthru->cdb_len = scp->cmd_len;
1210 pthru->timeout = 0;
780a3762 1211 pthru->pad_0 = 0;
94cd65dd
SS		 1212 pthru->flags = cpu_to_le16(flags);
1213 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1214
1215 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1216
8d568253
YB		 1217 /*
1218 * If the command is for the tape device, set the
1219 * pthru timeout to the os layer timeout value.
1220 */
1221 if (scp->device->type == TYPE_TAPE) {
1222 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1223 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1224 else
94cd65dd 1225 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1226 }
1227
c4a3e0a5
BS		 1228 /*
1229 * Construct SGL
1230 */
f4c9a131 1231 if (instance->flag_ieee == 1) {
94cd65dd 1232 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1233 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1234 &pthru->sgl);
1235 } else if (IS_DMA64) {
94cd65dd 1236 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1237 pthru->sge_count = megasas_make_sgl64(instance, scp,
1238 &pthru->sgl);
1239 } else
1240 pthru->sge_count = megasas_make_sgl32(instance, scp,
1241 &pthru->sgl);
1242
bdc6fb8d 1243 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1244 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1245 pthru->sge_count);
1246 return 0;
1247 }
1248
c4a3e0a5
BS		 1249 /*
1250 * Sense info specific
1251 */
1252 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1253 pthru->sense_buf_phys_addr_hi =
1254 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1255 pthru->sense_buf_phys_addr_lo =
1256 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1257
c4a3e0a5
BS		 1258 /*
1259 * Compute the total number of frames this command consumes. FW uses
1260 * this number to pull sufficient number of frames from host memory.
1261 */
f4c9a131 1262 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1263 PTHRU_FRAME);
c4a3e0a5
BS		 1264
1265 return cmd->frame_count;
1266}
1267
1268/**
1269 * megasas_build_ldio - Prepares IOs to logical devices
1270 * @instance: Adapter soft state
1271 * @scp: SCSI command
fd589a8f 1272 * @cmd: Command to be prepared
c4a3e0a5
BS		 1273 *
1274 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1275 */
858119e1 1276static int
c4a3e0a5
BS		 1277megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1278 struct megasas_cmd *cmd)
1279{
c4a3e0a5
BS		 1280 u32 device_id;
1281 u8 sc = scp->cmnd[0];
1282 u16 flags = 0;
1283 struct megasas_io_frame *ldio;
1284
4a5c814d 1285 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1286 ldio = (struct megasas_io_frame *)cmd->frame;
1287
1288 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1289 flags = MFI_FRAME_DIR_WRITE;
1290 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1291 flags = MFI_FRAME_DIR_READ;
1292
f4c9a131
YB		 1293 if (instance->flag_ieee == 1) {
1294 flags |= MFI_FRAME_IEEE;
1295 }
1296
c4a3e0a5 1297 /*
b1df99d9 1298 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1299 */
1300 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1301 ldio->cmd_status = 0x0;
1302 ldio->scsi_status = 0x0;
1303 ldio->target_id = device_id;
1304 ldio->timeout = 0;
1305 ldio->reserved_0 = 0;
1306 ldio->pad_0 = 0;
94cd65dd 1307 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1308 ldio->start_lba_hi = 0;
1309 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1310
1311 /*
1312 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1313 */
1314 if (scp->cmd_len == 6) {
94cd65dd
SS		 1315 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1316 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1317 ((u32) scp->cmnd[2] << 8) |
1318 (u32) scp->cmnd[3]);
c4a3e0a5 1319
94cd65dd 1320 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1321 }
1322
1323 /*
1324 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1325 */
1326 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1327 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1328 ((u32) scp->cmnd[7] << 8));
1329 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1330 ((u32) scp->cmnd[3] << 16) |
1331 ((u32) scp->cmnd[4] << 8) |
1332 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1333 }
1334
1335 /*
1336 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1337 */
1338 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1339 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1340 ((u32) scp->cmnd[7] << 16) |
1341 ((u32) scp->cmnd[8] << 8) |
1342 (u32) scp->cmnd[9]);
c4a3e0a5 1343
94cd65dd
SS		 1344 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1345 ((u32) scp->cmnd[3] << 16) |
1346 ((u32) scp->cmnd[4] << 8) |
1347 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1348 }
1349
1350 /*
1351 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1352 */
1353 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1354 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1355 ((u32) scp->cmnd[11] << 16) |
1356 ((u32) scp->cmnd[12] << 8) |
1357 (u32) scp->cmnd[13]);
c4a3e0a5 1358
94cd65dd
SS		 1359 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1360 ((u32) scp->cmnd[7] << 16) |
1361 ((u32) scp->cmnd[8] << 8) |
1362 (u32) scp->cmnd[9]);
c4a3e0a5 1363
94cd65dd
SS		 1364 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1365 ((u32) scp->cmnd[3] << 16) |
1366 ((u32) scp->cmnd[4] << 8) |
1367 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1368
1369 }
1370
1371 /*
1372 * Construct SGL
1373 */
f4c9a131 1374 if (instance->flag_ieee) {
94cd65dd 1375 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1376 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1377 &ldio->sgl);
1378 } else if (IS_DMA64) {
94cd65dd 1379 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1380 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1381 } else
1382 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1383
bdc6fb8d 1384 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1385 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1386 ldio->sge_count);
1387 return 0;
1388 }
1389
c4a3e0a5
BS		 1390 /*
1391 * Sense info specific
1392 */
1393 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1394 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1395 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1396
b1df99d9
SP		 1397 /*
1398 * Compute the total number of frames this command consumes. FW uses
1399 * this number to pull sufficient number of frames from host memory.
1400 */
f4c9a131
YB		 1401 cmd->frame_count = megasas_get_frame_count(instance,
1402 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1403
1404 return cmd->frame_count;
1405}
1406
1407/**
7497cde8
SS		 1408 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1409 * and whether it's RW or non RW
cb59aa6a 1410 * @scmd: SCSI command
0d49016b 1411 *
c4a3e0a5 1412 */
7497cde8 1413inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1414{
7497cde8
SS		 1415 int ret;
1416
cb59aa6a
SP		 1417 switch (cmd->cmnd[0]) {
1418 case READ_10:
1419 case WRITE_10:
1420 case READ_12:
1421 case WRITE_12:
1422 case READ_6:
1423 case WRITE_6:
1424 case READ_16:
1425 case WRITE_16:
7497cde8
SS		 1426 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1427 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1428 break;
cb59aa6a 1429 default:
7497cde8
SS		 1430 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1431 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1432 }
7497cde8 1433 return ret;
c4a3e0a5
BS		 1434}
1435
658dcedb
SP		 1436 /**
1437 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
1438 * in FW
1439 * @instance: Adapter soft state
1440 */
1441static inline void
1442megasas_dump_pending_frames(struct megasas_instance *instance)
1443{
1444 struct megasas_cmd *cmd;
1445 int i,n;
1446 union megasas_sgl *mfi_sgl;
1447 struct megasas_io_frame *ldio;
1448 struct megasas_pthru_frame *pthru;
1449 u32 sgcount;
1450 u32 max_cmd = instance->max_fw_cmds;
1451
1be18254
BH		 1452 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1453 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1454 if (IS_DMA64)
1be18254 1455 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1456 else
1be18254 1457 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1458
1be18254 1459 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1460 for (i = 0; i < max_cmd; i++) {
1461 cmd = instance->cmd_list[i];
1462 if(!cmd->scmd)
1463 continue;
1be18254 1464 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1465 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1466 ldio = (struct megasas_io_frame *)cmd->frame;
1467 mfi_sgl = &ldio->sgl;
1468 sgcount = ldio->sge_count;
1be18254 1469 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1470 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1471 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1472 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1473 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
658dcedb
SP		 1474 }
1475 else {
1476 pthru = (struct megasas_pthru_frame *) cmd->frame;
1477 mfi_sgl = &pthru->sgl;
1478 sgcount = pthru->sge_count;
1be18254 1479 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1480 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1481 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1482 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1483 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb
SP		 1484 }
1485 if(megasas_dbg_lvl & MEGASAS_DBG_LVL){
1486 for (n = 0; n < sgcount; n++){
1487 if (IS_DMA64)
1be18254 1488 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
94cd65dd
SS		 1489 le32_to_cpu(mfi_sgl->sge64[n].length),
1490 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
658dcedb 1491 else
1be18254 1492 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
94cd65dd
SS		 1493 le32_to_cpu(mfi_sgl->sge32[n].length),
1494 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1495 }
1496 }
658dcedb 1497 } /*for max_cmd*/
1be18254 1498 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1499 for (i = 0; i < max_cmd; i++) {
1500
1501 cmd = instance->cmd_list[i];
1502
1503 if(cmd->sync_cmd == 1){
1be18254 1504 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb
SP		 1505 }
1506 }
1be18254 1507 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1508}
1509
cd50ba8e
AR		 1510u32
1511megasas_build_and_issue_cmd(struct megasas_instance *instance,
1512 struct scsi_cmnd *scmd)
1513{
1514 struct megasas_cmd *cmd;
1515 u32 frame_count;
1516
1517 cmd = megasas_get_cmd(instance);
1518 if (!cmd)
1519 return SCSI_MLQUEUE_HOST_BUSY;
1520
1521 /*
1522 * Logical drive command
1523 */
7497cde8 1524 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1525 frame_count = megasas_build_ldio(instance, scmd, cmd);
1526 else
1527 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1528
1529 if (!frame_count)
1530 goto out_return_cmd;
1531
1532 cmd->scmd = scmd;
1533 scmd->SCp.ptr = (char *)cmd;
1534
1535 /*
1536 * Issue the command to the FW
1537 */
1538 atomic_inc(&instance->fw_outstanding);
1539
1540 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1541 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1542
1543 return 0;
1544out_return_cmd:
1545 megasas_return_cmd(instance, cmd);
1546 return 1;
1547}
1548
1549
c4a3e0a5
BS		 1550/**
1551 * megasas_queue_command - Queue entry point
1552 * @scmd: SCSI command to be queued
1553 * @done: Callback entry point
1554 */
1555static int
fb1a24ff 1556megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1557{
c4a3e0a5 1558 struct megasas_instance *instance;
39a98554 1559 unsigned long flags;
c4a3e0a5
BS		 1560
1561 instance = (struct megasas_instance *)
1562 scmd->device->host->hostdata;
af37acfb 1563
aa00832b
SS		 1564 if (instance->unload == 1) {
1565 scmd->result = DID_NO_CONNECT << 16;
1566 scmd->scsi_done(scmd);
1567 return 0;
1568 }
1569
39a98554 1570 if (instance->issuepend_done == 0)
af37acfb
SP		 1571 return SCSI_MLQUEUE_HOST_BUSY;
1572
39a98554 1573 spin_lock_irqsave(&instance->hba_lock, flags);
b09e66da 1574
229fe47c
AR		 1575 /* Check for an mpio path and adjust behavior */
1576 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1577 if (megasas_check_mpio_paths(instance, scmd) ==
1578 (DID_RESET << 16)) {
1579 spin_unlock_irqrestore(&instance->hba_lock, flags);
1580 return SCSI_MLQUEUE_HOST_BUSY;
1581 } else {
1582 spin_unlock_irqrestore(&instance->hba_lock, flags);
1583 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1584 scmd->scsi_done(scmd);
229fe47c
AR		 1585 return 0;
1586 }
1587 }
1588
b09e66da
SS		 1589 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1590 spin_unlock_irqrestore(&instance->hba_lock, flags);
229fe47c 1591 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1592 scmd->scsi_done(scmd);
b09e66da
SS		 1593 return 0;
1594 }
1595
39a98554 1596 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
1597 spin_unlock_irqrestore(&instance->hba_lock, flags);
1598 return SCSI_MLQUEUE_HOST_BUSY;
1599 }
1600
1601 spin_unlock_irqrestore(&instance->hba_lock, flags);
1602
c4a3e0a5
BS		 1603 scmd->result = 0;
1604
cb59aa6a 1605 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS		 1606 (scmd->device->id >= instance->fw_supported_vd_count ||
1607 scmd->device->lun)) {
cb59aa6a
SP		 1608 scmd->result = DID_BAD_TARGET << 16;
1609 goto out_done;
c4a3e0a5
BS		 1610 }
1611
02b01e01
SP		 1612 switch (scmd->cmnd[0]) {
1613 case SYNCHRONIZE_CACHE:
1614 /*
1615 * FW takes care of flush cache on its own
1616 * No need to send it down
1617 */
1618 scmd->result = DID_OK << 16;
1619 goto out_done;
1620 default:
1621 break;
1622 }
1623
cd50ba8e 1624 if (instance->instancet->build_and_issue_cmd(instance, scmd)) {
1be18254 1625 dev_err(&instance->pdev->dev, "Err returned from build_and_issue_cmd\n");
cb59aa6a 1626 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1627 }
c4a3e0a5
BS		 1628
1629 return 0;
cb59aa6a 1630
cb59aa6a 1631 out_done:
fb1a24ff 1632 scmd->scsi_done(scmd);
cb59aa6a 1633 return 0;
c4a3e0a5
BS		 1634}
1635
044833b5
YB		 1636static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1637{
1638 int i;
1639
1640 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1641
1642 if ((megasas_mgmt_info.instance[i]) &&
1643 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1644 return megasas_mgmt_info.instance[i];
1645 }
1646
1647 return NULL;
1648}
1649
147aab6a
CH		 1650static int megasas_slave_configure(struct scsi_device *sdev)
1651{
e5b3a65f 1652 /*
044833b5
YB		 1653 * The RAID firmware may require extended timeouts.
1654 */
1655 blk_queue_rq_timeout(sdev->request_queue,
1656 MEGASAS_DEFAULT_CMD_TIMEOUT * HZ);
07e38d94 1657
044833b5
YB		 1658 return 0;
1659}
1660
1661static int megasas_slave_alloc(struct scsi_device *sdev)
1662{
1663 u16 pd_index = 0;
1664 struct megasas_instance *instance ;
1665 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1666 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB		 1667 /*
1668 * Open the OS scan to the SYSTEM PD
1669 */
1670 pd_index =
1671 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1672 sdev->id;
07e38d94
SS		 1673 if (instance->pd_list[pd_index].driveState ==
1674 MR_PD_STATE_SYSTEM) {
044833b5
YB		 1675 return 0;
1676 }
1677 return -ENXIO;
1678 }
147aab6a
CH		 1679 return 0;
1680}
1681
c8dd61ef
SS		 1682/*
1683* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1684* kill adapter
1685* @instance: Adapter soft state
1686*
1687*/
6a6981fe 1688static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1689{
1690 int i;
1691 struct megasas_cmd *cmd_mfi;
1692 struct megasas_cmd_fusion *cmd_fusion;
1693 struct fusion_context *fusion = instance->ctrl_context;
1694
1695 /* Find all outstanding ioctls */
1696 if (fusion) {
1697 for (i = 0; i < instance->max_fw_cmds; i++) {
1698 cmd_fusion = fusion->cmd_list[i];
1699 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1700 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1701 if (cmd_mfi->sync_cmd &&
1702 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1703 megasas_complete_cmd(instance,
1704 cmd_mfi, DID_OK);
1705 }
1706 }
1707 } else {
1708 for (i = 0; i < instance->max_fw_cmds; i++) {
1709 cmd_mfi = instance->cmd_list[i];
1710 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1711 MFI_CMD_ABORT)
1712 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1713 }
1714 }
1715}
1716
1717
9c915a8c 1718void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1719{
c8dd61ef
SS		 1720 /* Set critical error to block I/O & ioctls in case caller didn't */
1721 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
1722 /* Wait 1 second to ensure IO or ioctls in build have posted */
1723 msleep(1000);
39a98554 1724 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef
SS		 1725 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
1726 (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
1727 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
1728 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
1729 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
1730 writel(MFI_STOP_ADP,
1731 &instance->reg_set->doorbell);
229fe47c
AR		 1732 /* Flush */
1733 readl(&instance->reg_set->doorbell);
1734 if (instance->mpio && instance->requestorId)
1735 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1736 } else {
c8dd61ef
SS		 1737 writel(MFI_STOP_ADP,
1738 &instance->reg_set->inbound_doorbell);
9c915a8c 1739 }
c8dd61ef
SS		 1740 /* Complete outstanding ioctls when adapter is killed */
1741 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 1742}
1743
1744 /**
1745 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1746 * restored to max value
1747 * @instance: Adapter soft state
1748 *
1749 */
1750void
1751megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1752{
1753 unsigned long flags;
ae09a6c1 1754
9c915a8c 1755 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 1756 && time_after(jiffies, instance->last_time + 5 * HZ)
1757 && atomic_read(&instance->fw_outstanding) <
1758 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 1759
1760 spin_lock_irqsave(instance->host->host_lock, flags);
1761 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1762
ae09a6c1 1763 instance->host->can_queue = instance->max_scsi_cmds;
9c915a8c 1764 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1765 }
1766}
1767
7343eb65 1768/**
1769 * megasas_complete_cmd_dpc - Returns FW's controller structure
1770 * @instance_addr: Address of adapter soft state
1771 *
1772 * Tasklet to complete cmds
1773 */
1774static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1775{
1776 u32 producer;
1777 u32 consumer;
1778 u32 context;
1779 struct megasas_cmd *cmd;
1780 struct megasas_instance *instance =
1781 (struct megasas_instance *)instance_addr;
1782 unsigned long flags;
1783
1784 /* If we have already declared adapter dead, donot complete cmds */
39a98554 1785 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR )
7343eb65 1786 return;
1787
1788 spin_lock_irqsave(&instance->completion_lock, flags);
1789
94cd65dd
SS		 1790 producer = le32_to_cpu(*instance->producer);
1791 consumer = le32_to_cpu(*instance->consumer);
7343eb65 1792
1793 while (consumer != producer) {
94cd65dd 1794 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 1795 if (context >= instance->max_fw_cmds) {
1be18254 1796 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 1797 context);
1798 BUG();
1799 }
7343eb65 1800
1801 cmd = instance->cmd_list[context];
1802
1803 megasas_complete_cmd(instance, cmd, DID_OK);
1804
1805 consumer++;
1806 if (consumer == (instance->max_fw_cmds + 1)) {
1807 consumer = 0;
1808 }
1809 }
1810
94cd65dd 1811 *instance->consumer = cpu_to_le32(producer);
7343eb65 1812
1813 spin_unlock_irqrestore(&instance->completion_lock, flags);
1814
1815 /*
1816 * Check if we can restore can_queue
1817 */
9c915a8c 1818 megasas_check_and_restore_queue_depth(instance);
7343eb65 1819}
1820
229fe47c
AR		 1821/**
1822 * megasas_start_timer - Initializes a timer object
1823 * @instance: Adapter soft state
1824 * @timer: timer object to be initialized
1825 * @fn: timer function
1826 * @interval: time interval between timer function call
1827 *
1828 */
1829void megasas_start_timer(struct megasas_instance *instance,
1830 struct timer_list *timer,
1831 void *fn, unsigned long interval)
1832{
1833 init_timer(timer);
1834 timer->expires = jiffies + interval;
1835 timer->data = (unsigned long)instance;
1836 timer->function = fn;
1837 add_timer(timer);
1838}
1839
707e09bd
YB		 1840static void
1841megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
1842
1843static void
1844process_fw_state_change_wq(struct work_struct *work);
1845
1846void megasas_do_ocr(struct megasas_instance *instance)
1847{
1848 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
1849 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
1850 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 1851 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 1852 }
d46a3ad6 1853 instance->instancet->disable_intr(instance);
707e09bd
YB		 1854 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
1855 instance->issuepend_done = 0;
1856
1857 atomic_set(&instance->fw_outstanding, 0);
1858 megasas_internal_reset_defer_cmds(instance);
1859 process_fw_state_change_wq(&instance->work_init);
1860}
1861
4cbfea88
AR		 1862static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
1863 int initial)
229fe47c
AR		 1864{
1865 struct megasas_cmd *cmd;
1866 struct megasas_dcmd_frame *dcmd;
229fe47c 1867 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 1868 dma_addr_t new_affiliation_111_h;
1869 int ld, retval = 0;
1870 u8 thisVf;
1871
1872 cmd = megasas_get_cmd(instance);
1873
1874 if (!cmd) {
1be18254
BH		 1875 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
1876 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 1877 instance->host->host_no);
1878 return -ENOMEM;
1879 }
1880
1881 dcmd = &cmd->frame->dcmd;
1882
4cbfea88 1883 if (!instance->vf_affiliation_111) {
1be18254
BH		 1884 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
1885 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 1886 megasas_return_cmd(instance, cmd);
1887 return -ENOMEM;
1888 }
1889
1890 if (initial)
229fe47c
AR		 1891 memset(instance->vf_affiliation_111, 0,
1892 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1893 else {
4cbfea88
AR		 1894 new_affiliation_111 =
1895 pci_alloc_consistent(instance->pdev,
1896 sizeof(struct MR_LD_VF_AFFILIATION_111),
1897 &new_affiliation_111_h);
1898 if (!new_affiliation_111) {
1be18254
BH		 1899 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
1900 "memory for new affiliation for scsi%d\n",
4cbfea88 1901 instance->host->host_no);
229fe47c
AR		 1902 megasas_return_cmd(instance, cmd);
1903 return -ENOMEM;
1904 }
4cbfea88
AR		 1905 memset(new_affiliation_111, 0,
1906 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 1907 }
1908
1909 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1910
1911 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 1912 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 1913 dcmd->sge_count = 1;
2213a467 1914 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 1915 dcmd->timeout = 0;
1916 dcmd->pad_0 = 0;
2213a467
CH		 1917 dcmd->data_xfer_len =
1918 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
1919 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 1920
4cbfea88
AR		 1921 if (initial)
1922 dcmd->sgl.sge32[0].phys_addr =
2213a467 1923 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 1924 else
2213a467
CH		 1925 dcmd->sgl.sge32[0].phys_addr =
1926 cpu_to_le32(new_affiliation_111_h);
4cbfea88 1927
2213a467
CH		 1928 dcmd->sgl.sge32[0].length = cpu_to_le32(
1929 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1930
1be18254 1931 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 1932 "scsi%d\n", instance->host->host_no);
1933
1934 megasas_issue_blocked_cmd(instance, cmd, 0);
1935
1936 if (dcmd->cmd_status) {
1be18254
BH		 1937 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
1938 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 1939 dcmd->cmd_status, instance->host->host_no);
1940 retval = 1; /* Do a scan if we couldn't get affiliation */
1941 goto out;
1942 }
1943
1944 if (!initial) {
4cbfea88
AR		 1945 thisVf = new_affiliation_111->thisVf;
1946 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
1947 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
1948 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 1949 dev_warn(&instance->pdev->dev, "SR-IOV: "
1950 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 1951 instance->host->host_no);
4cbfea88
AR		 1952 memcpy(instance->vf_affiliation_111,
1953 new_affiliation_111,
1954 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 1955 retval = 1;
1956 goto out;
1957 }
4cbfea88
AR		 1958 }
1959out:
1960 if (new_affiliation_111) {
1961 pci_free_consistent(instance->pdev,
1962 sizeof(struct MR_LD_VF_AFFILIATION_111),
1963 new_affiliation_111,
1964 new_affiliation_111_h);
1965 }
90dc9d98 1966
4026e9aa 1967 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 1968
1969 return retval;
1970}
1971
1972static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
1973 int initial)
1974{
1975 struct megasas_cmd *cmd;
1976 struct megasas_dcmd_frame *dcmd;
1977 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
1978 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
1979 dma_addr_t new_affiliation_h;
1980 int i, j, retval = 0, found = 0, doscan = 0;
1981 u8 thisVf;
1982
1983 cmd = megasas_get_cmd(instance);
1984
1985 if (!cmd) {
1be18254
BH		 1986 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
1987 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 1988 instance->host->host_no);
1989 return -ENOMEM;
1990 }
1991
1992 dcmd = &cmd->frame->dcmd;
1993
1994 if (!instance->vf_affiliation) {
1be18254
BH		 1995 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
1996 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 1997 megasas_return_cmd(instance, cmd);
1998 return -ENOMEM;
1999 }
2000
2001 if (initial)
2002 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2003 sizeof(struct MR_LD_VF_AFFILIATION));
2004 else {
2005 new_affiliation =
2006 pci_alloc_consistent(instance->pdev,
2007 (MAX_LOGICAL_DRIVES + 1) *
2008 sizeof(struct MR_LD_VF_AFFILIATION),
2009 &new_affiliation_h);
2010 if (!new_affiliation) {
1be18254
BH		 2011 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2012 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2013 instance->host->host_no);
2014 megasas_return_cmd(instance, cmd);
2015 return -ENOMEM;
2016 }
2017 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2018 sizeof(struct MR_LD_VF_AFFILIATION));
2019 }
2020
2021 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2022
2023 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2024 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2025 dcmd->sge_count = 1;
2213a467 2026 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2027 dcmd->timeout = 0;
2028 dcmd->pad_0 = 0;
2213a467
CH		 2029 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2030 sizeof(struct MR_LD_VF_AFFILIATION));
2031 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2032
2033 if (initial)
2213a467
CH		 2034 dcmd->sgl.sge32[0].phys_addr =
2035 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2036 else
2213a467
CH		 2037 dcmd->sgl.sge32[0].phys_addr =
2038 cpu_to_le32(new_affiliation_h);
4cbfea88 2039
2213a467
CH		 2040 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2041 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2042
1be18254 2043 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2044 "scsi%d\n", instance->host->host_no);
2045
2046 megasas_issue_blocked_cmd(instance, cmd, 0);
2047
2048 if (dcmd->cmd_status) {
1be18254
BH		 2049 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2050 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2051 dcmd->cmd_status, instance->host->host_no);
2052 retval = 1; /* Do a scan if we couldn't get affiliation */
2053 goto out;
2054 }
2055
2056 if (!initial) {
2057 if (!new_affiliation->ldCount) {
1be18254
BH		 2058 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2059 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2060 instance->host->host_no);
2061 retval = 1;
2062 goto out;
2063 }
2064 newmap = new_affiliation->map;
2065 savedmap = instance->vf_affiliation->map;
2066 thisVf = new_affiliation->thisVf;
2067 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2068 found = 0;
2069 for (j = 0; j < instance->vf_affiliation->ldCount;
2070 j++) {
2071 if (newmap->ref.targetId ==
2072 savedmap->ref.targetId) {
2073 found = 1;
2074 if (newmap->policy[thisVf] !=
2075 savedmap->policy[thisVf]) {
2076 doscan = 1;
2077 goto out;
2078 }
229fe47c
AR		 2079 }
2080 savedmap = (struct MR_LD_VF_MAP *)
2081 ((unsigned char *)savedmap +
2082 savedmap->size);
4cbfea88
AR		 2083 }
2084 if (!found && newmap->policy[thisVf] !=
2085 MR_LD_ACCESS_HIDDEN) {
2086 doscan = 1;
2087 goto out;
2088 }
2089 newmap = (struct MR_LD_VF_MAP *)
2090 ((unsigned char *)newmap + newmap->size);
2091 }
2092
2093 newmap = new_affiliation->map;
2094 savedmap = instance->vf_affiliation->map;
2095
2096 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2097 found = 0;
2098 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2099 if (savedmap->ref.targetId ==
2100 newmap->ref.targetId) {
2101 found = 1;
2102 if (savedmap->policy[thisVf] !=
2103 newmap->policy[thisVf]) {
2104 doscan = 1;
2105 goto out;
2106 }
2107 }
229fe47c
AR		 2108 newmap = (struct MR_LD_VF_MAP *)
2109 ((unsigned char *)newmap +
2110 newmap->size);
2111 }
4cbfea88
AR		 2112 if (!found && savedmap->policy[thisVf] !=
2113 MR_LD_ACCESS_HIDDEN) {
2114 doscan = 1;
2115 goto out;
2116 }
2117 savedmap = (struct MR_LD_VF_MAP *)
2118 ((unsigned char *)savedmap +
2119 savedmap->size);
229fe47c
AR		 2120 }
2121 }
2122out:
4cbfea88 2123 if (doscan) {
1be18254
BH		 2124 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2125 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2126 memcpy(instance->vf_affiliation, new_affiliation,
2127 new_affiliation->size);
2128 retval = 1;
229fe47c 2129 }
4cbfea88
AR		 2130
2131 if (new_affiliation)
2132 pci_free_consistent(instance->pdev,
2133 (MAX_LOGICAL_DRIVES + 1) *
2134 sizeof(struct MR_LD_VF_AFFILIATION),
2135 new_affiliation, new_affiliation_h);
4026e9aa 2136 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2137
2138 return retval;
2139}
2140
4cbfea88
AR		 2141/* This function will get the current SR-IOV LD/VF affiliation */
2142static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2143 int initial)
2144{
2145 int retval;
2146
2147 if (instance->PlasmaFW111)
2148 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2149 else
2150 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2151 return retval;
2152}
2153
229fe47c
AR		 2154/* This function will tell FW to start the SR-IOV heartbeat */
2155int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2156 int initial)
2157{
2158 struct megasas_cmd *cmd;
2159 struct megasas_dcmd_frame *dcmd;
2160 int retval = 0;
2161
2162 cmd = megasas_get_cmd(instance);
2163
2164 if (!cmd) {
1be18254
BH		 2165 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2166 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2167 instance->host->host_no);
2168 return -ENOMEM;
2169 }
2170
2171 dcmd = &cmd->frame->dcmd;
2172
2173 if (initial) {
2174 instance->hb_host_mem =
7c845eb5
JP		 2175 pci_zalloc_consistent(instance->pdev,
2176 sizeof(struct MR_CTRL_HB_HOST_MEM),
2177 &instance->hb_host_mem_h);
229fe47c 2178 if (!instance->hb_host_mem) {
1be18254
BH		 2179 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2180 " memory for heartbeat host memory for scsi%d\n",
2181 instance->host->host_no);
229fe47c
AR		 2182 retval = -ENOMEM;
2183 goto out;
2184 }
229fe47c
AR		 2185 }
2186
2187 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2188
2213a467 2189 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2190 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2191 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2192 dcmd->sge_count = 1;
2213a467 2193 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2194 dcmd->timeout = 0;
2195 dcmd->pad_0 = 0;
2213a467
CH		 2196 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2197 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2198 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2199 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2200
1be18254 2201 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2202 instance->host->host_no);
2203
4026e9aa
SS		 2204 if (instance->ctrl_context && !instance->mask_interrupts)
2205 retval = megasas_issue_blocked_cmd(instance, cmd,
2206 MEGASAS_ROUTINE_WAIT_TIME_VF);
2207 else
2208 retval = megasas_issue_polled(instance, cmd);
229fe47c 2209
4026e9aa 2210 if (retval) {
2be2a988
SS		 2211 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2212 "_MEM_ALLOC DCMD %s for scsi%d\n",
2213 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2214 "timed out" : "failed", instance->host->host_no);
229fe47c 2215 retval = 1;
229fe47c
AR		 2216 }
2217
2218out:
2219 megasas_return_cmd(instance, cmd);
2220
2221 return retval;
2222}
2223
2224/* Handler for SR-IOV heartbeat */
2225void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2226{
2227 struct megasas_instance *instance =
2228 (struct megasas_instance *)instance_addr;
2229
2230 if (instance->hb_host_mem->HB.fwCounter !=
2231 instance->hb_host_mem->HB.driverCounter) {
2232 instance->hb_host_mem->HB.driverCounter =
2233 instance->hb_host_mem->HB.fwCounter;
2234 mod_timer(&instance->sriov_heartbeat_timer,
2235 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2236 } else {
1be18254 2237 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2238 "completed for scsi%d\n", instance->host->host_no);
2239 schedule_work(&instance->work_init);
2240 }
2241}
2242
c4a3e0a5
BS		 2243/**
2244 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2245 * @instance: Adapter soft state
2246 *
25985edc 2247 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2248 * complete all its outstanding commands. Returns error if one or more IOs
2249 * are pending after this time period. It also marks the controller dead.
2250 */
2251static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2252{
2253 int i;
39a98554 2254 u32 reset_index;
c4a3e0a5 2255 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2256 u8 adprecovery;
2257 unsigned long flags;
2258 struct list_head clist_local;
2259 struct megasas_cmd *reset_cmd;
707e09bd
YB		 2260 u32 fw_state;
2261 u8 kill_adapter_flag;
39a98554 2262
2263 spin_lock_irqsave(&instance->hba_lock, flags);
2264 adprecovery = instance->adprecovery;
2265 spin_unlock_irqrestore(&instance->hba_lock, flags);
2266
2267 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
2268
2269 INIT_LIST_HEAD(&clist_local);
2270 spin_lock_irqsave(&instance->hba_lock, flags);
2271 list_splice_init(&instance->internal_reset_pending_q,
2272 &clist_local);
2273 spin_unlock_irqrestore(&instance->hba_lock, flags);
2274
1be18254 2275 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2276 for (i = 0; i < wait_time; i++) {
2277 msleep(1000);
2278 spin_lock_irqsave(&instance->hba_lock, flags);
2279 adprecovery = instance->adprecovery;
2280 spin_unlock_irqrestore(&instance->hba_lock, flags);
2281 if (adprecovery == MEGASAS_HBA_OPERATIONAL)
2282 break;
2283 }
2284
2285 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
1be18254 2286 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
39a98554 2287 spin_lock_irqsave(&instance->hba_lock, flags);
2288 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
2289 spin_unlock_irqrestore(&instance->hba_lock, flags);
2290 return FAILED;
2291 }
2292
2293 reset_index = 0;
2294 while (!list_empty(&clist_local)) {
2295 reset_cmd = list_entry((&clist_local)->next,
2296 struct megasas_cmd, list);
2297 list_del_init(&reset_cmd->list);
2298 if (reset_cmd->scmd) {
2299 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2300 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2301 reset_index, reset_cmd,
5cd049a5 2302 reset_cmd->scmd->cmnd[0]);
39a98554 2303
2304 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2305 megasas_return_cmd(instance, reset_cmd);
2306 } else if (reset_cmd->sync_cmd) {
1be18254 2307 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2308 "reset queue\n",
2309 reset_cmd);
2310
2be2a988 2311 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2312 instance->instancet->fire_cmd(instance,
2313 reset_cmd->frame_phys_addr,
2314 0, instance->reg_set);
2315 } else {
1be18254 2316 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2317 "cmds lst\n",
2318 reset_cmd);
2319 }
2320 reset_index++;
2321 }
2322
2323 return SUCCESS;
2324 }
c4a3e0a5 2325
c007b8b2 2326 for (i = 0; i < resetwaittime; i++) {
c4a3e0a5 2327
e4a082c7
SP		 2328 int outstanding = atomic_read(&instance->fw_outstanding);
2329
2330 if (!outstanding)
c4a3e0a5
BS		 2331 break;
2332
2333 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2334 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2335 "commands to complete\n",i,outstanding);
7343eb65 2336 /*
2337 * Call cmd completion routine. Cmd to be
2338 * be completed directly without depending on isr.
2339 */
2340 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2341 }
2342
2343 msleep(1000);
2344 }
2345
707e09bd
YB		 2346 i = 0;
2347 kill_adapter_flag = 0;
2348 do {
2349 fw_state = instance->instancet->read_fw_status_reg(
2350 instance->reg_set) & MFI_STATE_MASK;
2351 if ((fw_state == MFI_STATE_FAULT) &&
2352 (instance->disableOnlineCtrlReset == 0)) {
2353 if (i == 3) {
2354 kill_adapter_flag = 2;
2355 break;
2356 }
2357 megasas_do_ocr(instance);
2358 kill_adapter_flag = 1;
2359
2360 /* wait for 1 secs to let FW finish the pending cmds */
2361 msleep(1000);
2362 }
2363 i++;
2364 } while (i <= 3);
2365
2366 if (atomic_read(&instance->fw_outstanding) &&
2367 !kill_adapter_flag) {
2368 if (instance->disableOnlineCtrlReset == 0) {
2369
2370 megasas_do_ocr(instance);
2371
2372 /* wait for 5 secs to let FW finish the pending cmds */
2373 for (i = 0; i < wait_time; i++) {
2374 int outstanding =
2375 atomic_read(&instance->fw_outstanding);
2376 if (!outstanding)
2377 return SUCCESS;
2378 msleep(1000);
2379 }
2380 }
2381 }
2382
2383 if (atomic_read(&instance->fw_outstanding) ||
2384 (kill_adapter_flag == 2)) {
1be18254 2385 dev_notice(&instance->pdev->dev, "pending cmds after reset\n");
e3bbff9f
SP		 2386 /*
2387 * Send signal to FW to stop processing any pending cmds.
2388 * The controller will be taken offline by the OS now.
2389 */
0c79e681
YB		 2390 if ((instance->pdev->device ==
2391 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
2392 (instance->pdev->device ==
2393 PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
2394 writel(MFI_STOP_ADP,
9c915a8c 2395 &instance->reg_set->doorbell);
0c79e681
YB		 2396 } else {
2397 writel(MFI_STOP_ADP,
e3bbff9f 2398 &instance->reg_set->inbound_doorbell);
0c79e681 2399 }
658dcedb 2400 megasas_dump_pending_frames(instance);
39a98554 2401 spin_lock_irqsave(&instance->hba_lock, flags);
2402 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
2403 spin_unlock_irqrestore(&instance->hba_lock, flags);
c4a3e0a5
BS		 2404 return FAILED;
2405 }
2406
1be18254 2407 dev_notice(&instance->pdev->dev, "no pending cmds after reset\n");
39a98554 2408
c4a3e0a5
BS		 2409 return SUCCESS;
2410}
2411
2412/**
2413 * megasas_generic_reset - Generic reset routine
2414 * @scmd: Mid-layer SCSI command
2415 *
2416 * This routine implements a generic reset handler for device, bus and host
2417 * reset requests. Device, bus and host specific reset handlers can use this
2418 * function after they do their specific tasks.
2419 */
2420static int megasas_generic_reset(struct scsi_cmnd *scmd)
2421{
2422 int ret_val;
2423 struct megasas_instance *instance;
2424
2425 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2426
5cd049a5
CH		 2427 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2428 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2429
39a98554 2430 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2431 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2432 return FAILED;
2433 }
2434
c4a3e0a5 2435 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2436 if (ret_val == SUCCESS)
1be18254 2437 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2438 else
1be18254 2439 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2440
c4a3e0a5
BS		 2441 return ret_val;
2442}
2443
05e9ebbe
SP		 2444/**
2445 * megasas_reset_timer - quiesce the adapter if required
2446 * @scmd: scsi cmnd
2447 *
2448 * Sets the FW busy flag and reduces the host->can_queue if the
2449 * cmd has not been completed within the timeout period.
2450 */
2451static enum
242f9dcb 2452blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2453{
05e9ebbe
SP		 2454 struct megasas_instance *instance;
2455 unsigned long flags;
2456
2457 if (time_after(jiffies, scmd->jiffies_at_alloc +
2458 (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
242f9dcb 2459 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2460 }
2461
f575c5d3 2462 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2463 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2464 /* FW is busy, throttle IO */
2465 spin_lock_irqsave(instance->host->host_lock, flags);
2466
c5daa6a9 2467 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2468 instance->last_time = jiffies;
2469 instance->flag |= MEGASAS_FW_BUSY;
2470
2471 spin_unlock_irqrestore(instance->host->host_lock, flags);
2472 }
242f9dcb 2473 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2474}
2475
c4a3e0a5
BS		 2476/**
2477 * megasas_reset_device - Device reset handler entry point
2478 */
2479static int megasas_reset_device(struct scsi_cmnd *scmd)
2480{
2481 int ret;
2482
2483 /*
2484 * First wait for all commands to complete
2485 */
2486 ret = megasas_generic_reset(scmd);
2487
2488 return ret;
2489}
2490
2491/**
2492 * megasas_reset_bus_host - Bus & host reset handler entry point
2493 */
2494static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2495{
2496 int ret;
9c915a8c
AR		 2497 struct megasas_instance *instance;
2498 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS		 2499
2500 /*
80682fa9 2501 * First wait for all commands to complete
c4a3e0a5 2502 */
36807e67 2503 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 2504 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 2505 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
2506 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
229fe47c 2507 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c
AR		 2508 else
2509 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2510
2511 return ret;
2512}
2513
cf62a0a5
SP		 2514/**
2515 * megasas_bios_param - Returns disk geometry for a disk
2516 * @sdev: device handle
2517 * @bdev: block device
2518 * @capacity: drive capacity
2519 * @geom: geometry parameters
2520 */
2521static int
2522megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2523 sector_t capacity, int geom[])
2524{
2525 int heads;
2526 int sectors;
2527 sector_t cylinders;
2528 unsigned long tmp;
2529 /* Default heads (64) & sectors (32) */
2530 heads = 64;
2531 sectors = 32;
2532
2533 tmp = heads * sectors;
2534 cylinders = capacity;
2535
2536 sector_div(cylinders, tmp);
2537
2538 /*
2539 * Handle extended translation size for logical drives > 1Gb
2540 */
2541
2542 if (capacity >= 0x200000) {
2543 heads = 255;
2544 sectors = 63;
2545 tmp = heads*sectors;
2546 cylinders = capacity;
2547 sector_div(cylinders, tmp);
2548 }
2549
2550 geom[0] = heads;
2551 geom[1] = sectors;
2552 geom[2] = cylinders;
2553
2554 return 0;
2555}
2556
7e8a75f4
YB		 2557static void megasas_aen_polling(struct work_struct *work);
2558
c4a3e0a5
BS		 2559/**
2560 * megasas_service_aen - Processes an event notification
2561 * @instance: Adapter soft state
2562 * @cmd: AEN command completed by the ISR
2563 *
2564 * For AEN, driver sends a command down to FW that is held by the FW till an
2565 * event occurs. When an event of interest occurs, FW completes the command
2566 * that it was previously holding.
2567 *
2568 * This routines sends SIGIO signal to processes that have registered with the
2569 * driver for AEN.
2570 */
2571static void
2572megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2573{
c3518837 2574 unsigned long flags;
c4a3e0a5
BS		 2575 /*
2576 * Don't signal app if it is just an aborted previously registered aen
2577 */
c3518837
YB		 2578 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2579 spin_lock_irqsave(&poll_aen_lock, flags);
2580 megasas_poll_wait_aen = 1;
2581 spin_unlock_irqrestore(&poll_aen_lock, flags);
2582 wake_up(&megasas_poll_wait);
c4a3e0a5 2583 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2584 }
c4a3e0a5
BS		 2585 else
2586 cmd->abort_aen = 0;
2587
2588 instance->aen_cmd = NULL;
90dc9d98 2589
4026e9aa 2590 megasas_return_cmd(instance, cmd);
7e8a75f4 2591
39a98554 2592 if ((instance->unload == 0) &&
2593 ((instance->issuepend_done == 1))) {
7e8a75f4
YB		 2594 struct megasas_aen_event *ev;
2595 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2596 if (!ev) {
1be18254 2597 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2598 } else {
2599 ev->instance = instance;
2600 instance->ev = ev;
c1d390d8
XF		 2601 INIT_DELAYED_WORK(&ev->hotplug_work,
2602 megasas_aen_polling);
2603 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2604 }
2605 }
c4a3e0a5
BS		 2606}
2607
fc62b3fc
SS		 2608static ssize_t
2609megasas_fw_crash_buffer_store(struct device *cdev,
2610 struct device_attribute *attr, const char *buf, size_t count)
2611{
2612 struct Scsi_Host *shost = class_to_shost(cdev);
2613 struct megasas_instance *instance =
2614 (struct megasas_instance *) shost->hostdata;
2615 int val = 0;
2616 unsigned long flags;
2617
2618 if (kstrtoint(buf, 0, &val) != 0)
2619 return -EINVAL;
2620
2621 spin_lock_irqsave(&instance->crashdump_lock, flags);
2622 instance->fw_crash_buffer_offset = val;
2623 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2624 return strlen(buf);
2625}
2626
2627static ssize_t
2628megasas_fw_crash_buffer_show(struct device *cdev,
2629 struct device_attribute *attr, char *buf)
2630{
2631 struct Scsi_Host *shost = class_to_shost(cdev);
2632 struct megasas_instance *instance =
2633 (struct megasas_instance *) shost->hostdata;
2634 u32 size;
2635 unsigned long buff_addr;
2636 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2637 unsigned long src_addr;
2638 unsigned long flags;
2639 u32 buff_offset;
2640
2641 spin_lock_irqsave(&instance->crashdump_lock, flags);
2642 buff_offset = instance->fw_crash_buffer_offset;
2643 if (!instance->crash_dump_buf &&
2644 !((instance->fw_crash_state == AVAILABLE) ||
2645 (instance->fw_crash_state == COPYING))) {
2646 dev_err(&instance->pdev->dev,
2647 "Firmware crash dump is not available\n");
2648 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2649 return -EINVAL;
2650 }
2651
2652 buff_addr = (unsigned long) buf;
2653
2654 if (buff_offset >
2655 (instance->fw_crash_buffer_size * dmachunk)) {
2656 dev_err(&instance->pdev->dev,
2657 "Firmware crash dump offset is out of range\n");
2658 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2659 return 0;
2660 }
2661
2662 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2663 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2664
2665 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2666 (buff_offset % dmachunk);
2667 memcpy(buf, (void *)src_addr, size);
2668 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2669
2670 return size;
2671}
2672
2673static ssize_t
2674megasas_fw_crash_buffer_size_show(struct device *cdev,
2675 struct device_attribute *attr, char *buf)
2676{
2677 struct Scsi_Host *shost = class_to_shost(cdev);
2678 struct megasas_instance *instance =
2679 (struct megasas_instance *) shost->hostdata;
2680
2681 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2682 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2683}
2684
2685static ssize_t
2686megasas_fw_crash_state_store(struct device *cdev,
2687 struct device_attribute *attr, const char *buf, size_t count)
2688{
2689 struct Scsi_Host *shost = class_to_shost(cdev);
2690 struct megasas_instance *instance =
2691 (struct megasas_instance *) shost->hostdata;
2692 int val = 0;
2693 unsigned long flags;
2694
2695 if (kstrtoint(buf, 0, &val) != 0)
2696 return -EINVAL;
2697
2698 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2699 dev_err(&instance->pdev->dev, "application updates invalid "
2700 "firmware crash state\n");
2701 return -EINVAL;
2702 }
2703
2704 instance->fw_crash_state = val;
2705
2706 if ((val == COPIED) || (val == COPY_ERROR)) {
2707 spin_lock_irqsave(&instance->crashdump_lock, flags);
2708 megasas_free_host_crash_buffer(instance);
2709 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2710 if (val == COPY_ERROR)
2711 dev_info(&instance->pdev->dev, "application failed to "
2712 "copy Firmware crash dump\n");
2713 else
2714 dev_info(&instance->pdev->dev, "Firmware crash dump "
2715 "copied successfully\n");
2716 }
2717 return strlen(buf);
2718}
2719
2720static ssize_t
2721megasas_fw_crash_state_show(struct device *cdev,
2722 struct device_attribute *attr, char *buf)
2723{
2724 struct Scsi_Host *shost = class_to_shost(cdev);
2725 struct megasas_instance *instance =
2726 (struct megasas_instance *) shost->hostdata;
2727 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2728}
2729
2730static ssize_t
2731megasas_page_size_show(struct device *cdev,
2732 struct device_attribute *attr, char *buf)
2733{
2734 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2735}
2736
2737static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2738 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2739static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2740 megasas_fw_crash_buffer_size_show, NULL);
2741static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2742 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2743static DEVICE_ATTR(page_size, S_IRUGO,
2744 megasas_page_size_show, NULL);
2745
2746struct device_attribute *megaraid_host_attrs[] = {
2747 &dev_attr_fw_crash_buffer_size,
2748 &dev_attr_fw_crash_buffer,
2749 &dev_attr_fw_crash_state,
2750 &dev_attr_page_size,
2751 NULL,
2752};
2753
c4a3e0a5
BS		 2754/*
2755 * Scsi host template for megaraid_sas driver
2756 */
2757static struct scsi_host_template megasas_template = {
2758
2759 .module = THIS_MODULE,
43cd7fe4 2760 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2761 .proc_name = "megaraid_sas",
147aab6a 2762 .slave_configure = megasas_slave_configure,
044833b5 2763 .slave_alloc = megasas_slave_alloc,
c4a3e0a5
BS		 2764 .queuecommand = megasas_queue_command,
2765 .eh_device_reset_handler = megasas_reset_device,
2766 .eh_bus_reset_handler = megasas_reset_bus_host,
2767 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2768 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2769 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2770 .bios_param = megasas_bios_param,
c4a3e0a5 2771 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2772 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2773 .no_write_same = 1,
c4a3e0a5
BS		 2774};
2775
2776/**
2777 * megasas_complete_int_cmd - Completes an internal command
2778 * @instance: Adapter soft state
2779 * @cmd: Command to be completed
2780 *
2781 * The megasas_issue_blocked_cmd() function waits for a command to complete
2782 * after it issues a command. This function wakes up that waiting routine by
2783 * calling wake_up() on the wait queue.
2784 */
2785static void
2786megasas_complete_int_cmd(struct megasas_instance *instance,
2787 struct megasas_cmd *cmd)
2788{
2be2a988 2789 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 2790 wake_up(&instance->int_cmd_wait_q);
2791}
2792
2793/**
2794 * megasas_complete_abort - Completes aborting a command
2795 * @instance: Adapter soft state
2796 * @cmd: Cmd that was issued to abort another cmd
2797 *
0d49016b
AR		 2798 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
2799 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 2800 * wakes up all functions waiting on the same wait queue.
2801 */
2802static void
2803megasas_complete_abort(struct megasas_instance *instance,
2804 struct megasas_cmd *cmd)
2805{
2806 if (cmd->sync_cmd) {
2807 cmd->sync_cmd = 0;
2be2a988 2808 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 2809 wake_up(&instance->abort_cmd_wait_q);
2810 }
2811
2812 return;
2813}
2814
c4a3e0a5
BS		 2815/**
2816 * megasas_complete_cmd - Completes a command
2817 * @instance: Adapter soft state
2818 * @cmd: Command to be completed
0d49016b 2819 * @alt_status: If non-zero, use this value as status to
c4a3e0a5
BS		 2820 * SCSI mid-layer instead of the value returned
2821 * by the FW. This should be used if caller wants
2822 * an alternate status (as in the case of aborted
2823 * commands)
2824 */
9c915a8c 2825void
c4a3e0a5
BS		 2826megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
2827 u8 alt_status)
2828{
2829 int exception = 0;
2830 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 2831 unsigned long flags;
9c915a8c 2832 struct fusion_context *fusion = instance->ctrl_context;
94cd65dd 2833 u32 opcode;
c4a3e0a5 2834
39a98554 2835 /* flag for the retry reset */
2836 cmd->retry_for_fw_reset = 0;
2837
05e9ebbe
SP		 2838 if (cmd->scmd)
2839 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 2840
2841 switch (hdr->cmd) {
e5f93a36
AR		 2842 case MFI_CMD_INVALID:
2843 /* Some older 1068 controller FW may keep a pended
2844 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
2845 when booting the kdump kernel. Ignore this command to
2846 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 2847 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
2848 "completed\n");
2849 dev_warn(&instance->pdev->dev, "If you have a controller "
2850 "other than PERC5, please upgrade your firmware\n");
e5f93a36 2851 break;
c4a3e0a5
BS		 2852 case MFI_CMD_PD_SCSI_IO:
2853 case MFI_CMD_LD_SCSI_IO:
2854
2855 /*
2856 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
2857 * issued either through an IO path or an IOCTL path. If it
2858 * was via IOCTL, we will send it to internal completion.
2859 */
2860 if (cmd->sync_cmd) {
2861 cmd->sync_cmd = 0;
2862 megasas_complete_int_cmd(instance, cmd);
2863 break;
2864 }
2865
c4a3e0a5
BS		 2866 case MFI_CMD_LD_READ:
2867 case MFI_CMD_LD_WRITE:
2868
2869 if (alt_status) {
2870 cmd->scmd->result = alt_status << 16;
2871 exception = 1;
2872 }
2873
2874 if (exception) {
2875
e4a082c7 2876 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2877
155d98f0 2878 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2879 cmd->scmd->scsi_done(cmd->scmd);
2880 megasas_return_cmd(instance, cmd);
2881
2882 break;
2883 }
2884
2885 switch (hdr->cmd_status) {
2886
2887 case MFI_STAT_OK:
2888 cmd->scmd->result = DID_OK << 16;
2889 break;
2890
2891 case MFI_STAT_SCSI_IO_FAILED:
2892 case MFI_STAT_LD_INIT_IN_PROGRESS:
2893 cmd->scmd->result =
2894 (DID_ERROR << 16) | hdr->scsi_status;
2895 break;
2896
2897 case MFI_STAT_SCSI_DONE_WITH_ERROR:
2898
2899 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
2900
2901 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
2902 memset(cmd->scmd->sense_buffer, 0,
2903 SCSI_SENSE_BUFFERSIZE);
2904 memcpy(cmd->scmd->sense_buffer, cmd->sense,
2905 hdr->sense_len);
2906
2907 cmd->scmd->result |= DRIVER_SENSE << 24;
2908 }
2909
2910 break;
2911
2912 case MFI_STAT_LD_OFFLINE:
2913 case MFI_STAT_DEVICE_NOT_FOUND:
2914 cmd->scmd->result = DID_BAD_TARGET << 16;
2915 break;
2916
2917 default:
1be18254 2918 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 2919 hdr->cmd_status);
2920 cmd->scmd->result = DID_ERROR << 16;
2921 break;
2922 }
2923
e4a082c7 2924 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2925
155d98f0 2926 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2927 cmd->scmd->scsi_done(cmd->scmd);
2928 megasas_return_cmd(instance, cmd);
2929
2930 break;
2931
2932 case MFI_CMD_SMP:
2933 case MFI_CMD_STP:
2934 case MFI_CMD_DCMD:
94cd65dd 2935 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 2936 /* Check for LD map update */
94cd65dd
SS		 2937 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
2938 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 2939 fusion->fast_path_io = 0;
9c915a8c
AR		 2940 spin_lock_irqsave(instance->host->host_lock, flags);
2941 if (cmd->frame->hdr.cmd_status != 0) {
2942 if (cmd->frame->hdr.cmd_status !=
2943 MFI_STAT_NOT_FOUND)
1be18254 2944 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 2945 cmd->frame->hdr.cmd_status);
2946 else {
4026e9aa 2947 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 2948 spin_unlock_irqrestore(
2949 instance->host->host_lock,
2950 flags);
2951 break;
2952 }
2953 } else
2954 instance->map_id++;
4026e9aa 2955 megasas_return_cmd(instance, cmd);
bc93d425
SS		 2956
2957 /*
2958 * Set fast path IO to ZERO.
2959 * Validate Map will set proper value.
2960 * Meanwhile all IOs will go as LD IO.
2961 */
2962 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 2963 fusion->fast_path_io = 1;
2964 else
2965 fusion->fast_path_io = 0;
2966 megasas_sync_map_info(instance);
2967 spin_unlock_irqrestore(instance->host->host_lock,
2968 flags);
2969 break;
2970 }
94cd65dd
SS		 2971 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
2972 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 2973 spin_lock_irqsave(&poll_aen_lock, flags);
2974 megasas_poll_wait_aen = 0;
2975 spin_unlock_irqrestore(&poll_aen_lock, flags);
2976 }
c4a3e0a5
BS		 2977
2978 /*
2979 * See if got an event notification
2980 */
94cd65dd 2981 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 2982 megasas_service_aen(instance, cmd);
2983 else
2984 megasas_complete_int_cmd(instance, cmd);
2985
2986 break;
2987
2988 case MFI_CMD_ABORT:
2989 /*
2990 * Cmd issued to abort another cmd returned
2991 */
2992 megasas_complete_abort(instance, cmd);
2993 break;
2994
2995 default:
1be18254 2996 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 2997 hdr->cmd);
2998 break;
2999 }
3000}
3001
39a98554 3002/**
3003 * megasas_issue_pending_cmds_again - issue all pending cmds
3004 * in FW again because of the fw reset
3005 * @instance: Adapter soft state
3006 */
3007static inline void
3008megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3009{
3010 struct megasas_cmd *cmd;
3011 struct list_head clist_local;
3012 union megasas_evt_class_locale class_locale;
3013 unsigned long flags;
3014 u32 seq_num;
3015
3016 INIT_LIST_HEAD(&clist_local);
3017 spin_lock_irqsave(&instance->hba_lock, flags);
3018 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3019 spin_unlock_irqrestore(&instance->hba_lock, flags);
3020
3021 while (!list_empty(&clist_local)) {
3022 cmd = list_entry((&clist_local)->next,
3023 struct megasas_cmd, list);
3024 list_del_init(&cmd->list);
3025
3026 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3027 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3028 "detected to be pending while HBA reset\n",
39a98554 3029 cmd, cmd->scmd, cmd->sync_cmd);
3030
3031 cmd->retry_for_fw_reset++;
3032
3033 if (cmd->retry_for_fw_reset == 3) {
1be18254 3034 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3035 "was tried multiple times during reset."
3036 "Shutting down the HBA\n",
3037 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3038 instance->instancet->disable_intr(instance);
3039 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3040 megaraid_sas_kill_hba(instance);
39a98554 3041 return;
3042 }
3043 }
3044
3045 if (cmd->sync_cmd == 1) {
3046 if (cmd->scmd) {
1be18254 3047 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3048 "cmd attached to internal command!\n");
3049 }
1be18254 3050 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3051 "on the internal reset queue,"
3052 "issue it again.\n", cmd);
2be2a988 3053 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3054 instance->instancet->fire_cmd(instance,
3055 cmd->frame_phys_addr ,
3056 0, instance->reg_set);
3057 } else if (cmd->scmd) {
1be18254 3058 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3059 "detected on the internal queue, issue again.\n",
5cd049a5 3060 cmd, cmd->scmd->cmnd[0]);
39a98554 3061
3062 atomic_inc(&instance->fw_outstanding);
3063 instance->instancet->fire_cmd(instance,
3064 cmd->frame_phys_addr,
3065 cmd->frame_count-1, instance->reg_set);
3066 } else {
1be18254 3067 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3068 "internal reset defer list while re-issue!!\n",
3069 cmd);
3070 }
3071 }
3072
3073 if (instance->aen_cmd) {
1be18254 3074 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3075 megasas_return_cmd(instance, instance->aen_cmd);
3076
3077 instance->aen_cmd = NULL;
3078 }
3079
3080 /*
3081 * Initiate AEN (Asynchronous Event Notification)
3082 */
3083 seq_num = instance->last_seq_num;
3084 class_locale.members.reserved = 0;
3085 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3086 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3087
3088 megasas_register_aen(instance, seq_num, class_locale.word);
3089}
3090
3091/**
3092 * Move the internal reset pending commands to a deferred queue.
3093 *
3094 * We move the commands pending at internal reset time to a
3095 * pending queue. This queue would be flushed after successful
3096 * completion of the internal reset sequence. if the internal reset
3097 * did not complete in time, the kernel reset handler would flush
3098 * these commands.
3099 **/
3100static void
3101megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3102{
3103 struct megasas_cmd *cmd;
3104 int i;
3105 u32 max_cmd = instance->max_fw_cmds;
3106 u32 defer_index;
3107 unsigned long flags;
3108
3109 defer_index = 0;
90dc9d98 3110 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3111 for (i = 0; i < max_cmd; i++) {
3112 cmd = instance->cmd_list[i];
3113 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3114 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3115 "on the defer queue as internal\n",
3116 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3117
3118 if (!list_empty(&cmd->list)) {
1be18254 3119 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3120 " moving this cmd:%p, %d %p, it was"
3121 "discovered on some list?\n",
3122 cmd, cmd->sync_cmd, cmd->scmd);
3123
3124 list_del_init(&cmd->list);
3125 }
3126 defer_index++;
3127 list_add_tail(&cmd->list,
3128 &instance->internal_reset_pending_q);
3129 }
3130 }
90dc9d98 3131 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3132}
3133
3134
3135static void
3136process_fw_state_change_wq(struct work_struct *work)
3137{
3138 struct megasas_instance *instance =
3139 container_of(work, struct megasas_instance, work_init);
3140 u32 wait;
3141 unsigned long flags;
3142
3143 if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3144 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
39a98554 3145 instance->adprecovery);
3146 return ;
3147 }
3148
3149 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3150 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3151 "state, restarting it...\n");
3152
d46a3ad6 3153 instance->instancet->disable_intr(instance);
39a98554 3154 atomic_set(&instance->fw_outstanding, 0);
3155
3156 atomic_set(&instance->fw_reset_no_pci_access, 1);
3157 instance->instancet->adp_reset(instance, instance->reg_set);
3158 atomic_set(&instance->fw_reset_no_pci_access, 0 );
3159
1be18254 3160 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3161 "initiating next stage...\n");
3162
1be18254 3163 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3164 "state 2 starting...\n");
3165
3166 /*waitting for about 20 second before start the second init*/
3167 for (wait = 0; wait < 30; wait++) {
3168 msleep(1000);
3169 }
3170
058a8fac 3171 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3172 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3173
c8dd61ef 3174 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3175 megaraid_sas_kill_hba(instance);
39a98554 3176 return ;
3177 }
3178
3179 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3180 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3181 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3182 ) {
3183 *instance->consumer = *instance->producer;
3184 } else {
3185 *instance->consumer = 0;
3186 *instance->producer = 0;
3187 }
3188
3189 megasas_issue_init_mfi(instance);
3190
3191 spin_lock_irqsave(&instance->hba_lock, flags);
3192 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
3193 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3194 instance->instancet->enable_intr(instance);
39a98554 3195
3196 megasas_issue_pending_cmds_again(instance);
3197 instance->issuepend_done = 1;
3198 }
3199 return ;
3200}
3201
c4a3e0a5
BS		 3202/**
3203 * megasas_deplete_reply_queue - Processes all completed commands
3204 * @instance: Adapter soft state
3205 * @alt_status: Alternate status to be returned to
3206 * SCSI mid-layer instead of the status
3207 * returned by the FW
39a98554 3208 * Note: this must be called with hba lock held
c4a3e0a5 3209 */
858119e1 3210static int
39a98554 3211megasas_deplete_reply_queue(struct megasas_instance *instance,
3212 u8 alt_status)
c4a3e0a5 3213{
39a98554 3214 u32 mfiStatus;
3215 u32 fw_state;
3216
3217 if ((mfiStatus = instance->instancet->check_reset(instance,
3218 instance->reg_set)) == 1) {
3219 return IRQ_HANDLED;
3220 }
3221
3222 if ((mfiStatus = instance->instancet->clear_intr(
3223 instance->reg_set)
3224 ) == 0) {
e1419191 3225 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3226 if (!instance->msix_vectors)
e1419191 3227 return IRQ_NONE;
39a98554 3228 }
3229
3230 instance->mfiStatus = mfiStatus;
3231
3232 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3233 fw_state = instance->instancet->read_fw_status_reg(
3234 instance->reg_set) & MFI_STATE_MASK;
3235
3236 if (fw_state != MFI_STATE_FAULT) {
1be18254 3237 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3238 fw_state);
3239 }
3240
3241 if ((fw_state == MFI_STATE_FAULT) &&
3242 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3243 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3244
3245 if ((instance->pdev->device ==
3246 PCI_DEVICE_ID_LSI_SAS1064R) ||
3247 (instance->pdev->device ==
3248 PCI_DEVICE_ID_DELL_PERC5) ||
3249 (instance->pdev->device ==
3250 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3251
3252 *instance->consumer =
94cd65dd 3253 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3254 }
3255
3256
d46a3ad6 3257 instance->instancet->disable_intr(instance);
39a98554 3258 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
3259 instance->issuepend_done = 0;
3260
3261 atomic_set(&instance->fw_outstanding, 0);
3262 megasas_internal_reset_defer_cmds(instance);
3263
1be18254 3264 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
39a98554 3265 fw_state, instance->adprecovery);
3266
3267 schedule_work(&instance->work_init);
3268 return IRQ_HANDLED;
3269
3270 } else {
1be18254 3271 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3272 fw_state, instance->disableOnlineCtrlReset);
3273 }
3274 }
c4a3e0a5 3275
5d018ad0 3276 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3277 return IRQ_HANDLED;
3278}
c4a3e0a5
BS		 3279/**
3280 * megasas_isr - isr entry point
3281 */
7d12e780 3282static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3283{
c8e858fe
AR		 3284 struct megasas_irq_context *irq_context = devp;
3285 struct megasas_instance *instance = irq_context->instance;
39a98554 3286 unsigned long flags;
3287 irqreturn_t rc;
3288
c8e858fe 3289 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3290 return IRQ_HANDLED;
3291
39a98554 3292 spin_lock_irqsave(&instance->hba_lock, flags);
3293 rc = megasas_deplete_reply_queue(instance, DID_OK);
3294 spin_unlock_irqrestore(&instance->hba_lock, flags);
3295
3296 return rc;
c4a3e0a5
BS		 3297}
3298
3299/**
3300 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3301 * @instance: Adapter soft state
c4a3e0a5
BS		 3302 *
3303 * During the initialization, FW passes can potentially be in any one of
3304 * several possible states. If the FW in operational, waiting-for-handshake
3305 * states, driver must take steps to bring it to ready state. Otherwise, it
3306 * has to wait for the ready state.
3307 */
9c915a8c 3308int
058a8fac 3309megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3310{
3311 int i;
3312 u8 max_wait;
3313 u32 fw_state;
3314 u32 cur_state;
7218df69 3315 u32 abs_state, curr_abs_state;
c4a3e0a5 3316
bc6ac5e8
TH		 3317 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3318 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3319
e3bbff9f 3320 if (fw_state != MFI_STATE_READY)
1be18254 3321 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3322 " state\n");
e3bbff9f 3323
c4a3e0a5
BS		 3324 while (fw_state != MFI_STATE_READY) {
3325
c4a3e0a5
BS		 3326 switch (fw_state) {
3327
3328 case MFI_STATE_FAULT:
1be18254 3329 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3330 if (ocr) {
3331 max_wait = MEGASAS_RESET_WAIT_TIME;
3332 cur_state = MFI_STATE_FAULT;
3333 break;
3334 } else
3335 return -ENODEV;
c4a3e0a5
BS		 3336
3337 case MFI_STATE_WAIT_HANDSHAKE:
3338 /*
3339 * Set the CLR bit in inbound doorbell
3340 */
0c79e681 3341 if ((instance->pdev->device ==
87911122
YB		 3342 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3343 (instance->pdev->device ==
9c915a8c
AR		 3344 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3345 (instance->pdev->device ==
21d3c710 3346 PCI_DEVICE_ID_LSI_FUSION) ||
36807e67 3347 (instance->pdev->device ==
229fe47c
AR		 3348 PCI_DEVICE_ID_LSI_PLASMA) ||
3349 (instance->pdev->device ==
21d3c710
SS		 3350 PCI_DEVICE_ID_LSI_INVADER) ||
3351 (instance->pdev->device ==
3352 PCI_DEVICE_ID_LSI_FURY)) {
87911122
YB		 3353 writel(
3354 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3355 &instance->reg_set->doorbell);
87911122
YB		 3356 } else {
3357 writel(
3358 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3359 &instance->reg_set->inbound_doorbell);
3360 }
c4a3e0a5 3361
7218df69 3362 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3363 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3364 break;
3365
e3bbff9f 3366 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3367 if ((instance->pdev->device ==
9c915a8c
AR		 3368 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3369 (instance->pdev->device ==
3370 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3371 (instance->pdev->device ==
36807e67 3372 PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c
AR		 3373 (instance->pdev->device ==
3374 PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3375 (instance->pdev->device ==
21d3c710
SS		 3376 PCI_DEVICE_ID_LSI_INVADER) ||
3377 (instance->pdev->device ==
3378 PCI_DEVICE_ID_LSI_FURY)) {
87911122 3379 writel(MFI_INIT_HOTPLUG,
9c915a8c 3380 &instance->reg_set->doorbell);
87911122
YB		 3381 } else
3382 writel(MFI_INIT_HOTPLUG,
3383 &instance->reg_set->inbound_doorbell);
e3bbff9f 3384
7218df69 3385 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3386 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3387 break;
3388
c4a3e0a5
BS		 3389 case MFI_STATE_OPERATIONAL:
3390 /*
e3bbff9f 3391 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3392 */
d46a3ad6 3393 instance->instancet->disable_intr(instance);
87911122
YB		 3394 if ((instance->pdev->device ==
3395 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3396 (instance->pdev->device ==
9c915a8c
AR		 3397 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3398 (instance->pdev->device
36807e67 3399 == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c
AR		 3400 (instance->pdev->device
3401 == PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3402 (instance->pdev->device
21d3c710
SS		 3403 == PCI_DEVICE_ID_LSI_INVADER) ||
3404 (instance->pdev->device
3405 == PCI_DEVICE_ID_LSI_FURY)) {
87911122 3406 writel(MFI_RESET_FLAGS,
9c915a8c 3407 &instance->reg_set->doorbell);
36807e67 3408 if ((instance->pdev->device ==
21d3c710
SS		 3409 PCI_DEVICE_ID_LSI_FUSION) ||
3410 (instance->pdev->device ==
229fe47c
AR		 3411 PCI_DEVICE_ID_LSI_PLASMA) ||
3412 (instance->pdev->device ==
21d3c710
SS		 3413 PCI_DEVICE_ID_LSI_INVADER) ||
3414 (instance->pdev->device ==
3415 PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c
AR		 3416 for (i = 0; i < (10 * 1000); i += 20) {
3417 if (readl(
3418 &instance->
3419 reg_set->
3420 doorbell) & 1)
3421 msleep(20);
3422 else
3423 break;
3424 }
3425 }
87911122
YB		 3426 } else
3427 writel(MFI_RESET_FLAGS,
3428 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3429
7218df69 3430 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3431 cur_state = MFI_STATE_OPERATIONAL;
3432 break;
3433
3434 case MFI_STATE_UNDEFINED:
3435 /*
3436 * This state should not last for more than 2 seconds
3437 */
7218df69 3438 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3439 cur_state = MFI_STATE_UNDEFINED;
3440 break;
3441
3442 case MFI_STATE_BB_INIT:
7218df69 3443 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3444 cur_state = MFI_STATE_BB_INIT;
3445 break;
3446
3447 case MFI_STATE_FW_INIT:
7218df69 3448 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3449 cur_state = MFI_STATE_FW_INIT;
3450 break;
3451
3452 case MFI_STATE_FW_INIT_2:
7218df69 3453 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3454 cur_state = MFI_STATE_FW_INIT_2;
3455 break;
3456
3457 case MFI_STATE_DEVICE_SCAN:
7218df69 3458 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3459 cur_state = MFI_STATE_DEVICE_SCAN;
3460 break;
3461
3462 case MFI_STATE_FLUSH_CACHE:
7218df69 3463 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3464 cur_state = MFI_STATE_FLUSH_CACHE;
3465 break;
3466
3467 default:
1be18254 3468 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3469 fw_state);
3470 return -ENODEV;
3471 }
3472
3473 /*
3474 * The cur_state should not last for more than max_wait secs
3475 */
3476 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3477 curr_abs_state = instance->instancet->
3478 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3479
7218df69 3480 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3481 msleep(1);
3482 } else
3483 break;
3484 }
3485
3486 /*
3487 * Return error if fw_state hasn't changed after max_wait
3488 */
7218df69 3489 if (curr_abs_state == abs_state) {
1be18254 3490 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3491 "in %d secs\n", fw_state, max_wait);
3492 return -ENODEV;
3493 }
bc6ac5e8
TH		 3494
3495 abs_state = curr_abs_state;
3496 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3497 }
1be18254 3498 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3499
3500 return 0;
3501}
3502
3503/**
3504 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3505 * @instance: Adapter soft state
3506 */
3507static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3508{
3509 int i;
9c915a8c 3510 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3511 struct megasas_cmd *cmd;
3512
3513 if (!instance->frame_dma_pool)
3514 return;
3515
3516 /*
3517 * Return all frames to pool
3518 */
3519 for (i = 0; i < max_cmd; i++) {
3520
3521 cmd = instance->cmd_list[i];
3522
3523 if (cmd->frame)
3524 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3525 cmd->frame_phys_addr);
3526
3527 if (cmd->sense)
e3bbff9f 3528 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3529 cmd->sense_phys_addr);
3530 }
3531
3532 /*
3533 * Now destroy the pool itself
3534 */
3535 pci_pool_destroy(instance->frame_dma_pool);
3536 pci_pool_destroy(instance->sense_dma_pool);
3537
3538 instance->frame_dma_pool = NULL;
3539 instance->sense_dma_pool = NULL;
3540}
3541
3542/**
3543 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3544 * @instance: Adapter soft state
3545 *
3546 * Each command packet has an embedded DMA memory buffer that is used for
3547 * filling MFI frame and the SG list that immediately follows the frame. This
3548 * function creates those DMA memory buffers for each command packet by using
3549 * PCI pool facility.
3550 */
3551static int megasas_create_frame_pool(struct megasas_instance *instance)
3552{
3553 int i;
3554 u32 max_cmd;
3555 u32 sge_sz;
c4a3e0a5
BS		 3556 u32 total_sz;
3557 u32 frame_count;
3558 struct megasas_cmd *cmd;
3559
9c915a8c 3560 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3561
3562 /*
3563 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3564 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3565 */
3566 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3567 sizeof(struct megasas_sge32);
3568
f4c9a131
YB		 3569 if (instance->flag_ieee) {
3570 sge_sz = sizeof(struct megasas_sge_skinny);
3571 }
3572
c4a3e0a5 3573 /*
200aed58
SS		 3574 * For MFI controllers.
3575 * max_num_sge = 60
3576 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3577 * Total 960 byte (15 MFI frame of 64 byte)
3578 *
3579 * Fusion adapter require only 3 extra frame.
3580 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3581 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3582 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3583 */
200aed58 3584 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS		 3585 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3586 /*
3587 * Use DMA pool facility provided by PCI layer
3588 */
3589 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3590 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS		 3591
3592 if (!instance->frame_dma_pool) {
1be18254 3593 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3594 return -ENOMEM;
3595 }
3596
3597 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3598 instance->pdev, 128, 4, 0);
3599
3600 if (!instance->sense_dma_pool) {
1be18254 3601 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS		 3602
3603 pci_pool_destroy(instance->frame_dma_pool);
3604 instance->frame_dma_pool = NULL;
3605
3606 return -ENOMEM;
3607 }
3608
3609 /*
3610 * Allocate and attach a frame to each of the commands in cmd_list.
3611 * By making cmd->index as the context instead of the &cmd, we can
3612 * always use 32bit context regardless of the architecture
3613 */
3614 for (i = 0; i < max_cmd; i++) {
3615
3616 cmd = instance->cmd_list[i];
3617
3618 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3619 GFP_KERNEL, &cmd->frame_phys_addr);
3620
3621 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3622 GFP_KERNEL, &cmd->sense_phys_addr);
3623
3624 /*
3625 * megasas_teardown_frame_pool() takes care of freeing
3626 * whatever has been allocated
3627 */
3628 if (!cmd->frame || !cmd->sense) {
1be18254 3629 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS		 3630 megasas_teardown_frame_pool(instance);
3631 return -ENOMEM;
3632 }
3633
707e09bd 3634 memset(cmd->frame, 0, total_sz);
94cd65dd 3635 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3636 cmd->frame->io.pad_0 = 0;
e5f93a36 3637 if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) &&
229fe47c 3638 (instance->pdev->device != PCI_DEVICE_ID_LSI_PLASMA) &&
e5f93a36 3639 (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) &&
21d3c710 3640 (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) &&
e5f93a36
AR		 3641 (reset_devices))
3642 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3643 }
3644
3645 return 0;
3646}
3647
3648/**
3649 * megasas_free_cmds - Free all the cmds in the free cmd pool
3650 * @instance: Adapter soft state
3651 */
9c915a8c 3652void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3653{
3654 int i;
3655 /* First free the MFI frame pool */
3656 megasas_teardown_frame_pool(instance);
3657
3658 /* Free all the commands in the cmd_list */
9c915a8c
AR		 3659 for (i = 0; i < instance->max_mfi_cmds; i++)
3660
c4a3e0a5
BS		 3661 kfree(instance->cmd_list[i]);
3662
3663 /* Free the cmd_list buffer itself */
3664 kfree(instance->cmd_list);
3665 instance->cmd_list = NULL;
3666
3667 INIT_LIST_HEAD(&instance->cmd_pool);
3668}
3669
3670/**
3671 * megasas_alloc_cmds - Allocates the command packets
3672 * @instance: Adapter soft state
3673 *
3674 * Each command that is issued to the FW, whether IO commands from the OS or
3675 * internal commands like IOCTLs, are wrapped in local data structure called
3676 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3677 * the FW.
3678 *
3679 * Each frame has a 32-bit field called context (tag). This context is used
3680 * to get back the megasas_cmd from the frame when a frame gets completed in
3681 * the ISR. Typically the address of the megasas_cmd itself would be used as
3682 * the context. But we wanted to keep the differences between 32 and 64 bit
3683 * systems to the mininum. We always use 32 bit integers for the context. In
3684 * this driver, the 32 bit values are the indices into an array cmd_list.
3685 * This array is used only to look up the megasas_cmd given the context. The
3686 * free commands themselves are maintained in a linked list called cmd_pool.
3687 */
9c915a8c 3688int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3689{
3690 int i;
3691 int j;
3692 u32 max_cmd;
3693 struct megasas_cmd *cmd;
90dc9d98 3694 struct fusion_context *fusion;
c4a3e0a5 3695
90dc9d98 3696 fusion = instance->ctrl_context;
9c915a8c 3697 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3698
3699 /*
3700 * instance->cmd_list is an array of struct megasas_cmd pointers.
3701 * Allocate the dynamic array first and then allocate individual
3702 * commands.
3703 */
dd00cc48 3704 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 3705
3706 if (!instance->cmd_list) {
1be18254 3707 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 3708 return -ENOMEM;
3709 }
3710
9c915a8c 3711 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 3712
3713 for (i = 0; i < max_cmd; i++) {
3714 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3715 GFP_KERNEL);
3716
3717 if (!instance->cmd_list[i]) {
3718
3719 for (j = 0; j < i; j++)
3720 kfree(instance->cmd_list[j]);
3721
3722 kfree(instance->cmd_list);
3723 instance->cmd_list = NULL;
3724
3725 return -ENOMEM;
3726 }
3727 }
3728
c4a3e0a5
BS		 3729 for (i = 0; i < max_cmd; i++) {
3730 cmd = instance->cmd_list[i];
3731 memset(cmd, 0, sizeof(struct megasas_cmd));
3732 cmd->index = i;
39a98554 3733 cmd->scmd = NULL;
c4a3e0a5
BS		 3734 cmd->instance = instance;
3735
3736 list_add_tail(&cmd->list, &instance->cmd_pool);
3737 }
3738
3739 /*
3740 * Create a frame pool and assign one frame to each cmd
3741 */
3742 if (megasas_create_frame_pool(instance)) {
1be18254 3743 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 3744 megasas_free_cmds(instance);
3745 }
3746
3747 return 0;
3748}
3749
81e403ce
YB		 3750/*
3751 * megasas_get_pd_list_info - Returns FW's pd_list structure
3752 * @instance: Adapter soft state
3753 * @pd_list: pd_list structure
3754 *
3755 * Issues an internal command (DCMD) to get the FW's controller PD
3756 * list structure. This information is mainly used to find out SYSTEM
3757 * supported by the FW.
3758 */
3759static int
3760megasas_get_pd_list(struct megasas_instance *instance)
3761{
3762 int ret = 0, pd_index = 0;
3763 struct megasas_cmd *cmd;
3764 struct megasas_dcmd_frame *dcmd;
3765 struct MR_PD_LIST *ci;
3766 struct MR_PD_ADDRESS *pd_addr;
3767 dma_addr_t ci_h = 0;
3768
3769 cmd = megasas_get_cmd(instance);
3770
3771 if (!cmd) {
1be18254 3772 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 3773 return -ENOMEM;
3774 }
3775
3776 dcmd = &cmd->frame->dcmd;
3777
3778 ci = pci_alloc_consistent(instance->pdev,
3779 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
3780
3781 if (!ci) {
1be18254 3782 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 3783 megasas_return_cmd(instance, cmd);
3784 return -ENOMEM;
3785 }
3786
3787 memset(ci, 0, sizeof(*ci));
3788 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3789
3790 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
3791 dcmd->mbox.b[1] = 0;
3792 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3793 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 3794 dcmd->sge_count = 1;
94cd65dd 3795 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 3796 dcmd->timeout = 0;
780a3762 3797 dcmd->pad_0 = 0;
94cd65dd
SS		 3798 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
3799 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
3800 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3801 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 3802
90dc9d98
SS		 3803 if (instance->ctrl_context && !instance->mask_interrupts)
3804 ret = megasas_issue_blocked_cmd(instance, cmd,
3805 MEGASAS_BLOCKED_CMD_TIMEOUT);
3806 else
3807 ret = megasas_issue_polled(instance, cmd);
81e403ce
YB		 3808
3809 /*
3810 * the following function will get the instance PD LIST.
3811 */
3812
3813 pd_addr = ci->addr;
3814
3815 if ( ret == 0 &&
94cd65dd 3816 (le32_to_cpu(ci->count) <
81e403ce
YB		 3817 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) {
3818
999ece0a 3819 memset(instance->local_pd_list, 0,
81e403ce
YB		 3820 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
3821
94cd65dd 3822 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
81e403ce 3823
999ece0a 3824 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
94cd65dd 3825 le16_to_cpu(pd_addr->deviceId);
999ece0a 3826 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
81e403ce 3827 pd_addr->scsiDevType;
999ece0a 3828 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
81e403ce
YB		 3829 MR_PD_STATE_SYSTEM;
3830 pd_addr++;
3831 }
999ece0a
SS		 3832 memcpy(instance->pd_list, instance->local_pd_list,
3833 sizeof(instance->pd_list));
81e403ce
YB		 3834 }
3835
3836 pci_free_consistent(instance->pdev,
3837 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
3838 ci, ci_h);
90dc9d98 3839
4026e9aa 3840 megasas_return_cmd(instance, cmd);
81e403ce
YB		 3841
3842 return ret;
3843}
3844
bdc6fb8d
YB		 3845/*
3846 * megasas_get_ld_list_info - Returns FW's ld_list structure
3847 * @instance: Adapter soft state
3848 * @ld_list: ld_list structure
3849 *
3850 * Issues an internal command (DCMD) to get the FW's controller PD
3851 * list structure. This information is mainly used to find out SYSTEM
3852 * supported by the FW.
3853 */
3854static int
3855megasas_get_ld_list(struct megasas_instance *instance)
3856{
3857 int ret = 0, ld_index = 0, ids = 0;
3858 struct megasas_cmd *cmd;
3859 struct megasas_dcmd_frame *dcmd;
3860 struct MR_LD_LIST *ci;
3861 dma_addr_t ci_h = 0;
94cd65dd 3862 u32 ld_count;
bdc6fb8d
YB		 3863
3864 cmd = megasas_get_cmd(instance);
3865
3866 if (!cmd) {
1be18254 3867 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 3868 return -ENOMEM;
3869 }
3870
3871 dcmd = &cmd->frame->dcmd;
3872
3873 ci = pci_alloc_consistent(instance->pdev,
3874 sizeof(struct MR_LD_LIST),
3875 &ci_h);
3876
3877 if (!ci) {
1be18254 3878 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 3879 megasas_return_cmd(instance, cmd);
3880 return -ENOMEM;
3881 }
3882
3883 memset(ci, 0, sizeof(*ci));
3884 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3885
51087a86
SS		 3886 if (instance->supportmax256vd)
3887 dcmd->mbox.b[0] = 1;
bdc6fb8d 3888 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3889 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 3890 dcmd->sge_count = 1;
94cd65dd 3891 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 3892 dcmd->timeout = 0;
94cd65dd
SS		 3893 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
3894 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
3895 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3896 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 3897 dcmd->pad_0 = 0;
3898
90dc9d98
SS		 3899 if (instance->ctrl_context && !instance->mask_interrupts)
3900 ret = megasas_issue_blocked_cmd(instance, cmd,
3901 MEGASAS_BLOCKED_CMD_TIMEOUT);
3902 else
3903 ret = megasas_issue_polled(instance, cmd);
3904
bdc6fb8d 3905
94cd65dd
SS		 3906 ld_count = le32_to_cpu(ci->ldCount);
3907
bdc6fb8d
YB		 3908 /* the following function will get the instance PD LIST */
3909
51087a86
SS		 3910 if ((ret == 0) && (ld_count <= instance->fw_supported_vd_count)) {
3911 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 3912
94cd65dd 3913 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 3914 if (ci->ldList[ld_index].state != 0) {
3915 ids = ci->ldList[ld_index].ref.targetId;
3916 instance->ld_ids[ids] =
3917 ci->ldList[ld_index].ref.targetId;
3918 }
3919 }
3920 }
3921
3922 pci_free_consistent(instance->pdev,
3923 sizeof(struct MR_LD_LIST),
3924 ci,
3925 ci_h);
3926
4026e9aa 3927 megasas_return_cmd(instance, cmd);
bdc6fb8d
YB		 3928 return ret;
3929}
3930
21c9e160
AR		 3931/**
3932 * megasas_ld_list_query - Returns FW's ld_list structure
3933 * @instance: Adapter soft state
3934 * @ld_list: ld_list structure
3935 *
3936 * Issues an internal command (DCMD) to get the FW's controller PD
3937 * list structure. This information is mainly used to find out SYSTEM
3938 * supported by the FW.
3939 */
3940static int
3941megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
3942{
3943 int ret = 0, ld_index = 0, ids = 0;
3944 struct megasas_cmd *cmd;
3945 struct megasas_dcmd_frame *dcmd;
3946 struct MR_LD_TARGETID_LIST *ci;
3947 dma_addr_t ci_h = 0;
94cd65dd 3948 u32 tgtid_count;
21c9e160
AR		 3949
3950 cmd = megasas_get_cmd(instance);
3951
3952 if (!cmd) {
1be18254
BH		 3953 dev_warn(&instance->pdev->dev,
3954 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 3955 return -ENOMEM;
3956 }
3957
3958 dcmd = &cmd->frame->dcmd;
3959
3960 ci = pci_alloc_consistent(instance->pdev,
3961 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
3962
3963 if (!ci) {
1be18254
BH		 3964 dev_warn(&instance->pdev->dev,
3965 "Failed to alloc mem for ld_list_query\n");
21c9e160
AR		 3966 megasas_return_cmd(instance, cmd);
3967 return -ENOMEM;
3968 }
3969
3970 memset(ci, 0, sizeof(*ci));
3971 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3972
3973 dcmd->mbox.b[0] = query_type;
51087a86
SS		 3974 if (instance->supportmax256vd)
3975 dcmd->mbox.b[2] = 1;
21c9e160
AR		 3976
3977 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3978 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 3979 dcmd->sge_count = 1;
94cd65dd 3980 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 3981 dcmd->timeout = 0;
94cd65dd
SS		 3982 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
3983 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
3984 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3985 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160
AR		 3986 dcmd->pad_0 = 0;
3987
90dc9d98
SS		 3988 if (instance->ctrl_context && !instance->mask_interrupts)
3989 ret = megasas_issue_blocked_cmd(instance, cmd,
3990 MEGASAS_BLOCKED_CMD_TIMEOUT);
3991 else
3992 ret = megasas_issue_polled(instance, cmd);
21c9e160 3993
94cd65dd
SS		 3994 tgtid_count = le32_to_cpu(ci->count);
3995
51087a86 3996 if ((ret == 0) && (tgtid_count <= (instance->fw_supported_vd_count))) {
21c9e160 3997 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 3998 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 3999 ids = ci->targetId[ld_index];
4000 instance->ld_ids[ids] = ci->targetId[ld_index];
4001 }
4002
4003 }
4004
4005 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
4006 ci, ci_h);
4007
4026e9aa 4008 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4009
4010 return ret;
4011}
4012
d009b576
SS		 4013/*
4014 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4015 * instance : Controller's instance
4016*/
4017static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4018{
4019 struct fusion_context *fusion;
4020 u32 old_map_sz;
4021 u32 new_map_sz;
4022
4023 fusion = instance->ctrl_context;
4024 /* For MFI based controllers return dummy success */
4025 if (!fusion)
4026 return;
4027
4028 instance->supportmax256vd =
4029 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4030 /* Below is additional check to address future FW enhancement */
4031 if (instance->ctrl_info->max_lds > 64)
4032 instance->supportmax256vd = 1;
4033
4034 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4035 * MEGASAS_MAX_DEV_PER_CHANNEL;
4036 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4037 * MEGASAS_MAX_DEV_PER_CHANNEL;
4038 if (instance->supportmax256vd) {
4039 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4040 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4041 } else {
4042 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4043 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4044 }
d88da09a
SS		 4045
4046 dev_info(&instance->pdev->dev,
4047 "firmware type\t: %s\n",
4048 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4049 "Legacy(64 VD) firmware");
d009b576
SS		 4050
4051 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
4052 (sizeof(struct MR_LD_SPAN_MAP) *
4053 (instance->fw_supported_vd_count - 1));
4054 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4055 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
4056 (sizeof(struct MR_LD_SPAN_MAP) *
4057 (instance->drv_supported_vd_count - 1));
4058
4059 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4060
4061
4062 if (instance->supportmax256vd)
4063 fusion->current_map_sz = new_map_sz;
4064 else
4065 fusion->current_map_sz = old_map_sz;
4066
4067}
4068
c4a3e0a5
BS		 4069/**
4070 * megasas_get_controller_info - Returns FW's controller structure
4071 * @instance: Adapter soft state
c4a3e0a5
BS		 4072 *
4073 * Issues an internal command (DCMD) to get the FW's controller structure.
4074 * This information is mainly used to find out the maximum IO transfer per
4075 * command supported by the FW.
4076 */
51087a86 4077int
d009b576 4078megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4079{
4080 int ret = 0;
4081 struct megasas_cmd *cmd;
4082 struct megasas_dcmd_frame *dcmd;
4083 struct megasas_ctrl_info *ci;
d009b576 4084 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4085 dma_addr_t ci_h = 0;
4086
d009b576
SS		 4087 ctrl_info = instance->ctrl_info;
4088
c4a3e0a5
BS		 4089 cmd = megasas_get_cmd(instance);
4090
4091 if (!cmd) {
1be18254 4092 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4093 return -ENOMEM;
4094 }
4095
4096 dcmd = &cmd->frame->dcmd;
4097
4098 ci = pci_alloc_consistent(instance->pdev,
4099 sizeof(struct megasas_ctrl_info), &ci_h);
4100
4101 if (!ci) {
1be18254 4102 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4103 megasas_return_cmd(instance, cmd);
4104 return -ENOMEM;
4105 }
4106
4107 memset(ci, 0, sizeof(*ci));
4108 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4109
4110 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4111 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4112 dcmd->sge_count = 1;
94cd65dd 4113 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4114 dcmd->timeout = 0;
780a3762 4115 dcmd->pad_0 = 0;
94cd65dd
SS		 4116 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4117 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4118 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4119 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4120 dcmd->mbox.b[0] = 1;
c4a3e0a5 4121
90dc9d98
SS		 4122 if (instance->ctrl_context && !instance->mask_interrupts)
4123 ret = megasas_issue_blocked_cmd(instance, cmd,
4124 MEGASAS_BLOCKED_CMD_TIMEOUT);
4125 else
4126 ret = megasas_issue_polled(instance, cmd);
4127
d009b576 4128 if (!ret) {
c4a3e0a5 4129 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
d009b576
SS		 4130 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4131 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4132 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
4133 megasas_update_ext_vd_details(instance);
4026e9aa
SS		 4134 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4135 dev_info(&instance->pdev->dev,
4136 "controller type\t: %s(%dMB)\n",
4137 instance->is_imr ? "iMR" : "MR",
4138 le16_to_cpu(ctrl_info->memory_size));
d009b576 4139 }
c4a3e0a5
BS		 4140
4141 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4142 ci, ci_h);
4143
4026e9aa 4144 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4145 return ret;
4146}
4147
fc62b3fc
SS		 4148/*
4149 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4150 * to firmware
4151 *
4152 * @instance: Adapter soft state
4153 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4154 MR_CRASH_BUF_TURN_OFF = 0
4155 MR_CRASH_BUF_TURN_ON = 1
4156 * @return 0 on success non-zero on failure.
4157 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4158 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4159 * that driver supports crash dump feature. This DCMD will be sent only if
4160 * crash dump feature is supported by the FW.
4161 *
4162 */
4163int megasas_set_crash_dump_params(struct megasas_instance *instance,
4164 u8 crash_buf_state)
4165{
4166 int ret = 0;
4167 struct megasas_cmd *cmd;
4168 struct megasas_dcmd_frame *dcmd;
4169
4170 cmd = megasas_get_cmd(instance);
4171
4172 if (!cmd) {
4173 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4174 return -ENOMEM;
4175 }
4176
4177
4178 dcmd = &cmd->frame->dcmd;
4179
4180 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4181 dcmd->mbox.b[0] = crash_buf_state;
4182 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4183 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4184 dcmd->sge_count = 1;
4185 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4186 dcmd->timeout = 0;
4187 dcmd->pad_0 = 0;
4188 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4189 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4190 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4191 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4192
90dc9d98
SS		 4193 if (instance->ctrl_context && !instance->mask_interrupts)
4194 ret = megasas_issue_blocked_cmd(instance, cmd,
4195 MEGASAS_BLOCKED_CMD_TIMEOUT);
fc62b3fc 4196 else
90dc9d98
SS		 4197 ret = megasas_issue_polled(instance, cmd);
4198
4026e9aa 4199 megasas_return_cmd(instance, cmd);
fc62b3fc
SS		 4200 return ret;
4201}
4202
31ea7088 4203/**
4204 * megasas_issue_init_mfi - Initializes the FW
4205 * @instance: Adapter soft state
4206 *
4207 * Issues the INIT MFI cmd
4208 */
4209static int
4210megasas_issue_init_mfi(struct megasas_instance *instance)
4211{
9ab9ed38 4212 __le32 context;
31ea7088 4213
4214 struct megasas_cmd *cmd;
4215
4216 struct megasas_init_frame *init_frame;
4217 struct megasas_init_queue_info *initq_info;
4218 dma_addr_t init_frame_h;
4219 dma_addr_t initq_info_h;
4220
4221 /*
4222 * Prepare a init frame. Note the init frame points to queue info
4223 * structure. Each frame has SGL allocated after first 64 bytes. For
4224 * this frame - since we don't need any SGL - we use SGL's space as
4225 * queue info structure
4226 *
4227 * We will not get a NULL command below. We just created the pool.
4228 */
4229 cmd = megasas_get_cmd(instance);
4230
4231 init_frame = (struct megasas_init_frame *)cmd->frame;
4232 initq_info = (struct megasas_init_queue_info *)
4233 ((unsigned long)init_frame + 64);
4234
4235 init_frame_h = cmd->frame_phys_addr;
4236 initq_info_h = init_frame_h + 64;
4237
4238 context = init_frame->context;
4239 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4240 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4241 init_frame->context = context;
4242
94cd65dd
SS		 4243 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4244 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4245
94cd65dd
SS		 4246 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4247 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4248
4249 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4250 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4251 init_frame->queue_info_new_phys_addr_lo =
4252 cpu_to_le32(lower_32_bits(initq_info_h));
4253 init_frame->queue_info_new_phys_addr_hi =
4254 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4255
94cd65dd 4256 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4257
4258 /*
4259 * disable the intr before firing the init frame to FW
4260 */
d46a3ad6 4261 instance->instancet->disable_intr(instance);
31ea7088 4262
4263 /*
4264 * Issue the init frame in polled mode
4265 */
4266
4267 if (megasas_issue_polled(instance, cmd)) {
1be18254 4268 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4269 megasas_return_cmd(instance, cmd);
4270 goto fail_fw_init;
4271 }
4272
4273 megasas_return_cmd(instance, cmd);
4274
4275 return 0;
4276
4277fail_fw_init:
4278 return -EINVAL;
4279}
4280
cd50ba8e
AR		 4281static u32
4282megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4283{
cd50ba8e 4284 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4285 u32 context_sz;
4286 u32 reply_q_sz;
c4a3e0a5
BS		 4287
4288 reg_set = instance->reg_set;
4289
c4a3e0a5
BS		 4290 /*
4291 * Get various operational parameters from status register
4292 */
1341c939 4293 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4294 /*
4295 * Reduce the max supported cmds by 1. This is to ensure that the
4296 * reply_q_sz (1 more than the max cmd that driver may send)
4297 * does not exceed max cmds that the FW can support
4298 */
4299 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4300 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4301 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4302 0x10;
f26ac3a1
SS		 4303 /*
4304 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4305 * are reserved for IOCTL + driver's internal DCMDs.
4306 */
4307 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4308 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4309 instance->max_scsi_cmds = (instance->max_fw_cmds -
4310 MEGASAS_SKINNY_INT_CMDS);
4311 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4312 } else {
4313 instance->max_scsi_cmds = (instance->max_fw_cmds -
4314 MEGASAS_INT_CMDS);
4315 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4316 }
4317
c4a3e0a5
BS		 4318 /*
4319 * Create a pool of commands
4320 */
4321 if (megasas_alloc_cmds(instance))
4322 goto fail_alloc_cmds;
4323
4324 /*
4325 * Allocate memory for reply queue. Length of reply queue should
4326 * be _one_ more than the maximum commands handled by the firmware.
4327 *
4328 * Note: When FW completes commands, it places corresponding contex
4329 * values in this circular reply queue. This circular queue is a fairly
4330 * typical producer-consumer queue. FW is the producer (of completed
4331 * commands) and the driver is the consumer.
4332 */
4333 context_sz = sizeof(u32);
4334 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4335
4336 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4337 reply_q_sz,
4338 &instance->reply_queue_h);
4339
4340 if (!instance->reply_queue) {
1be18254 4341 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4342 goto fail_reply_queue;
4343 }
4344
31ea7088 4345 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4346 goto fail_fw_init;
c4a3e0a5 4347
d009b576 4348 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4349 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4350 "Fail from %s %d\n", instance->unique_id,
4351 __func__, __LINE__);
4352 goto fail_fw_init;
4353 }
4354
39a98554 4355 instance->fw_support_ieee = 0;
4356 instance->fw_support_ieee =
4357 (instance->instancet->read_fw_status_reg(reg_set) &
4358 0x04000000);
4359
1be18254 4360 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4361 instance->fw_support_ieee);
4362
4363 if (instance->fw_support_ieee)
4364 instance->flag_ieee = 1;
4365
cd50ba8e
AR		 4366 return 0;
4367
4368fail_fw_init:
4369
4370 pci_free_consistent(instance->pdev, reply_q_sz,
4371 instance->reply_queue, instance->reply_queue_h);
4372fail_reply_queue:
4373 megasas_free_cmds(instance);
4374
4375fail_alloc_cmds:
cd50ba8e
AR		 4376 return 1;
4377}
4378
d3557fc8
SS		 4379/*
4380 * megasas_setup_irqs_msix - register legacy interrupts.
4381 * @instance: Adapter soft state
4382 *
4383 * Do not enable interrupt, only setup ISRs.
4384 *
4385 * Return 0 on success.
4386 */
4387static int
4388megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4389{
4390 struct pci_dev *pdev;
4391
4392 pdev = instance->pdev;
4393 instance->irq_context[0].instance = instance;
4394 instance->irq_context[0].MSIxIndex = 0;
4395 if (request_irq(pdev->irq, instance->instancet->service_isr,
4396 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4397 dev_err(&instance->pdev->dev,
4398 "Failed to register IRQ from %s %d\n",
4399 __func__, __LINE__);
4400 return -1;
4401 }
4402 return 0;
4403}
4404
4405/**
4406 * megasas_setup_irqs_msix - register MSI-x interrupts.
4407 * @instance: Adapter soft state
4408 * @is_probe: Driver probe check
4409 *
4410 * Do not enable interrupt, only setup ISRs.
4411 *
4412 * Return 0 on success.
4413 */
4414static int
4415megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4416{
4417 int i, j, cpu;
4418 struct pci_dev *pdev;
4419
4420 pdev = instance->pdev;
4421
4422 /* Try MSI-x */
4423 cpu = cpumask_first(cpu_online_mask);
4424 for (i = 0; i < instance->msix_vectors; i++) {
4425 instance->irq_context[i].instance = instance;
4426 instance->irq_context[i].MSIxIndex = i;
4427 if (request_irq(instance->msixentry[i].vector,
4428 instance->instancet->service_isr, 0, "megasas",
4429 &instance->irq_context[i])) {
4430 dev_err(&instance->pdev->dev,
4431 "Failed to register IRQ for vector %d.\n", i);
4432 for (j = 0; j < i; j++) {
4433 if (smp_affinity_enable)
4434 irq_set_affinity_hint(
4435 instance->msixentry[j].vector, NULL);
4436 free_irq(instance->msixentry[j].vector,
4437 &instance->irq_context[j]);
4438 }
4439 /* Retry irq register for IO_APIC*/
4440 instance->msix_vectors = 0;
4441 if (is_probe)
4442 return megasas_setup_irqs_ioapic(instance);
4443 else
4444 return -1;
4445 }
4446 if (smp_affinity_enable) {
4447 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4448 get_cpu_mask(cpu)))
4449 dev_err(&instance->pdev->dev,
4450 "Failed to set affinity hint"
4451 " for cpu %d\n", cpu);
4452 cpu = cpumask_next(cpu, cpu_online_mask);
4453 }
4454 }
4455 return 0;
4456}
4457
4458/*
4459 * megasas_destroy_irqs- unregister interrupts.
4460 * @instance: Adapter soft state
4461 * return: void
4462 */
4463static void
4464megasas_destroy_irqs(struct megasas_instance *instance) {
4465
4466 int i;
4467
4468 if (instance->msix_vectors)
4469 for (i = 0; i < instance->msix_vectors; i++) {
4470 if (smp_affinity_enable)
4471 irq_set_affinity_hint(
4472 instance->msixentry[i].vector, NULL);
4473 free_irq(instance->msixentry[i].vector,
4474 &instance->irq_context[i]);
4475 }
4476 else
4477 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4478}
4479
cd50ba8e
AR		 4480/**
4481 * megasas_init_fw - Initializes the FW
4482 * @instance: Adapter soft state
4483 *
4484 * This is the main function for initializing firmware
4485 */
4486
4487static int megasas_init_fw(struct megasas_instance *instance)
4488{
4489 u32 max_sectors_1;
4490 u32 max_sectors_2;
d46a3ad6 4491 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4492 resource_size_t base_addr;
cd50ba8e 4493 struct megasas_register_set __iomem *reg_set;
51087a86 4494 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4495 unsigned long bar_list;
d46a3ad6 4496 int i, loop, fw_msix_count = 0;
229fe47c 4497 struct IOV_111 *iovPtr;
cd50ba8e
AR		 4498
4499 /* Find first memory bar */
4500 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
4501 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e
AR		 4502 if (pci_request_selected_regions(instance->pdev, instance->bar,
4503 "megasas: LSI")) {
1be18254 4504 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 4505 return -EBUSY;
4506 }
4507
11f8a7b3
BC		 4508 base_addr = pci_resource_start(instance->pdev, instance->bar);
4509 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 4510
4511 if (!instance->reg_set) {
1be18254 4512 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 4513 goto fail_ioremap;
4514 }
4515
4516 reg_set = instance->reg_set;
4517
4518 switch (instance->pdev->device) {
9c915a8c 4519 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 4520 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 4521 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 4522 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c
AR		 4523 instance->instancet = &megasas_instance_template_fusion;
4524 break;
cd50ba8e
AR		 4525 case PCI_DEVICE_ID_LSI_SAS1078R:
4526 case PCI_DEVICE_ID_LSI_SAS1078DE:
4527 instance->instancet = &megasas_instance_template_ppc;
4528 break;
4529 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
4530 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
4531 instance->instancet = &megasas_instance_template_gen2;
4532 break;
4533 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
4534 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
4535 instance->instancet = &megasas_instance_template_skinny;
4536 break;
4537 case PCI_DEVICE_ID_LSI_SAS1064R:
4538 case PCI_DEVICE_ID_DELL_PERC5:
4539 default:
4540 instance->instancet = &megasas_instance_template_xscale;
4541 break;
4542 }
4543
6431f5d7
SS		 4544 if (megasas_transition_to_ready(instance, 0)) {
4545 atomic_set(&instance->fw_reset_no_pci_access, 1);
4546 instance->instancet->adp_reset
4547 (instance, instance->reg_set);
4548 atomic_set(&instance->fw_reset_no_pci_access, 0);
4549 dev_info(&instance->pdev->dev,
1be18254 4550 "FW restarted successfully from %s!\n",
6431f5d7
SS		 4551 __func__);
4552
4553 /*waitting for about 30 second before retry*/
4554 ssleep(30);
4555
4556 if (megasas_transition_to_ready(instance, 0))
4557 goto fail_ready_state;
4558 }
cd50ba8e 4559
d46a3ad6
SS		 4560 /*
4561 * MSI-X host index 0 is common for all adapter.
4562 * It is used for all MPT based Adapters.
4563 */
4564 instance->reply_post_host_index_addr[0] =
8a232bb3 4565 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4566 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
4567
3f1abce4
AR		 4568 /* Check if MSI-X is supported while in ready state */
4569 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
4570 0x4000000) >> 0x1a;
c8e858fe 4571 if (msix_enable && !msix_disable) {
d46a3ad6
SS		 4572 scratch_pad_2 = readl
4573 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 4574 /* Check max MSI-X vectors */
229fe47c
AR		 4575 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
4576 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA)) {
d46a3ad6
SS		 4577 instance->msix_vectors = (scratch_pad_2
4578 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
4579 fw_msix_count = instance->msix_vectors;
079eaddf
AR		 4580 if (msix_vectors)
4581 instance->msix_vectors =
4582 min(msix_vectors,
4583 instance->msix_vectors);
d46a3ad6
SS		 4584 } else if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER)
4585 || (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
4586 /* Invader/Fury supports more than 8 MSI-X */
4587 instance->msix_vectors = ((scratch_pad_2
4588 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
4589 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
4590 fw_msix_count = instance->msix_vectors;
4591 /* Save 1-15 reply post index address to local memory
4592 * Index 0 is already saved from reg offset
4593 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
4594 */
4595 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
4596 instance->reply_post_host_index_addr[loop] =
8a232bb3
CH		 4597 (u32 __iomem *)
4598 ((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4599 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
4600 + (loop * 0x10));
4601 }
4602 if (msix_vectors)
4603 instance->msix_vectors = min(msix_vectors,
4604 instance->msix_vectors);
c8e858fe
AR		 4605 } else
4606 instance->msix_vectors = 1;
4607 /* Don't bother allocating more MSI-X vectors than cpus */
4608 instance->msix_vectors = min(instance->msix_vectors,
4609 (unsigned int)num_online_cpus());
4610 for (i = 0; i < instance->msix_vectors; i++)
4611 instance->msixentry[i].entry = i;
8ae80ed1
AG		 4612 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
4613 1, instance->msix_vectors);
c12de882 4614 if (i > 0)
8ae80ed1
AG		 4615 instance->msix_vectors = i;
4616 else
c8e858fe
AR		 4617 instance->msix_vectors = 0;
4618 }
3f1abce4 4619
258c3af2
TH		 4620 dev_info(&instance->pdev->dev,
4621 "firmware supports msix\t: (%d)", fw_msix_count);
4622 dev_info(&instance->pdev->dev,
4623 "current msix/online cpus\t: (%d/%d)\n",
4624 instance->msix_vectors, (unsigned int)num_online_cpus());
d3557fc8 4625
258c3af2
TH		 4626 if (instance->msix_vectors ?
4627 megasas_setup_irqs_msix(instance, 1) :
4628 megasas_setup_irqs_ioapic(instance))
4629 goto fail_setup_irqs;
3f1abce4 4630
51087a86
SS		 4631 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
4632 GFP_KERNEL);
4633 if (instance->ctrl_info == NULL)
4634 goto fail_init_adapter;
4635
4636 /*
4637 * Below are default value for legacy Firmware.
4638 * non-fusion based controllers
4639 */
4640 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4641 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 4642 /* Get operational params, sge flags, send init cmd to controller */
4643 if (instance->instancet->init_adapter(instance))
eb1b1237 4644 goto fail_init_adapter;
cd50ba8e 4645
258c3af2
TH		 4646 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
4647 (unsigned long)instance);
4648
d3557fc8 4649 instance->instancet->enable_intr(instance);
cd50ba8e 4650
1be18254 4651 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 4652
39a98554 4653 /** for passthrough
4654 * the following function will get the PD LIST.
4655 */
4656
81e403ce
YB		 4657 memset(instance->pd_list, 0 ,
4658 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 4659 if (megasas_get_pd_list(instance) < 0) {
1be18254 4660 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 4661 goto fail_get_pd_list;
58968fc8 4662 }
81e403ce 4663
bdc6fb8d 4664 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160
AR		 4665 if (megasas_ld_list_query(instance,
4666 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
4667 megasas_get_ld_list(instance);
bdc6fb8d 4668
c4a3e0a5
BS		 4669 /*
4670 * Compute the max allowed sectors per IO: The controller info has two
4671 * limits on max sectors. Driver should use the minimum of these two.
4672 *
4673 * 1 << stripe_sz_ops.min = max sectors per strip
4674 *
4675 * Note that older firmwares ( < FW ver 30) didn't report information
4676 * to calculate max_sectors_1. So the number ended up as zero always.
4677 */
14faea9f 4678 tmp_sectors = 0;
51087a86 4679 ctrl_info = instance->ctrl_info;
c4a3e0a5 4680
51087a86
SS		 4681 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
4682 le16_to_cpu(ctrl_info->max_strips_per_io);
4683 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 4684
51087a86 4685 tmp_sectors = min_t(u32, max_sectors_1 , max_sectors_2);
bc93d425 4686
51087a86
SS		 4687 instance->disableOnlineCtrlReset =
4688 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
51087a86
SS		 4689 instance->mpio = ctrl_info->adapterOperations2.mpio;
4690 instance->UnevenSpanSupport =
4691 ctrl_info->adapterOperations2.supportUnevenSpans;
4692 if (instance->UnevenSpanSupport) {
4693 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 4694 if (MR_ValidateMapInfo(instance))
4695 fusion->fast_path_io = 1;
4696 else
4697 fusion->fast_path_io = 0;
fc62b3fc 4698
51087a86
SS		 4699 }
4700 if (ctrl_info->host_interface.SRIOV) {
4701 if (!ctrl_info->adapterOperations2.activePassive)
4702 instance->PlasmaFW111 = 1;
fc62b3fc 4703
51087a86
SS		 4704 if (!instance->PlasmaFW111)
4705 instance->requestorId =
4706 ctrl_info->iov.requestorId;
4707 else {
4708 iovPtr = (struct IOV_111 *)((unsigned char *)ctrl_info + IOV_111_OFFSET);
4709 instance->requestorId = iovPtr->requestorId;
fc62b3fc 4710 }
51087a86
SS		 4711 dev_warn(&instance->pdev->dev, "I am VF "
4712 "requestorId %d\n", instance->requestorId);
4713 }
4714
51087a86
SS		 4715 instance->crash_dump_fw_support =
4716 ctrl_info->adapterOperations3.supportCrashDump;
4717 instance->crash_dump_drv_support =
4718 (instance->crash_dump_fw_support &&
4719 instance->crash_dump_buf);
d88da09a 4720 if (instance->crash_dump_drv_support)
51087a86
SS		 4721 megasas_set_crash_dump_params(instance,
4722 MR_CRASH_BUF_TURN_OFF);
4723
d88da09a 4724 else {
51087a86
SS		 4725 if (instance->crash_dump_buf)
4726 pci_free_consistent(instance->pdev,
4727 CRASH_DMA_BUF_SIZE,
4728 instance->crash_dump_buf,
4729 instance->crash_dump_h);
4730 instance->crash_dump_buf = NULL;
14faea9f 4731 }
7497cde8
SS		 4732
4733 instance->secure_jbod_support =
4734 ctrl_info->adapterOperations3.supportSecurityonJBOD;
d88da09a
SS		 4735
4736 dev_info(&instance->pdev->dev,
4737 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
4738 le16_to_cpu(ctrl_info->pci.vendor_id),
4739 le16_to_cpu(ctrl_info->pci.device_id),
4740 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
4741 le16_to_cpu(ctrl_info->pci.sub_device_id));
4742 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
4743 instance->UnevenSpanSupport ? "yes" : "no");
4744 dev_info(&instance->pdev->dev, "disable ocr : %s\n",
4745 instance->disableOnlineCtrlReset ? "yes" : "no");
4746 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
4747 instance->crash_dump_drv_support ? "yes" : "no");
4748 dev_info(&instance->pdev->dev, "secure jbod : %s\n",
4749 instance->secure_jbod_support ? "yes" : "no");
4750
4751
14faea9f 4752 instance->max_sectors_per_req = instance->max_num_sge *
4753 PAGE_SIZE / 512;
4754 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
4755 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 4756
ae09a6c1
SS		 4757 /* Check for valid throttlequeuedepth module parameter */
4758 if (throttlequeuedepth &&
4759 throttlequeuedepth <= instance->max_scsi_cmds)
4760 instance->throttlequeuedepth = throttlequeuedepth;
4761 else
4762 instance->throttlequeuedepth =
4763 MEGASAS_THROTTLE_QUEUE_DEPTH;
4764
ad84db2e 4765
229fe47c
AR		 4766 /* Launch SR-IOV heartbeat timer */
4767 if (instance->requestorId) {
4768 if (!megasas_sriov_start_heartbeat(instance, 1))
4769 megasas_start_timer(instance,
4770 &instance->sriov_heartbeat_timer,
4771 megasas_sriov_heartbeat_handler,
4772 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
4773 else
4774 instance->skip_heartbeat_timer_del = 1;
4775 }
4776
c4a3e0a5
BS		 4777 return 0;
4778
d3557fc8
SS		 4779fail_get_pd_list:
4780 instance->instancet->disable_intr(instance);
eb1b1237 4781fail_init_adapter:
d3557fc8
SS		 4782 megasas_destroy_irqs(instance);
4783fail_setup_irqs:
4784 if (instance->msix_vectors)
4785 pci_disable_msix(instance->pdev);
4786 instance->msix_vectors = 0;
cd50ba8e 4787fail_ready_state:
51087a86
SS		 4788 kfree(instance->ctrl_info);
4789 instance->ctrl_info = NULL;
c4a3e0a5
BS		 4790 iounmap(instance->reg_set);
4791
4792 fail_ioremap:
b6d5d880 4793 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4794
4795 return -EINVAL;
4796}
4797
4798/**
4799 * megasas_release_mfi - Reverses the FW initialization
4b63b286 4800 * @instance: Adapter soft state
c4a3e0a5
BS		 4801 */
4802static void megasas_release_mfi(struct megasas_instance *instance)
4803{
9c915a8c 4804 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 4805
9c915a8c
AR		 4806 if (instance->reply_queue)
4807 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 4808 instance->reply_queue, instance->reply_queue_h);
4809
4810 megasas_free_cmds(instance);
4811
4812 iounmap(instance->reg_set);
4813
b6d5d880 4814 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4815}
4816
4817/**
4818 * megasas_get_seq_num - Gets latest event sequence numbers
4819 * @instance: Adapter soft state
4820 * @eli: FW event log sequence numbers information
4821 *
4822 * FW maintains a log of all events in a non-volatile area. Upper layers would
4823 * usually find out the latest sequence number of the events, the seq number at
4824 * the boot etc. They would "read" all the events below the latest seq number
4825 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
4826 * number), they would subsribe to AEN (asynchronous event notification) and
4827 * wait for the events to happen.
4828 */
4829static int
4830megasas_get_seq_num(struct megasas_instance *instance,
4831 struct megasas_evt_log_info *eli)
4832{
4833 struct megasas_cmd *cmd;
4834 struct megasas_dcmd_frame *dcmd;
4835 struct megasas_evt_log_info *el_info;
4836 dma_addr_t el_info_h = 0;
4837
4838 cmd = megasas_get_cmd(instance);
4839
4840 if (!cmd) {
4841 return -ENOMEM;
4842 }
4843
4844 dcmd = &cmd->frame->dcmd;
4845 el_info = pci_alloc_consistent(instance->pdev,
4846 sizeof(struct megasas_evt_log_info),
4847 &el_info_h);
4848
4849 if (!el_info) {
4850 megasas_return_cmd(instance, cmd);
4851 return -ENOMEM;
4852 }
4853
4854 memset(el_info, 0, sizeof(*el_info));
4855 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4856
4857 dcmd->cmd = MFI_CMD_DCMD;
4858 dcmd->cmd_status = 0x0;
4859 dcmd->sge_count = 1;
94cd65dd 4860 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4861 dcmd->timeout = 0;
780a3762 4862 dcmd->pad_0 = 0;
94cd65dd
SS		 4863 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
4864 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
4865 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
4866 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 4867
cfbe7554
SS		 4868 if (megasas_issue_blocked_cmd(instance, cmd, 30))
4869 dev_err(&instance->pdev->dev, "Command timedout"
4870 "from %s\n", __func__);
4871 else {
4872 /*
4873 * Copy the data back into callers buffer
4874 */
48100b0e
CH		 4875 eli->newest_seq_num = el_info->newest_seq_num;
4876 eli->oldest_seq_num = el_info->oldest_seq_num;
4877 eli->clear_seq_num = el_info->clear_seq_num;
4878 eli->shutdown_seq_num = el_info->shutdown_seq_num;
4879 eli->boot_seq_num = el_info->boot_seq_num;
cfbe7554 4880 }
c4a3e0a5
BS		 4881
4882 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
4883 el_info, el_info_h);
4884
4026e9aa 4885 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4886
4887 return 0;
4888}
4889
4890/**
4891 * megasas_register_aen - Registers for asynchronous event notification
4892 * @instance: Adapter soft state
4893 * @seq_num: The starting sequence number
4894 * @class_locale: Class of the event
4895 *
4896 * This function subscribes for AEN for events beyond the @seq_num. It requests
4897 * to be notified if and only if the event is of type @class_locale
4898 */
4899static int
4900megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
4901 u32 class_locale_word)
4902{
4903 int ret_val;
4904 struct megasas_cmd *cmd;
4905 struct megasas_dcmd_frame *dcmd;
4906 union megasas_evt_class_locale curr_aen;
4907 union megasas_evt_class_locale prev_aen;
4908
4909 /*
4910 * If there an AEN pending already (aen_cmd), check if the
4911 * class_locale of that pending AEN is inclusive of the new
4912 * AEN request we currently have. If it is, then we don't have
4913 * to do anything. In other words, whichever events the current
4914 * AEN request is subscribing to, have already been subscribed
4915 * to.
4916 *
4917 * If the old_cmd is _not_ inclusive, then we have to abort
4918 * that command, form a class_locale that is superset of both
4919 * old and current and re-issue to the FW
4920 */
4921
4922 curr_aen.word = class_locale_word;
4923
4924 if (instance->aen_cmd) {
4925
a9555534
CH		 4926 prev_aen.word =
4927 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS		 4928
4929 /*
4930 * A class whose enum value is smaller is inclusive of all
4931 * higher values. If a PROGRESS (= -1) was previously
4932 * registered, then a new registration requests for higher
4933 * classes need not be sent to FW. They are automatically
4934 * included.
4935 *
4936 * Locale numbers don't have such hierarchy. They are bitmap
4937 * values
4938 */
4939 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 4940 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 4941 curr_aen.members.locale)) {
4942 /*
4943 * Previously issued event registration includes
4944 * current request. Nothing to do.
4945 */
4946 return 0;
4947 } else {
3993a862 4948 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 4949
4950 if (prev_aen.members.class < curr_aen.members.class)
4951 curr_aen.members.class = prev_aen.members.class;
4952
4953 instance->aen_cmd->abort_aen = 1;
4954 ret_val = megasas_issue_blocked_abort_cmd(instance,
4955 instance->
cfbe7554 4956 aen_cmd, 30);
c4a3e0a5
BS		 4957
4958 if (ret_val) {
1be18254 4959 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 4960 "previous AEN command\n");
4961 return ret_val;
4962 }
4963 }
4964 }
4965
4966 cmd = megasas_get_cmd(instance);
4967
4968 if (!cmd)
4969 return -ENOMEM;
4970
4971 dcmd = &cmd->frame->dcmd;
4972
4973 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
4974
4975 /*
4976 * Prepare DCMD for aen registration
4977 */
4978 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4979
4980 dcmd->cmd = MFI_CMD_DCMD;
4981 dcmd->cmd_status = 0x0;
4982 dcmd->sge_count = 1;
94cd65dd 4983 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4984 dcmd->timeout = 0;
780a3762 4985 dcmd->pad_0 = 0;
94cd65dd
SS		 4986 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
4987 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
4988 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 4989 instance->last_seq_num = seq_num;
94cd65dd
SS		 4990 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
4991 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
4992 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 4993
f4c9a131
YB		 4994 if (instance->aen_cmd != NULL) {
4995 megasas_return_cmd(instance, cmd);
4996 return 0;
4997 }
4998
c4a3e0a5
BS		 4999 /*
5000 * Store reference to the cmd used to register for AEN. When an
5001 * application wants us to register for AEN, we have to abort this
5002 * cmd and re-register with a new EVENT LOCALE supplied by that app
5003 */
5004 instance->aen_cmd = cmd;
5005
5006 /*
5007 * Issue the aen registration frame
5008 */
9c915a8c 5009 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5010
5011 return 0;
5012}
5013
5014/**
5015 * megasas_start_aen - Subscribes to AEN during driver load time
5016 * @instance: Adapter soft state
5017 */
5018static int megasas_start_aen(struct megasas_instance *instance)
5019{
5020 struct megasas_evt_log_info eli;
5021 union megasas_evt_class_locale class_locale;
5022
5023 /*
5024 * Get the latest sequence number from FW
5025 */
5026 memset(&eli, 0, sizeof(eli));
5027
5028 if (megasas_get_seq_num(instance, &eli))
5029 return -1;
5030
5031 /*
5032 * Register AEN with FW for latest sequence number plus 1
5033 */
5034 class_locale.members.reserved = 0;
5035 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5036 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5037
94cd65dd 5038 return megasas_register_aen(instance,
48100b0e 5039 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5040 class_locale.word);
c4a3e0a5
BS		 5041}
5042
5043/**
5044 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5045 * @instance: Adapter soft state
5046 */
5047static int megasas_io_attach(struct megasas_instance *instance)
5048{
5049 struct Scsi_Host *host = instance->host;
4026e9aa 5050 u32 error;
c4a3e0a5
BS		 5051
5052 /*
5053 * Export parameters required by SCSI mid-layer
5054 */
5055 host->irq = instance->pdev->irq;
5056 host->unique_id = instance->unique_id;
ae09a6c1 5057 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5058 host->this_id = instance->init_id;
5059 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5060
5061 if (instance->fw_support_ieee)
5062 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5063
1fd10685
YB		 5064 /*
5065 * Check if the module parameter value for max_sectors can be used
5066 */
5067 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5068 instance->max_sectors_per_req = max_sectors;
5069 else {
5070 if (max_sectors) {
5071 if (((instance->pdev->device ==
5072 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5073 (instance->pdev->device ==
5074 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5075 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5076 instance->max_sectors_per_req = max_sectors;
5077 } else {
1be18254 5078 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5079 "and <= %d (or < 1MB for GEN2 controller)\n",
5080 instance->max_sectors_per_req);
5081 }
5082 }
5083 }
5084
c4a3e0a5 5085 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5086 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5087 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5088 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5089 host->max_lun = MEGASAS_MAX_LUN;
122da302 5090 host->max_cmd_len = 16;
c4a3e0a5 5091
9c915a8c 5092 /* Fusion only supports host reset */
36807e67 5093 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5094 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5095 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5096 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c
AR		 5097 host->hostt->eh_device_reset_handler = NULL;
5098 host->hostt->eh_bus_reset_handler = NULL;
5099 }
4026e9aa
SS		 5100 error = scsi_init_shared_tag_map(host, host->can_queue);
5101 if (error) {
5102 dev_err(&instance->pdev->dev,
5103 "Failed to shared tag from %s %d\n",
5104 __func__, __LINE__);
5105 return -ENODEV;
5106 }
9c915a8c 5107
c4a3e0a5
BS		 5108 /*
5109 * Notify the mid-layer about the new controller
5110 */
5111 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5112 dev_err(&instance->pdev->dev,
5113 "Failed to add host from %s %d\n",
5114 __func__, __LINE__);
c4a3e0a5
BS		 5115 return -ENODEV;
5116 }
5117
c4a3e0a5
BS		 5118 return 0;
5119}
5120
31ea7088 5121static int
5122megasas_set_dma_mask(struct pci_dev *pdev)
5123{
5124 /*
5125 * All our contollers are capable of performing 64-bit DMA
5126 */
5127 if (IS_DMA64) {
6a35528a 5128 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5129
284901a9 5130 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5131 goto fail_set_dma_mask;
5132 }
5133 } else {
284901a9 5134 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5135 goto fail_set_dma_mask;
5136 }
46de63e2
SS		 5137 /*
5138 * Ensure that all data structures are allocated in 32-bit
5139 * memory.
5140 */
5141 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5142 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5143 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5144 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5145 dev_info(&pdev->dev, "set 32bit DMA mask"
5146 "and 32 bit consistent mask\n");
5147 else
5148 goto fail_set_dma_mask;
5149 }
94cd65dd 5150
31ea7088 5151 return 0;
5152
5153fail_set_dma_mask:
5154 return 1;
5155}
5156
c4a3e0a5
BS		 5157/**
5158 * megasas_probe_one - PCI hotplug entry point
5159 * @pdev: PCI device structure
0d49016b 5160 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5161 */
6f039790
GKH		 5162static int megasas_probe_one(struct pci_dev *pdev,
5163 const struct pci_device_id *id)
c4a3e0a5 5164{
d3557fc8 5165 int rval, pos;
c4a3e0a5
BS		 5166 struct Scsi_Host *host;
5167 struct megasas_instance *instance;
66192dfe 5168 u16 control = 0;
51087a86 5169 struct fusion_context *fusion = NULL;
66192dfe
AR		 5170
5171 /* Reset MSI-X in the kdump kernel */
5172 if (reset_devices) {
5173 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5174 if (pos) {
99369065 5175 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5176 &control);
5177 if (control & PCI_MSIX_FLAGS_ENABLE) {
5178 dev_info(&pdev->dev, "resetting MSI-X\n");
5179 pci_write_config_word(pdev,
99369065 5180 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5181 control &
5182 ~PCI_MSIX_FLAGS_ENABLE);
5183 }
5184 }
5185 }
c4a3e0a5 5186
c4a3e0a5
BS		 5187 /*
5188 * PCI prepping: enable device set bus mastering and dma mask
5189 */
aeab3fd7 5190 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 5191
5192 if (rval) {
5193 return rval;
5194 }
5195
5196 pci_set_master(pdev);
5197
31ea7088 5198 if (megasas_set_dma_mask(pdev))
5199 goto fail_set_dma_mask;
c4a3e0a5
BS		 5200
5201 host = scsi_host_alloc(&megasas_template,
5202 sizeof(struct megasas_instance));
5203
5204 if (!host) {
1be18254 5205 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 5206 goto fail_alloc_instance;
5207 }
5208
5209 instance = (struct megasas_instance *)host->hostdata;
5210 memset(instance, 0, sizeof(*instance));
39a98554 5211 atomic_set( &instance->fw_reset_no_pci_access, 0 );
9c915a8c 5212 instance->pdev = pdev;
c4a3e0a5 5213
9c915a8c
AR		 5214 switch (instance->pdev->device) {
5215 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5216 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5217 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5218 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5219 {
51087a86
SS		 5220 instance->ctrl_context_pages =
5221 get_order(sizeof(struct fusion_context));
5222 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5223 instance->ctrl_context_pages);
9c915a8c 5224 if (!instance->ctrl_context) {
1be18254 5225 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c
AR		 5226 "memory for Fusion context info\n");
5227 goto fail_alloc_dma_buf;
5228 }
5229 fusion = instance->ctrl_context;
d009b576
SS		 5230 memset(fusion, 0,
5231 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
9c915a8c
AR		 5232 }
5233 break;
5234 default: /* For all other supported controllers */
5235
5236 instance->producer =
5237 pci_alloc_consistent(pdev, sizeof(u32),
5238 &instance->producer_h);
5239 instance->consumer =
5240 pci_alloc_consistent(pdev, sizeof(u32),
5241 &instance->consumer_h);
5242
5243 if (!instance->producer || !instance->consumer) {
1be18254 5244 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c
AR		 5245 "memory for producer, consumer\n");
5246 goto fail_alloc_dma_buf;
5247 }
c4a3e0a5 5248
9c915a8c
AR		 5249 *instance->producer = 0;
5250 *instance->consumer = 0;
5251 break;
c4a3e0a5
BS		 5252 }
5253
5765c5b8
SS		 5254 instance->system_info_buf = pci_zalloc_consistent(pdev,
5255 sizeof(struct MR_DRV_SYSTEM_INFO),
5256 &instance->system_info_h);
5257
5258 if (!instance->system_info_buf)
5259 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5260
fc62b3fc
SS		 5261 /* Crash dump feature related initialisation*/
5262 instance->drv_buf_index = 0;
5263 instance->drv_buf_alloc = 0;
5264 instance->crash_dump_fw_support = 0;
5265 instance->crash_dump_app_support = 0;
5266 instance->fw_crash_state = UNAVAILABLE;
5267 spin_lock_init(&instance->crashdump_lock);
5268 instance->crash_dump_buf = NULL;
5269
5270 if (!reset_devices)
5271 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5272 CRASH_DMA_BUF_SIZE,
5273 &instance->crash_dump_h);
5274 if (!instance->crash_dump_buf)
1be18254 5275 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS		 5276 "crash dump DMA buffer\n");
5277
c3518837 5278 megasas_poll_wait_aen = 0;
f4c9a131 5279 instance->flag_ieee = 0;
7e8a75f4 5280 instance->ev = NULL;
39a98554 5281 instance->issuepend_done = 1;
5282 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
404a8a1a 5283 instance->is_imr = 0;
c4a3e0a5
BS		 5284
5285 instance->evt_detail = pci_alloc_consistent(pdev,
5286 sizeof(struct
5287 megasas_evt_detail),
5288 &instance->evt_detail_h);
5289
5290 if (!instance->evt_detail) {
1be18254 5291 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 5292 "event detail structure\n");
5293 goto fail_alloc_dma_buf;
5294 }
5295
5296 /*
5297 * Initialize locks and queues
5298 */
5299 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5300 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5301
e4a082c7
SP		 5302 atomic_set(&instance->fw_outstanding,0);
5303
c4a3e0a5
BS		 5304 init_waitqueue_head(&instance->int_cmd_wait_q);
5305 init_waitqueue_head(&instance->abort_cmd_wait_q);
5306
90dc9d98 5307 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5308 spin_lock_init(&instance->hba_lock);
7343eb65 5309 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5310
e5a69e27 5311 mutex_init(&instance->aen_mutex);
9c915a8c 5312 mutex_init(&instance->reset_mutex);
c4a3e0a5
BS		 5313
5314 /*
5315 * Initialize PCI related and misc parameters
5316 */
c4a3e0a5
BS		 5317 instance->host = host;
5318 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5319 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5320 instance->ctrl_info = NULL;
c4a3e0a5 5321
ae09a6c1 5322
7bebf5c7 5323 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5324 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5325 instance->flag_ieee = 1;
7bebf5c7 5326
658dcedb 5327 megasas_dbg_lvl = 0;
05e9ebbe 5328 instance->flag = 0;
0c79e681 5329 instance->unload = 1;
05e9ebbe 5330 instance->last_time = 0;
39a98554 5331 instance->disableOnlineCtrlReset = 1;
bc93d425 5332 instance->UnevenSpanSupport = 0;
39a98554 5333
36807e67 5334 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5335 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710 5336 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
fc62b3fc 5337 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c 5338 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 5339 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5340 } else
9c915a8c 5341 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5342
0a77066a
AR		 5343 /*
5344 * Initialize MFI Firmware
5345 */
5346 if (megasas_init_fw(instance))
5347 goto fail_init_mfi;
5348
229fe47c
AR		 5349 if (instance->requestorId) {
5350 if (instance->PlasmaFW111) {
5351 instance->vf_affiliation_111 =
5352 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5353 &instance->vf_affiliation_111_h);
5354 if (!instance->vf_affiliation_111)
1be18254 5355 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 5356 "memory for VF affiliation buffer\n");
5357 } else {
5358 instance->vf_affiliation =
5359 pci_alloc_consistent(pdev,
5360 (MAX_LOGICAL_DRIVES + 1) *
5361 sizeof(struct MR_LD_VF_AFFILIATION),
5362 &instance->vf_affiliation_h);
5363 if (!instance->vf_affiliation)
1be18254 5364 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 5365 "memory for VF affiliation buffer\n");
5366 }
5367 }
5368
c4a3e0a5
BS		 5369 /*
5370 * Store instance in PCI softstate
5371 */
5372 pci_set_drvdata(pdev, instance);
5373
5374 /*
5375 * Add this controller to megasas_mgmt_info structure so that it
5376 * can be exported to management applications
5377 */
5378 megasas_mgmt_info.count++;
5379 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5380 megasas_mgmt_info.max_index++;
5381
541f90b7
AR		 5382 /*
5383 * Register with SCSI mid-layer
5384 */
5385 if (megasas_io_attach(instance))
5386 goto fail_io_attach;
5387
5388 instance->unload = 0;
aa00832b
SS		 5389 /*
5390 * Trigger SCSI to scan our drives
5391 */
5392 scsi_scan_host(host);
541f90b7 5393
c4a3e0a5
BS		 5394 /*
5395 * Initiate AEN (Asynchronous Event Notification)
5396 */
5397 if (megasas_start_aen(instance)) {
1be18254 5398 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 5399 goto fail_start_aen;
5400 }
5401
9ea81f81
AR		 5402 /* Get current SR-IOV LD/VF affiliation */
5403 if (instance->requestorId)
5404 megasas_get_ld_vf_affiliation(instance, 1);
5405
c4a3e0a5
BS		 5406 return 0;
5407
5408 fail_start_aen:
5409 fail_io_attach:
5410 megasas_mgmt_info.count--;
5411 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5412 megasas_mgmt_info.max_index--;
5413
d46a3ad6 5414 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5415 megasas_destroy_irqs(instance);
5416
36807e67 5417 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5418 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5419 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5420 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
eb1b1237
AR		 5421 megasas_release_fusion(instance);
5422 else
5423 megasas_release_mfi(instance);
c8e858fe 5424 if (instance->msix_vectors)
0a77066a 5425 pci_disable_msix(instance->pdev);
d3557fc8 5426fail_init_mfi:
c4a3e0a5
BS		 5427 fail_alloc_dma_buf:
5428 if (instance->evt_detail)
5429 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5430 instance->evt_detail,
5431 instance->evt_detail_h);
5432
eb1b1237 5433 if (instance->producer)
c4a3e0a5
BS		 5434 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5435 instance->producer_h);
5436 if (instance->consumer)
5437 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5438 instance->consumer_h);
5439 scsi_host_put(host);
5440
5441 fail_alloc_instance:
5442 fail_set_dma_mask:
5443 pci_disable_device(pdev);
5444
5445 return -ENODEV;
5446}
5447
5448/**
5449 * megasas_flush_cache - Requests FW to flush all its caches
5450 * @instance: Adapter soft state
5451 */
5452static void megasas_flush_cache(struct megasas_instance *instance)
5453{
5454 struct megasas_cmd *cmd;
5455 struct megasas_dcmd_frame *dcmd;
5456
39a98554 5457 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5458 return;
5459
c4a3e0a5
BS		 5460 cmd = megasas_get_cmd(instance);
5461
5462 if (!cmd)
5463 return;
5464
5465 dcmd = &cmd->frame->dcmd;
5466
5467 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5468
5469 dcmd->cmd = MFI_CMD_DCMD;
5470 dcmd->cmd_status = 0x0;
5471 dcmd->sge_count = 0;
94cd65dd 5472 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5473 dcmd->timeout = 0;
780a3762 5474 dcmd->pad_0 = 0;
c4a3e0a5 5475 dcmd->data_xfer_len = 0;
94cd65dd 5476 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 5477 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5478
cfbe7554
SS		 5479 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5480 dev_err(&instance->pdev->dev, "Command timedout"
5481 " from %s\n", __func__);
c4a3e0a5 5482
4026e9aa 5483 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5484
5485 return;
5486}
5487
5488/**
5489 * megasas_shutdown_controller - Instructs FW to shutdown the controller
5490 * @instance: Adapter soft state
31ea7088 5491 * @opcode: Shutdown/Hibernate
c4a3e0a5 5492 */
31ea7088 5493static void megasas_shutdown_controller(struct megasas_instance *instance,
5494 u32 opcode)
c4a3e0a5
BS		 5495{
5496 struct megasas_cmd *cmd;
5497 struct megasas_dcmd_frame *dcmd;
5498
39a98554 5499 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5500 return;
5501
c4a3e0a5
BS		 5502 cmd = megasas_get_cmd(instance);
5503
5504 if (!cmd)
5505 return;
5506
5507 if (instance->aen_cmd)
cfbe7554
SS		 5508 megasas_issue_blocked_abort_cmd(instance,
5509 instance->aen_cmd, 30);
9c915a8c
AR		 5510 if (instance->map_update_cmd)
5511 megasas_issue_blocked_abort_cmd(instance,
cfbe7554 5512 instance->map_update_cmd, 30);
c4a3e0a5
BS		 5513 dcmd = &cmd->frame->dcmd;
5514
5515 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5516
5517 dcmd->cmd = MFI_CMD_DCMD;
5518 dcmd->cmd_status = 0x0;
5519 dcmd->sge_count = 0;
94cd65dd 5520 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5521 dcmd->timeout = 0;
780a3762 5522 dcmd->pad_0 = 0;
c4a3e0a5 5523 dcmd->data_xfer_len = 0;
94cd65dd 5524 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 5525
cfbe7554
SS		 5526 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5527 dev_err(&instance->pdev->dev, "Command timedout"
5528 "from %s\n", __func__);
c4a3e0a5 5529
4026e9aa 5530 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5531
5532 return;
5533}
5534
33139b21 5535#ifdef CONFIG_PM
31ea7088 5536/**
ad84db2e 5537 * megasas_suspend - driver suspend entry point
5538 * @pdev: PCI device structure
31ea7088 5539 * @state: PCI power state to suspend routine
5540 */
33139b21 5541static int
31ea7088 5542megasas_suspend(struct pci_dev *pdev, pm_message_t state)
5543{
5544 struct Scsi_Host *host;
5545 struct megasas_instance *instance;
5546
5547 instance = pci_get_drvdata(pdev);
5548 host = instance->host;
0c79e681 5549 instance->unload = 1;
31ea7088 5550
229fe47c
AR		 5551 /* Shutdown SR-IOV heartbeat timer */
5552 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5553 del_timer_sync(&instance->sriov_heartbeat_timer);
5554
31ea7088 5555 megasas_flush_cache(instance);
5556 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 5557
5558 /* cancel the delayed work if this work still in queue */
5559 if (instance->ev != NULL) {
5560 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5561 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5562 instance->ev = NULL;
5563 }
5564
31ea7088 5565 tasklet_kill(&instance->isr_tasklet);
5566
5567 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 5568 instance->instancet->disable_intr(instance);
c8e858fe 5569
d3557fc8
SS		 5570 megasas_destroy_irqs(instance);
5571
c8e858fe 5572 if (instance->msix_vectors)
80d9da98 5573 pci_disable_msix(instance->pdev);
31ea7088 5574
5575 pci_save_state(pdev);
5576 pci_disable_device(pdev);
5577
5578 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5579
5580 return 0;
5581}
5582
5583/**
5584 * megasas_resume- driver resume entry point
5585 * @pdev: PCI device structure
5586 */
33139b21 5587static int
31ea7088 5588megasas_resume(struct pci_dev *pdev)
5589{
d3557fc8 5590 int rval;
31ea7088 5591 struct Scsi_Host *host;
5592 struct megasas_instance *instance;
5593
5594 instance = pci_get_drvdata(pdev);
5595 host = instance->host;
5596 pci_set_power_state(pdev, PCI_D0);
5597 pci_enable_wake(pdev, PCI_D0, 0);
5598 pci_restore_state(pdev);
5599
5600 /*
5601 * PCI prepping: enable device set bus mastering and dma mask
5602 */
aeab3fd7 5603 rval = pci_enable_device_mem(pdev);
31ea7088 5604
5605 if (rval) {
1be18254 5606 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 5607 return rval;
5608 }
5609
5610 pci_set_master(pdev);
5611
5612 if (megasas_set_dma_mask(pdev))
5613 goto fail_set_dma_mask;
5614
5615 /*
5616 * Initialize MFI Firmware
5617 */
5618
31ea7088 5619 atomic_set(&instance->fw_outstanding, 0);
5620
5621 /*
5622 * We expect the FW state to be READY
5623 */
058a8fac 5624 if (megasas_transition_to_ready(instance, 0))
31ea7088 5625 goto fail_ready_state;
5626
3f1abce4 5627 /* Now re-enable MSI-X */
dd088128 5628 if (instance->msix_vectors &&
8ae80ed1
AG		 5629 pci_enable_msix_exact(instance->pdev, instance->msixentry,
5630 instance->msix_vectors))
dd088128 5631 goto fail_reenable_msix;
3f1abce4 5632
9c915a8c
AR		 5633 switch (instance->pdev->device) {
5634 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5635 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5636 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5637 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c
AR		 5638 {
5639 megasas_reset_reply_desc(instance);
5640 if (megasas_ioc_init_fusion(instance)) {
5641 megasas_free_cmds(instance);
5642 megasas_free_cmds_fusion(instance);
5643 goto fail_init_mfi;
5644 }
5645 if (!megasas_get_map_info(instance))
5646 megasas_sync_map_info(instance);
5647 }
5648 break;
5649 default:
5650 *instance->producer = 0;
5651 *instance->consumer = 0;
5652 if (megasas_issue_init_mfi(instance))
5653 goto fail_init_mfi;
5654 break;
5655 }
31ea7088 5656
9c915a8c
AR		 5657 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5658 (unsigned long)instance);
31ea7088 5659
d3557fc8
SS		 5660 if (instance->msix_vectors ?
5661 megasas_setup_irqs_msix(instance, 0) :
5662 megasas_setup_irqs_ioapic(instance))
5663 goto fail_init_mfi;
31ea7088 5664
229fe47c
AR		 5665 /* Re-launch SR-IOV heartbeat timer */
5666 if (instance->requestorId) {
5667 if (!megasas_sriov_start_heartbeat(instance, 0))
5668 megasas_start_timer(instance,
5669 &instance->sriov_heartbeat_timer,
5670 megasas_sriov_heartbeat_handler,
5671 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 5672 else {
229fe47c 5673 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 5674 goto fail_init_mfi;
5675 }
229fe47c
AR		 5676 }
5677
d46a3ad6 5678 instance->instancet->enable_intr(instance);
0c79e681
YB		 5679 instance->unload = 0;
5680
541f90b7
AR		 5681 /*
5682 * Initiate AEN (Asynchronous Event Notification)
5683 */
5684 if (megasas_start_aen(instance))
1be18254 5685 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 5686
31ea7088 5687 return 0;
5688
31ea7088 5689fail_init_mfi:
5690 if (instance->evt_detail)
5691 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5692 instance->evt_detail,
5693 instance->evt_detail_h);
5694
5695 if (instance->producer)
5696 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5697 instance->producer_h);
5698 if (instance->consumer)
5699 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5700 instance->consumer_h);
5701 scsi_host_put(host);
5702
5703fail_set_dma_mask:
5704fail_ready_state:
dd088128 5705fail_reenable_msix:
31ea7088 5706
5707 pci_disable_device(pdev);
5708
5709 return -ENODEV;
5710}
33139b21
JS		 5711#else
5712#define megasas_suspend NULL
5713#define megasas_resume NULL
5714#endif
31ea7088 5715
c4a3e0a5
BS		 5716/**
5717 * megasas_detach_one - PCI hot"un"plug entry point
5718 * @pdev: PCI device structure
5719 */
6f039790 5720static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 5721{
5722 int i;
5723 struct Scsi_Host *host;
5724 struct megasas_instance *instance;
9c915a8c 5725 struct fusion_context *fusion;
c4a3e0a5
BS		 5726
5727 instance = pci_get_drvdata(pdev);
c3518837 5728 instance->unload = 1;
c4a3e0a5 5729 host = instance->host;
9c915a8c 5730 fusion = instance->ctrl_context;
c4a3e0a5 5731
229fe47c
AR		 5732 /* Shutdown SR-IOV heartbeat timer */
5733 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5734 del_timer_sync(&instance->sriov_heartbeat_timer);
5735
fc62b3fc
SS		 5736 if (instance->fw_crash_state != UNAVAILABLE)
5737 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS		 5738 scsi_remove_host(instance->host);
5739 megasas_flush_cache(instance);
31ea7088 5740 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB		 5741
5742 /* cancel the delayed work if this work still in queue*/
5743 if (instance->ev != NULL) {
5744 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5745 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5746 instance->ev = NULL;
5747 }
5748
cfbe7554
SS		 5749 /* cancel all wait events */
5750 wake_up_all(&instance->int_cmd_wait_q);
5751
5d018ad0 5752 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 5753
5754 /*
5755 * Take the instance off the instance array. Note that we will not
5756 * decrement the max_index. We let this array be sparse array
5757 */
5758 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5759 if (megasas_mgmt_info.instance[i] == instance) {
5760 megasas_mgmt_info.count--;
5761 megasas_mgmt_info.instance[i] = NULL;
5762
5763 break;
5764 }
5765 }
5766
d46a3ad6 5767 instance->instancet->disable_intr(instance);
c4a3e0a5 5768
d3557fc8
SS		 5769 megasas_destroy_irqs(instance);
5770
c8e858fe 5771 if (instance->msix_vectors)
80d9da98 5772 pci_disable_msix(instance->pdev);
c4a3e0a5 5773
9c915a8c
AR		 5774 switch (instance->pdev->device) {
5775 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5776 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5777 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5778 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5779 megasas_release_fusion(instance);
51087a86 5780 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 5781 if (fusion->ld_map[i])
5782 dma_free_coherent(&instance->pdev->dev,
51087a86 5783 fusion->max_map_sz,
9c915a8c 5784 fusion->ld_map[i],
51087a86
SS		 5785 fusion->ld_map_phys[i]);
5786 if (fusion->ld_drv_map[i])
5787 free_pages((ulong)fusion->ld_drv_map[i],
5788 fusion->drv_map_pages);
5789 }
5790 free_pages((ulong)instance->ctrl_context,
5791 instance->ctrl_context_pages);
9c915a8c
AR		 5792 break;
5793 default:
5794 megasas_release_mfi(instance);
9c915a8c
AR		 5795 pci_free_consistent(pdev, sizeof(u32),
5796 instance->producer,
5797 instance->producer_h);
5798 pci_free_consistent(pdev, sizeof(u32),
5799 instance->consumer,
5800 instance->consumer_h);
5801 break;
5802 }
c4a3e0a5 5803
51087a86
SS		 5804 kfree(instance->ctrl_info);
5805
105900d5
SS		 5806 if (instance->evt_detail)
5807 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5808 instance->evt_detail, instance->evt_detail_h);
229fe47c
AR		 5809
5810 if (instance->vf_affiliation)
5811 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
5812 sizeof(struct MR_LD_VF_AFFILIATION),
5813 instance->vf_affiliation,
5814 instance->vf_affiliation_h);
5815
5816 if (instance->vf_affiliation_111)
5817 pci_free_consistent(pdev,
5818 sizeof(struct MR_LD_VF_AFFILIATION_111),
5819 instance->vf_affiliation_111,
5820 instance->vf_affiliation_111_h);
5821
5822 if (instance->hb_host_mem)
5823 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
5824 instance->hb_host_mem,
5825 instance->hb_host_mem_h);
5826
fc62b3fc
SS		 5827 if (instance->crash_dump_buf)
5828 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
5829 instance->crash_dump_buf, instance->crash_dump_h);
5830
5765c5b8
SS		 5831 if (instance->system_info_buf)
5832 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
5833 instance->system_info_buf, instance->system_info_h);
5834
c4a3e0a5
BS		 5835 scsi_host_put(host);
5836
c4a3e0a5
BS		 5837 pci_disable_device(pdev);
5838
5839 return;
5840}
5841
5842/**
5843 * megasas_shutdown - Shutdown entry point
5844 * @device: Generic device structure
5845 */
5846static void megasas_shutdown(struct pci_dev *pdev)
5847{
5848 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 5849
0c79e681 5850 instance->unload = 1;
c4a3e0a5 5851 megasas_flush_cache(instance);
530e6fc1 5852 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 5853 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5854 megasas_destroy_irqs(instance);
5855
c8e858fe 5856 if (instance->msix_vectors)
46fd256e 5857 pci_disable_msix(instance->pdev);
c4a3e0a5
BS		 5858}
5859
5860/**
5861 * megasas_mgmt_open - char node "open" entry point
5862 */
5863static int megasas_mgmt_open(struct inode *inode, struct file *filep)
5864{
5865 /*
5866 * Allow only those users with admin rights
5867 */
5868 if (!capable(CAP_SYS_ADMIN))
5869 return -EACCES;
5870
5871 return 0;
5872}
5873
c4a3e0a5
BS		 5874/**
5875 * megasas_mgmt_fasync - Async notifier registration from applications
5876 *
5877 * This function adds the calling process to a driver global queue. When an
5878 * event occurs, SIGIO will be sent to all processes in this queue.
5879 */
5880static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
5881{
5882 int rc;
5883
0b950672 5884 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5885
5886 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
5887
0b950672 5888 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5889
5890 if (rc >= 0) {
5891 /* For sanity check when we get ioctl */
5892 filep->private_data = filep;
5893 return 0;
5894 }
5895
5896 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
5897
5898 return rc;
5899}
5900
c3518837
YB		 5901/**
5902 * megasas_mgmt_poll - char node "poll" entry point
5903 * */
5904static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
5905{
5906 unsigned int mask;
5907 unsigned long flags;
5908 poll_wait(file, &megasas_poll_wait, wait);
5909 spin_lock_irqsave(&poll_aen_lock, flags);
5910 if (megasas_poll_wait_aen)
5911 mask = (POLLIN | POLLRDNORM);
51087a86 5912
c3518837
YB		 5913 else
5914 mask = 0;
51087a86 5915 megasas_poll_wait_aen = 0;
c3518837
YB		 5916 spin_unlock_irqrestore(&poll_aen_lock, flags);
5917 return mask;
5918}
5919
fc62b3fc
SS		 5920/*
5921 * megasas_set_crash_dump_params_ioctl:
5922 * Send CRASH_DUMP_MODE DCMD to all controllers
5923 * @cmd: MFI command frame
5924 */
5925
5926static int megasas_set_crash_dump_params_ioctl(
5927 struct megasas_cmd *cmd)
5928{
5929 struct megasas_instance *local_instance;
5930 int i, error = 0;
5931 int crash_support;
5932
5933 crash_support = cmd->frame->dcmd.mbox.w[0];
5934
5935 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5936 local_instance = megasas_mgmt_info.instance[i];
5937 if (local_instance && local_instance->crash_dump_drv_support) {
5938 if ((local_instance->adprecovery ==
5939 MEGASAS_HBA_OPERATIONAL) &&
5940 !megasas_set_crash_dump_params(local_instance,
5941 crash_support)) {
5942 local_instance->crash_dump_app_support =
5943 crash_support;
5944 dev_info(&local_instance->pdev->dev,
5945 "Application firmware crash "
5946 "dump mode set success\n");
5947 error = 0;
5948 } else {
5949 dev_info(&local_instance->pdev->dev,
5950 "Application firmware crash "
5951 "dump mode set failed\n");
5952 error = -1;
5953 }
5954 }
5955 }
5956 return error;
5957}
5958
c4a3e0a5
BS		 5959/**
5960 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
5961 * @instance: Adapter soft state
5962 * @argp: User's ioctl packet
5963 */
5964static int
5965megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
5966 struct megasas_iocpacket __user * user_ioc,
5967 struct megasas_iocpacket *ioc)
5968{
5969 struct megasas_sge32 *kern_sge32;
5970 struct megasas_cmd *cmd;
5971 void *kbuff_arr[MAX_IOCTL_SGE];
5972 dma_addr_t buf_handle = 0;
5973 int error = 0, i;
5974 void *sense = NULL;
5975 dma_addr_t sense_handle;
7b2519af 5976 unsigned long *sense_ptr;
c4a3e0a5
BS		 5977
5978 memset(kbuff_arr, 0, sizeof(kbuff_arr));
5979
5980 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 5981 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 5982 ioc->sge_count, MAX_IOCTL_SGE);
5983 return -EINVAL;
5984 }
5985
5986 cmd = megasas_get_cmd(instance);
5987 if (!cmd) {
1be18254 5988 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 5989 return -ENOMEM;
5990 }
5991
5992 /*
5993 * User's IOCTL packet has 2 frames (maximum). Copy those two
5994 * frames into our cmd's frames. cmd->frame's context will get
5995 * overwritten when we copy from user's frames. So set that value
5996 * alone separately
5997 */
5998 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 5999 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6000 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6001 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6002 MFI_FRAME_SGL64 |
6003 MFI_FRAME_SENSE64));
c4a3e0a5 6004
fc62b3fc
SS		 6005 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6006 error = megasas_set_crash_dump_params_ioctl(cmd);
6007 megasas_return_cmd(instance, cmd);
6008 return error;
6009 }
6010
c4a3e0a5
BS		 6011 /*
6012 * The management interface between applications and the fw uses
6013 * MFI frames. E.g, RAID configuration changes, LD property changes
6014 * etc are accomplishes through different kinds of MFI frames. The
6015 * driver needs to care only about substituting user buffers with
6016 * kernel buffers in SGLs. The location of SGL is embedded in the
6017 * struct iocpacket itself.
6018 */
6019 kern_sge32 = (struct megasas_sge32 *)
6020 ((unsigned long)cmd->frame + ioc->sgl_off);
6021
6022 /*
6023 * For each user buffer, create a mirror buffer and copy in
6024 */
6025 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6026 if (!ioc->sgl[i].iov_len)
6027 continue;
6028
9f35fa8a 6029 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6030 ioc->sgl[i].iov_len,
9f35fa8a 6031 &buf_handle, GFP_KERNEL);
c4a3e0a5 6032 if (!kbuff_arr[i]) {
1be18254
BH		 6033 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6034 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6035 error = -ENOMEM;
6036 goto out;
6037 }
6038
6039 /*
6040 * We don't change the dma_coherent_mask, so
6041 * pci_alloc_consistent only returns 32bit addresses
6042 */
94cd65dd
SS		 6043 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6044 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6045
6046 /*
6047 * We created a kernel buffer corresponding to the
6048 * user buffer. Now copy in from the user buffer
6049 */
6050 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6051 (u32) (ioc->sgl[i].iov_len))) {
6052 error = -EFAULT;
6053 goto out;
6054 }
6055 }
6056
6057 if (ioc->sense_len) {
9f35fa8a
SP		 6058 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6059 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6060 if (!sense) {
6061 error = -ENOMEM;
6062 goto out;
6063 }
6064
6065 sense_ptr =
7b2519af 6066 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6067 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 6068 }
6069
6070 /*
6071 * Set the sync_cmd flag so that the ISR knows not to complete this
6072 * cmd to the SCSI mid-layer
6073 */
6074 cmd->sync_cmd = 1;
cfbe7554 6075 megasas_issue_blocked_cmd(instance, cmd, 0);
c4a3e0a5
BS		 6076 cmd->sync_cmd = 0;
6077
aa00832b
SS		 6078 if (instance->unload == 1) {
6079 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6080 "don't submit data to application\n");
6081 goto out;
6082 }
c4a3e0a5
BS		 6083 /*
6084 * copy out the kernel buffers to user buffers
6085 */
6086 for (i = 0; i < ioc->sge_count; i++) {
6087 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6088 ioc->sgl[i].iov_len)) {
6089 error = -EFAULT;
6090 goto out;
6091 }
6092 }
6093
6094 /*
6095 * copy out the sense
6096 */
6097 if (ioc->sense_len) {
6098 /*
b70a41e0 6099 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 6100 * sense buffer address
6101 */
7b2519af
YB		 6102 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6103 ioc->sense_off);
c4a3e0a5 6104
b70a41e0 6105 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6106 sense, ioc->sense_len)) {
1be18254 6107 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6108 "sense data\n");
c4a3e0a5
BS		 6109 error = -EFAULT;
6110 goto out;
6111 }
6112 }
6113
6114 /*
6115 * copy the status codes returned by the fw
6116 */
6117 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6118 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6119 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 6120 error = -EFAULT;
6121 }
6122
6123 out:
6124 if (sense) {
9f35fa8a 6125 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 6126 sense, sense_handle);
6127 }
6128
7a6a731b
BM		 6129 for (i = 0; i < ioc->sge_count; i++) {
6130 if (kbuff_arr[i])
6131 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6132 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6133 kbuff_arr[i],
94cd65dd 6134 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6135 kbuff_arr[i] = NULL;
c4a3e0a5
BS		 6136 }
6137
4026e9aa 6138 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6139 return error;
6140}
6141
c4a3e0a5
BS		 6142static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6143{
6144 struct megasas_iocpacket __user *user_ioc =
6145 (struct megasas_iocpacket __user *)arg;
6146 struct megasas_iocpacket *ioc;
6147 struct megasas_instance *instance;
6148 int error;
39a98554 6149 int i;
6150 unsigned long flags;
6151 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6152
6153 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6154 if (!ioc)
6155 return -ENOMEM;
6156
6157 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6158 error = -EFAULT;
6159 goto out_kfree_ioc;
6160 }
6161
6162 instance = megasas_lookup_instance(ioc->host_no);
6163 if (!instance) {
6164 error = -ENODEV;
6165 goto out_kfree_ioc;
6166 }
6167
229fe47c
AR		 6168 /* Adjust ioctl wait time for VF mode */
6169 if (instance->requestorId)
6170 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6171
6172 /* Block ioctls in VF mode */
6173 if (instance->requestorId && !allow_vf_ioctls) {
6174 error = -ENODEV;
6175 goto out_kfree_ioc;
6176 }
6177
39a98554 6178 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6179 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 6180 error = -ENODEV;
6181 goto out_kfree_ioc;
6182 }
6183
6184 if (instance->unload == 1) {
6185 error = -ENODEV;
6186 goto out_kfree_ioc;
6187 }
6188
c4a3e0a5
BS		 6189 if (down_interruptible(&instance->ioctl_sem)) {
6190 error = -ERESTARTSYS;
6191 goto out_kfree_ioc;
6192 }
39a98554 6193
6194 for (i = 0; i < wait_time; i++) {
6195
6196 spin_lock_irqsave(&instance->hba_lock, flags);
6197 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6198 spin_unlock_irqrestore(&instance->hba_lock, flags);
6199 break;
6200 }
6201 spin_unlock_irqrestore(&instance->hba_lock, flags);
6202
6203 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6204 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6205 "for controller reset to finish\n");
6206 }
6207
6208 msleep(1000);
6209 }
6210
6211 spin_lock_irqsave(&instance->hba_lock, flags);
6212 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6213 spin_unlock_irqrestore(&instance->hba_lock, flags);
6214
1be18254 6215 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6216 "waiting for HBA to recover\n");
6217 error = -ENODEV;
c64e483e 6218 goto out_up;
39a98554 6219 }
6220 spin_unlock_irqrestore(&instance->hba_lock, flags);
6221
c4a3e0a5 6222 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
c64e483e 6223 out_up:
c4a3e0a5
BS		 6224 up(&instance->ioctl_sem);
6225
6226 out_kfree_ioc:
6227 kfree(ioc);
6228 return error;
6229}
6230
6231static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6232{
6233 struct megasas_instance *instance;
6234 struct megasas_aen aen;
6235 int error;
39a98554 6236 int i;
6237 unsigned long flags;
6238 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6239
6240 if (file->private_data != file) {
6241 printk(KERN_DEBUG "megasas: fasync_helper was not "
6242 "called first\n");
6243 return -EINVAL;
6244 }
6245
6246 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6247 return -EFAULT;
6248
6249 instance = megasas_lookup_instance(aen.host_no);
6250
6251 if (!instance)
6252 return -ENODEV;
6253
39a98554 6254 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
6255 return -ENODEV;
0c79e681
YB		 6256 }
6257
6258 if (instance->unload == 1) {
6259 return -ENODEV;
6260 }
6261
39a98554 6262 for (i = 0; i < wait_time; i++) {
6263
6264 spin_lock_irqsave(&instance->hba_lock, flags);
6265 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6266 spin_unlock_irqrestore(&instance->hba_lock,
6267 flags);
6268 break;
6269 }
6270
6271 spin_unlock_irqrestore(&instance->hba_lock, flags);
6272
6273 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6274 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6275 "controller reset to finish\n");
6276 }
6277
6278 msleep(1000);
6279 }
6280
6281 spin_lock_irqsave(&instance->hba_lock, flags);
6282 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6283 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH		 6284 dev_err(&instance->pdev->dev, "timed out while waiting"
6285 "for HBA to recover\n");
39a98554 6286 return -ENODEV;
6287 }
6288 spin_unlock_irqrestore(&instance->hba_lock, flags);
6289
e5a69e27 6290 mutex_lock(&instance->aen_mutex);
c4a3e0a5
BS		 6291 error = megasas_register_aen(instance, aen.seq_num,
6292 aen.class_locale_word);
e5a69e27 6293 mutex_unlock(&instance->aen_mutex);
c4a3e0a5
BS		 6294 return error;
6295}
6296
6297/**
6298 * megasas_mgmt_ioctl - char node ioctl entry point
6299 */
6300static long
6301megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6302{
6303 switch (cmd) {
6304 case MEGASAS_IOC_FIRMWARE:
6305 return megasas_mgmt_ioctl_fw(file, arg);
6306
6307 case MEGASAS_IOC_GET_AEN:
6308 return megasas_mgmt_ioctl_aen(file, arg);
6309 }
6310
6311 return -ENOTTY;
6312}
6313
6314#ifdef CONFIG_COMPAT
6315static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6316{
6317 struct compat_megasas_iocpacket __user *cioc =
6318 (struct compat_megasas_iocpacket __user *)arg;
6319 struct megasas_iocpacket __user *ioc =
6320 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6321 int i;
6322 int error = 0;
b3dc1a21 6323 compat_uptr_t ptr;
c4a3e0a5 6324
83aabc1b
JG		 6325 if (clear_user(ioc, sizeof(*ioc)))
6326 return -EFAULT;
c4a3e0a5
BS		 6327
6328 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6329 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6330 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6331 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6332 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6333 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6334 return -EFAULT;
6335
b3dc1a21
TH		 6336 /*
6337 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6338 * sense_len is not null, so prepare the 64bit value under
6339 * the same condition.
6340 */
6341 if (ioc->sense_len) {
6342 void __user **sense_ioc_ptr =
6343 (void __user **)(ioc->frame.raw + ioc->sense_off);
6344 compat_uptr_t *sense_cioc_ptr =
6345 (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
6346 if (get_user(ptr, sense_cioc_ptr) ||
6347 put_user(compat_ptr(ptr), sense_ioc_ptr))
6348 return -EFAULT;
6349 }
c4a3e0a5 6350
b3dc1a21 6351 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 6352 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6353 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6354 copy_in_user(&ioc->sgl[i].iov_len,
6355 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6356 return -EFAULT;
6357 }
6358
6359 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6360
6361 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6362 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6363 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6364 return -EFAULT;
6365 }
6366 return error;
6367}
6368
6369static long
6370megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6371 unsigned long arg)
6372{
6373 switch (cmd) {
cb59aa6a
SP		 6374 case MEGASAS_IOC_FIRMWARE32:
6375 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 6376 case MEGASAS_IOC_GET_AEN:
6377 return megasas_mgmt_ioctl_aen(file, arg);
6378 }
6379
6380 return -ENOTTY;
6381}
6382#endif
6383
6384/*
6385 * File operations structure for management interface
6386 */
00977a59 6387static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 6388 .owner = THIS_MODULE,
6389 .open = megasas_mgmt_open,
c4a3e0a5
BS		 6390 .fasync = megasas_mgmt_fasync,
6391 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6392 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 6393#ifdef CONFIG_COMPAT
6394 .compat_ioctl = megasas_mgmt_compat_ioctl,
6395#endif
6038f373 6396 .llseek = noop_llseek,
c4a3e0a5
BS		 6397};
6398
6399/*
6400 * PCI hotplug support registration structure
6401 */
6402static struct pci_driver megasas_pci_driver = {
6403
6404 .name = "megaraid_sas",
6405 .id_table = megasas_pci_table,
6406 .probe = megasas_probe_one,
6f039790 6407 .remove = megasas_detach_one,
31ea7088 6408 .suspend = megasas_suspend,
6409 .resume = megasas_resume,
c4a3e0a5
BS		 6410 .shutdown = megasas_shutdown,
6411};
6412
6413/*
6414 * Sysfs driver attributes
6415 */
6416static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6417{
6418 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6419 MEGASAS_VERSION);
6420}
6421
6422static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6423
09fced19
SS		 6424static ssize_t
6425megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6426{
6427 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6428 MEGASAS_RELDATE);
6429}
6430
6431static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6432
72c4fd36
YB		 6433static ssize_t
6434megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6435{
6436 return sprintf(buf, "%u\n", support_poll_for_event);
6437}
6438
6439static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6440 megasas_sysfs_show_support_poll_for_event, NULL);
6441
837f5fe8
YB		 6442 static ssize_t
6443megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6444{
6445 return sprintf(buf, "%u\n", support_device_change);
6446}
6447
6448static DRIVER_ATTR(support_device_change, S_IRUGO,
6449 megasas_sysfs_show_support_device_change, NULL);
6450
658dcedb
SP		 6451static ssize_t
6452megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6453{
ad84db2e 6454 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 6455}
6456
6457static ssize_t
6458megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6459{
6460 int retval = count;
6461 if(sscanf(buf,"%u",&megasas_dbg_lvl)<1){
6462 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
6463 retval = -EINVAL;
6464 }
6465 return retval;
6466}
6467
66dca9b8 6468static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 6469 megasas_sysfs_set_dbg_lvl);
6470
7e8a75f4
YB		 6471static void
6472megasas_aen_polling(struct work_struct *work)
6473{
6474 struct megasas_aen_event *ev =
c1d390d8 6475 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 6476 struct megasas_instance *instance = ev->instance;
6477 union megasas_evt_class_locale class_locale;
6478 struct Scsi_Host *host;
6479 struct scsi_device *sdev1;
6480 u16 pd_index = 0;
c9786842 6481 u16 ld_index = 0;
7e8a75f4 6482 int i, j, doscan = 0;
229fe47c 6483 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4
YB		 6484 int error;
6485
6486 if (!instance) {
6487 printk(KERN_ERR "invalid instance!\n");
6488 kfree(ev);
6489 return;
6490 }
229fe47c
AR		 6491
6492 /* Adjust event workqueue thread wait time for VF mode */
6493 if (instance->requestorId)
6494 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6495
6496 /* Don't run the event workqueue thread if OCR is running */
6497 for (i = 0; i < wait_time; i++) {
6498 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL)
6499 break;
6500 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6501 dev_notice(&instance->pdev->dev, "%s waiting for "
229fe47c
AR		 6502 "controller reset to finish for scsi%d\n",
6503 __func__, instance->host->host_no);
6504 }
6505 msleep(1000);
6506 }
6507
7e8a75f4
YB		 6508 instance->ev = NULL;
6509 host = instance->host;
6510 if (instance->evt_detail) {
6511
94cd65dd 6512 switch (le32_to_cpu(instance->evt_detail->code)) {
7e8a75f4 6513 case MR_EVT_PD_INSERTED:
c9786842
YB		 6514 if (megasas_get_pd_list(instance) == 0) {
6515 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6516 for (j = 0;
6517 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6518 j++) {
6519
6520 pd_index =
6521 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6522
6523 sdev1 =
6524 scsi_device_lookup(host, i, j, 0);
6525
6526 if (instance->pd_list[pd_index].driveState
6527 == MR_PD_STATE_SYSTEM) {
6528 if (!sdev1) {
6529 scsi_add_device(host, i, j, 0);
6530 }
6531
6532 if (sdev1)
6533 scsi_device_put(sdev1);
6534 }
6535 }
6536 }
6537 }
6538 doscan = 0;
6539 break;
6540
7e8a75f4 6541 case MR_EVT_PD_REMOVED:
c9786842 6542 if (megasas_get_pd_list(instance) == 0) {
c9786842
YB		 6543 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6544 for (j = 0;
6545 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6546 j++) {
6547
6548 pd_index =
6549 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6550
6551 sdev1 =
6552 scsi_device_lookup(host, i, j, 0);
6553
6554 if (instance->pd_list[pd_index].driveState
6555 == MR_PD_STATE_SYSTEM) {
6556 if (sdev1) {
6557 scsi_device_put(sdev1);
6558 }
6559 } else {
6560 if (sdev1) {
6561 scsi_remove_device(sdev1);
6562 scsi_device_put(sdev1);
6563 }
6564 }
6565 }
6566 }
6567 }
6568 doscan = 0;
6569 break;
6570
6571 case MR_EVT_LD_OFFLINE:
4c598b23 6572 case MR_EVT_CFG_CLEARED:
c9786842 6573 case MR_EVT_LD_DELETED:
229fe47c
AR		 6574 if (!instance->requestorId ||
6575 (instance->requestorId &&
6576 megasas_get_ld_vf_affiliation(instance, 0))) {
6577 if (megasas_ld_list_query(instance,
6578 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6579 megasas_get_ld_list(instance);
6580 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6581 for (j = 0;
6582 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6583 j++) {
6584
6585 ld_index =
6586 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6587
6588 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6589
6590 if (instance->ld_ids[ld_index]
6591 != 0xff) {
6592 if (sdev1)
6593 scsi_device_put(sdev1);
6594 } else {
6595 if (sdev1) {
6596 scsi_remove_device(sdev1);
6597 scsi_device_put(sdev1);
6598 }
6599 }
c9786842
YB		 6600 }
6601 }
229fe47c 6602 doscan = 0;
c9786842 6603 }
c9786842
YB		 6604 break;
6605 case MR_EVT_LD_CREATED:
229fe47c
AR		 6606 if (!instance->requestorId ||
6607 (instance->requestorId &&
6608 megasas_get_ld_vf_affiliation(instance, 0))) {
6609 if (megasas_ld_list_query(instance,
6610 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6611 megasas_get_ld_list(instance);
6612 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6613 for (j = 0;
6614 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6615 j++) {
6616 ld_index =
6617 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6618
6619 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6620
6621 if (instance->ld_ids[ld_index]
6622 != 0xff) {
6623 if (!sdev1)
6624 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
c9786842 6625 }
229fe47c
AR		 6626 if (sdev1)
6627 scsi_device_put(sdev1);
c9786842
YB		 6628 }
6629 }
229fe47c 6630 doscan = 0;
c9786842 6631 }
c9786842 6632 break;
7e8a75f4 6633 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 6634 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 6635 case MR_EVT_LD_STATE_CHANGE:
7e8a75f4
YB		 6636 doscan = 1;
6637 break;
6638 default:
6639 doscan = 0;
6640 break;
6641 }
6642 } else {
1be18254 6643 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
7e8a75f4
YB		 6644 kfree(ev);
6645 return;
6646 }
6647
6648 if (doscan) {
1be18254 6649 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
229fe47c 6650 instance->host->host_no);
58968fc8
HR		 6651 if (megasas_get_pd_list(instance) == 0) {
6652 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6653 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
6654 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
6655 sdev1 = scsi_device_lookup(host, i, j, 0);
6656 if (instance->pd_list[pd_index].driveState ==
6657 MR_PD_STATE_SYSTEM) {
6658 if (!sdev1) {
6659 scsi_add_device(host, i, j, 0);
6660 }
6661 if (sdev1)
6662 scsi_device_put(sdev1);
6663 } else {
6664 if (sdev1) {
6665 scsi_remove_device(sdev1);
6666 scsi_device_put(sdev1);
6667 }
7e8a75f4
YB		 6668 }
6669 }
6670 }
6671 }
c9786842 6672
229fe47c
AR		 6673 if (!instance->requestorId ||
6674 (instance->requestorId &&
6675 megasas_get_ld_vf_affiliation(instance, 0))) {
6676 if (megasas_ld_list_query(instance,
6677 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6678 megasas_get_ld_list(instance);
6679 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6680 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL;
6681 j++) {
6682 ld_index =
6683 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
c9786842 6684
229fe47c
AR		 6685 sdev1 = scsi_device_lookup(host,
6686 MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6687 if (instance->ld_ids[ld_index]
6688 != 0xff) {
6689 if (!sdev1)
6690 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6691 else
6692 scsi_device_put(sdev1);
c9786842 6693 } else {
229fe47c
AR		 6694 if (sdev1) {
6695 scsi_remove_device(sdev1);
6696 scsi_device_put(sdev1);
6697 }
c9786842
YB		 6698 }
6699 }
6700 }
6701 }
7e8a75f4
YB		 6702 }
6703
6704 if ( instance->aen_cmd != NULL ) {
6705 kfree(ev);
6706 return ;
6707 }
6708
94cd65dd 6709 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7e8a75f4
YB		 6710
6711 /* Register AEN with FW for latest sequence number plus 1 */
6712 class_locale.members.reserved = 0;
6713 class_locale.members.locale = MR_EVT_LOCALE_ALL;
6714 class_locale.members.class = MR_EVT_CLASS_DEBUG;
6715 mutex_lock(&instance->aen_mutex);
6716 error = megasas_register_aen(instance, seq_num,
6717 class_locale.word);
6718 mutex_unlock(&instance->aen_mutex);
6719
6720 if (error)
1be18254 6721 dev_err(&instance->pdev->dev, "register aen failed error %x\n", error);
7e8a75f4
YB		 6722
6723 kfree(ev);
6724}
6725
c4a3e0a5
BS		 6726/**
6727 * megasas_init - Driver load entry point
6728 */
6729static int __init megasas_init(void)
6730{
6731 int rval;
6732
6733 /*
6734 * Announce driver version and other information
6735 */
d98a6deb 6736 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 6737
bd8d6dd4
KD		 6738 spin_lock_init(&poll_aen_lock);
6739
72c4fd36 6740 support_poll_for_event = 2;
837f5fe8 6741 support_device_change = 1;
72c4fd36 6742
c4a3e0a5
BS		 6743 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
6744
6745 /*
6746 * Register character device node
6747 */
6748 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
6749
6750 if (rval < 0) {
6751 printk(KERN_DEBUG "megasas: failed to open device node\n");
6752 return rval;
6753 }
6754
6755 megasas_mgmt_majorno = rval;
6756
6757 /*
6758 * Register ourselves as PCI hotplug module
6759 */
4041b9cd 6760 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 6761
6762 if (rval) {
6774def6 6763 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 6764 goto err_pcidrv;
6765 }
6766
6767 rval = driver_create_file(&megasas_pci_driver.driver,
6768 &driver_attr_version);
6769 if (rval)
6770 goto err_dcf_attr_ver;
72c4fd36 6771
09fced19
SS		 6772 rval = driver_create_file(&megasas_pci_driver.driver,
6773 &driver_attr_release_date);
6774 if (rval)
6775 goto err_dcf_rel_date;
6776
72c4fd36
YB		 6777 rval = driver_create_file(&megasas_pci_driver.driver,
6778 &driver_attr_support_poll_for_event);
6779 if (rval)
6780 goto err_dcf_support_poll_for_event;
6781
83aabc1b
JG		 6782 rval = driver_create_file(&megasas_pci_driver.driver,
6783 &driver_attr_dbg_lvl);
6784 if (rval)
6785 goto err_dcf_dbg_lvl;
837f5fe8
YB		 6786 rval = driver_create_file(&megasas_pci_driver.driver,
6787 &driver_attr_support_device_change);
6788 if (rval)
6789 goto err_dcf_support_device_change;
6790
c4a3e0a5 6791 return rval;
ad84db2e 6792
837f5fe8 6793err_dcf_support_device_change:
ad84db2e 6794 driver_remove_file(&megasas_pci_driver.driver,
6795 &driver_attr_dbg_lvl);
83aabc1b 6796err_dcf_dbg_lvl:
72c4fd36
YB		 6797 driver_remove_file(&megasas_pci_driver.driver,
6798 &driver_attr_support_poll_for_event);
72c4fd36 6799err_dcf_support_poll_for_event:
09fced19
SS		 6800 driver_remove_file(&megasas_pci_driver.driver,
6801 &driver_attr_release_date);
6802err_dcf_rel_date:
83aabc1b
JG		 6803 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
6804err_dcf_attr_ver:
6805 pci_unregister_driver(&megasas_pci_driver);
6806err_pcidrv:
6807 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 6808 return rval;
c4a3e0a5
BS		 6809}
6810
6811/**
6812 * megasas_exit - Driver unload entry point
6813 */
6814static void __exit megasas_exit(void)
6815{
658dcedb
SP		 6816 driver_remove_file(&megasas_pci_driver.driver,
6817 &driver_attr_dbg_lvl);
837f5fe8
YB		 6818 driver_remove_file(&megasas_pci_driver.driver,
6819 &driver_attr_support_poll_for_event);
6820 driver_remove_file(&megasas_pci_driver.driver,
6821 &driver_attr_support_device_change);
09fced19
SS		 6822 driver_remove_file(&megasas_pci_driver.driver,
6823 &driver_attr_release_date);
83aabc1b 6824 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 6825
6826 pci_unregister_driver(&megasas_pci_driver);
6827 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
6828}
6829
6830module_init(megasas_init);
6831module_exit(megasas_exit);
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