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scsi: megaraid_sas: Error handling for invalid ldcount provided by firmware in RAID map
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
7c0f6ba6 45#include <linux/uaccess.h>
318aaef8 46#include <asm/unaligned.h>
43399236 47#include <linux/fs.h>
c4a3e0a5 48#include <linux/compat.h>
cf62a0a5 49#include <linux/blkdev.h>
0b950672 50#include <linux/mutex.h>
c3518837 51#include <linux/poll.h>
def3e8df 52#include <linux/vmalloc.h>
c4a3e0a5
BS		 53
54#include <scsi/scsi.h>
55#include <scsi/scsi_cmnd.h>
56#include <scsi/scsi_device.h>
57#include <scsi/scsi_host.h>
4bcde509 58#include <scsi/scsi_tcq.h>
9c915a8c 59#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 60#include "megaraid_sas.h"
61
1fd10685
YB		 62/*
63 * Number of sectors per IO command
64 * Will be set in megasas_init_mfi if user does not provide
65 */
66static unsigned int max_sectors;
67module_param_named(max_sectors, max_sectors, int, 0);
68MODULE_PARM_DESC(max_sectors,
69 "Maximum number of sectors per IO command");
70
80d9da98
AR		 71static int msix_disable;
72module_param(msix_disable, int, S_IRUGO);
73MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
74
079eaddf
AR		 75static unsigned int msix_vectors;
76module_param(msix_vectors, int, S_IRUGO);
77MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
78
229fe47c
AR		 79static int allow_vf_ioctls;
80module_param(allow_vf_ioctls, int, S_IRUGO);
81MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
82
ae09a6c1 83static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 84module_param(throttlequeuedepth, int, S_IRUGO);
85MODULE_PARM_DESC(throttlequeuedepth,
86 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
87
e3d178ca 88unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2
AR		 89module_param(resetwaittime, int, S_IRUGO);
90MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
91 "before resetting adapter. Default: 180");
92
ac95136a
SS		 93int smp_affinity_enable = 1;
94module_param(smp_affinity_enable, int, S_IRUGO);
95MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
96
179ac142
SS		 97int rdpq_enable = 1;
98module_param(rdpq_enable, int, S_IRUGO);
99MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
100
308ec459
SS		 101unsigned int dual_qdepth_disable;
102module_param(dual_qdepth_disable, int, S_IRUGO);
103MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
104
e3d178ca
SS		 105unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
106module_param(scmd_timeout, int, S_IRUGO);
107MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
108
c4a3e0a5
BS		 109MODULE_LICENSE("GPL");
110MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 111MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
112MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 113
058a8fac 114int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 115static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 116static int megasas_ld_list_query(struct megasas_instance *instance,
117 u8 query_type);
39a98554 118static int megasas_issue_init_mfi(struct megasas_instance *instance);
119static int megasas_register_aen(struct megasas_instance *instance,
120 u32 seq_num, u32 class_locale_word);
15dd0381
S		 121static void megasas_get_pd_info(struct megasas_instance *instance,
122 struct scsi_device *sdev);
96188a89
S		 123static int megasas_get_target_prop(struct megasas_instance *instance,
124 struct scsi_device *sdev);
c4a3e0a5
BS		 125/*
126 * PCI ID table for all supported controllers
127 */
128static struct pci_device_id megasas_pci_table[] = {
129
f3d7271c
HK		 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
131 /* xscale IOP */
132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
133 /* ppc IOP */
af7a5647 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
135 /* ppc IOP */
6610a6b3
YB		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
137 /* gen2*/
138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
139 /* gen2*/
87911122
YB		 140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
141 /* skinny*/
142 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
143 /* skinny*/
f3d7271c
HK		 144 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
145 /* xscale IOP, vega */
146 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
147 /* xscale IOP */
9c915a8c
AR		 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
149 /* Fusion */
229fe47c
AR		 150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
151 /* Plasma */
36807e67
AR		 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
153 /* Invader */
21d3c710
SS		 154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
155 /* Fury */
90c204bc 156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
157 /* Intruder */
158 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
159 /* Intruder 24 port*/
7364d34b 160 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
161 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
45f4f2eb
SC		 162 /* VENTURA */
163 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA)},
754f1bae 164 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER)},
45f4f2eb
SC		 165 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_HARPOON)},
166 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_TOMCAT)},
167 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA_4PORT)},
168 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER_4PORT)},
f3d7271c 169 {}
c4a3e0a5
BS		 170};
171
172MODULE_DEVICE_TABLE(pci, megasas_pci_table);
173
174static int megasas_mgmt_majorno;
229fe47c 175struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 176static struct fasync_struct *megasas_async_queue;
0b950672 177static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 178
c3518837
YB		 179static int megasas_poll_wait_aen;
180static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 181static u32 support_poll_for_event;
9c915a8c 182u32 megasas_dbg_lvl;
837f5fe8 183static u32 support_device_change;
658dcedb 184
c3518837
YB		 185/* define lock for aen poll */
186spinlock_t poll_aen_lock;
187
9c915a8c 188void
7343eb65 189megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
190 u8 alt_status);
ebf054b0
AR		 191static u32
192megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
193static int
194megasas_adp_reset_gen2(struct megasas_instance *instance,
195 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 196static irqreturn_t megasas_isr(int irq, void *devp);
197static u32
198megasas_init_adapter_mfi(struct megasas_instance *instance);
199u32
200megasas_build_and_issue_cmd(struct megasas_instance *instance,
201 struct scsi_cmnd *scmd);
202static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 203int
229fe47c
AR		 204wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
205 int seconds);
9c915a8c 206void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 207static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
208 int initial);
e5d65b4b 209static int
107a60dd 210megasas_set_dma_mask(struct megasas_instance *instance);
e5d65b4b
S		 211static int
212megasas_alloc_ctrl_mem(struct megasas_instance *instance);
213static inline void
214megasas_free_ctrl_mem(struct megasas_instance *instance);
215static inline int
216megasas_alloc_ctrl_dma_buffers(struct megasas_instance *instance);
217static inline void
218megasas_free_ctrl_dma_buffers(struct megasas_instance *instance);
219static inline void
220megasas_init_ctrl_params(struct megasas_instance *instance);
cd50ba8e 221
107a60dd
S		 222/**
223 * megasas_set_dma_settings - Populate DMA address, length and flags for DCMDs
224 * @instance: Adapter soft state
225 * @dcmd: DCMD frame inside MFI command
226 * @dma_addr: DMA address of buffer to be passed to FW
227 * @dma_len: Length of DMA buffer to be passed to FW
228 * @return: void
229 */
230void megasas_set_dma_settings(struct megasas_instance *instance,
231 struct megasas_dcmd_frame *dcmd,
232 dma_addr_t dma_addr, u32 dma_len)
233{
234 if (instance->consistent_mask_64bit) {
235 dcmd->sgl.sge64[0].phys_addr = cpu_to_le64(dma_addr);
236 dcmd->sgl.sge64[0].length = cpu_to_le32(dma_len);
237 dcmd->flags = cpu_to_le16(dcmd->flags | MFI_FRAME_SGL64);
238
239 } else {
240 dcmd->sgl.sge32[0].phys_addr =
241 cpu_to_le32(lower_32_bits(dma_addr));
242 dcmd->sgl.sge32[0].length = cpu_to_le32(dma_len);
243 dcmd->flags = cpu_to_le16(dcmd->flags);
244 }
245}
cd50ba8e 246
f4fc2093 247void
cd50ba8e
AR		 248megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
249{
250 instance->instancet->fire_cmd(instance,
251 cmd->frame_phys_addr, 0, instance->reg_set);
f4fc2093 252 return;
cd50ba8e 253}
7343eb65 254
c4a3e0a5
BS		 255/**
256 * megasas_get_cmd - Get a command from the free pool
257 * @instance: Adapter soft state
258 *
259 * Returns a free command from the pool
260 */
9c915a8c 261struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 262 *instance)
263{
264 unsigned long flags;
265 struct megasas_cmd *cmd = NULL;
266
90dc9d98 267 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 268
269 if (!list_empty(&instance->cmd_pool)) {
270 cmd = list_entry((&instance->cmd_pool)->next,
271 struct megasas_cmd, list);
272 list_del_init(&cmd->list);
273 } else {
1be18254 274 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 275 }
276
90dc9d98 277 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 278 return cmd;
279}
280
281/**
4026e9aa 282 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 283 * @instance: Adapter soft state
284 * @cmd: Command packet to be returned to free command pool
285 */
68b43744 286void
4026e9aa 287megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 288{
4026e9aa
SS		 289 unsigned long flags;
290 u32 blk_tags;
291 struct megasas_cmd_fusion *cmd_fusion;
292 struct fusion_context *fusion = instance->ctrl_context;
293
294 /* This flag is used only for fusion adapter.
295 * Wait for Interrupt for Polled mode DCMD
90dc9d98 296 */
4026e9aa 297 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 298 return;
c4a3e0a5 299
4026e9aa
SS		 300 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
301
302 if (fusion) {
303 blk_tags = instance->max_scsi_cmds + cmd->index;
304 cmd_fusion = fusion->cmd_list[blk_tags];
305 megasas_return_cmd_fusion(instance, cmd_fusion);
306 }
c4a3e0a5 307 cmd->scmd = NULL;
9c915a8c 308 cmd->frame_count = 0;
4026e9aa 309 cmd->flags = 0;
21c34006
S		 310 memset(cmd->frame, 0, instance->mfi_frame_size);
311 cmd->frame->io.context = cpu_to_le32(cmd->index);
4026e9aa 312 if (!fusion && reset_devices)
e5f93a36 313 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 314 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 315
90dc9d98 316 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 317
4026e9aa 318}
1341c939 319
714f5177 320static const char *
321format_timestamp(uint32_t timestamp)
322{
323 static char buffer[32];
324
325 if ((timestamp & 0xff000000) == 0xff000000)
326 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
327 0x00ffffff);
328 else
329 snprintf(buffer, sizeof(buffer), "%us", timestamp);
330 return buffer;
331}
332
333static const char *
334format_class(int8_t class)
335{
336 static char buffer[6];
337
338 switch (class) {
339 case MFI_EVT_CLASS_DEBUG:
340 return "debug";
341 case MFI_EVT_CLASS_PROGRESS:
342 return "progress";
343 case MFI_EVT_CLASS_INFO:
344 return "info";
345 case MFI_EVT_CLASS_WARNING:
346 return "WARN";
347 case MFI_EVT_CLASS_CRITICAL:
348 return "CRIT";
349 case MFI_EVT_CLASS_FATAL:
350 return "FATAL";
351 case MFI_EVT_CLASS_DEAD:
352 return "DEAD";
353 default:
354 snprintf(buffer, sizeof(buffer), "%d", class);
355 return buffer;
356 }
357}
358
359/**
360 * megasas_decode_evt: Decode FW AEN event and print critical event
361 * for information.
362 * @instance: Adapter soft state
363 */
364static void
365megasas_decode_evt(struct megasas_instance *instance)
366{
367 struct megasas_evt_detail *evt_detail = instance->evt_detail;
368 union megasas_evt_class_locale class_locale;
369 class_locale.word = le32_to_cpu(evt_detail->cl.word);
370
371 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
372 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
373 le32_to_cpu(evt_detail->seq_num),
374 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
375 (class_locale.members.locale),
376 format_class(class_locale.members.class),
377 evt_detail->description);
378}
379
1341c939 380/**
0d49016b 381* The following functions are defined for xscale
1341c939
SP		 382* (deviceid : 1064R, PERC5) controllers
383*/
384
c4a3e0a5 385/**
1341c939 386 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 387 * @regs: MFI register set
388 */
389static inline void
d46a3ad6 390megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 391{
d46a3ad6 392 struct megasas_register_set __iomem *regs;
da0dc9fb 393
d46a3ad6 394 regs = instance->reg_set;
39a98554 395 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 396
397 /* Dummy readl to force pci flush */
398 readl(&regs->outbound_intr_mask);
399}
400
b274cab7
SP		 401/**
402 * megasas_disable_intr_xscale -Disables interrupt
403 * @regs: MFI register set
404 */
405static inline void
d46a3ad6 406megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 407{
d46a3ad6 408 struct megasas_register_set __iomem *regs;
b274cab7 409 u32 mask = 0x1f;
da0dc9fb 410
d46a3ad6 411 regs = instance->reg_set;
b274cab7
SP		 412 writel(mask, &regs->outbound_intr_mask);
413 /* Dummy readl to force pci flush */
414 readl(&regs->outbound_intr_mask);
415}
416
1341c939
SP		 417/**
418 * megasas_read_fw_status_reg_xscale - returns the current FW status value
419 * @regs: MFI register set
420 */
421static u32
422megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
423{
424 return readl(&(regs)->outbound_msg_0);
425}
426/**
427 * megasas_clear_interrupt_xscale - Check & clear interrupt
428 * @regs: MFI register set
429 */
0d49016b 430static int
1341c939
SP		 431megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
432{
433 u32 status;
39a98554 434 u32 mfiStatus = 0;
da0dc9fb 435
1341c939
SP		 436 /*
437 * Check if it is our interrupt
438 */
439 status = readl(&regs->outbound_intr_status);
440
39a98554 441 if (status & MFI_OB_INTR_STATUS_MASK)
442 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
443 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
444 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 445
446 /*
447 * Clear the interrupt by writing back the same value
448 */
39a98554 449 if (mfiStatus)
450 writel(status, &regs->outbound_intr_status);
1341c939 451
06f579de
YB		 452 /* Dummy readl to force pci flush */
453 readl(&regs->outbound_intr_status);
454
39a98554 455 return mfiStatus;
1341c939
SP		 456}
457
458/**
459 * megasas_fire_cmd_xscale - Sends command to the FW
460 * @frame_phys_addr : Physical address of cmd
461 * @frame_count : Number of frames for the command
462 * @regs : MFI register set
463 */
0d49016b 464static inline void
0c79e681
YB		 465megasas_fire_cmd_xscale(struct megasas_instance *instance,
466 dma_addr_t frame_phys_addr,
467 u32 frame_count,
468 struct megasas_register_set __iomem *regs)
1341c939 469{
39a98554 470 unsigned long flags;
da0dc9fb 471
39a98554 472 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 473 writel((frame_phys_addr >> 3)|(frame_count),
474 &(regs)->inbound_queue_port);
39a98554 475 spin_unlock_irqrestore(&instance->hba_lock, flags);
476}
477
478/**
479 * megasas_adp_reset_xscale - For controller reset
480 * @regs: MFI register set
481 */
482static int
483megasas_adp_reset_xscale(struct megasas_instance *instance,
484 struct megasas_register_set __iomem *regs)
485{
486 u32 i;
487 u32 pcidata;
da0dc9fb 488
39a98554 489 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
490
491 for (i = 0; i < 3; i++)
492 msleep(1000); /* sleep for 3 secs */
493 pcidata = 0;
494 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 495 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 496 if (pcidata & 0x2) {
1be18254 497 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 498 pcidata &= ~0x2;
499 pci_write_config_dword(instance->pdev,
500 MFI_1068_PCSR_OFFSET, pcidata);
501
502 for (i = 0; i < 2; i++)
503 msleep(1000); /* need to wait 2 secs again */
504
505 pcidata = 0;
506 pci_read_config_dword(instance->pdev,
507 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 508 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 509 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 510 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 511 pcidata = 0;
512 pci_write_config_dword(instance->pdev,
513 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
514 }
515 }
516 return 0;
517}
518
519/**
520 * megasas_check_reset_xscale - For controller reset check
521 * @regs: MFI register set
522 */
523static int
524megasas_check_reset_xscale(struct megasas_instance *instance,
525 struct megasas_register_set __iomem *regs)
526{
8a01a41d 527 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 528 (le32_to_cpu(*instance->consumer) ==
529 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 530 return 1;
39a98554 531 return 0;
1341c939
SP		 532}
533
534static struct megasas_instance_template megasas_instance_template_xscale = {
535
536 .fire_cmd = megasas_fire_cmd_xscale,
537 .enable_intr = megasas_enable_intr_xscale,
b274cab7 538 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 539 .clear_intr = megasas_clear_intr_xscale,
540 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 541 .adp_reset = megasas_adp_reset_xscale,
542 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 543 .service_isr = megasas_isr,
544 .tasklet = megasas_complete_cmd_dpc,
545 .init_adapter = megasas_init_adapter_mfi,
546 .build_and_issue_cmd = megasas_build_and_issue_cmd,
547 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 548};
549
550/**
0d49016b 551* This is the end of set of functions & definitions specific
1341c939
SP		 552* to xscale (deviceid : 1064R, PERC5) controllers
553*/
554
f9876f0b 555/**
0d49016b 556* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 557* controllers
f9876f0b
SP		 558*/
559
560/**
561 * megasas_enable_intr_ppc - Enables interrupts
562 * @regs: MFI register set
563 */
564static inline void
d46a3ad6 565megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 566{
d46a3ad6 567 struct megasas_register_set __iomem *regs;
da0dc9fb 568
d46a3ad6 569 regs = instance->reg_set;
f9876f0b 570 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 571
39a98554 572 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 573
574 /* Dummy readl to force pci flush */
575 readl(&regs->outbound_intr_mask);
576}
577
b274cab7
SP		 578/**
579 * megasas_disable_intr_ppc - Disable interrupt
580 * @regs: MFI register set
581 */
582static inline void
d46a3ad6 583megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 584{
d46a3ad6 585 struct megasas_register_set __iomem *regs;
b274cab7 586 u32 mask = 0xFFFFFFFF;
da0dc9fb 587
d46a3ad6 588 regs = instance->reg_set;
b274cab7
SP		 589 writel(mask, &regs->outbound_intr_mask);
590 /* Dummy readl to force pci flush */
591 readl(&regs->outbound_intr_mask);
592}
593
f9876f0b
SP		 594/**
595 * megasas_read_fw_status_reg_ppc - returns the current FW status value
596 * @regs: MFI register set
597 */
598static u32
599megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
600{
601 return readl(&(regs)->outbound_scratch_pad);
602}
603
604/**
605 * megasas_clear_interrupt_ppc - Check & clear interrupt
606 * @regs: MFI register set
607 */
0d49016b 608static int
f9876f0b
SP		 609megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
610{
3cc6851f
AR		 611 u32 status, mfiStatus = 0;
612
f9876f0b
SP		 613 /*
614 * Check if it is our interrupt
615 */
616 status = readl(&regs->outbound_intr_status);
617
3cc6851f
AR		 618 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
619 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
620
621 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
622 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 623
624 /*
625 * Clear the interrupt by writing back the same value
626 */
627 writel(status, &regs->outbound_doorbell_clear);
628
06f579de
YB		 629 /* Dummy readl to force pci flush */
630 readl(&regs->outbound_doorbell_clear);
631
3cc6851f 632 return mfiStatus;
f9876f0b 633}
3cc6851f 634
f9876f0b
SP		 635/**
636 * megasas_fire_cmd_ppc - Sends command to the FW
637 * @frame_phys_addr : Physical address of cmd
638 * @frame_count : Number of frames for the command
639 * @regs : MFI register set
640 */
0d49016b 641static inline void
0c79e681
YB		 642megasas_fire_cmd_ppc(struct megasas_instance *instance,
643 dma_addr_t frame_phys_addr,
644 u32 frame_count,
645 struct megasas_register_set __iomem *regs)
f9876f0b 646{
39a98554 647 unsigned long flags;
da0dc9fb 648
39a98554 649 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 650 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 651 &(regs)->inbound_queue_port);
39a98554 652 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 653}
654
39a98554 655/**
656 * megasas_check_reset_ppc - For controller reset check
657 * @regs: MFI register set
658 */
659static int
660megasas_check_reset_ppc(struct megasas_instance *instance,
661 struct megasas_register_set __iomem *regs)
662{
8a01a41d 663 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 664 return 1;
665
39a98554 666 return 0;
667}
3cc6851f 668
f9876f0b 669static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 670
f9876f0b
SP		 671 .fire_cmd = megasas_fire_cmd_ppc,
672 .enable_intr = megasas_enable_intr_ppc,
b274cab7 673 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 674 .clear_intr = megasas_clear_intr_ppc,
675 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 676 .adp_reset = megasas_adp_reset_xscale,
39a98554 677 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 678 .service_isr = megasas_isr,
679 .tasklet = megasas_complete_cmd_dpc,
680 .init_adapter = megasas_init_adapter_mfi,
681 .build_and_issue_cmd = megasas_build_and_issue_cmd,
682 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 683};
684
87911122
YB		 685/**
686 * megasas_enable_intr_skinny - Enables interrupts
687 * @regs: MFI register set
688 */
689static inline void
d46a3ad6 690megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 691{
d46a3ad6 692 struct megasas_register_set __iomem *regs;
da0dc9fb 693
d46a3ad6 694 regs = instance->reg_set;
87911122
YB		 695 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
696
697 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
698
699 /* Dummy readl to force pci flush */
700 readl(&regs->outbound_intr_mask);
701}
702
703/**
704 * megasas_disable_intr_skinny - Disables interrupt
705 * @regs: MFI register set
706 */
707static inline void
d46a3ad6 708megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 709{
d46a3ad6 710 struct megasas_register_set __iomem *regs;
87911122 711 u32 mask = 0xFFFFFFFF;
da0dc9fb 712
d46a3ad6 713 regs = instance->reg_set;
87911122
YB		 714 writel(mask, &regs->outbound_intr_mask);
715 /* Dummy readl to force pci flush */
716 readl(&regs->outbound_intr_mask);
717}
718
719/**
720 * megasas_read_fw_status_reg_skinny - returns the current FW status value
721 * @regs: MFI register set
722 */
723static u32
724megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
725{
726 return readl(&(regs)->outbound_scratch_pad);
727}
728
729/**
730 * megasas_clear_interrupt_skinny - Check & clear interrupt
731 * @regs: MFI register set
732 */
733static int
734megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
735{
736 u32 status;
ebf054b0
AR		 737 u32 mfiStatus = 0;
738
87911122
YB		 739 /*
740 * Check if it is our interrupt
741 */
742 status = readl(&regs->outbound_intr_status);
743
744 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 745 return 0;
87911122
YB		 746 }
747
ebf054b0
AR		 748 /*
749 * Check if it is our interrupt
750 */
a3fda7dd 751 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 752 MFI_STATE_FAULT) {
753 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
754 } else
755 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
756
87911122
YB		 757 /*
758 * Clear the interrupt by writing back the same value
759 */
760 writel(status, &regs->outbound_intr_status);
761
762 /*
da0dc9fb
BH		 763 * dummy read to flush PCI
764 */
87911122
YB		 765 readl(&regs->outbound_intr_status);
766
ebf054b0 767 return mfiStatus;
87911122
YB		 768}
769
770/**
771 * megasas_fire_cmd_skinny - Sends command to the FW
772 * @frame_phys_addr : Physical address of cmd
773 * @frame_count : Number of frames for the command
774 * @regs : MFI register set
775 */
776static inline void
0c79e681
YB		 777megasas_fire_cmd_skinny(struct megasas_instance *instance,
778 dma_addr_t frame_phys_addr,
779 u32 frame_count,
87911122
YB		 780 struct megasas_register_set __iomem *regs)
781{
0c79e681 782 unsigned long flags;
da0dc9fb 783
39a98554 784 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 785 writel(upper_32_bits(frame_phys_addr),
786 &(regs)->inbound_high_queue_port);
787 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
788 &(regs)->inbound_low_queue_port);
b99dbe56 789 mmiowb();
39a98554 790 spin_unlock_irqrestore(&instance->hba_lock, flags);
791}
792
39a98554 793/**
794 * megasas_check_reset_skinny - For controller reset check
795 * @regs: MFI register set
796 */
797static int
798megasas_check_reset_skinny(struct megasas_instance *instance,
799 struct megasas_register_set __iomem *regs)
800{
8a01a41d 801 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 802 return 1;
803
39a98554 804 return 0;
87911122
YB		 805}
806
807static struct megasas_instance_template megasas_instance_template_skinny = {
808
809 .fire_cmd = megasas_fire_cmd_skinny,
810 .enable_intr = megasas_enable_intr_skinny,
811 .disable_intr = megasas_disable_intr_skinny,
812 .clear_intr = megasas_clear_intr_skinny,
813 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 814 .adp_reset = megasas_adp_reset_gen2,
39a98554 815 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 816 .service_isr = megasas_isr,
817 .tasklet = megasas_complete_cmd_dpc,
818 .init_adapter = megasas_init_adapter_mfi,
819 .build_and_issue_cmd = megasas_build_and_issue_cmd,
820 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 821};
822
823
6610a6b3
YB		 824/**
825* The following functions are defined for gen2 (deviceid : 0x78 0x79)
826* controllers
827*/
828
829/**
830 * megasas_enable_intr_gen2 - Enables interrupts
831 * @regs: MFI register set
832 */
833static inline void
d46a3ad6 834megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 835{
d46a3ad6 836 struct megasas_register_set __iomem *regs;
da0dc9fb 837
d46a3ad6 838 regs = instance->reg_set;
6610a6b3
YB		 839 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
840
841 /* write ~0x00000005 (4 & 1) to the intr mask*/
842 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
843
844 /* Dummy readl to force pci flush */
845 readl(&regs->outbound_intr_mask);
846}
847
848/**
849 * megasas_disable_intr_gen2 - Disables interrupt
850 * @regs: MFI register set
851 */
852static inline void
d46a3ad6 853megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 854{
d46a3ad6 855 struct megasas_register_set __iomem *regs;
6610a6b3 856 u32 mask = 0xFFFFFFFF;
da0dc9fb 857
d46a3ad6 858 regs = instance->reg_set;
6610a6b3
YB		 859 writel(mask, &regs->outbound_intr_mask);
860 /* Dummy readl to force pci flush */
861 readl(&regs->outbound_intr_mask);
862}
863
864/**
865 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
866 * @regs: MFI register set
867 */
868static u32
869megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
870{
871 return readl(&(regs)->outbound_scratch_pad);
872}
873
874/**
875 * megasas_clear_interrupt_gen2 - Check & clear interrupt
876 * @regs: MFI register set
877 */
878static int
879megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
880{
881 u32 status;
39a98554 882 u32 mfiStatus = 0;
da0dc9fb 883
6610a6b3
YB		 884 /*
885 * Check if it is our interrupt
886 */
887 status = readl(&regs->outbound_intr_status);
888
b5bccadd 889 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 890 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
891 }
892 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
893 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
894 }
6610a6b3
YB		 895
896 /*
897 * Clear the interrupt by writing back the same value
898 */
39a98554 899 if (mfiStatus)
900 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 901
902 /* Dummy readl to force pci flush */
903 readl(&regs->outbound_intr_status);
904
39a98554 905 return mfiStatus;
6610a6b3
YB		 906}
907/**
908 * megasas_fire_cmd_gen2 - Sends command to the FW
909 * @frame_phys_addr : Physical address of cmd
910 * @frame_count : Number of frames for the command
911 * @regs : MFI register set
912 */
913static inline void
0c79e681
YB		 914megasas_fire_cmd_gen2(struct megasas_instance *instance,
915 dma_addr_t frame_phys_addr,
916 u32 frame_count,
6610a6b3
YB		 917 struct megasas_register_set __iomem *regs)
918{
39a98554 919 unsigned long flags;
da0dc9fb 920
39a98554 921 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 922 writel((frame_phys_addr | (frame_count<<1))|1,
923 &(regs)->inbound_queue_port);
39a98554 924 spin_unlock_irqrestore(&instance->hba_lock, flags);
925}
926
927/**
928 * megasas_adp_reset_gen2 - For controller reset
929 * @regs: MFI register set
930 */
931static int
932megasas_adp_reset_gen2(struct megasas_instance *instance,
933 struct megasas_register_set __iomem *reg_set)
934{
da0dc9fb
BH		 935 u32 retry = 0 ;
936 u32 HostDiag;
937 u32 __iomem *seq_offset = &reg_set->seq_offset;
938 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 939
940 if (instance->instancet == &megasas_instance_template_skinny) {
941 seq_offset = &reg_set->fusion_seq_offset;
942 hostdiag_offset = &reg_set->fusion_host_diag;
943 }
944
945 writel(0, seq_offset);
946 writel(4, seq_offset);
947 writel(0xb, seq_offset);
948 writel(2, seq_offset);
949 writel(7, seq_offset);
950 writel(0xd, seq_offset);
39a98554 951
39a98554 952 msleep(1000);
953
ebf054b0 954 HostDiag = (u32)readl(hostdiag_offset);
39a98554 955
da0dc9fb 956 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 957 msleep(100);
ebf054b0 958 HostDiag = (u32)readl(hostdiag_offset);
1be18254 959 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 960 retry, HostDiag);
961
962 if (retry++ >= 100)
963 return 1;
964
965 }
966
1be18254 967 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 968
ebf054b0 969 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 970
971 ssleep(10);
972
ebf054b0 973 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 974 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 975 msleep(100);
ebf054b0 976 HostDiag = (u32)readl(hostdiag_offset);
1be18254 977 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 978 retry, HostDiag);
979
980 if (retry++ >= 1000)
981 return 1;
982
983 }
984 return 0;
985}
986
987/**
988 * megasas_check_reset_gen2 - For controller reset check
989 * @regs: MFI register set
990 */
991static int
992megasas_check_reset_gen2(struct megasas_instance *instance,
993 struct megasas_register_set __iomem *regs)
994{
8a01a41d 995 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 996 return 1;
707e09bd 997
39a98554 998 return 0;
6610a6b3
YB		 999}
1000
1001static struct megasas_instance_template megasas_instance_template_gen2 = {
1002
1003 .fire_cmd = megasas_fire_cmd_gen2,
1004 .enable_intr = megasas_enable_intr_gen2,
1005 .disable_intr = megasas_disable_intr_gen2,
1006 .clear_intr = megasas_clear_intr_gen2,
1007 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 1008 .adp_reset = megasas_adp_reset_gen2,
1009 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 1010 .service_isr = megasas_isr,
1011 .tasklet = megasas_complete_cmd_dpc,
1012 .init_adapter = megasas_init_adapter_mfi,
1013 .build_and_issue_cmd = megasas_build_and_issue_cmd,
1014 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 1015};
1016
f9876f0b
SP		 1017/**
1018* This is the end of set of functions & definitions
39a98554 1019* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 1020*/
1021
9c915a8c
AR		 1022/*
1023 * Template added for TB (Fusion)
1024 */
1025extern struct megasas_instance_template megasas_instance_template_fusion;
1026
c4a3e0a5
BS		 1027/**
1028 * megasas_issue_polled - Issues a polling command
1029 * @instance: Adapter soft state
0d49016b 1030 * @cmd: Command packet to be issued
c4a3e0a5 1031 *
2be2a988 1032 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 1033 */
9c915a8c 1034int
c4a3e0a5
BS		 1035megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
1036{
c4a3e0a5
BS		 1037 struct megasas_header *frame_hdr = &cmd->frame->hdr;
1038
6d40afbc 1039 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 1040 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 1041
f4fc2093 1042 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1043 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1044 __func__, __LINE__);
1045 return DCMD_NOT_FIRED;
1046 }
c4a3e0a5 1047
f4fc2093
S		 1048 instance->instancet->issue_dcmd(instance, cmd);
1049
6d40afbc
SS		 1050 return wait_and_poll(instance, cmd, instance->requestorId ?
1051 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS		 1052}
1053
1054/**
1055 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1056 * @instance: Adapter soft state
1057 * @cmd: Command to be issued
cfbe7554 1058 * @timeout: Timeout in seconds
c4a3e0a5
BS		 1059 *
1060 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1061 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1062 * Used to issue ioctl commands.
1063 */
90dc9d98 1064int
c4a3e0a5 1065megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1066 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1067{
cfbe7554 1068 int ret = 0;
2be2a988 1069 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1070
f4fc2093 1071 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1072 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1073 __func__, __LINE__);
1074 return DCMD_NOT_FIRED;
1075 }
1076
f4fc2093
S		 1077 instance->instancet->issue_dcmd(instance, cmd);
1078
cfbe7554
SS		 1079 if (timeout) {
1080 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1081 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS		 1082 if (!ret) {
1083 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1084 __func__, __LINE__);
1085 return DCMD_TIMEOUT;
1086 }
cfbe7554
SS		 1087 } else
1088 wait_event(instance->int_cmd_wait_q,
2be2a988 1089 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1090
2be2a988 1091 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1092 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1093}
1094
1095/**
1096 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1097 * @instance: Adapter soft state
1098 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1099 * @timeout: Timeout in seconds
c4a3e0a5 1100 *
cfbe7554 1101 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1102 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 1103 * cmd and waits for return status.
1104 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1105 */
1106static int
1107megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1108 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 1109{
1110 struct megasas_cmd *cmd;
1111 struct megasas_abort_frame *abort_fr;
cfbe7554 1112 int ret = 0;
c4a3e0a5
BS		 1113
1114 cmd = megasas_get_cmd(instance);
1115
1116 if (!cmd)
1117 return -1;
1118
1119 abort_fr = &cmd->frame->abort;
1120
1121 /*
1122 * Prepare and issue the abort frame
1123 */
1124 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1125 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1126 abort_fr->flags = cpu_to_le16(0);
1127 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1128 abort_fr->abort_mfi_phys_addr_lo =
1129 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1130 abort_fr->abort_mfi_phys_addr_hi =
1131 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1132
1133 cmd->sync_cmd = 1;
2be2a988 1134 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1135
f4fc2093 1136 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1137 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1138 __func__, __LINE__);
1139 return DCMD_NOT_FIRED;
1140 }
c4a3e0a5 1141
f4fc2093
S		 1142 instance->instancet->issue_dcmd(instance, cmd);
1143
cfbe7554
SS		 1144 if (timeout) {
1145 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1146 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1147 if (!ret) {
6d40afbc
SS		 1148 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1149 __func__, __LINE__);
1150 return DCMD_TIMEOUT;
cfbe7554
SS		 1151 }
1152 } else
1153 wait_event(instance->abort_cmd_wait_q,
2be2a988 1154 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1155
39a98554 1156 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1157
1158 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 1159 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1160 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1161}
1162
1163/**
1164 * megasas_make_sgl32 - Prepares 32-bit SGL
1165 * @instance: Adapter soft state
1166 * @scp: SCSI command from the mid-layer
1167 * @mfi_sgl: SGL to be filled in
1168 *
1169 * If successful, this function returns the number of SG elements. Otherwise,
1170 * it returnes -1.
1171 */
858119e1 1172static int
c4a3e0a5
BS		 1173megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1174 union megasas_sgl *mfi_sgl)
1175{
1176 int i;
1177 int sge_count;
1178 struct scatterlist *os_sgl;
1179
155d98f0
FT		 1180 sge_count = scsi_dma_map(scp);
1181 BUG_ON(sge_count < 0);
c4a3e0a5 1182
155d98f0
FT		 1183 if (sge_count) {
1184 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1185 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1186 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1187 }
c4a3e0a5 1188 }
c4a3e0a5
BS		 1189 return sge_count;
1190}
1191
1192/**
1193 * megasas_make_sgl64 - Prepares 64-bit SGL
1194 * @instance: Adapter soft state
1195 * @scp: SCSI command from the mid-layer
1196 * @mfi_sgl: SGL to be filled in
1197 *
1198 * If successful, this function returns the number of SG elements. Otherwise,
1199 * it returnes -1.
1200 */
858119e1 1201static int
c4a3e0a5
BS		 1202megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1203 union megasas_sgl *mfi_sgl)
1204{
1205 int i;
1206 int sge_count;
1207 struct scatterlist *os_sgl;
1208
155d98f0
FT		 1209 sge_count = scsi_dma_map(scp);
1210 BUG_ON(sge_count < 0);
c4a3e0a5 1211
155d98f0
FT		 1212 if (sge_count) {
1213 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1214 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1215 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1216 }
c4a3e0a5 1217 }
c4a3e0a5
BS		 1218 return sge_count;
1219}
1220
f4c9a131
YB		 1221/**
1222 * megasas_make_sgl_skinny - Prepares IEEE SGL
1223 * @instance: Adapter soft state
1224 * @scp: SCSI command from the mid-layer
1225 * @mfi_sgl: SGL to be filled in
1226 *
1227 * If successful, this function returns the number of SG elements. Otherwise,
1228 * it returnes -1.
1229 */
1230static int
1231megasas_make_sgl_skinny(struct megasas_instance *instance,
1232 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1233{
1234 int i;
1235 int sge_count;
1236 struct scatterlist *os_sgl;
1237
1238 sge_count = scsi_dma_map(scp);
1239
1240 if (sge_count) {
1241 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1242 mfi_sgl->sge_skinny[i].length =
1243 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1244 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1245 cpu_to_le64(sg_dma_address(os_sgl));
1246 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1247 }
1248 }
1249 return sge_count;
1250}
1251
b1df99d9
SP		 1252 /**
1253 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1254 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1255 * @sge_count : number of sg elements
1256 *
1257 * Returns the number of frames required for numnber of sge's (sge_count)
1258 */
1259
f4c9a131
YB		 1260static u32 megasas_get_frame_count(struct megasas_instance *instance,
1261 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1262{
1263 int num_cnt;
1264 int sge_bytes;
1265 u32 sge_sz;
da0dc9fb 1266 u32 frame_count = 0;
b1df99d9
SP		 1267
1268 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1269 sizeof(struct megasas_sge32);
1270
f4c9a131
YB		 1271 if (instance->flag_ieee) {
1272 sge_sz = sizeof(struct megasas_sge_skinny);
1273 }
1274
b1df99d9 1275 /*
d532dbe2 1276 * Main frame can contain 2 SGEs for 64-bit SGLs and
1277 * 3 SGEs for 32-bit SGLs for ldio &
1278 * 1 SGEs for 64-bit SGLs and
1279 * 2 SGEs for 32-bit SGLs for pthru frame
1280 */
1281 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1282 if (instance->flag_ieee == 1) {
1283 num_cnt = sge_count - 1;
1284 } else if (IS_DMA64)
d532dbe2 1285 num_cnt = sge_count - 1;
1286 else
1287 num_cnt = sge_count - 2;
1288 } else {
f4c9a131
YB		 1289 if (instance->flag_ieee == 1) {
1290 num_cnt = sge_count - 1;
1291 } else if (IS_DMA64)
d532dbe2 1292 num_cnt = sge_count - 2;
1293 else
1294 num_cnt = sge_count - 3;
1295 }
b1df99d9 1296
da0dc9fb 1297 if (num_cnt > 0) {
b1df99d9
SP		 1298 sge_bytes = sge_sz * num_cnt;
1299
1300 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1301 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1302 }
1303 /* Main frame */
da0dc9fb 1304 frame_count += 1;
b1df99d9
SP		 1305
1306 if (frame_count > 7)
1307 frame_count = 8;
1308 return frame_count;
1309}
1310
c4a3e0a5
BS		 1311/**
1312 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1313 * @instance: Adapter soft state
1314 * @scp: SCSI command
1315 * @cmd: Command to be prepared in
1316 *
1317 * This function prepares CDB commands. These are typcially pass-through
1318 * commands to the devices.
1319 */
858119e1 1320static int
c4a3e0a5
BS		 1321megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1322 struct megasas_cmd *cmd)
1323{
c4a3e0a5
BS		 1324 u32 is_logical;
1325 u32 device_id;
1326 u16 flags = 0;
1327 struct megasas_pthru_frame *pthru;
1328
3cabd162 1329 is_logical = MEGASAS_IS_LOGICAL(scp->device);
4a5c814d 1330 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1331 pthru = (struct megasas_pthru_frame *)cmd->frame;
1332
1333 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1334 flags = MFI_FRAME_DIR_WRITE;
1335 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1336 flags = MFI_FRAME_DIR_READ;
1337 else if (scp->sc_data_direction == PCI_DMA_NONE)
1338 flags = MFI_FRAME_DIR_NONE;
1339
f4c9a131
YB		 1340 if (instance->flag_ieee == 1) {
1341 flags |= MFI_FRAME_IEEE;
1342 }
1343
c4a3e0a5
BS		 1344 /*
1345 * Prepare the DCDB frame
1346 */
1347 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1348 pthru->cmd_status = 0x0;
1349 pthru->scsi_status = 0x0;
1350 pthru->target_id = device_id;
1351 pthru->lun = scp->device->lun;
1352 pthru->cdb_len = scp->cmd_len;
1353 pthru->timeout = 0;
780a3762 1354 pthru->pad_0 = 0;
94cd65dd
SS		 1355 pthru->flags = cpu_to_le16(flags);
1356 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1357
1358 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1359
8d568253 1360 /*
da0dc9fb
BH		 1361 * If the command is for the tape device, set the
1362 * pthru timeout to the os layer timeout value.
1363 */
8d568253
YB		 1364 if (scp->device->type == TYPE_TAPE) {
1365 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1366 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1367 else
94cd65dd 1368 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1369 }
1370
c4a3e0a5
BS		 1371 /*
1372 * Construct SGL
1373 */
f4c9a131 1374 if (instance->flag_ieee == 1) {
94cd65dd 1375 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1376 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1377 &pthru->sgl);
1378 } else if (IS_DMA64) {
94cd65dd 1379 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1380 pthru->sge_count = megasas_make_sgl64(instance, scp,
1381 &pthru->sgl);
1382 } else
1383 pthru->sge_count = megasas_make_sgl32(instance, scp,
1384 &pthru->sgl);
1385
bdc6fb8d 1386 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1387 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1388 pthru->sge_count);
1389 return 0;
1390 }
1391
c4a3e0a5
BS		 1392 /*
1393 * Sense info specific
1394 */
1395 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1396 pthru->sense_buf_phys_addr_hi =
1397 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1398 pthru->sense_buf_phys_addr_lo =
1399 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1400
c4a3e0a5
BS		 1401 /*
1402 * Compute the total number of frames this command consumes. FW uses
1403 * this number to pull sufficient number of frames from host memory.
1404 */
f4c9a131 1405 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1406 PTHRU_FRAME);
c4a3e0a5
BS		 1407
1408 return cmd->frame_count;
1409}
1410
1411/**
1412 * megasas_build_ldio - Prepares IOs to logical devices
1413 * @instance: Adapter soft state
1414 * @scp: SCSI command
fd589a8f 1415 * @cmd: Command to be prepared
c4a3e0a5
BS		 1416 *
1417 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1418 */
858119e1 1419static int
c4a3e0a5
BS		 1420megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1421 struct megasas_cmd *cmd)
1422{
c4a3e0a5
BS		 1423 u32 device_id;
1424 u8 sc = scp->cmnd[0];
1425 u16 flags = 0;
1426 struct megasas_io_frame *ldio;
1427
4a5c814d 1428 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1429 ldio = (struct megasas_io_frame *)cmd->frame;
1430
1431 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1432 flags = MFI_FRAME_DIR_WRITE;
1433 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1434 flags = MFI_FRAME_DIR_READ;
1435
f4c9a131
YB		 1436 if (instance->flag_ieee == 1) {
1437 flags |= MFI_FRAME_IEEE;
1438 }
1439
c4a3e0a5 1440 /*
b1df99d9 1441 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1442 */
1443 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1444 ldio->cmd_status = 0x0;
1445 ldio->scsi_status = 0x0;
1446 ldio->target_id = device_id;
1447 ldio->timeout = 0;
1448 ldio->reserved_0 = 0;
1449 ldio->pad_0 = 0;
94cd65dd 1450 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1451 ldio->start_lba_hi = 0;
1452 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1453
1454 /*
1455 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1456 */
1457 if (scp->cmd_len == 6) {
94cd65dd
SS		 1458 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1459 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1460 ((u32) scp->cmnd[2] << 8) |
1461 (u32) scp->cmnd[3]);
c4a3e0a5 1462
94cd65dd 1463 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1464 }
1465
1466 /*
1467 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1468 */
1469 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1470 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1471 ((u32) scp->cmnd[7] << 8));
1472 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1473 ((u32) scp->cmnd[3] << 16) |
1474 ((u32) scp->cmnd[4] << 8) |
1475 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1476 }
1477
1478 /*
1479 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1480 */
1481 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1482 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1483 ((u32) scp->cmnd[7] << 16) |
1484 ((u32) scp->cmnd[8] << 8) |
1485 (u32) scp->cmnd[9]);
c4a3e0a5 1486
94cd65dd
SS		 1487 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1488 ((u32) scp->cmnd[3] << 16) |
1489 ((u32) scp->cmnd[4] << 8) |
1490 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1491 }
1492
1493 /*
1494 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1495 */
1496 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1497 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1498 ((u32) scp->cmnd[11] << 16) |
1499 ((u32) scp->cmnd[12] << 8) |
1500 (u32) scp->cmnd[13]);
c4a3e0a5 1501
94cd65dd
SS		 1502 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1503 ((u32) scp->cmnd[7] << 16) |
1504 ((u32) scp->cmnd[8] << 8) |
1505 (u32) scp->cmnd[9]);
c4a3e0a5 1506
94cd65dd
SS		 1507 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1508 ((u32) scp->cmnd[3] << 16) |
1509 ((u32) scp->cmnd[4] << 8) |
1510 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1511
1512 }
1513
1514 /*
1515 * Construct SGL
1516 */
f4c9a131 1517 if (instance->flag_ieee) {
94cd65dd 1518 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1519 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1520 &ldio->sgl);
1521 } else if (IS_DMA64) {
94cd65dd 1522 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1523 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1524 } else
1525 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1526
bdc6fb8d 1527 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1528 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1529 ldio->sge_count);
1530 return 0;
1531 }
1532
c4a3e0a5
BS		 1533 /*
1534 * Sense info specific
1535 */
1536 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1537 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1538 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1539
b1df99d9
SP		 1540 /*
1541 * Compute the total number of frames this command consumes. FW uses
1542 * this number to pull sufficient number of frames from host memory.
1543 */
f4c9a131
YB		 1544 cmd->frame_count = megasas_get_frame_count(instance,
1545 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1546
1547 return cmd->frame_count;
1548}
1549
1550/**
7497cde8
SS		 1551 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1552 * and whether it's RW or non RW
cb59aa6a 1553 * @scmd: SCSI command
0d49016b 1554 *
c4a3e0a5 1555 */
7497cde8 1556inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1557{
7497cde8
SS		 1558 int ret;
1559
cb59aa6a
SP		 1560 switch (cmd->cmnd[0]) {
1561 case READ_10:
1562 case WRITE_10:
1563 case READ_12:
1564 case WRITE_12:
1565 case READ_6:
1566 case WRITE_6:
1567 case READ_16:
1568 case WRITE_16:
3cabd162 1569 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8
SS		 1570 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1571 break;
cb59aa6a 1572 default:
3cabd162 1573 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8 1574 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1575 }
7497cde8 1576 return ret;
c4a3e0a5
BS		 1577}
1578
658dcedb
SP		 1579 /**
1580 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1581 * in FW
658dcedb
SP		 1582 * @instance: Adapter soft state
1583 */
1584static inline void
1585megasas_dump_pending_frames(struct megasas_instance *instance)
1586{
1587 struct megasas_cmd *cmd;
1588 int i,n;
1589 union megasas_sgl *mfi_sgl;
1590 struct megasas_io_frame *ldio;
1591 struct megasas_pthru_frame *pthru;
1592 u32 sgcount;
50b7f5a2 1593 u16 max_cmd = instance->max_fw_cmds;
658dcedb 1594
1be18254
BH		 1595 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1596 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1597 if (IS_DMA64)
1be18254 1598 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1599 else
1be18254 1600 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1601
1be18254 1602 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1603 for (i = 0; i < max_cmd; i++) {
1604 cmd = instance->cmd_list[i];
da0dc9fb 1605 if (!cmd->scmd)
658dcedb 1606 continue;
1be18254 1607 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1608 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1609 ldio = (struct megasas_io_frame *)cmd->frame;
1610 mfi_sgl = &ldio->sgl;
1611 sgcount = ldio->sge_count;
1be18254 1612 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1613 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1614 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1615 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1616 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1617 } else {
658dcedb
SP		 1618 pthru = (struct megasas_pthru_frame *) cmd->frame;
1619 mfi_sgl = &pthru->sgl;
1620 sgcount = pthru->sge_count;
1be18254 1621 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1622 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1623 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1624 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1625 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1626 }
da0dc9fb
BH		 1627 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1628 for (n = 0; n < sgcount; n++) {
1629 if (IS_DMA64)
1630 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1631 le32_to_cpu(mfi_sgl->sge64[n].length),
1632 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1633 else
1634 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1635 le32_to_cpu(mfi_sgl->sge32[n].length),
1636 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1637 }
1638 }
658dcedb 1639 } /*for max_cmd*/
1be18254 1640 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1641 for (i = 0; i < max_cmd; i++) {
1642
1643 cmd = instance->cmd_list[i];
1644
da0dc9fb 1645 if (cmd->sync_cmd == 1)
1be18254 1646 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1647 }
1be18254 1648 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1649}
1650
cd50ba8e
AR		 1651u32
1652megasas_build_and_issue_cmd(struct megasas_instance *instance,
1653 struct scsi_cmnd *scmd)
1654{
1655 struct megasas_cmd *cmd;
1656 u32 frame_count;
1657
1658 cmd = megasas_get_cmd(instance);
1659 if (!cmd)
1660 return SCSI_MLQUEUE_HOST_BUSY;
1661
1662 /*
1663 * Logical drive command
1664 */
7497cde8 1665 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1666 frame_count = megasas_build_ldio(instance, scmd, cmd);
1667 else
1668 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1669
1670 if (!frame_count)
1671 goto out_return_cmd;
1672
1673 cmd->scmd = scmd;
1674 scmd->SCp.ptr = (char *)cmd;
1675
1676 /*
1677 * Issue the command to the FW
1678 */
1679 atomic_inc(&instance->fw_outstanding);
1680
1681 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1682 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1683
1684 return 0;
1685out_return_cmd:
1686 megasas_return_cmd(instance, cmd);
f9a9dee6 1687 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e
AR		 1688}
1689
1690
c4a3e0a5
BS		 1691/**
1692 * megasas_queue_command - Queue entry point
1693 * @scmd: SCSI command to be queued
1694 * @done: Callback entry point
1695 */
1696static int
fb1a24ff 1697megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1698{
c4a3e0a5 1699 struct megasas_instance *instance;
18365b13 1700 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS		 1701
1702 instance = (struct megasas_instance *)
1703 scmd->device->host->hostdata;
af37acfb 1704
aa00832b
SS		 1705 if (instance->unload == 1) {
1706 scmd->result = DID_NO_CONNECT << 16;
1707 scmd->scsi_done(scmd);
1708 return 0;
1709 }
1710
39a98554 1711 if (instance->issuepend_done == 0)
af37acfb
SP		 1712 return SCSI_MLQUEUE_HOST_BUSY;
1713
b09e66da 1714
229fe47c 1715 /* Check for an mpio path and adjust behavior */
8a01a41d 1716 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1717 if (megasas_check_mpio_paths(instance, scmd) ==
f55cf47d 1718 (DID_REQUEUE << 16)) {
229fe47c
AR		 1719 return SCSI_MLQUEUE_HOST_BUSY;
1720 } else {
229fe47c 1721 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1722 scmd->scsi_done(scmd);
229fe47c
AR		 1723 return 0;
1724 }
1725 }
1726
8a01a41d 1727 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1728 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1729 scmd->scsi_done(scmd);
b09e66da
SS		 1730 return 0;
1731 }
1732
18365b13
SS		 1733 mr_device_priv_data = scmd->device->hostdata;
1734 if (!mr_device_priv_data) {
18365b13
SS		 1735 scmd->result = DID_NO_CONNECT << 16;
1736 scmd->scsi_done(scmd);
1737 return 0;
1738 }
1739
8a01a41d 1740 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1741 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1742
8a01a41d 1743 if (mr_device_priv_data->tm_busy)
18365b13 1744 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1745
39a98554 1746
c4a3e0a5
BS		 1747 scmd->result = 0;
1748
3cabd162 1749 if (MEGASAS_IS_LOGICAL(scmd->device) &&
51087a86
SS		 1750 (scmd->device->id >= instance->fw_supported_vd_count ||
1751 scmd->device->lun)) {
cb59aa6a
SP		 1752 scmd->result = DID_BAD_TARGET << 16;
1753 goto out_done;
c4a3e0a5
BS		 1754 }
1755
3cabd162
S		 1756 if ((scmd->cmnd[0] == SYNCHRONIZE_CACHE) &&
1757 MEGASAS_IS_LOGICAL(scmd->device) &&
1758 (!instance->fw_sync_cache_support)) {
02b01e01
SP		 1759 scmd->result = DID_OK << 16;
1760 goto out_done;
02b01e01
SP		 1761 }
1762
f9a9dee6 1763 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1764
cb59aa6a 1765 out_done:
fb1a24ff 1766 scmd->scsi_done(scmd);
cb59aa6a 1767 return 0;
c4a3e0a5
BS		 1768}
1769
044833b5
YB		 1770static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1771{
1772 int i;
1773
1774 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1775
1776 if ((megasas_mgmt_info.instance[i]) &&
1777 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1778 return megasas_mgmt_info.instance[i];
1779 }
1780
1781 return NULL;
1782}
1783
0b48d12d 1784/*
15dd0381
S		 1785* megasas_set_dynamic_target_properties -
1786* Device property set by driver may not be static and it is required to be
1787* updated after OCR
1788*
1789* set tm_capable.
1790* set dma alignment (only for eedp protection enable vd).
0b48d12d 1791*
1792* @sdev: OS provided scsi device
1793*
1794* Returns void
1795*/
15dd0381 1796void megasas_set_dynamic_target_properties(struct scsi_device *sdev)
0b48d12d 1797{
15dd0381
S		 1798 u16 pd_index = 0, ld;
1799 u32 device_id;
0b48d12d 1800 struct megasas_instance *instance;
1801 struct fusion_context *fusion;
18365b13
SS		 1802 struct MR_PRIV_DEVICE *mr_device_priv_data;
1803 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1804 struct MR_LD_RAID *raid;
1805 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1806
1807 instance = megasas_lookup_instance(sdev->host->host_no);
1808 fusion = instance->ctrl_context;
18365b13 1809 mr_device_priv_data = sdev->hostdata;
0b48d12d 1810
ed981b81 1811 if (!fusion || !mr_device_priv_data)
0b48d12d 1812 return;
1813
ed981b81 1814 if (MEGASAS_IS_LOGICAL(sdev)) {
0b48d12d 1815 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1816 + sdev->id;
1817 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1818 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
ed981b81
S		 1819 if (ld >= instance->fw_supported_vd_count)
1820 return;
0b48d12d 1821 raid = MR_LdRaidGet(ld, local_map_ptr);
1822
1823 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
15dd0381 1824 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
ed981b81 1825
18365b13
SS		 1826 mr_device_priv_data->is_tm_capable =
1827 raid->capability.tmCapable;
ed981b81
S		 1828 } else if (instance->use_seqnum_jbod_fp) {
1829 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
15dd0381 1830 sdev->id;
ed981b81
S		 1831 pd_sync = (void *)fusion->pd_seq_sync
1832 [(instance->pd_seq_map_id - 1) & 1];
1833 mr_device_priv_data->is_tm_capable =
15dd0381 1834 pd_sync->seq[pd_index].capability.tmCapable;
0b48d12d 1835 }
1836}
1837
15dd0381
S		 1838/*
1839 * megasas_set_nvme_device_properties -
1840 * set nomerges=2
1841 * set virtual page boundary = 4K (current mr_nvme_pg_size is 4K).
1842 * set maximum io transfer = MDTS of NVME device provided by MR firmware.
1843 *
1844 * MR firmware provides value in KB. Caller of this function converts
1845 * kb into bytes.
1846 *
1847 * e.a MDTS=5 means 2^5 * nvme page size. (In case of 4K page size,
1848 * MR firmware provides value 128 as (32 * 4K) = 128K.
1849 *
1850 * @sdev: scsi device
1851 * @max_io_size: maximum io transfer size
1852 *
1853 */
1854static inline void
1855megasas_set_nvme_device_properties(struct scsi_device *sdev, u32 max_io_size)
2216c305 1856{
2216c305 1857 struct megasas_instance *instance;
15dd0381 1858 u32 mr_nvme_pg_size;
2216c305 1859
15dd0381
S		 1860 instance = (struct megasas_instance *)sdev->host->hostdata;
1861 mr_nvme_pg_size = max_t(u32, instance->nvme_page_size,
1862 MR_DEFAULT_NVME_PAGE_SIZE);
2216c305 1863
15dd0381 1864 blk_queue_max_hw_sectors(sdev->request_queue, (max_io_size / 512));
2216c305 1865
15dd0381
S		 1866 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, sdev->request_queue);
1867 blk_queue_virt_boundary(sdev->request_queue, mr_nvme_pg_size - 1);
1868}
2216c305 1869
2216c305 1870
15dd0381
S		 1871/*
1872 * megasas_set_static_target_properties -
1873 * Device property set by driver are static and it is not required to be
1874 * updated after OCR.
1875 *
1876 * set io timeout
1877 * set device queue depth
1878 * set nvme device properties. see - megasas_set_nvme_device_properties
1879 *
1880 * @sdev: scsi device
96188a89 1881 * @is_target_prop true, if fw provided target properties.
15dd0381 1882 */
96188a89
S		 1883static void megasas_set_static_target_properties(struct scsi_device *sdev,
1884 bool is_target_prop)
15dd0381
S		 1885{
1886 u16 target_index = 0;
1887 u8 interface_type;
1888 u32 device_qd = MEGASAS_DEFAULT_CMD_PER_LUN;
1889 u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB;
96188a89 1890 u32 tgt_device_qd;
15dd0381
S		 1891 struct megasas_instance *instance;
1892 struct MR_PRIV_DEVICE *mr_device_priv_data;
2216c305 1893
15dd0381
S		 1894 instance = megasas_lookup_instance(sdev->host->host_no);
1895 mr_device_priv_data = sdev->hostdata;
1896 interface_type = mr_device_priv_data->interface_type;
2216c305 1897
15dd0381
S		 1898 /*
1899 * The RAID firmware may require extended timeouts.
1900 */
1901 blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ);
2216c305 1902
15dd0381
S		 1903 target_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1904
1905 switch (interface_type) {
1906 case SAS_PD:
1907 device_qd = MEGASAS_SAS_QD;
1908 break;
1909 case SATA_PD:
1910 device_qd = MEGASAS_SATA_QD;
1911 break;
1912 case NVME_PD:
1913 device_qd = MEGASAS_NVME_QD;
1914 break;
2216c305 1915 }
15dd0381 1916
96188a89
S		 1917 if (is_target_prop) {
1918 tgt_device_qd = le32_to_cpu(instance->tgt_prop->device_qdepth);
1919 if (tgt_device_qd &&
1920 (tgt_device_qd <= instance->host->can_queue))
1921 device_qd = tgt_device_qd;
1922
1923 /* max_io_size_kb will be set to non zero for
1924 * nvme based vd and syspd.
1925 */
1926 max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb);
1927 }
1928
15dd0381
S		 1929 if (instance->nvme_page_size && max_io_size_kb)
1930 megasas_set_nvme_device_properties(sdev, (max_io_size_kb << 10));
1931
1932 scsi_change_queue_depth(sdev, device_qd);
1933
2216c305
SS		 1934}
1935
18365b13 1936
147aab6a
CH		 1937static int megasas_slave_configure(struct scsi_device *sdev)
1938{
aed335ee
SS		 1939 u16 pd_index = 0;
1940 struct megasas_instance *instance;
96188a89
S		 1941 int ret_target_prop = DCMD_FAILED;
1942 bool is_target_prop = false;
aed335ee
SS		 1943
1944 instance = megasas_lookup_instance(sdev->host->host_no);
30845586 1945 if (instance->pd_list_not_supported) {
3cabd162 1946 if (!MEGASAS_IS_LOGICAL(sdev) && sdev->type == TYPE_DISK) {
aed335ee
SS		 1947 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1948 sdev->id;
1949 if (instance->pd_list[pd_index].driveState !=
1950 MR_PD_STATE_SYSTEM)
1951 return -ENXIO;
1952 }
1953 }
18365b13 1954
15dd0381
S		 1955 mutex_lock(&instance->hba_mutex);
1956 /* Send DCMD to Firmware and cache the information */
1957 if ((instance->pd_info) && !MEGASAS_IS_LOGICAL(sdev))
1958 megasas_get_pd_info(instance, sdev);
1959
96188a89
S		 1960 /* Some ventura firmware may not have instance->nvme_page_size set.
1961 * Do not send MR_DCMD_DRV_GET_TARGET_PROP
1962 */
1963 if ((instance->tgt_prop) && (instance->nvme_page_size))
1964 ret_target_prop = megasas_get_target_prop(instance, sdev);
1965
1966 is_target_prop = (ret_target_prop == DCMD_SUCCESS) ? true : false;
1967 megasas_set_static_target_properties(sdev, is_target_prop);
15dd0381
S		 1968
1969 mutex_unlock(&instance->hba_mutex);
1970
1971 /* This sdev property may change post OCR */
1972 megasas_set_dynamic_target_properties(sdev);
07e38d94 1973
044833b5
YB		 1974 return 0;
1975}
1976
1977static int megasas_slave_alloc(struct scsi_device *sdev)
1978{
da0dc9fb 1979 u16 pd_index = 0;
044833b5 1980 struct megasas_instance *instance ;
18365b13 1981 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1982
044833b5 1983 instance = megasas_lookup_instance(sdev->host->host_no);
3cabd162 1984 if (!MEGASAS_IS_LOGICAL(sdev)) {
044833b5
YB		 1985 /*
1986 * Open the OS scan to the SYSTEM PD
1987 */
1988 pd_index =
1989 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1990 sdev->id;
30845586
SS		 1991 if ((instance->pd_list_not_supported ||
1992 instance->pd_list[pd_index].driveState ==
aed335ee 1993 MR_PD_STATE_SYSTEM)) {
18365b13 1994 goto scan_target;
044833b5
YB		 1995 }
1996 return -ENXIO;
1997 }
18365b13
SS		 1998
1999scan_target:
2000 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
2001 GFP_KERNEL);
2002 if (!mr_device_priv_data)
2003 return -ENOMEM;
2004 sdev->hostdata = mr_device_priv_data;
49524b3c
S		 2005
2006 atomic_set(&mr_device_priv_data->r1_ldio_hint,
2007 instance->r1_ldio_hint_default);
147aab6a
CH		 2008 return 0;
2009}
2010
18365b13
SS		 2011static void megasas_slave_destroy(struct scsi_device *sdev)
2012{
2013 kfree(sdev->hostdata);
2014 sdev->hostdata = NULL;
2015}
2016
c8dd61ef
SS		 2017/*
2018* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
2019* kill adapter
2020* @instance: Adapter soft state
2021*
2022*/
6a6981fe 2023static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 2024{
2025 int i;
2026 struct megasas_cmd *cmd_mfi;
2027 struct megasas_cmd_fusion *cmd_fusion;
2028 struct fusion_context *fusion = instance->ctrl_context;
2029
2030 /* Find all outstanding ioctls */
2031 if (fusion) {
2032 for (i = 0; i < instance->max_fw_cmds; i++) {
2033 cmd_fusion = fusion->cmd_list[i];
2034 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
2035 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
2036 if (cmd_mfi->sync_cmd &&
eb3fe263
S		 2037 (cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)) {
2038 cmd_mfi->frame->hdr.cmd_status =
2039 MFI_STAT_WRONG_STATE;
c8dd61ef
SS		 2040 megasas_complete_cmd(instance,
2041 cmd_mfi, DID_OK);
eb3fe263 2042 }
c8dd61ef
SS		 2043 }
2044 }
2045 } else {
2046 for (i = 0; i < instance->max_fw_cmds; i++) {
2047 cmd_mfi = instance->cmd_list[i];
2048 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
2049 MFI_CMD_ABORT)
2050 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
2051 }
2052 }
2053}
2054
2055
9c915a8c 2056void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 2057{
c8dd61ef 2058 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 2059 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS		 2060 /* Wait 1 second to ensure IO or ioctls in build have posted */
2061 msleep(1000);
39a98554 2062 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 2063 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 2064 (instance->adapter_type != MFI_SERIES)) {
da0dc9fb 2065 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c
AR		 2066 /* Flush */
2067 readl(&instance->reg_set->doorbell);
8f67c8c5 2068 if (instance->requestorId && instance->peerIsPresent)
229fe47c 2069 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 2070 } else {
c8dd61ef
SS		 2071 writel(MFI_STOP_ADP,
2072 &instance->reg_set->inbound_doorbell);
9c915a8c 2073 }
c8dd61ef
SS		 2074 /* Complete outstanding ioctls when adapter is killed */
2075 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 2076}
2077
2078 /**
2079 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
2080 * restored to max value
2081 * @instance: Adapter soft state
2082 *
2083 */
2084void
2085megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
2086{
2087 unsigned long flags;
ae09a6c1 2088
9c915a8c 2089 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 2090 && time_after(jiffies, instance->last_time + 5 * HZ)
2091 && atomic_read(&instance->fw_outstanding) <
2092 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 2093
2094 spin_lock_irqsave(instance->host->host_lock, flags);
2095 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 2096
308ec459 2097 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 2098 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 2099 }
2100}
2101
7343eb65 2102/**
2103 * megasas_complete_cmd_dpc - Returns FW's controller structure
2104 * @instance_addr: Address of adapter soft state
2105 *
2106 * Tasklet to complete cmds
2107 */
2108static void megasas_complete_cmd_dpc(unsigned long instance_addr)
2109{
2110 u32 producer;
2111 u32 consumer;
2112 u32 context;
2113 struct megasas_cmd *cmd;
2114 struct megasas_instance *instance =
2115 (struct megasas_instance *)instance_addr;
2116 unsigned long flags;
2117
2118 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 2119 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 2120 return;
2121
2122 spin_lock_irqsave(&instance->completion_lock, flags);
2123
94cd65dd
SS		 2124 producer = le32_to_cpu(*instance->producer);
2125 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2126
2127 while (consumer != producer) {
94cd65dd 2128 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2129 if (context >= instance->max_fw_cmds) {
1be18254 2130 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2131 context);
2132 BUG();
2133 }
7343eb65 2134
2135 cmd = instance->cmd_list[context];
2136
2137 megasas_complete_cmd(instance, cmd, DID_OK);
2138
2139 consumer++;
2140 if (consumer == (instance->max_fw_cmds + 1)) {
2141 consumer = 0;
2142 }
2143 }
2144
94cd65dd 2145 *instance->consumer = cpu_to_le32(producer);
7343eb65 2146
2147 spin_unlock_irqrestore(&instance->completion_lock, flags);
2148
2149 /*
2150 * Check if we can restore can_queue
2151 */
9c915a8c 2152 megasas_check_and_restore_queue_depth(instance);
7343eb65 2153}
2154
c251a7be
KC		 2155static void megasas_sriov_heartbeat_handler(struct timer_list *t);
2156
229fe47c 2157/**
c251a7be 2158 * megasas_start_timer - Initializes sriov heartbeat timer object
229fe47c 2159 * @instance: Adapter soft state
229fe47c
AR		 2160 *
2161 */
c251a7be 2162void megasas_start_timer(struct megasas_instance *instance)
229fe47c 2163{
c251a7be
KC		 2164 struct timer_list *timer = &instance->sriov_heartbeat_timer;
2165
2166 timer_setup(timer, megasas_sriov_heartbeat_handler, 0);
2167 timer->expires = jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF;
229fe47c
AR		 2168 add_timer(timer);
2169}
2170
707e09bd
YB		 2171static void
2172megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2173
2174static void
2175process_fw_state_change_wq(struct work_struct *work);
2176
2177void megasas_do_ocr(struct megasas_instance *instance)
2178{
2179 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2180 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2181 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2182 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2183 }
d46a3ad6 2184 instance->instancet->disable_intr(instance);
8a01a41d 2185 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB		 2186 instance->issuepend_done = 0;
2187
2188 atomic_set(&instance->fw_outstanding, 0);
2189 megasas_internal_reset_defer_cmds(instance);
2190 process_fw_state_change_wq(&instance->work_init);
2191}
2192
4cbfea88
AR		 2193static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2194 int initial)
229fe47c
AR		 2195{
2196 struct megasas_cmd *cmd;
2197 struct megasas_dcmd_frame *dcmd;
229fe47c 2198 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 2199 dma_addr_t new_affiliation_111_h;
2200 int ld, retval = 0;
2201 u8 thisVf;
2202
2203 cmd = megasas_get_cmd(instance);
2204
2205 if (!cmd) {
1be18254
BH		 2206 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2207 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2208 instance->host->host_no);
2209 return -ENOMEM;
2210 }
2211
2212 dcmd = &cmd->frame->dcmd;
2213
4cbfea88 2214 if (!instance->vf_affiliation_111) {
1be18254
BH		 2215 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2216 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 2217 megasas_return_cmd(instance, cmd);
2218 return -ENOMEM;
2219 }
2220
2221 if (initial)
229fe47c
AR		 2222 memset(instance->vf_affiliation_111, 0,
2223 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2224 else {
4cbfea88
AR		 2225 new_affiliation_111 =
2226 pci_alloc_consistent(instance->pdev,
2227 sizeof(struct MR_LD_VF_AFFILIATION_111),
2228 &new_affiliation_111_h);
2229 if (!new_affiliation_111) {
1be18254
BH		 2230 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2231 "memory for new affiliation for scsi%d\n",
4cbfea88 2232 instance->host->host_no);
229fe47c
AR		 2233 megasas_return_cmd(instance, cmd);
2234 return -ENOMEM;
2235 }
4cbfea88
AR		 2236 memset(new_affiliation_111, 0,
2237 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2238 }
2239
2240 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2241
2242 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2243 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2244 dcmd->sge_count = 1;
2213a467 2245 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2246 dcmd->timeout = 0;
2247 dcmd->pad_0 = 0;
2213a467
CH		 2248 dcmd->data_xfer_len =
2249 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2250 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2251
4cbfea88
AR		 2252 if (initial)
2253 dcmd->sgl.sge32[0].phys_addr =
2213a467 2254 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2255 else
2213a467
CH		 2256 dcmd->sgl.sge32[0].phys_addr =
2257 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2258
2213a467
CH		 2259 dcmd->sgl.sge32[0].length = cpu_to_le32(
2260 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2261
1be18254 2262 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 2263 "scsi%d\n", instance->host->host_no);
2264
6d40afbc 2265 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2266 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2267 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 2268 dcmd->cmd_status, instance->host->host_no);
2269 retval = 1; /* Do a scan if we couldn't get affiliation */
2270 goto out;
2271 }
2272
2273 if (!initial) {
4cbfea88
AR		 2274 thisVf = new_affiliation_111->thisVf;
2275 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2276 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2277 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 2278 dev_warn(&instance->pdev->dev, "SR-IOV: "
2279 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2280 instance->host->host_no);
4cbfea88
AR		 2281 memcpy(instance->vf_affiliation_111,
2282 new_affiliation_111,
2283 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2284 retval = 1;
2285 goto out;
2286 }
4cbfea88
AR		 2287 }
2288out:
2289 if (new_affiliation_111) {
2290 pci_free_consistent(instance->pdev,
2291 sizeof(struct MR_LD_VF_AFFILIATION_111),
2292 new_affiliation_111,
2293 new_affiliation_111_h);
2294 }
90dc9d98 2295
4026e9aa 2296 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 2297
2298 return retval;
2299}
2300
2301static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2302 int initial)
2303{
2304 struct megasas_cmd *cmd;
2305 struct megasas_dcmd_frame *dcmd;
2306 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2307 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2308 dma_addr_t new_affiliation_h;
2309 int i, j, retval = 0, found = 0, doscan = 0;
2310 u8 thisVf;
2311
2312 cmd = megasas_get_cmd(instance);
2313
2314 if (!cmd) {
1be18254
BH		 2315 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2316 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2317 instance->host->host_no);
2318 return -ENOMEM;
2319 }
2320
2321 dcmd = &cmd->frame->dcmd;
2322
2323 if (!instance->vf_affiliation) {
1be18254
BH		 2324 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2325 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2326 megasas_return_cmd(instance, cmd);
2327 return -ENOMEM;
2328 }
2329
2330 if (initial)
2331 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2332 sizeof(struct MR_LD_VF_AFFILIATION));
2333 else {
2334 new_affiliation =
2335 pci_alloc_consistent(instance->pdev,
2336 (MAX_LOGICAL_DRIVES + 1) *
2337 sizeof(struct MR_LD_VF_AFFILIATION),
2338 &new_affiliation_h);
2339 if (!new_affiliation) {
1be18254
BH		 2340 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2341 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2342 instance->host->host_no);
2343 megasas_return_cmd(instance, cmd);
2344 return -ENOMEM;
2345 }
2346 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2347 sizeof(struct MR_LD_VF_AFFILIATION));
2348 }
2349
2350 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2351
2352 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2353 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2354 dcmd->sge_count = 1;
2213a467 2355 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2356 dcmd->timeout = 0;
2357 dcmd->pad_0 = 0;
2213a467
CH		 2358 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2359 sizeof(struct MR_LD_VF_AFFILIATION));
2360 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2361
2362 if (initial)
2213a467
CH		 2363 dcmd->sgl.sge32[0].phys_addr =
2364 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2365 else
2213a467
CH		 2366 dcmd->sgl.sge32[0].phys_addr =
2367 cpu_to_le32(new_affiliation_h);
4cbfea88 2368
2213a467
CH		 2369 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2370 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2371
1be18254 2372 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2373 "scsi%d\n", instance->host->host_no);
2374
4cbfea88 2375
6d40afbc 2376 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2377 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2378 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2379 dcmd->cmd_status, instance->host->host_no);
2380 retval = 1; /* Do a scan if we couldn't get affiliation */
2381 goto out;
2382 }
2383
2384 if (!initial) {
2385 if (!new_affiliation->ldCount) {
1be18254
BH		 2386 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2387 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2388 instance->host->host_no);
2389 retval = 1;
2390 goto out;
2391 }
2392 newmap = new_affiliation->map;
2393 savedmap = instance->vf_affiliation->map;
2394 thisVf = new_affiliation->thisVf;
2395 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2396 found = 0;
2397 for (j = 0; j < instance->vf_affiliation->ldCount;
2398 j++) {
2399 if (newmap->ref.targetId ==
2400 savedmap->ref.targetId) {
2401 found = 1;
2402 if (newmap->policy[thisVf] !=
2403 savedmap->policy[thisVf]) {
2404 doscan = 1;
2405 goto out;
2406 }
229fe47c
AR		 2407 }
2408 savedmap = (struct MR_LD_VF_MAP *)
2409 ((unsigned char *)savedmap +
2410 savedmap->size);
4cbfea88
AR		 2411 }
2412 if (!found && newmap->policy[thisVf] !=
2413 MR_LD_ACCESS_HIDDEN) {
2414 doscan = 1;
2415 goto out;
2416 }
2417 newmap = (struct MR_LD_VF_MAP *)
2418 ((unsigned char *)newmap + newmap->size);
2419 }
2420
2421 newmap = new_affiliation->map;
2422 savedmap = instance->vf_affiliation->map;
2423
2424 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2425 found = 0;
2426 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2427 if (savedmap->ref.targetId ==
2428 newmap->ref.targetId) {
2429 found = 1;
2430 if (savedmap->policy[thisVf] !=
2431 newmap->policy[thisVf]) {
2432 doscan = 1;
2433 goto out;
2434 }
2435 }
229fe47c
AR		 2436 newmap = (struct MR_LD_VF_MAP *)
2437 ((unsigned char *)newmap +
2438 newmap->size);
2439 }
4cbfea88
AR		 2440 if (!found && savedmap->policy[thisVf] !=
2441 MR_LD_ACCESS_HIDDEN) {
2442 doscan = 1;
2443 goto out;
2444 }
2445 savedmap = (struct MR_LD_VF_MAP *)
2446 ((unsigned char *)savedmap +
2447 savedmap->size);
229fe47c
AR		 2448 }
2449 }
2450out:
4cbfea88 2451 if (doscan) {
1be18254
BH		 2452 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2453 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2454 memcpy(instance->vf_affiliation, new_affiliation,
2455 new_affiliation->size);
2456 retval = 1;
229fe47c 2457 }
4cbfea88
AR		 2458
2459 if (new_affiliation)
2460 pci_free_consistent(instance->pdev,
2461 (MAX_LOGICAL_DRIVES + 1) *
2462 sizeof(struct MR_LD_VF_AFFILIATION),
2463 new_affiliation, new_affiliation_h);
4026e9aa 2464 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2465
2466 return retval;
2467}
2468
4cbfea88
AR		 2469/* This function will get the current SR-IOV LD/VF affiliation */
2470static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2471 int initial)
2472{
2473 int retval;
2474
2475 if (instance->PlasmaFW111)
2476 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2477 else
2478 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2479 return retval;
2480}
2481
229fe47c
AR		 2482/* This function will tell FW to start the SR-IOV heartbeat */
2483int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2484 int initial)
2485{
2486 struct megasas_cmd *cmd;
2487 struct megasas_dcmd_frame *dcmd;
2488 int retval = 0;
2489
2490 cmd = megasas_get_cmd(instance);
2491
2492 if (!cmd) {
1be18254
BH		 2493 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2494 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2495 instance->host->host_no);
2496 return -ENOMEM;
2497 }
2498
2499 dcmd = &cmd->frame->dcmd;
2500
2501 if (initial) {
2502 instance->hb_host_mem =
7c845eb5
JP		 2503 pci_zalloc_consistent(instance->pdev,
2504 sizeof(struct MR_CTRL_HB_HOST_MEM),
2505 &instance->hb_host_mem_h);
229fe47c 2506 if (!instance->hb_host_mem) {
1be18254
BH		 2507 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2508 " memory for heartbeat host memory for scsi%d\n",
2509 instance->host->host_no);
229fe47c
AR		 2510 retval = -ENOMEM;
2511 goto out;
2512 }
229fe47c
AR		 2513 }
2514
2515 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2516
2213a467 2517 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2518 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2519 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2520 dcmd->sge_count = 1;
2213a467 2521 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2522 dcmd->timeout = 0;
2523 dcmd->pad_0 = 0;
2213a467
CH		 2524 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2525 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
107a60dd
S		 2526
2527 megasas_set_dma_settings(instance, dcmd, instance->hb_host_mem_h,
2528 sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2529
1be18254 2530 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2531 instance->host->host_no);
2532
e7d36b88
S		 2533 if ((instance->adapter_type != MFI_SERIES) &&
2534 !instance->mask_interrupts)
4026e9aa
SS		 2535 retval = megasas_issue_blocked_cmd(instance, cmd,
2536 MEGASAS_ROUTINE_WAIT_TIME_VF);
2537 else
2538 retval = megasas_issue_polled(instance, cmd);
229fe47c 2539
4026e9aa 2540 if (retval) {
2be2a988
SS		 2541 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2542 "_MEM_ALLOC DCMD %s for scsi%d\n",
2543 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2544 "timed out" : "failed", instance->host->host_no);
229fe47c 2545 retval = 1;
229fe47c
AR		 2546 }
2547
2548out:
2549 megasas_return_cmd(instance, cmd);
2550
2551 return retval;
2552}
2553
2554/* Handler for SR-IOV heartbeat */
c251a7be 2555static void megasas_sriov_heartbeat_handler(struct timer_list *t)
229fe47c
AR		 2556{
2557 struct megasas_instance *instance =
c251a7be 2558 from_timer(instance, t, sriov_heartbeat_timer);
229fe47c
AR		 2559
2560 if (instance->hb_host_mem->HB.fwCounter !=
2561 instance->hb_host_mem->HB.driverCounter) {
2562 instance->hb_host_mem->HB.driverCounter =
2563 instance->hb_host_mem->HB.fwCounter;
2564 mod_timer(&instance->sriov_heartbeat_timer,
2565 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2566 } else {
1be18254 2567 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2568 "completed for scsi%d\n", instance->host->host_no);
2569 schedule_work(&instance->work_init);
2570 }
2571}
2572
c4a3e0a5
BS		 2573/**
2574 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2575 * @instance: Adapter soft state
2576 *
25985edc 2577 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2578 * complete all its outstanding commands. Returns error if one or more IOs
2579 * are pending after this time period. It also marks the controller dead.
2580 */
2581static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2582{
ccc7507d 2583 int i, sl, outstanding;
39a98554 2584 u32 reset_index;
c4a3e0a5 2585 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2586 unsigned long flags;
2587 struct list_head clist_local;
2588 struct megasas_cmd *reset_cmd;
707e09bd 2589 u32 fw_state;
39a98554 2590
ccc7507d
SS		 2591 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2592 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2593 __func__, __LINE__);
2594 return FAILED;
2595 }
39a98554 2596
8a01a41d 2597 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2598
2599 INIT_LIST_HEAD(&clist_local);
2600 spin_lock_irqsave(&instance->hba_lock, flags);
2601 list_splice_init(&instance->internal_reset_pending_q,
2602 &clist_local);
2603 spin_unlock_irqrestore(&instance->hba_lock, flags);
2604
1be18254 2605 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2606 for (i = 0; i < wait_time; i++) {
2607 msleep(1000);
8a01a41d 2608 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2609 break;
2610 }
2611
8a01a41d 2612 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2613 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2614 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2615 return FAILED;
2616 }
2617
da0dc9fb 2618 reset_index = 0;
39a98554 2619 while (!list_empty(&clist_local)) {
da0dc9fb 2620 reset_cmd = list_entry((&clist_local)->next,
39a98554 2621 struct megasas_cmd, list);
2622 list_del_init(&reset_cmd->list);
2623 if (reset_cmd->scmd) {
f55cf47d 2624 reset_cmd->scmd->result = DID_REQUEUE << 16;
1be18254 2625 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2626 reset_index, reset_cmd,
5cd049a5 2627 reset_cmd->scmd->cmnd[0]);
39a98554 2628
2629 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2630 megasas_return_cmd(instance, reset_cmd);
2631 } else if (reset_cmd->sync_cmd) {
1be18254 2632 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2633 "reset queue\n",
2634 reset_cmd);
2635
2be2a988 2636 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2637 instance->instancet->fire_cmd(instance,
2638 reset_cmd->frame_phys_addr,
2639 0, instance->reg_set);
2640 } else {
1be18254 2641 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2642 "cmds lst\n",
2643 reset_cmd);
2644 }
2645 reset_index++;
2646 }
2647
2648 return SUCCESS;
2649 }
c4a3e0a5 2650
c007b8b2 2651 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2652 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP		 2653
2654 if (!outstanding)
c4a3e0a5
BS		 2655 break;
2656
2657 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2658 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2659 "commands to complete\n",i,outstanding);
7343eb65 2660 /*
2661 * Call cmd completion routine. Cmd to be
2662 * be completed directly without depending on isr.
2663 */
2664 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2665 }
2666
2667 msleep(1000);
2668 }
2669
707e09bd 2670 i = 0;
ccc7507d
SS		 2671 outstanding = atomic_read(&instance->fw_outstanding);
2672 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2673
2674 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2675 goto no_outstanding;
2676
2677 if (instance->disableOnlineCtrlReset)
2678 goto kill_hba_and_failed;
707e09bd 2679 do {
ccc7507d
SS		 2680 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2681 dev_info(&instance->pdev->dev,
2682 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2683 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2684 if (i == 3)
2685 goto kill_hba_and_failed;
707e09bd 2686 megasas_do_ocr(instance);
707e09bd 2687
ccc7507d
SS		 2688 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2689 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2690 __func__, __LINE__);
2691 return FAILED;
2692 }
2693 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2694 __func__, __LINE__);
2695
2696 for (sl = 0; sl < 10; sl++)
2697 msleep(500);
2698
2699 outstanding = atomic_read(&instance->fw_outstanding);
2700
2701 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2702 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2703 goto no_outstanding;
707e09bd
YB		 2704 }
2705 i++;
2706 } while (i <= 3);
2707
ccc7507d 2708no_outstanding:
707e09bd 2709
ccc7507d
SS		 2710 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2711 __func__, __LINE__);
2712 return SUCCESS;
707e09bd 2713
ccc7507d 2714kill_hba_and_failed:
c4a3e0a5 2715
ccc7507d
SS		 2716 /* Reset not supported, kill adapter */
2717 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2718 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2719 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2720 atomic_read(&instance->fw_outstanding));
2721 megasas_dump_pending_frames(instance);
2722 megaraid_sas_kill_hba(instance);
39a98554 2723
ccc7507d 2724 return FAILED;
c4a3e0a5
BS		 2725}
2726
2727/**
2728 * megasas_generic_reset - Generic reset routine
2729 * @scmd: Mid-layer SCSI command
2730 *
2731 * This routine implements a generic reset handler for device, bus and host
2732 * reset requests. Device, bus and host specific reset handlers can use this
2733 * function after they do their specific tasks.
2734 */
2735static int megasas_generic_reset(struct scsi_cmnd *scmd)
2736{
2737 int ret_val;
2738 struct megasas_instance *instance;
2739
2740 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2741
5cd049a5
CH		 2742 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2743 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2744
8a01a41d 2745 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2746 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2747 return FAILED;
2748 }
2749
c4a3e0a5 2750 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2751 if (ret_val == SUCCESS)
1be18254 2752 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2753 else
1be18254 2754 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2755
c4a3e0a5
BS		 2756 return ret_val;
2757}
2758
05e9ebbe
SP		 2759/**
2760 * megasas_reset_timer - quiesce the adapter if required
2761 * @scmd: scsi cmnd
2762 *
2763 * Sets the FW busy flag and reduces the host->can_queue if the
2764 * cmd has not been completed within the timeout period.
2765 */
2766static enum
242f9dcb 2767blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2768{
05e9ebbe
SP		 2769 struct megasas_instance *instance;
2770 unsigned long flags;
2771
2772 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2773 (scmd_timeout * 2) * HZ)) {
242f9dcb 2774 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2775 }
2776
f575c5d3 2777 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2778 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2779 /* FW is busy, throttle IO */
2780 spin_lock_irqsave(instance->host->host_lock, flags);
2781
c5daa6a9 2782 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2783 instance->last_time = jiffies;
2784 instance->flag |= MEGASAS_FW_BUSY;
2785
2786 spin_unlock_irqrestore(instance->host->host_lock, flags);
2787 }
242f9dcb 2788 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2789}
2790
def0eab3
S		 2791/**
2792 * megasas_dump_frame - This function will dump MPT/MFI frame
2793 */
2794static inline void
2795megasas_dump_frame(void *mpi_request, int sz)
2796{
2797 int i;
2798 __le32 *mfp = (__le32 *)mpi_request;
2799
2800 printk(KERN_INFO "IO request frame:\n\t");
40a4c2c3 2801 for (i = 0; i < sz / sizeof(__le32); i++) {
def0eab3
S		 2802 if (i && ((i % 8) == 0))
2803 printk("\n\t");
2804 printk("%08x ", le32_to_cpu(mfp[i]));
2805 }
2806 printk("\n");
2807}
2808
c4a3e0a5
BS		 2809/**
2810 * megasas_reset_bus_host - Bus & host reset handler entry point
2811 */
2812static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2813{
2814 int ret;
9c915a8c 2815 struct megasas_instance *instance;
da0dc9fb 2816
9c915a8c 2817 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5 2818
def0eab3
S		 2819 scmd_printk(KERN_INFO, scmd,
2820 "Controller reset is requested due to IO timeout\n"
2821 "SCSI command pointer: (%p)\t SCSI host state: %d\t"
2822 " SCSI host busy: %d\t FW outstanding: %d\n",
2823 scmd, scmd->device->host->shost_state,
2824 atomic_read((atomic_t *)&scmd->device->host->host_busy),
2825 atomic_read(&instance->fw_outstanding));
2826
c4a3e0a5 2827 /*
80682fa9 2828 * First wait for all commands to complete
c4a3e0a5 2829 */
e7d36b88
S		 2830 if (instance->adapter_type == MFI_SERIES) {
2831 ret = megasas_generic_reset(scmd);
2832 } else {
def0eab3
S		 2833 struct megasas_cmd_fusion *cmd;
2834 cmd = (struct megasas_cmd_fusion *)scmd->SCp.ptr;
2835 if (cmd)
2836 megasas_dump_frame(cmd->io_request,
5dd977e3 2837 MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE);
def0eab3
S		 2838 ret = megasas_reset_fusion(scmd->device->host,
2839 SCSIIO_TIMEOUT_OCR);
e7d36b88 2840 }
c4a3e0a5
BS		 2841
2842 return ret;
2843}
2844
bd23d4ab
SS		 2845/**
2846 * megasas_task_abort - Issues task abort request to firmware
2847 * (supported only for fusion adapters)
2848 * @scmd: SCSI command pointer
2849 */
2850static int megasas_task_abort(struct scsi_cmnd *scmd)
2851{
2852 int ret;
2853 struct megasas_instance *instance;
2854
2855 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2856
e7d36b88 2857 if (instance->adapter_type != MFI_SERIES)
bd23d4ab
SS		 2858 ret = megasas_task_abort_fusion(scmd);
2859 else {
2860 sdev_printk(KERN_NOTICE, scmd->device, "TASK ABORT not supported\n");
2861 ret = FAILED;
2862 }
2863
2864 return ret;
2865}
2866
2867/**
2868 * megasas_reset_target: Issues target reset request to firmware
2869 * (supported only for fusion adapters)
2870 * @scmd: SCSI command pointer
2871 */
2872static int megasas_reset_target(struct scsi_cmnd *scmd)
2873{
2874 int ret;
2875 struct megasas_instance *instance;
2876
2877 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2878
e7d36b88 2879 if (instance->adapter_type != MFI_SERIES)
bd23d4ab
SS		 2880 ret = megasas_reset_target_fusion(scmd);
2881 else {
2882 sdev_printk(KERN_NOTICE, scmd->device, "TARGET RESET not supported\n");
2883 ret = FAILED;
2884 }
2885
2886 return ret;
2887}
2888
cf62a0a5
SP		 2889/**
2890 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2891 * @sdev: device handle
cf62a0a5
SP		 2892 * @bdev: block device
2893 * @capacity: drive capacity
2894 * @geom: geometry parameters
2895 */
2896static int
2897megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2898 sector_t capacity, int geom[])
2899{
2900 int heads;
2901 int sectors;
2902 sector_t cylinders;
2903 unsigned long tmp;
da0dc9fb 2904
cf62a0a5
SP		 2905 /* Default heads (64) & sectors (32) */
2906 heads = 64;
2907 sectors = 32;
2908
2909 tmp = heads * sectors;
2910 cylinders = capacity;
2911
2912 sector_div(cylinders, tmp);
2913
2914 /*
2915 * Handle extended translation size for logical drives > 1Gb
2916 */
2917
2918 if (capacity >= 0x200000) {
2919 heads = 255;
2920 sectors = 63;
2921 tmp = heads*sectors;
2922 cylinders = capacity;
2923 sector_div(cylinders, tmp);
2924 }
2925
2926 geom[0] = heads;
2927 geom[1] = sectors;
2928 geom[2] = cylinders;
2929
2930 return 0;
2931}
2932
7e8a75f4
YB		 2933static void megasas_aen_polling(struct work_struct *work);
2934
c4a3e0a5
BS		 2935/**
2936 * megasas_service_aen - Processes an event notification
2937 * @instance: Adapter soft state
2938 * @cmd: AEN command completed by the ISR
2939 *
2940 * For AEN, driver sends a command down to FW that is held by the FW till an
2941 * event occurs. When an event of interest occurs, FW completes the command
2942 * that it was previously holding.
2943 *
2944 * This routines sends SIGIO signal to processes that have registered with the
2945 * driver for AEN.
2946 */
2947static void
2948megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2949{
c3518837 2950 unsigned long flags;
da0dc9fb 2951
c4a3e0a5
BS		 2952 /*
2953 * Don't signal app if it is just an aborted previously registered aen
2954 */
c3518837
YB		 2955 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2956 spin_lock_irqsave(&poll_aen_lock, flags);
2957 megasas_poll_wait_aen = 1;
2958 spin_unlock_irqrestore(&poll_aen_lock, flags);
2959 wake_up(&megasas_poll_wait);
c4a3e0a5 2960 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2961 }
c4a3e0a5
BS		 2962 else
2963 cmd->abort_aen = 0;
2964
2965 instance->aen_cmd = NULL;
90dc9d98 2966
4026e9aa 2967 megasas_return_cmd(instance, cmd);
7e8a75f4 2968
39a98554 2969 if ((instance->unload == 0) &&
2970 ((instance->issuepend_done == 1))) {
7e8a75f4 2971 struct megasas_aen_event *ev;
da0dc9fb 2972
7e8a75f4
YB		 2973 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2974 if (!ev) {
1be18254 2975 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2976 } else {
2977 ev->instance = instance;
2978 instance->ev = ev;
c1d390d8
XF		 2979 INIT_DELAYED_WORK(&ev->hotplug_work,
2980 megasas_aen_polling);
2981 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2982 }
2983 }
c4a3e0a5
BS		 2984}
2985
fc62b3fc
SS		 2986static ssize_t
2987megasas_fw_crash_buffer_store(struct device *cdev,
2988 struct device_attribute *attr, const char *buf, size_t count)
2989{
2990 struct Scsi_Host *shost = class_to_shost(cdev);
2991 struct megasas_instance *instance =
2992 (struct megasas_instance *) shost->hostdata;
2993 int val = 0;
2994 unsigned long flags;
2995
2996 if (kstrtoint(buf, 0, &val) != 0)
2997 return -EINVAL;
2998
2999 spin_lock_irqsave(&instance->crashdump_lock, flags);
3000 instance->fw_crash_buffer_offset = val;
3001 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3002 return strlen(buf);
3003}
3004
3005static ssize_t
3006megasas_fw_crash_buffer_show(struct device *cdev,
3007 struct device_attribute *attr, char *buf)
3008{
3009 struct Scsi_Host *shost = class_to_shost(cdev);
3010 struct megasas_instance *instance =
3011 (struct megasas_instance *) shost->hostdata;
3012 u32 size;
3013 unsigned long buff_addr;
3014 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
3015 unsigned long src_addr;
3016 unsigned long flags;
3017 u32 buff_offset;
3018
3019 spin_lock_irqsave(&instance->crashdump_lock, flags);
3020 buff_offset = instance->fw_crash_buffer_offset;
3021 if (!instance->crash_dump_buf &&
3022 !((instance->fw_crash_state == AVAILABLE) ||
3023 (instance->fw_crash_state == COPYING))) {
3024 dev_err(&instance->pdev->dev,
3025 "Firmware crash dump is not available\n");
3026 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3027 return -EINVAL;
3028 }
3029
3030 buff_addr = (unsigned long) buf;
3031
da0dc9fb 3032 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 3033 dev_err(&instance->pdev->dev,
3034 "Firmware crash dump offset is out of range\n");
3035 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3036 return 0;
3037 }
3038
3039 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
3040 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
3041
3042 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
3043 (buff_offset % dmachunk);
da0dc9fb 3044 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 3045 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3046
3047 return size;
3048}
3049
3050static ssize_t
3051megasas_fw_crash_buffer_size_show(struct device *cdev,
3052 struct device_attribute *attr, char *buf)
3053{
3054 struct Scsi_Host *shost = class_to_shost(cdev);
3055 struct megasas_instance *instance =
3056 (struct megasas_instance *) shost->hostdata;
3057
3058 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
3059 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
3060}
3061
3062static ssize_t
3063megasas_fw_crash_state_store(struct device *cdev,
3064 struct device_attribute *attr, const char *buf, size_t count)
3065{
3066 struct Scsi_Host *shost = class_to_shost(cdev);
3067 struct megasas_instance *instance =
3068 (struct megasas_instance *) shost->hostdata;
3069 int val = 0;
3070 unsigned long flags;
3071
3072 if (kstrtoint(buf, 0, &val) != 0)
3073 return -EINVAL;
3074
3075 if ((val <= AVAILABLE || val > COPY_ERROR)) {
3076 dev_err(&instance->pdev->dev, "application updates invalid "
3077 "firmware crash state\n");
3078 return -EINVAL;
3079 }
3080
3081 instance->fw_crash_state = val;
3082
3083 if ((val == COPIED) || (val == COPY_ERROR)) {
3084 spin_lock_irqsave(&instance->crashdump_lock, flags);
3085 megasas_free_host_crash_buffer(instance);
3086 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3087 if (val == COPY_ERROR)
3088 dev_info(&instance->pdev->dev, "application failed to "
3089 "copy Firmware crash dump\n");
3090 else
3091 dev_info(&instance->pdev->dev, "Firmware crash dump "
3092 "copied successfully\n");
3093 }
3094 return strlen(buf);
3095}
3096
3097static ssize_t
3098megasas_fw_crash_state_show(struct device *cdev,
3099 struct device_attribute *attr, char *buf)
3100{
3101 struct Scsi_Host *shost = class_to_shost(cdev);
3102 struct megasas_instance *instance =
3103 (struct megasas_instance *) shost->hostdata;
da0dc9fb 3104
fc62b3fc
SS		 3105 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
3106}
3107
3108static ssize_t
3109megasas_page_size_show(struct device *cdev,
3110 struct device_attribute *attr, char *buf)
3111{
3112 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
3113}
3114
308ec459
SS		 3115static ssize_t
3116megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
3117 char *buf)
3118{
3119 struct Scsi_Host *shost = class_to_shost(cdev);
3120 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
3121
3122 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
3123}
3124
fc62b3fc
SS		 3125static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
3126 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
3127static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
3128 megasas_fw_crash_buffer_size_show, NULL);
3129static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
3130 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
3131static DEVICE_ATTR(page_size, S_IRUGO,
3132 megasas_page_size_show, NULL);
308ec459
SS		 3133static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
3134 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS		 3135
3136struct device_attribute *megaraid_host_attrs[] = {
3137 &dev_attr_fw_crash_buffer_size,
3138 &dev_attr_fw_crash_buffer,
3139 &dev_attr_fw_crash_state,
3140 &dev_attr_page_size,
308ec459 3141 &dev_attr_ldio_outstanding,
fc62b3fc
SS		 3142 NULL,
3143};
3144
c4a3e0a5
BS		 3145/*
3146 * Scsi host template for megaraid_sas driver
3147 */
3148static struct scsi_host_template megasas_template = {
3149
3150 .module = THIS_MODULE,
43cd7fe4 3151 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 3152 .proc_name = "megaraid_sas",
147aab6a 3153 .slave_configure = megasas_slave_configure,
044833b5 3154 .slave_alloc = megasas_slave_alloc,
18365b13 3155 .slave_destroy = megasas_slave_destroy,
c4a3e0a5 3156 .queuecommand = megasas_queue_command,
bd23d4ab
SS		 3157 .eh_target_reset_handler = megasas_reset_target,
3158 .eh_abort_handler = megasas_task_abort,
c4a3e0a5 3159 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 3160 .eh_timed_out = megasas_reset_timer,
fc62b3fc 3161 .shost_attrs = megaraid_host_attrs,
cf62a0a5 3162 .bios_param = megasas_bios_param,
c4a3e0a5 3163 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 3164 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 3165 .no_write_same = 1,
c4a3e0a5
BS		 3166};
3167
3168/**
3169 * megasas_complete_int_cmd - Completes an internal command
3170 * @instance: Adapter soft state
3171 * @cmd: Command to be completed
3172 *
3173 * The megasas_issue_blocked_cmd() function waits for a command to complete
3174 * after it issues a command. This function wakes up that waiting routine by
3175 * calling wake_up() on the wait queue.
3176 */
3177static void
3178megasas_complete_int_cmd(struct megasas_instance *instance,
3179 struct megasas_cmd *cmd)
3180{
2be2a988 3181 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 3182 wake_up(&instance->int_cmd_wait_q);
3183}
3184
3185/**
3186 * megasas_complete_abort - Completes aborting a command
3187 * @instance: Adapter soft state
3188 * @cmd: Cmd that was issued to abort another cmd
3189 *
0d49016b
AR		 3190 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3191 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 3192 * wakes up all functions waiting on the same wait queue.
3193 */
3194static void
3195megasas_complete_abort(struct megasas_instance *instance,
3196 struct megasas_cmd *cmd)
3197{
3198 if (cmd->sync_cmd) {
3199 cmd->sync_cmd = 0;
2be2a988 3200 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 3201 wake_up(&instance->abort_cmd_wait_q);
3202 }
c4a3e0a5
BS		 3203}
3204
c4a3e0a5
BS		 3205/**
3206 * megasas_complete_cmd - Completes a command
3207 * @instance: Adapter soft state
3208 * @cmd: Command to be completed
0d49016b 3209 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 3210 * SCSI mid-layer instead of the value returned
3211 * by the FW. This should be used if caller wants
3212 * an alternate status (as in the case of aborted
3213 * commands)
c4a3e0a5 3214 */
9c915a8c 3215void
c4a3e0a5
BS		 3216megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3217 u8 alt_status)
3218{
3219 int exception = 0;
3220 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3221 unsigned long flags;
9c915a8c 3222 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3223 u32 opcode, status;
c4a3e0a5 3224
39a98554 3225 /* flag for the retry reset */
3226 cmd->retry_for_fw_reset = 0;
3227
05e9ebbe
SP		 3228 if (cmd->scmd)
3229 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 3230
3231 switch (hdr->cmd) {
e5f93a36
AR		 3232 case MFI_CMD_INVALID:
3233 /* Some older 1068 controller FW may keep a pended
3234 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3235 when booting the kdump kernel. Ignore this command to
3236 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 3237 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3238 "completed\n");
3239 dev_warn(&instance->pdev->dev, "If you have a controller "
3240 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3241 break;
c4a3e0a5
BS		 3242 case MFI_CMD_PD_SCSI_IO:
3243 case MFI_CMD_LD_SCSI_IO:
3244
3245 /*
3246 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3247 * issued either through an IO path or an IOCTL path. If it
3248 * was via IOCTL, we will send it to internal completion.
3249 */
3250 if (cmd->sync_cmd) {
3251 cmd->sync_cmd = 0;
3252 megasas_complete_int_cmd(instance, cmd);
3253 break;
3254 }
3255
c4a3e0a5
BS		 3256 case MFI_CMD_LD_READ:
3257 case MFI_CMD_LD_WRITE:
3258
3259 if (alt_status) {
3260 cmd->scmd->result = alt_status << 16;
3261 exception = 1;
3262 }
3263
3264 if (exception) {
3265
e4a082c7 3266 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3267
155d98f0 3268 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3269 cmd->scmd->scsi_done(cmd->scmd);
3270 megasas_return_cmd(instance, cmd);
3271
3272 break;
3273 }
3274
3275 switch (hdr->cmd_status) {
3276
3277 case MFI_STAT_OK:
3278 cmd->scmd->result = DID_OK << 16;
3279 break;
3280
3281 case MFI_STAT_SCSI_IO_FAILED:
3282 case MFI_STAT_LD_INIT_IN_PROGRESS:
3283 cmd->scmd->result =
3284 (DID_ERROR << 16) | hdr->scsi_status;
3285 break;
3286
3287 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3288
3289 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3290
3291 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3292 memset(cmd->scmd->sense_buffer, 0,
3293 SCSI_SENSE_BUFFERSIZE);
3294 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3295 hdr->sense_len);
3296
3297 cmd->scmd->result |= DRIVER_SENSE << 24;
3298 }
3299
3300 break;
3301
3302 case MFI_STAT_LD_OFFLINE:
3303 case MFI_STAT_DEVICE_NOT_FOUND:
3304 cmd->scmd->result = DID_BAD_TARGET << 16;
3305 break;
3306
3307 default:
1be18254 3308 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 3309 hdr->cmd_status);
3310 cmd->scmd->result = DID_ERROR << 16;
3311 break;
3312 }
3313
e4a082c7 3314 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3315
155d98f0 3316 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3317 cmd->scmd->scsi_done(cmd->scmd);
3318 megasas_return_cmd(instance, cmd);
3319
3320 break;
3321
3322 case MFI_CMD_SMP:
3323 case MFI_CMD_STP:
82add4e1
S		 3324 megasas_complete_int_cmd(instance, cmd);
3325 break;
3326
c4a3e0a5 3327 case MFI_CMD_DCMD:
94cd65dd 3328 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3329 /* Check for LD map update */
94cd65dd
SS		 3330 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3331 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3332 fusion->fast_path_io = 0;
9c915a8c 3333 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3334 instance->map_update_cmd = NULL;
9c915a8c
AR		 3335 if (cmd->frame->hdr.cmd_status != 0) {
3336 if (cmd->frame->hdr.cmd_status !=
3337 MFI_STAT_NOT_FOUND)
1be18254 3338 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 3339 cmd->frame->hdr.cmd_status);
3340 else {
4026e9aa 3341 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 3342 spin_unlock_irqrestore(
3343 instance->host->host_lock,
3344 flags);
3345 break;
3346 }
3347 } else
3348 instance->map_id++;
4026e9aa 3349 megasas_return_cmd(instance, cmd);
bc93d425
SS		 3350
3351 /*
3352 * Set fast path IO to ZERO.
3353 * Validate Map will set proper value.
3354 * Meanwhile all IOs will go as LD IO.
3355 */
3356 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 3357 fusion->fast_path_io = 1;
3358 else
3359 fusion->fast_path_io = 0;
3360 megasas_sync_map_info(instance);
3361 spin_unlock_irqrestore(instance->host->host_lock,
3362 flags);
3363 break;
3364 }
94cd65dd
SS		 3365 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3366 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 3367 spin_lock_irqsave(&poll_aen_lock, flags);
3368 megasas_poll_wait_aen = 0;
3369 spin_unlock_irqrestore(&poll_aen_lock, flags);
3370 }
c4a3e0a5 3371
3761cb4c 3372 /* FW has an updated PD sequence */
3373 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3374 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3375
3376 spin_lock_irqsave(instance->host->host_lock, flags);
3377 status = cmd->frame->hdr.cmd_status;
3378 instance->jbod_seq_cmd = NULL;
3379 megasas_return_cmd(instance, cmd);
3380
3381 if (status == MFI_STAT_OK) {
3382 instance->pd_seq_map_id++;
3383 /* Re-register a pd sync seq num cmd */
3384 if (megasas_sync_pd_seq_num(instance, true))
3385 instance->use_seqnum_jbod_fp = false;
3386 } else
3387 instance->use_seqnum_jbod_fp = false;
3388
3389 spin_unlock_irqrestore(instance->host->host_lock, flags);
3390 break;
3391 }
3392
c4a3e0a5
BS		 3393 /*
3394 * See if got an event notification
3395 */
94cd65dd 3396 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3397 megasas_service_aen(instance, cmd);
3398 else
3399 megasas_complete_int_cmd(instance, cmd);
3400
3401 break;
3402
3403 case MFI_CMD_ABORT:
3404 /*
3405 * Cmd issued to abort another cmd returned
3406 */
3407 megasas_complete_abort(instance, cmd);
3408 break;
3409
3410 default:
1be18254 3411 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5 3412 hdr->cmd);
82add4e1 3413 megasas_complete_int_cmd(instance, cmd);
c4a3e0a5
BS		 3414 break;
3415 }
3416}
3417
39a98554 3418/**
3419 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3420 * in FW again because of the fw reset
39a98554 3421 * @instance: Adapter soft state
3422 */
3423static inline void
3424megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3425{
3426 struct megasas_cmd *cmd;
3427 struct list_head clist_local;
3428 union megasas_evt_class_locale class_locale;
3429 unsigned long flags;
3430 u32 seq_num;
3431
3432 INIT_LIST_HEAD(&clist_local);
3433 spin_lock_irqsave(&instance->hba_lock, flags);
3434 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3435 spin_unlock_irqrestore(&instance->hba_lock, flags);
3436
3437 while (!list_empty(&clist_local)) {
da0dc9fb 3438 cmd = list_entry((&clist_local)->next,
39a98554 3439 struct megasas_cmd, list);
3440 list_del_init(&cmd->list);
3441
3442 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3443 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3444 "detected to be pending while HBA reset\n",
39a98554 3445 cmd, cmd->scmd, cmd->sync_cmd);
3446
3447 cmd->retry_for_fw_reset++;
3448
3449 if (cmd->retry_for_fw_reset == 3) {
1be18254 3450 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3451 "was tried multiple times during reset."
3452 "Shutting down the HBA\n",
3453 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3454 instance->instancet->disable_intr(instance);
3455 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3456 megaraid_sas_kill_hba(instance);
39a98554 3457 return;
3458 }
3459 }
3460
3461 if (cmd->sync_cmd == 1) {
3462 if (cmd->scmd) {
1be18254 3463 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3464 "cmd attached to internal command!\n");
3465 }
1be18254 3466 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3467 "on the internal reset queue,"
3468 "issue it again.\n", cmd);
2be2a988 3469 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3470 instance->instancet->fire_cmd(instance,
da0dc9fb 3471 cmd->frame_phys_addr,
39a98554 3472 0, instance->reg_set);
3473 } else if (cmd->scmd) {
1be18254 3474 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3475 "detected on the internal queue, issue again.\n",
5cd049a5 3476 cmd, cmd->scmd->cmnd[0]);
39a98554 3477
3478 atomic_inc(&instance->fw_outstanding);
3479 instance->instancet->fire_cmd(instance,
3480 cmd->frame_phys_addr,
3481 cmd->frame_count-1, instance->reg_set);
3482 } else {
1be18254 3483 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3484 "internal reset defer list while re-issue!!\n",
3485 cmd);
3486 }
3487 }
3488
3489 if (instance->aen_cmd) {
1be18254 3490 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3491 megasas_return_cmd(instance, instance->aen_cmd);
3492
da0dc9fb 3493 instance->aen_cmd = NULL;
39a98554 3494 }
3495
3496 /*
da0dc9fb
BH		 3497 * Initiate AEN (Asynchronous Event Notification)
3498 */
39a98554 3499 seq_num = instance->last_seq_num;
3500 class_locale.members.reserved = 0;
3501 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3502 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3503
3504 megasas_register_aen(instance, seq_num, class_locale.word);
3505}
3506
3507/**
3508 * Move the internal reset pending commands to a deferred queue.
3509 *
3510 * We move the commands pending at internal reset time to a
3511 * pending queue. This queue would be flushed after successful
3512 * completion of the internal reset sequence. if the internal reset
3513 * did not complete in time, the kernel reset handler would flush
3514 * these commands.
3515 **/
3516static void
3517megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3518{
3519 struct megasas_cmd *cmd;
3520 int i;
50b7f5a2 3521 u16 max_cmd = instance->max_fw_cmds;
39a98554 3522 u32 defer_index;
3523 unsigned long flags;
3524
da0dc9fb 3525 defer_index = 0;
90dc9d98 3526 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3527 for (i = 0; i < max_cmd; i++) {
3528 cmd = instance->cmd_list[i];
3529 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3530 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3531 "on the defer queue as internal\n",
3532 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3533
3534 if (!list_empty(&cmd->list)) {
1be18254 3535 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3536 " moving this cmd:%p, %d %p, it was"
3537 "discovered on some list?\n",
3538 cmd, cmd->sync_cmd, cmd->scmd);
3539
3540 list_del_init(&cmd->list);
3541 }
3542 defer_index++;
3543 list_add_tail(&cmd->list,
3544 &instance->internal_reset_pending_q);
3545 }
3546 }
90dc9d98 3547 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3548}
3549
3550
3551static void
3552process_fw_state_change_wq(struct work_struct *work)
3553{
3554 struct megasas_instance *instance =
3555 container_of(work, struct megasas_instance, work_init);
3556 u32 wait;
3557 unsigned long flags;
3558
8a01a41d 3559 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3560 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3561 atomic_read(&instance->adprecovery));
39a98554 3562 return ;
3563 }
3564
8a01a41d 3565 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3566 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3567 "state, restarting it...\n");
3568
d46a3ad6 3569 instance->instancet->disable_intr(instance);
39a98554 3570 atomic_set(&instance->fw_outstanding, 0);
3571
3572 atomic_set(&instance->fw_reset_no_pci_access, 1);
3573 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3574 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3575
1be18254 3576 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3577 "initiating next stage...\n");
3578
1be18254 3579 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3580 "state 2 starting...\n");
3581
da0dc9fb 3582 /* waiting for about 20 second before start the second init */
39a98554 3583 for (wait = 0; wait < 30; wait++) {
3584 msleep(1000);
3585 }
3586
058a8fac 3587 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3588 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3589
c8dd61ef 3590 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3591 megaraid_sas_kill_hba(instance);
39a98554 3592 return ;
3593 }
3594
3595 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3596 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3597 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3598 ) {
3599 *instance->consumer = *instance->producer;
3600 } else {
3601 *instance->consumer = 0;
3602 *instance->producer = 0;
3603 }
3604
3605 megasas_issue_init_mfi(instance);
3606
3607 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3608 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3609 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3610 instance->instancet->enable_intr(instance);
39a98554 3611
3612 megasas_issue_pending_cmds_again(instance);
3613 instance->issuepend_done = 1;
3614 }
39a98554 3615}
3616
c4a3e0a5
BS		 3617/**
3618 * megasas_deplete_reply_queue - Processes all completed commands
3619 * @instance: Adapter soft state
3620 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3621 * SCSI mid-layer instead of the status
3622 * returned by the FW
39a98554 3623 * Note: this must be called with hba lock held
c4a3e0a5 3624 */
858119e1 3625static int
39a98554 3626megasas_deplete_reply_queue(struct megasas_instance *instance,
3627 u8 alt_status)
c4a3e0a5 3628{
39a98554 3629 u32 mfiStatus;
3630 u32 fw_state;
3631
3632 if ((mfiStatus = instance->instancet->check_reset(instance,
3633 instance->reg_set)) == 1) {
3634 return IRQ_HANDLED;
3635 }
3636
3637 if ((mfiStatus = instance->instancet->clear_intr(
3638 instance->reg_set)
3639 ) == 0) {
e1419191 3640 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3641 if (!instance->msix_vectors)
e1419191 3642 return IRQ_NONE;
39a98554 3643 }
3644
3645 instance->mfiStatus = mfiStatus;
3646
3647 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3648 fw_state = instance->instancet->read_fw_status_reg(
3649 instance->reg_set) & MFI_STATE_MASK;
3650
3651 if (fw_state != MFI_STATE_FAULT) {
1be18254 3652 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3653 fw_state);
3654 }
3655
3656 if ((fw_state == MFI_STATE_FAULT) &&
3657 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3658 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3659
3660 if ((instance->pdev->device ==
3661 PCI_DEVICE_ID_LSI_SAS1064R) ||
3662 (instance->pdev->device ==
3663 PCI_DEVICE_ID_DELL_PERC5) ||
3664 (instance->pdev->device ==
3665 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3666
3667 *instance->consumer =
94cd65dd 3668 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3669 }
3670
3671
d46a3ad6 3672 instance->instancet->disable_intr(instance);
8a01a41d 3673 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3674 instance->issuepend_done = 0;
3675
3676 atomic_set(&instance->fw_outstanding, 0);
3677 megasas_internal_reset_defer_cmds(instance);
3678
1be18254 3679 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3680 fw_state, atomic_read(&instance->adprecovery));
39a98554 3681
3682 schedule_work(&instance->work_init);
3683 return IRQ_HANDLED;
3684
3685 } else {
1be18254 3686 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3687 fw_state, instance->disableOnlineCtrlReset);
3688 }
3689 }
c4a3e0a5 3690
5d018ad0 3691 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3692 return IRQ_HANDLED;
3693}
c4a3e0a5
BS		 3694/**
3695 * megasas_isr - isr entry point
3696 */
7d12e780 3697static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3698{
c8e858fe
AR		 3699 struct megasas_irq_context *irq_context = devp;
3700 struct megasas_instance *instance = irq_context->instance;
39a98554 3701 unsigned long flags;
da0dc9fb 3702 irqreturn_t rc;
39a98554 3703
c8e858fe 3704 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3705 return IRQ_HANDLED;
3706
39a98554 3707 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3708 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3709 spin_unlock_irqrestore(&instance->hba_lock, flags);
3710
3711 return rc;
c4a3e0a5
BS		 3712}
3713
3714/**
3715 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3716 * @instance: Adapter soft state
c4a3e0a5
BS		 3717 *
3718 * During the initialization, FW passes can potentially be in any one of
3719 * several possible states. If the FW in operational, waiting-for-handshake
3720 * states, driver must take steps to bring it to ready state. Otherwise, it
3721 * has to wait for the ready state.
3722 */
9c915a8c 3723int
058a8fac 3724megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3725{
3726 int i;
3727 u8 max_wait;
3728 u32 fw_state;
3729 u32 cur_state;
7218df69 3730 u32 abs_state, curr_abs_state;
c4a3e0a5 3731
bc6ac5e8
TH		 3732 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3733 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3734
e3bbff9f 3735 if (fw_state != MFI_STATE_READY)
1be18254 3736 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3737 " state\n");
e3bbff9f 3738
c4a3e0a5
BS		 3739 while (fw_state != MFI_STATE_READY) {
3740
c4a3e0a5
BS		 3741 switch (fw_state) {
3742
3743 case MFI_STATE_FAULT:
1be18254 3744 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3745 if (ocr) {
3746 max_wait = MEGASAS_RESET_WAIT_TIME;
3747 cur_state = MFI_STATE_FAULT;
3748 break;
3749 } else
3750 return -ENODEV;
c4a3e0a5
BS		 3751
3752 case MFI_STATE_WAIT_HANDSHAKE:
3753 /*
3754 * Set the CLR bit in inbound doorbell
3755 */
0c79e681 3756 if ((instance->pdev->device ==
87911122
YB		 3757 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3758 (instance->pdev->device ==
9c915a8c 3759 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3760 (instance->adapter_type != MFI_SERIES))
87911122
YB		 3761 writel(
3762 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3763 &instance->reg_set->doorbell);
5a8cb85b 3764 else
87911122
YB		 3765 writel(
3766 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3767 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3768
7218df69 3769 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3770 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3771 break;
3772
e3bbff9f 3773 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3774 if ((instance->pdev->device ==
9c915a8c
AR		 3775 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3776 (instance->pdev->device ==
3777 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3778 (instance->adapter_type != MFI_SERIES))
87911122 3779 writel(MFI_INIT_HOTPLUG,
9c915a8c 3780 &instance->reg_set->doorbell);
5a8cb85b 3781 else
87911122
YB		 3782 writel(MFI_INIT_HOTPLUG,
3783 &instance->reg_set->inbound_doorbell);
e3bbff9f 3784
7218df69 3785 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3786 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3787 break;
3788
c4a3e0a5
BS		 3789 case MFI_STATE_OPERATIONAL:
3790 /*
e3bbff9f 3791 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3792 */
d46a3ad6 3793 instance->instancet->disable_intr(instance);
87911122
YB		 3794 if ((instance->pdev->device ==
3795 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3796 (instance->pdev->device ==
9c915a8c 3797 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
e7d36b88 3798 (instance->adapter_type != MFI_SERIES)) {
87911122 3799 writel(MFI_RESET_FLAGS,
9c915a8c 3800 &instance->reg_set->doorbell);
5a8cb85b 3801
e7d36b88 3802 if (instance->adapter_type != MFI_SERIES) {
9c915a8c
AR		 3803 for (i = 0; i < (10 * 1000); i += 20) {
3804 if (readl(
3805 &instance->
3806 reg_set->
3807 doorbell) & 1)
3808 msleep(20);
3809 else
3810 break;
3811 }
3812 }
87911122
YB		 3813 } else
3814 writel(MFI_RESET_FLAGS,
3815 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3816
7218df69 3817 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3818 cur_state = MFI_STATE_OPERATIONAL;
3819 break;
3820
3821 case MFI_STATE_UNDEFINED:
3822 /*
3823 * This state should not last for more than 2 seconds
3824 */
7218df69 3825 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3826 cur_state = MFI_STATE_UNDEFINED;
3827 break;
3828
3829 case MFI_STATE_BB_INIT:
7218df69 3830 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3831 cur_state = MFI_STATE_BB_INIT;
3832 break;
3833
3834 case MFI_STATE_FW_INIT:
7218df69 3835 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3836 cur_state = MFI_STATE_FW_INIT;
3837 break;
3838
3839 case MFI_STATE_FW_INIT_2:
7218df69 3840 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3841 cur_state = MFI_STATE_FW_INIT_2;
3842 break;
3843
3844 case MFI_STATE_DEVICE_SCAN:
7218df69 3845 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3846 cur_state = MFI_STATE_DEVICE_SCAN;
3847 break;
3848
3849 case MFI_STATE_FLUSH_CACHE:
7218df69 3850 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3851 cur_state = MFI_STATE_FLUSH_CACHE;
3852 break;
3853
3854 default:
1be18254 3855 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3856 fw_state);
3857 return -ENODEV;
3858 }
3859
3860 /*
3861 * The cur_state should not last for more than max_wait secs
3862 */
3863 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3864 curr_abs_state = instance->instancet->
3865 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3866
7218df69 3867 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3868 msleep(1);
3869 } else
3870 break;
3871 }
3872
3873 /*
3874 * Return error if fw_state hasn't changed after max_wait
3875 */
7218df69 3876 if (curr_abs_state == abs_state) {
1be18254 3877 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3878 "in %d secs\n", fw_state, max_wait);
3879 return -ENODEV;
3880 }
bc6ac5e8
TH		 3881
3882 abs_state = curr_abs_state;
3883 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3884 }
1be18254 3885 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3886
3887 return 0;
3888}
3889
3890/**
3891 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3892 * @instance: Adapter soft state
3893 */
3894static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3895{
3896 int i;
50b7f5a2 3897 u16 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3898 struct megasas_cmd *cmd;
3899
3900 if (!instance->frame_dma_pool)
3901 return;
3902
3903 /*
3904 * Return all frames to pool
3905 */
3906 for (i = 0; i < max_cmd; i++) {
3907
3908 cmd = instance->cmd_list[i];
3909
3910 if (cmd->frame)
fc69d86d 3911 dma_pool_free(instance->frame_dma_pool, cmd->frame,
c4a3e0a5
BS		 3912 cmd->frame_phys_addr);
3913
3914 if (cmd->sense)
fc69d86d 3915 dma_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3916 cmd->sense_phys_addr);
3917 }
3918
3919 /*
3920 * Now destroy the pool itself
3921 */
fc69d86d
RP		 3922 dma_pool_destroy(instance->frame_dma_pool);
3923 dma_pool_destroy(instance->sense_dma_pool);
c4a3e0a5
BS		 3924
3925 instance->frame_dma_pool = NULL;
3926 instance->sense_dma_pool = NULL;
3927}
3928
3929/**
3930 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3931 * @instance: Adapter soft state
3932 *
3933 * Each command packet has an embedded DMA memory buffer that is used for
3934 * filling MFI frame and the SG list that immediately follows the frame. This
3935 * function creates those DMA memory buffers for each command packet by using
3936 * PCI pool facility.
3937 */
3938static int megasas_create_frame_pool(struct megasas_instance *instance)
3939{
3940 int i;
50b7f5a2 3941 u16 max_cmd;
c4a3e0a5 3942 u32 sge_sz;
c4a3e0a5
BS		 3943 u32 frame_count;
3944 struct megasas_cmd *cmd;
3945
9c915a8c 3946 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3947
3948 /*
3949 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3950 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3951 */
3952 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3953 sizeof(struct megasas_sge32);
3954
da0dc9fb 3955 if (instance->flag_ieee)
f4c9a131 3956 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3957
c4a3e0a5 3958 /*
200aed58
SS		 3959 * For MFI controllers.
3960 * max_num_sge = 60
3961 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3962 * Total 960 byte (15 MFI frame of 64 byte)
3963 *
3964 * Fusion adapter require only 3 extra frame.
3965 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3966 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3967 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3968 */
e7d36b88
S		 3969 frame_count = (instance->adapter_type == MFI_SERIES) ?
3970 (15 + 1) : (3 + 1);
21c34006 3971 instance->mfi_frame_size = MEGAMFI_FRAME_SIZE * frame_count;
c4a3e0a5
BS		 3972 /*
3973 * Use DMA pool facility provided by PCI layer
3974 */
fc69d86d
RP		 3975 instance->frame_dma_pool = dma_pool_create("megasas frame pool",
3976 &instance->pdev->dev,
3977 instance->mfi_frame_size, 256, 0);
c4a3e0a5
BS		 3978
3979 if (!instance->frame_dma_pool) {
1be18254 3980 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3981 return -ENOMEM;
3982 }
3983
fc69d86d
RP		 3984 instance->sense_dma_pool = dma_pool_create("megasas sense pool",
3985 &instance->pdev->dev, 128,
3986 4, 0);
c4a3e0a5
BS		 3987
3988 if (!instance->sense_dma_pool) {
1be18254 3989 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5 3990
fc69d86d 3991 dma_pool_destroy(instance->frame_dma_pool);
c4a3e0a5
BS		 3992 instance->frame_dma_pool = NULL;
3993
3994 return -ENOMEM;
3995 }
3996
3997 /*
3998 * Allocate and attach a frame to each of the commands in cmd_list.
3999 * By making cmd->index as the context instead of the &cmd, we can
4000 * always use 32bit context regardless of the architecture
4001 */
4002 for (i = 0; i < max_cmd; i++) {
4003
4004 cmd = instance->cmd_list[i];
4005
fc69d86d 4006 cmd->frame = dma_pool_alloc(instance->frame_dma_pool,
c4a3e0a5
BS		 4007 GFP_KERNEL, &cmd->frame_phys_addr);
4008
fc69d86d 4009 cmd->sense = dma_pool_alloc(instance->sense_dma_pool,
c4a3e0a5
BS		 4010 GFP_KERNEL, &cmd->sense_phys_addr);
4011
4012 /*
4013 * megasas_teardown_frame_pool() takes care of freeing
4014 * whatever has been allocated
4015 */
4016 if (!cmd->frame || !cmd->sense) {
fc69d86d 4017 dev_printk(KERN_DEBUG, &instance->pdev->dev, "dma_pool_alloc failed\n");
c4a3e0a5
BS		 4018 megasas_teardown_frame_pool(instance);
4019 return -ENOMEM;
4020 }
4021
21c34006 4022 memset(cmd->frame, 0, instance->mfi_frame_size);
94cd65dd 4023 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 4024 cmd->frame->io.pad_0 = 0;
e7d36b88 4025 if ((instance->adapter_type == MFI_SERIES) && reset_devices)
e5f93a36 4026 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 4027 }
4028
4029 return 0;
4030}
4031
4032/**
4033 * megasas_free_cmds - Free all the cmds in the free cmd pool
4034 * @instance: Adapter soft state
4035 */
9c915a8c 4036void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 4037{
4038 int i;
da0dc9fb 4039
c4a3e0a5
BS		 4040 /* First free the MFI frame pool */
4041 megasas_teardown_frame_pool(instance);
4042
4043 /* Free all the commands in the cmd_list */
9c915a8c
AR		 4044 for (i = 0; i < instance->max_mfi_cmds; i++)
4045
c4a3e0a5
BS		 4046 kfree(instance->cmd_list[i]);
4047
4048 /* Free the cmd_list buffer itself */
4049 kfree(instance->cmd_list);
4050 instance->cmd_list = NULL;
4051
4052 INIT_LIST_HEAD(&instance->cmd_pool);
4053}
4054
4055/**
4056 * megasas_alloc_cmds - Allocates the command packets
4057 * @instance: Adapter soft state
4058 *
4059 * Each command that is issued to the FW, whether IO commands from the OS or
4060 * internal commands like IOCTLs, are wrapped in local data structure called
4061 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
4062 * the FW.
4063 *
4064 * Each frame has a 32-bit field called context (tag). This context is used
4065 * to get back the megasas_cmd from the frame when a frame gets completed in
4066 * the ISR. Typically the address of the megasas_cmd itself would be used as
4067 * the context. But we wanted to keep the differences between 32 and 64 bit
4068 * systems to the mininum. We always use 32 bit integers for the context. In
4069 * this driver, the 32 bit values are the indices into an array cmd_list.
4070 * This array is used only to look up the megasas_cmd given the context. The
4071 * free commands themselves are maintained in a linked list called cmd_pool.
4072 */
9c915a8c 4073int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 4074{
4075 int i;
4076 int j;
50b7f5a2 4077 u16 max_cmd;
c4a3e0a5
BS		 4078 struct megasas_cmd *cmd;
4079
9c915a8c 4080 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 4081
4082 /*
4083 * instance->cmd_list is an array of struct megasas_cmd pointers.
4084 * Allocate the dynamic array first and then allocate individual
4085 * commands.
4086 */
dd00cc48 4087 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 4088
4089 if (!instance->cmd_list) {
1be18254 4090 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 4091 return -ENOMEM;
4092 }
4093
9c915a8c 4094 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 4095
4096 for (i = 0; i < max_cmd; i++) {
4097 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
4098 GFP_KERNEL);
4099
4100 if (!instance->cmd_list[i]) {
4101
4102 for (j = 0; j < i; j++)
4103 kfree(instance->cmd_list[j]);
4104
4105 kfree(instance->cmd_list);
4106 instance->cmd_list = NULL;
4107
4108 return -ENOMEM;
4109 }
4110 }
4111
c4a3e0a5
BS		 4112 for (i = 0; i < max_cmd; i++) {
4113 cmd = instance->cmd_list[i];
4114 memset(cmd, 0, sizeof(struct megasas_cmd));
4115 cmd->index = i;
39a98554 4116 cmd->scmd = NULL;
c4a3e0a5
BS		 4117 cmd->instance = instance;
4118
4119 list_add_tail(&cmd->list, &instance->cmd_pool);
4120 }
4121
4122 /*
4123 * Create a frame pool and assign one frame to each cmd
4124 */
4125 if (megasas_create_frame_pool(instance)) {
1be18254 4126 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 4127 megasas_free_cmds(instance);
4128 }
4129
4130 return 0;
4131}
4132
6d40afbc
SS		 4133/*
4134 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
4135 * @instance: Adapter soft state
4136 *
4137 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
4138 * or FW is not under OCR.
4139 */
4140inline int
4141dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
4142
e7d36b88 4143 if (instance->adapter_type == MFI_SERIES)
6d40afbc
SS		 4144 return KILL_ADAPTER;
4145 else if (instance->unload ||
4146 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
4147 return IGNORE_TIMEOUT;
4148 else
4149 return INITIATE_OCR;
4150}
4151
15dd0381
S		 4152static void
4153megasas_get_pd_info(struct megasas_instance *instance, struct scsi_device *sdev)
2216c305
SS		 4154{
4155 int ret;
4156 struct megasas_cmd *cmd;
4157 struct megasas_dcmd_frame *dcmd;
4158
15dd0381
S		 4159 struct MR_PRIV_DEVICE *mr_device_priv_data;
4160 u16 device_id = 0;
4161
4162 device_id = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
2216c305
SS		 4163 cmd = megasas_get_cmd(instance);
4164
4165 if (!cmd) {
4166 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
15dd0381 4167 return;
2216c305
SS		 4168 }
4169
4170 dcmd = &cmd->frame->dcmd;
4171
4172 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
4173 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4174
4175 dcmd->mbox.s[0] = cpu_to_le16(device_id);
4176 dcmd->cmd = MFI_CMD_DCMD;
4177 dcmd->cmd_status = 0xFF;
4178 dcmd->sge_count = 1;
107a60dd 4179 dcmd->flags = MFI_FRAME_DIR_READ;
2216c305
SS		 4180 dcmd->timeout = 0;
4181 dcmd->pad_0 = 0;
4182 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
4183 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
2216c305 4184
107a60dd
S		 4185 megasas_set_dma_settings(instance, dcmd, instance->pd_info_h,
4186 sizeof(struct MR_PD_INFO));
2216c305 4187
e7d36b88
S		 4188 if ((instance->adapter_type != MFI_SERIES) &&
4189 !instance->mask_interrupts)
2216c305
SS		 4190 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
4191 else
4192 ret = megasas_issue_polled(instance, cmd);
4193
4194 switch (ret) {
4195 case DCMD_SUCCESS:
15dd0381
S		 4196 mr_device_priv_data = sdev->hostdata;
4197 le16_to_cpus((u16 *)&instance->pd_info->state.ddf.pdType);
4198 mr_device_priv_data->interface_type =
2216c305
SS		 4199 instance->pd_info->state.ddf.pdType.intf;
4200 break;
4201
4202 case DCMD_TIMEOUT:
4203
4204 switch (dcmd_timeout_ocr_possible(instance)) {
4205 case INITIATE_OCR:
4206 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4207 megasas_reset_fusion(instance->host,
4208 MFI_IO_TIMEOUT_OCR);
4209 break;
4210 case KILL_ADAPTER:
4211 megaraid_sas_kill_hba(instance);
4212 break;
4213 case IGNORE_TIMEOUT:
4214 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4215 __func__, __LINE__);
4216 break;
4217 }
4218
4219 break;
4220 }
4221
4222 if (ret != DCMD_TIMEOUT)
4223 megasas_return_cmd(instance, cmd);
4224
15dd0381 4225 return;
2216c305 4226}
81e403ce
YB		 4227/*
4228 * megasas_get_pd_list_info - Returns FW's pd_list structure
4229 * @instance: Adapter soft state
4230 * @pd_list: pd_list structure
4231 *
4232 * Issues an internal command (DCMD) to get the FW's controller PD
4233 * list structure. This information is mainly used to find out SYSTEM
4234 * supported by the FW.
4235 */
4236static int
4237megasas_get_pd_list(struct megasas_instance *instance)
4238{
4239 int ret = 0, pd_index = 0;
4240 struct megasas_cmd *cmd;
4241 struct megasas_dcmd_frame *dcmd;
4242 struct MR_PD_LIST *ci;
4243 struct MR_PD_ADDRESS *pd_addr;
4244 dma_addr_t ci_h = 0;
4245
d9083160
SS		 4246 if (instance->pd_list_not_supported) {
4247 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4248 "not supported by firmware\n");
4249 return ret;
4250 }
4251
9b3d028f
S		 4252 ci = instance->pd_list_buf;
4253 ci_h = instance->pd_list_buf_h;
4254
81e403ce
YB		 4255 cmd = megasas_get_cmd(instance);
4256
4257 if (!cmd) {
1be18254 4258 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 4259 return -ENOMEM;
4260 }
4261
4262 dcmd = &cmd->frame->dcmd;
4263
81e403ce
YB		 4264 memset(ci, 0, sizeof(*ci));
4265 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4266
4267 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4268 dcmd->mbox.b[1] = 0;
4269 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4270 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4271 dcmd->sge_count = 1;
107a60dd 4272 dcmd->flags = MFI_FRAME_DIR_READ;
81e403ce 4273 dcmd->timeout = 0;
780a3762 4274 dcmd->pad_0 = 0;
94cd65dd
SS		 4275 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4276 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
81e403ce 4277
107a60dd
S		 4278 megasas_set_dma_settings(instance, dcmd, instance->pd_list_buf_h,
4279 (MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)));
81e403ce 4280
e7d36b88
S		 4281 if ((instance->adapter_type != MFI_SERIES) &&
4282 !instance->mask_interrupts)
90dc9d98 4283 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4284 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4285 else
4286 ret = megasas_issue_polled(instance, cmd);
81e403ce 4287
6d40afbc
SS		 4288 switch (ret) {
4289 case DCMD_FAILED:
30845586
SS		 4290 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4291 "failed/not supported by firmware\n");
4292
e7d36b88 4293 if (instance->adapter_type != MFI_SERIES)
30845586
SS		 4294 megaraid_sas_kill_hba(instance);
4295 else
4296 instance->pd_list_not_supported = 1;
6d40afbc
SS		 4297 break;
4298 case DCMD_TIMEOUT:
81e403ce 4299
6d40afbc
SS		 4300 switch (dcmd_timeout_ocr_possible(instance)) {
4301 case INITIATE_OCR:
4302 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4303 /*
4304 * DCMD failed from AEN path.
4305 * AEN path already hold reset_mutex to avoid PCI access
4306 * while OCR is in progress.
4307 */
4308 mutex_unlock(&instance->reset_mutex);
4309 megasas_reset_fusion(instance->host,
4310 MFI_IO_TIMEOUT_OCR);
4311 mutex_lock(&instance->reset_mutex);
4312 break;
4313 case KILL_ADAPTER:
4314 megaraid_sas_kill_hba(instance);
4315 break;
4316 case IGNORE_TIMEOUT:
4317 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4318 __func__, __LINE__);
4319 break;
4320 }
81e403ce 4321
6d40afbc
SS		 4322 break;
4323
4324 case DCMD_SUCCESS:
4325 pd_addr = ci->addr;
4326
4327 if ((le32_to_cpu(ci->count) >
4328 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4329 break;
81e403ce 4330
999ece0a 4331 memset(instance->local_pd_list, 0,
6d40afbc 4332 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4333
94cd65dd 4334 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4335 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4336 le16_to_cpu(pd_addr->deviceId);
999ece0a 4337 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4338 pd_addr->scsiDevType;
999ece0a 4339 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4340 MR_PD_STATE_SYSTEM;
81e403ce
YB		 4341 pd_addr++;
4342 }
6d40afbc 4343
999ece0a
SS		 4344 memcpy(instance->pd_list, instance->local_pd_list,
4345 sizeof(instance->pd_list));
6d40afbc
SS		 4346 break;
4347
81e403ce
YB		 4348 }
4349
6d40afbc
SS		 4350 if (ret != DCMD_TIMEOUT)
4351 megasas_return_cmd(instance, cmd);
81e403ce
YB		 4352
4353 return ret;
4354}
4355
bdc6fb8d
YB		 4356/*
4357 * megasas_get_ld_list_info - Returns FW's ld_list structure
4358 * @instance: Adapter soft state
4359 * @ld_list: ld_list structure
4360 *
4361 * Issues an internal command (DCMD) to get the FW's controller PD
4362 * list structure. This information is mainly used to find out SYSTEM
4363 * supported by the FW.
4364 */
4365static int
4366megasas_get_ld_list(struct megasas_instance *instance)
4367{
4368 int ret = 0, ld_index = 0, ids = 0;
4369 struct megasas_cmd *cmd;
4370 struct megasas_dcmd_frame *dcmd;
4371 struct MR_LD_LIST *ci;
4372 dma_addr_t ci_h = 0;
94cd65dd 4373 u32 ld_count;
bdc6fb8d 4374
9b3d028f
S		 4375 ci = instance->ld_list_buf;
4376 ci_h = instance->ld_list_buf_h;
4377
bdc6fb8d
YB		 4378 cmd = megasas_get_cmd(instance);
4379
4380 if (!cmd) {
1be18254 4381 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 4382 return -ENOMEM;
4383 }
4384
4385 dcmd = &cmd->frame->dcmd;
4386
bdc6fb8d
YB		 4387 memset(ci, 0, sizeof(*ci));
4388 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4389
51087a86
SS		 4390 if (instance->supportmax256vd)
4391 dcmd->mbox.b[0] = 1;
bdc6fb8d 4392 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4393 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4394 dcmd->sge_count = 1;
107a60dd 4395 dcmd->flags = MFI_FRAME_DIR_READ;
bdc6fb8d 4396 dcmd->timeout = 0;
94cd65dd
SS		 4397 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4398 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
bdc6fb8d
YB		 4399 dcmd->pad_0 = 0;
4400
107a60dd
S		 4401 megasas_set_dma_settings(instance, dcmd, ci_h,
4402 sizeof(struct MR_LD_LIST));
4403
e7d36b88
S		 4404 if ((instance->adapter_type != MFI_SERIES) &&
4405 !instance->mask_interrupts)
90dc9d98 4406 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4407 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4408 else
4409 ret = megasas_issue_polled(instance, cmd);
4410
94cd65dd
SS		 4411 ld_count = le32_to_cpu(ci->ldCount);
4412
6d40afbc
SS		 4413 switch (ret) {
4414 case DCMD_FAILED:
4415 megaraid_sas_kill_hba(instance);
4416 break;
4417 case DCMD_TIMEOUT:
4418
4419 switch (dcmd_timeout_ocr_possible(instance)) {
4420 case INITIATE_OCR:
4421 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4422 /*
4423 * DCMD failed from AEN path.
4424 * AEN path already hold reset_mutex to avoid PCI access
4425 * while OCR is in progress.
4426 */
4427 mutex_unlock(&instance->reset_mutex);
4428 megasas_reset_fusion(instance->host,
4429 MFI_IO_TIMEOUT_OCR);
4430 mutex_lock(&instance->reset_mutex);
4431 break;
4432 case KILL_ADAPTER:
4433 megaraid_sas_kill_hba(instance);
4434 break;
4435 case IGNORE_TIMEOUT:
4436 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4437 __func__, __LINE__);
4438 break;
4439 }
4440
4441 break;
4442
4443 case DCMD_SUCCESS:
4444 if (ld_count > instance->fw_supported_vd_count)
4445 break;
bdc6fb8d 4446
51087a86 4447 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4448
94cd65dd 4449 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 4450 if (ci->ldList[ld_index].state != 0) {
4451 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4452 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB		 4453 }
4454 }
6d40afbc
SS		 4455
4456 break;
bdc6fb8d
YB		 4457 }
4458
6d40afbc
SS		 4459 if (ret != DCMD_TIMEOUT)
4460 megasas_return_cmd(instance, cmd);
bdc6fb8d 4461
bdc6fb8d
YB		 4462 return ret;
4463}
4464
21c9e160
AR		 4465/**
4466 * megasas_ld_list_query - Returns FW's ld_list structure
4467 * @instance: Adapter soft state
4468 * @ld_list: ld_list structure
4469 *
4470 * Issues an internal command (DCMD) to get the FW's controller PD
4471 * list structure. This information is mainly used to find out SYSTEM
4472 * supported by the FW.
4473 */
4474static int
4475megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4476{
4477 int ret = 0, ld_index = 0, ids = 0;
4478 struct megasas_cmd *cmd;
4479 struct megasas_dcmd_frame *dcmd;
4480 struct MR_LD_TARGETID_LIST *ci;
4481 dma_addr_t ci_h = 0;
94cd65dd 4482 u32 tgtid_count;
21c9e160 4483
9b3d028f
S		 4484 ci = instance->ld_targetid_list_buf;
4485 ci_h = instance->ld_targetid_list_buf_h;
4486
21c9e160
AR		 4487 cmd = megasas_get_cmd(instance);
4488
4489 if (!cmd) {
1be18254
BH		 4490 dev_warn(&instance->pdev->dev,
4491 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 4492 return -ENOMEM;
4493 }
4494
4495 dcmd = &cmd->frame->dcmd;
4496
21c9e160
AR		 4497 memset(ci, 0, sizeof(*ci));
4498 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4499
4500 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4501 if (instance->supportmax256vd)
4502 dcmd->mbox.b[2] = 1;
21c9e160
AR		 4503
4504 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4505 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4506 dcmd->sge_count = 1;
107a60dd 4507 dcmd->flags = MFI_FRAME_DIR_READ;
21c9e160 4508 dcmd->timeout = 0;
94cd65dd
SS		 4509 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4510 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
21c9e160
AR		 4511 dcmd->pad_0 = 0;
4512
107a60dd
S		 4513 megasas_set_dma_settings(instance, dcmd, ci_h,
4514 sizeof(struct MR_LD_TARGETID_LIST));
4515
e7d36b88
S		 4516 if ((instance->adapter_type != MFI_SERIES) &&
4517 !instance->mask_interrupts)
6d40afbc 4518 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4519 else
4520 ret = megasas_issue_polled(instance, cmd);
21c9e160 4521
6d40afbc
SS		 4522 switch (ret) {
4523 case DCMD_FAILED:
4524 dev_info(&instance->pdev->dev,
4525 "DCMD not supported by firmware - %s %d\n",
4526 __func__, __LINE__);
4527 ret = megasas_get_ld_list(instance);
4528 break;
4529 case DCMD_TIMEOUT:
4530 switch (dcmd_timeout_ocr_possible(instance)) {
4531 case INITIATE_OCR:
4532 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4533 /*
4534 * DCMD failed from AEN path.
4535 * AEN path already hold reset_mutex to avoid PCI access
4536 * while OCR is in progress.
4537 */
4538 mutex_unlock(&instance->reset_mutex);
4539 megasas_reset_fusion(instance->host,
4540 MFI_IO_TIMEOUT_OCR);
4541 mutex_lock(&instance->reset_mutex);
4542 break;
4543 case KILL_ADAPTER:
4544 megaraid_sas_kill_hba(instance);
4545 break;
4546 case IGNORE_TIMEOUT:
4547 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4548 __func__, __LINE__);
4549 break;
4550 }
4551
4552 break;
4553 case DCMD_SUCCESS:
4554 tgtid_count = le32_to_cpu(ci->count);
4555
4556 if ((tgtid_count > (instance->fw_supported_vd_count)))
4557 break;
94cd65dd 4558
21c9e160 4559 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4560 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 4561 ids = ci->targetId[ld_index];
4562 instance->ld_ids[ids] = ci->targetId[ld_index];
4563 }
4564
6d40afbc 4565 break;
21c9e160
AR		 4566 }
4567
6d40afbc
SS		 4568 if (ret != DCMD_TIMEOUT)
4569 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4570
4571 return ret;
4572}
4573
d009b576
SS		 4574/*
4575 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4576 * instance : Controller's instance
4577*/
4578static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4579{
4580 struct fusion_context *fusion;
d889344e 4581 u32 ventura_map_sz = 0;
d009b576
SS		 4582
4583 fusion = instance->ctrl_context;
4584 /* For MFI based controllers return dummy success */
4585 if (!fusion)
4586 return;
4587
4588 instance->supportmax256vd =
9ad18a9c 4589 instance->ctrl_info_buf->adapterOperations3.supportMaxExtLDs;
d009b576 4590 /* Below is additional check to address future FW enhancement */
9ad18a9c 4591 if (instance->ctrl_info_buf->max_lds > 64)
d009b576
SS		 4592 instance->supportmax256vd = 1;
4593
4594 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4595 * MEGASAS_MAX_DEV_PER_CHANNEL;
4596 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4597 * MEGASAS_MAX_DEV_PER_CHANNEL;
4598 if (instance->supportmax256vd) {
4599 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4600 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4601 } else {
4602 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4603 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4604 }
d88da09a
SS		 4605
4606 dev_info(&instance->pdev->dev,
4607 "firmware type\t: %s\n",
4608 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4609 "Legacy(64 VD) firmware");
d009b576 4610
d889344e
SC		 4611 if (instance->max_raid_mapsize) {
4612 ventura_map_sz = instance->max_raid_mapsize *
4613 MR_MIN_MAP_SIZE; /* 64k */
4614 fusion->current_map_sz = ventura_map_sz;
4615 fusion->max_map_sz = ventura_map_sz;
4616 } else {
4617 fusion->old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
4618 (sizeof(struct MR_LD_SPAN_MAP) *
4619 (instance->fw_supported_vd_count - 1));
4620 fusion->new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
d009b576 4621
d889344e
SC		 4622 fusion->max_map_sz =
4623 max(fusion->old_map_sz, fusion->new_map_sz);
d009b576 4624
d889344e
SC		 4625 if (instance->supportmax256vd)
4626 fusion->current_map_sz = fusion->new_map_sz;
4627 else
4628 fusion->current_map_sz = fusion->old_map_sz;
4629 }
4630 /* irrespective of FW raid maps, driver raid map is constant */
4631 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP_ALL);
d009b576
SS		 4632}
4633
c4a3e0a5
BS		 4634/**
4635 * megasas_get_controller_info - Returns FW's controller structure
4636 * @instance: Adapter soft state
c4a3e0a5
BS		 4637 *
4638 * Issues an internal command (DCMD) to get the FW's controller structure.
4639 * This information is mainly used to find out the maximum IO transfer per
4640 * command supported by the FW.
4641 */
51087a86 4642int
d009b576 4643megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4644{
4645 int ret = 0;
4646 struct megasas_cmd *cmd;
4647 struct megasas_dcmd_frame *dcmd;
4648 struct megasas_ctrl_info *ci;
4649 dma_addr_t ci_h = 0;
4650
9b3d028f
S		 4651 ci = instance->ctrl_info_buf;
4652 ci_h = instance->ctrl_info_buf_h;
d009b576 4653
c4a3e0a5
BS		 4654 cmd = megasas_get_cmd(instance);
4655
4656 if (!cmd) {
1be18254 4657 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4658 return -ENOMEM;
4659 }
4660
4661 dcmd = &cmd->frame->dcmd;
4662
c4a3e0a5
BS		 4663 memset(ci, 0, sizeof(*ci));
4664 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4665
4666 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4667 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4668 dcmd->sge_count = 1;
107a60dd 4669 dcmd->flags = MFI_FRAME_DIR_READ;
c4a3e0a5 4670 dcmd->timeout = 0;
780a3762 4671 dcmd->pad_0 = 0;
94cd65dd
SS		 4672 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4673 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
51087a86 4674 dcmd->mbox.b[0] = 1;
c4a3e0a5 4675
107a60dd
S		 4676 megasas_set_dma_settings(instance, dcmd, ci_h,
4677 sizeof(struct megasas_ctrl_info));
4678
e7d36b88
S		 4679 if ((instance->adapter_type != MFI_SERIES) &&
4680 !instance->mask_interrupts)
6d40afbc 4681 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4682 else
4683 ret = megasas_issue_polled(instance, cmd);
4684
6d40afbc
SS		 4685 switch (ret) {
4686 case DCMD_SUCCESS:
6d40afbc
SS		 4687 /* Save required controller information in
4688 * CPU endianness format.
4689 */
9ad18a9c
S		 4690 le32_to_cpus((u32 *)&ci->properties.OnOffProperties);
4691 le32_to_cpus((u32 *)&ci->adapterOperations2);
4692 le32_to_cpus((u32 *)&ci->adapterOperations3);
4693 le16_to_cpus((u16 *)&ci->adapter_operations4);
6d40afbc
SS		 4694
4695 /* Update the latest Ext VD info.
4696 * From Init path, store current firmware details.
4697 * From OCR path, detect any firmware properties changes.
4698 * in case of Firmware upgrade without system reboot.
4699 */
d009b576 4700 megasas_update_ext_vd_details(instance);
3761cb4c 4701 instance->use_seqnum_jbod_fp =
9ad18a9c 4702 ci->adapterOperations3.useSeqNumJbodFP;
ede7c3ce 4703 instance->support_morethan256jbod =
9ad18a9c 4704 ci->adapter_operations4.support_pd_map_target_id;
6d40afbc
SS		 4705
4706 /*Check whether controller is iMR or MR */
9ad18a9c 4707 instance->is_imr = (ci->memory_size ? 0 : 1);
4026e9aa 4708 dev_info(&instance->pdev->dev,
6d40afbc
SS		 4709 "controller type\t: %s(%dMB)\n",
4710 instance->is_imr ? "iMR" : "MR",
9ad18a9c 4711 le16_to_cpu(ci->memory_size));
6d40afbc 4712
c4bd2654 4713 instance->disableOnlineCtrlReset =
9ad18a9c 4714 ci->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4715 instance->secure_jbod_support =
9ad18a9c 4716 ci->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS		 4717 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4718 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4719 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4720 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS		 4721 break;
4722
4723 case DCMD_TIMEOUT:
4724 switch (dcmd_timeout_ocr_possible(instance)) {
4725 case INITIATE_OCR:
4726 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4727 megasas_reset_fusion(instance->host,
4728 MFI_IO_TIMEOUT_OCR);
4729 break;
4730 case KILL_ADAPTER:
4731 megaraid_sas_kill_hba(instance);
4732 break;
4733 case IGNORE_TIMEOUT:
4734 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4735 __func__, __LINE__);
4736 break;
4737 }
4738 case DCMD_FAILED:
4739 megaraid_sas_kill_hba(instance);
4740 break;
4741
d009b576 4742 }
c4a3e0a5 4743
4026e9aa 4744 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 4745
4746
c4a3e0a5
BS		 4747 return ret;
4748}
4749
fc62b3fc
SS		 4750/*
4751 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4752 * to firmware
4753 *
4754 * @instance: Adapter soft state
4755 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4756 MR_CRASH_BUF_TURN_OFF = 0
4757 MR_CRASH_BUF_TURN_ON = 1
4758 * @return 0 on success non-zero on failure.
4759 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4760 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4761 * that driver supports crash dump feature. This DCMD will be sent only if
4762 * crash dump feature is supported by the FW.
4763 *
4764 */
4765int megasas_set_crash_dump_params(struct megasas_instance *instance,
4766 u8 crash_buf_state)
4767{
4768 int ret = 0;
4769 struct megasas_cmd *cmd;
4770 struct megasas_dcmd_frame *dcmd;
4771
4772 cmd = megasas_get_cmd(instance);
4773
4774 if (!cmd) {
4775 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4776 return -ENOMEM;
4777 }
4778
4779
4780 dcmd = &cmd->frame->dcmd;
4781
4782 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4783 dcmd->mbox.b[0] = crash_buf_state;
4784 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4785 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc 4786 dcmd->sge_count = 1;
107a60dd 4787 dcmd->flags = MFI_FRAME_DIR_NONE;
fc62b3fc
SS		 4788 dcmd->timeout = 0;
4789 dcmd->pad_0 = 0;
4790 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4791 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
fc62b3fc 4792
107a60dd
S		 4793 megasas_set_dma_settings(instance, dcmd, instance->crash_dump_h,
4794 CRASH_DMA_BUF_SIZE);
fc62b3fc 4795
e7d36b88
S		 4796 if ((instance->adapter_type != MFI_SERIES) &&
4797 !instance->mask_interrupts)
6d40afbc 4798 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4799 else
90dc9d98
SS		 4800 ret = megasas_issue_polled(instance, cmd);
4801
6d40afbc
SS		 4802 if (ret == DCMD_TIMEOUT) {
4803 switch (dcmd_timeout_ocr_possible(instance)) {
4804 case INITIATE_OCR:
4805 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4806 megasas_reset_fusion(instance->host,
4807 MFI_IO_TIMEOUT_OCR);
4808 break;
4809 case KILL_ADAPTER:
4810 megaraid_sas_kill_hba(instance);
4811 break;
4812 case IGNORE_TIMEOUT:
4813 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4814 __func__, __LINE__);
4815 break;
4816 }
4817 } else
4818 megasas_return_cmd(instance, cmd);
4819
fc62b3fc
SS		 4820 return ret;
4821}
4822
31ea7088 4823/**
4824 * megasas_issue_init_mfi - Initializes the FW
4825 * @instance: Adapter soft state
4826 *
4827 * Issues the INIT MFI cmd
4828 */
4829static int
4830megasas_issue_init_mfi(struct megasas_instance *instance)
4831{
9ab9ed38 4832 __le32 context;
31ea7088 4833 struct megasas_cmd *cmd;
31ea7088 4834 struct megasas_init_frame *init_frame;
4835 struct megasas_init_queue_info *initq_info;
4836 dma_addr_t init_frame_h;
4837 dma_addr_t initq_info_h;
4838
4839 /*
4840 * Prepare a init frame. Note the init frame points to queue info
4841 * structure. Each frame has SGL allocated after first 64 bytes. For
4842 * this frame - since we don't need any SGL - we use SGL's space as
4843 * queue info structure
4844 *
4845 * We will not get a NULL command below. We just created the pool.
4846 */
4847 cmd = megasas_get_cmd(instance);
4848
4849 init_frame = (struct megasas_init_frame *)cmd->frame;
4850 initq_info = (struct megasas_init_queue_info *)
4851 ((unsigned long)init_frame + 64);
4852
4853 init_frame_h = cmd->frame_phys_addr;
4854 initq_info_h = init_frame_h + 64;
4855
4856 context = init_frame->context;
4857 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4858 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4859 init_frame->context = context;
4860
94cd65dd
SS		 4861 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4862 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4863
94cd65dd
SS		 4864 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4865 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4866
4867 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4868 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4869 init_frame->queue_info_new_phys_addr_lo =
4870 cpu_to_le32(lower_32_bits(initq_info_h));
4871 init_frame->queue_info_new_phys_addr_hi =
4872 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4873
94cd65dd 4874 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4875
4876 /*
4877 * disable the intr before firing the init frame to FW
4878 */
d46a3ad6 4879 instance->instancet->disable_intr(instance);
31ea7088 4880
4881 /*
4882 * Issue the init frame in polled mode
4883 */
4884
4885 if (megasas_issue_polled(instance, cmd)) {
1be18254 4886 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4887 megasas_return_cmd(instance, cmd);
4888 goto fail_fw_init;
4889 }
4890
4891 megasas_return_cmd(instance, cmd);
4892
4893 return 0;
4894
4895fail_fw_init:
4896 return -EINVAL;
4897}
4898
cd50ba8e
AR		 4899static u32
4900megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4901{
cd50ba8e 4902 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4903 u32 context_sz;
4904 u32 reply_q_sz;
c4a3e0a5
BS		 4905
4906 reg_set = instance->reg_set;
4907
c4a3e0a5
BS		 4908 /*
4909 * Get various operational parameters from status register
4910 */
1341c939 4911 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4912 /*
4913 * Reduce the max supported cmds by 1. This is to ensure that the
4914 * reply_q_sz (1 more than the max cmd that driver may send)
4915 * does not exceed max cmds that the FW can support
4916 */
4917 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4918 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4919 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4920 0x10;
f26ac3a1
SS		 4921 /*
4922 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4923 * are reserved for IOCTL + driver's internal DCMDs.
4924 */
4925 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4926 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4927 instance->max_scsi_cmds = (instance->max_fw_cmds -
4928 MEGASAS_SKINNY_INT_CMDS);
4929 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4930 } else {
4931 instance->max_scsi_cmds = (instance->max_fw_cmds -
4932 MEGASAS_INT_CMDS);
4933 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4934 }
4935
308ec459 4936 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 4937 /*
4938 * Create a pool of commands
4939 */
4940 if (megasas_alloc_cmds(instance))
4941 goto fail_alloc_cmds;
4942
4943 /*
4944 * Allocate memory for reply queue. Length of reply queue should
4945 * be _one_ more than the maximum commands handled by the firmware.
4946 *
4947 * Note: When FW completes commands, it places corresponding contex
4948 * values in this circular reply queue. This circular queue is a fairly
4949 * typical producer-consumer queue. FW is the producer (of completed
4950 * commands) and the driver is the consumer.
4951 */
4952 context_sz = sizeof(u32);
4953 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4954
4955 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4956 reply_q_sz,
4957 &instance->reply_queue_h);
4958
4959 if (!instance->reply_queue) {
1be18254 4960 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4961 goto fail_reply_queue;
4962 }
4963
31ea7088 4964 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4965 goto fail_fw_init;
c4a3e0a5 4966
d009b576 4967 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4968 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4969 "Fail from %s %d\n", instance->unique_id,
4970 __func__, __LINE__);
4971 goto fail_fw_init;
4972 }
4973
39a98554 4974 instance->fw_support_ieee = 0;
4975 instance->fw_support_ieee =
4976 (instance->instancet->read_fw_status_reg(reg_set) &
4977 0x04000000);
4978
1be18254 4979 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4980 instance->fw_support_ieee);
4981
4982 if (instance->fw_support_ieee)
4983 instance->flag_ieee = 1;
4984
cd50ba8e
AR		 4985 return 0;
4986
4987fail_fw_init:
4988
4989 pci_free_consistent(instance->pdev, reply_q_sz,
4990 instance->reply_queue, instance->reply_queue_h);
4991fail_reply_queue:
4992 megasas_free_cmds(instance);
4993
4994fail_alloc_cmds:
cd50ba8e
AR		 4995 return 1;
4996}
4997
d3557fc8 4998/*
fad119b7 4999 * megasas_setup_irqs_ioapic - register legacy interrupts.
d3557fc8
SS		 5000 * @instance: Adapter soft state
5001 *
5002 * Do not enable interrupt, only setup ISRs.
5003 *
5004 * Return 0 on success.
5005 */
5006static int
5007megasas_setup_irqs_ioapic(struct megasas_instance *instance)
5008{
5009 struct pci_dev *pdev;
5010
5011 pdev = instance->pdev;
5012 instance->irq_context[0].instance = instance;
5013 instance->irq_context[0].MSIxIndex = 0;
fad119b7
HR		 5014 if (request_irq(pci_irq_vector(pdev, 0),
5015 instance->instancet->service_isr, IRQF_SHARED,
5016 "megasas", &instance->irq_context[0])) {
d3557fc8
SS		 5017 dev_err(&instance->pdev->dev,
5018 "Failed to register IRQ from %s %d\n",
5019 __func__, __LINE__);
5020 return -1;
5021 }
5022 return 0;
5023}
5024
5025/**
5026 * megasas_setup_irqs_msix - register MSI-x interrupts.
5027 * @instance: Adapter soft state
5028 * @is_probe: Driver probe check
5029 *
5030 * Do not enable interrupt, only setup ISRs.
5031 *
5032 * Return 0 on success.
5033 */
5034static int
5035megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
5036{
fad119b7 5037 int i, j;
d3557fc8
SS		 5038 struct pci_dev *pdev;
5039
5040 pdev = instance->pdev;
5041
5042 /* Try MSI-x */
d3557fc8
SS		 5043 for (i = 0; i < instance->msix_vectors; i++) {
5044 instance->irq_context[i].instance = instance;
5045 instance->irq_context[i].MSIxIndex = i;
fad119b7 5046 if (request_irq(pci_irq_vector(pdev, i),
d3557fc8
SS		 5047 instance->instancet->service_isr, 0, "megasas",
5048 &instance->irq_context[i])) {
5049 dev_err(&instance->pdev->dev,
5050 "Failed to register IRQ for vector %d.\n", i);
fad119b7
HR		 5051 for (j = 0; j < i; j++)
5052 free_irq(pci_irq_vector(pdev, j),
5053 &instance->irq_context[j]);
d3557fc8
SS		 5054 /* Retry irq register for IO_APIC*/
5055 instance->msix_vectors = 0;
64ff64b9
S		 5056 if (is_probe) {
5057 pci_free_irq_vectors(instance->pdev);
d3557fc8 5058 return megasas_setup_irqs_ioapic(instance);
64ff64b9 5059 } else {
d3557fc8 5060 return -1;
64ff64b9 5061 }
d3557fc8 5062 }
d3557fc8
SS		 5063 }
5064 return 0;
5065}
5066
5067/*
5068 * megasas_destroy_irqs- unregister interrupts.
5069 * @instance: Adapter soft state
5070 * return: void
5071 */
5072static void
5073megasas_destroy_irqs(struct megasas_instance *instance) {
5074
5075 int i;
5076
5077 if (instance->msix_vectors)
5078 for (i = 0; i < instance->msix_vectors; i++) {
fad119b7 5079 free_irq(pci_irq_vector(instance->pdev, i),
d3557fc8
SS		 5080 &instance->irq_context[i]);
5081 }
5082 else
fad119b7
HR		 5083 free_irq(pci_irq_vector(instance->pdev, 0),
5084 &instance->irq_context[0]);
d3557fc8
SS		 5085}
5086
3761cb4c 5087/**
5088 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
5089 * @instance: Adapter soft state
5090 * @is_probe: Driver probe check
5091 *
5092 * Return 0 on success.
5093 */
5094void
5095megasas_setup_jbod_map(struct megasas_instance *instance)
5096{
5097 int i;
5098 struct fusion_context *fusion = instance->ctrl_context;
5099 u32 pd_seq_map_sz;
5100
5101 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5102 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
5103
5104 if (reset_devices || !fusion ||
9ad18a9c 5105 !instance->ctrl_info_buf->adapterOperations3.useSeqNumJbodFP) {
3761cb4c 5106 dev_info(&instance->pdev->dev,
5107 "Jbod map is not supported %s %d\n",
5108 __func__, __LINE__);
5109 instance->use_seqnum_jbod_fp = false;
5110 return;
5111 }
5112
5113 if (fusion->pd_seq_sync[0])
5114 goto skip_alloc;
5115
5116 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
5117 fusion->pd_seq_sync[i] = dma_alloc_coherent
5118 (&instance->pdev->dev, pd_seq_map_sz,
5119 &fusion->pd_seq_phys[i], GFP_KERNEL);
5120 if (!fusion->pd_seq_sync[i]) {
5121 dev_err(&instance->pdev->dev,
5122 "Failed to allocate memory from %s %d\n",
5123 __func__, __LINE__);
5124 if (i == 1) {
5125 dma_free_coherent(&instance->pdev->dev,
5126 pd_seq_map_sz, fusion->pd_seq_sync[0],
5127 fusion->pd_seq_phys[0]);
5128 fusion->pd_seq_sync[0] = NULL;
5129 }
5130 instance->use_seqnum_jbod_fp = false;
5131 return;
5132 }
5133 }
5134
5135skip_alloc:
5136 if (!megasas_sync_pd_seq_num(instance, false) &&
5137 !megasas_sync_pd_seq_num(instance, true))
5138 instance->use_seqnum_jbod_fp = true;
5139 else
5140 instance->use_seqnum_jbod_fp = false;
5141}
5142
cd50ba8e
AR		 5143/**
5144 * megasas_init_fw - Initializes the FW
5145 * @instance: Adapter soft state
5146 *
5147 * This is the main function for initializing firmware
5148 */
5149
5150static int megasas_init_fw(struct megasas_instance *instance)
5151{
5152 u32 max_sectors_1;
15dd0381
S		 5153 u32 max_sectors_2, tmp_sectors, msix_enable;
5154 u32 scratch_pad_2, scratch_pad_3, scratch_pad_4;
11f8a7b3 5155 resource_size_t base_addr;
cd50ba8e 5156 struct megasas_register_set __iomem *reg_set;
51087a86 5157 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 5158 unsigned long bar_list;
fdd84e25 5159 int i, j, loop, fw_msix_count = 0;
229fe47c 5160 struct IOV_111 *iovPtr;
5a8cb85b 5161 struct fusion_context *fusion;
5162
5163 fusion = instance->ctrl_context;
cd50ba8e
AR		 5164
5165 /* Find first memory bar */
5166 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
51f9039f 5167 instance->bar = find_first_bit(&bar_list, BITS_PER_LONG);
e7f85168 5168 if (pci_request_selected_regions(instance->pdev, 1<<instance->bar,
cd50ba8e 5169 "megasas: LSI")) {
1be18254 5170 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 5171 return -EBUSY;
5172 }
5173
11f8a7b3
BC		 5174 base_addr = pci_resource_start(instance->pdev, instance->bar);
5175 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 5176
5177 if (!instance->reg_set) {
1be18254 5178 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 5179 goto fail_ioremap;
5180 }
5181
5182 reg_set = instance->reg_set;
5183
e7d36b88 5184 if (instance->adapter_type != MFI_SERIES)
9c915a8c 5185 instance->instancet = &megasas_instance_template_fusion;
9581ebeb
SC		 5186 else {
5187 switch (instance->pdev->device) {
5188 case PCI_DEVICE_ID_LSI_SAS1078R:
5189 case PCI_DEVICE_ID_LSI_SAS1078DE:
5190 instance->instancet = &megasas_instance_template_ppc;
5191 break;
5192 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5193 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5194 instance->instancet = &megasas_instance_template_gen2;
5195 break;
5196 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5197 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5198 instance->instancet = &megasas_instance_template_skinny;
5199 break;
5200 case PCI_DEVICE_ID_LSI_SAS1064R:
5201 case PCI_DEVICE_ID_DELL_PERC5:
5202 default:
5203 instance->instancet = &megasas_instance_template_xscale;
5204 instance->pd_list_not_supported = 1;
5205 break;
5206 }
cd50ba8e
AR		 5207 }
5208
6431f5d7
SS		 5209 if (megasas_transition_to_ready(instance, 0)) {
5210 atomic_set(&instance->fw_reset_no_pci_access, 1);
5211 instance->instancet->adp_reset
5212 (instance, instance->reg_set);
5213 atomic_set(&instance->fw_reset_no_pci_access, 0);
5214 dev_info(&instance->pdev->dev,
1be18254 5215 "FW restarted successfully from %s!\n",
6431f5d7
SS		 5216 __func__);
5217
5218 /*waitting for about 30 second before retry*/
5219 ssleep(30);
5220
5221 if (megasas_transition_to_ready(instance, 0))
5222 goto fail_ready_state;
5223 }
cd50ba8e 5224
e5d65b4b
S		 5225 megasas_init_ctrl_params(instance);
5226
107a60dd 5227 if (megasas_set_dma_mask(instance))
e5d65b4b
S		 5228 goto fail_ready_state;
5229
5230 if (megasas_alloc_ctrl_mem(instance))
5231 goto fail_alloc_dma_buf;
5232
5233 if (megasas_alloc_ctrl_dma_buffers(instance))
5234 goto fail_alloc_dma_buf;
5235
5236 fusion = instance->ctrl_context;
5237
f369a315 5238 if (instance->adapter_type == VENTURA_SERIES) {
d889344e
SC		 5239 scratch_pad_3 =
5240 readl(&instance->reg_set->outbound_scratch_pad_3);
d889344e
SC		 5241 instance->max_raid_mapsize = ((scratch_pad_3 >>
5242 MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
5243 MR_MAX_RAID_MAP_SIZE_MASK);
5244 }
d46a3ad6 5245
3f1abce4
AR		 5246 /* Check if MSI-X is supported while in ready state */
5247 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5248 0x4000000) >> 0x1a;
c8e858fe 5249 if (msix_enable && !msix_disable) {
fad119b7
HR		 5250 int irq_flags = PCI_IRQ_MSIX;
5251
d46a3ad6
SS		 5252 scratch_pad_2 = readl
5253 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5254 /* Check max MSI-X vectors */
5a8cb85b 5255 if (fusion) {
c365178f
S		 5256 if (instance->adapter_type == THUNDERBOLT_SERIES) {
5257 /* Thunderbolt Series*/
5a8cb85b 5258 instance->msix_vectors = (scratch_pad_2
5259 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5260 fw_msix_count = instance->msix_vectors;
5261 } else { /* Invader series supports more than 8 MSI-x vectors*/
5262 instance->msix_vectors = ((scratch_pad_2
5263 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5264 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
2493c67e
SC		 5265 if (instance->msix_vectors > 16)
5266 instance->msix_combined = true;
5267
179ac142
SS		 5268 if (rdpq_enable)
5269 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5270 1 : 0;
5a8cb85b 5271 fw_msix_count = instance->msix_vectors;
5272 /* Save 1-15 reply post index address to local memory
5273 * Index 0 is already saved from reg offset
5274 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5275 */
5276 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5277 instance->reply_post_host_index_addr[loop] =
5278 (u32 __iomem *)
5279 ((u8 __iomem *)instance->reg_set +
5280 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5281 + (loop * 0x10));
5282 }
d46a3ad6
SS		 5283 }
5284 if (msix_vectors)
5285 instance->msix_vectors = min(msix_vectors,
5286 instance->msix_vectors);
5a8cb85b 5287 } else /* MFI adapters */
c8e858fe
AR		 5288 instance->msix_vectors = 1;
5289 /* Don't bother allocating more MSI-X vectors than cpus */
5290 instance->msix_vectors = min(instance->msix_vectors,
5291 (unsigned int)num_online_cpus());
fad119b7
HR		 5292 if (smp_affinity_enable)
5293 irq_flags |= PCI_IRQ_AFFINITY;
5294 i = pci_alloc_irq_vectors(instance->pdev, 1,
5295 instance->msix_vectors, irq_flags);
c12de882 5296 if (i > 0)
8ae80ed1
AG		 5297 instance->msix_vectors = i;
5298 else
c8e858fe
AR		 5299 instance->msix_vectors = 0;
5300 }
2493c67e
SC		 5301 /*
5302 * MSI-X host index 0 is common for all adapter.
5303 * It is used for all MPT based Adapters.
5304 */
5305 if (instance->msix_combined) {
5306 instance->reply_post_host_index_addr[0] =
5307 (u32 *)((u8 *)instance->reg_set +
5308 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET);
5309 } else {
5310 instance->reply_post_host_index_addr[0] =
5311 (u32 *)((u8 *)instance->reg_set +
5312 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5313 }
5314
64ff64b9
S		 5315 if (!instance->msix_vectors) {
5316 i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
5317 if (i < 0)
5318 goto fail_setup_irqs;
5319 }
3f1abce4 5320
258c3af2
TH		 5321 dev_info(&instance->pdev->dev,
5322 "firmware supports msix\t: (%d)", fw_msix_count);
5323 dev_info(&instance->pdev->dev,
5324 "current msix/online cpus\t: (%d/%d)\n",
5325 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS		 5326 dev_info(&instance->pdev->dev,
5327 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5328
91626c27 5329 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5330 (unsigned long)instance);
5331
51087a86
SS		 5332 /*
5333 * Below are default value for legacy Firmware.
5334 * non-fusion based controllers
5335 */
5336 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5337 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 5338 /* Get operational params, sge flags, send init cmd to controller */
5339 if (instance->instancet->init_adapter(instance))
eb1b1237 5340 goto fail_init_adapter;
cd50ba8e 5341
f369a315 5342 if (instance->adapter_type == VENTURA_SERIES) {
15dd0381
S		 5343 scratch_pad_4 =
5344 readl(&instance->reg_set->outbound_scratch_pad_4);
5345 if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
5346 MR_DEFAULT_NVME_PAGE_SHIFT)
5347 instance->nvme_page_size =
5348 (1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK));
5349
5350 dev_info(&instance->pdev->dev,
5351 "NVME page size\t: (%d)\n", instance->nvme_page_size);
5352 }
5353
18103efc
TH		 5354 if (instance->msix_vectors ?
5355 megasas_setup_irqs_msix(instance, 1) :
5356 megasas_setup_irqs_ioapic(instance))
5357 goto fail_init_adapter;
258c3af2 5358
d3557fc8 5359 instance->instancet->enable_intr(instance);
cd50ba8e 5360
13f30771 5361 dev_info(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5362
3761cb4c 5363 megasas_setup_jbod_map(instance);
5364
39a98554 5365 /** for passthrough
da0dc9fb
BH		 5366 * the following function will get the PD LIST.
5367 */
5368 memset(instance->pd_list, 0,
81e403ce 5369 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5370 if (megasas_get_pd_list(instance) < 0) {
1be18254 5371 dev_err(&instance->pdev->dev, "failed to get PD list\n");
72bff2d1 5372 goto fail_get_ld_pd_list;
58968fc8 5373 }
81e403ce 5374
bdc6fb8d 5375 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
fdd84e25
SC		 5376
5377 /* stream detection initialization */
f369a315 5378 if (instance->adapter_type == VENTURA_SERIES) {
fdd84e25 5379 fusion->stream_detect_by_ld =
41064f1b
S		 5380 kzalloc(sizeof(struct LD_STREAM_DETECT *)
5381 * MAX_LOGICAL_DRIVES_EXT,
5382 GFP_KERNEL);
fdd84e25
SC		 5383 if (!fusion->stream_detect_by_ld) {
5384 dev_err(&instance->pdev->dev,
41064f1b 5385 "unable to allocate stream detection for pool of LDs\n");
fdd84e25
SC		 5386 goto fail_get_ld_pd_list;
5387 }
5388 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) {
5389 fusion->stream_detect_by_ld[i] =
e05ee4e9 5390 kzalloc(sizeof(struct LD_STREAM_DETECT),
fdd84e25
SC		 5391 GFP_KERNEL);
5392 if (!fusion->stream_detect_by_ld[i]) {
5393 dev_err(&instance->pdev->dev,
5394 "unable to allocate stream detect by LD\n ");
5395 for (j = 0; j < i; ++j)
5396 kfree(fusion->stream_detect_by_ld[j]);
5397 kfree(fusion->stream_detect_by_ld);
5398 fusion->stream_detect_by_ld = NULL;
5399 goto fail_get_ld_pd_list;
5400 }
5401 fusion->stream_detect_by_ld[i]->mru_bit_map
5402 = MR_STREAM_BITMAP;
5403 }
5404 }
5405
21c9e160
AR		 5406 if (megasas_ld_list_query(instance,
5407 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
72bff2d1 5408 goto fail_get_ld_pd_list;
bdc6fb8d 5409
c4a3e0a5
BS		 5410 /*
5411 * Compute the max allowed sectors per IO: The controller info has two
5412 * limits on max sectors. Driver should use the minimum of these two.
5413 *
5414 * 1 << stripe_sz_ops.min = max sectors per strip
5415 *
5416 * Note that older firmwares ( < FW ver 30) didn't report information
5417 * to calculate max_sectors_1. So the number ended up as zero always.
5418 */
14faea9f 5419 tmp_sectors = 0;
9ad18a9c 5420 ctrl_info = instance->ctrl_info_buf;
c4a3e0a5 5421
51087a86
SS		 5422 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5423 le16_to_cpu(ctrl_info->max_strips_per_io);
5424 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5425
da0dc9fb 5426 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5427
8f67c8c5
SS		 5428 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5429 instance->passive = ctrl_info->cluster.passive;
5430 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS		 5431 instance->UnevenSpanSupport =
5432 ctrl_info->adapterOperations2.supportUnevenSpans;
5433 if (instance->UnevenSpanSupport) {
5434 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 5435 if (MR_ValidateMapInfo(instance))
5436 fusion->fast_path_io = 1;
5437 else
5438 fusion->fast_path_io = 0;
fc62b3fc 5439
51087a86
SS		 5440 }
5441 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5442 instance->requestorId = ctrl_info->iov.requestorId;
5443 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5444 if (!ctrl_info->adapterOperations2.activePassive)
5445 instance->PlasmaFW111 = 1;
5446
5447 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5448 instance->PlasmaFW111 ? "1.11" : "new");
5449
5450 if (instance->PlasmaFW111) {
5451 iovPtr = (struct IOV_111 *)
5452 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5453 instance->requestorId = iovPtr->requestorId;
5454 }
fc62b3fc 5455 }
92bb6505 5456 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5457 instance->requestorId);
51087a86
SS		 5458 }
5459
51087a86
SS		 5460 instance->crash_dump_fw_support =
5461 ctrl_info->adapterOperations3.supportCrashDump;
5462 instance->crash_dump_drv_support =
5463 (instance->crash_dump_fw_support &&
5464 instance->crash_dump_buf);
d88da09a 5465 if (instance->crash_dump_drv_support)
51087a86
SS		 5466 megasas_set_crash_dump_params(instance,
5467 MR_CRASH_BUF_TURN_OFF);
5468
d88da09a 5469 else {
51087a86
SS		 5470 if (instance->crash_dump_buf)
5471 pci_free_consistent(instance->pdev,
5472 CRASH_DMA_BUF_SIZE,
5473 instance->crash_dump_buf,
5474 instance->crash_dump_h);
5475 instance->crash_dump_buf = NULL;
14faea9f 5476 }
7497cde8 5477
d88da09a
SS		 5478
5479 dev_info(&instance->pdev->dev,
5480 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5481 le16_to_cpu(ctrl_info->pci.vendor_id),
5482 le16_to_cpu(ctrl_info->pci.device_id),
5483 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5484 le16_to_cpu(ctrl_info->pci.sub_device_id));
5485 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5486 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS		 5487 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5488 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5489 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5490 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 5491
5492
14faea9f 5493 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5494 SGE_BUFFER_SIZE / 512;
14faea9f 5495 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5496 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5497
ae09a6c1
SS		 5498 /* Check for valid throttlequeuedepth module parameter */
5499 if (throttlequeuedepth &&
5500 throttlequeuedepth <= instance->max_scsi_cmds)
5501 instance->throttlequeuedepth = throttlequeuedepth;
5502 else
5503 instance->throttlequeuedepth =
5504 MEGASAS_THROTTLE_QUEUE_DEPTH;
5505
e636a7a4
S		 5506 if ((resetwaittime < 1) ||
5507 (resetwaittime > MEGASAS_RESET_WAIT_TIME))
e3d178ca
SS		 5508 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5509
5510 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5511 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5512
229fe47c
AR		 5513 /* Launch SR-IOV heartbeat timer */
5514 if (instance->requestorId) {
5515 if (!megasas_sriov_start_heartbeat(instance, 1))
c251a7be 5516 megasas_start_timer(instance);
229fe47c
AR		 5517 else
5518 instance->skip_heartbeat_timer_del = 1;
5519 }
5520
c4a3e0a5
BS		 5521 return 0;
5522
fdd84e25
SC		 5523fail_get_ld_pd_list:
5524 instance->instancet->disable_intr(instance);
18103efc 5525fail_init_adapter:
fad119b7
HR		 5526 megasas_destroy_irqs(instance);
5527fail_setup_irqs:
d3557fc8 5528 if (instance->msix_vectors)
fad119b7 5529 pci_free_irq_vectors(instance->pdev);
d3557fc8 5530 instance->msix_vectors = 0;
e5d65b4b
S		 5531fail_alloc_dma_buf:
5532 megasas_free_ctrl_dma_buffers(instance);
5533 megasas_free_ctrl_mem(instance);
cd50ba8e 5534fail_ready_state:
c4a3e0a5
BS		 5535 iounmap(instance->reg_set);
5536
72bff2d1 5537fail_ioremap:
e7f85168 5538 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5 5539
72bff2d1
S		 5540 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
5541 __func__, __LINE__);
c4a3e0a5
BS		 5542 return -EINVAL;
5543}
5544
5545/**
5546 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5547 * @instance: Adapter soft state
c4a3e0a5
BS		 5548 */
5549static void megasas_release_mfi(struct megasas_instance *instance)
5550{
9c915a8c 5551 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5552
9c915a8c
AR		 5553 if (instance->reply_queue)
5554 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 5555 instance->reply_queue, instance->reply_queue_h);
5556
5557 megasas_free_cmds(instance);
5558
5559 iounmap(instance->reg_set);
5560
e7f85168 5561 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5
BS		 5562}
5563
5564/**
5565 * megasas_get_seq_num - Gets latest event sequence numbers
5566 * @instance: Adapter soft state
5567 * @eli: FW event log sequence numbers information
5568 *
5569 * FW maintains a log of all events in a non-volatile area. Upper layers would
5570 * usually find out the latest sequence number of the events, the seq number at
5571 * the boot etc. They would "read" all the events below the latest seq number
5572 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5573 * number), they would subsribe to AEN (asynchronous event notification) and
5574 * wait for the events to happen.
5575 */
5576static int
5577megasas_get_seq_num(struct megasas_instance *instance,
5578 struct megasas_evt_log_info *eli)
5579{
5580 struct megasas_cmd *cmd;
5581 struct megasas_dcmd_frame *dcmd;
5582 struct megasas_evt_log_info *el_info;
5583 dma_addr_t el_info_h = 0;
b051cc66 5584 int ret;
c4a3e0a5
BS		 5585
5586 cmd = megasas_get_cmd(instance);
5587
5588 if (!cmd) {
5589 return -ENOMEM;
5590 }
5591
5592 dcmd = &cmd->frame->dcmd;
5593 el_info = pci_alloc_consistent(instance->pdev,
5594 sizeof(struct megasas_evt_log_info),
5595 &el_info_h);
5596
5597 if (!el_info) {
5598 megasas_return_cmd(instance, cmd);
5599 return -ENOMEM;
5600 }
5601
5602 memset(el_info, 0, sizeof(*el_info));
5603 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5604
5605 dcmd->cmd = MFI_CMD_DCMD;
5606 dcmd->cmd_status = 0x0;
5607 dcmd->sge_count = 1;
107a60dd 5608 dcmd->flags = MFI_FRAME_DIR_READ;
c4a3e0a5 5609 dcmd->timeout = 0;
780a3762 5610 dcmd->pad_0 = 0;
94cd65dd
SS		 5611 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5612 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
107a60dd
S		 5613
5614 megasas_set_dma_settings(instance, dcmd, el_info_h,
5615 sizeof(struct megasas_evt_log_info));
c4a3e0a5 5616
b051cc66
S		 5617 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
5618 if (ret != DCMD_SUCCESS) {
5619 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
5620 __func__, __LINE__);
5621 goto dcmd_failed;
5622 }
5623
5624 /*
5625 * Copy the data back into callers buffer
5626 */
5627 eli->newest_seq_num = el_info->newest_seq_num;
5628 eli->oldest_seq_num = el_info->oldest_seq_num;
5629 eli->clear_seq_num = el_info->clear_seq_num;
5630 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5631 eli->boot_seq_num = el_info->boot_seq_num;
c4a3e0a5 5632
b051cc66 5633dcmd_failed:
c4a3e0a5
BS		 5634 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5635 el_info, el_info_h);
5636
4026e9aa 5637 megasas_return_cmd(instance, cmd);
c4a3e0a5 5638
b051cc66 5639 return ret;
c4a3e0a5
BS		 5640}
5641
5642/**
5643 * megasas_register_aen - Registers for asynchronous event notification
5644 * @instance: Adapter soft state
5645 * @seq_num: The starting sequence number
5646 * @class_locale: Class of the event
5647 *
5648 * This function subscribes for AEN for events beyond the @seq_num. It requests
5649 * to be notified if and only if the event is of type @class_locale
5650 */
5651static int
5652megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5653 u32 class_locale_word)
5654{
5655 int ret_val;
5656 struct megasas_cmd *cmd;
5657 struct megasas_dcmd_frame *dcmd;
5658 union megasas_evt_class_locale curr_aen;
5659 union megasas_evt_class_locale prev_aen;
5660
5661 /*
5662 * If there an AEN pending already (aen_cmd), check if the
5663 * class_locale of that pending AEN is inclusive of the new
5664 * AEN request we currently have. If it is, then we don't have
5665 * to do anything. In other words, whichever events the current
5666 * AEN request is subscribing to, have already been subscribed
5667 * to.
5668 *
5669 * If the old_cmd is _not_ inclusive, then we have to abort
5670 * that command, form a class_locale that is superset of both
5671 * old and current and re-issue to the FW
5672 */
5673
5674 curr_aen.word = class_locale_word;
5675
5676 if (instance->aen_cmd) {
5677
a9555534
CH		 5678 prev_aen.word =
5679 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5 5680
91b3d9f0
S		 5681 if ((curr_aen.members.class < MFI_EVT_CLASS_DEBUG) ||
5682 (curr_aen.members.class > MFI_EVT_CLASS_DEAD)) {
5683 dev_info(&instance->pdev->dev,
5684 "%s %d out of range class %d send by application\n",
5685 __func__, __LINE__, curr_aen.members.class);
5686 return 0;
5687 }
5688
c4a3e0a5
BS		 5689 /*
5690 * A class whose enum value is smaller is inclusive of all
5691 * higher values. If a PROGRESS (= -1) was previously
5692 * registered, then a new registration requests for higher
5693 * classes need not be sent to FW. They are automatically
5694 * included.
5695 *
5696 * Locale numbers don't have such hierarchy. They are bitmap
5697 * values
5698 */
5699 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5700 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5701 curr_aen.members.locale)) {
5702 /*
5703 * Previously issued event registration includes
5704 * current request. Nothing to do.
5705 */
5706 return 0;
5707 } else {
3993a862 5708 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5709
5710 if (prev_aen.members.class < curr_aen.members.class)
5711 curr_aen.members.class = prev_aen.members.class;
5712
5713 instance->aen_cmd->abort_aen = 1;
5714 ret_val = megasas_issue_blocked_abort_cmd(instance,
5715 instance->
cfbe7554 5716 aen_cmd, 30);
c4a3e0a5
BS		 5717
5718 if (ret_val) {
1be18254 5719 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5720 "previous AEN command\n");
5721 return ret_val;
5722 }
5723 }
5724 }
5725
5726 cmd = megasas_get_cmd(instance);
5727
5728 if (!cmd)
5729 return -ENOMEM;
5730
5731 dcmd = &cmd->frame->dcmd;
5732
5733 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5734
5735 /*
5736 * Prepare DCMD for aen registration
5737 */
5738 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5739
5740 dcmd->cmd = MFI_CMD_DCMD;
5741 dcmd->cmd_status = 0x0;
5742 dcmd->sge_count = 1;
107a60dd 5743 dcmd->flags = MFI_FRAME_DIR_READ;
c4a3e0a5 5744 dcmd->timeout = 0;
780a3762 5745 dcmd->pad_0 = 0;
94cd65dd
SS		 5746 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5747 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5748 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5749 instance->last_seq_num = seq_num;
94cd65dd 5750 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
107a60dd
S		 5751
5752 megasas_set_dma_settings(instance, dcmd, instance->evt_detail_h,
5753 sizeof(struct megasas_evt_detail));
c4a3e0a5 5754
f4c9a131
YB		 5755 if (instance->aen_cmd != NULL) {
5756 megasas_return_cmd(instance, cmd);
5757 return 0;
5758 }
5759
c4a3e0a5
BS		 5760 /*
5761 * Store reference to the cmd used to register for AEN. When an
5762 * application wants us to register for AEN, we have to abort this
5763 * cmd and re-register with a new EVENT LOCALE supplied by that app
5764 */
5765 instance->aen_cmd = cmd;
5766
5767 /*
5768 * Issue the aen registration frame
5769 */
9c915a8c 5770 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5771
5772 return 0;
5773}
5774
96188a89
S		 5775/* megasas_get_target_prop - Send DCMD with below details to firmware.
5776 *
5777 * This DCMD will fetch few properties of LD/system PD defined
5778 * in MR_TARGET_DEV_PROPERTIES. eg. Queue Depth, MDTS value.
5779 *
5780 * DCMD send by drivers whenever new target is added to the OS.
5781 *
5782 * dcmd.opcode - MR_DCMD_DEV_GET_TARGET_PROP
5783 * dcmd.mbox.b[0] - DCMD is to be fired for LD or system PD.
5784 * 0 = system PD, 1 = LD.
5785 * dcmd.mbox.s[1] - TargetID for LD/system PD.
5786 * dcmd.sge IN - Pointer to return MR_TARGET_DEV_PROPERTIES.
5787 *
5788 * @instance: Adapter soft state
5789 * @sdev: OS provided scsi device
5790 *
5791 * Returns 0 on success non-zero on failure.
5792 */
5793static int
5794megasas_get_target_prop(struct megasas_instance *instance,
5795 struct scsi_device *sdev)
5796{
5797 int ret;
5798 struct megasas_cmd *cmd;
5799 struct megasas_dcmd_frame *dcmd;
5800 u16 targetId = (sdev->channel % 2) + sdev->id;
5801
5802 cmd = megasas_get_cmd(instance);
5803
5804 if (!cmd) {
5805 dev_err(&instance->pdev->dev,
5806 "Failed to get cmd %s\n", __func__);
5807 return -ENOMEM;
5808 }
5809
5810 dcmd = &cmd->frame->dcmd;
5811
5812 memset(instance->tgt_prop, 0, sizeof(*instance->tgt_prop));
5813 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5814 dcmd->mbox.b[0] = MEGASAS_IS_LOGICAL(sdev);
5815
5816 dcmd->mbox.s[1] = cpu_to_le16(targetId);
5817 dcmd->cmd = MFI_CMD_DCMD;
5818 dcmd->cmd_status = 0xFF;
5819 dcmd->sge_count = 1;
107a60dd 5820 dcmd->flags = MFI_FRAME_DIR_READ;
96188a89
S		 5821 dcmd->timeout = 0;
5822 dcmd->pad_0 = 0;
5823 dcmd->data_xfer_len =
5824 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5825 dcmd->opcode = cpu_to_le32(MR_DCMD_DRV_GET_TARGET_PROP);
96188a89 5826
107a60dd
S		 5827 megasas_set_dma_settings(instance, dcmd, instance->tgt_prop_h,
5828 sizeof(struct MR_TARGET_PROPERTIES));
96188a89 5829
e7d36b88
S		 5830 if ((instance->adapter_type != MFI_SERIES) &&
5831 !instance->mask_interrupts)
96188a89
S		 5832 ret = megasas_issue_blocked_cmd(instance,
5833 cmd, MFI_IO_TIMEOUT_SECS);
5834 else
5835 ret = megasas_issue_polled(instance, cmd);
5836
5837 switch (ret) {
5838 case DCMD_TIMEOUT:
5839 switch (dcmd_timeout_ocr_possible(instance)) {
5840 case INITIATE_OCR:
5841 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
5842 megasas_reset_fusion(instance->host,
5843 MFI_IO_TIMEOUT_OCR);
5844 break;
5845 case KILL_ADAPTER:
5846 megaraid_sas_kill_hba(instance);
5847 break;
5848 case IGNORE_TIMEOUT:
5849 dev_info(&instance->pdev->dev,
5850 "Ignore DCMD timeout: %s %d\n",
5851 __func__, __LINE__);
5852 break;
5853 }
5854 break;
5855
5856 default:
5857 megasas_return_cmd(instance, cmd);
5858 }
5859 if (ret != DCMD_SUCCESS)
5860 dev_err(&instance->pdev->dev,
5861 "return from %s %d return value %d\n",
5862 __func__, __LINE__, ret);
5863
5864 return ret;
5865}
5866
c4a3e0a5
BS		 5867/**
5868 * megasas_start_aen - Subscribes to AEN during driver load time
5869 * @instance: Adapter soft state
5870 */
5871static int megasas_start_aen(struct megasas_instance *instance)
5872{
5873 struct megasas_evt_log_info eli;
5874 union megasas_evt_class_locale class_locale;
5875
5876 /*
5877 * Get the latest sequence number from FW
5878 */
5879 memset(&eli, 0, sizeof(eli));
5880
5881 if (megasas_get_seq_num(instance, &eli))
5882 return -1;
5883
5884 /*
5885 * Register AEN with FW for latest sequence number plus 1
5886 */
5887 class_locale.members.reserved = 0;
5888 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5889 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5890
94cd65dd 5891 return megasas_register_aen(instance,
48100b0e 5892 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5893 class_locale.word);
c4a3e0a5
BS		 5894}
5895
5896/**
5897 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5898 * @instance: Adapter soft state
5899 */
5900static int megasas_io_attach(struct megasas_instance *instance)
5901{
5902 struct Scsi_Host *host = instance->host;
5903
5904 /*
5905 * Export parameters required by SCSI mid-layer
5906 */
c4a3e0a5 5907 host->unique_id = instance->unique_id;
ae09a6c1 5908 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5909 host->this_id = instance->init_id;
5910 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5911
5912 if (instance->fw_support_ieee)
5913 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5914
1fd10685
YB		 5915 /*
5916 * Check if the module parameter value for max_sectors can be used
5917 */
5918 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5919 instance->max_sectors_per_req = max_sectors;
5920 else {
5921 if (max_sectors) {
5922 if (((instance->pdev->device ==
5923 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5924 (instance->pdev->device ==
5925 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5926 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5927 instance->max_sectors_per_req = max_sectors;
5928 } else {
1be18254 5929 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5930 "and <= %d (or < 1MB for GEN2 controller)\n",
5931 instance->max_sectors_per_req);
5932 }
5933 }
5934 }
5935
c4a3e0a5 5936 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5937 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5938 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5939 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5940 host->max_lun = MEGASAS_MAX_LUN;
122da302 5941 host->max_cmd_len = 16;
c4a3e0a5
BS		 5942
5943 /*
5944 * Notify the mid-layer about the new controller
5945 */
5946 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5947 dev_err(&instance->pdev->dev,
5948 "Failed to add host from %s %d\n",
5949 __func__, __LINE__);
c4a3e0a5
BS		 5950 return -ENODEV;
5951 }
5952
c4a3e0a5
BS		 5953 return 0;
5954}
5955
107a60dd
S		 5956/**
5957 * megasas_set_dma_mask - Set DMA mask for supported controllers
5958 *
5959 * @instance: Adapter soft state
5960 * Description:
5961 *
5962 * For Ventura, driver/FW will operate in 64bit DMA addresses.
5963 *
5964 * For invader-
5965 * By default, driver/FW will operate in 32bit DMA addresses
5966 * for consistent DMA mapping but if 32 bit consistent
5967 * DMA mask fails, driver will try with 64 bit consistent
5968 * mask provided FW is true 64bit DMA capable
5969 *
5970 * For older controllers(Thunderbolt and MFI based adapters)-
5971 * driver/FW will operate in 32 bit consistent DMA addresses.
5972 */
31ea7088 5973static int
107a60dd 5974megasas_set_dma_mask(struct megasas_instance *instance)
31ea7088 5975{
107a60dd
S		 5976 u64 consistent_mask;
5977 struct pci_dev *pdev;
5978 u32 scratch_pad_2;
5979
5980 pdev = instance->pdev;
5981 consistent_mask = (instance->adapter_type == VENTURA_SERIES) ?
5982 DMA_BIT_MASK(64) : DMA_BIT_MASK(32);
5983
31ea7088 5984 if (IS_DMA64) {
107a60dd
S		 5985 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
5986 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
5987 goto fail_set_dma_mask;
5988
5989 if ((*pdev->dev.dma_mask == DMA_BIT_MASK(64)) &&
5990 (dma_set_coherent_mask(&pdev->dev, consistent_mask) &&
5991 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) {
5992 /*
5993 * If 32 bit DMA mask fails, then try for 64 bit mask
5994 * for FW capable of handling 64 bit DMA.
5995 */
5996 scratch_pad_2 = readl
5997 (&instance->reg_set->outbound_scratch_pad_2);
31ea7088 5998
107a60dd
S		 5999 if (!(scratch_pad_2 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET))
6000 goto fail_set_dma_mask;
6001 else if (dma_set_mask_and_coherent(&pdev->dev,
6002 DMA_BIT_MASK(64)))
31ea7088 6003 goto fail_set_dma_mask;
6004 }
107a60dd
S		 6005 } else if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
6006 goto fail_set_dma_mask;
6007
6008 if (pdev->dev.coherent_dma_mask == DMA_BIT_MASK(32))
6009 instance->consistent_mask_64bit = false;
6010 else
6011 instance->consistent_mask_64bit = true;
6012
6013 dev_info(&pdev->dev, "%s bit DMA mask and %s bit consistent mask\n",
6014 ((*pdev->dev.dma_mask == DMA_BIT_MASK(64)) ? "64" : "32"),
6015 (instance->consistent_mask_64bit ? "64" : "32"));
94cd65dd 6016
31ea7088 6017 return 0;
6018
6019fail_set_dma_mask:
107a60dd
S		 6020 dev_err(&pdev->dev, "Failed to set DMA mask\n");
6021 return -1;
6022
31ea7088 6023}
6024
c365178f
S		 6025/*
6026 * megasas_set_adapter_type - Set adapter type.
6027 * Supported controllers can be divided in
6028 * 4 categories- enum MR_ADAPTER_TYPE {
6029 * MFI_SERIES = 1,
6030 * THUNDERBOLT_SERIES = 2,
6031 * INVADER_SERIES = 3,
6032 * VENTURA_SERIES = 4,
6033 * };
6034 * @instance: Adapter soft state
6035 * return: void
c4a3e0a5 6036 */
c365178f 6037static inline void megasas_set_adapter_type(struct megasas_instance *instance)
c4a3e0a5 6038{
754f1bae
S		 6039 if ((instance->pdev->vendor == PCI_VENDOR_ID_DELL) &&
6040 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5)) {
c365178f 6041 instance->adapter_type = MFI_SERIES;
754f1bae
S		 6042 } else {
6043 switch (instance->pdev->device) {
6044 case PCI_DEVICE_ID_LSI_VENTURA:
6045 case PCI_DEVICE_ID_LSI_CRUSADER:
6046 case PCI_DEVICE_ID_LSI_HARPOON:
6047 case PCI_DEVICE_ID_LSI_TOMCAT:
6048 case PCI_DEVICE_ID_LSI_VENTURA_4PORT:
6049 case PCI_DEVICE_ID_LSI_CRUSADER_4PORT:
6050 instance->adapter_type = VENTURA_SERIES;
6051 break;
6052 case PCI_DEVICE_ID_LSI_FUSION:
6053 case PCI_DEVICE_ID_LSI_PLASMA:
6054 instance->adapter_type = THUNDERBOLT_SERIES;
6055 break;
6056 case PCI_DEVICE_ID_LSI_INVADER:
6057 case PCI_DEVICE_ID_LSI_INTRUDER:
6058 case PCI_DEVICE_ID_LSI_INTRUDER_24:
6059 case PCI_DEVICE_ID_LSI_CUTLASS_52:
6060 case PCI_DEVICE_ID_LSI_CUTLASS_53:
6061 case PCI_DEVICE_ID_LSI_FURY:
6062 instance->adapter_type = INVADER_SERIES;
6063 break;
6064 default: /* For all other supported controllers */
6065 instance->adapter_type = MFI_SERIES;
6066 break;
66192dfe
AR		 6067 }
6068 }
c365178f 6069}
c4a3e0a5 6070
49a7a4ad
S		 6071static inline int megasas_alloc_mfi_ctrl_mem(struct megasas_instance *instance)
6072{
6073 instance->producer = pci_alloc_consistent(instance->pdev, sizeof(u32),
6074 &instance->producer_h);
6075 instance->consumer = pci_alloc_consistent(instance->pdev, sizeof(u32),
6076 &instance->consumer_h);
c4a3e0a5 6077
49a7a4ad
S		 6078 if (!instance->producer || !instance->consumer) {
6079 dev_err(&instance->pdev->dev,
6080 "Failed to allocate memory for producer, consumer\n");
6081 return -1;
c4a3e0a5
BS		 6082 }
6083
49a7a4ad
S		 6084 *instance->producer = 0;
6085 *instance->consumer = 0;
6086 return 0;
6087}
c4a3e0a5 6088
49a7a4ad
S		 6089/**
6090 * megasas_alloc_ctrl_mem - Allocate per controller memory for core data
6091 * structures which are not common across MFI
6092 * adapters and fusion adapters.
6093 * For MFI based adapters, allocate producer and
6094 * consumer buffers. For fusion adapters, allocate
6095 * memory for fusion context.
6096 * @instance: Adapter soft state
6097 * return: 0 for SUCCESS
6098 */
6099static int megasas_alloc_ctrl_mem(struct megasas_instance *instance)
6100{
6101 switch (instance->adapter_type) {
6102 case MFI_SERIES:
6103 if (megasas_alloc_mfi_ctrl_mem(instance))
6104 return -ENOMEM;
6105 break;
6106 case VENTURA_SERIES:
6107 case THUNDERBOLT_SERIES:
6108 case INVADER_SERIES:
6109 if (megasas_alloc_fusion_context(instance))
6110 return -ENOMEM;
6111 break;
6112 }
c4a3e0a5 6113
49a7a4ad
S		 6114 return 0;
6115}
c4a3e0a5 6116
49a7a4ad
S		 6117/*
6118 * megasas_free_ctrl_mem - Free fusion context for fusion adapters and
6119 * producer, consumer buffers for MFI adapters
6120 *
6121 * @instance - Adapter soft instance
6122 *
6123 */
6124static inline void megasas_free_ctrl_mem(struct megasas_instance *instance)
6125{
6126 if (instance->adapter_type == MFI_SERIES) {
6127 if (instance->producer)
6128 pci_free_consistent(instance->pdev, sizeof(u32),
6129 instance->producer,
6130 instance->producer_h);
6131 if (instance->consumer)
6132 pci_free_consistent(instance->pdev, sizeof(u32),
6133 instance->consumer,
6134 instance->consumer_h);
6135 } else {
6136 megasas_free_fusion_context(instance);
c4a3e0a5 6137 }
49a7a4ad 6138}
c4a3e0a5 6139
1b4bed20
S		 6140/**
6141 * megasas_alloc_ctrl_dma_buffers - Allocate consistent DMA buffers during
6142 * driver load time
6143 *
6144 * @instance- Adapter soft instance
6145 * @return- O for SUCCESS
6146 */
6147static inline
6148int megasas_alloc_ctrl_dma_buffers(struct megasas_instance *instance)
6149{
6150 struct pci_dev *pdev = instance->pdev;
9b3d028f 6151 struct fusion_context *fusion = instance->ctrl_context;
c4a3e0a5 6152
1b4bed20
S		 6153 instance->evt_detail =
6154 pci_alloc_consistent(pdev,
6155 sizeof(struct megasas_evt_detail),
6156 &instance->evt_detail_h);
5fc499b6 6157
1b4bed20
S		 6158 if (!instance->evt_detail) {
6159 dev_err(&instance->pdev->dev,
6160 "Failed to allocate event detail buffer\n");
6161 return -ENOMEM;
6162 }
6163
9b3d028f
S		 6164 if (fusion) {
6165 fusion->ioc_init_request =
6166 dma_alloc_coherent(&pdev->dev,
6167 sizeof(struct MPI2_IOC_INIT_REQUEST),
6168 &fusion->ioc_init_request_phys,
6169 GFP_KERNEL);
6170
6171 if (!fusion->ioc_init_request) {
6172 dev_err(&pdev->dev,
6173 "Failed to allocate PD list buffer\n");
6174 return -ENOMEM;
9c915a8c 6175 }
9b3d028f 6176 }
c4a3e0a5 6177
9b3d028f
S		 6178 instance->pd_list_buf =
6179 pci_alloc_consistent(pdev,
6180 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
6181 &instance->pd_list_buf_h);
6182
6183 if (!instance->pd_list_buf) {
6184 dev_err(&pdev->dev, "Failed to allocate PD list buffer\n");
6185 return -ENOMEM;
c4a3e0a5
BS		 6186 }
6187
9b3d028f
S		 6188 instance->ctrl_info_buf =
6189 pci_alloc_consistent(pdev,
6190 sizeof(struct megasas_ctrl_info),
6191 &instance->ctrl_info_buf_h);
fc62b3fc 6192
9b3d028f
S		 6193 if (!instance->ctrl_info_buf) {
6194 dev_err(&pdev->dev,
6195 "Failed to allocate controller info buffer\n");
6196 return -ENOMEM;
6197 }
c4a3e0a5 6198
9b3d028f
S		 6199 instance->ld_list_buf =
6200 pci_alloc_consistent(pdev,
6201 sizeof(struct MR_LD_LIST),
6202 &instance->ld_list_buf_h);
c4a3e0a5 6203
9b3d028f
S		 6204 if (!instance->ld_list_buf) {
6205 dev_err(&pdev->dev, "Failed to allocate LD list buffer\n");
6206 return -ENOMEM;
6207 }
6208
6209 instance->ld_targetid_list_buf =
6210 pci_alloc_consistent(pdev,
6211 sizeof(struct MR_LD_TARGETID_LIST),
6212 &instance->ld_targetid_list_buf_h);
6213
6214 if (!instance->ld_targetid_list_buf) {
6215 dev_err(&pdev->dev,
6216 "Failed to allocate LD targetid list buffer\n");
6217 return -ENOMEM;
c4a3e0a5
BS		 6218 }
6219
c3e385a1 6220 if (!reset_devices) {
1b4bed20
S		 6221 instance->system_info_buf =
6222 pci_alloc_consistent(pdev,
6223 sizeof(struct MR_DRV_SYSTEM_INFO),
6224 &instance->system_info_h);
6225 instance->pd_info =
6226 pci_alloc_consistent(pdev,
6227 sizeof(struct MR_PD_INFO),
6228 &instance->pd_info_h);
6229 instance->tgt_prop =
6230 pci_alloc_consistent(pdev,
6231 sizeof(struct MR_TARGET_PROPERTIES),
6232 &instance->tgt_prop_h);
6233 instance->crash_dump_buf =
6234 pci_alloc_consistent(pdev,
6235 CRASH_DMA_BUF_SIZE,
6236 &instance->crash_dump_h);
c3e385a1 6237
1b4bed20
S		 6238 if (!instance->system_info_buf)
6239 dev_err(&instance->pdev->dev,
6240 "Failed to allocate system info buffer\n");
2216c305 6241
c3e385a1 6242 if (!instance->pd_info)
1b4bed20
S		 6243 dev_err(&instance->pdev->dev,
6244 "Failed to allocate pd_info buffer\n");
3b8328e2 6245
96188a89 6246 if (!instance->tgt_prop)
1b4bed20
S		 6247 dev_err(&instance->pdev->dev,
6248 "Failed to allocate tgt_prop buffer\n");
96188a89 6249
c3e385a1 6250 if (!instance->crash_dump_buf)
1b4bed20
S		 6251 dev_err(&instance->pdev->dev,
6252 "Failed to allocate crash dump buffer\n");
c3e385a1 6253 }
2216c305 6254
1b4bed20
S		 6255 return 0;
6256}
6257
6258/*
6259 * megasas_free_ctrl_dma_buffers - Free consistent DMA buffers allocated
6260 * during driver load time
6261 *
6262 * @instance- Adapter soft instance
6263 *
6264 */
6265static inline
6266void megasas_free_ctrl_dma_buffers(struct megasas_instance *instance)
6267{
6268 struct pci_dev *pdev = instance->pdev;
9b3d028f 6269 struct fusion_context *fusion = instance->ctrl_context;
1b4bed20
S		 6270
6271 if (instance->evt_detail)
6272 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6273 instance->evt_detail,
6274 instance->evt_detail_h);
6275
9b3d028f
S		 6276 if (fusion && fusion->ioc_init_request)
6277 dma_free_coherent(&pdev->dev,
6278 sizeof(struct MPI2_IOC_INIT_REQUEST),
6279 fusion->ioc_init_request,
6280 fusion->ioc_init_request_phys);
6281
6282 if (instance->pd_list_buf)
6283 pci_free_consistent(pdev,
6284 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
6285 instance->pd_list_buf,
6286 instance->pd_list_buf_h);
6287
6288 if (instance->ld_list_buf)
6289 pci_free_consistent(pdev, sizeof(struct MR_LD_LIST),
6290 instance->ld_list_buf,
6291 instance->ld_list_buf_h);
6292
6293 if (instance->ld_targetid_list_buf)
6294 pci_free_consistent(pdev, sizeof(struct MR_LD_TARGETID_LIST),
6295 instance->ld_targetid_list_buf,
6296 instance->ld_targetid_list_buf_h);
6297
6298 if (instance->ctrl_info_buf)
6299 pci_free_consistent(pdev, sizeof(struct megasas_ctrl_info),
6300 instance->ctrl_info_buf,
6301 instance->ctrl_info_buf_h);
6302
1b4bed20
S		 6303 if (instance->system_info_buf)
6304 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6305 instance->system_info_buf,
6306 instance->system_info_h);
6307
6308 if (instance->pd_info)
6309 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6310 instance->pd_info, instance->pd_info_h);
6311
6312 if (instance->tgt_prop)
6313 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6314 instance->tgt_prop, instance->tgt_prop_h);
6315
6316 if (instance->crash_dump_buf)
6317 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6318 instance->crash_dump_buf,
6319 instance->crash_dump_h);
6320}
6321
7535f27d
S		 6322/*
6323 * megasas_init_ctrl_params - Initialize controller's instance
6324 * parameters before FW init
6325 * @instance - Adapter soft instance
6326 * @return - void
6327 */
6328static inline void megasas_init_ctrl_params(struct megasas_instance *instance)
6329{
6330 instance->fw_crash_state = UNAVAILABLE;
6331
6332 megasas_poll_wait_aen = 0;
6333 instance->issuepend_done = 1;
6334 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
6335
c4a3e0a5
BS		 6336 /*
6337 * Initialize locks and queues
6338 */
6339 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 6340 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 6341
7535f27d 6342 atomic_set(&instance->fw_outstanding, 0);
e4a082c7 6343
c4a3e0a5
BS		 6344 init_waitqueue_head(&instance->int_cmd_wait_q);
6345 init_waitqueue_head(&instance->abort_cmd_wait_q);
6346
7535f27d 6347 spin_lock_init(&instance->crashdump_lock);
90dc9d98 6348 spin_lock_init(&instance->mfi_pool_lock);
39a98554 6349 spin_lock_init(&instance->hba_lock);
fdd84e25 6350 spin_lock_init(&instance->stream_lock);
7343eb65 6351 spin_lock_init(&instance->completion_lock);
c4a3e0a5 6352
2216c305 6353 mutex_init(&instance->hba_mutex);
7535f27d 6354 mutex_init(&instance->reset_mutex);
ae09a6c1 6355
7bebf5c7 6356 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
7535f27d 6357 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 6358 instance->flag_ieee = 1;
7bebf5c7 6359
658dcedb 6360 megasas_dbg_lvl = 0;
05e9ebbe 6361 instance->flag = 0;
0c79e681 6362 instance->unload = 1;
05e9ebbe 6363 instance->last_time = 0;
39a98554 6364 instance->disableOnlineCtrlReset = 1;
bc93d425 6365 instance->UnevenSpanSupport = 0;
39a98554 6366
7535f27d 6367 if (instance->adapter_type != MFI_SERIES) {
9c915a8c 6368 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc 6369 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
7535f27d 6370 } else {
9c915a8c 6371 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
7535f27d
S		 6372 }
6373}
6374
c4a3e0a5
BS		 6375/**
6376 * megasas_probe_one - PCI hotplug entry point
6377 * @pdev: PCI device structure
0d49016b 6378 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 6379 */
6f039790
GKH		 6380static int megasas_probe_one(struct pci_dev *pdev,
6381 const struct pci_device_id *id)
c4a3e0a5 6382{
d3557fc8 6383 int rval, pos;
c4a3e0a5
BS		 6384 struct Scsi_Host *host;
6385 struct megasas_instance *instance;
66192dfe
AR		 6386 u16 control = 0;
6387
6388 /* Reset MSI-X in the kdump kernel */
6389 if (reset_devices) {
6390 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
6391 if (pos) {
99369065 6392 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6393 &control);
6394 if (control & PCI_MSIX_FLAGS_ENABLE) {
6395 dev_info(&pdev->dev, "resetting MSI-X\n");
6396 pci_write_config_word(pdev,
99369065 6397 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6398 control &
6399 ~PCI_MSIX_FLAGS_ENABLE);
6400 }
6401 }
6402 }
c4a3e0a5 6403
c4a3e0a5
BS		 6404 /*
6405 * PCI prepping: enable device set bus mastering and dma mask
6406 */
aeab3fd7 6407 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 6408
6409 if (rval) {
6410 return rval;
6411 }
6412
6413 pci_set_master(pdev);
6414
c4a3e0a5
BS		 6415 host = scsi_host_alloc(&megasas_template,
6416 sizeof(struct megasas_instance));
6417
6418 if (!host) {
1be18254 6419 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 6420 goto fail_alloc_instance;
6421 }
6422
6423 instance = (struct megasas_instance *)host->hostdata;
6424 memset(instance, 0, sizeof(*instance));
da0dc9fb 6425 atomic_set(&instance->fw_reset_no_pci_access, 0);
c4a3e0a5
BS		 6426
6427 /*
6428 * Initialize PCI related and misc parameters
6429 */
7535f27d 6430 instance->pdev = pdev;
c4a3e0a5
BS		 6431 instance->host = host;
6432 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
6433 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
ae09a6c1 6434
7535f27d 6435 megasas_set_adapter_type(instance);
658dcedb 6436
0a77066a
AR		 6437 /*
6438 * Initialize MFI Firmware
6439 */
6440 if (megasas_init_fw(instance))
6441 goto fail_init_mfi;
6442
229fe47c
AR		 6443 if (instance->requestorId) {
6444 if (instance->PlasmaFW111) {
6445 instance->vf_affiliation_111 =
6446 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
6447 &instance->vf_affiliation_111_h);
6448 if (!instance->vf_affiliation_111)
1be18254 6449 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6450 "memory for VF affiliation buffer\n");
6451 } else {
6452 instance->vf_affiliation =
6453 pci_alloc_consistent(pdev,
6454 (MAX_LOGICAL_DRIVES + 1) *
6455 sizeof(struct MR_LD_VF_AFFILIATION),
6456 &instance->vf_affiliation_h);
6457 if (!instance->vf_affiliation)
1be18254 6458 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6459 "memory for VF affiliation buffer\n");
6460 }
6461 }
6462
c4a3e0a5
BS		 6463 /*
6464 * Store instance in PCI softstate
6465 */
6466 pci_set_drvdata(pdev, instance);
6467
6468 /*
6469 * Add this controller to megasas_mgmt_info structure so that it
6470 * can be exported to management applications
6471 */
6472 megasas_mgmt_info.count++;
6473 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
6474 megasas_mgmt_info.max_index++;
6475
541f90b7
AR		 6476 /*
6477 * Register with SCSI mid-layer
6478 */
6479 if (megasas_io_attach(instance))
6480 goto fail_io_attach;
6481
6482 instance->unload = 0;
aa00832b
SS		 6483 /*
6484 * Trigger SCSI to scan our drives
6485 */
6486 scsi_scan_host(host);
541f90b7 6487
c4a3e0a5
BS		 6488 /*
6489 * Initiate AEN (Asynchronous Event Notification)
6490 */
6491 if (megasas_start_aen(instance)) {
1be18254 6492 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 6493 goto fail_start_aen;
6494 }
6495
9ea81f81
AR		 6496 /* Get current SR-IOV LD/VF affiliation */
6497 if (instance->requestorId)
6498 megasas_get_ld_vf_affiliation(instance, 1);
6499
c4a3e0a5
BS		 6500 return 0;
6501
da0dc9fb
BH		 6502fail_start_aen:
6503fail_io_attach:
c4a3e0a5 6504 megasas_mgmt_info.count--;
c4a3e0a5 6505 megasas_mgmt_info.max_index--;
61f0c3c7 6506 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
c4a3e0a5 6507
d46a3ad6 6508 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6509 megasas_destroy_irqs(instance);
6510
e7d36b88 6511 if (instance->adapter_type != MFI_SERIES)
eb1b1237
AR		 6512 megasas_release_fusion(instance);
6513 else
6514 megasas_release_mfi(instance);
c8e858fe 6515 if (instance->msix_vectors)
fad119b7 6516 pci_free_irq_vectors(instance->pdev);
d3557fc8 6517fail_init_mfi:
c4a3e0a5
BS		 6518 scsi_host_put(host);
6519
da0dc9fb 6520fail_alloc_instance:
c4a3e0a5
BS		 6521 pci_disable_device(pdev);
6522
6523 return -ENODEV;
6524}
6525
6526/**
6527 * megasas_flush_cache - Requests FW to flush all its caches
6528 * @instance: Adapter soft state
6529 */
6530static void megasas_flush_cache(struct megasas_instance *instance)
6531{
6532 struct megasas_cmd *cmd;
6533 struct megasas_dcmd_frame *dcmd;
6534
8a01a41d 6535 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6536 return;
6537
c4a3e0a5
BS		 6538 cmd = megasas_get_cmd(instance);
6539
6540 if (!cmd)
6541 return;
6542
6543 dcmd = &cmd->frame->dcmd;
6544
6545 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6546
6547 dcmd->cmd = MFI_CMD_DCMD;
6548 dcmd->cmd_status = 0x0;
6549 dcmd->sge_count = 0;
94cd65dd 6550 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6551 dcmd->timeout = 0;
780a3762 6552 dcmd->pad_0 = 0;
c4a3e0a5 6553 dcmd->data_xfer_len = 0;
94cd65dd 6554 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 6555 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
6556
6d40afbc
SS		 6557 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6558 != DCMD_SUCCESS) {
6559 dev_err(&instance->pdev->dev,
6560 "return from %s %d\n", __func__, __LINE__);
6561 return;
6562 }
c4a3e0a5 6563
4026e9aa 6564 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6565}
6566
6567/**
6568 * megasas_shutdown_controller - Instructs FW to shutdown the controller
6569 * @instance: Adapter soft state
31ea7088 6570 * @opcode: Shutdown/Hibernate
c4a3e0a5 6571 */
31ea7088 6572static void megasas_shutdown_controller(struct megasas_instance *instance,
6573 u32 opcode)
c4a3e0a5
BS		 6574{
6575 struct megasas_cmd *cmd;
6576 struct megasas_dcmd_frame *dcmd;
6577
8a01a41d 6578 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6579 return;
6580
c4a3e0a5
BS		 6581 cmd = megasas_get_cmd(instance);
6582
6583 if (!cmd)
6584 return;
6585
6586 if (instance->aen_cmd)
cfbe7554 6587 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6588 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c
AR		 6589 if (instance->map_update_cmd)
6590 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6591 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6592 if (instance->jbod_seq_cmd)
6593 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6594 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6595
c4a3e0a5
BS		 6596 dcmd = &cmd->frame->dcmd;
6597
6598 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6599
6600 dcmd->cmd = MFI_CMD_DCMD;
6601 dcmd->cmd_status = 0x0;
6602 dcmd->sge_count = 0;
94cd65dd 6603 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6604 dcmd->timeout = 0;
780a3762 6605 dcmd->pad_0 = 0;
c4a3e0a5 6606 dcmd->data_xfer_len = 0;
94cd65dd 6607 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6608
6d40afbc
SS		 6609 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6610 != DCMD_SUCCESS) {
6611 dev_err(&instance->pdev->dev,
6612 "return from %s %d\n", __func__, __LINE__);
6613 return;
6614 }
c4a3e0a5 6615
4026e9aa 6616 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6617}
6618
33139b21 6619#ifdef CONFIG_PM
31ea7088 6620/**
ad84db2e 6621 * megasas_suspend - driver suspend entry point
6622 * @pdev: PCI device structure
31ea7088 6623 * @state: PCI power state to suspend routine
6624 */
33139b21 6625static int
31ea7088 6626megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6627{
6628 struct Scsi_Host *host;
6629 struct megasas_instance *instance;
6630
6631 instance = pci_get_drvdata(pdev);
6632 host = instance->host;
0c79e681 6633 instance->unload = 1;
31ea7088 6634
229fe47c
AR		 6635 /* Shutdown SR-IOV heartbeat timer */
6636 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6637 del_timer_sync(&instance->sriov_heartbeat_timer);
6638
31ea7088 6639 megasas_flush_cache(instance);
6640 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 6641
6642 /* cancel the delayed work if this work still in queue */
6643 if (instance->ev != NULL) {
6644 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6645 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6646 instance->ev = NULL;
6647 }
6648
31ea7088 6649 tasklet_kill(&instance->isr_tasklet);
6650
6651 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6652 instance->instancet->disable_intr(instance);
c8e858fe 6653
d3557fc8
SS		 6654 megasas_destroy_irqs(instance);
6655
c8e858fe 6656 if (instance->msix_vectors)
fad119b7 6657 pci_free_irq_vectors(instance->pdev);
31ea7088 6658
6659 pci_save_state(pdev);
6660 pci_disable_device(pdev);
6661
6662 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6663
6664 return 0;
6665}
6666
6667/**
6668 * megasas_resume- driver resume entry point
6669 * @pdev: PCI device structure
6670 */
33139b21 6671static int
31ea7088 6672megasas_resume(struct pci_dev *pdev)
6673{
d3557fc8 6674 int rval;
31ea7088 6675 struct Scsi_Host *host;
6676 struct megasas_instance *instance;
fad119b7 6677 int irq_flags = PCI_IRQ_LEGACY;
31ea7088 6678
6679 instance = pci_get_drvdata(pdev);
6680 host = instance->host;
6681 pci_set_power_state(pdev, PCI_D0);
6682 pci_enable_wake(pdev, PCI_D0, 0);
6683 pci_restore_state(pdev);
6684
6685 /*
6686 * PCI prepping: enable device set bus mastering and dma mask
6687 */
aeab3fd7 6688 rval = pci_enable_device_mem(pdev);
31ea7088 6689
6690 if (rval) {
1be18254 6691 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6692 return rval;
6693 }
6694
6695 pci_set_master(pdev);
6696
107a60dd
S		 6697 /*
6698 * We expect the FW state to be READY
6699 */
6700 if (megasas_transition_to_ready(instance, 0))
6701 goto fail_ready_state;
6702
6703 if (megasas_set_dma_mask(instance))
31ea7088 6704 goto fail_set_dma_mask;
6705
6706 /*
6707 * Initialize MFI Firmware
6708 */
6709
31ea7088 6710 atomic_set(&instance->fw_outstanding, 0);
41fae9a4 6711 atomic_set(&instance->ldio_outstanding, 0);
31ea7088 6712
3f1abce4 6713 /* Now re-enable MSI-X */
fad119b7
HR		 6714 if (instance->msix_vectors) {
6715 irq_flags = PCI_IRQ_MSIX;
6716 if (smp_affinity_enable)
6717 irq_flags |= PCI_IRQ_AFFINITY;
6718 }
6719 rval = pci_alloc_irq_vectors(instance->pdev, 1,
6720 instance->msix_vectors ?
6721 instance->msix_vectors : 1, irq_flags);
6722 if (rval < 0)
dd088128 6723 goto fail_reenable_msix;
3f1abce4 6724
e7d36b88 6725 if (instance->adapter_type != MFI_SERIES) {
9c915a8c
AR		 6726 megasas_reset_reply_desc(instance);
6727 if (megasas_ioc_init_fusion(instance)) {
6728 megasas_free_cmds(instance);
6729 megasas_free_cmds_fusion(instance);
6730 goto fail_init_mfi;
6731 }
6732 if (!megasas_get_map_info(instance))
6733 megasas_sync_map_info(instance);
5a8cb85b 6734 } else {
9c915a8c
AR		 6735 *instance->producer = 0;
6736 *instance->consumer = 0;
6737 if (megasas_issue_init_mfi(instance))
6738 goto fail_init_mfi;
9c915a8c 6739 }
31ea7088 6740
9c915a8c
AR		 6741 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6742 (unsigned long)instance);
31ea7088 6743
d3557fc8
SS		 6744 if (instance->msix_vectors ?
6745 megasas_setup_irqs_msix(instance, 0) :
6746 megasas_setup_irqs_ioapic(instance))
6747 goto fail_init_mfi;
31ea7088 6748
229fe47c
AR		 6749 /* Re-launch SR-IOV heartbeat timer */
6750 if (instance->requestorId) {
6751 if (!megasas_sriov_start_heartbeat(instance, 0))
c251a7be 6752 megasas_start_timer(instance);
5765c5b8 6753 else {
229fe47c 6754 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 6755 goto fail_init_mfi;
6756 }
229fe47c
AR		 6757 }
6758
d46a3ad6 6759 instance->instancet->enable_intr(instance);
3761cb4c 6760 megasas_setup_jbod_map(instance);
0c79e681
YB		 6761 instance->unload = 0;
6762
541f90b7
AR		 6763 /*
6764 * Initiate AEN (Asynchronous Event Notification)
6765 */
6766 if (megasas_start_aen(instance))
1be18254 6767 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6768
31ea7088 6769 return 0;
6770
31ea7088 6771fail_init_mfi:
1b4bed20 6772 megasas_free_ctrl_dma_buffers(instance);
49a7a4ad 6773 megasas_free_ctrl_mem(instance);
31ea7088 6774 scsi_host_put(host);
6775
107a60dd 6776fail_reenable_msix:
31ea7088 6777fail_set_dma_mask:
6778fail_ready_state:
6779
6780 pci_disable_device(pdev);
6781
6782 return -ENODEV;
6783}
33139b21
JS		 6784#else
6785#define megasas_suspend NULL
6786#define megasas_resume NULL
6787#endif
31ea7088 6788
a1dfd62c
KD		 6789static inline int
6790megasas_wait_for_adapter_operational(struct megasas_instance *instance)
6791{
6792 int wait_time = MEGASAS_RESET_WAIT_TIME * 2;
6793 int i;
6794
6795 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
6796 return 1;
6797
6798 for (i = 0; i < wait_time; i++) {
6799 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
6800 break;
6801
6802 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL))
6803 dev_notice(&instance->pdev->dev, "waiting for controller reset to finish\n");
6804
6805 msleep(1000);
6806 }
6807
6808 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
6809 dev_info(&instance->pdev->dev, "%s timed out while waiting for HBA to recover.\n",
6810 __func__);
6811 return 1;
6812 }
6813
6814 return 0;
6815}
6816
c4a3e0a5
BS		 6817/**
6818 * megasas_detach_one - PCI hot"un"plug entry point
6819 * @pdev: PCI device structure
6820 */
6f039790 6821static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 6822{
6823 int i;
6824 struct Scsi_Host *host;
6825 struct megasas_instance *instance;
9c915a8c 6826 struct fusion_context *fusion;
3761cb4c 6827 u32 pd_seq_map_sz;
c4a3e0a5
BS		 6828
6829 instance = pci_get_drvdata(pdev);
c3518837 6830 instance->unload = 1;
c4a3e0a5 6831 host = instance->host;
9c915a8c 6832 fusion = instance->ctrl_context;
c4a3e0a5 6833
229fe47c
AR		 6834 /* Shutdown SR-IOV heartbeat timer */
6835 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6836 del_timer_sync(&instance->sriov_heartbeat_timer);
6837
fc62b3fc
SS		 6838 if (instance->fw_crash_state != UNAVAILABLE)
6839 megasas_free_host_crash_buffer(instance);
c4a3e0a5 6840 scsi_remove_host(instance->host);
a1dfd62c
KD		 6841
6842 if (megasas_wait_for_adapter_operational(instance))
6843 goto skip_firing_dcmds;
6844
c4a3e0a5 6845 megasas_flush_cache(instance);
31ea7088 6846 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4 6847
a1dfd62c 6848skip_firing_dcmds:
7e8a75f4
YB		 6849 /* cancel the delayed work if this work still in queue*/
6850 if (instance->ev != NULL) {
6851 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6852 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6853 instance->ev = NULL;
6854 }
6855
cfbe7554
SS		 6856 /* cancel all wait events */
6857 wake_up_all(&instance->int_cmd_wait_q);
6858
5d018ad0 6859 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 6860
6861 /*
6862 * Take the instance off the instance array. Note that we will not
6863 * decrement the max_index. We let this array be sparse array
6864 */
6865 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6866 if (megasas_mgmt_info.instance[i] == instance) {
6867 megasas_mgmt_info.count--;
6868 megasas_mgmt_info.instance[i] = NULL;
6869
6870 break;
6871 }
6872 }
6873
d46a3ad6 6874 instance->instancet->disable_intr(instance);
c4a3e0a5 6875
d3557fc8
SS		 6876 megasas_destroy_irqs(instance);
6877
c8e858fe 6878 if (instance->msix_vectors)
fad119b7 6879 pci_free_irq_vectors(instance->pdev);
c4a3e0a5 6880
f369a315 6881 if (instance->adapter_type == VENTURA_SERIES) {
fdd84e25
SC		 6882 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i)
6883 kfree(fusion->stream_detect_by_ld[i]);
6884 kfree(fusion->stream_detect_by_ld);
6885 fusion->stream_detect_by_ld = NULL;
6886 }
6887
6888
e7d36b88 6889 if (instance->adapter_type != MFI_SERIES) {
9c915a8c 6890 megasas_release_fusion(instance);
3761cb4c 6891 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6892 (sizeof(struct MR_PD_CFG_SEQ) *
6893 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6894 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 6895 if (fusion->ld_map[i])
6896 dma_free_coherent(&instance->pdev->dev,
51087a86 6897 fusion->max_map_sz,
9c915a8c 6898 fusion->ld_map[i],
51087a86 6899 fusion->ld_map_phys[i]);
def3e8df
S		 6900 if (fusion->ld_drv_map[i]) {
6901 if (is_vmalloc_addr(fusion->ld_drv_map[i]))
6902 vfree(fusion->ld_drv_map[i]);
6903 else
6904 free_pages((ulong)fusion->ld_drv_map[i],
6905 fusion->drv_map_pages);
6906 }
6907
546e559c
ML		 6908 if (fusion->pd_seq_sync[i])
6909 dma_free_coherent(&instance->pdev->dev,
6910 pd_seq_map_sz,
6911 fusion->pd_seq_sync[i],
6912 fusion->pd_seq_phys[i]);
51087a86 6913 }
5a8cb85b 6914 } else {
9c915a8c 6915 megasas_release_mfi(instance);
9c915a8c 6916 }
c4a3e0a5 6917
229fe47c
AR		 6918 if (instance->vf_affiliation)
6919 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6920 sizeof(struct MR_LD_VF_AFFILIATION),
6921 instance->vf_affiliation,
6922 instance->vf_affiliation_h);
6923
6924 if (instance->vf_affiliation_111)
6925 pci_free_consistent(pdev,
6926 sizeof(struct MR_LD_VF_AFFILIATION_111),
6927 instance->vf_affiliation_111,
6928 instance->vf_affiliation_111_h);
6929
6930 if (instance->hb_host_mem)
6931 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6932 instance->hb_host_mem,
6933 instance->hb_host_mem_h);
6934
1b4bed20 6935 megasas_free_ctrl_dma_buffers(instance);
fc62b3fc 6936
49a7a4ad 6937 megasas_free_ctrl_mem(instance);
5765c5b8 6938
c4a3e0a5
BS		 6939 scsi_host_put(host);
6940
c4a3e0a5 6941 pci_disable_device(pdev);
c4a3e0a5
BS		 6942}
6943
6944/**
6945 * megasas_shutdown - Shutdown entry point
6946 * @device: Generic device structure
6947 */
6948static void megasas_shutdown(struct pci_dev *pdev)
6949{
6950 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6951
0c79e681 6952 instance->unload = 1;
a1dfd62c
KD		 6953
6954 if (megasas_wait_for_adapter_operational(instance))
6955 goto skip_firing_dcmds;
6956
c4a3e0a5 6957 megasas_flush_cache(instance);
530e6fc1 6958 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
a1dfd62c
KD		 6959
6960skip_firing_dcmds:
d46a3ad6 6961 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6962 megasas_destroy_irqs(instance);
6963
c8e858fe 6964 if (instance->msix_vectors)
fad119b7 6965 pci_free_irq_vectors(instance->pdev);
c4a3e0a5
BS		 6966}
6967
6968/**
6969 * megasas_mgmt_open - char node "open" entry point
6970 */
6971static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6972{
6973 /*
6974 * Allow only those users with admin rights
6975 */
6976 if (!capable(CAP_SYS_ADMIN))
6977 return -EACCES;
6978
6979 return 0;
6980}
6981
c4a3e0a5
BS		 6982/**
6983 * megasas_mgmt_fasync - Async notifier registration from applications
6984 *
6985 * This function adds the calling process to a driver global queue. When an
6986 * event occurs, SIGIO will be sent to all processes in this queue.
6987 */
6988static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6989{
6990 int rc;
6991
0b950672 6992 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6993
6994 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6995
0b950672 6996 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6997
6998 if (rc >= 0) {
6999 /* For sanity check when we get ioctl */
7000 filep->private_data = filep;
7001 return 0;
7002 }
7003
7004 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
7005
7006 return rc;
7007}
7008
c3518837
YB		 7009/**
7010 * megasas_mgmt_poll - char node "poll" entry point
7011 * */
7012static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
7013{
7014 unsigned int mask;
7015 unsigned long flags;
da0dc9fb 7016
c3518837
YB		 7017 poll_wait(file, &megasas_poll_wait, wait);
7018 spin_lock_irqsave(&poll_aen_lock, flags);
7019 if (megasas_poll_wait_aen)
da0dc9fb 7020 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 7021 else
7022 mask = 0;
51087a86 7023 megasas_poll_wait_aen = 0;
c3518837
YB		 7024 spin_unlock_irqrestore(&poll_aen_lock, flags);
7025 return mask;
7026}
7027
fc62b3fc
SS		 7028/*
7029 * megasas_set_crash_dump_params_ioctl:
7030 * Send CRASH_DUMP_MODE DCMD to all controllers
7031 * @cmd: MFI command frame
7032 */
7033
da0dc9fb 7034static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 7035{
7036 struct megasas_instance *local_instance;
7037 int i, error = 0;
7038 int crash_support;
7039
7040 crash_support = cmd->frame->dcmd.mbox.w[0];
7041
7042 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
7043 local_instance = megasas_mgmt_info.instance[i];
7044 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 7045 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS		 7046 MEGASAS_HBA_OPERATIONAL) &&
7047 !megasas_set_crash_dump_params(local_instance,
7048 crash_support)) {
7049 local_instance->crash_dump_app_support =
7050 crash_support;
7051 dev_info(&local_instance->pdev->dev,
7052 "Application firmware crash "
7053 "dump mode set success\n");
7054 error = 0;
7055 } else {
7056 dev_info(&local_instance->pdev->dev,
7057 "Application firmware crash "
7058 "dump mode set failed\n");
7059 error = -1;
7060 }
7061 }
7062 }
7063 return error;
7064}
7065
c4a3e0a5
BS		 7066/**
7067 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
7068 * @instance: Adapter soft state
7069 * @argp: User's ioctl packet
7070 */
7071static int
7072megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
7073 struct megasas_iocpacket __user * user_ioc,
7074 struct megasas_iocpacket *ioc)
7075{
107a60dd
S		 7076 struct megasas_sge64 *kern_sge64 = NULL;
7077 struct megasas_sge32 *kern_sge32 = NULL;
c4a3e0a5
BS		 7078 struct megasas_cmd *cmd;
7079 void *kbuff_arr[MAX_IOCTL_SGE];
7080 dma_addr_t buf_handle = 0;
7081 int error = 0, i;
7082 void *sense = NULL;
7083 dma_addr_t sense_handle;
7b2519af 7084 unsigned long *sense_ptr;
82add4e1 7085 u32 opcode = 0;
c4a3e0a5
BS		 7086
7087 memset(kbuff_arr, 0, sizeof(kbuff_arr));
7088
7089 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 7090 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 7091 ioc->sge_count, MAX_IOCTL_SGE);
7092 return -EINVAL;
7093 }
7094
82add4e1
S		 7095 if (ioc->frame.hdr.cmd >= MFI_CMD_OP_COUNT) {
7096 dev_err(&instance->pdev->dev,
7097 "Received invalid ioctl command 0x%x\n",
7098 ioc->frame.hdr.cmd);
7099 return -ENOTSUPP;
7100 }
7101
c4a3e0a5
BS		 7102 cmd = megasas_get_cmd(instance);
7103 if (!cmd) {
1be18254 7104 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 7105 return -ENOMEM;
7106 }
7107
7108 /*
7109 * User's IOCTL packet has 2 frames (maximum). Copy those two
7110 * frames into our cmd's frames. cmd->frame's context will get
7111 * overwritten when we copy from user's frames. So set that value
7112 * alone separately
7113 */
7114 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 7115 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 7116 cmd->frame->hdr.pad_0 = 0;
107a60dd
S		 7117
7118 cmd->frame->hdr.flags &= (~MFI_FRAME_IEEE);
7119
7120 if (instance->consistent_mask_64bit)
7121 cmd->frame->hdr.flags |= cpu_to_le16((MFI_FRAME_SGL64 |
7122 MFI_FRAME_SENSE64));
7123 else
7124 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_SGL64 |
94cd65dd 7125 MFI_FRAME_SENSE64));
82add4e1
S		 7126
7127 if (cmd->frame->hdr.cmd == MFI_CMD_DCMD)
7128 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
c4a3e0a5 7129
8823abed 7130 if (opcode == MR_DCMD_CTRL_SHUTDOWN) {
95c06086
S		 7131 if (megasas_get_ctrl_info(instance) != DCMD_SUCCESS) {
7132 megasas_return_cmd(instance, cmd);
7133 return -1;
7134 }
7135 }
7136
8823abed 7137 if (opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
fc62b3fc
SS		 7138 error = megasas_set_crash_dump_params_ioctl(cmd);
7139 megasas_return_cmd(instance, cmd);
7140 return error;
7141 }
7142
c4a3e0a5
BS		 7143 /*
7144 * The management interface between applications and the fw uses
7145 * MFI frames. E.g, RAID configuration changes, LD property changes
7146 * etc are accomplishes through different kinds of MFI frames. The
7147 * driver needs to care only about substituting user buffers with
7148 * kernel buffers in SGLs. The location of SGL is embedded in the
7149 * struct iocpacket itself.
7150 */
107a60dd
S		 7151 if (instance->consistent_mask_64bit)
7152 kern_sge64 = (struct megasas_sge64 *)
7153 ((unsigned long)cmd->frame + ioc->sgl_off);
7154 else
7155 kern_sge32 = (struct megasas_sge32 *)
7156 ((unsigned long)cmd->frame + ioc->sgl_off);
c4a3e0a5
BS		 7157
7158 /*
7159 * For each user buffer, create a mirror buffer and copy in
7160 */
7161 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 7162 if (!ioc->sgl[i].iov_len)
7163 continue;
7164
9f35fa8a 7165 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 7166 ioc->sgl[i].iov_len,
9f35fa8a 7167 &buf_handle, GFP_KERNEL);
c4a3e0a5 7168 if (!kbuff_arr[i]) {
1be18254
BH		 7169 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
7170 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 7171 error = -ENOMEM;
7172 goto out;
7173 }
7174
7175 /*
7176 * We don't change the dma_coherent_mask, so
7177 * pci_alloc_consistent only returns 32bit addresses
7178 */
107a60dd
S		 7179 if (instance->consistent_mask_64bit) {
7180 kern_sge64[i].phys_addr = cpu_to_le64(buf_handle);
7181 kern_sge64[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
7182 } else {
7183 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
7184 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
7185 }
c4a3e0a5
BS		 7186
7187 /*
7188 * We created a kernel buffer corresponding to the
7189 * user buffer. Now copy in from the user buffer
7190 */
7191 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
7192 (u32) (ioc->sgl[i].iov_len))) {
7193 error = -EFAULT;
7194 goto out;
7195 }
7196 }
7197
7198 if (ioc->sense_len) {
9f35fa8a
SP		 7199 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
7200 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 7201 if (!sense) {
7202 error = -ENOMEM;
7203 goto out;
7204 }
7205
7206 sense_ptr =
7b2519af 7207 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
107a60dd
S		 7208 if (instance->consistent_mask_64bit)
7209 *sense_ptr = cpu_to_le64(sense_handle);
7210 else
7211 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 7212 }
7213
7214 /*
7215 * Set the sync_cmd flag so that the ISR knows not to complete this
7216 * cmd to the SCSI mid-layer
7217 */
7218 cmd->sync_cmd = 1;
6d40afbc
SS		 7219 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
7220 cmd->sync_cmd = 0;
7221 dev_err(&instance->pdev->dev,
82add4e1
S		 7222 "return -EBUSY from %s %d cmd 0x%x opcode 0x%x cmd->cmd_status_drv 0x%x\n",
7223 __func__, __LINE__, cmd->frame->hdr.cmd, opcode,
7224 cmd->cmd_status_drv);
6d40afbc
SS		 7225 return -EBUSY;
7226 }
7227
c4a3e0a5
BS		 7228 cmd->sync_cmd = 0;
7229
aa00832b
SS		 7230 if (instance->unload == 1) {
7231 dev_info(&instance->pdev->dev, "Driver unload is in progress "
7232 "don't submit data to application\n");
7233 goto out;
7234 }
c4a3e0a5
BS		 7235 /*
7236 * copy out the kernel buffers to user buffers
7237 */
7238 for (i = 0; i < ioc->sge_count; i++) {
7239 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
7240 ioc->sgl[i].iov_len)) {
7241 error = -EFAULT;
7242 goto out;
7243 }
7244 }
7245
7246 /*
7247 * copy out the sense
7248 */
7249 if (ioc->sense_len) {
7250 /*
b70a41e0 7251 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 7252 * sense buffer address
7253 */
7b2519af
YB		 7254 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
7255 ioc->sense_off);
c4a3e0a5 7256
318aaef8
S		 7257 if (copy_to_user((void __user *)((unsigned long)
7258 get_unaligned((unsigned long *)sense_ptr)),
b70a41e0 7259 sense, ioc->sense_len)) {
1be18254 7260 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 7261 "sense data\n");
c4a3e0a5
BS		 7262 error = -EFAULT;
7263 goto out;
7264 }
7265 }
7266
7267 /*
7268 * copy the status codes returned by the fw
7269 */
7270 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
7271 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 7272 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 7273 error = -EFAULT;
7274 }
7275
da0dc9fb 7276out:
c4a3e0a5 7277 if (sense) {
9f35fa8a 7278 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 7279 sense, sense_handle);
7280 }
7281
7a6a731b 7282 for (i = 0; i < ioc->sge_count; i++) {
3deb9438 7283 if (kbuff_arr[i]) {
107a60dd
S		 7284 if (instance->consistent_mask_64bit)
7285 dma_free_coherent(&instance->pdev->dev,
7286 le32_to_cpu(kern_sge64[i].length),
7287 kbuff_arr[i],
7288 le64_to_cpu(kern_sge64[i].phys_addr));
7289 else
7290 dma_free_coherent(&instance->pdev->dev,
7291 le32_to_cpu(kern_sge32[i].length),
7292 kbuff_arr[i],
7293 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 7294 kbuff_arr[i] = NULL;
3deb9438 7295 }
c4a3e0a5
BS		 7296 }
7297
4026e9aa 7298 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 7299 return error;
7300}
7301
c4a3e0a5
BS		 7302static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
7303{
7304 struct megasas_iocpacket __user *user_ioc =
7305 (struct megasas_iocpacket __user *)arg;
7306 struct megasas_iocpacket *ioc;
7307 struct megasas_instance *instance;
7308 int error;
39a98554 7309 int i;
7310 unsigned long flags;
7311 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5 7312
709ab231
ME		 7313 ioc = memdup_user(user_ioc, sizeof(*ioc));
7314 if (IS_ERR(ioc))
7315 return PTR_ERR(ioc);
c4a3e0a5
BS		 7316
7317 instance = megasas_lookup_instance(ioc->host_no);
7318 if (!instance) {
7319 error = -ENODEV;
7320 goto out_kfree_ioc;
7321 }
7322
229fe47c
AR		 7323 /* Adjust ioctl wait time for VF mode */
7324 if (instance->requestorId)
7325 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7326
7327 /* Block ioctls in VF mode */
7328 if (instance->requestorId && !allow_vf_ioctls) {
7329 error = -ENODEV;
7330 goto out_kfree_ioc;
7331 }
7332
8a01a41d 7333 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 7334 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 7335 error = -ENODEV;
7336 goto out_kfree_ioc;
7337 }
7338
7339 if (instance->unload == 1) {
7340 error = -ENODEV;
7341 goto out_kfree_ioc;
7342 }
7343
c4a3e0a5
BS		 7344 if (down_interruptible(&instance->ioctl_sem)) {
7345 error = -ERESTARTSYS;
7346 goto out_kfree_ioc;
7347 }
39a98554 7348
7349 for (i = 0; i < wait_time; i++) {
7350
7351 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7352 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7353 spin_unlock_irqrestore(&instance->hba_lock, flags);
7354 break;
7355 }
7356 spin_unlock_irqrestore(&instance->hba_lock, flags);
7357
7358 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7359 dev_notice(&instance->pdev->dev, "waiting"
39a98554 7360 "for controller reset to finish\n");
7361 }
7362
7363 msleep(1000);
7364 }
7365
7366 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7367 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7368 spin_unlock_irqrestore(&instance->hba_lock, flags);
7369
644da3c3 7370 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7371 error = -ENODEV;
c64e483e 7372 goto out_up;
39a98554 7373 }
7374 spin_unlock_irqrestore(&instance->hba_lock, flags);
7375
c4a3e0a5 7376 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 7377out_up:
c4a3e0a5
BS		 7378 up(&instance->ioctl_sem);
7379
da0dc9fb 7380out_kfree_ioc:
c4a3e0a5
BS		 7381 kfree(ioc);
7382 return error;
7383}
7384
7385static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
7386{
7387 struct megasas_instance *instance;
7388 struct megasas_aen aen;
7389 int error;
39a98554 7390 int i;
7391 unsigned long flags;
7392 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 7393
7394 if (file->private_data != file) {
7395 printk(KERN_DEBUG "megasas: fasync_helper was not "
7396 "called first\n");
7397 return -EINVAL;
7398 }
7399
7400 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
7401 return -EFAULT;
7402
7403 instance = megasas_lookup_instance(aen.host_no);
7404
7405 if (!instance)
7406 return -ENODEV;
7407
8a01a41d 7408 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 7409 return -ENODEV;
0c79e681
YB		 7410 }
7411
7412 if (instance->unload == 1) {
7413 return -ENODEV;
7414 }
7415
39a98554 7416 for (i = 0; i < wait_time; i++) {
7417
7418 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7419 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7420 spin_unlock_irqrestore(&instance->hba_lock,
7421 flags);
7422 break;
7423 }
7424
7425 spin_unlock_irqrestore(&instance->hba_lock, flags);
7426
7427 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7428 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 7429 "controller reset to finish\n");
7430 }
7431
7432 msleep(1000);
7433 }
7434
7435 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7436 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7437 spin_unlock_irqrestore(&instance->hba_lock, flags);
644da3c3 7438 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7439 return -ENODEV;
7440 }
7441 spin_unlock_irqrestore(&instance->hba_lock, flags);
7442
11c71cb4 7443 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS		 7444 error = megasas_register_aen(instance, aen.seq_num,
7445 aen.class_locale_word);
11c71cb4 7446 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS		 7447 return error;
7448}
7449
7450/**
7451 * megasas_mgmt_ioctl - char node ioctl entry point
7452 */
7453static long
7454megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
7455{
7456 switch (cmd) {
7457 case MEGASAS_IOC_FIRMWARE:
7458 return megasas_mgmt_ioctl_fw(file, arg);
7459
7460 case MEGASAS_IOC_GET_AEN:
7461 return megasas_mgmt_ioctl_aen(file, arg);
7462 }
7463
7464 return -ENOTTY;
7465}
7466
7467#ifdef CONFIG_COMPAT
7468static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
7469{
7470 struct compat_megasas_iocpacket __user *cioc =
7471 (struct compat_megasas_iocpacket __user *)arg;
7472 struct megasas_iocpacket __user *ioc =
7473 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
7474 int i;
7475 int error = 0;
b3dc1a21 7476 compat_uptr_t ptr;
323c4a02 7477 u32 local_sense_off;
7478 u32 local_sense_len;
ea1c928b 7479 u32 user_sense_off;
c4a3e0a5 7480
83aabc1b
JG		 7481 if (clear_user(ioc, sizeof(*ioc)))
7482 return -EFAULT;
c4a3e0a5
BS		 7483
7484 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
7485 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
7486 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
7487 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
7488 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
7489 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
7490 return -EFAULT;
7491
b3dc1a21
TH		 7492 /*
7493 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
7494 * sense_len is not null, so prepare the 64bit value under
7495 * the same condition.
7496 */
ea1c928b
SS		 7497 if (get_user(local_sense_off, &ioc->sense_off) ||
7498 get_user(local_sense_len, &ioc->sense_len) ||
7499 get_user(user_sense_off, &cioc->sense_off))
323c4a02 7500 return -EFAULT;
7501
323c4a02 7502 if (local_sense_len) {
b3dc1a21 7503 void __user **sense_ioc_ptr =
ea1c928b 7504 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 7505 compat_uptr_t *sense_cioc_ptr =
ea1c928b 7506 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH		 7507 if (get_user(ptr, sense_cioc_ptr) ||
7508 put_user(compat_ptr(ptr), sense_ioc_ptr))
7509 return -EFAULT;
7510 }
c4a3e0a5 7511
b3dc1a21 7512 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 7513 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
7514 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
7515 copy_in_user(&ioc->sgl[i].iov_len,
7516 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
7517 return -EFAULT;
7518 }
7519
7520 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
7521
7522 if (copy_in_user(&cioc->frame.hdr.cmd_status,
7523 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
7524 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
7525 return -EFAULT;
7526 }
7527 return error;
7528}
7529
7530static long
7531megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
7532 unsigned long arg)
7533{
7534 switch (cmd) {
cb59aa6a
SP		 7535 case MEGASAS_IOC_FIRMWARE32:
7536 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 7537 case MEGASAS_IOC_GET_AEN:
7538 return megasas_mgmt_ioctl_aen(file, arg);
7539 }
7540
7541 return -ENOTTY;
7542}
7543#endif
7544
7545/*
7546 * File operations structure for management interface
7547 */
00977a59 7548static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 7549 .owner = THIS_MODULE,
7550 .open = megasas_mgmt_open,
c4a3e0a5
BS		 7551 .fasync = megasas_mgmt_fasync,
7552 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 7553 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 7554#ifdef CONFIG_COMPAT
7555 .compat_ioctl = megasas_mgmt_compat_ioctl,
7556#endif
6038f373 7557 .llseek = noop_llseek,
c4a3e0a5
BS		 7558};
7559
7560/*
7561 * PCI hotplug support registration structure
7562 */
7563static struct pci_driver megasas_pci_driver = {
7564
7565 .name = "megaraid_sas",
7566 .id_table = megasas_pci_table,
7567 .probe = megasas_probe_one,
6f039790 7568 .remove = megasas_detach_one,
31ea7088 7569 .suspend = megasas_suspend,
7570 .resume = megasas_resume,
c4a3e0a5
BS		 7571 .shutdown = megasas_shutdown,
7572};
7573
7574/*
7575 * Sysfs driver attributes
7576 */
e14a3967 7577static ssize_t version_show(struct device_driver *dd, char *buf)
c4a3e0a5
BS		 7578{
7579 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
7580 MEGASAS_VERSION);
7581}
e14a3967 7582static DRIVER_ATTR_RO(version);
c4a3e0a5 7583
e14a3967 7584static ssize_t release_date_show(struct device_driver *dd, char *buf)
09fced19
SS		 7585{
7586 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
7587 MEGASAS_RELDATE);
7588}
e14a3967 7589static DRIVER_ATTR_RO(release_date);
09fced19 7590
e14a3967 7591static ssize_t support_poll_for_event_show(struct device_driver *dd, char *buf)
72c4fd36
YB		 7592{
7593 return sprintf(buf, "%u\n", support_poll_for_event);
7594}
e14a3967 7595static DRIVER_ATTR_RO(support_poll_for_event);
72c4fd36 7596
e14a3967 7597static ssize_t support_device_change_show(struct device_driver *dd, char *buf)
837f5fe8
YB		 7598{
7599 return sprintf(buf, "%u\n", support_device_change);
7600}
e14a3967 7601static DRIVER_ATTR_RO(support_device_change);
837f5fe8 7602
e14a3967 7603static ssize_t dbg_lvl_show(struct device_driver *dd, char *buf)
658dcedb 7604{
ad84db2e 7605 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 7606}
7607
e14a3967
GKH		 7608static ssize_t dbg_lvl_store(struct device_driver *dd, const char *buf,
7609 size_t count)
658dcedb
SP		 7610{
7611 int retval = count;
da0dc9fb
BH		 7612
7613 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 7614 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
7615 retval = -EINVAL;
7616 }
7617 return retval;
7618}
e14a3967 7619static DRIVER_ATTR_RW(dbg_lvl);
ad84db2e 7620
b4a42213
S		 7621static inline void megasas_remove_scsi_device(struct scsi_device *sdev)
7622{
7623 sdev_printk(KERN_INFO, sdev, "SCSI device is removed\n");
7624 scsi_remove_device(sdev);
7625 scsi_device_put(sdev);
7626}
7627
7e8a75f4
YB		 7628static void
7629megasas_aen_polling(struct work_struct *work)
7630{
7631 struct megasas_aen_event *ev =
c1d390d8 7632 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 7633 struct megasas_instance *instance = ev->instance;
7634 union megasas_evt_class_locale class_locale;
7635 struct Scsi_Host *host;
7636 struct scsi_device *sdev1;
7637 u16 pd_index = 0;
c9786842 7638 u16 ld_index = 0;
7e8a75f4 7639 int i, j, doscan = 0;
229fe47c 7640 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7641 int error;
6d40afbc 7642 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB		 7643
7644 if (!instance) {
7645 printk(KERN_ERR "invalid instance!\n");
7646 kfree(ev);
7647 return;
7648 }
229fe47c
AR		 7649
7650 /* Adjust event workqueue thread wait time for VF mode */
7651 if (instance->requestorId)
7652 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7653
7654 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7655 mutex_lock(&instance->reset_mutex);
229fe47c 7656
7e8a75f4
YB		 7657 instance->ev = NULL;
7658 host = instance->host;
7659 if (instance->evt_detail) {
714f5177 7660 megasas_decode_evt(instance);
7e8a75f4 7661
94cd65dd 7662 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7663
11c71cb4 7664 case MR_EVT_PD_INSERTED:
7e8a75f4 7665 case MR_EVT_PD_REMOVED:
11c71cb4 7666 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7667 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7668 doscan = SCAN_PD_CHANNEL;
c9786842
YB		 7669 break;
7670
7671 case MR_EVT_LD_OFFLINE:
4c598b23 7672 case MR_EVT_CFG_CLEARED:
c9786842 7673 case MR_EVT_LD_DELETED:
c9786842 7674 case MR_EVT_LD_CREATED:
229fe47c 7675 if (!instance->requestorId ||
11c71cb4
SS		 7676 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7677 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7678
6d40afbc 7679 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7680 doscan = SCAN_VD_CHANNEL;
7681
c9786842 7682 break;
11c71cb4 7683
7e8a75f4 7684 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7685 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7686 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS		 7687 dcmd_ret = megasas_get_pd_list(instance);
7688
6d40afbc 7689 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7690 break;
7691
7692 if (!instance->requestorId ||
7693 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7694 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7695
6d40afbc 7696 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7697 break;
7698
7699 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7700 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7701 instance->host->host_no);
7e8a75f4 7702 break;
11c71cb4 7703
c4bd2654 7704 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS		 7705 dcmd_ret = megasas_get_ctrl_info(instance);
7706 break;
7e8a75f4
YB		 7707 default:
7708 doscan = 0;
7709 break;
7710 }
7711 } else {
1be18254 7712 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7713 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7714 kfree(ev);
7715 return;
7716 }
7717
11c71cb4
SS		 7718 mutex_unlock(&instance->reset_mutex);
7719
7720 if (doscan & SCAN_PD_CHANNEL) {
7721 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7722 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7723 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7724 sdev1 = scsi_device_lookup(host, i, j, 0);
7725 if (instance->pd_list[pd_index].driveState ==
7726 MR_PD_STATE_SYSTEM) {
7727 if (!sdev1)
7728 scsi_add_device(host, i, j, 0);
7729 else
7730 scsi_device_put(sdev1);
7731 } else {
b4a42213
S		 7732 if (sdev1)
7733 megasas_remove_scsi_device(sdev1);
7e8a75f4
YB		 7734 }
7735 }
7736 }
11c71cb4 7737 }
c9786842 7738
11c71cb4
SS		 7739 if (doscan & SCAN_VD_CHANNEL) {
7740 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7741 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7742 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7743 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7744 if (instance->ld_ids[ld_index] != 0xff) {
7745 if (!sdev1)
7746 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7747 else
7748 scsi_device_put(sdev1);
7749 } else {
b4a42213
S		 7750 if (sdev1)
7751 megasas_remove_scsi_device(sdev1);
c9786842
YB		 7752 }
7753 }
7754 }
7e8a75f4
YB		 7755 }
7756
6d40afbc 7757 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7758 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7759 else
7760 seq_num = instance->last_seq_num;
7e8a75f4
YB		 7761
7762 /* Register AEN with FW for latest sequence number plus 1 */
7763 class_locale.members.reserved = 0;
7764 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7765 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS		 7766
7767 if (instance->aen_cmd != NULL) {
7768 kfree(ev);
7769 return;
7770 }
7771
7772 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB		 7773 error = megasas_register_aen(instance, seq_num,
7774 class_locale.word);
7e8a75f4 7775 if (error)
11c71cb4
SS		 7776 dev_err(&instance->pdev->dev,
7777 "register aen failed error %x\n", error);
7e8a75f4 7778
11c71cb4 7779 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7780 kfree(ev);
7781}
7782
c4a3e0a5
BS		 7783/**
7784 * megasas_init - Driver load entry point
7785 */
7786static int __init megasas_init(void)
7787{
7788 int rval;
7789
c3e385a1
SS		 7790 /*
7791 * Booted in kdump kernel, minimize memory footprints by
7792 * disabling few features
7793 */
7794 if (reset_devices) {
7795 msix_vectors = 1;
7796 rdpq_enable = 0;
7797 dual_qdepth_disable = 1;
7798 }
7799
c4a3e0a5
BS		 7800 /*
7801 * Announce driver version and other information
7802 */
d98a6deb 7803 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7804
bd8d6dd4
KD		 7805 spin_lock_init(&poll_aen_lock);
7806
72c4fd36 7807 support_poll_for_event = 2;
837f5fe8 7808 support_device_change = 1;
72c4fd36 7809
c4a3e0a5
BS		 7810 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7811
7812 /*
7813 * Register character device node
7814 */
7815 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7816
7817 if (rval < 0) {
7818 printk(KERN_DEBUG "megasas: failed to open device node\n");
7819 return rval;
7820 }
7821
7822 megasas_mgmt_majorno = rval;
7823
7824 /*
7825 * Register ourselves as PCI hotplug module
7826 */
4041b9cd 7827 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 7828
7829 if (rval) {
6774def6 7830 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 7831 goto err_pcidrv;
7832 }
7833
7834 rval = driver_create_file(&megasas_pci_driver.driver,
7835 &driver_attr_version);
7836 if (rval)
7837 goto err_dcf_attr_ver;
72c4fd36 7838
09fced19
SS		 7839 rval = driver_create_file(&megasas_pci_driver.driver,
7840 &driver_attr_release_date);
7841 if (rval)
7842 goto err_dcf_rel_date;
7843
72c4fd36
YB		 7844 rval = driver_create_file(&megasas_pci_driver.driver,
7845 &driver_attr_support_poll_for_event);
7846 if (rval)
7847 goto err_dcf_support_poll_for_event;
7848
83aabc1b
JG		 7849 rval = driver_create_file(&megasas_pci_driver.driver,
7850 &driver_attr_dbg_lvl);
7851 if (rval)
7852 goto err_dcf_dbg_lvl;
837f5fe8
YB		 7853 rval = driver_create_file(&megasas_pci_driver.driver,
7854 &driver_attr_support_device_change);
7855 if (rval)
7856 goto err_dcf_support_device_change;
7857
c4a3e0a5 7858 return rval;
ad84db2e 7859
837f5fe8 7860err_dcf_support_device_change:
ad84db2e 7861 driver_remove_file(&megasas_pci_driver.driver,
7862 &driver_attr_dbg_lvl);
83aabc1b 7863err_dcf_dbg_lvl:
72c4fd36
YB		 7864 driver_remove_file(&megasas_pci_driver.driver,
7865 &driver_attr_support_poll_for_event);
72c4fd36 7866err_dcf_support_poll_for_event:
09fced19
SS		 7867 driver_remove_file(&megasas_pci_driver.driver,
7868 &driver_attr_release_date);
7869err_dcf_rel_date:
83aabc1b
JG		 7870 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7871err_dcf_attr_ver:
7872 pci_unregister_driver(&megasas_pci_driver);
7873err_pcidrv:
7874 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7875 return rval;
c4a3e0a5
BS		 7876}
7877
7878/**
7879 * megasas_exit - Driver unload entry point
7880 */
7881static void __exit megasas_exit(void)
7882{
658dcedb
SP		 7883 driver_remove_file(&megasas_pci_driver.driver,
7884 &driver_attr_dbg_lvl);
837f5fe8
YB		 7885 driver_remove_file(&megasas_pci_driver.driver,
7886 &driver_attr_support_poll_for_event);
7887 driver_remove_file(&megasas_pci_driver.driver,
7888 &driver_attr_support_device_change);
09fced19
SS		 7889 driver_remove_file(&megasas_pci_driver.driver,
7890 &driver_attr_release_date);
83aabc1b 7891 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 7892
7893 pci_unregister_driver(&megasas_pci_driver);
7894 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7895}
7896
7897module_init(megasas_init);
7898module_exit(megasas_exit);
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