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scsi: megaraid_sas: big endian support changes
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
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c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
7c0f6ba6 45#include <linux/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS		 51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 58#include "megaraid_sas.h"
59
1fd10685
YB		 60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98
AR		 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf
AR		 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c
AR		 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
e3d178ca 86unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2
AR		 87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS		 91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
179ac142
SS		 95int rdpq_enable = 1;
96module_param(rdpq_enable, int, S_IRUGO);
97MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
98
308ec459
SS		 99unsigned int dual_qdepth_disable;
100module_param(dual_qdepth_disable, int, S_IRUGO);
101MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
102
e3d178ca
SS		 103unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
104module_param(scmd_timeout, int, S_IRUGO);
105MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
106
c4a3e0a5
BS		 107MODULE_LICENSE("GPL");
108MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 109MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
110MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 111
058a8fac 112int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 113static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 114static int megasas_ld_list_query(struct megasas_instance *instance,
115 u8 query_type);
39a98554 116static int megasas_issue_init_mfi(struct megasas_instance *instance);
117static int megasas_register_aen(struct megasas_instance *instance,
118 u32 seq_num, u32 class_locale_word);
15dd0381
S		 119static void megasas_get_pd_info(struct megasas_instance *instance,
120 struct scsi_device *sdev);
96188a89
S		 121static int megasas_get_target_prop(struct megasas_instance *instance,
122 struct scsi_device *sdev);
c4a3e0a5
BS		 123/*
124 * PCI ID table for all supported controllers
125 */
126static struct pci_device_id megasas_pci_table[] = {
127
f3d7271c
HK		 128 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
129 /* xscale IOP */
130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
131 /* ppc IOP */
af7a5647 132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
133 /* ppc IOP */
6610a6b3
YB		 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
135 /* gen2*/
136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
137 /* gen2*/
87911122
YB		 138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
139 /* skinny*/
140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
141 /* skinny*/
f3d7271c
HK		 142 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
143 /* xscale IOP, vega */
144 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
145 /* xscale IOP */
9c915a8c
AR		 146 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
147 /* Fusion */
229fe47c
AR		 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
149 /* Plasma */
36807e67
AR		 150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
151 /* Invader */
21d3c710
SS		 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
153 /* Fury */
90c204bc 154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
155 /* Intruder */
156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
157 /* Intruder 24 port*/
7364d34b 158 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
159 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
45f4f2eb
SC		 160 /* VENTURA */
161 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA)},
162 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_HARPOON)},
163 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_TOMCAT)},
164 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA_4PORT)},
165 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER_4PORT)},
f3d7271c 166 {}
c4a3e0a5
BS		 167};
168
169MODULE_DEVICE_TABLE(pci, megasas_pci_table);
170
171static int megasas_mgmt_majorno;
229fe47c 172struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 173static struct fasync_struct *megasas_async_queue;
0b950672 174static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 175
c3518837
YB		 176static int megasas_poll_wait_aen;
177static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 178static u32 support_poll_for_event;
9c915a8c 179u32 megasas_dbg_lvl;
837f5fe8 180static u32 support_device_change;
658dcedb 181
c3518837
YB		 182/* define lock for aen poll */
183spinlock_t poll_aen_lock;
184
9c915a8c 185void
7343eb65 186megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
187 u8 alt_status);
ebf054b0
AR		 188static u32
189megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
190static int
191megasas_adp_reset_gen2(struct megasas_instance *instance,
192 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 193static irqreturn_t megasas_isr(int irq, void *devp);
194static u32
195megasas_init_adapter_mfi(struct megasas_instance *instance);
196u32
197megasas_build_and_issue_cmd(struct megasas_instance *instance,
198 struct scsi_cmnd *scmd);
199static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 200int
229fe47c
AR		 201wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
202 int seconds);
9c915a8c 203void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 204static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
205 int initial);
cd50ba8e 206
f4fc2093 207void
cd50ba8e
AR		 208megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
209{
210 instance->instancet->fire_cmd(instance,
211 cmd->frame_phys_addr, 0, instance->reg_set);
f4fc2093 212 return;
cd50ba8e 213}
7343eb65 214
c4a3e0a5
BS		 215/**
216 * megasas_get_cmd - Get a command from the free pool
217 * @instance: Adapter soft state
218 *
219 * Returns a free command from the pool
220 */
9c915a8c 221struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 222 *instance)
223{
224 unsigned long flags;
225 struct megasas_cmd *cmd = NULL;
226
90dc9d98 227 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 228
229 if (!list_empty(&instance->cmd_pool)) {
230 cmd = list_entry((&instance->cmd_pool)->next,
231 struct megasas_cmd, list);
232 list_del_init(&cmd->list);
233 } else {
1be18254 234 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 235 }
236
90dc9d98 237 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 238 return cmd;
239}
240
241/**
4026e9aa 242 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 243 * @instance: Adapter soft state
244 * @cmd: Command packet to be returned to free command pool
245 */
9c915a8c 246inline void
4026e9aa 247megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 248{
4026e9aa
SS		 249 unsigned long flags;
250 u32 blk_tags;
251 struct megasas_cmd_fusion *cmd_fusion;
252 struct fusion_context *fusion = instance->ctrl_context;
253
254 /* This flag is used only for fusion adapter.
255 * Wait for Interrupt for Polled mode DCMD
90dc9d98 256 */
4026e9aa 257 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 258 return;
c4a3e0a5 259
4026e9aa
SS		 260 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
261
262 if (fusion) {
263 blk_tags = instance->max_scsi_cmds + cmd->index;
264 cmd_fusion = fusion->cmd_list[blk_tags];
265 megasas_return_cmd_fusion(instance, cmd_fusion);
266 }
c4a3e0a5 267 cmd->scmd = NULL;
9c915a8c 268 cmd->frame_count = 0;
4026e9aa
SS		 269 cmd->flags = 0;
270 if (!fusion && reset_devices)
e5f93a36 271 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 272 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 273
90dc9d98 274 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 275
4026e9aa 276}
1341c939 277
714f5177 278static const char *
279format_timestamp(uint32_t timestamp)
280{
281 static char buffer[32];
282
283 if ((timestamp & 0xff000000) == 0xff000000)
284 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
285 0x00ffffff);
286 else
287 snprintf(buffer, sizeof(buffer), "%us", timestamp);
288 return buffer;
289}
290
291static const char *
292format_class(int8_t class)
293{
294 static char buffer[6];
295
296 switch (class) {
297 case MFI_EVT_CLASS_DEBUG:
298 return "debug";
299 case MFI_EVT_CLASS_PROGRESS:
300 return "progress";
301 case MFI_EVT_CLASS_INFO:
302 return "info";
303 case MFI_EVT_CLASS_WARNING:
304 return "WARN";
305 case MFI_EVT_CLASS_CRITICAL:
306 return "CRIT";
307 case MFI_EVT_CLASS_FATAL:
308 return "FATAL";
309 case MFI_EVT_CLASS_DEAD:
310 return "DEAD";
311 default:
312 snprintf(buffer, sizeof(buffer), "%d", class);
313 return buffer;
314 }
315}
316
317/**
318 * megasas_decode_evt: Decode FW AEN event and print critical event
319 * for information.
320 * @instance: Adapter soft state
321 */
322static void
323megasas_decode_evt(struct megasas_instance *instance)
324{
325 struct megasas_evt_detail *evt_detail = instance->evt_detail;
326 union megasas_evt_class_locale class_locale;
327 class_locale.word = le32_to_cpu(evt_detail->cl.word);
328
329 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
330 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
331 le32_to_cpu(evt_detail->seq_num),
332 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
333 (class_locale.members.locale),
334 format_class(class_locale.members.class),
335 evt_detail->description);
336}
337
1341c939 338/**
0d49016b 339* The following functions are defined for xscale
1341c939
SP		 340* (deviceid : 1064R, PERC5) controllers
341*/
342
c4a3e0a5 343/**
1341c939 344 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 345 * @regs: MFI register set
346 */
347static inline void
d46a3ad6 348megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 349{
d46a3ad6 350 struct megasas_register_set __iomem *regs;
da0dc9fb 351
d46a3ad6 352 regs = instance->reg_set;
39a98554 353 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 354
355 /* Dummy readl to force pci flush */
356 readl(&regs->outbound_intr_mask);
357}
358
b274cab7
SP		 359/**
360 * megasas_disable_intr_xscale -Disables interrupt
361 * @regs: MFI register set
362 */
363static inline void
d46a3ad6 364megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 365{
d46a3ad6 366 struct megasas_register_set __iomem *regs;
b274cab7 367 u32 mask = 0x1f;
da0dc9fb 368
d46a3ad6 369 regs = instance->reg_set;
b274cab7
SP		 370 writel(mask, &regs->outbound_intr_mask);
371 /* Dummy readl to force pci flush */
372 readl(&regs->outbound_intr_mask);
373}
374
1341c939
SP		 375/**
376 * megasas_read_fw_status_reg_xscale - returns the current FW status value
377 * @regs: MFI register set
378 */
379static u32
380megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
381{
382 return readl(&(regs)->outbound_msg_0);
383}
384/**
385 * megasas_clear_interrupt_xscale - Check & clear interrupt
386 * @regs: MFI register set
387 */
0d49016b 388static int
1341c939
SP		 389megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
390{
391 u32 status;
39a98554 392 u32 mfiStatus = 0;
da0dc9fb 393
1341c939
SP		 394 /*
395 * Check if it is our interrupt
396 */
397 status = readl(&regs->outbound_intr_status);
398
39a98554 399 if (status & MFI_OB_INTR_STATUS_MASK)
400 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
401 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
402 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 403
404 /*
405 * Clear the interrupt by writing back the same value
406 */
39a98554 407 if (mfiStatus)
408 writel(status, &regs->outbound_intr_status);
1341c939 409
06f579de
YB		 410 /* Dummy readl to force pci flush */
411 readl(&regs->outbound_intr_status);
412
39a98554 413 return mfiStatus;
1341c939
SP		 414}
415
416/**
417 * megasas_fire_cmd_xscale - Sends command to the FW
418 * @frame_phys_addr : Physical address of cmd
419 * @frame_count : Number of frames for the command
420 * @regs : MFI register set
421 */
0d49016b 422static inline void
0c79e681
YB		 423megasas_fire_cmd_xscale(struct megasas_instance *instance,
424 dma_addr_t frame_phys_addr,
425 u32 frame_count,
426 struct megasas_register_set __iomem *regs)
1341c939 427{
39a98554 428 unsigned long flags;
da0dc9fb 429
39a98554 430 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 431 writel((frame_phys_addr >> 3)|(frame_count),
432 &(regs)->inbound_queue_port);
39a98554 433 spin_unlock_irqrestore(&instance->hba_lock, flags);
434}
435
436/**
437 * megasas_adp_reset_xscale - For controller reset
438 * @regs: MFI register set
439 */
440static int
441megasas_adp_reset_xscale(struct megasas_instance *instance,
442 struct megasas_register_set __iomem *regs)
443{
444 u32 i;
445 u32 pcidata;
da0dc9fb 446
39a98554 447 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
448
449 for (i = 0; i < 3; i++)
450 msleep(1000); /* sleep for 3 secs */
451 pcidata = 0;
452 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 453 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 454 if (pcidata & 0x2) {
1be18254 455 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 456 pcidata &= ~0x2;
457 pci_write_config_dword(instance->pdev,
458 MFI_1068_PCSR_OFFSET, pcidata);
459
460 for (i = 0; i < 2; i++)
461 msleep(1000); /* need to wait 2 secs again */
462
463 pcidata = 0;
464 pci_read_config_dword(instance->pdev,
465 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 466 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 467 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 468 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 469 pcidata = 0;
470 pci_write_config_dword(instance->pdev,
471 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
472 }
473 }
474 return 0;
475}
476
477/**
478 * megasas_check_reset_xscale - For controller reset check
479 * @regs: MFI register set
480 */
481static int
482megasas_check_reset_xscale(struct megasas_instance *instance,
483 struct megasas_register_set __iomem *regs)
484{
8a01a41d 485 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 486 (le32_to_cpu(*instance->consumer) ==
487 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 488 return 1;
39a98554 489 return 0;
1341c939
SP		 490}
491
492static struct megasas_instance_template megasas_instance_template_xscale = {
493
494 .fire_cmd = megasas_fire_cmd_xscale,
495 .enable_intr = megasas_enable_intr_xscale,
b274cab7 496 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 497 .clear_intr = megasas_clear_intr_xscale,
498 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 499 .adp_reset = megasas_adp_reset_xscale,
500 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 501 .service_isr = megasas_isr,
502 .tasklet = megasas_complete_cmd_dpc,
503 .init_adapter = megasas_init_adapter_mfi,
504 .build_and_issue_cmd = megasas_build_and_issue_cmd,
505 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 506};
507
508/**
0d49016b 509* This is the end of set of functions & definitions specific
1341c939
SP		 510* to xscale (deviceid : 1064R, PERC5) controllers
511*/
512
f9876f0b 513/**
0d49016b 514* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 515* controllers
f9876f0b
SP		 516*/
517
518/**
519 * megasas_enable_intr_ppc - Enables interrupts
520 * @regs: MFI register set
521 */
522static inline void
d46a3ad6 523megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 524{
d46a3ad6 525 struct megasas_register_set __iomem *regs;
da0dc9fb 526
d46a3ad6 527 regs = instance->reg_set;
f9876f0b 528 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 529
39a98554 530 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 531
532 /* Dummy readl to force pci flush */
533 readl(&regs->outbound_intr_mask);
534}
535
b274cab7
SP		 536/**
537 * megasas_disable_intr_ppc - Disable interrupt
538 * @regs: MFI register set
539 */
540static inline void
d46a3ad6 541megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 542{
d46a3ad6 543 struct megasas_register_set __iomem *regs;
b274cab7 544 u32 mask = 0xFFFFFFFF;
da0dc9fb 545
d46a3ad6 546 regs = instance->reg_set;
b274cab7
SP		 547 writel(mask, &regs->outbound_intr_mask);
548 /* Dummy readl to force pci flush */
549 readl(&regs->outbound_intr_mask);
550}
551
f9876f0b
SP		 552/**
553 * megasas_read_fw_status_reg_ppc - returns the current FW status value
554 * @regs: MFI register set
555 */
556static u32
557megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
558{
559 return readl(&(regs)->outbound_scratch_pad);
560}
561
562/**
563 * megasas_clear_interrupt_ppc - Check & clear interrupt
564 * @regs: MFI register set
565 */
0d49016b 566static int
f9876f0b
SP		 567megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
568{
3cc6851f
AR		 569 u32 status, mfiStatus = 0;
570
f9876f0b
SP		 571 /*
572 * Check if it is our interrupt
573 */
574 status = readl(&regs->outbound_intr_status);
575
3cc6851f
AR		 576 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
577 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
578
579 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
580 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 581
582 /*
583 * Clear the interrupt by writing back the same value
584 */
585 writel(status, &regs->outbound_doorbell_clear);
586
06f579de
YB		 587 /* Dummy readl to force pci flush */
588 readl(&regs->outbound_doorbell_clear);
589
3cc6851f 590 return mfiStatus;
f9876f0b 591}
3cc6851f 592
f9876f0b
SP		 593/**
594 * megasas_fire_cmd_ppc - Sends command to the FW
595 * @frame_phys_addr : Physical address of cmd
596 * @frame_count : Number of frames for the command
597 * @regs : MFI register set
598 */
0d49016b 599static inline void
0c79e681
YB		 600megasas_fire_cmd_ppc(struct megasas_instance *instance,
601 dma_addr_t frame_phys_addr,
602 u32 frame_count,
603 struct megasas_register_set __iomem *regs)
f9876f0b 604{
39a98554 605 unsigned long flags;
da0dc9fb 606
39a98554 607 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 608 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 609 &(regs)->inbound_queue_port);
39a98554 610 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 611}
612
39a98554 613/**
614 * megasas_check_reset_ppc - For controller reset check
615 * @regs: MFI register set
616 */
617static int
618megasas_check_reset_ppc(struct megasas_instance *instance,
619 struct megasas_register_set __iomem *regs)
620{
8a01a41d 621 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 622 return 1;
623
39a98554 624 return 0;
625}
3cc6851f 626
f9876f0b 627static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 628
f9876f0b
SP		 629 .fire_cmd = megasas_fire_cmd_ppc,
630 .enable_intr = megasas_enable_intr_ppc,
b274cab7 631 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 632 .clear_intr = megasas_clear_intr_ppc,
633 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 634 .adp_reset = megasas_adp_reset_xscale,
39a98554 635 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 636 .service_isr = megasas_isr,
637 .tasklet = megasas_complete_cmd_dpc,
638 .init_adapter = megasas_init_adapter_mfi,
639 .build_and_issue_cmd = megasas_build_and_issue_cmd,
640 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 641};
642
87911122
YB		 643/**
644 * megasas_enable_intr_skinny - Enables interrupts
645 * @regs: MFI register set
646 */
647static inline void
d46a3ad6 648megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 649{
d46a3ad6 650 struct megasas_register_set __iomem *regs;
da0dc9fb 651
d46a3ad6 652 regs = instance->reg_set;
87911122
YB		 653 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
654
655 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
656
657 /* Dummy readl to force pci flush */
658 readl(&regs->outbound_intr_mask);
659}
660
661/**
662 * megasas_disable_intr_skinny - Disables interrupt
663 * @regs: MFI register set
664 */
665static inline void
d46a3ad6 666megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 667{
d46a3ad6 668 struct megasas_register_set __iomem *regs;
87911122 669 u32 mask = 0xFFFFFFFF;
da0dc9fb 670
d46a3ad6 671 regs = instance->reg_set;
87911122
YB		 672 writel(mask, &regs->outbound_intr_mask);
673 /* Dummy readl to force pci flush */
674 readl(&regs->outbound_intr_mask);
675}
676
677/**
678 * megasas_read_fw_status_reg_skinny - returns the current FW status value
679 * @regs: MFI register set
680 */
681static u32
682megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
683{
684 return readl(&(regs)->outbound_scratch_pad);
685}
686
687/**
688 * megasas_clear_interrupt_skinny - Check & clear interrupt
689 * @regs: MFI register set
690 */
691static int
692megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
693{
694 u32 status;
ebf054b0
AR		 695 u32 mfiStatus = 0;
696
87911122
YB		 697 /*
698 * Check if it is our interrupt
699 */
700 status = readl(&regs->outbound_intr_status);
701
702 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 703 return 0;
87911122
YB		 704 }
705
ebf054b0
AR		 706 /*
707 * Check if it is our interrupt
708 */
a3fda7dd 709 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 710 MFI_STATE_FAULT) {
711 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
712 } else
713 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
714
87911122
YB		 715 /*
716 * Clear the interrupt by writing back the same value
717 */
718 writel(status, &regs->outbound_intr_status);
719
720 /*
da0dc9fb
BH		 721 * dummy read to flush PCI
722 */
87911122
YB		 723 readl(&regs->outbound_intr_status);
724
ebf054b0 725 return mfiStatus;
87911122
YB		 726}
727
728/**
729 * megasas_fire_cmd_skinny - Sends command to the FW
730 * @frame_phys_addr : Physical address of cmd
731 * @frame_count : Number of frames for the command
732 * @regs : MFI register set
733 */
734static inline void
0c79e681
YB		 735megasas_fire_cmd_skinny(struct megasas_instance *instance,
736 dma_addr_t frame_phys_addr,
737 u32 frame_count,
87911122
YB		 738 struct megasas_register_set __iomem *regs)
739{
0c79e681 740 unsigned long flags;
da0dc9fb 741
39a98554 742 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 743 writel(upper_32_bits(frame_phys_addr),
744 &(regs)->inbound_high_queue_port);
745 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
746 &(regs)->inbound_low_queue_port);
b99dbe56 747 mmiowb();
39a98554 748 spin_unlock_irqrestore(&instance->hba_lock, flags);
749}
750
39a98554 751/**
752 * megasas_check_reset_skinny - For controller reset check
753 * @regs: MFI register set
754 */
755static int
756megasas_check_reset_skinny(struct megasas_instance *instance,
757 struct megasas_register_set __iomem *regs)
758{
8a01a41d 759 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 760 return 1;
761
39a98554 762 return 0;
87911122
YB		 763}
764
765static struct megasas_instance_template megasas_instance_template_skinny = {
766
767 .fire_cmd = megasas_fire_cmd_skinny,
768 .enable_intr = megasas_enable_intr_skinny,
769 .disable_intr = megasas_disable_intr_skinny,
770 .clear_intr = megasas_clear_intr_skinny,
771 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 772 .adp_reset = megasas_adp_reset_gen2,
39a98554 773 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 774 .service_isr = megasas_isr,
775 .tasklet = megasas_complete_cmd_dpc,
776 .init_adapter = megasas_init_adapter_mfi,
777 .build_and_issue_cmd = megasas_build_and_issue_cmd,
778 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 779};
780
781
6610a6b3
YB		 782/**
783* The following functions are defined for gen2 (deviceid : 0x78 0x79)
784* controllers
785*/
786
787/**
788 * megasas_enable_intr_gen2 - Enables interrupts
789 * @regs: MFI register set
790 */
791static inline void
d46a3ad6 792megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 793{
d46a3ad6 794 struct megasas_register_set __iomem *regs;
da0dc9fb 795
d46a3ad6 796 regs = instance->reg_set;
6610a6b3
YB		 797 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
798
799 /* write ~0x00000005 (4 & 1) to the intr mask*/
800 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
801
802 /* Dummy readl to force pci flush */
803 readl(&regs->outbound_intr_mask);
804}
805
806/**
807 * megasas_disable_intr_gen2 - Disables interrupt
808 * @regs: MFI register set
809 */
810static inline void
d46a3ad6 811megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 812{
d46a3ad6 813 struct megasas_register_set __iomem *regs;
6610a6b3 814 u32 mask = 0xFFFFFFFF;
da0dc9fb 815
d46a3ad6 816 regs = instance->reg_set;
6610a6b3
YB		 817 writel(mask, &regs->outbound_intr_mask);
818 /* Dummy readl to force pci flush */
819 readl(&regs->outbound_intr_mask);
820}
821
822/**
823 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
824 * @regs: MFI register set
825 */
826static u32
827megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
828{
829 return readl(&(regs)->outbound_scratch_pad);
830}
831
832/**
833 * megasas_clear_interrupt_gen2 - Check & clear interrupt
834 * @regs: MFI register set
835 */
836static int
837megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
838{
839 u32 status;
39a98554 840 u32 mfiStatus = 0;
da0dc9fb 841
6610a6b3
YB		 842 /*
843 * Check if it is our interrupt
844 */
845 status = readl(&regs->outbound_intr_status);
846
b5bccadd 847 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 848 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
849 }
850 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
851 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
852 }
6610a6b3
YB		 853
854 /*
855 * Clear the interrupt by writing back the same value
856 */
39a98554 857 if (mfiStatus)
858 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 859
860 /* Dummy readl to force pci flush */
861 readl(&regs->outbound_intr_status);
862
39a98554 863 return mfiStatus;
6610a6b3
YB		 864}
865/**
866 * megasas_fire_cmd_gen2 - Sends command to the FW
867 * @frame_phys_addr : Physical address of cmd
868 * @frame_count : Number of frames for the command
869 * @regs : MFI register set
870 */
871static inline void
0c79e681
YB		 872megasas_fire_cmd_gen2(struct megasas_instance *instance,
873 dma_addr_t frame_phys_addr,
874 u32 frame_count,
6610a6b3
YB		 875 struct megasas_register_set __iomem *regs)
876{
39a98554 877 unsigned long flags;
da0dc9fb 878
39a98554 879 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 880 writel((frame_phys_addr | (frame_count<<1))|1,
881 &(regs)->inbound_queue_port);
39a98554 882 spin_unlock_irqrestore(&instance->hba_lock, flags);
883}
884
885/**
886 * megasas_adp_reset_gen2 - For controller reset
887 * @regs: MFI register set
888 */
889static int
890megasas_adp_reset_gen2(struct megasas_instance *instance,
891 struct megasas_register_set __iomem *reg_set)
892{
da0dc9fb
BH		 893 u32 retry = 0 ;
894 u32 HostDiag;
895 u32 __iomem *seq_offset = &reg_set->seq_offset;
896 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 897
898 if (instance->instancet == &megasas_instance_template_skinny) {
899 seq_offset = &reg_set->fusion_seq_offset;
900 hostdiag_offset = &reg_set->fusion_host_diag;
901 }
902
903 writel(0, seq_offset);
904 writel(4, seq_offset);
905 writel(0xb, seq_offset);
906 writel(2, seq_offset);
907 writel(7, seq_offset);
908 writel(0xd, seq_offset);
39a98554 909
39a98554 910 msleep(1000);
911
ebf054b0 912 HostDiag = (u32)readl(hostdiag_offset);
39a98554 913
da0dc9fb 914 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 915 msleep(100);
ebf054b0 916 HostDiag = (u32)readl(hostdiag_offset);
1be18254 917 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 918 retry, HostDiag);
919
920 if (retry++ >= 100)
921 return 1;
922
923 }
924
1be18254 925 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 926
ebf054b0 927 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 928
929 ssleep(10);
930
ebf054b0 931 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 932 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 933 msleep(100);
ebf054b0 934 HostDiag = (u32)readl(hostdiag_offset);
1be18254 935 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 936 retry, HostDiag);
937
938 if (retry++ >= 1000)
939 return 1;
940
941 }
942 return 0;
943}
944
945/**
946 * megasas_check_reset_gen2 - For controller reset check
947 * @regs: MFI register set
948 */
949static int
950megasas_check_reset_gen2(struct megasas_instance *instance,
951 struct megasas_register_set __iomem *regs)
952{
8a01a41d 953 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 954 return 1;
707e09bd 955
39a98554 956 return 0;
6610a6b3
YB		 957}
958
959static struct megasas_instance_template megasas_instance_template_gen2 = {
960
961 .fire_cmd = megasas_fire_cmd_gen2,
962 .enable_intr = megasas_enable_intr_gen2,
963 .disable_intr = megasas_disable_intr_gen2,
964 .clear_intr = megasas_clear_intr_gen2,
965 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 966 .adp_reset = megasas_adp_reset_gen2,
967 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 968 .service_isr = megasas_isr,
969 .tasklet = megasas_complete_cmd_dpc,
970 .init_adapter = megasas_init_adapter_mfi,
971 .build_and_issue_cmd = megasas_build_and_issue_cmd,
972 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 973};
974
f9876f0b
SP		 975/**
976* This is the end of set of functions & definitions
39a98554 977* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 978*/
979
9c915a8c
AR		 980/*
981 * Template added for TB (Fusion)
982 */
983extern struct megasas_instance_template megasas_instance_template_fusion;
984
c4a3e0a5
BS		 985/**
986 * megasas_issue_polled - Issues a polling command
987 * @instance: Adapter soft state
0d49016b 988 * @cmd: Command packet to be issued
c4a3e0a5 989 *
2be2a988 990 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 991 */
9c915a8c 992int
c4a3e0a5
BS		 993megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
994{
c4a3e0a5
BS		 995 struct megasas_header *frame_hdr = &cmd->frame->hdr;
996
6d40afbc 997 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 998 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 999
f4fc2093 1000 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1001 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1002 __func__, __LINE__);
1003 return DCMD_NOT_FIRED;
1004 }
c4a3e0a5 1005
f4fc2093
S		 1006 instance->instancet->issue_dcmd(instance, cmd);
1007
6d40afbc
SS		 1008 return wait_and_poll(instance, cmd, instance->requestorId ?
1009 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS		 1010}
1011
1012/**
1013 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1014 * @instance: Adapter soft state
1015 * @cmd: Command to be issued
cfbe7554 1016 * @timeout: Timeout in seconds
c4a3e0a5
BS		 1017 *
1018 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1019 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1020 * Used to issue ioctl commands.
1021 */
90dc9d98 1022int
c4a3e0a5 1023megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1024 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1025{
cfbe7554 1026 int ret = 0;
2be2a988 1027 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1028
f4fc2093 1029 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1030 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1031 __func__, __LINE__);
1032 return DCMD_NOT_FIRED;
1033 }
1034
f4fc2093
S		 1035 instance->instancet->issue_dcmd(instance, cmd);
1036
cfbe7554
SS		 1037 if (timeout) {
1038 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1039 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS		 1040 if (!ret) {
1041 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1042 __func__, __LINE__);
1043 return DCMD_TIMEOUT;
1044 }
cfbe7554
SS		 1045 } else
1046 wait_event(instance->int_cmd_wait_q,
2be2a988 1047 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1048
2be2a988 1049 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1050 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1051}
1052
1053/**
1054 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1055 * @instance: Adapter soft state
1056 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1057 * @timeout: Timeout in seconds
c4a3e0a5 1058 *
cfbe7554 1059 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1060 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 1061 * cmd and waits for return status.
1062 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1063 */
1064static int
1065megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1066 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 1067{
1068 struct megasas_cmd *cmd;
1069 struct megasas_abort_frame *abort_fr;
cfbe7554 1070 int ret = 0;
c4a3e0a5
BS		 1071
1072 cmd = megasas_get_cmd(instance);
1073
1074 if (!cmd)
1075 return -1;
1076
1077 abort_fr = &cmd->frame->abort;
1078
1079 /*
1080 * Prepare and issue the abort frame
1081 */
1082 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1083 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1084 abort_fr->flags = cpu_to_le16(0);
1085 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1086 abort_fr->abort_mfi_phys_addr_lo =
1087 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1088 abort_fr->abort_mfi_phys_addr_hi =
1089 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1090
1091 cmd->sync_cmd = 1;
2be2a988 1092 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1093
f4fc2093 1094 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1095 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1096 __func__, __LINE__);
1097 return DCMD_NOT_FIRED;
1098 }
c4a3e0a5 1099
f4fc2093
S		 1100 instance->instancet->issue_dcmd(instance, cmd);
1101
cfbe7554
SS		 1102 if (timeout) {
1103 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1104 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1105 if (!ret) {
6d40afbc
SS		 1106 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1107 __func__, __LINE__);
1108 return DCMD_TIMEOUT;
cfbe7554
SS		 1109 }
1110 } else
1111 wait_event(instance->abort_cmd_wait_q,
2be2a988 1112 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1113
39a98554 1114 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1115
1116 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 1117 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1118 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1119}
1120
1121/**
1122 * megasas_make_sgl32 - Prepares 32-bit SGL
1123 * @instance: Adapter soft state
1124 * @scp: SCSI command from the mid-layer
1125 * @mfi_sgl: SGL to be filled in
1126 *
1127 * If successful, this function returns the number of SG elements. Otherwise,
1128 * it returnes -1.
1129 */
858119e1 1130static int
c4a3e0a5
BS		 1131megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1132 union megasas_sgl *mfi_sgl)
1133{
1134 int i;
1135 int sge_count;
1136 struct scatterlist *os_sgl;
1137
155d98f0
FT		 1138 sge_count = scsi_dma_map(scp);
1139 BUG_ON(sge_count < 0);
c4a3e0a5 1140
155d98f0
FT		 1141 if (sge_count) {
1142 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1143 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1144 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1145 }
c4a3e0a5 1146 }
c4a3e0a5
BS		 1147 return sge_count;
1148}
1149
1150/**
1151 * megasas_make_sgl64 - Prepares 64-bit SGL
1152 * @instance: Adapter soft state
1153 * @scp: SCSI command from the mid-layer
1154 * @mfi_sgl: SGL to be filled in
1155 *
1156 * If successful, this function returns the number of SG elements. Otherwise,
1157 * it returnes -1.
1158 */
858119e1 1159static int
c4a3e0a5
BS		 1160megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1161 union megasas_sgl *mfi_sgl)
1162{
1163 int i;
1164 int sge_count;
1165 struct scatterlist *os_sgl;
1166
155d98f0
FT		 1167 sge_count = scsi_dma_map(scp);
1168 BUG_ON(sge_count < 0);
c4a3e0a5 1169
155d98f0
FT		 1170 if (sge_count) {
1171 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1172 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1173 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1174 }
c4a3e0a5 1175 }
c4a3e0a5
BS		 1176 return sge_count;
1177}
1178
f4c9a131
YB		 1179/**
1180 * megasas_make_sgl_skinny - Prepares IEEE SGL
1181 * @instance: Adapter soft state
1182 * @scp: SCSI command from the mid-layer
1183 * @mfi_sgl: SGL to be filled in
1184 *
1185 * If successful, this function returns the number of SG elements. Otherwise,
1186 * it returnes -1.
1187 */
1188static int
1189megasas_make_sgl_skinny(struct megasas_instance *instance,
1190 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1191{
1192 int i;
1193 int sge_count;
1194 struct scatterlist *os_sgl;
1195
1196 sge_count = scsi_dma_map(scp);
1197
1198 if (sge_count) {
1199 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1200 mfi_sgl->sge_skinny[i].length =
1201 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1202 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1203 cpu_to_le64(sg_dma_address(os_sgl));
1204 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1205 }
1206 }
1207 return sge_count;
1208}
1209
b1df99d9
SP		 1210 /**
1211 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1212 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1213 * @sge_count : number of sg elements
1214 *
1215 * Returns the number of frames required for numnber of sge's (sge_count)
1216 */
1217
f4c9a131
YB		 1218static u32 megasas_get_frame_count(struct megasas_instance *instance,
1219 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1220{
1221 int num_cnt;
1222 int sge_bytes;
1223 u32 sge_sz;
da0dc9fb 1224 u32 frame_count = 0;
b1df99d9
SP		 1225
1226 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1227 sizeof(struct megasas_sge32);
1228
f4c9a131
YB		 1229 if (instance->flag_ieee) {
1230 sge_sz = sizeof(struct megasas_sge_skinny);
1231 }
1232
b1df99d9 1233 /*
d532dbe2 1234 * Main frame can contain 2 SGEs for 64-bit SGLs and
1235 * 3 SGEs for 32-bit SGLs for ldio &
1236 * 1 SGEs for 64-bit SGLs and
1237 * 2 SGEs for 32-bit SGLs for pthru frame
1238 */
1239 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1240 if (instance->flag_ieee == 1) {
1241 num_cnt = sge_count - 1;
1242 } else if (IS_DMA64)
d532dbe2 1243 num_cnt = sge_count - 1;
1244 else
1245 num_cnt = sge_count - 2;
1246 } else {
f4c9a131
YB		 1247 if (instance->flag_ieee == 1) {
1248 num_cnt = sge_count - 1;
1249 } else if (IS_DMA64)
d532dbe2 1250 num_cnt = sge_count - 2;
1251 else
1252 num_cnt = sge_count - 3;
1253 }
b1df99d9 1254
da0dc9fb 1255 if (num_cnt > 0) {
b1df99d9
SP		 1256 sge_bytes = sge_sz * num_cnt;
1257
1258 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1259 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1260 }
1261 /* Main frame */
da0dc9fb 1262 frame_count += 1;
b1df99d9
SP		 1263
1264 if (frame_count > 7)
1265 frame_count = 8;
1266 return frame_count;
1267}
1268
c4a3e0a5
BS		 1269/**
1270 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1271 * @instance: Adapter soft state
1272 * @scp: SCSI command
1273 * @cmd: Command to be prepared in
1274 *
1275 * This function prepares CDB commands. These are typcially pass-through
1276 * commands to the devices.
1277 */
858119e1 1278static int
c4a3e0a5
BS		 1279megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1280 struct megasas_cmd *cmd)
1281{
c4a3e0a5
BS		 1282 u32 is_logical;
1283 u32 device_id;
1284 u16 flags = 0;
1285 struct megasas_pthru_frame *pthru;
1286
3cabd162 1287 is_logical = MEGASAS_IS_LOGICAL(scp->device);
4a5c814d 1288 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1289 pthru = (struct megasas_pthru_frame *)cmd->frame;
1290
1291 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1292 flags = MFI_FRAME_DIR_WRITE;
1293 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1294 flags = MFI_FRAME_DIR_READ;
1295 else if (scp->sc_data_direction == PCI_DMA_NONE)
1296 flags = MFI_FRAME_DIR_NONE;
1297
f4c9a131
YB		 1298 if (instance->flag_ieee == 1) {
1299 flags |= MFI_FRAME_IEEE;
1300 }
1301
c4a3e0a5
BS		 1302 /*
1303 * Prepare the DCDB frame
1304 */
1305 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1306 pthru->cmd_status = 0x0;
1307 pthru->scsi_status = 0x0;
1308 pthru->target_id = device_id;
1309 pthru->lun = scp->device->lun;
1310 pthru->cdb_len = scp->cmd_len;
1311 pthru->timeout = 0;
780a3762 1312 pthru->pad_0 = 0;
94cd65dd
SS		 1313 pthru->flags = cpu_to_le16(flags);
1314 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1315
1316 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1317
8d568253 1318 /*
da0dc9fb
BH		 1319 * If the command is for the tape device, set the
1320 * pthru timeout to the os layer timeout value.
1321 */
8d568253
YB		 1322 if (scp->device->type == TYPE_TAPE) {
1323 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1324 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1325 else
94cd65dd 1326 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1327 }
1328
c4a3e0a5
BS		 1329 /*
1330 * Construct SGL
1331 */
f4c9a131 1332 if (instance->flag_ieee == 1) {
94cd65dd 1333 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1334 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1335 &pthru->sgl);
1336 } else if (IS_DMA64) {
94cd65dd 1337 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1338 pthru->sge_count = megasas_make_sgl64(instance, scp,
1339 &pthru->sgl);
1340 } else
1341 pthru->sge_count = megasas_make_sgl32(instance, scp,
1342 &pthru->sgl);
1343
bdc6fb8d 1344 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1345 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1346 pthru->sge_count);
1347 return 0;
1348 }
1349
c4a3e0a5
BS		 1350 /*
1351 * Sense info specific
1352 */
1353 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1354 pthru->sense_buf_phys_addr_hi =
1355 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1356 pthru->sense_buf_phys_addr_lo =
1357 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1358
c4a3e0a5
BS		 1359 /*
1360 * Compute the total number of frames this command consumes. FW uses
1361 * this number to pull sufficient number of frames from host memory.
1362 */
f4c9a131 1363 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1364 PTHRU_FRAME);
c4a3e0a5
BS		 1365
1366 return cmd->frame_count;
1367}
1368
1369/**
1370 * megasas_build_ldio - Prepares IOs to logical devices
1371 * @instance: Adapter soft state
1372 * @scp: SCSI command
fd589a8f 1373 * @cmd: Command to be prepared
c4a3e0a5
BS		 1374 *
1375 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1376 */
858119e1 1377static int
c4a3e0a5
BS		 1378megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1379 struct megasas_cmd *cmd)
1380{
c4a3e0a5
BS		 1381 u32 device_id;
1382 u8 sc = scp->cmnd[0];
1383 u16 flags = 0;
1384 struct megasas_io_frame *ldio;
1385
4a5c814d 1386 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1387 ldio = (struct megasas_io_frame *)cmd->frame;
1388
1389 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1390 flags = MFI_FRAME_DIR_WRITE;
1391 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1392 flags = MFI_FRAME_DIR_READ;
1393
f4c9a131
YB		 1394 if (instance->flag_ieee == 1) {
1395 flags |= MFI_FRAME_IEEE;
1396 }
1397
c4a3e0a5 1398 /*
b1df99d9 1399 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1400 */
1401 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1402 ldio->cmd_status = 0x0;
1403 ldio->scsi_status = 0x0;
1404 ldio->target_id = device_id;
1405 ldio->timeout = 0;
1406 ldio->reserved_0 = 0;
1407 ldio->pad_0 = 0;
94cd65dd 1408 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1409 ldio->start_lba_hi = 0;
1410 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1411
1412 /*
1413 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1414 */
1415 if (scp->cmd_len == 6) {
94cd65dd
SS		 1416 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1417 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1418 ((u32) scp->cmnd[2] << 8) |
1419 (u32) scp->cmnd[3]);
c4a3e0a5 1420
94cd65dd 1421 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1422 }
1423
1424 /*
1425 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1426 */
1427 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1428 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1429 ((u32) scp->cmnd[7] << 8));
1430 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1431 ((u32) scp->cmnd[3] << 16) |
1432 ((u32) scp->cmnd[4] << 8) |
1433 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1434 }
1435
1436 /*
1437 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1438 */
1439 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1440 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1441 ((u32) scp->cmnd[7] << 16) |
1442 ((u32) scp->cmnd[8] << 8) |
1443 (u32) scp->cmnd[9]);
c4a3e0a5 1444
94cd65dd
SS		 1445 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1446 ((u32) scp->cmnd[3] << 16) |
1447 ((u32) scp->cmnd[4] << 8) |
1448 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1449 }
1450
1451 /*
1452 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1453 */
1454 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1455 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1456 ((u32) scp->cmnd[11] << 16) |
1457 ((u32) scp->cmnd[12] << 8) |
1458 (u32) scp->cmnd[13]);
c4a3e0a5 1459
94cd65dd
SS		 1460 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1461 ((u32) scp->cmnd[7] << 16) |
1462 ((u32) scp->cmnd[8] << 8) |
1463 (u32) scp->cmnd[9]);
c4a3e0a5 1464
94cd65dd
SS		 1465 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1466 ((u32) scp->cmnd[3] << 16) |
1467 ((u32) scp->cmnd[4] << 8) |
1468 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1469
1470 }
1471
1472 /*
1473 * Construct SGL
1474 */
f4c9a131 1475 if (instance->flag_ieee) {
94cd65dd 1476 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1477 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1478 &ldio->sgl);
1479 } else if (IS_DMA64) {
94cd65dd 1480 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1481 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1482 } else
1483 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1484
bdc6fb8d 1485 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1486 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1487 ldio->sge_count);
1488 return 0;
1489 }
1490
c4a3e0a5
BS		 1491 /*
1492 * Sense info specific
1493 */
1494 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1495 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1496 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1497
b1df99d9
SP		 1498 /*
1499 * Compute the total number of frames this command consumes. FW uses
1500 * this number to pull sufficient number of frames from host memory.
1501 */
f4c9a131
YB		 1502 cmd->frame_count = megasas_get_frame_count(instance,
1503 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1504
1505 return cmd->frame_count;
1506}
1507
1508/**
7497cde8
SS		 1509 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1510 * and whether it's RW or non RW
cb59aa6a 1511 * @scmd: SCSI command
0d49016b 1512 *
c4a3e0a5 1513 */
7497cde8 1514inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1515{
7497cde8
SS		 1516 int ret;
1517
cb59aa6a
SP		 1518 switch (cmd->cmnd[0]) {
1519 case READ_10:
1520 case WRITE_10:
1521 case READ_12:
1522 case WRITE_12:
1523 case READ_6:
1524 case WRITE_6:
1525 case READ_16:
1526 case WRITE_16:
3cabd162 1527 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8
SS		 1528 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1529 break;
cb59aa6a 1530 default:
3cabd162 1531 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8 1532 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1533 }
7497cde8 1534 return ret;
c4a3e0a5
BS		 1535}
1536
658dcedb
SP		 1537 /**
1538 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1539 * in FW
658dcedb
SP		 1540 * @instance: Adapter soft state
1541 */
1542static inline void
1543megasas_dump_pending_frames(struct megasas_instance *instance)
1544{
1545 struct megasas_cmd *cmd;
1546 int i,n;
1547 union megasas_sgl *mfi_sgl;
1548 struct megasas_io_frame *ldio;
1549 struct megasas_pthru_frame *pthru;
1550 u32 sgcount;
1551 u32 max_cmd = instance->max_fw_cmds;
1552
1be18254
BH		 1553 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1554 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1555 if (IS_DMA64)
1be18254 1556 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1557 else
1be18254 1558 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1559
1be18254 1560 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1561 for (i = 0; i < max_cmd; i++) {
1562 cmd = instance->cmd_list[i];
da0dc9fb 1563 if (!cmd->scmd)
658dcedb 1564 continue;
1be18254 1565 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1566 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1567 ldio = (struct megasas_io_frame *)cmd->frame;
1568 mfi_sgl = &ldio->sgl;
1569 sgcount = ldio->sge_count;
1be18254 1570 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1571 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1572 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1573 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1574 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1575 } else {
658dcedb
SP		 1576 pthru = (struct megasas_pthru_frame *) cmd->frame;
1577 mfi_sgl = &pthru->sgl;
1578 sgcount = pthru->sge_count;
1be18254 1579 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1580 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1581 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1582 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1583 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1584 }
da0dc9fb
BH		 1585 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1586 for (n = 0; n < sgcount; n++) {
1587 if (IS_DMA64)
1588 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1589 le32_to_cpu(mfi_sgl->sge64[n].length),
1590 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1591 else
1592 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1593 le32_to_cpu(mfi_sgl->sge32[n].length),
1594 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1595 }
1596 }
658dcedb 1597 } /*for max_cmd*/
1be18254 1598 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1599 for (i = 0; i < max_cmd; i++) {
1600
1601 cmd = instance->cmd_list[i];
1602
da0dc9fb 1603 if (cmd->sync_cmd == 1)
1be18254 1604 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1605 }
1be18254 1606 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1607}
1608
cd50ba8e
AR		 1609u32
1610megasas_build_and_issue_cmd(struct megasas_instance *instance,
1611 struct scsi_cmnd *scmd)
1612{
1613 struct megasas_cmd *cmd;
1614 u32 frame_count;
1615
1616 cmd = megasas_get_cmd(instance);
1617 if (!cmd)
1618 return SCSI_MLQUEUE_HOST_BUSY;
1619
1620 /*
1621 * Logical drive command
1622 */
7497cde8 1623 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1624 frame_count = megasas_build_ldio(instance, scmd, cmd);
1625 else
1626 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1627
1628 if (!frame_count)
1629 goto out_return_cmd;
1630
1631 cmd->scmd = scmd;
1632 scmd->SCp.ptr = (char *)cmd;
1633
1634 /*
1635 * Issue the command to the FW
1636 */
1637 atomic_inc(&instance->fw_outstanding);
1638
1639 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1640 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1641
1642 return 0;
1643out_return_cmd:
1644 megasas_return_cmd(instance, cmd);
f9a9dee6 1645 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e
AR		 1646}
1647
1648
c4a3e0a5
BS		 1649/**
1650 * megasas_queue_command - Queue entry point
1651 * @scmd: SCSI command to be queued
1652 * @done: Callback entry point
1653 */
1654static int
fb1a24ff 1655megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1656{
c4a3e0a5 1657 struct megasas_instance *instance;
18365b13 1658 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS		 1659
1660 instance = (struct megasas_instance *)
1661 scmd->device->host->hostdata;
af37acfb 1662
aa00832b
SS		 1663 if (instance->unload == 1) {
1664 scmd->result = DID_NO_CONNECT << 16;
1665 scmd->scsi_done(scmd);
1666 return 0;
1667 }
1668
39a98554 1669 if (instance->issuepend_done == 0)
af37acfb
SP		 1670 return SCSI_MLQUEUE_HOST_BUSY;
1671
b09e66da 1672
229fe47c 1673 /* Check for an mpio path and adjust behavior */
8a01a41d 1674 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1675 if (megasas_check_mpio_paths(instance, scmd) ==
f55cf47d 1676 (DID_REQUEUE << 16)) {
229fe47c
AR		 1677 return SCSI_MLQUEUE_HOST_BUSY;
1678 } else {
229fe47c 1679 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1680 scmd->scsi_done(scmd);
229fe47c
AR		 1681 return 0;
1682 }
1683 }
1684
8a01a41d 1685 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1686 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1687 scmd->scsi_done(scmd);
b09e66da
SS		 1688 return 0;
1689 }
1690
18365b13
SS		 1691 mr_device_priv_data = scmd->device->hostdata;
1692 if (!mr_device_priv_data) {
18365b13
SS		 1693 scmd->result = DID_NO_CONNECT << 16;
1694 scmd->scsi_done(scmd);
1695 return 0;
1696 }
1697
8a01a41d 1698 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1699 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1700
8a01a41d 1701 if (mr_device_priv_data->tm_busy)
18365b13 1702 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1703
39a98554 1704
c4a3e0a5
BS		 1705 scmd->result = 0;
1706
3cabd162 1707 if (MEGASAS_IS_LOGICAL(scmd->device) &&
51087a86
SS		 1708 (scmd->device->id >= instance->fw_supported_vd_count ||
1709 scmd->device->lun)) {
cb59aa6a
SP		 1710 scmd->result = DID_BAD_TARGET << 16;
1711 goto out_done;
c4a3e0a5
BS		 1712 }
1713
3cabd162
S		 1714 if ((scmd->cmnd[0] == SYNCHRONIZE_CACHE) &&
1715 MEGASAS_IS_LOGICAL(scmd->device) &&
1716 (!instance->fw_sync_cache_support)) {
02b01e01
SP		 1717 scmd->result = DID_OK << 16;
1718 goto out_done;
02b01e01
SP		 1719 }
1720
f9a9dee6 1721 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1722
cb59aa6a 1723 out_done:
fb1a24ff 1724 scmd->scsi_done(scmd);
cb59aa6a 1725 return 0;
c4a3e0a5
BS		 1726}
1727
044833b5
YB		 1728static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1729{
1730 int i;
1731
1732 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1733
1734 if ((megasas_mgmt_info.instance[i]) &&
1735 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1736 return megasas_mgmt_info.instance[i];
1737 }
1738
1739 return NULL;
1740}
1741
0b48d12d 1742/*
15dd0381
S		 1743* megasas_set_dynamic_target_properties -
1744* Device property set by driver may not be static and it is required to be
1745* updated after OCR
1746*
1747* set tm_capable.
1748* set dma alignment (only for eedp protection enable vd).
0b48d12d 1749*
1750* @sdev: OS provided scsi device
1751*
1752* Returns void
1753*/
15dd0381 1754void megasas_set_dynamic_target_properties(struct scsi_device *sdev)
0b48d12d 1755{
15dd0381
S		 1756 u16 pd_index = 0, ld;
1757 u32 device_id;
0b48d12d 1758 struct megasas_instance *instance;
1759 struct fusion_context *fusion;
18365b13
SS		 1760 struct MR_PRIV_DEVICE *mr_device_priv_data;
1761 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1762 struct MR_LD_RAID *raid;
1763 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1764
1765 instance = megasas_lookup_instance(sdev->host->host_no);
1766 fusion = instance->ctrl_context;
18365b13 1767 mr_device_priv_data = sdev->hostdata;
0b48d12d 1768
ed981b81 1769 if (!fusion || !mr_device_priv_data)
0b48d12d 1770 return;
1771
ed981b81 1772 if (MEGASAS_IS_LOGICAL(sdev)) {
0b48d12d 1773 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1774 + sdev->id;
1775 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1776 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
ed981b81
S		 1777 if (ld >= instance->fw_supported_vd_count)
1778 return;
0b48d12d 1779 raid = MR_LdRaidGet(ld, local_map_ptr);
1780
1781 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
15dd0381 1782 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
ed981b81 1783
18365b13
SS		 1784 mr_device_priv_data->is_tm_capable =
1785 raid->capability.tmCapable;
ed981b81
S		 1786 } else if (instance->use_seqnum_jbod_fp) {
1787 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
15dd0381 1788 sdev->id;
ed981b81
S		 1789 pd_sync = (void *)fusion->pd_seq_sync
1790 [(instance->pd_seq_map_id - 1) & 1];
1791 mr_device_priv_data->is_tm_capable =
15dd0381 1792 pd_sync->seq[pd_index].capability.tmCapable;
0b48d12d 1793 }
1794}
1795
15dd0381
S		 1796/*
1797 * megasas_set_nvme_device_properties -
1798 * set nomerges=2
1799 * set virtual page boundary = 4K (current mr_nvme_pg_size is 4K).
1800 * set maximum io transfer = MDTS of NVME device provided by MR firmware.
1801 *
1802 * MR firmware provides value in KB. Caller of this function converts
1803 * kb into bytes.
1804 *
1805 * e.a MDTS=5 means 2^5 * nvme page size. (In case of 4K page size,
1806 * MR firmware provides value 128 as (32 * 4K) = 128K.
1807 *
1808 * @sdev: scsi device
1809 * @max_io_size: maximum io transfer size
1810 *
1811 */
1812static inline void
1813megasas_set_nvme_device_properties(struct scsi_device *sdev, u32 max_io_size)
2216c305 1814{
2216c305 1815 struct megasas_instance *instance;
15dd0381 1816 u32 mr_nvme_pg_size;
2216c305 1817
15dd0381
S		 1818 instance = (struct megasas_instance *)sdev->host->hostdata;
1819 mr_nvme_pg_size = max_t(u32, instance->nvme_page_size,
1820 MR_DEFAULT_NVME_PAGE_SIZE);
2216c305 1821
15dd0381 1822 blk_queue_max_hw_sectors(sdev->request_queue, (max_io_size / 512));
2216c305 1823
15dd0381
S		 1824 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, sdev->request_queue);
1825 blk_queue_virt_boundary(sdev->request_queue, mr_nvme_pg_size - 1);
1826}
2216c305 1827
2216c305 1828
15dd0381
S		 1829/*
1830 * megasas_set_static_target_properties -
1831 * Device property set by driver are static and it is not required to be
1832 * updated after OCR.
1833 *
1834 * set io timeout
1835 * set device queue depth
1836 * set nvme device properties. see - megasas_set_nvme_device_properties
1837 *
1838 * @sdev: scsi device
96188a89 1839 * @is_target_prop true, if fw provided target properties.
15dd0381 1840 */
96188a89
S		 1841static void megasas_set_static_target_properties(struct scsi_device *sdev,
1842 bool is_target_prop)
15dd0381
S		 1843{
1844 u16 target_index = 0;
1845 u8 interface_type;
1846 u32 device_qd = MEGASAS_DEFAULT_CMD_PER_LUN;
1847 u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB;
96188a89 1848 u32 tgt_device_qd;
15dd0381
S		 1849 struct megasas_instance *instance;
1850 struct MR_PRIV_DEVICE *mr_device_priv_data;
2216c305 1851
15dd0381
S		 1852 instance = megasas_lookup_instance(sdev->host->host_no);
1853 mr_device_priv_data = sdev->hostdata;
1854 interface_type = mr_device_priv_data->interface_type;
2216c305 1855
15dd0381
S		 1856 /*
1857 * The RAID firmware may require extended timeouts.
1858 */
1859 blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ);
2216c305 1860
15dd0381
S		 1861 target_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1862
1863 switch (interface_type) {
1864 case SAS_PD:
1865 device_qd = MEGASAS_SAS_QD;
1866 break;
1867 case SATA_PD:
1868 device_qd = MEGASAS_SATA_QD;
1869 break;
1870 case NVME_PD:
1871 device_qd = MEGASAS_NVME_QD;
1872 break;
2216c305 1873 }
15dd0381 1874
96188a89
S		 1875 if (is_target_prop) {
1876 tgt_device_qd = le32_to_cpu(instance->tgt_prop->device_qdepth);
1877 if (tgt_device_qd &&
1878 (tgt_device_qd <= instance->host->can_queue))
1879 device_qd = tgt_device_qd;
1880
1881 /* max_io_size_kb will be set to non zero for
1882 * nvme based vd and syspd.
1883 */
1884 max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb);
1885 }
1886
15dd0381
S		 1887 if (instance->nvme_page_size && max_io_size_kb)
1888 megasas_set_nvme_device_properties(sdev, (max_io_size_kb << 10));
1889
1890 scsi_change_queue_depth(sdev, device_qd);
1891
2216c305
SS		 1892}
1893
18365b13 1894
147aab6a
CH		 1895static int megasas_slave_configure(struct scsi_device *sdev)
1896{
aed335ee
SS		 1897 u16 pd_index = 0;
1898 struct megasas_instance *instance;
96188a89
S		 1899 int ret_target_prop = DCMD_FAILED;
1900 bool is_target_prop = false;
aed335ee
SS		 1901
1902 instance = megasas_lookup_instance(sdev->host->host_no);
30845586 1903 if (instance->pd_list_not_supported) {
3cabd162 1904 if (!MEGASAS_IS_LOGICAL(sdev) && sdev->type == TYPE_DISK) {
aed335ee
SS		 1905 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1906 sdev->id;
1907 if (instance->pd_list[pd_index].driveState !=
1908 MR_PD_STATE_SYSTEM)
1909 return -ENXIO;
1910 }
1911 }
18365b13 1912
15dd0381
S		 1913 mutex_lock(&instance->hba_mutex);
1914 /* Send DCMD to Firmware and cache the information */
1915 if ((instance->pd_info) && !MEGASAS_IS_LOGICAL(sdev))
1916 megasas_get_pd_info(instance, sdev);
1917
96188a89
S		 1918 /* Some ventura firmware may not have instance->nvme_page_size set.
1919 * Do not send MR_DCMD_DRV_GET_TARGET_PROP
1920 */
1921 if ((instance->tgt_prop) && (instance->nvme_page_size))
1922 ret_target_prop = megasas_get_target_prop(instance, sdev);
1923
1924 is_target_prop = (ret_target_prop == DCMD_SUCCESS) ? true : false;
1925 megasas_set_static_target_properties(sdev, is_target_prop);
15dd0381
S		 1926
1927 mutex_unlock(&instance->hba_mutex);
1928
1929 /* This sdev property may change post OCR */
1930 megasas_set_dynamic_target_properties(sdev);
07e38d94 1931
044833b5
YB		 1932 return 0;
1933}
1934
1935static int megasas_slave_alloc(struct scsi_device *sdev)
1936{
da0dc9fb 1937 u16 pd_index = 0;
044833b5 1938 struct megasas_instance *instance ;
18365b13 1939 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1940
044833b5 1941 instance = megasas_lookup_instance(sdev->host->host_no);
3cabd162 1942 if (!MEGASAS_IS_LOGICAL(sdev)) {
044833b5
YB		 1943 /*
1944 * Open the OS scan to the SYSTEM PD
1945 */
1946 pd_index =
1947 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1948 sdev->id;
30845586
SS		 1949 if ((instance->pd_list_not_supported ||
1950 instance->pd_list[pd_index].driveState ==
aed335ee 1951 MR_PD_STATE_SYSTEM)) {
18365b13 1952 goto scan_target;
044833b5
YB		 1953 }
1954 return -ENXIO;
1955 }
18365b13
SS		 1956
1957scan_target:
1958 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
1959 GFP_KERNEL);
1960 if (!mr_device_priv_data)
1961 return -ENOMEM;
1962 sdev->hostdata = mr_device_priv_data;
147aab6a
CH		 1963 return 0;
1964}
1965
18365b13
SS		 1966static void megasas_slave_destroy(struct scsi_device *sdev)
1967{
1968 kfree(sdev->hostdata);
1969 sdev->hostdata = NULL;
1970}
1971
c8dd61ef
SS		 1972/*
1973* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1974* kill adapter
1975* @instance: Adapter soft state
1976*
1977*/
6a6981fe 1978static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1979{
1980 int i;
1981 struct megasas_cmd *cmd_mfi;
1982 struct megasas_cmd_fusion *cmd_fusion;
1983 struct fusion_context *fusion = instance->ctrl_context;
1984
1985 /* Find all outstanding ioctls */
1986 if (fusion) {
1987 for (i = 0; i < instance->max_fw_cmds; i++) {
1988 cmd_fusion = fusion->cmd_list[i];
1989 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1990 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1991 if (cmd_mfi->sync_cmd &&
1992 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1993 megasas_complete_cmd(instance,
1994 cmd_mfi, DID_OK);
1995 }
1996 }
1997 } else {
1998 for (i = 0; i < instance->max_fw_cmds; i++) {
1999 cmd_mfi = instance->cmd_list[i];
2000 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
2001 MFI_CMD_ABORT)
2002 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
2003 }
2004 }
2005}
2006
2007
9c915a8c 2008void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 2009{
c8dd61ef 2010 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 2011 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS		 2012 /* Wait 1 second to ensure IO or ioctls in build have posted */
2013 msleep(1000);
39a98554 2014 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 2015 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 2016 (instance->ctrl_context)) {
da0dc9fb 2017 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c
AR		 2018 /* Flush */
2019 readl(&instance->reg_set->doorbell);
8f67c8c5 2020 if (instance->requestorId && instance->peerIsPresent)
229fe47c 2021 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 2022 } else {
c8dd61ef
SS		 2023 writel(MFI_STOP_ADP,
2024 &instance->reg_set->inbound_doorbell);
9c915a8c 2025 }
c8dd61ef
SS		 2026 /* Complete outstanding ioctls when adapter is killed */
2027 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 2028}
2029
2030 /**
2031 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
2032 * restored to max value
2033 * @instance: Adapter soft state
2034 *
2035 */
2036void
2037megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
2038{
2039 unsigned long flags;
ae09a6c1 2040
9c915a8c 2041 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 2042 && time_after(jiffies, instance->last_time + 5 * HZ)
2043 && atomic_read(&instance->fw_outstanding) <
2044 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 2045
2046 spin_lock_irqsave(instance->host->host_lock, flags);
2047 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 2048
308ec459 2049 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 2050 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 2051 }
2052}
2053
7343eb65 2054/**
2055 * megasas_complete_cmd_dpc - Returns FW's controller structure
2056 * @instance_addr: Address of adapter soft state
2057 *
2058 * Tasklet to complete cmds
2059 */
2060static void megasas_complete_cmd_dpc(unsigned long instance_addr)
2061{
2062 u32 producer;
2063 u32 consumer;
2064 u32 context;
2065 struct megasas_cmd *cmd;
2066 struct megasas_instance *instance =
2067 (struct megasas_instance *)instance_addr;
2068 unsigned long flags;
2069
2070 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 2071 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 2072 return;
2073
2074 spin_lock_irqsave(&instance->completion_lock, flags);
2075
94cd65dd
SS		 2076 producer = le32_to_cpu(*instance->producer);
2077 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2078
2079 while (consumer != producer) {
94cd65dd 2080 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2081 if (context >= instance->max_fw_cmds) {
1be18254 2082 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2083 context);
2084 BUG();
2085 }
7343eb65 2086
2087 cmd = instance->cmd_list[context];
2088
2089 megasas_complete_cmd(instance, cmd, DID_OK);
2090
2091 consumer++;
2092 if (consumer == (instance->max_fw_cmds + 1)) {
2093 consumer = 0;
2094 }
2095 }
2096
94cd65dd 2097 *instance->consumer = cpu_to_le32(producer);
7343eb65 2098
2099 spin_unlock_irqrestore(&instance->completion_lock, flags);
2100
2101 /*
2102 * Check if we can restore can_queue
2103 */
9c915a8c 2104 megasas_check_and_restore_queue_depth(instance);
7343eb65 2105}
2106
229fe47c
AR		 2107/**
2108 * megasas_start_timer - Initializes a timer object
2109 * @instance: Adapter soft state
2110 * @timer: timer object to be initialized
2111 * @fn: timer function
2112 * @interval: time interval between timer function call
2113 *
2114 */
2115void megasas_start_timer(struct megasas_instance *instance,
2116 struct timer_list *timer,
2117 void *fn, unsigned long interval)
2118{
2119 init_timer(timer);
2120 timer->expires = jiffies + interval;
2121 timer->data = (unsigned long)instance;
2122 timer->function = fn;
2123 add_timer(timer);
2124}
2125
707e09bd
YB		 2126static void
2127megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2128
2129static void
2130process_fw_state_change_wq(struct work_struct *work);
2131
2132void megasas_do_ocr(struct megasas_instance *instance)
2133{
2134 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2135 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2136 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2137 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2138 }
d46a3ad6 2139 instance->instancet->disable_intr(instance);
8a01a41d 2140 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB		 2141 instance->issuepend_done = 0;
2142
2143 atomic_set(&instance->fw_outstanding, 0);
2144 megasas_internal_reset_defer_cmds(instance);
2145 process_fw_state_change_wq(&instance->work_init);
2146}
2147
4cbfea88
AR		 2148static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2149 int initial)
229fe47c
AR		 2150{
2151 struct megasas_cmd *cmd;
2152 struct megasas_dcmd_frame *dcmd;
229fe47c 2153 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 2154 dma_addr_t new_affiliation_111_h;
2155 int ld, retval = 0;
2156 u8 thisVf;
2157
2158 cmd = megasas_get_cmd(instance);
2159
2160 if (!cmd) {
1be18254
BH		 2161 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2162 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2163 instance->host->host_no);
2164 return -ENOMEM;
2165 }
2166
2167 dcmd = &cmd->frame->dcmd;
2168
4cbfea88 2169 if (!instance->vf_affiliation_111) {
1be18254
BH		 2170 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2171 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 2172 megasas_return_cmd(instance, cmd);
2173 return -ENOMEM;
2174 }
2175
2176 if (initial)
229fe47c
AR		 2177 memset(instance->vf_affiliation_111, 0,
2178 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2179 else {
4cbfea88
AR		 2180 new_affiliation_111 =
2181 pci_alloc_consistent(instance->pdev,
2182 sizeof(struct MR_LD_VF_AFFILIATION_111),
2183 &new_affiliation_111_h);
2184 if (!new_affiliation_111) {
1be18254
BH		 2185 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2186 "memory for new affiliation for scsi%d\n",
4cbfea88 2187 instance->host->host_no);
229fe47c
AR		 2188 megasas_return_cmd(instance, cmd);
2189 return -ENOMEM;
2190 }
4cbfea88
AR		 2191 memset(new_affiliation_111, 0,
2192 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2193 }
2194
2195 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2196
2197 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2198 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2199 dcmd->sge_count = 1;
2213a467 2200 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2201 dcmd->timeout = 0;
2202 dcmd->pad_0 = 0;
2213a467
CH		 2203 dcmd->data_xfer_len =
2204 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2205 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2206
4cbfea88
AR		 2207 if (initial)
2208 dcmd->sgl.sge32[0].phys_addr =
2213a467 2209 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2210 else
2213a467
CH		 2211 dcmd->sgl.sge32[0].phys_addr =
2212 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2213
2213a467
CH		 2214 dcmd->sgl.sge32[0].length = cpu_to_le32(
2215 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2216
1be18254 2217 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 2218 "scsi%d\n", instance->host->host_no);
2219
6d40afbc 2220 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2221 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2222 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 2223 dcmd->cmd_status, instance->host->host_no);
2224 retval = 1; /* Do a scan if we couldn't get affiliation */
2225 goto out;
2226 }
2227
2228 if (!initial) {
4cbfea88
AR		 2229 thisVf = new_affiliation_111->thisVf;
2230 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2231 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2232 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 2233 dev_warn(&instance->pdev->dev, "SR-IOV: "
2234 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2235 instance->host->host_no);
4cbfea88
AR		 2236 memcpy(instance->vf_affiliation_111,
2237 new_affiliation_111,
2238 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2239 retval = 1;
2240 goto out;
2241 }
4cbfea88
AR		 2242 }
2243out:
2244 if (new_affiliation_111) {
2245 pci_free_consistent(instance->pdev,
2246 sizeof(struct MR_LD_VF_AFFILIATION_111),
2247 new_affiliation_111,
2248 new_affiliation_111_h);
2249 }
90dc9d98 2250
4026e9aa 2251 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 2252
2253 return retval;
2254}
2255
2256static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2257 int initial)
2258{
2259 struct megasas_cmd *cmd;
2260 struct megasas_dcmd_frame *dcmd;
2261 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2262 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2263 dma_addr_t new_affiliation_h;
2264 int i, j, retval = 0, found = 0, doscan = 0;
2265 u8 thisVf;
2266
2267 cmd = megasas_get_cmd(instance);
2268
2269 if (!cmd) {
1be18254
BH		 2270 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2271 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2272 instance->host->host_no);
2273 return -ENOMEM;
2274 }
2275
2276 dcmd = &cmd->frame->dcmd;
2277
2278 if (!instance->vf_affiliation) {
1be18254
BH		 2279 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2280 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2281 megasas_return_cmd(instance, cmd);
2282 return -ENOMEM;
2283 }
2284
2285 if (initial)
2286 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2287 sizeof(struct MR_LD_VF_AFFILIATION));
2288 else {
2289 new_affiliation =
2290 pci_alloc_consistent(instance->pdev,
2291 (MAX_LOGICAL_DRIVES + 1) *
2292 sizeof(struct MR_LD_VF_AFFILIATION),
2293 &new_affiliation_h);
2294 if (!new_affiliation) {
1be18254
BH		 2295 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2296 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2297 instance->host->host_no);
2298 megasas_return_cmd(instance, cmd);
2299 return -ENOMEM;
2300 }
2301 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2302 sizeof(struct MR_LD_VF_AFFILIATION));
2303 }
2304
2305 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2306
2307 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2308 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2309 dcmd->sge_count = 1;
2213a467 2310 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2311 dcmd->timeout = 0;
2312 dcmd->pad_0 = 0;
2213a467
CH		 2313 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2314 sizeof(struct MR_LD_VF_AFFILIATION));
2315 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2316
2317 if (initial)
2213a467
CH		 2318 dcmd->sgl.sge32[0].phys_addr =
2319 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2320 else
2213a467
CH		 2321 dcmd->sgl.sge32[0].phys_addr =
2322 cpu_to_le32(new_affiliation_h);
4cbfea88 2323
2213a467
CH		 2324 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2325 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2326
1be18254 2327 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2328 "scsi%d\n", instance->host->host_no);
2329
4cbfea88 2330
6d40afbc 2331 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2332 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2333 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2334 dcmd->cmd_status, instance->host->host_no);
2335 retval = 1; /* Do a scan if we couldn't get affiliation */
2336 goto out;
2337 }
2338
2339 if (!initial) {
2340 if (!new_affiliation->ldCount) {
1be18254
BH		 2341 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2342 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2343 instance->host->host_no);
2344 retval = 1;
2345 goto out;
2346 }
2347 newmap = new_affiliation->map;
2348 savedmap = instance->vf_affiliation->map;
2349 thisVf = new_affiliation->thisVf;
2350 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2351 found = 0;
2352 for (j = 0; j < instance->vf_affiliation->ldCount;
2353 j++) {
2354 if (newmap->ref.targetId ==
2355 savedmap->ref.targetId) {
2356 found = 1;
2357 if (newmap->policy[thisVf] !=
2358 savedmap->policy[thisVf]) {
2359 doscan = 1;
2360 goto out;
2361 }
229fe47c
AR		 2362 }
2363 savedmap = (struct MR_LD_VF_MAP *)
2364 ((unsigned char *)savedmap +
2365 savedmap->size);
4cbfea88
AR		 2366 }
2367 if (!found && newmap->policy[thisVf] !=
2368 MR_LD_ACCESS_HIDDEN) {
2369 doscan = 1;
2370 goto out;
2371 }
2372 newmap = (struct MR_LD_VF_MAP *)
2373 ((unsigned char *)newmap + newmap->size);
2374 }
2375
2376 newmap = new_affiliation->map;
2377 savedmap = instance->vf_affiliation->map;
2378
2379 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2380 found = 0;
2381 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2382 if (savedmap->ref.targetId ==
2383 newmap->ref.targetId) {
2384 found = 1;
2385 if (savedmap->policy[thisVf] !=
2386 newmap->policy[thisVf]) {
2387 doscan = 1;
2388 goto out;
2389 }
2390 }
229fe47c
AR		 2391 newmap = (struct MR_LD_VF_MAP *)
2392 ((unsigned char *)newmap +
2393 newmap->size);
2394 }
4cbfea88
AR		 2395 if (!found && savedmap->policy[thisVf] !=
2396 MR_LD_ACCESS_HIDDEN) {
2397 doscan = 1;
2398 goto out;
2399 }
2400 savedmap = (struct MR_LD_VF_MAP *)
2401 ((unsigned char *)savedmap +
2402 savedmap->size);
229fe47c
AR		 2403 }
2404 }
2405out:
4cbfea88 2406 if (doscan) {
1be18254
BH		 2407 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2408 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2409 memcpy(instance->vf_affiliation, new_affiliation,
2410 new_affiliation->size);
2411 retval = 1;
229fe47c 2412 }
4cbfea88
AR		 2413
2414 if (new_affiliation)
2415 pci_free_consistent(instance->pdev,
2416 (MAX_LOGICAL_DRIVES + 1) *
2417 sizeof(struct MR_LD_VF_AFFILIATION),
2418 new_affiliation, new_affiliation_h);
4026e9aa 2419 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2420
2421 return retval;
2422}
2423
4cbfea88
AR		 2424/* This function will get the current SR-IOV LD/VF affiliation */
2425static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2426 int initial)
2427{
2428 int retval;
2429
2430 if (instance->PlasmaFW111)
2431 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2432 else
2433 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2434 return retval;
2435}
2436
229fe47c
AR		 2437/* This function will tell FW to start the SR-IOV heartbeat */
2438int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2439 int initial)
2440{
2441 struct megasas_cmd *cmd;
2442 struct megasas_dcmd_frame *dcmd;
2443 int retval = 0;
2444
2445 cmd = megasas_get_cmd(instance);
2446
2447 if (!cmd) {
1be18254
BH		 2448 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2449 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2450 instance->host->host_no);
2451 return -ENOMEM;
2452 }
2453
2454 dcmd = &cmd->frame->dcmd;
2455
2456 if (initial) {
2457 instance->hb_host_mem =
7c845eb5
JP		 2458 pci_zalloc_consistent(instance->pdev,
2459 sizeof(struct MR_CTRL_HB_HOST_MEM),
2460 &instance->hb_host_mem_h);
229fe47c 2461 if (!instance->hb_host_mem) {
1be18254
BH		 2462 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2463 " memory for heartbeat host memory for scsi%d\n",
2464 instance->host->host_no);
229fe47c
AR		 2465 retval = -ENOMEM;
2466 goto out;
2467 }
229fe47c
AR		 2468 }
2469
2470 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2471
2213a467 2472 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2473 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2474 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2475 dcmd->sge_count = 1;
2213a467 2476 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2477 dcmd->timeout = 0;
2478 dcmd->pad_0 = 0;
2213a467
CH		 2479 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2480 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2481 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2482 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2483
1be18254 2484 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2485 instance->host->host_no);
2486
4026e9aa
SS		 2487 if (instance->ctrl_context && !instance->mask_interrupts)
2488 retval = megasas_issue_blocked_cmd(instance, cmd,
2489 MEGASAS_ROUTINE_WAIT_TIME_VF);
2490 else
2491 retval = megasas_issue_polled(instance, cmd);
229fe47c 2492
4026e9aa 2493 if (retval) {
2be2a988
SS		 2494 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2495 "_MEM_ALLOC DCMD %s for scsi%d\n",
2496 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2497 "timed out" : "failed", instance->host->host_no);
229fe47c 2498 retval = 1;
229fe47c
AR		 2499 }
2500
2501out:
2502 megasas_return_cmd(instance, cmd);
2503
2504 return retval;
2505}
2506
2507/* Handler for SR-IOV heartbeat */
2508void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2509{
2510 struct megasas_instance *instance =
2511 (struct megasas_instance *)instance_addr;
2512
2513 if (instance->hb_host_mem->HB.fwCounter !=
2514 instance->hb_host_mem->HB.driverCounter) {
2515 instance->hb_host_mem->HB.driverCounter =
2516 instance->hb_host_mem->HB.fwCounter;
2517 mod_timer(&instance->sriov_heartbeat_timer,
2518 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2519 } else {
1be18254 2520 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2521 "completed for scsi%d\n", instance->host->host_no);
2522 schedule_work(&instance->work_init);
2523 }
2524}
2525
c4a3e0a5
BS		 2526/**
2527 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2528 * @instance: Adapter soft state
2529 *
25985edc 2530 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2531 * complete all its outstanding commands. Returns error if one or more IOs
2532 * are pending after this time period. It also marks the controller dead.
2533 */
2534static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2535{
ccc7507d 2536 int i, sl, outstanding;
39a98554 2537 u32 reset_index;
c4a3e0a5 2538 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2539 unsigned long flags;
2540 struct list_head clist_local;
2541 struct megasas_cmd *reset_cmd;
707e09bd 2542 u32 fw_state;
39a98554 2543
ccc7507d
SS		 2544 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2545 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2546 __func__, __LINE__);
2547 return FAILED;
2548 }
39a98554 2549
8a01a41d 2550 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2551
2552 INIT_LIST_HEAD(&clist_local);
2553 spin_lock_irqsave(&instance->hba_lock, flags);
2554 list_splice_init(&instance->internal_reset_pending_q,
2555 &clist_local);
2556 spin_unlock_irqrestore(&instance->hba_lock, flags);
2557
1be18254 2558 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2559 for (i = 0; i < wait_time; i++) {
2560 msleep(1000);
8a01a41d 2561 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2562 break;
2563 }
2564
8a01a41d 2565 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2566 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2567 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2568 return FAILED;
2569 }
2570
da0dc9fb 2571 reset_index = 0;
39a98554 2572 while (!list_empty(&clist_local)) {
da0dc9fb 2573 reset_cmd = list_entry((&clist_local)->next,
39a98554 2574 struct megasas_cmd, list);
2575 list_del_init(&reset_cmd->list);
2576 if (reset_cmd->scmd) {
f55cf47d 2577 reset_cmd->scmd->result = DID_REQUEUE << 16;
1be18254 2578 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2579 reset_index, reset_cmd,
5cd049a5 2580 reset_cmd->scmd->cmnd[0]);
39a98554 2581
2582 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2583 megasas_return_cmd(instance, reset_cmd);
2584 } else if (reset_cmd->sync_cmd) {
1be18254 2585 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2586 "reset queue\n",
2587 reset_cmd);
2588
2be2a988 2589 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2590 instance->instancet->fire_cmd(instance,
2591 reset_cmd->frame_phys_addr,
2592 0, instance->reg_set);
2593 } else {
1be18254 2594 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2595 "cmds lst\n",
2596 reset_cmd);
2597 }
2598 reset_index++;
2599 }
2600
2601 return SUCCESS;
2602 }
c4a3e0a5 2603
c007b8b2 2604 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2605 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP		 2606
2607 if (!outstanding)
c4a3e0a5
BS		 2608 break;
2609
2610 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2611 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2612 "commands to complete\n",i,outstanding);
7343eb65 2613 /*
2614 * Call cmd completion routine. Cmd to be
2615 * be completed directly without depending on isr.
2616 */
2617 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2618 }
2619
2620 msleep(1000);
2621 }
2622
707e09bd 2623 i = 0;
ccc7507d
SS		 2624 outstanding = atomic_read(&instance->fw_outstanding);
2625 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2626
2627 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2628 goto no_outstanding;
2629
2630 if (instance->disableOnlineCtrlReset)
2631 goto kill_hba_and_failed;
707e09bd 2632 do {
ccc7507d
SS		 2633 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2634 dev_info(&instance->pdev->dev,
2635 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2636 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2637 if (i == 3)
2638 goto kill_hba_and_failed;
707e09bd 2639 megasas_do_ocr(instance);
707e09bd 2640
ccc7507d
SS		 2641 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2642 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2643 __func__, __LINE__);
2644 return FAILED;
2645 }
2646 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2647 __func__, __LINE__);
2648
2649 for (sl = 0; sl < 10; sl++)
2650 msleep(500);
2651
2652 outstanding = atomic_read(&instance->fw_outstanding);
2653
2654 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2655 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2656 goto no_outstanding;
707e09bd
YB		 2657 }
2658 i++;
2659 } while (i <= 3);
2660
ccc7507d 2661no_outstanding:
707e09bd 2662
ccc7507d
SS		 2663 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2664 __func__, __LINE__);
2665 return SUCCESS;
707e09bd 2666
ccc7507d 2667kill_hba_and_failed:
c4a3e0a5 2668
ccc7507d
SS		 2669 /* Reset not supported, kill adapter */
2670 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2671 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2672 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2673 atomic_read(&instance->fw_outstanding));
2674 megasas_dump_pending_frames(instance);
2675 megaraid_sas_kill_hba(instance);
39a98554 2676
ccc7507d 2677 return FAILED;
c4a3e0a5
BS		 2678}
2679
2680/**
2681 * megasas_generic_reset - Generic reset routine
2682 * @scmd: Mid-layer SCSI command
2683 *
2684 * This routine implements a generic reset handler for device, bus and host
2685 * reset requests. Device, bus and host specific reset handlers can use this
2686 * function after they do their specific tasks.
2687 */
2688static int megasas_generic_reset(struct scsi_cmnd *scmd)
2689{
2690 int ret_val;
2691 struct megasas_instance *instance;
2692
2693 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2694
5cd049a5
CH		 2695 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2696 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2697
8a01a41d 2698 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2699 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2700 return FAILED;
2701 }
2702
c4a3e0a5 2703 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2704 if (ret_val == SUCCESS)
1be18254 2705 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2706 else
1be18254 2707 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2708
c4a3e0a5
BS		 2709 return ret_val;
2710}
2711
05e9ebbe
SP		 2712/**
2713 * megasas_reset_timer - quiesce the adapter if required
2714 * @scmd: scsi cmnd
2715 *
2716 * Sets the FW busy flag and reduces the host->can_queue if the
2717 * cmd has not been completed within the timeout period.
2718 */
2719static enum
242f9dcb 2720blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2721{
05e9ebbe
SP		 2722 struct megasas_instance *instance;
2723 unsigned long flags;
2724
2725 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2726 (scmd_timeout * 2) * HZ)) {
242f9dcb 2727 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2728 }
2729
f575c5d3 2730 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2731 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2732 /* FW is busy, throttle IO */
2733 spin_lock_irqsave(instance->host->host_lock, flags);
2734
c5daa6a9 2735 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2736 instance->last_time = jiffies;
2737 instance->flag |= MEGASAS_FW_BUSY;
2738
2739 spin_unlock_irqrestore(instance->host->host_lock, flags);
2740 }
242f9dcb 2741 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2742}
2743
def0eab3
S		 2744/**
2745 * megasas_dump_frame - This function will dump MPT/MFI frame
2746 */
2747static inline void
2748megasas_dump_frame(void *mpi_request, int sz)
2749{
2750 int i;
2751 __le32 *mfp = (__le32 *)mpi_request;
2752
2753 printk(KERN_INFO "IO request frame:\n\t");
2754 for (i = 0; i < sz; i++) {
2755 if (i && ((i % 8) == 0))
2756 printk("\n\t");
2757 printk("%08x ", le32_to_cpu(mfp[i]));
2758 }
2759 printk("\n");
2760}
2761
c4a3e0a5
BS		 2762/**
2763 * megasas_reset_bus_host - Bus & host reset handler entry point
2764 */
2765static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2766{
2767 int ret;
9c915a8c 2768 struct megasas_instance *instance;
da0dc9fb 2769
9c915a8c 2770 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5 2771
def0eab3
S		 2772 scmd_printk(KERN_INFO, scmd,
2773 "Controller reset is requested due to IO timeout\n"
2774 "SCSI command pointer: (%p)\t SCSI host state: %d\t"
2775 " SCSI host busy: %d\t FW outstanding: %d\n",
2776 scmd, scmd->device->host->shost_state,
2777 atomic_read((atomic_t *)&scmd->device->host->host_busy),
2778 atomic_read(&instance->fw_outstanding));
2779
c4a3e0a5 2780 /*
80682fa9 2781 * First wait for all commands to complete
c4a3e0a5 2782 */
def0eab3
S		 2783 if (instance->ctrl_context) {
2784 struct megasas_cmd_fusion *cmd;
2785 cmd = (struct megasas_cmd_fusion *)scmd->SCp.ptr;
2786 if (cmd)
2787 megasas_dump_frame(cmd->io_request,
2788 sizeof(struct MPI2_RAID_SCSI_IO_REQUEST));
2789 ret = megasas_reset_fusion(scmd->device->host,
2790 SCSIIO_TIMEOUT_OCR);
2791 } else
9c915a8c 2792 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2793
2794 return ret;
2795}
2796
bd23d4ab
SS		 2797/**
2798 * megasas_task_abort - Issues task abort request to firmware
2799 * (supported only for fusion adapters)
2800 * @scmd: SCSI command pointer
2801 */
2802static int megasas_task_abort(struct scsi_cmnd *scmd)
2803{
2804 int ret;
2805 struct megasas_instance *instance;
2806
2807 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2808
2809 if (instance->ctrl_context)
2810 ret = megasas_task_abort_fusion(scmd);
2811 else {
2812 sdev_printk(KERN_NOTICE, scmd->device, "TASK ABORT not supported\n");
2813 ret = FAILED;
2814 }
2815
2816 return ret;
2817}
2818
2819/**
2820 * megasas_reset_target: Issues target reset request to firmware
2821 * (supported only for fusion adapters)
2822 * @scmd: SCSI command pointer
2823 */
2824static int megasas_reset_target(struct scsi_cmnd *scmd)
2825{
2826 int ret;
2827 struct megasas_instance *instance;
2828
2829 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2830
2831 if (instance->ctrl_context)
2832 ret = megasas_reset_target_fusion(scmd);
2833 else {
2834 sdev_printk(KERN_NOTICE, scmd->device, "TARGET RESET not supported\n");
2835 ret = FAILED;
2836 }
2837
2838 return ret;
2839}
2840
cf62a0a5
SP		 2841/**
2842 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2843 * @sdev: device handle
cf62a0a5
SP		 2844 * @bdev: block device
2845 * @capacity: drive capacity
2846 * @geom: geometry parameters
2847 */
2848static int
2849megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2850 sector_t capacity, int geom[])
2851{
2852 int heads;
2853 int sectors;
2854 sector_t cylinders;
2855 unsigned long tmp;
da0dc9fb 2856
cf62a0a5
SP		 2857 /* Default heads (64) & sectors (32) */
2858 heads = 64;
2859 sectors = 32;
2860
2861 tmp = heads * sectors;
2862 cylinders = capacity;
2863
2864 sector_div(cylinders, tmp);
2865
2866 /*
2867 * Handle extended translation size for logical drives > 1Gb
2868 */
2869
2870 if (capacity >= 0x200000) {
2871 heads = 255;
2872 sectors = 63;
2873 tmp = heads*sectors;
2874 cylinders = capacity;
2875 sector_div(cylinders, tmp);
2876 }
2877
2878 geom[0] = heads;
2879 geom[1] = sectors;
2880 geom[2] = cylinders;
2881
2882 return 0;
2883}
2884
7e8a75f4
YB		 2885static void megasas_aen_polling(struct work_struct *work);
2886
c4a3e0a5
BS		 2887/**
2888 * megasas_service_aen - Processes an event notification
2889 * @instance: Adapter soft state
2890 * @cmd: AEN command completed by the ISR
2891 *
2892 * For AEN, driver sends a command down to FW that is held by the FW till an
2893 * event occurs. When an event of interest occurs, FW completes the command
2894 * that it was previously holding.
2895 *
2896 * This routines sends SIGIO signal to processes that have registered with the
2897 * driver for AEN.
2898 */
2899static void
2900megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2901{
c3518837 2902 unsigned long flags;
da0dc9fb 2903
c4a3e0a5
BS		 2904 /*
2905 * Don't signal app if it is just an aborted previously registered aen
2906 */
c3518837
YB		 2907 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2908 spin_lock_irqsave(&poll_aen_lock, flags);
2909 megasas_poll_wait_aen = 1;
2910 spin_unlock_irqrestore(&poll_aen_lock, flags);
2911 wake_up(&megasas_poll_wait);
c4a3e0a5 2912 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2913 }
c4a3e0a5
BS		 2914 else
2915 cmd->abort_aen = 0;
2916
2917 instance->aen_cmd = NULL;
90dc9d98 2918
4026e9aa 2919 megasas_return_cmd(instance, cmd);
7e8a75f4 2920
39a98554 2921 if ((instance->unload == 0) &&
2922 ((instance->issuepend_done == 1))) {
7e8a75f4 2923 struct megasas_aen_event *ev;
da0dc9fb 2924
7e8a75f4
YB		 2925 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2926 if (!ev) {
1be18254 2927 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2928 } else {
2929 ev->instance = instance;
2930 instance->ev = ev;
c1d390d8
XF		 2931 INIT_DELAYED_WORK(&ev->hotplug_work,
2932 megasas_aen_polling);
2933 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2934 }
2935 }
c4a3e0a5
BS		 2936}
2937
fc62b3fc
SS		 2938static ssize_t
2939megasas_fw_crash_buffer_store(struct device *cdev,
2940 struct device_attribute *attr, const char *buf, size_t count)
2941{
2942 struct Scsi_Host *shost = class_to_shost(cdev);
2943 struct megasas_instance *instance =
2944 (struct megasas_instance *) shost->hostdata;
2945 int val = 0;
2946 unsigned long flags;
2947
2948 if (kstrtoint(buf, 0, &val) != 0)
2949 return -EINVAL;
2950
2951 spin_lock_irqsave(&instance->crashdump_lock, flags);
2952 instance->fw_crash_buffer_offset = val;
2953 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2954 return strlen(buf);
2955}
2956
2957static ssize_t
2958megasas_fw_crash_buffer_show(struct device *cdev,
2959 struct device_attribute *attr, char *buf)
2960{
2961 struct Scsi_Host *shost = class_to_shost(cdev);
2962 struct megasas_instance *instance =
2963 (struct megasas_instance *) shost->hostdata;
2964 u32 size;
2965 unsigned long buff_addr;
2966 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2967 unsigned long src_addr;
2968 unsigned long flags;
2969 u32 buff_offset;
2970
2971 spin_lock_irqsave(&instance->crashdump_lock, flags);
2972 buff_offset = instance->fw_crash_buffer_offset;
2973 if (!instance->crash_dump_buf &&
2974 !((instance->fw_crash_state == AVAILABLE) ||
2975 (instance->fw_crash_state == COPYING))) {
2976 dev_err(&instance->pdev->dev,
2977 "Firmware crash dump is not available\n");
2978 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2979 return -EINVAL;
2980 }
2981
2982 buff_addr = (unsigned long) buf;
2983
da0dc9fb 2984 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2985 dev_err(&instance->pdev->dev,
2986 "Firmware crash dump offset is out of range\n");
2987 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2988 return 0;
2989 }
2990
2991 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2992 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2993
2994 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2995 (buff_offset % dmachunk);
da0dc9fb 2996 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 2997 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2998
2999 return size;
3000}
3001
3002static ssize_t
3003megasas_fw_crash_buffer_size_show(struct device *cdev,
3004 struct device_attribute *attr, char *buf)
3005{
3006 struct Scsi_Host *shost = class_to_shost(cdev);
3007 struct megasas_instance *instance =
3008 (struct megasas_instance *) shost->hostdata;
3009
3010 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
3011 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
3012}
3013
3014static ssize_t
3015megasas_fw_crash_state_store(struct device *cdev,
3016 struct device_attribute *attr, const char *buf, size_t count)
3017{
3018 struct Scsi_Host *shost = class_to_shost(cdev);
3019 struct megasas_instance *instance =
3020 (struct megasas_instance *) shost->hostdata;
3021 int val = 0;
3022 unsigned long flags;
3023
3024 if (kstrtoint(buf, 0, &val) != 0)
3025 return -EINVAL;
3026
3027 if ((val <= AVAILABLE || val > COPY_ERROR)) {
3028 dev_err(&instance->pdev->dev, "application updates invalid "
3029 "firmware crash state\n");
3030 return -EINVAL;
3031 }
3032
3033 instance->fw_crash_state = val;
3034
3035 if ((val == COPIED) || (val == COPY_ERROR)) {
3036 spin_lock_irqsave(&instance->crashdump_lock, flags);
3037 megasas_free_host_crash_buffer(instance);
3038 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3039 if (val == COPY_ERROR)
3040 dev_info(&instance->pdev->dev, "application failed to "
3041 "copy Firmware crash dump\n");
3042 else
3043 dev_info(&instance->pdev->dev, "Firmware crash dump "
3044 "copied successfully\n");
3045 }
3046 return strlen(buf);
3047}
3048
3049static ssize_t
3050megasas_fw_crash_state_show(struct device *cdev,
3051 struct device_attribute *attr, char *buf)
3052{
3053 struct Scsi_Host *shost = class_to_shost(cdev);
3054 struct megasas_instance *instance =
3055 (struct megasas_instance *) shost->hostdata;
da0dc9fb 3056
fc62b3fc
SS		 3057 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
3058}
3059
3060static ssize_t
3061megasas_page_size_show(struct device *cdev,
3062 struct device_attribute *attr, char *buf)
3063{
3064 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
3065}
3066
308ec459
SS		 3067static ssize_t
3068megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
3069 char *buf)
3070{
3071 struct Scsi_Host *shost = class_to_shost(cdev);
3072 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
3073
3074 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
3075}
3076
fc62b3fc
SS		 3077static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
3078 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
3079static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
3080 megasas_fw_crash_buffer_size_show, NULL);
3081static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
3082 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
3083static DEVICE_ATTR(page_size, S_IRUGO,
3084 megasas_page_size_show, NULL);
308ec459
SS		 3085static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
3086 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS		 3087
3088struct device_attribute *megaraid_host_attrs[] = {
3089 &dev_attr_fw_crash_buffer_size,
3090 &dev_attr_fw_crash_buffer,
3091 &dev_attr_fw_crash_state,
3092 &dev_attr_page_size,
308ec459 3093 &dev_attr_ldio_outstanding,
fc62b3fc
SS		 3094 NULL,
3095};
3096
c4a3e0a5
BS		 3097/*
3098 * Scsi host template for megaraid_sas driver
3099 */
3100static struct scsi_host_template megasas_template = {
3101
3102 .module = THIS_MODULE,
43cd7fe4 3103 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 3104 .proc_name = "megaraid_sas",
147aab6a 3105 .slave_configure = megasas_slave_configure,
044833b5 3106 .slave_alloc = megasas_slave_alloc,
18365b13 3107 .slave_destroy = megasas_slave_destroy,
c4a3e0a5 3108 .queuecommand = megasas_queue_command,
bd23d4ab
SS		 3109 .eh_target_reset_handler = megasas_reset_target,
3110 .eh_abort_handler = megasas_task_abort,
c4a3e0a5 3111 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 3112 .eh_timed_out = megasas_reset_timer,
fc62b3fc 3113 .shost_attrs = megaraid_host_attrs,
cf62a0a5 3114 .bios_param = megasas_bios_param,
c4a3e0a5 3115 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 3116 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 3117 .no_write_same = 1,
c4a3e0a5
BS		 3118};
3119
3120/**
3121 * megasas_complete_int_cmd - Completes an internal command
3122 * @instance: Adapter soft state
3123 * @cmd: Command to be completed
3124 *
3125 * The megasas_issue_blocked_cmd() function waits for a command to complete
3126 * after it issues a command. This function wakes up that waiting routine by
3127 * calling wake_up() on the wait queue.
3128 */
3129static void
3130megasas_complete_int_cmd(struct megasas_instance *instance,
3131 struct megasas_cmd *cmd)
3132{
2be2a988 3133 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 3134 wake_up(&instance->int_cmd_wait_q);
3135}
3136
3137/**
3138 * megasas_complete_abort - Completes aborting a command
3139 * @instance: Adapter soft state
3140 * @cmd: Cmd that was issued to abort another cmd
3141 *
0d49016b
AR		 3142 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3143 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 3144 * wakes up all functions waiting on the same wait queue.
3145 */
3146static void
3147megasas_complete_abort(struct megasas_instance *instance,
3148 struct megasas_cmd *cmd)
3149{
3150 if (cmd->sync_cmd) {
3151 cmd->sync_cmd = 0;
2be2a988 3152 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 3153 wake_up(&instance->abort_cmd_wait_q);
3154 }
c4a3e0a5
BS		 3155}
3156
c4a3e0a5
BS		 3157/**
3158 * megasas_complete_cmd - Completes a command
3159 * @instance: Adapter soft state
3160 * @cmd: Command to be completed
0d49016b 3161 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 3162 * SCSI mid-layer instead of the value returned
3163 * by the FW. This should be used if caller wants
3164 * an alternate status (as in the case of aborted
3165 * commands)
c4a3e0a5 3166 */
9c915a8c 3167void
c4a3e0a5
BS		 3168megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3169 u8 alt_status)
3170{
3171 int exception = 0;
3172 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3173 unsigned long flags;
9c915a8c 3174 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3175 u32 opcode, status;
c4a3e0a5 3176
39a98554 3177 /* flag for the retry reset */
3178 cmd->retry_for_fw_reset = 0;
3179
05e9ebbe
SP		 3180 if (cmd->scmd)
3181 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 3182
3183 switch (hdr->cmd) {
e5f93a36
AR		 3184 case MFI_CMD_INVALID:
3185 /* Some older 1068 controller FW may keep a pended
3186 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3187 when booting the kdump kernel. Ignore this command to
3188 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 3189 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3190 "completed\n");
3191 dev_warn(&instance->pdev->dev, "If you have a controller "
3192 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3193 break;
c4a3e0a5
BS		 3194 case MFI_CMD_PD_SCSI_IO:
3195 case MFI_CMD_LD_SCSI_IO:
3196
3197 /*
3198 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3199 * issued either through an IO path or an IOCTL path. If it
3200 * was via IOCTL, we will send it to internal completion.
3201 */
3202 if (cmd->sync_cmd) {
3203 cmd->sync_cmd = 0;
3204 megasas_complete_int_cmd(instance, cmd);
3205 break;
3206 }
3207
c4a3e0a5
BS		 3208 case MFI_CMD_LD_READ:
3209 case MFI_CMD_LD_WRITE:
3210
3211 if (alt_status) {
3212 cmd->scmd->result = alt_status << 16;
3213 exception = 1;
3214 }
3215
3216 if (exception) {
3217
e4a082c7 3218 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3219
155d98f0 3220 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3221 cmd->scmd->scsi_done(cmd->scmd);
3222 megasas_return_cmd(instance, cmd);
3223
3224 break;
3225 }
3226
3227 switch (hdr->cmd_status) {
3228
3229 case MFI_STAT_OK:
3230 cmd->scmd->result = DID_OK << 16;
3231 break;
3232
3233 case MFI_STAT_SCSI_IO_FAILED:
3234 case MFI_STAT_LD_INIT_IN_PROGRESS:
3235 cmd->scmd->result =
3236 (DID_ERROR << 16) | hdr->scsi_status;
3237 break;
3238
3239 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3240
3241 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3242
3243 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3244 memset(cmd->scmd->sense_buffer, 0,
3245 SCSI_SENSE_BUFFERSIZE);
3246 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3247 hdr->sense_len);
3248
3249 cmd->scmd->result |= DRIVER_SENSE << 24;
3250 }
3251
3252 break;
3253
3254 case MFI_STAT_LD_OFFLINE:
3255 case MFI_STAT_DEVICE_NOT_FOUND:
3256 cmd->scmd->result = DID_BAD_TARGET << 16;
3257 break;
3258
3259 default:
1be18254 3260 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 3261 hdr->cmd_status);
3262 cmd->scmd->result = DID_ERROR << 16;
3263 break;
3264 }
3265
e4a082c7 3266 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3267
155d98f0 3268 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3269 cmd->scmd->scsi_done(cmd->scmd);
3270 megasas_return_cmd(instance, cmd);
3271
3272 break;
3273
3274 case MFI_CMD_SMP:
3275 case MFI_CMD_STP:
3276 case MFI_CMD_DCMD:
94cd65dd 3277 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3278 /* Check for LD map update */
94cd65dd
SS		 3279 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3280 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3281 fusion->fast_path_io = 0;
9c915a8c 3282 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3283 instance->map_update_cmd = NULL;
9c915a8c
AR		 3284 if (cmd->frame->hdr.cmd_status != 0) {
3285 if (cmd->frame->hdr.cmd_status !=
3286 MFI_STAT_NOT_FOUND)
1be18254 3287 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 3288 cmd->frame->hdr.cmd_status);
3289 else {
4026e9aa 3290 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 3291 spin_unlock_irqrestore(
3292 instance->host->host_lock,
3293 flags);
3294 break;
3295 }
3296 } else
3297 instance->map_id++;
4026e9aa 3298 megasas_return_cmd(instance, cmd);
bc93d425
SS		 3299
3300 /*
3301 * Set fast path IO to ZERO.
3302 * Validate Map will set proper value.
3303 * Meanwhile all IOs will go as LD IO.
3304 */
3305 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 3306 fusion->fast_path_io = 1;
3307 else
3308 fusion->fast_path_io = 0;
3309 megasas_sync_map_info(instance);
3310 spin_unlock_irqrestore(instance->host->host_lock,
3311 flags);
3312 break;
3313 }
94cd65dd
SS		 3314 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3315 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 3316 spin_lock_irqsave(&poll_aen_lock, flags);
3317 megasas_poll_wait_aen = 0;
3318 spin_unlock_irqrestore(&poll_aen_lock, flags);
3319 }
c4a3e0a5 3320
3761cb4c 3321 /* FW has an updated PD sequence */
3322 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3323 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3324
3325 spin_lock_irqsave(instance->host->host_lock, flags);
3326 status = cmd->frame->hdr.cmd_status;
3327 instance->jbod_seq_cmd = NULL;
3328 megasas_return_cmd(instance, cmd);
3329
3330 if (status == MFI_STAT_OK) {
3331 instance->pd_seq_map_id++;
3332 /* Re-register a pd sync seq num cmd */
3333 if (megasas_sync_pd_seq_num(instance, true))
3334 instance->use_seqnum_jbod_fp = false;
3335 } else
3336 instance->use_seqnum_jbod_fp = false;
3337
3338 spin_unlock_irqrestore(instance->host->host_lock, flags);
3339 break;
3340 }
3341
c4a3e0a5
BS		 3342 /*
3343 * See if got an event notification
3344 */
94cd65dd 3345 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3346 megasas_service_aen(instance, cmd);
3347 else
3348 megasas_complete_int_cmd(instance, cmd);
3349
3350 break;
3351
3352 case MFI_CMD_ABORT:
3353 /*
3354 * Cmd issued to abort another cmd returned
3355 */
3356 megasas_complete_abort(instance, cmd);
3357 break;
3358
3359 default:
1be18254 3360 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3361 hdr->cmd);
3362 break;
3363 }
3364}
3365
39a98554 3366/**
3367 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3368 * in FW again because of the fw reset
39a98554 3369 * @instance: Adapter soft state
3370 */
3371static inline void
3372megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3373{
3374 struct megasas_cmd *cmd;
3375 struct list_head clist_local;
3376 union megasas_evt_class_locale class_locale;
3377 unsigned long flags;
3378 u32 seq_num;
3379
3380 INIT_LIST_HEAD(&clist_local);
3381 spin_lock_irqsave(&instance->hba_lock, flags);
3382 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3383 spin_unlock_irqrestore(&instance->hba_lock, flags);
3384
3385 while (!list_empty(&clist_local)) {
da0dc9fb 3386 cmd = list_entry((&clist_local)->next,
39a98554 3387 struct megasas_cmd, list);
3388 list_del_init(&cmd->list);
3389
3390 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3391 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3392 "detected to be pending while HBA reset\n",
39a98554 3393 cmd, cmd->scmd, cmd->sync_cmd);
3394
3395 cmd->retry_for_fw_reset++;
3396
3397 if (cmd->retry_for_fw_reset == 3) {
1be18254 3398 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3399 "was tried multiple times during reset."
3400 "Shutting down the HBA\n",
3401 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3402 instance->instancet->disable_intr(instance);
3403 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3404 megaraid_sas_kill_hba(instance);
39a98554 3405 return;
3406 }
3407 }
3408
3409 if (cmd->sync_cmd == 1) {
3410 if (cmd->scmd) {
1be18254 3411 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3412 "cmd attached to internal command!\n");
3413 }
1be18254 3414 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3415 "on the internal reset queue,"
3416 "issue it again.\n", cmd);
2be2a988 3417 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3418 instance->instancet->fire_cmd(instance,
da0dc9fb 3419 cmd->frame_phys_addr,
39a98554 3420 0, instance->reg_set);
3421 } else if (cmd->scmd) {
1be18254 3422 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3423 "detected on the internal queue, issue again.\n",
5cd049a5 3424 cmd, cmd->scmd->cmnd[0]);
39a98554 3425
3426 atomic_inc(&instance->fw_outstanding);
3427 instance->instancet->fire_cmd(instance,
3428 cmd->frame_phys_addr,
3429 cmd->frame_count-1, instance->reg_set);
3430 } else {
1be18254 3431 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3432 "internal reset defer list while re-issue!!\n",
3433 cmd);
3434 }
3435 }
3436
3437 if (instance->aen_cmd) {
1be18254 3438 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3439 megasas_return_cmd(instance, instance->aen_cmd);
3440
da0dc9fb 3441 instance->aen_cmd = NULL;
39a98554 3442 }
3443
3444 /*
da0dc9fb
BH		 3445 * Initiate AEN (Asynchronous Event Notification)
3446 */
39a98554 3447 seq_num = instance->last_seq_num;
3448 class_locale.members.reserved = 0;
3449 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3450 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3451
3452 megasas_register_aen(instance, seq_num, class_locale.word);
3453}
3454
3455/**
3456 * Move the internal reset pending commands to a deferred queue.
3457 *
3458 * We move the commands pending at internal reset time to a
3459 * pending queue. This queue would be flushed after successful
3460 * completion of the internal reset sequence. if the internal reset
3461 * did not complete in time, the kernel reset handler would flush
3462 * these commands.
3463 **/
3464static void
3465megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3466{
3467 struct megasas_cmd *cmd;
3468 int i;
3469 u32 max_cmd = instance->max_fw_cmds;
3470 u32 defer_index;
3471 unsigned long flags;
3472
da0dc9fb 3473 defer_index = 0;
90dc9d98 3474 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3475 for (i = 0; i < max_cmd; i++) {
3476 cmd = instance->cmd_list[i];
3477 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3478 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3479 "on the defer queue as internal\n",
3480 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3481
3482 if (!list_empty(&cmd->list)) {
1be18254 3483 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3484 " moving this cmd:%p, %d %p, it was"
3485 "discovered on some list?\n",
3486 cmd, cmd->sync_cmd, cmd->scmd);
3487
3488 list_del_init(&cmd->list);
3489 }
3490 defer_index++;
3491 list_add_tail(&cmd->list,
3492 &instance->internal_reset_pending_q);
3493 }
3494 }
90dc9d98 3495 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3496}
3497
3498
3499static void
3500process_fw_state_change_wq(struct work_struct *work)
3501{
3502 struct megasas_instance *instance =
3503 container_of(work, struct megasas_instance, work_init);
3504 u32 wait;
3505 unsigned long flags;
3506
8a01a41d 3507 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3508 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3509 atomic_read(&instance->adprecovery));
39a98554 3510 return ;
3511 }
3512
8a01a41d 3513 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3514 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3515 "state, restarting it...\n");
3516
d46a3ad6 3517 instance->instancet->disable_intr(instance);
39a98554 3518 atomic_set(&instance->fw_outstanding, 0);
3519
3520 atomic_set(&instance->fw_reset_no_pci_access, 1);
3521 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3522 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3523
1be18254 3524 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3525 "initiating next stage...\n");
3526
1be18254 3527 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3528 "state 2 starting...\n");
3529
da0dc9fb 3530 /* waiting for about 20 second before start the second init */
39a98554 3531 for (wait = 0; wait < 30; wait++) {
3532 msleep(1000);
3533 }
3534
058a8fac 3535 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3536 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3537
c8dd61ef 3538 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3539 megaraid_sas_kill_hba(instance);
39a98554 3540 return ;
3541 }
3542
3543 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3544 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3545 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3546 ) {
3547 *instance->consumer = *instance->producer;
3548 } else {
3549 *instance->consumer = 0;
3550 *instance->producer = 0;
3551 }
3552
3553 megasas_issue_init_mfi(instance);
3554
3555 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3556 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3557 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3558 instance->instancet->enable_intr(instance);
39a98554 3559
3560 megasas_issue_pending_cmds_again(instance);
3561 instance->issuepend_done = 1;
3562 }
39a98554 3563}
3564
c4a3e0a5
BS		 3565/**
3566 * megasas_deplete_reply_queue - Processes all completed commands
3567 * @instance: Adapter soft state
3568 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3569 * SCSI mid-layer instead of the status
3570 * returned by the FW
39a98554 3571 * Note: this must be called with hba lock held
c4a3e0a5 3572 */
858119e1 3573static int
39a98554 3574megasas_deplete_reply_queue(struct megasas_instance *instance,
3575 u8 alt_status)
c4a3e0a5 3576{
39a98554 3577 u32 mfiStatus;
3578 u32 fw_state;
3579
3580 if ((mfiStatus = instance->instancet->check_reset(instance,
3581 instance->reg_set)) == 1) {
3582 return IRQ_HANDLED;
3583 }
3584
3585 if ((mfiStatus = instance->instancet->clear_intr(
3586 instance->reg_set)
3587 ) == 0) {
e1419191 3588 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3589 if (!instance->msix_vectors)
e1419191 3590 return IRQ_NONE;
39a98554 3591 }
3592
3593 instance->mfiStatus = mfiStatus;
3594
3595 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3596 fw_state = instance->instancet->read_fw_status_reg(
3597 instance->reg_set) & MFI_STATE_MASK;
3598
3599 if (fw_state != MFI_STATE_FAULT) {
1be18254 3600 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3601 fw_state);
3602 }
3603
3604 if ((fw_state == MFI_STATE_FAULT) &&
3605 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3606 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3607
3608 if ((instance->pdev->device ==
3609 PCI_DEVICE_ID_LSI_SAS1064R) ||
3610 (instance->pdev->device ==
3611 PCI_DEVICE_ID_DELL_PERC5) ||
3612 (instance->pdev->device ==
3613 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3614
3615 *instance->consumer =
94cd65dd 3616 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3617 }
3618
3619
d46a3ad6 3620 instance->instancet->disable_intr(instance);
8a01a41d 3621 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3622 instance->issuepend_done = 0;
3623
3624 atomic_set(&instance->fw_outstanding, 0);
3625 megasas_internal_reset_defer_cmds(instance);
3626
1be18254 3627 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3628 fw_state, atomic_read(&instance->adprecovery));
39a98554 3629
3630 schedule_work(&instance->work_init);
3631 return IRQ_HANDLED;
3632
3633 } else {
1be18254 3634 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3635 fw_state, instance->disableOnlineCtrlReset);
3636 }
3637 }
c4a3e0a5 3638
5d018ad0 3639 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3640 return IRQ_HANDLED;
3641}
c4a3e0a5
BS		 3642/**
3643 * megasas_isr - isr entry point
3644 */
7d12e780 3645static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3646{
c8e858fe
AR		 3647 struct megasas_irq_context *irq_context = devp;
3648 struct megasas_instance *instance = irq_context->instance;
39a98554 3649 unsigned long flags;
da0dc9fb 3650 irqreturn_t rc;
39a98554 3651
c8e858fe 3652 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3653 return IRQ_HANDLED;
3654
39a98554 3655 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3656 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3657 spin_unlock_irqrestore(&instance->hba_lock, flags);
3658
3659 return rc;
c4a3e0a5
BS		 3660}
3661
3662/**
3663 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3664 * @instance: Adapter soft state
c4a3e0a5
BS		 3665 *
3666 * During the initialization, FW passes can potentially be in any one of
3667 * several possible states. If the FW in operational, waiting-for-handshake
3668 * states, driver must take steps to bring it to ready state. Otherwise, it
3669 * has to wait for the ready state.
3670 */
9c915a8c 3671int
058a8fac 3672megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3673{
3674 int i;
3675 u8 max_wait;
3676 u32 fw_state;
3677 u32 cur_state;
7218df69 3678 u32 abs_state, curr_abs_state;
c4a3e0a5 3679
bc6ac5e8
TH		 3680 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3681 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3682
e3bbff9f 3683 if (fw_state != MFI_STATE_READY)
1be18254 3684 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3685 " state\n");
e3bbff9f 3686
c4a3e0a5
BS		 3687 while (fw_state != MFI_STATE_READY) {
3688
c4a3e0a5
BS		 3689 switch (fw_state) {
3690
3691 case MFI_STATE_FAULT:
1be18254 3692 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3693 if (ocr) {
3694 max_wait = MEGASAS_RESET_WAIT_TIME;
3695 cur_state = MFI_STATE_FAULT;
3696 break;
3697 } else
3698 return -ENODEV;
c4a3e0a5
BS		 3699
3700 case MFI_STATE_WAIT_HANDSHAKE:
3701 /*
3702 * Set the CLR bit in inbound doorbell
3703 */
0c79e681 3704 if ((instance->pdev->device ==
87911122
YB		 3705 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3706 (instance->pdev->device ==
9c915a8c 3707 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3708 (instance->ctrl_context))
87911122
YB		 3709 writel(
3710 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3711 &instance->reg_set->doorbell);
5a8cb85b 3712 else
87911122
YB		 3713 writel(
3714 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3715 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3716
7218df69 3717 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3718 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3719 break;
3720
e3bbff9f 3721 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3722 if ((instance->pdev->device ==
9c915a8c
AR		 3723 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3724 (instance->pdev->device ==
3725 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3726 (instance->ctrl_context))
87911122 3727 writel(MFI_INIT_HOTPLUG,
9c915a8c 3728 &instance->reg_set->doorbell);
5a8cb85b 3729 else
87911122
YB		 3730 writel(MFI_INIT_HOTPLUG,
3731 &instance->reg_set->inbound_doorbell);
e3bbff9f 3732
7218df69 3733 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3734 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3735 break;
3736
c4a3e0a5
BS		 3737 case MFI_STATE_OPERATIONAL:
3738 /*
e3bbff9f 3739 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3740 */
d46a3ad6 3741 instance->instancet->disable_intr(instance);
87911122
YB		 3742 if ((instance->pdev->device ==
3743 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3744 (instance->pdev->device ==
9c915a8c 3745 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3746 (instance->ctrl_context)) {
87911122 3747 writel(MFI_RESET_FLAGS,
9c915a8c 3748 &instance->reg_set->doorbell);
5a8cb85b 3749
3750 if (instance->ctrl_context) {
9c915a8c
AR		 3751 for (i = 0; i < (10 * 1000); i += 20) {
3752 if (readl(
3753 &instance->
3754 reg_set->
3755 doorbell) & 1)
3756 msleep(20);
3757 else
3758 break;
3759 }
3760 }
87911122
YB		 3761 } else
3762 writel(MFI_RESET_FLAGS,
3763 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3764
7218df69 3765 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3766 cur_state = MFI_STATE_OPERATIONAL;
3767 break;
3768
3769 case MFI_STATE_UNDEFINED:
3770 /*
3771 * This state should not last for more than 2 seconds
3772 */
7218df69 3773 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3774 cur_state = MFI_STATE_UNDEFINED;
3775 break;
3776
3777 case MFI_STATE_BB_INIT:
7218df69 3778 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3779 cur_state = MFI_STATE_BB_INIT;
3780 break;
3781
3782 case MFI_STATE_FW_INIT:
7218df69 3783 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3784 cur_state = MFI_STATE_FW_INIT;
3785 break;
3786
3787 case MFI_STATE_FW_INIT_2:
7218df69 3788 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3789 cur_state = MFI_STATE_FW_INIT_2;
3790 break;
3791
3792 case MFI_STATE_DEVICE_SCAN:
7218df69 3793 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3794 cur_state = MFI_STATE_DEVICE_SCAN;
3795 break;
3796
3797 case MFI_STATE_FLUSH_CACHE:
7218df69 3798 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3799 cur_state = MFI_STATE_FLUSH_CACHE;
3800 break;
3801
3802 default:
1be18254 3803 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3804 fw_state);
3805 return -ENODEV;
3806 }
3807
3808 /*
3809 * The cur_state should not last for more than max_wait secs
3810 */
3811 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3812 curr_abs_state = instance->instancet->
3813 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3814
7218df69 3815 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3816 msleep(1);
3817 } else
3818 break;
3819 }
3820
3821 /*
3822 * Return error if fw_state hasn't changed after max_wait
3823 */
7218df69 3824 if (curr_abs_state == abs_state) {
1be18254 3825 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3826 "in %d secs\n", fw_state, max_wait);
3827 return -ENODEV;
3828 }
bc6ac5e8
TH		 3829
3830 abs_state = curr_abs_state;
3831 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3832 }
1be18254 3833 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3834
3835 return 0;
3836}
3837
3838/**
3839 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3840 * @instance: Adapter soft state
3841 */
3842static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3843{
3844 int i;
9c915a8c 3845 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3846 struct megasas_cmd *cmd;
3847
3848 if (!instance->frame_dma_pool)
3849 return;
3850
3851 /*
3852 * Return all frames to pool
3853 */
3854 for (i = 0; i < max_cmd; i++) {
3855
3856 cmd = instance->cmd_list[i];
3857
3858 if (cmd->frame)
3859 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3860 cmd->frame_phys_addr);
3861
3862 if (cmd->sense)
e3bbff9f 3863 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3864 cmd->sense_phys_addr);
3865 }
3866
3867 /*
3868 * Now destroy the pool itself
3869 */
3870 pci_pool_destroy(instance->frame_dma_pool);
3871 pci_pool_destroy(instance->sense_dma_pool);
3872
3873 instance->frame_dma_pool = NULL;
3874 instance->sense_dma_pool = NULL;
3875}
3876
3877/**
3878 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3879 * @instance: Adapter soft state
3880 *
3881 * Each command packet has an embedded DMA memory buffer that is used for
3882 * filling MFI frame and the SG list that immediately follows the frame. This
3883 * function creates those DMA memory buffers for each command packet by using
3884 * PCI pool facility.
3885 */
3886static int megasas_create_frame_pool(struct megasas_instance *instance)
3887{
3888 int i;
3889 u32 max_cmd;
3890 u32 sge_sz;
c4a3e0a5
BS		 3891 u32 total_sz;
3892 u32 frame_count;
3893 struct megasas_cmd *cmd;
3894
9c915a8c 3895 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3896
3897 /*
3898 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3899 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3900 */
3901 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3902 sizeof(struct megasas_sge32);
3903
da0dc9fb 3904 if (instance->flag_ieee)
f4c9a131 3905 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3906
c4a3e0a5 3907 /*
200aed58
SS		 3908 * For MFI controllers.
3909 * max_num_sge = 60
3910 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3911 * Total 960 byte (15 MFI frame of 64 byte)
3912 *
3913 * Fusion adapter require only 3 extra frame.
3914 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3915 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3916 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3917 */
200aed58 3918 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS		 3919 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3920 /*
3921 * Use DMA pool facility provided by PCI layer
3922 */
3923 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3924 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS		 3925
3926 if (!instance->frame_dma_pool) {
1be18254 3927 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3928 return -ENOMEM;
3929 }
3930
3931 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3932 instance->pdev, 128, 4, 0);
3933
3934 if (!instance->sense_dma_pool) {
1be18254 3935 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS		 3936
3937 pci_pool_destroy(instance->frame_dma_pool);
3938 instance->frame_dma_pool = NULL;
3939
3940 return -ENOMEM;
3941 }
3942
3943 /*
3944 * Allocate and attach a frame to each of the commands in cmd_list.
3945 * By making cmd->index as the context instead of the &cmd, we can
3946 * always use 32bit context regardless of the architecture
3947 */
3948 for (i = 0; i < max_cmd; i++) {
3949
3950 cmd = instance->cmd_list[i];
3951
3952 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3953 GFP_KERNEL, &cmd->frame_phys_addr);
3954
3955 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3956 GFP_KERNEL, &cmd->sense_phys_addr);
3957
3958 /*
3959 * megasas_teardown_frame_pool() takes care of freeing
3960 * whatever has been allocated
3961 */
3962 if (!cmd->frame || !cmd->sense) {
1be18254 3963 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS		 3964 megasas_teardown_frame_pool(instance);
3965 return -ENOMEM;
3966 }
3967
707e09bd 3968 memset(cmd->frame, 0, total_sz);
94cd65dd 3969 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3970 cmd->frame->io.pad_0 = 0;
5a8cb85b 3971 if (!instance->ctrl_context && reset_devices)
e5f93a36 3972 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3973 }
3974
3975 return 0;
3976}
3977
3978/**
3979 * megasas_free_cmds - Free all the cmds in the free cmd pool
3980 * @instance: Adapter soft state
3981 */
9c915a8c 3982void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3983{
3984 int i;
da0dc9fb 3985
c4a3e0a5
BS		 3986 /* First free the MFI frame pool */
3987 megasas_teardown_frame_pool(instance);
3988
3989 /* Free all the commands in the cmd_list */
9c915a8c
AR		 3990 for (i = 0; i < instance->max_mfi_cmds; i++)
3991
c4a3e0a5
BS		 3992 kfree(instance->cmd_list[i]);
3993
3994 /* Free the cmd_list buffer itself */
3995 kfree(instance->cmd_list);
3996 instance->cmd_list = NULL;
3997
3998 INIT_LIST_HEAD(&instance->cmd_pool);
3999}
4000
4001/**
4002 * megasas_alloc_cmds - Allocates the command packets
4003 * @instance: Adapter soft state
4004 *
4005 * Each command that is issued to the FW, whether IO commands from the OS or
4006 * internal commands like IOCTLs, are wrapped in local data structure called
4007 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
4008 * the FW.
4009 *
4010 * Each frame has a 32-bit field called context (tag). This context is used
4011 * to get back the megasas_cmd from the frame when a frame gets completed in
4012 * the ISR. Typically the address of the megasas_cmd itself would be used as
4013 * the context. But we wanted to keep the differences between 32 and 64 bit
4014 * systems to the mininum. We always use 32 bit integers for the context. In
4015 * this driver, the 32 bit values are the indices into an array cmd_list.
4016 * This array is used only to look up the megasas_cmd given the context. The
4017 * free commands themselves are maintained in a linked list called cmd_pool.
4018 */
9c915a8c 4019int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 4020{
4021 int i;
4022 int j;
4023 u32 max_cmd;
4024 struct megasas_cmd *cmd;
90dc9d98 4025 struct fusion_context *fusion;
c4a3e0a5 4026
90dc9d98 4027 fusion = instance->ctrl_context;
9c915a8c 4028 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 4029
4030 /*
4031 * instance->cmd_list is an array of struct megasas_cmd pointers.
4032 * Allocate the dynamic array first and then allocate individual
4033 * commands.
4034 */
dd00cc48 4035 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 4036
4037 if (!instance->cmd_list) {
1be18254 4038 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 4039 return -ENOMEM;
4040 }
4041
9c915a8c 4042 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 4043
4044 for (i = 0; i < max_cmd; i++) {
4045 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
4046 GFP_KERNEL);
4047
4048 if (!instance->cmd_list[i]) {
4049
4050 for (j = 0; j < i; j++)
4051 kfree(instance->cmd_list[j]);
4052
4053 kfree(instance->cmd_list);
4054 instance->cmd_list = NULL;
4055
4056 return -ENOMEM;
4057 }
4058 }
4059
c4a3e0a5
BS		 4060 for (i = 0; i < max_cmd; i++) {
4061 cmd = instance->cmd_list[i];
4062 memset(cmd, 0, sizeof(struct megasas_cmd));
4063 cmd->index = i;
39a98554 4064 cmd->scmd = NULL;
c4a3e0a5
BS		 4065 cmd->instance = instance;
4066
4067 list_add_tail(&cmd->list, &instance->cmd_pool);
4068 }
4069
4070 /*
4071 * Create a frame pool and assign one frame to each cmd
4072 */
4073 if (megasas_create_frame_pool(instance)) {
1be18254 4074 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 4075 megasas_free_cmds(instance);
4076 }
4077
4078 return 0;
4079}
4080
6d40afbc
SS		 4081/*
4082 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
4083 * @instance: Adapter soft state
4084 *
4085 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
4086 * or FW is not under OCR.
4087 */
4088inline int
4089dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
4090
4091 if (!instance->ctrl_context)
4092 return KILL_ADAPTER;
4093 else if (instance->unload ||
4094 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
4095 return IGNORE_TIMEOUT;
4096 else
4097 return INITIATE_OCR;
4098}
4099
15dd0381
S		 4100static void
4101megasas_get_pd_info(struct megasas_instance *instance, struct scsi_device *sdev)
2216c305
SS		 4102{
4103 int ret;
4104 struct megasas_cmd *cmd;
4105 struct megasas_dcmd_frame *dcmd;
4106
15dd0381
S		 4107 struct MR_PRIV_DEVICE *mr_device_priv_data;
4108 u16 device_id = 0;
4109
4110 device_id = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
2216c305
SS		 4111 cmd = megasas_get_cmd(instance);
4112
4113 if (!cmd) {
4114 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
15dd0381 4115 return;
2216c305
SS		 4116 }
4117
4118 dcmd = &cmd->frame->dcmd;
4119
4120 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
4121 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4122
4123 dcmd->mbox.s[0] = cpu_to_le16(device_id);
4124 dcmd->cmd = MFI_CMD_DCMD;
4125 dcmd->cmd_status = 0xFF;
4126 dcmd->sge_count = 1;
4127 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
4128 dcmd->timeout = 0;
4129 dcmd->pad_0 = 0;
4130 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
4131 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
4132 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->pd_info_h);
4133 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_PD_INFO));
4134
4135 if (instance->ctrl_context && !instance->mask_interrupts)
4136 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
4137 else
4138 ret = megasas_issue_polled(instance, cmd);
4139
4140 switch (ret) {
4141 case DCMD_SUCCESS:
15dd0381
S		 4142 mr_device_priv_data = sdev->hostdata;
4143 le16_to_cpus((u16 *)&instance->pd_info->state.ddf.pdType);
4144 mr_device_priv_data->interface_type =
2216c305
SS		 4145 instance->pd_info->state.ddf.pdType.intf;
4146 break;
4147
4148 case DCMD_TIMEOUT:
4149
4150 switch (dcmd_timeout_ocr_possible(instance)) {
4151 case INITIATE_OCR:
4152 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4153 megasas_reset_fusion(instance->host,
4154 MFI_IO_TIMEOUT_OCR);
4155 break;
4156 case KILL_ADAPTER:
4157 megaraid_sas_kill_hba(instance);
4158 break;
4159 case IGNORE_TIMEOUT:
4160 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4161 __func__, __LINE__);
4162 break;
4163 }
4164
4165 break;
4166 }
4167
4168 if (ret != DCMD_TIMEOUT)
4169 megasas_return_cmd(instance, cmd);
4170
15dd0381 4171 return;
2216c305 4172}
81e403ce
YB		 4173/*
4174 * megasas_get_pd_list_info - Returns FW's pd_list structure
4175 * @instance: Adapter soft state
4176 * @pd_list: pd_list structure
4177 *
4178 * Issues an internal command (DCMD) to get the FW's controller PD
4179 * list structure. This information is mainly used to find out SYSTEM
4180 * supported by the FW.
4181 */
4182static int
4183megasas_get_pd_list(struct megasas_instance *instance)
4184{
4185 int ret = 0, pd_index = 0;
4186 struct megasas_cmd *cmd;
4187 struct megasas_dcmd_frame *dcmd;
4188 struct MR_PD_LIST *ci;
4189 struct MR_PD_ADDRESS *pd_addr;
4190 dma_addr_t ci_h = 0;
4191
d9083160
SS		 4192 if (instance->pd_list_not_supported) {
4193 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4194 "not supported by firmware\n");
4195 return ret;
4196 }
4197
81e403ce
YB		 4198 cmd = megasas_get_cmd(instance);
4199
4200 if (!cmd) {
1be18254 4201 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 4202 return -ENOMEM;
4203 }
4204
4205 dcmd = &cmd->frame->dcmd;
4206
4207 ci = pci_alloc_consistent(instance->pdev,
4208 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
4209
4210 if (!ci) {
1be18254 4211 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 4212 megasas_return_cmd(instance, cmd);
4213 return -ENOMEM;
4214 }
4215
4216 memset(ci, 0, sizeof(*ci));
4217 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4218
4219 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4220 dcmd->mbox.b[1] = 0;
4221 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4222 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4223 dcmd->sge_count = 1;
94cd65dd 4224 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 4225 dcmd->timeout = 0;
780a3762 4226 dcmd->pad_0 = 0;
94cd65dd
SS		 4227 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4228 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
4229 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4230 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 4231
90dc9d98
SS		 4232 if (instance->ctrl_context && !instance->mask_interrupts)
4233 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4234 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4235 else
4236 ret = megasas_issue_polled(instance, cmd);
81e403ce 4237
6d40afbc
SS		 4238 switch (ret) {
4239 case DCMD_FAILED:
30845586
SS		 4240 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4241 "failed/not supported by firmware\n");
4242
4243 if (instance->ctrl_context)
4244 megaraid_sas_kill_hba(instance);
4245 else
4246 instance->pd_list_not_supported = 1;
6d40afbc
SS		 4247 break;
4248 case DCMD_TIMEOUT:
81e403ce 4249
6d40afbc
SS		 4250 switch (dcmd_timeout_ocr_possible(instance)) {
4251 case INITIATE_OCR:
4252 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4253 /*
4254 * DCMD failed from AEN path.
4255 * AEN path already hold reset_mutex to avoid PCI access
4256 * while OCR is in progress.
4257 */
4258 mutex_unlock(&instance->reset_mutex);
4259 megasas_reset_fusion(instance->host,
4260 MFI_IO_TIMEOUT_OCR);
4261 mutex_lock(&instance->reset_mutex);
4262 break;
4263 case KILL_ADAPTER:
4264 megaraid_sas_kill_hba(instance);
4265 break;
4266 case IGNORE_TIMEOUT:
4267 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4268 __func__, __LINE__);
4269 break;
4270 }
81e403ce 4271
6d40afbc
SS		 4272 break;
4273
4274 case DCMD_SUCCESS:
4275 pd_addr = ci->addr;
4276
4277 if ((le32_to_cpu(ci->count) >
4278 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4279 break;
81e403ce 4280
999ece0a 4281 memset(instance->local_pd_list, 0,
6d40afbc 4282 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4283
94cd65dd 4284 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4285 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4286 le16_to_cpu(pd_addr->deviceId);
999ece0a 4287 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4288 pd_addr->scsiDevType;
999ece0a 4289 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4290 MR_PD_STATE_SYSTEM;
81e403ce
YB		 4291 pd_addr++;
4292 }
6d40afbc 4293
999ece0a
SS		 4294 memcpy(instance->pd_list, instance->local_pd_list,
4295 sizeof(instance->pd_list));
6d40afbc
SS		 4296 break;
4297
81e403ce
YB		 4298 }
4299
4300 pci_free_consistent(instance->pdev,
4301 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
4302 ci, ci_h);
90dc9d98 4303
6d40afbc
SS		 4304 if (ret != DCMD_TIMEOUT)
4305 megasas_return_cmd(instance, cmd);
81e403ce
YB		 4306
4307 return ret;
4308}
4309
bdc6fb8d
YB		 4310/*
4311 * megasas_get_ld_list_info - Returns FW's ld_list structure
4312 * @instance: Adapter soft state
4313 * @ld_list: ld_list structure
4314 *
4315 * Issues an internal command (DCMD) to get the FW's controller PD
4316 * list structure. This information is mainly used to find out SYSTEM
4317 * supported by the FW.
4318 */
4319static int
4320megasas_get_ld_list(struct megasas_instance *instance)
4321{
4322 int ret = 0, ld_index = 0, ids = 0;
4323 struct megasas_cmd *cmd;
4324 struct megasas_dcmd_frame *dcmd;
4325 struct MR_LD_LIST *ci;
4326 dma_addr_t ci_h = 0;
94cd65dd 4327 u32 ld_count;
bdc6fb8d
YB		 4328
4329 cmd = megasas_get_cmd(instance);
4330
4331 if (!cmd) {
1be18254 4332 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 4333 return -ENOMEM;
4334 }
4335
4336 dcmd = &cmd->frame->dcmd;
4337
4338 ci = pci_alloc_consistent(instance->pdev,
4339 sizeof(struct MR_LD_LIST),
4340 &ci_h);
4341
4342 if (!ci) {
1be18254 4343 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 4344 megasas_return_cmd(instance, cmd);
4345 return -ENOMEM;
4346 }
4347
4348 memset(ci, 0, sizeof(*ci));
4349 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4350
51087a86
SS		 4351 if (instance->supportmax256vd)
4352 dcmd->mbox.b[0] = 1;
bdc6fb8d 4353 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4354 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4355 dcmd->sge_count = 1;
94cd65dd 4356 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 4357 dcmd->timeout = 0;
94cd65dd
SS		 4358 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4359 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
4360 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4361 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 4362 dcmd->pad_0 = 0;
4363
90dc9d98
SS		 4364 if (instance->ctrl_context && !instance->mask_interrupts)
4365 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4366 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4367 else
4368 ret = megasas_issue_polled(instance, cmd);
4369
94cd65dd
SS		 4370 ld_count = le32_to_cpu(ci->ldCount);
4371
6d40afbc
SS		 4372 switch (ret) {
4373 case DCMD_FAILED:
4374 megaraid_sas_kill_hba(instance);
4375 break;
4376 case DCMD_TIMEOUT:
4377
4378 switch (dcmd_timeout_ocr_possible(instance)) {
4379 case INITIATE_OCR:
4380 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4381 /*
4382 * DCMD failed from AEN path.
4383 * AEN path already hold reset_mutex to avoid PCI access
4384 * while OCR is in progress.
4385 */
4386 mutex_unlock(&instance->reset_mutex);
4387 megasas_reset_fusion(instance->host,
4388 MFI_IO_TIMEOUT_OCR);
4389 mutex_lock(&instance->reset_mutex);
4390 break;
4391 case KILL_ADAPTER:
4392 megaraid_sas_kill_hba(instance);
4393 break;
4394 case IGNORE_TIMEOUT:
4395 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4396 __func__, __LINE__);
4397 break;
4398 }
4399
4400 break;
4401
4402 case DCMD_SUCCESS:
4403 if (ld_count > instance->fw_supported_vd_count)
4404 break;
bdc6fb8d 4405
51087a86 4406 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4407
94cd65dd 4408 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 4409 if (ci->ldList[ld_index].state != 0) {
4410 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4411 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB		 4412 }
4413 }
6d40afbc
SS		 4414
4415 break;
bdc6fb8d
YB		 4416 }
4417
6d40afbc
SS		 4418 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_LIST), ci, ci_h);
4419
4420 if (ret != DCMD_TIMEOUT)
4421 megasas_return_cmd(instance, cmd);
bdc6fb8d 4422
bdc6fb8d
YB		 4423 return ret;
4424}
4425
21c9e160
AR		 4426/**
4427 * megasas_ld_list_query - Returns FW's ld_list structure
4428 * @instance: Adapter soft state
4429 * @ld_list: ld_list structure
4430 *
4431 * Issues an internal command (DCMD) to get the FW's controller PD
4432 * list structure. This information is mainly used to find out SYSTEM
4433 * supported by the FW.
4434 */
4435static int
4436megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4437{
4438 int ret = 0, ld_index = 0, ids = 0;
4439 struct megasas_cmd *cmd;
4440 struct megasas_dcmd_frame *dcmd;
4441 struct MR_LD_TARGETID_LIST *ci;
4442 dma_addr_t ci_h = 0;
94cd65dd 4443 u32 tgtid_count;
21c9e160
AR		 4444
4445 cmd = megasas_get_cmd(instance);
4446
4447 if (!cmd) {
1be18254
BH		 4448 dev_warn(&instance->pdev->dev,
4449 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 4450 return -ENOMEM;
4451 }
4452
4453 dcmd = &cmd->frame->dcmd;
4454
4455 ci = pci_alloc_consistent(instance->pdev,
4456 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4457
4458 if (!ci) {
1be18254
BH		 4459 dev_warn(&instance->pdev->dev,
4460 "Failed to alloc mem for ld_list_query\n");
21c9e160
AR		 4461 megasas_return_cmd(instance, cmd);
4462 return -ENOMEM;
4463 }
4464
4465 memset(ci, 0, sizeof(*ci));
4466 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4467
4468 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4469 if (instance->supportmax256vd)
4470 dcmd->mbox.b[2] = 1;
21c9e160
AR		 4471
4472 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4473 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4474 dcmd->sge_count = 1;
94cd65dd 4475 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4476 dcmd->timeout = 0;
94cd65dd
SS		 4477 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4478 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4479 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4480 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160
AR		 4481 dcmd->pad_0 = 0;
4482
90dc9d98 4483 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4484 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4485 else
4486 ret = megasas_issue_polled(instance, cmd);
21c9e160 4487
6d40afbc
SS		 4488 switch (ret) {
4489 case DCMD_FAILED:
4490 dev_info(&instance->pdev->dev,
4491 "DCMD not supported by firmware - %s %d\n",
4492 __func__, __LINE__);
4493 ret = megasas_get_ld_list(instance);
4494 break;
4495 case DCMD_TIMEOUT:
4496 switch (dcmd_timeout_ocr_possible(instance)) {
4497 case INITIATE_OCR:
4498 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4499 /*
4500 * DCMD failed from AEN path.
4501 * AEN path already hold reset_mutex to avoid PCI access
4502 * while OCR is in progress.
4503 */
4504 mutex_unlock(&instance->reset_mutex);
4505 megasas_reset_fusion(instance->host,
4506 MFI_IO_TIMEOUT_OCR);
4507 mutex_lock(&instance->reset_mutex);
4508 break;
4509 case KILL_ADAPTER:
4510 megaraid_sas_kill_hba(instance);
4511 break;
4512 case IGNORE_TIMEOUT:
4513 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4514 __func__, __LINE__);
4515 break;
4516 }
4517
4518 break;
4519 case DCMD_SUCCESS:
4520 tgtid_count = le32_to_cpu(ci->count);
4521
4522 if ((tgtid_count > (instance->fw_supported_vd_count)))
4523 break;
94cd65dd 4524
21c9e160 4525 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4526 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 4527 ids = ci->targetId[ld_index];
4528 instance->ld_ids[ids] = ci->targetId[ld_index];
4529 }
4530
6d40afbc 4531 break;
21c9e160
AR		 4532 }
4533
4534 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
6d40afbc 4535 ci, ci_h);
21c9e160 4536
6d40afbc
SS		 4537 if (ret != DCMD_TIMEOUT)
4538 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4539
4540 return ret;
4541}
4542
d009b576
SS		 4543/*
4544 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4545 * instance : Controller's instance
4546*/
4547static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4548{
4549 struct fusion_context *fusion;
d889344e 4550 u32 ventura_map_sz = 0;
d009b576
SS		 4551
4552 fusion = instance->ctrl_context;
4553 /* For MFI based controllers return dummy success */
4554 if (!fusion)
4555 return;
4556
4557 instance->supportmax256vd =
4558 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4559 /* Below is additional check to address future FW enhancement */
4560 if (instance->ctrl_info->max_lds > 64)
4561 instance->supportmax256vd = 1;
4562
4563 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4564 * MEGASAS_MAX_DEV_PER_CHANNEL;
4565 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4566 * MEGASAS_MAX_DEV_PER_CHANNEL;
4567 if (instance->supportmax256vd) {
4568 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4569 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4570 } else {
4571 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4572 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4573 }
d88da09a
SS		 4574
4575 dev_info(&instance->pdev->dev,
4576 "firmware type\t: %s\n",
4577 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4578 "Legacy(64 VD) firmware");
d009b576 4579
d889344e
SC		 4580 if (instance->max_raid_mapsize) {
4581 ventura_map_sz = instance->max_raid_mapsize *
4582 MR_MIN_MAP_SIZE; /* 64k */
4583 fusion->current_map_sz = ventura_map_sz;
4584 fusion->max_map_sz = ventura_map_sz;
4585 } else {
4586 fusion->old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
4587 (sizeof(struct MR_LD_SPAN_MAP) *
4588 (instance->fw_supported_vd_count - 1));
4589 fusion->new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
d009b576 4590
d889344e
SC		 4591 fusion->max_map_sz =
4592 max(fusion->old_map_sz, fusion->new_map_sz);
d009b576 4593
d889344e
SC		 4594 if (instance->supportmax256vd)
4595 fusion->current_map_sz = fusion->new_map_sz;
4596 else
4597 fusion->current_map_sz = fusion->old_map_sz;
4598 }
4599 /* irrespective of FW raid maps, driver raid map is constant */
4600 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP_ALL);
4601
4602#if VD_EXT_DEBUG
4603 dev_info(&instance->pdev->dev, "instance->max_raid_mapsize 0x%x\n ",
4604 instance->max_raid_mapsize);
4605 dev_info(&instance->pdev->dev, "new_map_sz = 0x%x, old_map_sz = 0x%x\n",
4606 fusion->new_map_sz, fusion->old_map_sz);
4607 dev_info(&instance->pdev->dev, "ventura_map_sz = 0x%x, current_map_sz = 0x%x\n",
4608 ventura_map_sz, fusion->current_map_sz);
4609 dev_info(&instance->pdev->dev, "fusion->drv_map_sz =0x%x, size of driver raid map 0x%lx\n",
4610 fusion->drv_map_sz, sizeof(struct MR_DRV_RAID_MAP_ALL));
4611#endif
d009b576
SS		 4612}
4613
c4a3e0a5
BS		 4614/**
4615 * megasas_get_controller_info - Returns FW's controller structure
4616 * @instance: Adapter soft state
c4a3e0a5
BS		 4617 *
4618 * Issues an internal command (DCMD) to get the FW's controller structure.
4619 * This information is mainly used to find out the maximum IO transfer per
4620 * command supported by the FW.
4621 */
51087a86 4622int
d009b576 4623megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4624{
4625 int ret = 0;
4626 struct megasas_cmd *cmd;
4627 struct megasas_dcmd_frame *dcmd;
4628 struct megasas_ctrl_info *ci;
d009b576 4629 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4630 dma_addr_t ci_h = 0;
4631
d009b576
SS		 4632 ctrl_info = instance->ctrl_info;
4633
c4a3e0a5
BS		 4634 cmd = megasas_get_cmd(instance);
4635
4636 if (!cmd) {
1be18254 4637 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4638 return -ENOMEM;
4639 }
4640
4641 dcmd = &cmd->frame->dcmd;
4642
4643 ci = pci_alloc_consistent(instance->pdev,
4644 sizeof(struct megasas_ctrl_info), &ci_h);
4645
4646 if (!ci) {
1be18254 4647 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4648 megasas_return_cmd(instance, cmd);
4649 return -ENOMEM;
4650 }
4651
4652 memset(ci, 0, sizeof(*ci));
4653 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4654
4655 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4656 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4657 dcmd->sge_count = 1;
94cd65dd 4658 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4659 dcmd->timeout = 0;
780a3762 4660 dcmd->pad_0 = 0;
94cd65dd
SS		 4661 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4662 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4663 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4664 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4665 dcmd->mbox.b[0] = 1;
c4a3e0a5 4666
90dc9d98 4667 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4668 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4669 else
4670 ret = megasas_issue_polled(instance, cmd);
4671
6d40afbc
SS		 4672 switch (ret) {
4673 case DCMD_SUCCESS:
c4a3e0a5 4674 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
6d40afbc
SS		 4675 /* Save required controller information in
4676 * CPU endianness format.
4677 */
d009b576
SS		 4678 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4679 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4680 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
ede7c3ce 4681 le16_to_cpus((u16 *)&ctrl_info->adapter_operations4);
6d40afbc
SS		 4682
4683 /* Update the latest Ext VD info.
4684 * From Init path, store current firmware details.
4685 * From OCR path, detect any firmware properties changes.
4686 * in case of Firmware upgrade without system reboot.
4687 */
d009b576 4688 megasas_update_ext_vd_details(instance);
3761cb4c 4689 instance->use_seqnum_jbod_fp =
4690 ctrl_info->adapterOperations3.useSeqNumJbodFP;
ede7c3ce
SC		 4691 instance->support_morethan256jbod =
4692 ctrl_info->adapter_operations4.support_pd_map_target_id;
6d40afbc
SS		 4693
4694 /*Check whether controller is iMR or MR */
4026e9aa
SS		 4695 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4696 dev_info(&instance->pdev->dev,
6d40afbc
SS		 4697 "controller type\t: %s(%dMB)\n",
4698 instance->is_imr ? "iMR" : "MR",
4699 le16_to_cpu(ctrl_info->memory_size));
4700
c4bd2654 4701 instance->disableOnlineCtrlReset =
4702 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4703 instance->secure_jbod_support =
4704 ctrl_info->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS		 4705 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4706 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4707 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4708 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS		 4709 break;
4710
4711 case DCMD_TIMEOUT:
4712 switch (dcmd_timeout_ocr_possible(instance)) {
4713 case INITIATE_OCR:
4714 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4715 megasas_reset_fusion(instance->host,
4716 MFI_IO_TIMEOUT_OCR);
4717 break;
4718 case KILL_ADAPTER:
4719 megaraid_sas_kill_hba(instance);
4720 break;
4721 case IGNORE_TIMEOUT:
4722 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4723 __func__, __LINE__);
4724 break;
4725 }
4726 case DCMD_FAILED:
4727 megaraid_sas_kill_hba(instance);
4728 break;
4729
d009b576 4730 }
c4a3e0a5
BS		 4731
4732 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4733 ci, ci_h);
4734
4026e9aa 4735 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 4736
4737
c4a3e0a5
BS		 4738 return ret;
4739}
4740
fc62b3fc
SS		 4741/*
4742 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4743 * to firmware
4744 *
4745 * @instance: Adapter soft state
4746 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4747 MR_CRASH_BUF_TURN_OFF = 0
4748 MR_CRASH_BUF_TURN_ON = 1
4749 * @return 0 on success non-zero on failure.
4750 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4751 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4752 * that driver supports crash dump feature. This DCMD will be sent only if
4753 * crash dump feature is supported by the FW.
4754 *
4755 */
4756int megasas_set_crash_dump_params(struct megasas_instance *instance,
4757 u8 crash_buf_state)
4758{
4759 int ret = 0;
4760 struct megasas_cmd *cmd;
4761 struct megasas_dcmd_frame *dcmd;
4762
4763 cmd = megasas_get_cmd(instance);
4764
4765 if (!cmd) {
4766 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4767 return -ENOMEM;
4768 }
4769
4770
4771 dcmd = &cmd->frame->dcmd;
4772
4773 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4774 dcmd->mbox.b[0] = crash_buf_state;
4775 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4776 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4777 dcmd->sge_count = 1;
4778 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4779 dcmd->timeout = 0;
4780 dcmd->pad_0 = 0;
4781 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4782 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4783 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4784 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4785
90dc9d98 4786 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4787 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4788 else
90dc9d98
SS		 4789 ret = megasas_issue_polled(instance, cmd);
4790
6d40afbc
SS		 4791 if (ret == DCMD_TIMEOUT) {
4792 switch (dcmd_timeout_ocr_possible(instance)) {
4793 case INITIATE_OCR:
4794 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4795 megasas_reset_fusion(instance->host,
4796 MFI_IO_TIMEOUT_OCR);
4797 break;
4798 case KILL_ADAPTER:
4799 megaraid_sas_kill_hba(instance);
4800 break;
4801 case IGNORE_TIMEOUT:
4802 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4803 __func__, __LINE__);
4804 break;
4805 }
4806 } else
4807 megasas_return_cmd(instance, cmd);
4808
fc62b3fc
SS		 4809 return ret;
4810}
4811
31ea7088 4812/**
4813 * megasas_issue_init_mfi - Initializes the FW
4814 * @instance: Adapter soft state
4815 *
4816 * Issues the INIT MFI cmd
4817 */
4818static int
4819megasas_issue_init_mfi(struct megasas_instance *instance)
4820{
9ab9ed38 4821 __le32 context;
31ea7088 4822 struct megasas_cmd *cmd;
31ea7088 4823 struct megasas_init_frame *init_frame;
4824 struct megasas_init_queue_info *initq_info;
4825 dma_addr_t init_frame_h;
4826 dma_addr_t initq_info_h;
4827
4828 /*
4829 * Prepare a init frame. Note the init frame points to queue info
4830 * structure. Each frame has SGL allocated after first 64 bytes. For
4831 * this frame - since we don't need any SGL - we use SGL's space as
4832 * queue info structure
4833 *
4834 * We will not get a NULL command below. We just created the pool.
4835 */
4836 cmd = megasas_get_cmd(instance);
4837
4838 init_frame = (struct megasas_init_frame *)cmd->frame;
4839 initq_info = (struct megasas_init_queue_info *)
4840 ((unsigned long)init_frame + 64);
4841
4842 init_frame_h = cmd->frame_phys_addr;
4843 initq_info_h = init_frame_h + 64;
4844
4845 context = init_frame->context;
4846 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4847 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4848 init_frame->context = context;
4849
94cd65dd
SS		 4850 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4851 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4852
94cd65dd
SS		 4853 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4854 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4855
4856 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4857 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4858 init_frame->queue_info_new_phys_addr_lo =
4859 cpu_to_le32(lower_32_bits(initq_info_h));
4860 init_frame->queue_info_new_phys_addr_hi =
4861 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4862
94cd65dd 4863 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4864
4865 /*
4866 * disable the intr before firing the init frame to FW
4867 */
d46a3ad6 4868 instance->instancet->disable_intr(instance);
31ea7088 4869
4870 /*
4871 * Issue the init frame in polled mode
4872 */
4873
4874 if (megasas_issue_polled(instance, cmd)) {
1be18254 4875 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4876 megasas_return_cmd(instance, cmd);
4877 goto fail_fw_init;
4878 }
4879
4880 megasas_return_cmd(instance, cmd);
4881
4882 return 0;
4883
4884fail_fw_init:
4885 return -EINVAL;
4886}
4887
cd50ba8e
AR		 4888static u32
4889megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4890{
cd50ba8e 4891 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4892 u32 context_sz;
4893 u32 reply_q_sz;
c4a3e0a5
BS		 4894
4895 reg_set = instance->reg_set;
4896
c4a3e0a5
BS		 4897 /*
4898 * Get various operational parameters from status register
4899 */
1341c939 4900 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4901 /*
4902 * Reduce the max supported cmds by 1. This is to ensure that the
4903 * reply_q_sz (1 more than the max cmd that driver may send)
4904 * does not exceed max cmds that the FW can support
4905 */
4906 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4907 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4908 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4909 0x10;
f26ac3a1
SS		 4910 /*
4911 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4912 * are reserved for IOCTL + driver's internal DCMDs.
4913 */
4914 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4915 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4916 instance->max_scsi_cmds = (instance->max_fw_cmds -
4917 MEGASAS_SKINNY_INT_CMDS);
4918 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4919 } else {
4920 instance->max_scsi_cmds = (instance->max_fw_cmds -
4921 MEGASAS_INT_CMDS);
4922 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4923 }
4924
308ec459 4925 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 4926 /*
4927 * Create a pool of commands
4928 */
4929 if (megasas_alloc_cmds(instance))
4930 goto fail_alloc_cmds;
4931
4932 /*
4933 * Allocate memory for reply queue. Length of reply queue should
4934 * be _one_ more than the maximum commands handled by the firmware.
4935 *
4936 * Note: When FW completes commands, it places corresponding contex
4937 * values in this circular reply queue. This circular queue is a fairly
4938 * typical producer-consumer queue. FW is the producer (of completed
4939 * commands) and the driver is the consumer.
4940 */
4941 context_sz = sizeof(u32);
4942 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4943
4944 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4945 reply_q_sz,
4946 &instance->reply_queue_h);
4947
4948 if (!instance->reply_queue) {
1be18254 4949 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4950 goto fail_reply_queue;
4951 }
4952
31ea7088 4953 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4954 goto fail_fw_init;
c4a3e0a5 4955
d009b576 4956 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4957 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4958 "Fail from %s %d\n", instance->unique_id,
4959 __func__, __LINE__);
4960 goto fail_fw_init;
4961 }
4962
39a98554 4963 instance->fw_support_ieee = 0;
4964 instance->fw_support_ieee =
4965 (instance->instancet->read_fw_status_reg(reg_set) &
4966 0x04000000);
4967
1be18254 4968 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4969 instance->fw_support_ieee);
4970
4971 if (instance->fw_support_ieee)
4972 instance->flag_ieee = 1;
4973
cd50ba8e
AR		 4974 return 0;
4975
4976fail_fw_init:
4977
4978 pci_free_consistent(instance->pdev, reply_q_sz,
4979 instance->reply_queue, instance->reply_queue_h);
4980fail_reply_queue:
4981 megasas_free_cmds(instance);
4982
4983fail_alloc_cmds:
cd50ba8e
AR		 4984 return 1;
4985}
4986
d3557fc8 4987/*
fad119b7 4988 * megasas_setup_irqs_ioapic - register legacy interrupts.
d3557fc8
SS		 4989 * @instance: Adapter soft state
4990 *
4991 * Do not enable interrupt, only setup ISRs.
4992 *
4993 * Return 0 on success.
4994 */
4995static int
4996megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4997{
4998 struct pci_dev *pdev;
4999
5000 pdev = instance->pdev;
5001 instance->irq_context[0].instance = instance;
5002 instance->irq_context[0].MSIxIndex = 0;
fad119b7
HR		 5003 if (request_irq(pci_irq_vector(pdev, 0),
5004 instance->instancet->service_isr, IRQF_SHARED,
5005 "megasas", &instance->irq_context[0])) {
d3557fc8
SS		 5006 dev_err(&instance->pdev->dev,
5007 "Failed to register IRQ from %s %d\n",
5008 __func__, __LINE__);
5009 return -1;
5010 }
5011 return 0;
5012}
5013
5014/**
5015 * megasas_setup_irqs_msix - register MSI-x interrupts.
5016 * @instance: Adapter soft state
5017 * @is_probe: Driver probe check
5018 *
5019 * Do not enable interrupt, only setup ISRs.
5020 *
5021 * Return 0 on success.
5022 */
5023static int
5024megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
5025{
fad119b7 5026 int i, j;
d3557fc8
SS		 5027 struct pci_dev *pdev;
5028
5029 pdev = instance->pdev;
5030
5031 /* Try MSI-x */
d3557fc8
SS		 5032 for (i = 0; i < instance->msix_vectors; i++) {
5033 instance->irq_context[i].instance = instance;
5034 instance->irq_context[i].MSIxIndex = i;
fad119b7 5035 if (request_irq(pci_irq_vector(pdev, i),
d3557fc8
SS		 5036 instance->instancet->service_isr, 0, "megasas",
5037 &instance->irq_context[i])) {
5038 dev_err(&instance->pdev->dev,
5039 "Failed to register IRQ for vector %d.\n", i);
fad119b7
HR		 5040 for (j = 0; j < i; j++)
5041 free_irq(pci_irq_vector(pdev, j),
5042 &instance->irq_context[j]);
d3557fc8
SS		 5043 /* Retry irq register for IO_APIC*/
5044 instance->msix_vectors = 0;
5045 if (is_probe)
5046 return megasas_setup_irqs_ioapic(instance);
5047 else
5048 return -1;
5049 }
d3557fc8
SS		 5050 }
5051 return 0;
5052}
5053
5054/*
5055 * megasas_destroy_irqs- unregister interrupts.
5056 * @instance: Adapter soft state
5057 * return: void
5058 */
5059static void
5060megasas_destroy_irqs(struct megasas_instance *instance) {
5061
5062 int i;
5063
5064 if (instance->msix_vectors)
5065 for (i = 0; i < instance->msix_vectors; i++) {
fad119b7 5066 free_irq(pci_irq_vector(instance->pdev, i),
d3557fc8
SS		 5067 &instance->irq_context[i]);
5068 }
5069 else
fad119b7
HR		 5070 free_irq(pci_irq_vector(instance->pdev, 0),
5071 &instance->irq_context[0]);
d3557fc8
SS		 5072}
5073
3761cb4c 5074/**
5075 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
5076 * @instance: Adapter soft state
5077 * @is_probe: Driver probe check
5078 *
5079 * Return 0 on success.
5080 */
5081void
5082megasas_setup_jbod_map(struct megasas_instance *instance)
5083{
5084 int i;
5085 struct fusion_context *fusion = instance->ctrl_context;
5086 u32 pd_seq_map_sz;
5087
5088 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5089 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
5090
5091 if (reset_devices || !fusion ||
5092 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
5093 dev_info(&instance->pdev->dev,
5094 "Jbod map is not supported %s %d\n",
5095 __func__, __LINE__);
5096 instance->use_seqnum_jbod_fp = false;
5097 return;
5098 }
5099
5100 if (fusion->pd_seq_sync[0])
5101 goto skip_alloc;
5102
5103 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
5104 fusion->pd_seq_sync[i] = dma_alloc_coherent
5105 (&instance->pdev->dev, pd_seq_map_sz,
5106 &fusion->pd_seq_phys[i], GFP_KERNEL);
5107 if (!fusion->pd_seq_sync[i]) {
5108 dev_err(&instance->pdev->dev,
5109 "Failed to allocate memory from %s %d\n",
5110 __func__, __LINE__);
5111 if (i == 1) {
5112 dma_free_coherent(&instance->pdev->dev,
5113 pd_seq_map_sz, fusion->pd_seq_sync[0],
5114 fusion->pd_seq_phys[0]);
5115 fusion->pd_seq_sync[0] = NULL;
5116 }
5117 instance->use_seqnum_jbod_fp = false;
5118 return;
5119 }
5120 }
5121
5122skip_alloc:
5123 if (!megasas_sync_pd_seq_num(instance, false) &&
5124 !megasas_sync_pd_seq_num(instance, true))
5125 instance->use_seqnum_jbod_fp = true;
5126 else
5127 instance->use_seqnum_jbod_fp = false;
5128}
5129
cd50ba8e
AR		 5130/**
5131 * megasas_init_fw - Initializes the FW
5132 * @instance: Adapter soft state
5133 *
5134 * This is the main function for initializing firmware
5135 */
5136
5137static int megasas_init_fw(struct megasas_instance *instance)
5138{
5139 u32 max_sectors_1;
15dd0381
S		 5140 u32 max_sectors_2, tmp_sectors, msix_enable;
5141 u32 scratch_pad_2, scratch_pad_3, scratch_pad_4;
11f8a7b3 5142 resource_size_t base_addr;
cd50ba8e 5143 struct megasas_register_set __iomem *reg_set;
51087a86 5144 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 5145 unsigned long bar_list;
fdd84e25 5146 int i, j, loop, fw_msix_count = 0;
229fe47c 5147 struct IOV_111 *iovPtr;
5a8cb85b 5148 struct fusion_context *fusion;
5149
5150 fusion = instance->ctrl_context;
cd50ba8e
AR		 5151
5152 /* Find first memory bar */
5153 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
51f9039f 5154 instance->bar = find_first_bit(&bar_list, BITS_PER_LONG);
e7f85168 5155 if (pci_request_selected_regions(instance->pdev, 1<<instance->bar,
cd50ba8e 5156 "megasas: LSI")) {
1be18254 5157 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 5158 return -EBUSY;
5159 }
5160
11f8a7b3
BC		 5161 base_addr = pci_resource_start(instance->pdev, instance->bar);
5162 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 5163
5164 if (!instance->reg_set) {
1be18254 5165 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 5166 goto fail_ioremap;
5167 }
5168
5169 reg_set = instance->reg_set;
5170
9581ebeb 5171 if (fusion)
9c915a8c 5172 instance->instancet = &megasas_instance_template_fusion;
9581ebeb
SC		 5173 else {
5174 switch (instance->pdev->device) {
5175 case PCI_DEVICE_ID_LSI_SAS1078R:
5176 case PCI_DEVICE_ID_LSI_SAS1078DE:
5177 instance->instancet = &megasas_instance_template_ppc;
5178 break;
5179 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5180 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5181 instance->instancet = &megasas_instance_template_gen2;
5182 break;
5183 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5184 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5185 instance->instancet = &megasas_instance_template_skinny;
5186 break;
5187 case PCI_DEVICE_ID_LSI_SAS1064R:
5188 case PCI_DEVICE_ID_DELL_PERC5:
5189 default:
5190 instance->instancet = &megasas_instance_template_xscale;
5191 instance->pd_list_not_supported = 1;
5192 break;
5193 }
cd50ba8e
AR		 5194 }
5195
6431f5d7
SS		 5196 if (megasas_transition_to_ready(instance, 0)) {
5197 atomic_set(&instance->fw_reset_no_pci_access, 1);
5198 instance->instancet->adp_reset
5199 (instance, instance->reg_set);
5200 atomic_set(&instance->fw_reset_no_pci_access, 0);
5201 dev_info(&instance->pdev->dev,
1be18254 5202 "FW restarted successfully from %s!\n",
6431f5d7
SS		 5203 __func__);
5204
5205 /*waitting for about 30 second before retry*/
5206 ssleep(30);
5207
5208 if (megasas_transition_to_ready(instance, 0))
5209 goto fail_ready_state;
5210 }
cd50ba8e 5211
d889344e
SC		 5212 if (instance->is_ventura) {
5213 scratch_pad_3 =
5214 readl(&instance->reg_set->outbound_scratch_pad_3);
5215#if VD_EXT_DEBUG
5216 dev_info(&instance->pdev->dev, "scratch_pad3 0x%x\n",
5217 scratch_pad_3);
5218#endif
5219 instance->max_raid_mapsize = ((scratch_pad_3 >>
5220 MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
5221 MR_MAX_RAID_MAP_SIZE_MASK);
5222 }
d46a3ad6 5223
3f1abce4
AR		 5224 /* Check if MSI-X is supported while in ready state */
5225 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5226 0x4000000) >> 0x1a;
c8e858fe 5227 if (msix_enable && !msix_disable) {
fad119b7
HR		 5228 int irq_flags = PCI_IRQ_MSIX;
5229
d46a3ad6
SS		 5230 scratch_pad_2 = readl
5231 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5232 /* Check max MSI-X vectors */
5a8cb85b 5233 if (fusion) {
5234 if (fusion->adapter_type == THUNDERBOLT_SERIES) { /* Thunderbolt Series*/
5235 instance->msix_vectors = (scratch_pad_2
5236 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5237 fw_msix_count = instance->msix_vectors;
5238 } else { /* Invader series supports more than 8 MSI-x vectors*/
5239 instance->msix_vectors = ((scratch_pad_2
5240 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5241 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
2493c67e
SC		 5242 if (instance->msix_vectors > 16)
5243 instance->msix_combined = true;
5244
179ac142
SS		 5245 if (rdpq_enable)
5246 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5247 1 : 0;
5a8cb85b 5248 fw_msix_count = instance->msix_vectors;
5249 /* Save 1-15 reply post index address to local memory
5250 * Index 0 is already saved from reg offset
5251 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5252 */
5253 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5254 instance->reply_post_host_index_addr[loop] =
5255 (u32 __iomem *)
5256 ((u8 __iomem *)instance->reg_set +
5257 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5258 + (loop * 0x10));
5259 }
d46a3ad6
SS		 5260 }
5261 if (msix_vectors)
5262 instance->msix_vectors = min(msix_vectors,
5263 instance->msix_vectors);
5a8cb85b 5264 } else /* MFI adapters */
c8e858fe
AR		 5265 instance->msix_vectors = 1;
5266 /* Don't bother allocating more MSI-X vectors than cpus */
5267 instance->msix_vectors = min(instance->msix_vectors,
5268 (unsigned int)num_online_cpus());
fad119b7
HR		 5269 if (smp_affinity_enable)
5270 irq_flags |= PCI_IRQ_AFFINITY;
5271 i = pci_alloc_irq_vectors(instance->pdev, 1,
5272 instance->msix_vectors, irq_flags);
c12de882 5273 if (i > 0)
8ae80ed1
AG		 5274 instance->msix_vectors = i;
5275 else
c8e858fe
AR		 5276 instance->msix_vectors = 0;
5277 }
2493c67e
SC		 5278 /*
5279 * MSI-X host index 0 is common for all adapter.
5280 * It is used for all MPT based Adapters.
5281 */
5282 if (instance->msix_combined) {
5283 instance->reply_post_host_index_addr[0] =
5284 (u32 *)((u8 *)instance->reg_set +
5285 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET);
5286 } else {
5287 instance->reply_post_host_index_addr[0] =
5288 (u32 *)((u8 *)instance->reg_set +
5289 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5290 }
5291
fad119b7
HR		 5292 i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
5293 if (i < 0)
5294 goto fail_setup_irqs;
3f1abce4 5295
258c3af2
TH		 5296 dev_info(&instance->pdev->dev,
5297 "firmware supports msix\t: (%d)", fw_msix_count);
5298 dev_info(&instance->pdev->dev,
5299 "current msix/online cpus\t: (%d/%d)\n",
5300 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS		 5301 dev_info(&instance->pdev->dev,
5302 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5303
91626c27 5304 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5305 (unsigned long)instance);
5306
51087a86
SS		 5307 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
5308 GFP_KERNEL);
5309 if (instance->ctrl_info == NULL)
5310 goto fail_init_adapter;
5311
5312 /*
5313 * Below are default value for legacy Firmware.
5314 * non-fusion based controllers
5315 */
5316 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5317 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 5318 /* Get operational params, sge flags, send init cmd to controller */
5319 if (instance->instancet->init_adapter(instance))
eb1b1237 5320 goto fail_init_adapter;
cd50ba8e 5321
15dd0381
S		 5322 if (instance->is_ventura) {
5323 scratch_pad_4 =
5324 readl(&instance->reg_set->outbound_scratch_pad_4);
5325 if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
5326 MR_DEFAULT_NVME_PAGE_SHIFT)
5327 instance->nvme_page_size =
5328 (1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK));
5329
5330 dev_info(&instance->pdev->dev,
5331 "NVME page size\t: (%d)\n", instance->nvme_page_size);
5332 }
5333
18103efc
TH		 5334 if (instance->msix_vectors ?
5335 megasas_setup_irqs_msix(instance, 1) :
5336 megasas_setup_irqs_ioapic(instance))
5337 goto fail_init_adapter;
258c3af2 5338
d3557fc8 5339 instance->instancet->enable_intr(instance);
cd50ba8e 5340
13f30771 5341 dev_info(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5342
3761cb4c 5343 megasas_setup_jbod_map(instance);
5344
39a98554 5345 /** for passthrough
da0dc9fb
BH		 5346 * the following function will get the PD LIST.
5347 */
5348 memset(instance->pd_list, 0,
81e403ce 5349 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5350 if (megasas_get_pd_list(instance) < 0) {
1be18254 5351 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 5352 goto fail_get_pd_list;
58968fc8 5353 }
81e403ce 5354
bdc6fb8d 5355 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
fdd84e25
SC		 5356
5357 /* stream detection initialization */
5358 if (instance->is_ventura) {
5359 fusion->stream_detect_by_ld =
5360 kzalloc(sizeof(struct LD_STREAM_DETECT *)
5361 * MAX_LOGICAL_DRIVES_EXT,
5362 GFP_KERNEL);
5363 if (!fusion->stream_detect_by_ld) {
5364 dev_err(&instance->pdev->dev,
5365 "unable to allocate stream detection for pool of LDs\n");
5366 goto fail_get_ld_pd_list;
5367 }
5368 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) {
5369 fusion->stream_detect_by_ld[i] =
5370 kmalloc(sizeof(struct LD_STREAM_DETECT),
5371 GFP_KERNEL);
5372 if (!fusion->stream_detect_by_ld[i]) {
5373 dev_err(&instance->pdev->dev,
5374 "unable to allocate stream detect by LD\n ");
5375 for (j = 0; j < i; ++j)
5376 kfree(fusion->stream_detect_by_ld[j]);
5377 kfree(fusion->stream_detect_by_ld);
5378 fusion->stream_detect_by_ld = NULL;
5379 goto fail_get_ld_pd_list;
5380 }
5381 fusion->stream_detect_by_ld[i]->mru_bit_map
5382 = MR_STREAM_BITMAP;
5383 }
5384 }
5385
21c9e160
AR		 5386 if (megasas_ld_list_query(instance,
5387 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
5388 megasas_get_ld_list(instance);
bdc6fb8d 5389
c4a3e0a5
BS		 5390 /*
5391 * Compute the max allowed sectors per IO: The controller info has two
5392 * limits on max sectors. Driver should use the minimum of these two.
5393 *
5394 * 1 << stripe_sz_ops.min = max sectors per strip
5395 *
5396 * Note that older firmwares ( < FW ver 30) didn't report information
5397 * to calculate max_sectors_1. So the number ended up as zero always.
5398 */
14faea9f 5399 tmp_sectors = 0;
51087a86 5400 ctrl_info = instance->ctrl_info;
c4a3e0a5 5401
51087a86
SS		 5402 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5403 le16_to_cpu(ctrl_info->max_strips_per_io);
5404 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5405
da0dc9fb 5406 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5407
8f67c8c5
SS		 5408 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5409 instance->passive = ctrl_info->cluster.passive;
5410 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS		 5411 instance->UnevenSpanSupport =
5412 ctrl_info->adapterOperations2.supportUnevenSpans;
5413 if (instance->UnevenSpanSupport) {
5414 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 5415 if (MR_ValidateMapInfo(instance))
5416 fusion->fast_path_io = 1;
5417 else
5418 fusion->fast_path_io = 0;
fc62b3fc 5419
51087a86
SS		 5420 }
5421 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5422 instance->requestorId = ctrl_info->iov.requestorId;
5423 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5424 if (!ctrl_info->adapterOperations2.activePassive)
5425 instance->PlasmaFW111 = 1;
5426
5427 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5428 instance->PlasmaFW111 ? "1.11" : "new");
5429
5430 if (instance->PlasmaFW111) {
5431 iovPtr = (struct IOV_111 *)
5432 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5433 instance->requestorId = iovPtr->requestorId;
5434 }
fc62b3fc 5435 }
92bb6505 5436 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5437 instance->requestorId);
51087a86
SS		 5438 }
5439
51087a86
SS		 5440 instance->crash_dump_fw_support =
5441 ctrl_info->adapterOperations3.supportCrashDump;
5442 instance->crash_dump_drv_support =
5443 (instance->crash_dump_fw_support &&
5444 instance->crash_dump_buf);
d88da09a 5445 if (instance->crash_dump_drv_support)
51087a86
SS		 5446 megasas_set_crash_dump_params(instance,
5447 MR_CRASH_BUF_TURN_OFF);
5448
d88da09a 5449 else {
51087a86
SS		 5450 if (instance->crash_dump_buf)
5451 pci_free_consistent(instance->pdev,
5452 CRASH_DMA_BUF_SIZE,
5453 instance->crash_dump_buf,
5454 instance->crash_dump_h);
5455 instance->crash_dump_buf = NULL;
14faea9f 5456 }
7497cde8 5457
d88da09a
SS		 5458
5459 dev_info(&instance->pdev->dev,
5460 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5461 le16_to_cpu(ctrl_info->pci.vendor_id),
5462 le16_to_cpu(ctrl_info->pci.device_id),
5463 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5464 le16_to_cpu(ctrl_info->pci.sub_device_id));
5465 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5466 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS		 5467 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5468 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5469 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5470 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 5471
5472
14faea9f 5473 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5474 SGE_BUFFER_SIZE / 512;
14faea9f 5475 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5476 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5477
ae09a6c1
SS		 5478 /* Check for valid throttlequeuedepth module parameter */
5479 if (throttlequeuedepth &&
5480 throttlequeuedepth <= instance->max_scsi_cmds)
5481 instance->throttlequeuedepth = throttlequeuedepth;
5482 else
5483 instance->throttlequeuedepth =
5484 MEGASAS_THROTTLE_QUEUE_DEPTH;
5485
e3d178ca
SS		 5486 if (resetwaittime > MEGASAS_RESET_WAIT_TIME)
5487 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5488
5489 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5490 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5491
229fe47c
AR		 5492 /* Launch SR-IOV heartbeat timer */
5493 if (instance->requestorId) {
5494 if (!megasas_sriov_start_heartbeat(instance, 1))
5495 megasas_start_timer(instance,
5496 &instance->sriov_heartbeat_timer,
5497 megasas_sriov_heartbeat_handler,
5498 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5499 else
5500 instance->skip_heartbeat_timer_del = 1;
5501 }
5502
c4a3e0a5
BS		 5503 return 0;
5504
fdd84e25
SC		 5505fail_get_ld_pd_list:
5506 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5507fail_get_pd_list:
5508 instance->instancet->disable_intr(instance);
18103efc 5509fail_init_adapter:
fad119b7
HR		 5510 megasas_destroy_irqs(instance);
5511fail_setup_irqs:
d3557fc8 5512 if (instance->msix_vectors)
fad119b7 5513 pci_free_irq_vectors(instance->pdev);
d3557fc8 5514 instance->msix_vectors = 0;
cd50ba8e 5515fail_ready_state:
51087a86
SS		 5516 kfree(instance->ctrl_info);
5517 instance->ctrl_info = NULL;
c4a3e0a5
BS		 5518 iounmap(instance->reg_set);
5519
5520 fail_ioremap:
e7f85168 5521 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5
BS		 5522
5523 return -EINVAL;
5524}
5525
5526/**
5527 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5528 * @instance: Adapter soft state
c4a3e0a5
BS		 5529 */
5530static void megasas_release_mfi(struct megasas_instance *instance)
5531{
9c915a8c 5532 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5533
9c915a8c
AR		 5534 if (instance->reply_queue)
5535 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 5536 instance->reply_queue, instance->reply_queue_h);
5537
5538 megasas_free_cmds(instance);
5539
5540 iounmap(instance->reg_set);
5541
e7f85168 5542 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5
BS		 5543}
5544
5545/**
5546 * megasas_get_seq_num - Gets latest event sequence numbers
5547 * @instance: Adapter soft state
5548 * @eli: FW event log sequence numbers information
5549 *
5550 * FW maintains a log of all events in a non-volatile area. Upper layers would
5551 * usually find out the latest sequence number of the events, the seq number at
5552 * the boot etc. They would "read" all the events below the latest seq number
5553 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5554 * number), they would subsribe to AEN (asynchronous event notification) and
5555 * wait for the events to happen.
5556 */
5557static int
5558megasas_get_seq_num(struct megasas_instance *instance,
5559 struct megasas_evt_log_info *eli)
5560{
5561 struct megasas_cmd *cmd;
5562 struct megasas_dcmd_frame *dcmd;
5563 struct megasas_evt_log_info *el_info;
5564 dma_addr_t el_info_h = 0;
5565
5566 cmd = megasas_get_cmd(instance);
5567
5568 if (!cmd) {
5569 return -ENOMEM;
5570 }
5571
5572 dcmd = &cmd->frame->dcmd;
5573 el_info = pci_alloc_consistent(instance->pdev,
5574 sizeof(struct megasas_evt_log_info),
5575 &el_info_h);
5576
5577 if (!el_info) {
5578 megasas_return_cmd(instance, cmd);
5579 return -ENOMEM;
5580 }
5581
5582 memset(el_info, 0, sizeof(*el_info));
5583 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5584
5585 dcmd->cmd = MFI_CMD_DCMD;
5586 dcmd->cmd_status = 0x0;
5587 dcmd->sge_count = 1;
94cd65dd 5588 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5589 dcmd->timeout = 0;
780a3762 5590 dcmd->pad_0 = 0;
94cd65dd
SS		 5591 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5592 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5593 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5594 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5595
6d40afbc
SS		 5596 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS) ==
5597 DCMD_SUCCESS) {
cfbe7554
SS		 5598 /*
5599 * Copy the data back into callers buffer
5600 */
48100b0e
CH		 5601 eli->newest_seq_num = el_info->newest_seq_num;
5602 eli->oldest_seq_num = el_info->oldest_seq_num;
5603 eli->clear_seq_num = el_info->clear_seq_num;
5604 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5605 eli->boot_seq_num = el_info->boot_seq_num;
6d40afbc
SS		 5606 } else
5607 dev_err(&instance->pdev->dev, "DCMD failed "
5608 "from %s\n", __func__);
c4a3e0a5
BS		 5609
5610 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5611 el_info, el_info_h);
5612
4026e9aa 5613 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5614
5615 return 0;
5616}
5617
5618/**
5619 * megasas_register_aen - Registers for asynchronous event notification
5620 * @instance: Adapter soft state
5621 * @seq_num: The starting sequence number
5622 * @class_locale: Class of the event
5623 *
5624 * This function subscribes for AEN for events beyond the @seq_num. It requests
5625 * to be notified if and only if the event is of type @class_locale
5626 */
5627static int
5628megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5629 u32 class_locale_word)
5630{
5631 int ret_val;
5632 struct megasas_cmd *cmd;
5633 struct megasas_dcmd_frame *dcmd;
5634 union megasas_evt_class_locale curr_aen;
5635 union megasas_evt_class_locale prev_aen;
5636
5637 /*
5638 * If there an AEN pending already (aen_cmd), check if the
5639 * class_locale of that pending AEN is inclusive of the new
5640 * AEN request we currently have. If it is, then we don't have
5641 * to do anything. In other words, whichever events the current
5642 * AEN request is subscribing to, have already been subscribed
5643 * to.
5644 *
5645 * If the old_cmd is _not_ inclusive, then we have to abort
5646 * that command, form a class_locale that is superset of both
5647 * old and current and re-issue to the FW
5648 */
5649
5650 curr_aen.word = class_locale_word;
5651
5652 if (instance->aen_cmd) {
5653
a9555534
CH		 5654 prev_aen.word =
5655 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS		 5656
5657 /*
5658 * A class whose enum value is smaller is inclusive of all
5659 * higher values. If a PROGRESS (= -1) was previously
5660 * registered, then a new registration requests for higher
5661 * classes need not be sent to FW. They are automatically
5662 * included.
5663 *
5664 * Locale numbers don't have such hierarchy. They are bitmap
5665 * values
5666 */
5667 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5668 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5669 curr_aen.members.locale)) {
5670 /*
5671 * Previously issued event registration includes
5672 * current request. Nothing to do.
5673 */
5674 return 0;
5675 } else {
3993a862 5676 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5677
5678 if (prev_aen.members.class < curr_aen.members.class)
5679 curr_aen.members.class = prev_aen.members.class;
5680
5681 instance->aen_cmd->abort_aen = 1;
5682 ret_val = megasas_issue_blocked_abort_cmd(instance,
5683 instance->
cfbe7554 5684 aen_cmd, 30);
c4a3e0a5
BS		 5685
5686 if (ret_val) {
1be18254 5687 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5688 "previous AEN command\n");
5689 return ret_val;
5690 }
5691 }
5692 }
5693
5694 cmd = megasas_get_cmd(instance);
5695
5696 if (!cmd)
5697 return -ENOMEM;
5698
5699 dcmd = &cmd->frame->dcmd;
5700
5701 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5702
5703 /*
5704 * Prepare DCMD for aen registration
5705 */
5706 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5707
5708 dcmd->cmd = MFI_CMD_DCMD;
5709 dcmd->cmd_status = 0x0;
5710 dcmd->sge_count = 1;
94cd65dd 5711 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5712 dcmd->timeout = 0;
780a3762 5713 dcmd->pad_0 = 0;
94cd65dd
SS		 5714 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5715 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5716 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5717 instance->last_seq_num = seq_num;
94cd65dd
SS		 5718 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5719 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5720 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5721
f4c9a131
YB		 5722 if (instance->aen_cmd != NULL) {
5723 megasas_return_cmd(instance, cmd);
5724 return 0;
5725 }
5726
c4a3e0a5
BS		 5727 /*
5728 * Store reference to the cmd used to register for AEN. When an
5729 * application wants us to register for AEN, we have to abort this
5730 * cmd and re-register with a new EVENT LOCALE supplied by that app
5731 */
5732 instance->aen_cmd = cmd;
5733
5734 /*
5735 * Issue the aen registration frame
5736 */
9c915a8c 5737 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5738
5739 return 0;
5740}
5741
96188a89
S		 5742/* megasas_get_target_prop - Send DCMD with below details to firmware.
5743 *
5744 * This DCMD will fetch few properties of LD/system PD defined
5745 * in MR_TARGET_DEV_PROPERTIES. eg. Queue Depth, MDTS value.
5746 *
5747 * DCMD send by drivers whenever new target is added to the OS.
5748 *
5749 * dcmd.opcode - MR_DCMD_DEV_GET_TARGET_PROP
5750 * dcmd.mbox.b[0] - DCMD is to be fired for LD or system PD.
5751 * 0 = system PD, 1 = LD.
5752 * dcmd.mbox.s[1] - TargetID for LD/system PD.
5753 * dcmd.sge IN - Pointer to return MR_TARGET_DEV_PROPERTIES.
5754 *
5755 * @instance: Adapter soft state
5756 * @sdev: OS provided scsi device
5757 *
5758 * Returns 0 on success non-zero on failure.
5759 */
5760static int
5761megasas_get_target_prop(struct megasas_instance *instance,
5762 struct scsi_device *sdev)
5763{
5764 int ret;
5765 struct megasas_cmd *cmd;
5766 struct megasas_dcmd_frame *dcmd;
5767 u16 targetId = (sdev->channel % 2) + sdev->id;
5768
5769 cmd = megasas_get_cmd(instance);
5770
5771 if (!cmd) {
5772 dev_err(&instance->pdev->dev,
5773 "Failed to get cmd %s\n", __func__);
5774 return -ENOMEM;
5775 }
5776
5777 dcmd = &cmd->frame->dcmd;
5778
5779 memset(instance->tgt_prop, 0, sizeof(*instance->tgt_prop));
5780 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5781 dcmd->mbox.b[0] = MEGASAS_IS_LOGICAL(sdev);
5782
5783 dcmd->mbox.s[1] = cpu_to_le16(targetId);
5784 dcmd->cmd = MFI_CMD_DCMD;
5785 dcmd->cmd_status = 0xFF;
5786 dcmd->sge_count = 1;
5787 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
5788 dcmd->timeout = 0;
5789 dcmd->pad_0 = 0;
5790 dcmd->data_xfer_len =
5791 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5792 dcmd->opcode = cpu_to_le32(MR_DCMD_DRV_GET_TARGET_PROP);
5793 dcmd->sgl.sge32[0].phys_addr =
5794 cpu_to_le32(instance->tgt_prop_h);
5795 dcmd->sgl.sge32[0].length =
5796 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5797
5798 if (instance->ctrl_context && !instance->mask_interrupts)
5799 ret = megasas_issue_blocked_cmd(instance,
5800 cmd, MFI_IO_TIMEOUT_SECS);
5801 else
5802 ret = megasas_issue_polled(instance, cmd);
5803
5804 switch (ret) {
5805 case DCMD_TIMEOUT:
5806 switch (dcmd_timeout_ocr_possible(instance)) {
5807 case INITIATE_OCR:
5808 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
5809 megasas_reset_fusion(instance->host,
5810 MFI_IO_TIMEOUT_OCR);
5811 break;
5812 case KILL_ADAPTER:
5813 megaraid_sas_kill_hba(instance);
5814 break;
5815 case IGNORE_TIMEOUT:
5816 dev_info(&instance->pdev->dev,
5817 "Ignore DCMD timeout: %s %d\n",
5818 __func__, __LINE__);
5819 break;
5820 }
5821 break;
5822
5823 default:
5824 megasas_return_cmd(instance, cmd);
5825 }
5826 if (ret != DCMD_SUCCESS)
5827 dev_err(&instance->pdev->dev,
5828 "return from %s %d return value %d\n",
5829 __func__, __LINE__, ret);
5830
5831 return ret;
5832}
5833
c4a3e0a5
BS		 5834/**
5835 * megasas_start_aen - Subscribes to AEN during driver load time
5836 * @instance: Adapter soft state
5837 */
5838static int megasas_start_aen(struct megasas_instance *instance)
5839{
5840 struct megasas_evt_log_info eli;
5841 union megasas_evt_class_locale class_locale;
5842
5843 /*
5844 * Get the latest sequence number from FW
5845 */
5846 memset(&eli, 0, sizeof(eli));
5847
5848 if (megasas_get_seq_num(instance, &eli))
5849 return -1;
5850
5851 /*
5852 * Register AEN with FW for latest sequence number plus 1
5853 */
5854 class_locale.members.reserved = 0;
5855 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5856 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5857
94cd65dd 5858 return megasas_register_aen(instance,
48100b0e 5859 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5860 class_locale.word);
c4a3e0a5
BS		 5861}
5862
5863/**
5864 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5865 * @instance: Adapter soft state
5866 */
5867static int megasas_io_attach(struct megasas_instance *instance)
5868{
5869 struct Scsi_Host *host = instance->host;
5870
5871 /*
5872 * Export parameters required by SCSI mid-layer
5873 */
c4a3e0a5 5874 host->unique_id = instance->unique_id;
ae09a6c1 5875 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5876 host->this_id = instance->init_id;
5877 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5878
5879 if (instance->fw_support_ieee)
5880 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5881
1fd10685
YB		 5882 /*
5883 * Check if the module parameter value for max_sectors can be used
5884 */
5885 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5886 instance->max_sectors_per_req = max_sectors;
5887 else {
5888 if (max_sectors) {
5889 if (((instance->pdev->device ==
5890 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5891 (instance->pdev->device ==
5892 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5893 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5894 instance->max_sectors_per_req = max_sectors;
5895 } else {
1be18254 5896 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5897 "and <= %d (or < 1MB for GEN2 controller)\n",
5898 instance->max_sectors_per_req);
5899 }
5900 }
5901 }
5902
c4a3e0a5 5903 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5904 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5905 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5906 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5907 host->max_lun = MEGASAS_MAX_LUN;
122da302 5908 host->max_cmd_len = 16;
c4a3e0a5
BS		 5909
5910 /*
5911 * Notify the mid-layer about the new controller
5912 */
5913 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5914 dev_err(&instance->pdev->dev,
5915 "Failed to add host from %s %d\n",
5916 __func__, __LINE__);
c4a3e0a5
BS		 5917 return -ENODEV;
5918 }
5919
c4a3e0a5
BS		 5920 return 0;
5921}
5922
31ea7088 5923static int
5924megasas_set_dma_mask(struct pci_dev *pdev)
5925{
5926 /*
da0dc9fb 5927 * All our controllers are capable of performing 64-bit DMA
31ea7088 5928 */
5929 if (IS_DMA64) {
6a35528a 5930 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5931
284901a9 5932 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5933 goto fail_set_dma_mask;
5934 }
5935 } else {
284901a9 5936 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5937 goto fail_set_dma_mask;
5938 }
46de63e2
SS		 5939 /*
5940 * Ensure that all data structures are allocated in 32-bit
5941 * memory.
5942 */
5943 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5944 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5945 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5946 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5947 dev_info(&pdev->dev, "set 32bit DMA mask"
5948 "and 32 bit consistent mask\n");
5949 else
5950 goto fail_set_dma_mask;
5951 }
94cd65dd 5952
31ea7088 5953 return 0;
5954
5955fail_set_dma_mask:
5956 return 1;
5957}
5958
c4a3e0a5
BS		 5959/**
5960 * megasas_probe_one - PCI hotplug entry point
5961 * @pdev: PCI device structure
0d49016b 5962 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5963 */
6f039790
GKH		 5964static int megasas_probe_one(struct pci_dev *pdev,
5965 const struct pci_device_id *id)
c4a3e0a5 5966{
d3557fc8 5967 int rval, pos;
c4a3e0a5
BS		 5968 struct Scsi_Host *host;
5969 struct megasas_instance *instance;
66192dfe 5970 u16 control = 0;
51087a86 5971 struct fusion_context *fusion = NULL;
66192dfe
AR		 5972
5973 /* Reset MSI-X in the kdump kernel */
5974 if (reset_devices) {
5975 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5976 if (pos) {
99369065 5977 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5978 &control);
5979 if (control & PCI_MSIX_FLAGS_ENABLE) {
5980 dev_info(&pdev->dev, "resetting MSI-X\n");
5981 pci_write_config_word(pdev,
99369065 5982 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5983 control &
5984 ~PCI_MSIX_FLAGS_ENABLE);
5985 }
5986 }
5987 }
c4a3e0a5 5988
c4a3e0a5
BS		 5989 /*
5990 * PCI prepping: enable device set bus mastering and dma mask
5991 */
aeab3fd7 5992 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 5993
5994 if (rval) {
5995 return rval;
5996 }
5997
5998 pci_set_master(pdev);
5999
31ea7088 6000 if (megasas_set_dma_mask(pdev))
6001 goto fail_set_dma_mask;
c4a3e0a5
BS		 6002
6003 host = scsi_host_alloc(&megasas_template,
6004 sizeof(struct megasas_instance));
6005
6006 if (!host) {
1be18254 6007 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 6008 goto fail_alloc_instance;
6009 }
6010
6011 instance = (struct megasas_instance *)host->hostdata;
6012 memset(instance, 0, sizeof(*instance));
da0dc9fb 6013 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 6014 instance->pdev = pdev;
c4a3e0a5 6015
9c915a8c 6016 switch (instance->pdev->device) {
45f4f2eb
SC		 6017 case PCI_DEVICE_ID_LSI_VENTURA:
6018 case PCI_DEVICE_ID_LSI_HARPOON:
6019 case PCI_DEVICE_ID_LSI_TOMCAT:
6020 case PCI_DEVICE_ID_LSI_VENTURA_4PORT:
6021 case PCI_DEVICE_ID_LSI_CRUSADER_4PORT:
6022 instance->is_ventura = true;
9c915a8c 6023 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 6024 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 6025 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 6026 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 6027 case PCI_DEVICE_ID_LSI_INTRUDER:
6028 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 6029 case PCI_DEVICE_ID_LSI_CUTLASS_52:
6030 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 6031 {
5fc499b6
S		 6032 if (megasas_alloc_fusion_context(instance)) {
6033 megasas_free_fusion_context(instance);
9c915a8c
AR		 6034 goto fail_alloc_dma_buf;
6035 }
6036 fusion = instance->ctrl_context;
5fc499b6 6037
5a8cb85b 6038 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
6039 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA))
6040 fusion->adapter_type = THUNDERBOLT_SERIES;
9581ebeb
SC		 6041 else if (instance->is_ventura)
6042 fusion->adapter_type = VENTURA_SERIES;
6043 else
5a8cb85b 6044 fusion->adapter_type = INVADER_SERIES;
9c915a8c
AR		 6045 }
6046 break;
6047 default: /* For all other supported controllers */
6048
6049 instance->producer =
6050 pci_alloc_consistent(pdev, sizeof(u32),
6051 &instance->producer_h);
6052 instance->consumer =
6053 pci_alloc_consistent(pdev, sizeof(u32),
6054 &instance->consumer_h);
6055
6056 if (!instance->producer || !instance->consumer) {
4086eae5 6057 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c
AR		 6058 "memory for producer, consumer\n");
6059 goto fail_alloc_dma_buf;
6060 }
c4a3e0a5 6061
9c915a8c
AR		 6062 *instance->producer = 0;
6063 *instance->consumer = 0;
6064 break;
c4a3e0a5
BS		 6065 }
6066
fc62b3fc
SS		 6067 /* Crash dump feature related initialisation*/
6068 instance->drv_buf_index = 0;
6069 instance->drv_buf_alloc = 0;
6070 instance->crash_dump_fw_support = 0;
6071 instance->crash_dump_app_support = 0;
6072 instance->fw_crash_state = UNAVAILABLE;
6073 spin_lock_init(&instance->crashdump_lock);
6074 instance->crash_dump_buf = NULL;
6075
c3518837 6076 megasas_poll_wait_aen = 0;
f4c9a131 6077 instance->flag_ieee = 0;
7e8a75f4 6078 instance->ev = NULL;
39a98554 6079 instance->issuepend_done = 1;
8a01a41d 6080 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
404a8a1a 6081 instance->is_imr = 0;
c4a3e0a5
BS		 6082
6083 instance->evt_detail = pci_alloc_consistent(pdev,
6084 sizeof(struct
6085 megasas_evt_detail),
6086 &instance->evt_detail_h);
6087
6088 if (!instance->evt_detail) {
1be18254 6089 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 6090 "event detail structure\n");
6091 goto fail_alloc_dma_buf;
6092 }
6093
c3e385a1
SS		 6094 if (!reset_devices) {
6095 instance->system_info_buf = pci_zalloc_consistent(pdev,
6096 sizeof(struct MR_DRV_SYSTEM_INFO),
6097 &instance->system_info_h);
6098 if (!instance->system_info_buf)
6099 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
6100
6101 instance->pd_info = pci_alloc_consistent(pdev,
6102 sizeof(struct MR_PD_INFO), &instance->pd_info_h);
2216c305 6103
96188a89
S		 6104 instance->pd_info = pci_alloc_consistent(pdev,
6105 sizeof(struct MR_PD_INFO), &instance->pd_info_h);
6106 instance->tgt_prop = pci_alloc_consistent(pdev,
6107 sizeof(struct MR_TARGET_PROPERTIES), &instance->tgt_prop_h);
6108
c3e385a1
SS		 6109 if (!instance->pd_info)
6110 dev_err(&instance->pdev->dev, "Failed to alloc mem for pd_info\n");
6111
96188a89
S		 6112 if (!instance->tgt_prop)
6113 dev_err(&instance->pdev->dev, "Failed to alloc mem for tgt_prop\n");
6114
c3e385a1
SS		 6115 instance->crash_dump_buf = pci_alloc_consistent(pdev,
6116 CRASH_DMA_BUF_SIZE,
6117 &instance->crash_dump_h);
6118 if (!instance->crash_dump_buf)
6119 dev_err(&pdev->dev, "Can't allocate Firmware "
6120 "crash dump DMA buffer\n");
6121 }
2216c305 6122
c4a3e0a5
BS		 6123 /*
6124 * Initialize locks and queues
6125 */
6126 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 6127 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 6128
e4a082c7
SP		 6129 atomic_set(&instance->fw_outstanding,0);
6130
c4a3e0a5
BS		 6131 init_waitqueue_head(&instance->int_cmd_wait_q);
6132 init_waitqueue_head(&instance->abort_cmd_wait_q);
6133
90dc9d98 6134 spin_lock_init(&instance->mfi_pool_lock);
39a98554 6135 spin_lock_init(&instance->hba_lock);
fdd84e25 6136 spin_lock_init(&instance->stream_lock);
7343eb65 6137 spin_lock_init(&instance->completion_lock);
c4a3e0a5 6138
9c915a8c 6139 mutex_init(&instance->reset_mutex);
2216c305 6140 mutex_init(&instance->hba_mutex);
c4a3e0a5
BS		 6141
6142 /*
6143 * Initialize PCI related and misc parameters
6144 */
c4a3e0a5
BS		 6145 instance->host = host;
6146 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
6147 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 6148 instance->ctrl_info = NULL;
c4a3e0a5 6149
ae09a6c1 6150
7bebf5c7 6151 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 6152 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 6153 instance->flag_ieee = 1;
7bebf5c7 6154
658dcedb 6155 megasas_dbg_lvl = 0;
05e9ebbe 6156 instance->flag = 0;
0c79e681 6157 instance->unload = 1;
05e9ebbe 6158 instance->last_time = 0;
39a98554 6159 instance->disableOnlineCtrlReset = 1;
bc93d425 6160 instance->UnevenSpanSupport = 0;
39a98554 6161
5a8cb85b 6162 if (instance->ctrl_context) {
9c915a8c 6163 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 6164 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
6165 } else
9c915a8c 6166 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 6167
0a77066a
AR		 6168 /*
6169 * Initialize MFI Firmware
6170 */
6171 if (megasas_init_fw(instance))
6172 goto fail_init_mfi;
6173
229fe47c
AR		 6174 if (instance->requestorId) {
6175 if (instance->PlasmaFW111) {
6176 instance->vf_affiliation_111 =
6177 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
6178 &instance->vf_affiliation_111_h);
6179 if (!instance->vf_affiliation_111)
1be18254 6180 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6181 "memory for VF affiliation buffer\n");
6182 } else {
6183 instance->vf_affiliation =
6184 pci_alloc_consistent(pdev,
6185 (MAX_LOGICAL_DRIVES + 1) *
6186 sizeof(struct MR_LD_VF_AFFILIATION),
6187 &instance->vf_affiliation_h);
6188 if (!instance->vf_affiliation)
1be18254 6189 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6190 "memory for VF affiliation buffer\n");
6191 }
6192 }
6193
c4a3e0a5
BS		 6194 /*
6195 * Store instance in PCI softstate
6196 */
6197 pci_set_drvdata(pdev, instance);
6198
6199 /*
6200 * Add this controller to megasas_mgmt_info structure so that it
6201 * can be exported to management applications
6202 */
6203 megasas_mgmt_info.count++;
6204 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
6205 megasas_mgmt_info.max_index++;
6206
541f90b7
AR		 6207 /*
6208 * Register with SCSI mid-layer
6209 */
6210 if (megasas_io_attach(instance))
6211 goto fail_io_attach;
6212
6213 instance->unload = 0;
aa00832b
SS		 6214 /*
6215 * Trigger SCSI to scan our drives
6216 */
6217 scsi_scan_host(host);
541f90b7 6218
c4a3e0a5
BS		 6219 /*
6220 * Initiate AEN (Asynchronous Event Notification)
6221 */
6222 if (megasas_start_aen(instance)) {
1be18254 6223 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 6224 goto fail_start_aen;
6225 }
6226
9ea81f81
AR		 6227 /* Get current SR-IOV LD/VF affiliation */
6228 if (instance->requestorId)
6229 megasas_get_ld_vf_affiliation(instance, 1);
6230
c4a3e0a5
BS		 6231 return 0;
6232
da0dc9fb
BH		 6233fail_start_aen:
6234fail_io_attach:
c4a3e0a5
BS		 6235 megasas_mgmt_info.count--;
6236 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
6237 megasas_mgmt_info.max_index--;
6238
d46a3ad6 6239 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6240 megasas_destroy_irqs(instance);
6241
5a8cb85b 6242 if (instance->ctrl_context)
eb1b1237
AR		 6243 megasas_release_fusion(instance);
6244 else
6245 megasas_release_mfi(instance);
c8e858fe 6246 if (instance->msix_vectors)
fad119b7 6247 pci_free_irq_vectors(instance->pdev);
d3557fc8 6248fail_init_mfi:
da0dc9fb 6249fail_alloc_dma_buf:
c4a3e0a5
BS		 6250 if (instance->evt_detail)
6251 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6252 instance->evt_detail,
6253 instance->evt_detail_h);
6254
2216c305
SS		 6255 if (instance->pd_info)
6256 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6257 instance->pd_info,
6258 instance->pd_info_h);
96188a89
S		 6259 if (instance->tgt_prop)
6260 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6261 instance->tgt_prop,
6262 instance->tgt_prop_h);
eb1b1237 6263 if (instance->producer)
c4a3e0a5
BS		 6264 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6265 instance->producer_h);
6266 if (instance->consumer)
6267 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6268 instance->consumer_h);
6269 scsi_host_put(host);
6270
da0dc9fb
BH		 6271fail_alloc_instance:
6272fail_set_dma_mask:
c4a3e0a5
BS		 6273 pci_disable_device(pdev);
6274
6275 return -ENODEV;
6276}
6277
6278/**
6279 * megasas_flush_cache - Requests FW to flush all its caches
6280 * @instance: Adapter soft state
6281 */
6282static void megasas_flush_cache(struct megasas_instance *instance)
6283{
6284 struct megasas_cmd *cmd;
6285 struct megasas_dcmd_frame *dcmd;
6286
8a01a41d 6287 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6288 return;
6289
c4a3e0a5
BS		 6290 cmd = megasas_get_cmd(instance);
6291
6292 if (!cmd)
6293 return;
6294
6295 dcmd = &cmd->frame->dcmd;
6296
6297 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6298
6299 dcmd->cmd = MFI_CMD_DCMD;
6300 dcmd->cmd_status = 0x0;
6301 dcmd->sge_count = 0;
94cd65dd 6302 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6303 dcmd->timeout = 0;
780a3762 6304 dcmd->pad_0 = 0;
c4a3e0a5 6305 dcmd->data_xfer_len = 0;
94cd65dd 6306 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 6307 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
6308
6d40afbc
SS		 6309 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6310 != DCMD_SUCCESS) {
6311 dev_err(&instance->pdev->dev,
6312 "return from %s %d\n", __func__, __LINE__);
6313 return;
6314 }
c4a3e0a5 6315
4026e9aa 6316 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6317}
6318
6319/**
6320 * megasas_shutdown_controller - Instructs FW to shutdown the controller
6321 * @instance: Adapter soft state
31ea7088 6322 * @opcode: Shutdown/Hibernate
c4a3e0a5 6323 */
31ea7088 6324static void megasas_shutdown_controller(struct megasas_instance *instance,
6325 u32 opcode)
c4a3e0a5
BS		 6326{
6327 struct megasas_cmd *cmd;
6328 struct megasas_dcmd_frame *dcmd;
6329
8a01a41d 6330 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6331 return;
6332
c4a3e0a5
BS		 6333 cmd = megasas_get_cmd(instance);
6334
6335 if (!cmd)
6336 return;
6337
6338 if (instance->aen_cmd)
cfbe7554 6339 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6340 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c
AR		 6341 if (instance->map_update_cmd)
6342 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6343 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6344 if (instance->jbod_seq_cmd)
6345 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6346 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6347
c4a3e0a5
BS		 6348 dcmd = &cmd->frame->dcmd;
6349
6350 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6351
6352 dcmd->cmd = MFI_CMD_DCMD;
6353 dcmd->cmd_status = 0x0;
6354 dcmd->sge_count = 0;
94cd65dd 6355 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6356 dcmd->timeout = 0;
780a3762 6357 dcmd->pad_0 = 0;
c4a3e0a5 6358 dcmd->data_xfer_len = 0;
94cd65dd 6359 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6360
6d40afbc
SS		 6361 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6362 != DCMD_SUCCESS) {
6363 dev_err(&instance->pdev->dev,
6364 "return from %s %d\n", __func__, __LINE__);
6365 return;
6366 }
c4a3e0a5 6367
4026e9aa 6368 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6369}
6370
33139b21 6371#ifdef CONFIG_PM
31ea7088 6372/**
ad84db2e 6373 * megasas_suspend - driver suspend entry point
6374 * @pdev: PCI device structure
31ea7088 6375 * @state: PCI power state to suspend routine
6376 */
33139b21 6377static int
31ea7088 6378megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6379{
6380 struct Scsi_Host *host;
6381 struct megasas_instance *instance;
6382
6383 instance = pci_get_drvdata(pdev);
6384 host = instance->host;
0c79e681 6385 instance->unload = 1;
31ea7088 6386
229fe47c
AR		 6387 /* Shutdown SR-IOV heartbeat timer */
6388 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6389 del_timer_sync(&instance->sriov_heartbeat_timer);
6390
31ea7088 6391 megasas_flush_cache(instance);
6392 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 6393
6394 /* cancel the delayed work if this work still in queue */
6395 if (instance->ev != NULL) {
6396 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6397 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6398 instance->ev = NULL;
6399 }
6400
31ea7088 6401 tasklet_kill(&instance->isr_tasklet);
6402
6403 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6404 instance->instancet->disable_intr(instance);
c8e858fe 6405
d3557fc8
SS		 6406 megasas_destroy_irqs(instance);
6407
c8e858fe 6408 if (instance->msix_vectors)
fad119b7 6409 pci_free_irq_vectors(instance->pdev);
31ea7088 6410
6411 pci_save_state(pdev);
6412 pci_disable_device(pdev);
6413
6414 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6415
6416 return 0;
6417}
6418
6419/**
6420 * megasas_resume- driver resume entry point
6421 * @pdev: PCI device structure
6422 */
33139b21 6423static int
31ea7088 6424megasas_resume(struct pci_dev *pdev)
6425{
d3557fc8 6426 int rval;
31ea7088 6427 struct Scsi_Host *host;
6428 struct megasas_instance *instance;
fad119b7 6429 int irq_flags = PCI_IRQ_LEGACY;
31ea7088 6430
6431 instance = pci_get_drvdata(pdev);
6432 host = instance->host;
6433 pci_set_power_state(pdev, PCI_D0);
6434 pci_enable_wake(pdev, PCI_D0, 0);
6435 pci_restore_state(pdev);
6436
6437 /*
6438 * PCI prepping: enable device set bus mastering and dma mask
6439 */
aeab3fd7 6440 rval = pci_enable_device_mem(pdev);
31ea7088 6441
6442 if (rval) {
1be18254 6443 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6444 return rval;
6445 }
6446
6447 pci_set_master(pdev);
6448
6449 if (megasas_set_dma_mask(pdev))
6450 goto fail_set_dma_mask;
6451
6452 /*
6453 * Initialize MFI Firmware
6454 */
6455
31ea7088 6456 atomic_set(&instance->fw_outstanding, 0);
6457
6458 /*
6459 * We expect the FW state to be READY
6460 */
058a8fac 6461 if (megasas_transition_to_ready(instance, 0))
31ea7088 6462 goto fail_ready_state;
6463
3f1abce4 6464 /* Now re-enable MSI-X */
fad119b7
HR		 6465 if (instance->msix_vectors) {
6466 irq_flags = PCI_IRQ_MSIX;
6467 if (smp_affinity_enable)
6468 irq_flags |= PCI_IRQ_AFFINITY;
6469 }
6470 rval = pci_alloc_irq_vectors(instance->pdev, 1,
6471 instance->msix_vectors ?
6472 instance->msix_vectors : 1, irq_flags);
6473 if (rval < 0)
dd088128 6474 goto fail_reenable_msix;
3f1abce4 6475
5a8cb85b 6476 if (instance->ctrl_context) {
9c915a8c
AR		 6477 megasas_reset_reply_desc(instance);
6478 if (megasas_ioc_init_fusion(instance)) {
6479 megasas_free_cmds(instance);
6480 megasas_free_cmds_fusion(instance);
6481 goto fail_init_mfi;
6482 }
6483 if (!megasas_get_map_info(instance))
6484 megasas_sync_map_info(instance);
5a8cb85b 6485 } else {
9c915a8c
AR		 6486 *instance->producer = 0;
6487 *instance->consumer = 0;
6488 if (megasas_issue_init_mfi(instance))
6489 goto fail_init_mfi;
9c915a8c 6490 }
31ea7088 6491
9c915a8c
AR		 6492 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6493 (unsigned long)instance);
31ea7088 6494
d3557fc8
SS		 6495 if (instance->msix_vectors ?
6496 megasas_setup_irqs_msix(instance, 0) :
6497 megasas_setup_irqs_ioapic(instance))
6498 goto fail_init_mfi;
31ea7088 6499
229fe47c
AR		 6500 /* Re-launch SR-IOV heartbeat timer */
6501 if (instance->requestorId) {
6502 if (!megasas_sriov_start_heartbeat(instance, 0))
6503 megasas_start_timer(instance,
6504 &instance->sriov_heartbeat_timer,
6505 megasas_sriov_heartbeat_handler,
6506 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 6507 else {
229fe47c 6508 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 6509 goto fail_init_mfi;
6510 }
229fe47c
AR		 6511 }
6512
d46a3ad6 6513 instance->instancet->enable_intr(instance);
3761cb4c 6514 megasas_setup_jbod_map(instance);
0c79e681
YB		 6515 instance->unload = 0;
6516
541f90b7
AR		 6517 /*
6518 * Initiate AEN (Asynchronous Event Notification)
6519 */
6520 if (megasas_start_aen(instance))
1be18254 6521 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6522
31ea7088 6523 return 0;
6524
31ea7088 6525fail_init_mfi:
6526 if (instance->evt_detail)
6527 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6528 instance->evt_detail,
6529 instance->evt_detail_h);
6530
2216c305
SS		 6531 if (instance->pd_info)
6532 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6533 instance->pd_info,
6534 instance->pd_info_h);
96188a89
S		 6535 if (instance->tgt_prop)
6536 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6537 instance->tgt_prop,
6538 instance->tgt_prop_h);
31ea7088 6539 if (instance->producer)
6540 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6541 instance->producer_h);
6542 if (instance->consumer)
6543 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6544 instance->consumer_h);
6545 scsi_host_put(host);
6546
6547fail_set_dma_mask:
6548fail_ready_state:
dd088128 6549fail_reenable_msix:
31ea7088 6550
6551 pci_disable_device(pdev);
6552
6553 return -ENODEV;
6554}
33139b21
JS		 6555#else
6556#define megasas_suspend NULL
6557#define megasas_resume NULL
6558#endif
31ea7088 6559
a1dfd62c
KD		 6560static inline int
6561megasas_wait_for_adapter_operational(struct megasas_instance *instance)
6562{
6563 int wait_time = MEGASAS_RESET_WAIT_TIME * 2;
6564 int i;
6565
6566 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
6567 return 1;
6568
6569 for (i = 0; i < wait_time; i++) {
6570 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
6571 break;
6572
6573 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL))
6574 dev_notice(&instance->pdev->dev, "waiting for controller reset to finish\n");
6575
6576 msleep(1000);
6577 }
6578
6579 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
6580 dev_info(&instance->pdev->dev, "%s timed out while waiting for HBA to recover.\n",
6581 __func__);
6582 return 1;
6583 }
6584
6585 return 0;
6586}
6587
c4a3e0a5
BS		 6588/**
6589 * megasas_detach_one - PCI hot"un"plug entry point
6590 * @pdev: PCI device structure
6591 */
6f039790 6592static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 6593{
6594 int i;
6595 struct Scsi_Host *host;
6596 struct megasas_instance *instance;
9c915a8c 6597 struct fusion_context *fusion;
3761cb4c 6598 u32 pd_seq_map_sz;
c4a3e0a5
BS		 6599
6600 instance = pci_get_drvdata(pdev);
c3518837 6601 instance->unload = 1;
c4a3e0a5 6602 host = instance->host;
9c915a8c 6603 fusion = instance->ctrl_context;
c4a3e0a5 6604
229fe47c
AR		 6605 /* Shutdown SR-IOV heartbeat timer */
6606 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6607 del_timer_sync(&instance->sriov_heartbeat_timer);
6608
fc62b3fc
SS		 6609 if (instance->fw_crash_state != UNAVAILABLE)
6610 megasas_free_host_crash_buffer(instance);
c4a3e0a5 6611 scsi_remove_host(instance->host);
a1dfd62c
KD		 6612
6613 if (megasas_wait_for_adapter_operational(instance))
6614 goto skip_firing_dcmds;
6615
c4a3e0a5 6616 megasas_flush_cache(instance);
31ea7088 6617 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4 6618
a1dfd62c 6619skip_firing_dcmds:
7e8a75f4
YB		 6620 /* cancel the delayed work if this work still in queue*/
6621 if (instance->ev != NULL) {
6622 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6623 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6624 instance->ev = NULL;
6625 }
6626
cfbe7554
SS		 6627 /* cancel all wait events */
6628 wake_up_all(&instance->int_cmd_wait_q);
6629
5d018ad0 6630 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 6631
6632 /*
6633 * Take the instance off the instance array. Note that we will not
6634 * decrement the max_index. We let this array be sparse array
6635 */
6636 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6637 if (megasas_mgmt_info.instance[i] == instance) {
6638 megasas_mgmt_info.count--;
6639 megasas_mgmt_info.instance[i] = NULL;
6640
6641 break;
6642 }
6643 }
6644
d46a3ad6 6645 instance->instancet->disable_intr(instance);
c4a3e0a5 6646
d3557fc8
SS		 6647 megasas_destroy_irqs(instance);
6648
c8e858fe 6649 if (instance->msix_vectors)
fad119b7 6650 pci_free_irq_vectors(instance->pdev);
c4a3e0a5 6651
fdd84e25
SC		 6652 if (instance->is_ventura) {
6653 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i)
6654 kfree(fusion->stream_detect_by_ld[i]);
6655 kfree(fusion->stream_detect_by_ld);
6656 fusion->stream_detect_by_ld = NULL;
6657 }
6658
6659
5a8cb85b 6660 if (instance->ctrl_context) {
9c915a8c 6661 megasas_release_fusion(instance);
3761cb4c 6662 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6663 (sizeof(struct MR_PD_CFG_SEQ) *
6664 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6665 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 6666 if (fusion->ld_map[i])
6667 dma_free_coherent(&instance->pdev->dev,
51087a86 6668 fusion->max_map_sz,
9c915a8c 6669 fusion->ld_map[i],
51087a86
SS		 6670 fusion->ld_map_phys[i]);
6671 if (fusion->ld_drv_map[i])
6672 free_pages((ulong)fusion->ld_drv_map[i],
6673 fusion->drv_map_pages);
546e559c
ML		 6674 if (fusion->pd_seq_sync[i])
6675 dma_free_coherent(&instance->pdev->dev,
6676 pd_seq_map_sz,
6677 fusion->pd_seq_sync[i],
6678 fusion->pd_seq_phys[i]);
51087a86 6679 }
5fc499b6 6680 megasas_free_fusion_context(instance);
5a8cb85b 6681 } else {
9c915a8c 6682 megasas_release_mfi(instance);
9c915a8c
AR		 6683 pci_free_consistent(pdev, sizeof(u32),
6684 instance->producer,
6685 instance->producer_h);
6686 pci_free_consistent(pdev, sizeof(u32),
6687 instance->consumer,
6688 instance->consumer_h);
9c915a8c 6689 }
c4a3e0a5 6690
51087a86
SS		 6691 kfree(instance->ctrl_info);
6692
105900d5
SS		 6693 if (instance->evt_detail)
6694 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6695 instance->evt_detail, instance->evt_detail_h);
2216c305
SS		 6696 if (instance->pd_info)
6697 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6698 instance->pd_info,
6699 instance->pd_info_h);
96188a89
S		 6700 if (instance->tgt_prop)
6701 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6702 instance->tgt_prop,
6703 instance->tgt_prop_h);
229fe47c
AR		 6704 if (instance->vf_affiliation)
6705 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6706 sizeof(struct MR_LD_VF_AFFILIATION),
6707 instance->vf_affiliation,
6708 instance->vf_affiliation_h);
6709
6710 if (instance->vf_affiliation_111)
6711 pci_free_consistent(pdev,
6712 sizeof(struct MR_LD_VF_AFFILIATION_111),
6713 instance->vf_affiliation_111,
6714 instance->vf_affiliation_111_h);
6715
6716 if (instance->hb_host_mem)
6717 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6718 instance->hb_host_mem,
6719 instance->hb_host_mem_h);
6720
fc62b3fc
SS		 6721 if (instance->crash_dump_buf)
6722 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6723 instance->crash_dump_buf, instance->crash_dump_h);
6724
5765c5b8
SS		 6725 if (instance->system_info_buf)
6726 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6727 instance->system_info_buf, instance->system_info_h);
6728
c4a3e0a5
BS		 6729 scsi_host_put(host);
6730
c4a3e0a5 6731 pci_disable_device(pdev);
c4a3e0a5
BS		 6732}
6733
6734/**
6735 * megasas_shutdown - Shutdown entry point
6736 * @device: Generic device structure
6737 */
6738static void megasas_shutdown(struct pci_dev *pdev)
6739{
6740 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6741
0c79e681 6742 instance->unload = 1;
a1dfd62c
KD		 6743
6744 if (megasas_wait_for_adapter_operational(instance))
6745 goto skip_firing_dcmds;
6746
c4a3e0a5 6747 megasas_flush_cache(instance);
530e6fc1 6748 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
a1dfd62c
KD		 6749
6750skip_firing_dcmds:
d46a3ad6 6751 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6752 megasas_destroy_irqs(instance);
6753
c8e858fe 6754 if (instance->msix_vectors)
fad119b7 6755 pci_free_irq_vectors(instance->pdev);
c4a3e0a5
BS		 6756}
6757
6758/**
6759 * megasas_mgmt_open - char node "open" entry point
6760 */
6761static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6762{
6763 /*
6764 * Allow only those users with admin rights
6765 */
6766 if (!capable(CAP_SYS_ADMIN))
6767 return -EACCES;
6768
6769 return 0;
6770}
6771
c4a3e0a5
BS		 6772/**
6773 * megasas_mgmt_fasync - Async notifier registration from applications
6774 *
6775 * This function adds the calling process to a driver global queue. When an
6776 * event occurs, SIGIO will be sent to all processes in this queue.
6777 */
6778static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6779{
6780 int rc;
6781
0b950672 6782 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6783
6784 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6785
0b950672 6786 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6787
6788 if (rc >= 0) {
6789 /* For sanity check when we get ioctl */
6790 filep->private_data = filep;
6791 return 0;
6792 }
6793
6794 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6795
6796 return rc;
6797}
6798
c3518837
YB		 6799/**
6800 * megasas_mgmt_poll - char node "poll" entry point
6801 * */
6802static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6803{
6804 unsigned int mask;
6805 unsigned long flags;
da0dc9fb 6806
c3518837
YB		 6807 poll_wait(file, &megasas_poll_wait, wait);
6808 spin_lock_irqsave(&poll_aen_lock, flags);
6809 if (megasas_poll_wait_aen)
da0dc9fb 6810 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 6811 else
6812 mask = 0;
51087a86 6813 megasas_poll_wait_aen = 0;
c3518837
YB		 6814 spin_unlock_irqrestore(&poll_aen_lock, flags);
6815 return mask;
6816}
6817
fc62b3fc
SS		 6818/*
6819 * megasas_set_crash_dump_params_ioctl:
6820 * Send CRASH_DUMP_MODE DCMD to all controllers
6821 * @cmd: MFI command frame
6822 */
6823
da0dc9fb 6824static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 6825{
6826 struct megasas_instance *local_instance;
6827 int i, error = 0;
6828 int crash_support;
6829
6830 crash_support = cmd->frame->dcmd.mbox.w[0];
6831
6832 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6833 local_instance = megasas_mgmt_info.instance[i];
6834 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 6835 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS		 6836 MEGASAS_HBA_OPERATIONAL) &&
6837 !megasas_set_crash_dump_params(local_instance,
6838 crash_support)) {
6839 local_instance->crash_dump_app_support =
6840 crash_support;
6841 dev_info(&local_instance->pdev->dev,
6842 "Application firmware crash "
6843 "dump mode set success\n");
6844 error = 0;
6845 } else {
6846 dev_info(&local_instance->pdev->dev,
6847 "Application firmware crash "
6848 "dump mode set failed\n");
6849 error = -1;
6850 }
6851 }
6852 }
6853 return error;
6854}
6855
c4a3e0a5
BS		 6856/**
6857 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6858 * @instance: Adapter soft state
6859 * @argp: User's ioctl packet
6860 */
6861static int
6862megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6863 struct megasas_iocpacket __user * user_ioc,
6864 struct megasas_iocpacket *ioc)
6865{
6866 struct megasas_sge32 *kern_sge32;
6867 struct megasas_cmd *cmd;
6868 void *kbuff_arr[MAX_IOCTL_SGE];
6869 dma_addr_t buf_handle = 0;
6870 int error = 0, i;
6871 void *sense = NULL;
6872 dma_addr_t sense_handle;
7b2519af 6873 unsigned long *sense_ptr;
c4a3e0a5
BS		 6874
6875 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6876
6877 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6878 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 6879 ioc->sge_count, MAX_IOCTL_SGE);
6880 return -EINVAL;
6881 }
6882
6883 cmd = megasas_get_cmd(instance);
6884 if (!cmd) {
1be18254 6885 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 6886 return -ENOMEM;
6887 }
6888
6889 /*
6890 * User's IOCTL packet has 2 frames (maximum). Copy those two
6891 * frames into our cmd's frames. cmd->frame's context will get
6892 * overwritten when we copy from user's frames. So set that value
6893 * alone separately
6894 */
6895 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6896 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6897 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6898 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6899 MFI_FRAME_SGL64 |
6900 MFI_FRAME_SENSE64));
c4a3e0a5 6901
fc62b3fc
SS		 6902 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6903 error = megasas_set_crash_dump_params_ioctl(cmd);
6904 megasas_return_cmd(instance, cmd);
6905 return error;
6906 }
6907
c4a3e0a5
BS		 6908 /*
6909 * The management interface between applications and the fw uses
6910 * MFI frames. E.g, RAID configuration changes, LD property changes
6911 * etc are accomplishes through different kinds of MFI frames. The
6912 * driver needs to care only about substituting user buffers with
6913 * kernel buffers in SGLs. The location of SGL is embedded in the
6914 * struct iocpacket itself.
6915 */
6916 kern_sge32 = (struct megasas_sge32 *)
6917 ((unsigned long)cmd->frame + ioc->sgl_off);
6918
6919 /*
6920 * For each user buffer, create a mirror buffer and copy in
6921 */
6922 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6923 if (!ioc->sgl[i].iov_len)
6924 continue;
6925
9f35fa8a 6926 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6927 ioc->sgl[i].iov_len,
9f35fa8a 6928 &buf_handle, GFP_KERNEL);
c4a3e0a5 6929 if (!kbuff_arr[i]) {
1be18254
BH		 6930 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6931 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6932 error = -ENOMEM;
6933 goto out;
6934 }
6935
6936 /*
6937 * We don't change the dma_coherent_mask, so
6938 * pci_alloc_consistent only returns 32bit addresses
6939 */
94cd65dd
SS		 6940 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6941 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6942
6943 /*
6944 * We created a kernel buffer corresponding to the
6945 * user buffer. Now copy in from the user buffer
6946 */
6947 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6948 (u32) (ioc->sgl[i].iov_len))) {
6949 error = -EFAULT;
6950 goto out;
6951 }
6952 }
6953
6954 if (ioc->sense_len) {
9f35fa8a
SP		 6955 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6956 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6957 if (!sense) {
6958 error = -ENOMEM;
6959 goto out;
6960 }
6961
6962 sense_ptr =
7b2519af 6963 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6964 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 6965 }
6966
6967 /*
6968 * Set the sync_cmd flag so that the ISR knows not to complete this
6969 * cmd to the SCSI mid-layer
6970 */
6971 cmd->sync_cmd = 1;
6d40afbc
SS		 6972 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
6973 cmd->sync_cmd = 0;
6974 dev_err(&instance->pdev->dev,
6975 "return -EBUSY from %s %d opcode 0x%x cmd->cmd_status_drv 0x%x\n",
6976 __func__, __LINE__, cmd->frame->dcmd.opcode,
6977 cmd->cmd_status_drv);
6978 return -EBUSY;
6979 }
6980
c4a3e0a5
BS		 6981 cmd->sync_cmd = 0;
6982
aa00832b
SS		 6983 if (instance->unload == 1) {
6984 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6985 "don't submit data to application\n");
6986 goto out;
6987 }
c4a3e0a5
BS		 6988 /*
6989 * copy out the kernel buffers to user buffers
6990 */
6991 for (i = 0; i < ioc->sge_count; i++) {
6992 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6993 ioc->sgl[i].iov_len)) {
6994 error = -EFAULT;
6995 goto out;
6996 }
6997 }
6998
6999 /*
7000 * copy out the sense
7001 */
7002 if (ioc->sense_len) {
7003 /*
b70a41e0 7004 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 7005 * sense buffer address
7006 */
7b2519af
YB		 7007 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
7008 ioc->sense_off);
c4a3e0a5 7009
b70a41e0 7010 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
7011 sense, ioc->sense_len)) {
1be18254 7012 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 7013 "sense data\n");
c4a3e0a5
BS		 7014 error = -EFAULT;
7015 goto out;
7016 }
7017 }
7018
7019 /*
7020 * copy the status codes returned by the fw
7021 */
7022 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
7023 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 7024 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 7025 error = -EFAULT;
7026 }
7027
da0dc9fb 7028out:
c4a3e0a5 7029 if (sense) {
9f35fa8a 7030 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 7031 sense, sense_handle);
7032 }
7033
7a6a731b 7034 for (i = 0; i < ioc->sge_count; i++) {
3deb9438 7035 if (kbuff_arr[i]) {
7a6a731b 7036 dma_free_coherent(&instance->pdev->dev,
94cd65dd 7037 le32_to_cpu(kern_sge32[i].length),
7a6a731b 7038 kbuff_arr[i],
94cd65dd 7039 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 7040 kbuff_arr[i] = NULL;
3deb9438 7041 }
c4a3e0a5
BS		 7042 }
7043
4026e9aa 7044 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 7045 return error;
7046}
7047
c4a3e0a5
BS		 7048static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
7049{
7050 struct megasas_iocpacket __user *user_ioc =
7051 (struct megasas_iocpacket __user *)arg;
7052 struct megasas_iocpacket *ioc;
7053 struct megasas_instance *instance;
7054 int error;
39a98554 7055 int i;
7056 unsigned long flags;
7057 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5 7058
709ab231
ME		 7059 ioc = memdup_user(user_ioc, sizeof(*ioc));
7060 if (IS_ERR(ioc))
7061 return PTR_ERR(ioc);
c4a3e0a5
BS		 7062
7063 instance = megasas_lookup_instance(ioc->host_no);
7064 if (!instance) {
7065 error = -ENODEV;
7066 goto out_kfree_ioc;
7067 }
7068
229fe47c
AR		 7069 /* Adjust ioctl wait time for VF mode */
7070 if (instance->requestorId)
7071 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7072
7073 /* Block ioctls in VF mode */
7074 if (instance->requestorId && !allow_vf_ioctls) {
7075 error = -ENODEV;
7076 goto out_kfree_ioc;
7077 }
7078
8a01a41d 7079 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 7080 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 7081 error = -ENODEV;
7082 goto out_kfree_ioc;
7083 }
7084
7085 if (instance->unload == 1) {
7086 error = -ENODEV;
7087 goto out_kfree_ioc;
7088 }
7089
c4a3e0a5
BS		 7090 if (down_interruptible(&instance->ioctl_sem)) {
7091 error = -ERESTARTSYS;
7092 goto out_kfree_ioc;
7093 }
39a98554 7094
7095 for (i = 0; i < wait_time; i++) {
7096
7097 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7098 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7099 spin_unlock_irqrestore(&instance->hba_lock, flags);
7100 break;
7101 }
7102 spin_unlock_irqrestore(&instance->hba_lock, flags);
7103
7104 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7105 dev_notice(&instance->pdev->dev, "waiting"
39a98554 7106 "for controller reset to finish\n");
7107 }
7108
7109 msleep(1000);
7110 }
7111
7112 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7113 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7114 spin_unlock_irqrestore(&instance->hba_lock, flags);
7115
644da3c3 7116 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7117 error = -ENODEV;
c64e483e 7118 goto out_up;
39a98554 7119 }
7120 spin_unlock_irqrestore(&instance->hba_lock, flags);
7121
c4a3e0a5 7122 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 7123out_up:
c4a3e0a5
BS		 7124 up(&instance->ioctl_sem);
7125
da0dc9fb 7126out_kfree_ioc:
c4a3e0a5
BS		 7127 kfree(ioc);
7128 return error;
7129}
7130
7131static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
7132{
7133 struct megasas_instance *instance;
7134 struct megasas_aen aen;
7135 int error;
39a98554 7136 int i;
7137 unsigned long flags;
7138 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 7139
7140 if (file->private_data != file) {
7141 printk(KERN_DEBUG "megasas: fasync_helper was not "
7142 "called first\n");
7143 return -EINVAL;
7144 }
7145
7146 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
7147 return -EFAULT;
7148
7149 instance = megasas_lookup_instance(aen.host_no);
7150
7151 if (!instance)
7152 return -ENODEV;
7153
8a01a41d 7154 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 7155 return -ENODEV;
0c79e681
YB		 7156 }
7157
7158 if (instance->unload == 1) {
7159 return -ENODEV;
7160 }
7161
39a98554 7162 for (i = 0; i < wait_time; i++) {
7163
7164 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7165 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7166 spin_unlock_irqrestore(&instance->hba_lock,
7167 flags);
7168 break;
7169 }
7170
7171 spin_unlock_irqrestore(&instance->hba_lock, flags);
7172
7173 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7174 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 7175 "controller reset to finish\n");
7176 }
7177
7178 msleep(1000);
7179 }
7180
7181 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7182 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7183 spin_unlock_irqrestore(&instance->hba_lock, flags);
644da3c3 7184 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7185 return -ENODEV;
7186 }
7187 spin_unlock_irqrestore(&instance->hba_lock, flags);
7188
11c71cb4 7189 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS		 7190 error = megasas_register_aen(instance, aen.seq_num,
7191 aen.class_locale_word);
11c71cb4 7192 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS		 7193 return error;
7194}
7195
7196/**
7197 * megasas_mgmt_ioctl - char node ioctl entry point
7198 */
7199static long
7200megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
7201{
7202 switch (cmd) {
7203 case MEGASAS_IOC_FIRMWARE:
7204 return megasas_mgmt_ioctl_fw(file, arg);
7205
7206 case MEGASAS_IOC_GET_AEN:
7207 return megasas_mgmt_ioctl_aen(file, arg);
7208 }
7209
7210 return -ENOTTY;
7211}
7212
7213#ifdef CONFIG_COMPAT
7214static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
7215{
7216 struct compat_megasas_iocpacket __user *cioc =
7217 (struct compat_megasas_iocpacket __user *)arg;
7218 struct megasas_iocpacket __user *ioc =
7219 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
7220 int i;
7221 int error = 0;
b3dc1a21 7222 compat_uptr_t ptr;
323c4a02 7223 u32 local_sense_off;
7224 u32 local_sense_len;
ea1c928b 7225 u32 user_sense_off;
c4a3e0a5 7226
83aabc1b
JG		 7227 if (clear_user(ioc, sizeof(*ioc)))
7228 return -EFAULT;
c4a3e0a5
BS		 7229
7230 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
7231 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
7232 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
7233 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
7234 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
7235 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
7236 return -EFAULT;
7237
b3dc1a21
TH		 7238 /*
7239 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
7240 * sense_len is not null, so prepare the 64bit value under
7241 * the same condition.
7242 */
ea1c928b
SS		 7243 if (get_user(local_sense_off, &ioc->sense_off) ||
7244 get_user(local_sense_len, &ioc->sense_len) ||
7245 get_user(user_sense_off, &cioc->sense_off))
323c4a02 7246 return -EFAULT;
7247
323c4a02 7248 if (local_sense_len) {
b3dc1a21 7249 void __user **sense_ioc_ptr =
ea1c928b 7250 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 7251 compat_uptr_t *sense_cioc_ptr =
ea1c928b 7252 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH		 7253 if (get_user(ptr, sense_cioc_ptr) ||
7254 put_user(compat_ptr(ptr), sense_ioc_ptr))
7255 return -EFAULT;
7256 }
c4a3e0a5 7257
b3dc1a21 7258 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 7259 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
7260 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
7261 copy_in_user(&ioc->sgl[i].iov_len,
7262 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
7263 return -EFAULT;
7264 }
7265
7266 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
7267
7268 if (copy_in_user(&cioc->frame.hdr.cmd_status,
7269 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
7270 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
7271 return -EFAULT;
7272 }
7273 return error;
7274}
7275
7276static long
7277megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
7278 unsigned long arg)
7279{
7280 switch (cmd) {
cb59aa6a
SP		 7281 case MEGASAS_IOC_FIRMWARE32:
7282 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 7283 case MEGASAS_IOC_GET_AEN:
7284 return megasas_mgmt_ioctl_aen(file, arg);
7285 }
7286
7287 return -ENOTTY;
7288}
7289#endif
7290
7291/*
7292 * File operations structure for management interface
7293 */
00977a59 7294static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 7295 .owner = THIS_MODULE,
7296 .open = megasas_mgmt_open,
c4a3e0a5
BS		 7297 .fasync = megasas_mgmt_fasync,
7298 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 7299 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 7300#ifdef CONFIG_COMPAT
7301 .compat_ioctl = megasas_mgmt_compat_ioctl,
7302#endif
6038f373 7303 .llseek = noop_llseek,
c4a3e0a5
BS		 7304};
7305
7306/*
7307 * PCI hotplug support registration structure
7308 */
7309static struct pci_driver megasas_pci_driver = {
7310
7311 .name = "megaraid_sas",
7312 .id_table = megasas_pci_table,
7313 .probe = megasas_probe_one,
6f039790 7314 .remove = megasas_detach_one,
31ea7088 7315 .suspend = megasas_suspend,
7316 .resume = megasas_resume,
c4a3e0a5
BS		 7317 .shutdown = megasas_shutdown,
7318};
7319
7320/*
7321 * Sysfs driver attributes
7322 */
7323static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
7324{
7325 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
7326 MEGASAS_VERSION);
7327}
7328
7329static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
7330
09fced19
SS		 7331static ssize_t
7332megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
7333{
7334 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
7335 MEGASAS_RELDATE);
7336}
7337
7338static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
7339
72c4fd36
YB		 7340static ssize_t
7341megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
7342{
7343 return sprintf(buf, "%u\n", support_poll_for_event);
7344}
7345
7346static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
7347 megasas_sysfs_show_support_poll_for_event, NULL);
7348
837f5fe8
YB		 7349 static ssize_t
7350megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
7351{
7352 return sprintf(buf, "%u\n", support_device_change);
7353}
7354
7355static DRIVER_ATTR(support_device_change, S_IRUGO,
7356 megasas_sysfs_show_support_device_change, NULL);
7357
658dcedb
SP		 7358static ssize_t
7359megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
7360{
ad84db2e 7361 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 7362}
7363
7364static ssize_t
7365megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
7366{
7367 int retval = count;
da0dc9fb
BH		 7368
7369 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 7370 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
7371 retval = -EINVAL;
7372 }
7373 return retval;
7374}
7375
66dca9b8 7376static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 7377 megasas_sysfs_set_dbg_lvl);
7378
b4a42213
S		 7379static inline void megasas_remove_scsi_device(struct scsi_device *sdev)
7380{
7381 sdev_printk(KERN_INFO, sdev, "SCSI device is removed\n");
7382 scsi_remove_device(sdev);
7383 scsi_device_put(sdev);
7384}
7385
7e8a75f4
YB		 7386static void
7387megasas_aen_polling(struct work_struct *work)
7388{
7389 struct megasas_aen_event *ev =
c1d390d8 7390 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 7391 struct megasas_instance *instance = ev->instance;
7392 union megasas_evt_class_locale class_locale;
7393 struct Scsi_Host *host;
7394 struct scsi_device *sdev1;
7395 u16 pd_index = 0;
c9786842 7396 u16 ld_index = 0;
7e8a75f4 7397 int i, j, doscan = 0;
229fe47c 7398 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7399 int error;
6d40afbc 7400 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB		 7401
7402 if (!instance) {
7403 printk(KERN_ERR "invalid instance!\n");
7404 kfree(ev);
7405 return;
7406 }
229fe47c
AR		 7407
7408 /* Adjust event workqueue thread wait time for VF mode */
7409 if (instance->requestorId)
7410 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7411
7412 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7413 mutex_lock(&instance->reset_mutex);
229fe47c 7414
7e8a75f4
YB		 7415 instance->ev = NULL;
7416 host = instance->host;
7417 if (instance->evt_detail) {
714f5177 7418 megasas_decode_evt(instance);
7e8a75f4 7419
94cd65dd 7420 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7421
11c71cb4 7422 case MR_EVT_PD_INSERTED:
7e8a75f4 7423 case MR_EVT_PD_REMOVED:
11c71cb4 7424 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7425 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7426 doscan = SCAN_PD_CHANNEL;
c9786842
YB		 7427 break;
7428
7429 case MR_EVT_LD_OFFLINE:
4c598b23 7430 case MR_EVT_CFG_CLEARED:
c9786842 7431 case MR_EVT_LD_DELETED:
c9786842 7432 case MR_EVT_LD_CREATED:
229fe47c 7433 if (!instance->requestorId ||
11c71cb4
SS		 7434 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7435 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7436
6d40afbc 7437 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7438 doscan = SCAN_VD_CHANNEL;
7439
c9786842 7440 break;
11c71cb4 7441
7e8a75f4 7442 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7443 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7444 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS		 7445 dcmd_ret = megasas_get_pd_list(instance);
7446
6d40afbc 7447 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7448 break;
7449
7450 if (!instance->requestorId ||
7451 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7452 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7453
6d40afbc 7454 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7455 break;
7456
7457 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7458 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7459 instance->host->host_no);
7e8a75f4 7460 break;
11c71cb4 7461
c4bd2654 7462 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS		 7463 dcmd_ret = megasas_get_ctrl_info(instance);
7464 break;
7e8a75f4
YB		 7465 default:
7466 doscan = 0;
7467 break;
7468 }
7469 } else {
1be18254 7470 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7471 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7472 kfree(ev);
7473 return;
7474 }
7475
11c71cb4
SS		 7476 mutex_unlock(&instance->reset_mutex);
7477
7478 if (doscan & SCAN_PD_CHANNEL) {
7479 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7480 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7481 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7482 sdev1 = scsi_device_lookup(host, i, j, 0);
7483 if (instance->pd_list[pd_index].driveState ==
7484 MR_PD_STATE_SYSTEM) {
7485 if (!sdev1)
7486 scsi_add_device(host, i, j, 0);
7487 else
7488 scsi_device_put(sdev1);
7489 } else {
b4a42213
S		 7490 if (sdev1)
7491 megasas_remove_scsi_device(sdev1);
7e8a75f4
YB		 7492 }
7493 }
7494 }
11c71cb4 7495 }
c9786842 7496
11c71cb4
SS		 7497 if (doscan & SCAN_VD_CHANNEL) {
7498 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7499 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7500 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7501 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7502 if (instance->ld_ids[ld_index] != 0xff) {
7503 if (!sdev1)
7504 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7505 else
7506 scsi_device_put(sdev1);
7507 } else {
b4a42213
S		 7508 if (sdev1)
7509 megasas_remove_scsi_device(sdev1);
c9786842
YB		 7510 }
7511 }
7512 }
7e8a75f4
YB		 7513 }
7514
6d40afbc 7515 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7516 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7517 else
7518 seq_num = instance->last_seq_num;
7e8a75f4
YB		 7519
7520 /* Register AEN with FW for latest sequence number plus 1 */
7521 class_locale.members.reserved = 0;
7522 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7523 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS		 7524
7525 if (instance->aen_cmd != NULL) {
7526 kfree(ev);
7527 return;
7528 }
7529
7530 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB		 7531 error = megasas_register_aen(instance, seq_num,
7532 class_locale.word);
7e8a75f4 7533 if (error)
11c71cb4
SS		 7534 dev_err(&instance->pdev->dev,
7535 "register aen failed error %x\n", error);
7e8a75f4 7536
11c71cb4 7537 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7538 kfree(ev);
7539}
7540
c4a3e0a5
BS		 7541/**
7542 * megasas_init - Driver load entry point
7543 */
7544static int __init megasas_init(void)
7545{
7546 int rval;
7547
c3e385a1
SS		 7548 /*
7549 * Booted in kdump kernel, minimize memory footprints by
7550 * disabling few features
7551 */
7552 if (reset_devices) {
7553 msix_vectors = 1;
7554 rdpq_enable = 0;
7555 dual_qdepth_disable = 1;
7556 }
7557
c4a3e0a5
BS		 7558 /*
7559 * Announce driver version and other information
7560 */
d98a6deb 7561 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7562
bd8d6dd4
KD		 7563 spin_lock_init(&poll_aen_lock);
7564
72c4fd36 7565 support_poll_for_event = 2;
837f5fe8 7566 support_device_change = 1;
72c4fd36 7567
c4a3e0a5
BS		 7568 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7569
7570 /*
7571 * Register character device node
7572 */
7573 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7574
7575 if (rval < 0) {
7576 printk(KERN_DEBUG "megasas: failed to open device node\n");
7577 return rval;
7578 }
7579
7580 megasas_mgmt_majorno = rval;
7581
7582 /*
7583 * Register ourselves as PCI hotplug module
7584 */
4041b9cd 7585 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 7586
7587 if (rval) {
6774def6 7588 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 7589 goto err_pcidrv;
7590 }
7591
7592 rval = driver_create_file(&megasas_pci_driver.driver,
7593 &driver_attr_version);
7594 if (rval)
7595 goto err_dcf_attr_ver;
72c4fd36 7596
09fced19
SS		 7597 rval = driver_create_file(&megasas_pci_driver.driver,
7598 &driver_attr_release_date);
7599 if (rval)
7600 goto err_dcf_rel_date;
7601
72c4fd36
YB		 7602 rval = driver_create_file(&megasas_pci_driver.driver,
7603 &driver_attr_support_poll_for_event);
7604 if (rval)
7605 goto err_dcf_support_poll_for_event;
7606
83aabc1b
JG		 7607 rval = driver_create_file(&megasas_pci_driver.driver,
7608 &driver_attr_dbg_lvl);
7609 if (rval)
7610 goto err_dcf_dbg_lvl;
837f5fe8
YB		 7611 rval = driver_create_file(&megasas_pci_driver.driver,
7612 &driver_attr_support_device_change);
7613 if (rval)
7614 goto err_dcf_support_device_change;
7615
c4a3e0a5 7616 return rval;
ad84db2e 7617
837f5fe8 7618err_dcf_support_device_change:
ad84db2e 7619 driver_remove_file(&megasas_pci_driver.driver,
7620 &driver_attr_dbg_lvl);
83aabc1b 7621err_dcf_dbg_lvl:
72c4fd36
YB		 7622 driver_remove_file(&megasas_pci_driver.driver,
7623 &driver_attr_support_poll_for_event);
72c4fd36 7624err_dcf_support_poll_for_event:
09fced19
SS		 7625 driver_remove_file(&megasas_pci_driver.driver,
7626 &driver_attr_release_date);
7627err_dcf_rel_date:
83aabc1b
JG		 7628 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7629err_dcf_attr_ver:
7630 pci_unregister_driver(&megasas_pci_driver);
7631err_pcidrv:
7632 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7633 return rval;
c4a3e0a5
BS		 7634}
7635
7636/**
7637 * megasas_exit - Driver unload entry point
7638 */
7639static void __exit megasas_exit(void)
7640{
658dcedb
SP		 7641 driver_remove_file(&megasas_pci_driver.driver,
7642 &driver_attr_dbg_lvl);
837f5fe8
YB		 7643 driver_remove_file(&megasas_pci_driver.driver,
7644 &driver_attr_support_poll_for_event);
7645 driver_remove_file(&megasas_pci_driver.driver,
7646 &driver_attr_support_device_change);
09fced19
SS		 7647 driver_remove_file(&megasas_pci_driver.driver,
7648 &driver_attr_release_date);
83aabc1b 7649 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 7650
7651 pci_unregister_driver(&megasas_pci_driver);
7652 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7653}
7654
7655module_init(megasas_init);
7656module_exit(megasas_exit);
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